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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; FIXME: Check gfx90a, 940. 908 should fail to select.3; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 < %s | FileCheck -check-prefix=GFX1200 %s4 5define <2 x bfloat> @struct_ptr_buffer_atomic_add_v2bf16_rtn__vgpr_val__sgpr_rsrc__vgpr_voffset__sgpr_soffset(<2 x bfloat> %val, ptr addrspace(8) inreg %rsrc, i32 %vindex, i32 %voffset, i32 inreg %soffset) #0 {6; GFX1200-LABEL: struct_ptr_buffer_atomic_add_v2bf16_rtn__vgpr_val__sgpr_rsrc__vgpr_voffset__sgpr_soffset:7; GFX1200: ; %bb.0:8; GFX1200-NEXT: s_wait_loadcnt_dscnt 0x09; GFX1200-NEXT: s_wait_expcnt 0x010; GFX1200-NEXT: s_wait_samplecnt 0x011; GFX1200-NEXT: s_wait_bvhcnt 0x012; GFX1200-NEXT: s_wait_kmcnt 0x013; GFX1200-NEXT: buffer_atomic_pk_add_bf16 v0, v[1:2], s[0:3], s16 idxen offen th:TH_ATOMIC_RETURN14; GFX1200-NEXT: s_wait_loadcnt 0x015; GFX1200-NEXT: s_setpc_b64 s[30:31]16 %ret = call <2 x bfloat> @llvm.amdgcn.struct.ptr.buffer.atomic.fadd.v2bf16(<2 x bfloat> %val, ptr addrspace(8) %rsrc, i32 %vindex, i32 %voffset, i32 %soffset, i32 0)17 ret <2 x bfloat> %ret18}19 20define void @struct_ptr_buffer_atomic_add_v2bf16_noret__vgpr_val__sgpr_rsrc__vgpr_voffset__sgpr_soffset(<2 x bfloat> %val, ptr addrspace(8) inreg %rsrc, i32 %vindex, i32 %voffset, i32 inreg %soffset) #0 {21; GFX1200-LABEL: struct_ptr_buffer_atomic_add_v2bf16_noret__vgpr_val__sgpr_rsrc__vgpr_voffset__sgpr_soffset:22; GFX1200: ; %bb.0:23; GFX1200-NEXT: s_wait_loadcnt_dscnt 0x024; GFX1200-NEXT: s_wait_expcnt 0x025; GFX1200-NEXT: s_wait_samplecnt 0x026; GFX1200-NEXT: s_wait_bvhcnt 0x027; GFX1200-NEXT: s_wait_kmcnt 0x028; GFX1200-NEXT: buffer_atomic_pk_add_bf16 v0, v[1:2], s[0:3], s16 idxen offen29; GFX1200-NEXT: s_setpc_b64 s[30:31]30 %unused = call <2 x bfloat> @llvm.amdgcn.struct.ptr.buffer.atomic.fadd.v2bf16(<2 x bfloat> %val, ptr addrspace(8) %rsrc, i32 %vindex, i32 %voffset, i32 %soffset, i32 0)31 ret void32}33 34; Test waterfall loop35define <2 x bfloat> @struct_ptr_buffer_atomic_add_v2bf16_rtn__vgpr_val__vgpr_rsrc__vgpr_voffset__vgpr_soffset(<2 x bfloat> %val, ptr addrspace(8) %rsrc, i32 %vindex, i32 %voffset, i32 %soffset) #0 {36; GFX1200-LABEL: struct_ptr_buffer_atomic_add_v2bf16_rtn__vgpr_val__vgpr_rsrc__vgpr_voffset__vgpr_soffset:37; GFX1200: ; %bb.0:38; GFX1200-NEXT: s_wait_loadcnt_dscnt 0x039; GFX1200-NEXT: s_wait_expcnt 0x040; GFX1200-NEXT: s_wait_samplecnt 0x041; GFX1200-NEXT: s_wait_bvhcnt 0x042; GFX1200-NEXT: s_wait_kmcnt 0x043; GFX1200-NEXT: s_mov_b32 s2, exec_lo44; GFX1200-NEXT: .LBB2_1: ; =>This Inner Loop Header: Depth=145; GFX1200-NEXT: v_readfirstlane_b32 s4, v146; GFX1200-NEXT: v_readfirstlane_b32 s5, v247; GFX1200-NEXT: v_readfirstlane_b32 s6, v348; GFX1200-NEXT: v_readfirstlane_b32 s7, v449; GFX1200-NEXT: v_readfirstlane_b32 s3, v750; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)51; GFX1200-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[1:2]52; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)53; GFX1200-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[3:4]54; GFX1200-NEXT: v_cmp_eq_u32_e64 s1, s3, v755; GFX1200-NEXT: s_and_b32 s0, vcc_lo, s056; GFX1200-NEXT: s_wait_alu depctr_sa_sdst(0)57; GFX1200-NEXT: s_and_b32 s0, s0, s158; GFX1200-NEXT: s_wait_alu depctr_sa_sdst(0)59; GFX1200-NEXT: s_and_saveexec_b32 s0, s060; GFX1200-NEXT: s_wait_loadcnt 0x061; GFX1200-NEXT: buffer_atomic_pk_add_bf16 v0, v[5:6], s[4:7], s3 idxen offen th:TH_ATOMIC_RETURN62; GFX1200-NEXT: ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr463; GFX1200-NEXT: ; implicit-def: $vgpr764; GFX1200-NEXT: ; implicit-def: $vgpr5_vgpr665; GFX1200-NEXT: s_xor_b32 exec_lo, exec_lo, s066; GFX1200-NEXT: s_cbranch_execnz .LBB2_167; GFX1200-NEXT: ; %bb.2:68; GFX1200-NEXT: s_mov_b32 exec_lo, s269; GFX1200-NEXT: s_wait_loadcnt 0x070; GFX1200-NEXT: s_setpc_b64 s[30:31]71 %ret = call <2 x bfloat> @llvm.amdgcn.struct.ptr.buffer.atomic.fadd.v2bf16(<2 x bfloat> %val, ptr addrspace(8) %rsrc, i32 %vindex, i32 %voffset, i32 %soffset, i32 0)72 ret <2 x bfloat> %ret73}74 75define void @struct_ptr_buffer_atomic_add_v2bf16_noret__vgpr_val__vgpr_rsrc__vgpr_voffset__vgpr_soffset(<2 x bfloat> %val, ptr addrspace(8) %rsrc, i32 %vindex, i32 %voffset, i32 %soffset) #0 {76; GFX1200-LABEL: struct_ptr_buffer_atomic_add_v2bf16_noret__vgpr_val__vgpr_rsrc__vgpr_voffset__vgpr_soffset:77; GFX1200: ; %bb.0:78; GFX1200-NEXT: s_wait_loadcnt_dscnt 0x079; GFX1200-NEXT: s_wait_expcnt 0x080; GFX1200-NEXT: s_wait_samplecnt 0x081; GFX1200-NEXT: s_wait_bvhcnt 0x082; GFX1200-NEXT: s_wait_kmcnt 0x083; GFX1200-NEXT: s_mov_b32 s2, exec_lo84; GFX1200-NEXT: .LBB3_1: ; =>This Inner Loop Header: Depth=185; GFX1200-NEXT: v_readfirstlane_b32 s4, v186; GFX1200-NEXT: v_readfirstlane_b32 s5, v287; GFX1200-NEXT: v_readfirstlane_b32 s6, v388; GFX1200-NEXT: v_readfirstlane_b32 s7, v489; GFX1200-NEXT: v_readfirstlane_b32 s3, v790; GFX1200-NEXT: s_wait_alu depctr_va_sdst(0)91; GFX1200-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[1:2]92; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)93; GFX1200-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[3:4]94; GFX1200-NEXT: v_cmp_eq_u32_e64 s1, s3, v795; GFX1200-NEXT: s_and_b32 s0, vcc_lo, s096; GFX1200-NEXT: s_wait_alu depctr_sa_sdst(0)97; GFX1200-NEXT: s_and_b32 s0, s0, s198; GFX1200-NEXT: s_wait_alu depctr_sa_sdst(0)99; GFX1200-NEXT: s_and_saveexec_b32 s0, s0100; GFX1200-NEXT: buffer_atomic_pk_add_bf16 v0, v[5:6], s[4:7], s3 idxen offen101; GFX1200-NEXT: ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4102; GFX1200-NEXT: ; implicit-def: $vgpr7103; GFX1200-NEXT: ; implicit-def: $vgpr0104; GFX1200-NEXT: ; implicit-def: $vgpr5_vgpr6105; GFX1200-NEXT: s_xor_b32 exec_lo, exec_lo, s0106; GFX1200-NEXT: s_cbranch_execnz .LBB3_1107; GFX1200-NEXT: ; %bb.2:108; GFX1200-NEXT: s_mov_b32 exec_lo, s2109; GFX1200-NEXT: s_setpc_b64 s[30:31]110 %ret = call <2 x bfloat> @llvm.amdgcn.struct.ptr.buffer.atomic.fadd.v2bf16(<2 x bfloat> %val, ptr addrspace(8) %rsrc, i32 %vindex, i32 %voffset, i32 %soffset, i32 0)111 ret void112}113 114declare <2 x bfloat> @llvm.amdgcn.struct.ptr.buffer.atomic.fadd.v2bf16(<2 x bfloat>, ptr addrspace(8), i32, i32, i32, i32 immarg)115 116attributes #0 = { nounwind }117