169 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx950 < %s | FileCheck -check-prefixes=GFX950 %s3; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx950 < %s | FileCheck -check-prefixes=GFX950 %s4; RUN: not --crash llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx942 -filetype=null < %s 2>&1 | FileCheck -check-prefix=ERR-SDAG %s5; RUN: not llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx942 -filetype=null < %s 2>&1 | FileCheck -check-prefix=ERR-GISEL %s6 7; ERR-SDAG: LLVM ERROR: Do not know how to expand this operator's operand!8; ERR-GISEL: LLVM ERROR: cannot select: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.struct.ptr.buffer.load.lds),9 10declare void @llvm.amdgcn.struct.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) nocapture, i32 %size, i32 %vindex, i32 %voffset, i32 %soffset, i32 %offset, i32 %aux)11 12;---------------------------------------------------------------------y13; dwordx314;---------------------------------------------------------------------15 16define amdgpu_ps float @buffer_load_lds_dwordx3(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds) {17; GFX950-LABEL: buffer_load_lds_dwordx3:18; GFX950: ; %bb.0:19; GFX950-NEXT: s_mov_b32 m0, s420; GFX950-NEXT: v_mov_b32_e32 v0, 821; GFX950-NEXT: buffer_load_dwordx3 v0, s[0:3], 0 idxen lds22; GFX950-NEXT: buffer_load_dwordx3 v0, s[0:3], 0 idxen offset:4 sc0 lds23; GFX950-NEXT: buffer_load_dwordx3 v0, s[0:3], 0 idxen offset:8 nt lds24; GFX950-NEXT: v_mov_b32_e32 v0, s425; GFX950-NEXT: s_waitcnt vmcnt(0)26; GFX950-NEXT: ds_read_b32 v0, v027; GFX950-NEXT: s_waitcnt lgkmcnt(0)28; GFX950-NEXT: ; return to shader part epilog29 call void @llvm.amdgcn.struct.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 12, i32 8, i32 0, i32 0, i32 0, i32 0)30 call void @llvm.amdgcn.struct.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 12, i32 8, i32 0, i32 0, i32 4, i32 1)31 call void @llvm.amdgcn.struct.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 12, i32 8, i32 0, i32 0, i32 8, i32 2)32 %res = load float, ptr addrspace(3) %lds33 ret float %res34}35 36define amdgpu_ps void @buffer_load_lds_dwordx3_imm_offset(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds, i32 %vindex) {37; GFX950-LABEL: buffer_load_lds_dwordx3_imm_offset:38; GFX950: ; %bb.0:39; GFX950-NEXT: s_mov_b32 m0, s440; GFX950-NEXT: s_nop 041; GFX950-NEXT: buffer_load_dwordx3 v0, s[0:3], 0 idxen offset:2048 lds42; GFX950-NEXT: s_endpgm43 call void @llvm.amdgcn.struct.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 12, i32 %vindex, i32 0, i32 0, i32 2048, i32 0)44 ret void45}46 47define amdgpu_ps void @buffer_load_lds_dwordx3_v_offset(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds, i32 %vindex, i32 %voffset) {48; GFX950-LABEL: buffer_load_lds_dwordx3_v_offset:49; GFX950: ; %bb.0:50; GFX950-NEXT: s_mov_b32 m0, s451; GFX950-NEXT: s_nop 052; GFX950-NEXT: buffer_load_dwordx3 v[0:1], s[0:3], 0 idxen offen lds53; GFX950-NEXT: s_endpgm54 call void @llvm.amdgcn.struct.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 12, i32 %vindex, i32 %voffset, i32 0, i32 0, i32 0)55 ret void56}57 58define amdgpu_ps void @buffer_load_lds_dwordx3_s_offset(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds, i32 %vindex, i32 inreg %soffset) {59; GFX950-LABEL: buffer_load_lds_dwordx3_s_offset:60; GFX950: ; %bb.0:61; GFX950-NEXT: s_mov_b32 m0, s462; GFX950-NEXT: s_nop 063; GFX950-NEXT: buffer_load_dwordx3 v0, s[0:3], s5 idxen lds64; GFX950-NEXT: s_endpgm65 call void @llvm.amdgcn.struct.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 12, i32 %vindex, i32 0, i32 %soffset, i32 0, i32 0)66 ret void67}68 69define amdgpu_ps void @buffer_load_lds_dwordx3_vs_offset(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds, i32 %vindex, i32 %voffset, i32 inreg %soffset) {70; GFX950-LABEL: buffer_load_lds_dwordx3_vs_offset:71; GFX950: ; %bb.0:72; GFX950-NEXT: s_mov_b32 m0, s473; GFX950-NEXT: s_nop 074; GFX950-NEXT: buffer_load_dwordx3 v[0:1], s[0:3], s5 idxen offen lds75; GFX950-NEXT: s_endpgm76 call void @llvm.amdgcn.struct.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 12, i32 %vindex, i32 %voffset, i32 %soffset, i32 0, i32 0)77 ret void78}79 80define amdgpu_ps void @buffer_load_lds_dwordx3_vs_imm_offset(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds, i32 %vindex, i32 %voffset, i32 inreg %soffset) {81; GFX950-LABEL: buffer_load_lds_dwordx3_vs_imm_offset:82; GFX950: ; %bb.0:83; GFX950-NEXT: s_mov_b32 m0, s484; GFX950-NEXT: s_nop 085; GFX950-NEXT: buffer_load_dwordx3 v[0:1], s[0:3], s5 idxen offen offset:2048 lds86; GFX950-NEXT: s_endpgm87 call void @llvm.amdgcn.struct.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 12, i32 %vindex, i32 %voffset, i32 %soffset, i32 2048, i32 0)88 ret void89}90 91;---------------------------------------------------------------------y92; dwordx493;---------------------------------------------------------------------94 95define amdgpu_ps float @buffer_load_lds_dwordx4(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds) {96; GFX950-LABEL: buffer_load_lds_dwordx4:97; GFX950: ; %bb.0:98; GFX950-NEXT: s_mov_b32 m0, s499; GFX950-NEXT: v_mov_b32_e32 v0, 8100; GFX950-NEXT: buffer_load_dwordx4 v0, s[0:3], 0 idxen lds101; GFX950-NEXT: buffer_load_dwordx4 v0, s[0:3], 0 idxen offset:4 sc0 lds102; GFX950-NEXT: buffer_load_dwordx4 v0, s[0:3], 0 idxen offset:8 nt lds103; GFX950-NEXT: v_mov_b32_e32 v0, s4104; GFX950-NEXT: s_waitcnt vmcnt(0)105; GFX950-NEXT: ds_read_b32 v0, v0106; GFX950-NEXT: s_waitcnt lgkmcnt(0)107; GFX950-NEXT: ; return to shader part epilog108 call void @llvm.amdgcn.struct.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 16, i32 8, i32 0, i32 0, i32 0, i32 0)109 call void @llvm.amdgcn.struct.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 16, i32 8, i32 0, i32 0, i32 4, i32 1)110 call void @llvm.amdgcn.struct.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 16, i32 8, i32 0, i32 0, i32 8, i32 2)111 %res = load float, ptr addrspace(3) %lds112 ret float %res113}114 115define amdgpu_ps void @buffer_load_lds_dwordx4_imm_offset(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds, i32 %vindex) {116; GFX950-LABEL: buffer_load_lds_dwordx4_imm_offset:117; GFX950: ; %bb.0:118; GFX950-NEXT: s_mov_b32 m0, s4119; GFX950-NEXT: s_nop 0120; GFX950-NEXT: buffer_load_dwordx4 v0, s[0:3], 0 idxen offset:2048 lds121; GFX950-NEXT: s_endpgm122 call void @llvm.amdgcn.struct.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 16, i32 %vindex, i32 0, i32 0, i32 2048, i32 0)123 ret void124}125 126define amdgpu_ps void @buffer_load_lds_dwordx4_v_offset(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds, i32 %vindex, i32 %voffset) {127; GFX950-LABEL: buffer_load_lds_dwordx4_v_offset:128; GFX950: ; %bb.0:129; GFX950-NEXT: s_mov_b32 m0, s4130; GFX950-NEXT: s_nop 0131; GFX950-NEXT: buffer_load_dwordx4 v[0:1], s[0:3], 0 idxen offen lds132; GFX950-NEXT: s_endpgm133 call void @llvm.amdgcn.struct.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 16, i32 %vindex, i32 %voffset, i32 0, i32 0, i32 0)134 ret void135}136 137define amdgpu_ps void @buffer_load_lds_dwordx4_s_offset(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds, i32 %vindex, i32 inreg %soffset) {138; GFX950-LABEL: buffer_load_lds_dwordx4_s_offset:139; GFX950: ; %bb.0:140; GFX950-NEXT: s_mov_b32 m0, s4141; GFX950-NEXT: s_nop 0142; GFX950-NEXT: buffer_load_dwordx4 v0, s[0:3], s5 idxen lds143; GFX950-NEXT: s_endpgm144 call void @llvm.amdgcn.struct.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 16, i32 %vindex, i32 0, i32 %soffset, i32 0, i32 0)145 ret void146}147 148define amdgpu_ps void @buffer_load_lds_dwordx4_vs_offset(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds, i32 %vindex, i32 %voffset, i32 inreg %soffset) {149; GFX950-LABEL: buffer_load_lds_dwordx4_vs_offset:150; GFX950: ; %bb.0:151; GFX950-NEXT: s_mov_b32 m0, s4152; GFX950-NEXT: s_nop 0153; GFX950-NEXT: buffer_load_dwordx4 v[0:1], s[0:3], s5 idxen offen lds154; GFX950-NEXT: s_endpgm155 call void @llvm.amdgcn.struct.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 16, i32 %vindex, i32 %voffset, i32 %soffset, i32 0, i32 0)156 ret void157}158 159define amdgpu_ps void @buffer_load_lds_dwordx4_vs_imm_offset(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds, i32 %vindex, i32 %voffset, i32 inreg %soffset) {160; GFX950-LABEL: buffer_load_lds_dwordx4_vs_imm_offset:161; GFX950: ; %bb.0:162; GFX950-NEXT: s_mov_b32 m0, s4163; GFX950-NEXT: s_nop 0164; GFX950-NEXT: buffer_load_dwordx4 v[0:1], s[0:3], s5 idxen offen offset:2048 lds165; GFX950-NEXT: s_endpgm166 call void @llvm.amdgcn.struct.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 16, i32 %vindex, i32 %voffset, i32 %soffset, i32 2048, i32 0)167 ret void168}169