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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2;RUN: llc < %s -mtriple=amdgcn -mcpu=verde | FileCheck -check-prefixes=VERDE %s3;RUN: llc < %s -mtriple=amdgcn -mcpu=tonga | FileCheck -check-prefixes=PREGFX10 %s4;RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1010 | FileCheck -check-prefixes=GFX10 %s5;RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1100 | FileCheck -check-prefixes=GFX11 %s6;RUN: llc < %s -mtriple=amdgcn -mcpu=gfx1200 | FileCheck -check-prefixes=GFX12 %s7 8define amdgpu_ps void @tbuffer_store(<4 x i32> inreg, <4 x float>, <4 x float>, <4 x float>) {9; VERDE-LABEL: tbuffer_store:10; VERDE:       ; %bb.0: ; %main_body11; VERDE-NEXT:    v_mov_b32_e32 v12, 012; VERDE-NEXT:    tbuffer_store_format_xyzw v[0:3], v12, s[0:3], 0 format:[BUF_DATA_FORMAT_16_16_16_16,BUF_NUM_FORMAT_USCALED] idxen13; VERDE-NEXT:    tbuffer_store_format_xyzw v[4:7], v12, s[0:3], 0 format:[BUF_DATA_FORMAT_32_32_32,BUF_NUM_FORMAT_SSCALED] idxen glc14; VERDE-NEXT:    tbuffer_store_format_xyzw v[8:11], v12, s[0:3], 0 format:[BUF_DATA_FORMAT_32_32_32_32,BUF_NUM_FORMAT_UINT] idxen slc15; VERDE-NEXT:    tbuffer_store_format_xyzw v[8:11], v12, s[0:3], 0 format:[BUF_DATA_FORMAT_32_32_32_32,BUF_NUM_FORMAT_UINT] idxen glc16; VERDE-NEXT:    s_endpgm17;18; PREGFX10-LABEL: tbuffer_store:19; PREGFX10:       ; %bb.0: ; %main_body20; PREGFX10-NEXT:    v_mov_b32_e32 v12, 021; PREGFX10-NEXT:    tbuffer_store_format_xyzw v[0:3], v12, s[0:3], 0 format:[BUF_DATA_FORMAT_16_16_16_16,BUF_NUM_FORMAT_USCALED] idxen22; PREGFX10-NEXT:    tbuffer_store_format_xyzw v[4:7], v12, s[0:3], 0 format:[BUF_DATA_FORMAT_32_32_32,BUF_NUM_FORMAT_SSCALED] idxen glc23; PREGFX10-NEXT:    tbuffer_store_format_xyzw v[8:11], v12, s[0:3], 0 format:[BUF_DATA_FORMAT_32_32_32_32,BUF_NUM_FORMAT_UINT] idxen slc24; PREGFX10-NEXT:    tbuffer_store_format_xyzw v[8:11], v12, s[0:3], 0 format:[BUF_DATA_FORMAT_32_32_32_32,BUF_NUM_FORMAT_UINT] idxen glc25; PREGFX10-NEXT:    s_endpgm26;27; GFX10-LABEL: tbuffer_store:28; GFX10:       ; %bb.0: ; %main_body29; GFX10-NEXT:    v_mov_b32_e32 v12, 030; GFX10-NEXT:    tbuffer_store_format_xyzw v[0:3], v12, s[0:3], 0 format:[BUF_FMT_10_10_10_2_UNORM] idxen31; GFX10-NEXT:    tbuffer_store_format_xyzw v[4:7], v12, s[0:3], 0 format:[BUF_FMT_8_8_8_8_SINT] idxen glc32; GFX10-NEXT:    tbuffer_store_format_xyzw v[8:11], v12, s[0:3], 0 format:78 idxen slc33; GFX10-NEXT:    tbuffer_store_format_xyzw v[8:11], v12, s[0:3], 0 format:78 idxen glc dlc34; GFX10-NEXT:    s_endpgm35;36; GFX11-LABEL: tbuffer_store:37; GFX11:       ; %bb.0: ; %main_body38; GFX11-NEXT:    v_mov_b32_e32 v12, 039; GFX11-NEXT:    s_clause 0x340; GFX11-NEXT:    tbuffer_store_format_xyzw v[0:3], v12, s[0:3], 0 format:[BUF_FMT_8_8_8_8_USCALED] idxen41; GFX11-NEXT:    tbuffer_store_format_xyzw v[4:7], v12, s[0:3], 0 format:[BUF_FMT_32_32_32_32_UINT] idxen glc42; GFX11-NEXT:    tbuffer_store_format_xyzw v[8:11], v12, s[0:3], 0 format:78 idxen slc43; GFX11-NEXT:    tbuffer_store_format_xyzw v[8:11], v12, s[0:3], 0 format:78 idxen glc dlc44; GFX11-NEXT:    s_endpgm45;46; GFX12-LABEL: tbuffer_store:47; GFX12:       ; %bb.0: ; %main_body48; GFX12-NEXT:    v_mov_b32_e32 v12, 049; GFX12-NEXT:    s_clause 0x350; GFX12-NEXT:    tbuffer_store_format_xyzw v[0:3], v12, s[0:3], null format:[BUF_FMT_8_8_8_8_USCALED] idxen51; GFX12-NEXT:    tbuffer_store_format_xyzw v[4:7], v12, s[0:3], null format:[BUF_FMT_32_32_32_32_UINT] idxen th:TH_STORE_NT52; GFX12-NEXT:    tbuffer_store_format_xyzw v[8:11], v12, s[0:3], null format:78 idxen th:TH_STORE_HT53; GFX12-NEXT:    tbuffer_store_format_xyzw v[8:11], v12, s[0:3], null format:78 idxen th:TH_STORE_RT_NT54; GFX12-NEXT:    s_endpgm55main_body:56  %in1 = bitcast <4 x float> %1 to <4 x i32>57  %in2 = bitcast <4 x float> %2 to <4 x i32>58  %in3 = bitcast <4 x float> %3 to <4 x i32>59  call void @llvm.amdgcn.struct.tbuffer.store.v4i32(<4 x i32> %in1, <4 x i32> %0, i32 0, i32 0, i32 0, i32 44, i32 0)60  call void @llvm.amdgcn.struct.tbuffer.store.v4i32(<4 x i32> %in2, <4 x i32> %0, i32 0, i32 0, i32 0, i32 61, i32 1)61  call void @llvm.amdgcn.struct.tbuffer.store.v4i32(<4 x i32> %in3, <4 x i32> %0, i32 0, i32 0, i32 0, i32 78, i32 2)62  call void @llvm.amdgcn.struct.tbuffer.store.v4f32(<4 x float> %3, <4 x i32> %0, i32 0, i32 0, i32 0, i32 78, i32 5)63  ret void64}65 66define amdgpu_ps void @tbuffer_store_immoffs(<4 x i32> inreg, <4 x float>) {67; VERDE-LABEL: tbuffer_store_immoffs:68; VERDE:       ; %bb.0: ; %main_body69; VERDE-NEXT:    v_mov_b32_e32 v4, 070; VERDE-NEXT:    tbuffer_store_format_xyzw v[0:3], v4, s[0:3], 0 format:[BUF_DATA_FORMAT_16_16,BUF_NUM_FORMAT_FLOAT] idxen offset:4271; VERDE-NEXT:    s_endpgm72;73; PREGFX10-LABEL: tbuffer_store_immoffs:74; PREGFX10:       ; %bb.0: ; %main_body75; PREGFX10-NEXT:    v_mov_b32_e32 v4, 076; PREGFX10-NEXT:    tbuffer_store_format_xyzw v[0:3], v4, s[0:3], 0 format:[BUF_DATA_FORMAT_16_16,BUF_NUM_FORMAT_FLOAT] idxen offset:4277; PREGFX10-NEXT:    s_endpgm78;79; GFX10-LABEL: tbuffer_store_immoffs:80; GFX10:       ; %bb.0: ; %main_body81; GFX10-NEXT:    v_mov_b32_e32 v4, 082; GFX10-NEXT:    tbuffer_store_format_xyzw v[0:3], v4, s[0:3], 0 format:117 idxen offset:4283; GFX10-NEXT:    s_endpgm84;85; GFX11-LABEL: tbuffer_store_immoffs:86; GFX11:       ; %bb.0: ; %main_body87; GFX11-NEXT:    v_mov_b32_e32 v4, 088; GFX11-NEXT:    tbuffer_store_format_xyzw v[0:3], v4, s[0:3], 0 format:117 idxen offset:4289; GFX11-NEXT:    s_endpgm90;91; GFX12-LABEL: tbuffer_store_immoffs:92; GFX12:       ; %bb.0: ; %main_body93; GFX12-NEXT:    v_mov_b32_e32 v4, 094; GFX12-NEXT:    tbuffer_store_format_xyzw v[0:3], v4, s[0:3], null format:117 idxen offset:4295; GFX12-NEXT:    s_endpgm96main_body:97  %in1 = bitcast <4 x float> %1 to <4 x i32>98  call void @llvm.amdgcn.struct.tbuffer.store.v4i32(<4 x i32> %in1, <4 x i32> %0, i32 0, i32 42, i32 0, i32 117, i32 0)99  ret void100}101 102define amdgpu_ps void @tbuffer_store_scalar_and_imm_offs(<4 x i32> inreg, <4 x float> %vdata, i32 inreg %soffset) {103; VERDE-LABEL: tbuffer_store_scalar_and_imm_offs:104; VERDE:       ; %bb.0: ; %main_body105; VERDE-NEXT:    v_mov_b32_e32 v4, 0106; VERDE-NEXT:    tbuffer_store_format_xyzw v[0:3], v4, s[0:3], s4 format:[BUF_DATA_FORMAT_16_16,BUF_NUM_FORMAT_FLOAT] idxen offset:42107; VERDE-NEXT:    s_endpgm108;109; PREGFX10-LABEL: tbuffer_store_scalar_and_imm_offs:110; PREGFX10:       ; %bb.0: ; %main_body111; PREGFX10-NEXT:    v_mov_b32_e32 v4, 0112; PREGFX10-NEXT:    tbuffer_store_format_xyzw v[0:3], v4, s[0:3], s4 format:[BUF_DATA_FORMAT_16_16,BUF_NUM_FORMAT_FLOAT] idxen offset:42113; PREGFX10-NEXT:    s_endpgm114;115; GFX10-LABEL: tbuffer_store_scalar_and_imm_offs:116; GFX10:       ; %bb.0: ; %main_body117; GFX10-NEXT:    v_mov_b32_e32 v4, 0118; GFX10-NEXT:    tbuffer_store_format_xyzw v[0:3], v4, s[0:3], s4 format:117 idxen offset:42119; GFX10-NEXT:    s_endpgm120;121; GFX11-LABEL: tbuffer_store_scalar_and_imm_offs:122; GFX11:       ; %bb.0: ; %main_body123; GFX11-NEXT:    v_mov_b32_e32 v4, 0124; GFX11-NEXT:    tbuffer_store_format_xyzw v[0:3], v4, s[0:3], s4 format:117 idxen offset:42125; GFX11-NEXT:    s_endpgm126;127; GFX12-LABEL: tbuffer_store_scalar_and_imm_offs:128; GFX12:       ; %bb.0: ; %main_body129; GFX12-NEXT:    v_mov_b32_e32 v4, 0130; GFX12-NEXT:    tbuffer_store_format_xyzw v[0:3], v4, s[0:3], s4 format:117 idxen offset:42131; GFX12-NEXT:    s_endpgm132main_body:133  %in1 = bitcast <4 x float> %vdata to <4 x i32>134  call void @llvm.amdgcn.struct.tbuffer.store.v4i32(<4 x i32> %in1, <4 x i32> %0, i32 0, i32 42, i32 %soffset, i32 117, i32 0)135  ret void136}137 138define amdgpu_ps void @buffer_store_idx(<4 x i32> inreg, <4 x float> %vdata, i32 %vindex) {139; VERDE-LABEL: buffer_store_idx:140; VERDE:       ; %bb.0: ; %main_body141; VERDE-NEXT:    tbuffer_store_format_xyzw v[0:3], v4, s[0:3], 0 format:[BUF_DATA_FORMAT_RESERVED_15,BUF_NUM_FORMAT_USCALED] idxen142; VERDE-NEXT:    s_endpgm143;144; PREGFX10-LABEL: buffer_store_idx:145; PREGFX10:       ; %bb.0: ; %main_body146; PREGFX10-NEXT:    tbuffer_store_format_xyzw v[0:3], v4, s[0:3], 0 format:[BUF_DATA_FORMAT_RESERVED_15,BUF_NUM_FORMAT_USCALED] idxen147; PREGFX10-NEXT:    s_endpgm148;149; GFX10-LABEL: buffer_store_idx:150; GFX10:       ; %bb.0: ; %main_body151; GFX10-NEXT:    tbuffer_store_format_xyzw v[0:3], v4, s[0:3], 0 format:[BUF_FMT_10_10_10_2_SSCALED] idxen152; GFX10-NEXT:    s_endpgm153;154; GFX11-LABEL: buffer_store_idx:155; GFX11:       ; %bb.0: ; %main_body156; GFX11-NEXT:    tbuffer_store_format_xyzw v[0:3], v4, s[0:3], 0 format:[BUF_FMT_8_8_8_8_SINT] idxen157; GFX11-NEXT:    s_endpgm158;159; GFX12-LABEL: buffer_store_idx:160; GFX12:       ; %bb.0: ; %main_body161; GFX12-NEXT:    tbuffer_store_format_xyzw v[0:3], v4, s[0:3], null format:[BUF_FMT_8_8_8_8_SINT] idxen162; GFX12-NEXT:    s_endpgm163main_body:164  %in1 = bitcast <4 x float> %vdata to <4 x i32>165  call void @llvm.amdgcn.struct.tbuffer.store.v4i32(<4 x i32> %in1, <4 x i32> %0, i32 %vindex, i32 0, i32 0, i32 47, i32 0)166  ret void167}168 169define amdgpu_ps void @buffer_store_ofs(<4 x i32> inreg, <4 x float> %vdata, i32 %voffset) {170; VERDE-LABEL: buffer_store_ofs:171; VERDE:       ; %bb.0: ; %main_body172; VERDE-NEXT:    s_mov_b32 s4, 0173; VERDE-NEXT:    v_mov_b32_e32 v5, v4174; VERDE-NEXT:    v_mov_b32_e32 v4, s4175; VERDE-NEXT:    tbuffer_store_format_xyzw v[0:3], v[4:5], s[0:3], 0 format:[BUF_DATA_FORMAT_8_8,BUF_NUM_FORMAT_FLOAT] idxen offen176; VERDE-NEXT:    s_endpgm177;178; PREGFX10-LABEL: buffer_store_ofs:179; PREGFX10:       ; %bb.0: ; %main_body180; PREGFX10-NEXT:    s_mov_b32 s4, 0181; PREGFX10-NEXT:    v_mov_b32_e32 v5, v4182; PREGFX10-NEXT:    v_mov_b32_e32 v4, s4183; PREGFX10-NEXT:    tbuffer_store_format_xyzw v[0:3], v[4:5], s[0:3], 0 format:[BUF_DATA_FORMAT_8_8,BUF_NUM_FORMAT_FLOAT] idxen offen184; PREGFX10-NEXT:    s_endpgm185;186; GFX10-LABEL: buffer_store_ofs:187; GFX10:       ; %bb.0: ; %main_body188; GFX10-NEXT:    s_mov_b32 s4, 0189; GFX10-NEXT:    v_mov_b32_e32 v5, v4190; GFX10-NEXT:    v_mov_b32_e32 v4, s4191; GFX10-NEXT:    tbuffer_store_format_xyzw v[0:3], v[4:5], s[0:3], 0 format:115 idxen offen192; GFX10-NEXT:    s_endpgm193;194; GFX11-LABEL: buffer_store_ofs:195; GFX11:       ; %bb.0: ; %main_body196; GFX11-NEXT:    s_mov_b32 s4, 0197; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)198; GFX11-NEXT:    v_dual_mov_b32 v5, v4 :: v_dual_mov_b32 v4, s4199; GFX11-NEXT:    tbuffer_store_format_xyzw v[0:3], v[4:5], s[0:3], 0 format:115 idxen offen200; GFX11-NEXT:    s_endpgm201;202; GFX12-LABEL: buffer_store_ofs:203; GFX12:       ; %bb.0: ; %main_body204; GFX12-NEXT:    v_dual_mov_b32 v5, v4 :: v_dual_mov_b32 v4, 0205; GFX12-NEXT:    tbuffer_store_format_xyzw v[0:3], v[4:5], s[0:3], null format:115 idxen offen206; GFX12-NEXT:    s_endpgm207main_body:208  %in1 = bitcast <4 x float> %vdata to <4 x i32>209  call void @llvm.amdgcn.struct.tbuffer.store.v4i32(<4 x i32> %in1, <4 x i32> %0, i32 0, i32 %voffset, i32 0, i32 115, i32 0)210  ret void211}212 213define amdgpu_ps void @buffer_store_both(<4 x i32> inreg, <4 x float> %vdata, i32 %vindex, i32 %voffset) {214; VERDE-LABEL: buffer_store_both:215; VERDE:       ; %bb.0: ; %main_body216; VERDE-NEXT:    tbuffer_store_format_xyzw v[0:3], v[4:5], s[0:3], 0 format:[BUF_DATA_FORMAT_10_11_11,BUF_NUM_FORMAT_UINT] idxen offen217; VERDE-NEXT:    s_endpgm218;219; PREGFX10-LABEL: buffer_store_both:220; PREGFX10:       ; %bb.0: ; %main_body221; PREGFX10-NEXT:    tbuffer_store_format_xyzw v[0:3], v[4:5], s[0:3], 0 format:[BUF_DATA_FORMAT_10_11_11,BUF_NUM_FORMAT_UINT] idxen offen222; PREGFX10-NEXT:    s_endpgm223;224; GFX10-LABEL: buffer_store_both:225; GFX10:       ; %bb.0: ; %main_body226; GFX10-NEXT:    tbuffer_store_format_xyzw v[0:3], v[4:5], s[0:3], 0 format:[BUF_FMT_16_16_16_16_SINT] idxen offen227; GFX10-NEXT:    s_endpgm228;229; GFX11-LABEL: buffer_store_both:230; GFX11:       ; %bb.0: ; %main_body231; GFX11-NEXT:    tbuffer_store_format_xyzw v[0:3], v[4:5], s[0:3], 0 format:70 idxen offen232; GFX11-NEXT:    s_endpgm233;234; GFX12-LABEL: buffer_store_both:235; GFX12:       ; %bb.0: ; %main_body236; GFX12-NEXT:    tbuffer_store_format_xyzw v[0:3], v[4:5], s[0:3], null format:70 idxen offen237; GFX12-NEXT:    s_endpgm238main_body:239  %in1 = bitcast <4 x float> %vdata to <4 x i32>240  call void @llvm.amdgcn.struct.tbuffer.store.v4i32(<4 x i32> %in1, <4 x i32> %0, i32 %vindex, i32 %voffset, i32 0, i32 70, i32 0)241  ret void242}243 244define amdgpu_ps void @buffer_store_wait(<4 x i32> inreg, <4 x float> %vdata, i32 %vindex.1, i32 %vindex.2, i32 %vindex.3) {245; VERDE-LABEL: buffer_store_wait:246; VERDE:       ; %bb.0: ; %main_body247; VERDE-NEXT:    tbuffer_store_format_xyzw v[0:3], v4, s[0:3], 0 format:[BUF_DATA_FORMAT_RESERVED_15,BUF_NUM_FORMAT_SSCALED] idxen248; VERDE-NEXT:    s_waitcnt expcnt(0)249; VERDE-NEXT:    buffer_load_format_xyzw v[0:3], v5, s[0:3], 0 idxen250; VERDE-NEXT:    s_waitcnt vmcnt(0)251; VERDE-NEXT:    tbuffer_store_format_xyzw v[0:3], v6, s[0:3], 0 format:[BUF_DATA_FORMAT_32_32_32_32,BUF_NUM_FORMAT_USCALED] idxen252; VERDE-NEXT:    s_endpgm253;254; PREGFX10-LABEL: buffer_store_wait:255; PREGFX10:       ; %bb.0: ; %main_body256; PREGFX10-NEXT:    tbuffer_store_format_xyzw v[0:3], v4, s[0:3], 0 format:[BUF_DATA_FORMAT_RESERVED_15,BUF_NUM_FORMAT_SSCALED] idxen257; PREGFX10-NEXT:    buffer_load_format_xyzw v[0:3], v5, s[0:3], 0 idxen258; PREGFX10-NEXT:    s_waitcnt vmcnt(0)259; PREGFX10-NEXT:    tbuffer_store_format_xyzw v[0:3], v6, s[0:3], 0 format:[BUF_DATA_FORMAT_32_32_32_32,BUF_NUM_FORMAT_USCALED] idxen260; PREGFX10-NEXT:    s_endpgm261;262; GFX10-LABEL: buffer_store_wait:263; GFX10:       ; %bb.0: ; %main_body264; GFX10-NEXT:    tbuffer_store_format_xyzw v[0:3], v4, s[0:3], 0 format:[BUF_FMT_32_32_SINT] idxen265; GFX10-NEXT:    buffer_load_format_xyzw v[0:3], v5, s[0:3], 0 idxen266; GFX10-NEXT:    s_waitcnt vmcnt(0)267; GFX10-NEXT:    tbuffer_store_format_xyzw v[0:3], v6, s[0:3], 0 format:[BUF_FMT_10_10_10_2_USCALED] idxen268; GFX10-NEXT:    s_endpgm269;270; GFX11-LABEL: buffer_store_wait:271; GFX11:       ; %bb.0: ; %main_body272; GFX11-NEXT:    tbuffer_store_format_xyzw v[0:3], v4, s[0:3], 0 format:[BUF_FMT_32_32_32_32_FLOAT] idxen273; GFX11-NEXT:    buffer_load_format_xyzw v[0:3], v5, s[0:3], 0 idxen274; GFX11-NEXT:    s_waitcnt vmcnt(0)275; GFX11-NEXT:    tbuffer_store_format_xyzw v[0:3], v6, s[0:3], 0 format:[BUF_FMT_8_8_8_8_UINT] idxen276; GFX11-NEXT:    s_endpgm277;278; GFX12-LABEL: buffer_store_wait:279; GFX12:       ; %bb.0: ; %main_body280; GFX12-NEXT:    tbuffer_store_format_xyzw v[0:3], v4, s[0:3], null format:[BUF_FMT_32_32_32_32_FLOAT] idxen281; GFX12-NEXT:    buffer_load_format_xyzw v[0:3], v5, s[0:3], null idxen282; GFX12-NEXT:    s_wait_loadcnt 0x0283; GFX12-NEXT:    tbuffer_store_format_xyzw v[0:3], v6, s[0:3], null format:[BUF_FMT_8_8_8_8_UINT] idxen284; GFX12-NEXT:    s_endpgm285main_body:286  %in1 = bitcast <4 x float> %vdata to <4 x i32>287  call void @llvm.amdgcn.struct.tbuffer.store.v4i32(<4 x i32> %in1, <4 x i32> %0, i32 %vindex.1, i32 0, i32 0, i32 63, i32 0)288  %data = call <4 x float> @llvm.amdgcn.struct.buffer.load.format.v4f32(<4 x i32> %0, i32 %vindex.2, i32 0, i32 0, i32 0)289  %data.i = bitcast <4 x float> %data to <4 x i32>290  call void @llvm.amdgcn.struct.tbuffer.store.v4i32(<4 x i32> %data.i, <4 x i32> %0, i32 %vindex.3, i32 0, i32 0, i32 46, i32 0)291  ret void292}293 294define amdgpu_ps void @buffer_store_x1(<4 x i32> inreg %rsrc, float %data, i32 %vindex) {295; VERDE-LABEL: buffer_store_x1:296; VERDE:       ; %bb.0: ; %main_body297; VERDE-NEXT:    tbuffer_store_format_x v0, v1, s[0:3], 0 format:[BUF_DATA_FORMAT_32_32_32,BUF_NUM_FORMAT_FLOAT] idxen298; VERDE-NEXT:    s_endpgm299;300; PREGFX10-LABEL: buffer_store_x1:301; PREGFX10:       ; %bb.0: ; %main_body302; PREGFX10-NEXT:    tbuffer_store_format_x v0, v1, s[0:3], 0 format:[BUF_DATA_FORMAT_32_32_32,BUF_NUM_FORMAT_FLOAT] idxen303; PREGFX10-NEXT:    s_endpgm304;305; GFX10-LABEL: buffer_store_x1:306; GFX10:       ; %bb.0: ; %main_body307; GFX10-NEXT:    tbuffer_store_format_x v0, v1, s[0:3], 0 format:125 idxen308; GFX10-NEXT:    s_endpgm309;310; GFX11-LABEL: buffer_store_x1:311; GFX11:       ; %bb.0: ; %main_body312; GFX11-NEXT:    tbuffer_store_format_x v0, v1, s[0:3], 0 format:125 idxen313; GFX11-NEXT:    s_endpgm314;315; GFX12-LABEL: buffer_store_x1:316; GFX12:       ; %bb.0: ; %main_body317; GFX12-NEXT:    tbuffer_store_format_x v0, v1, s[0:3], null format:125 idxen318; GFX12-NEXT:    s_endpgm319main_body:320  %data.i = bitcast float %data to i32321  call void @llvm.amdgcn.struct.tbuffer.store.i32(i32 %data.i, <4 x i32> %rsrc, i32 %vindex, i32 0, i32 0, i32 125, i32 0)322  ret void323}324 325define amdgpu_ps void @buffer_store_x2(<4 x i32> inreg %rsrc, <2 x float> %data, i32 %vindex) {326; VERDE-LABEL: buffer_store_x2:327; VERDE:       ; %bb.0: ; %main_body328; VERDE-NEXT:    tbuffer_store_format_xy v[0:1], v2, s[0:3], 0 format:[BUF_NUM_FORMAT_USCALED] idxen329; VERDE-NEXT:    s_endpgm330;331; PREGFX10-LABEL: buffer_store_x2:332; PREGFX10:       ; %bb.0: ; %main_body333; PREGFX10-NEXT:    tbuffer_store_format_xy v[0:1], v2, s[0:3], 0 format:[BUF_NUM_FORMAT_USCALED] idxen334; PREGFX10-NEXT:    s_endpgm335;336; GFX10-LABEL: buffer_store_x2:337; GFX10:       ; %bb.0: ; %main_body338; GFX10-NEXT:    tbuffer_store_format_xy v[0:1], v2, s[0:3], 0 format:[BUF_FMT_10_11_11_SSCALED] idxen339; GFX10-NEXT:    s_endpgm340;341; GFX11-LABEL: buffer_store_x2:342; GFX11:       ; %bb.0: ; %main_body343; GFX11-NEXT:    tbuffer_store_format_xy v[0:1], v2, s[0:3], 0 format:[BUF_FMT_10_10_10_2_SNORM] idxen344; GFX11-NEXT:    s_endpgm345;346; GFX12-LABEL: buffer_store_x2:347; GFX12:       ; %bb.0: ; %main_body348; GFX12-NEXT:    tbuffer_store_format_xy v[0:1], v2, s[0:3], null format:[BUF_FMT_10_10_10_2_SNORM] idxen349; GFX12-NEXT:    s_endpgm350main_body:351  %data.i = bitcast <2 x float> %data to <2 x i32>352  call void @llvm.amdgcn.struct.tbuffer.store.v2i32(<2 x i32> %data.i, <4 x i32> %rsrc, i32 %vindex, i32 0, i32 0, i32 33, i32 0)353  ret void354}355 356define amdgpu_ps void @buffer_store_voffset_large_12bit(<4 x i32> inreg %rsrc, <4 x float> %data) {357; VERDE-LABEL: buffer_store_voffset_large_12bit:358; VERDE:       ; %bb.0: ; %main_body359; VERDE-NEXT:    v_mov_b32_e32 v4, 0360; VERDE-NEXT:    tbuffer_store_format_xyzw v[0:3], v4, s[0:3], 0 format:[BUF_DATA_FORMAT_RESERVED_15,BUF_NUM_FORMAT_SSCALED] idxen offset:4092361; VERDE-NEXT:    s_endpgm362;363; PREGFX10-LABEL: buffer_store_voffset_large_12bit:364; PREGFX10:       ; %bb.0: ; %main_body365; PREGFX10-NEXT:    v_mov_b32_e32 v4, 0366; PREGFX10-NEXT:    tbuffer_store_format_xyzw v[0:3], v4, s[0:3], 0 format:[BUF_DATA_FORMAT_RESERVED_15,BUF_NUM_FORMAT_SSCALED] idxen offset:4092367; PREGFX10-NEXT:    s_endpgm368;369; GFX10-LABEL: buffer_store_voffset_large_12bit:370; GFX10:       ; %bb.0: ; %main_body371; GFX10-NEXT:    v_mov_b32_e32 v4, 0372; GFX10-NEXT:    tbuffer_store_format_xyzw v[0:3], v4, s[0:3], 0 format:[BUF_FMT_32_32_SINT] idxen offset:4092373; GFX10-NEXT:    s_endpgm374;375; GFX11-LABEL: buffer_store_voffset_large_12bit:376; GFX11:       ; %bb.0: ; %main_body377; GFX11-NEXT:    v_mov_b32_e32 v4, 0378; GFX11-NEXT:    tbuffer_store_format_xyzw v[0:3], v4, s[0:3], 0 format:[BUF_FMT_32_32_32_32_FLOAT] idxen offset:4092379; GFX11-NEXT:    s_endpgm380;381; GFX12-LABEL: buffer_store_voffset_large_12bit:382; GFX12:       ; %bb.0: ; %main_body383; GFX12-NEXT:    v_mov_b32_e32 v4, 0384; GFX12-NEXT:    tbuffer_store_format_xyzw v[0:3], v4, s[0:3], null format:[BUF_FMT_32_32_32_32_FLOAT] idxen offset:4092385; GFX12-NEXT:    s_endpgm386main_body:387  call void @llvm.amdgcn.struct.tbuffer.store.v4f32(<4 x float> %data, <4 x i32> %rsrc, i32 0, i32 4092, i32 0, i32 63, i32 0)388  ret void389}390 391define amdgpu_ps void @buffer_store_voffset_large_13bit(<4 x i32> inreg %rsrc, <4 x float> %data) {392; VERDE-LABEL: buffer_store_voffset_large_13bit:393; VERDE:       ; %bb.0: ; %main_body394; VERDE-NEXT:    s_mov_b32 s4, 0395; VERDE-NEXT:    v_mov_b32_e32 v5, 0x1000396; VERDE-NEXT:    v_mov_b32_e32 v4, s4397; VERDE-NEXT:    tbuffer_store_format_xyzw v[0:3], v[4:5], s[0:3], 0 format:[BUF_DATA_FORMAT_RESERVED_15,BUF_NUM_FORMAT_SSCALED] idxen offen offset:4092398; VERDE-NEXT:    s_endpgm399;400; PREGFX10-LABEL: buffer_store_voffset_large_13bit:401; PREGFX10:       ; %bb.0: ; %main_body402; PREGFX10-NEXT:    s_mov_b32 s4, 0403; PREGFX10-NEXT:    v_mov_b32_e32 v5, 0x1000404; PREGFX10-NEXT:    v_mov_b32_e32 v4, s4405; PREGFX10-NEXT:    tbuffer_store_format_xyzw v[0:3], v[4:5], s[0:3], 0 format:[BUF_DATA_FORMAT_RESERVED_15,BUF_NUM_FORMAT_SSCALED] idxen offen offset:4092406; PREGFX10-NEXT:    s_endpgm407;408; GFX10-LABEL: buffer_store_voffset_large_13bit:409; GFX10:       ; %bb.0: ; %main_body410; GFX10-NEXT:    s_mov_b32 s4, 0411; GFX10-NEXT:    v_mov_b32_e32 v5, 0x1000412; GFX10-NEXT:    v_mov_b32_e32 v4, s4413; GFX10-NEXT:    tbuffer_store_format_xyzw v[0:3], v[4:5], s[0:3], 0 format:[BUF_FMT_32_32_SINT] idxen offen offset:4092414; GFX10-NEXT:    s_endpgm415;416; GFX11-LABEL: buffer_store_voffset_large_13bit:417; GFX11:       ; %bb.0: ; %main_body418; GFX11-NEXT:    s_mov_b32 s4, 0419; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)420; GFX11-NEXT:    v_dual_mov_b32 v5, 0x1000 :: v_dual_mov_b32 v4, s4421; GFX11-NEXT:    tbuffer_store_format_xyzw v[0:3], v[4:5], s[0:3], 0 format:[BUF_FMT_32_32_32_32_FLOAT] idxen offen offset:4092422; GFX11-NEXT:    s_endpgm423;424; GFX12-LABEL: buffer_store_voffset_large_13bit:425; GFX12:       ; %bb.0: ; %main_body426; GFX12-NEXT:    v_mov_b32_e32 v4, 0427; GFX12-NEXT:    tbuffer_store_format_xyzw v[0:3], v4, s[0:3], null format:[BUF_FMT_32_32_32_32_FLOAT] idxen offset:8188428; GFX12-NEXT:    s_endpgm429main_body:430  call void @llvm.amdgcn.struct.tbuffer.store.v4f32(<4 x float> %data, <4 x i32> %rsrc, i32 0, i32 8188, i32 0, i32 63, i32 0)431  ret void432}433 434define amdgpu_ps void @buffer_store_voffset_large_16bit(<4 x i32> inreg %rsrc, <4 x float> %data) {435; VERDE-LABEL: buffer_store_voffset_large_16bit:436; VERDE:       ; %bb.0: ; %main_body437; VERDE-NEXT:    s_mov_b32 s4, 0438; VERDE-NEXT:    v_mov_b32_e32 v5, 0xf000439; VERDE-NEXT:    v_mov_b32_e32 v4, s4440; VERDE-NEXT:    tbuffer_store_format_xyzw v[0:3], v[4:5], s[0:3], 0 format:[BUF_DATA_FORMAT_RESERVED_15,BUF_NUM_FORMAT_SSCALED] idxen offen offset:4092441; VERDE-NEXT:    s_endpgm442;443; PREGFX10-LABEL: buffer_store_voffset_large_16bit:444; PREGFX10:       ; %bb.0: ; %main_body445; PREGFX10-NEXT:    s_mov_b32 s4, 0446; PREGFX10-NEXT:    v_mov_b32_e32 v5, 0xf000447; PREGFX10-NEXT:    v_mov_b32_e32 v4, s4448; PREGFX10-NEXT:    tbuffer_store_format_xyzw v[0:3], v[4:5], s[0:3], 0 format:[BUF_DATA_FORMAT_RESERVED_15,BUF_NUM_FORMAT_SSCALED] idxen offen offset:4092449; PREGFX10-NEXT:    s_endpgm450;451; GFX10-LABEL: buffer_store_voffset_large_16bit:452; GFX10:       ; %bb.0: ; %main_body453; GFX10-NEXT:    s_mov_b32 s4, 0454; GFX10-NEXT:    v_mov_b32_e32 v5, 0xf000455; GFX10-NEXT:    v_mov_b32_e32 v4, s4456; GFX10-NEXT:    tbuffer_store_format_xyzw v[0:3], v[4:5], s[0:3], 0 format:[BUF_FMT_32_32_SINT] idxen offen offset:4092457; GFX10-NEXT:    s_endpgm458;459; GFX11-LABEL: buffer_store_voffset_large_16bit:460; GFX11:       ; %bb.0: ; %main_body461; GFX11-NEXT:    s_mov_b32 s4, 0462; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)463; GFX11-NEXT:    v_dual_mov_b32 v5, 0xf000 :: v_dual_mov_b32 v4, s4464; GFX11-NEXT:    tbuffer_store_format_xyzw v[0:3], v[4:5], s[0:3], 0 format:[BUF_FMT_32_32_32_32_FLOAT] idxen offen offset:4092465; GFX11-NEXT:    s_endpgm466;467; GFX12-LABEL: buffer_store_voffset_large_16bit:468; GFX12:       ; %bb.0: ; %main_body469; GFX12-NEXT:    v_mov_b32_e32 v4, 0470; GFX12-NEXT:    tbuffer_store_format_xyzw v[0:3], v4, s[0:3], null format:[BUF_FMT_32_32_32_32_FLOAT] idxen offset:65532471; GFX12-NEXT:    s_endpgm472main_body:473  call void @llvm.amdgcn.struct.tbuffer.store.v4f32(<4 x float> %data, <4 x i32> %rsrc, i32 0, i32 65532, i32 0, i32 63, i32 0)474  ret void475}476 477define amdgpu_ps void @buffer_store_voffset_large_23bit(<4 x i32> inreg %rsrc, <4 x float> %data) {478; VERDE-LABEL: buffer_store_voffset_large_23bit:479; VERDE:       ; %bb.0: ; %main_body480; VERDE-NEXT:    s_mov_b32 s4, 0481; VERDE-NEXT:    v_mov_b32_e32 v5, 0x7ff000482; VERDE-NEXT:    v_mov_b32_e32 v4, s4483; VERDE-NEXT:    tbuffer_store_format_xyzw v[0:3], v[4:5], s[0:3], 0 format:[BUF_DATA_FORMAT_RESERVED_15,BUF_NUM_FORMAT_SSCALED] idxen offen offset:4092484; VERDE-NEXT:    s_endpgm485;486; PREGFX10-LABEL: buffer_store_voffset_large_23bit:487; PREGFX10:       ; %bb.0: ; %main_body488; PREGFX10-NEXT:    s_mov_b32 s4, 0489; PREGFX10-NEXT:    v_mov_b32_e32 v5, 0x7ff000490; PREGFX10-NEXT:    v_mov_b32_e32 v4, s4491; PREGFX10-NEXT:    tbuffer_store_format_xyzw v[0:3], v[4:5], s[0:3], 0 format:[BUF_DATA_FORMAT_RESERVED_15,BUF_NUM_FORMAT_SSCALED] idxen offen offset:4092492; PREGFX10-NEXT:    s_endpgm493;494; GFX10-LABEL: buffer_store_voffset_large_23bit:495; GFX10:       ; %bb.0: ; %main_body496; GFX10-NEXT:    s_mov_b32 s4, 0497; GFX10-NEXT:    v_mov_b32_e32 v5, 0x7ff000498; GFX10-NEXT:    v_mov_b32_e32 v4, s4499; GFX10-NEXT:    tbuffer_store_format_xyzw v[0:3], v[4:5], s[0:3], 0 format:[BUF_FMT_32_32_SINT] idxen offen offset:4092500; GFX10-NEXT:    s_endpgm501;502; GFX11-LABEL: buffer_store_voffset_large_23bit:503; GFX11:       ; %bb.0: ; %main_body504; GFX11-NEXT:    s_mov_b32 s4, 0505; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)506; GFX11-NEXT:    v_dual_mov_b32 v5, 0x7ff000 :: v_dual_mov_b32 v4, s4507; GFX11-NEXT:    tbuffer_store_format_xyzw v[0:3], v[4:5], s[0:3], 0 format:[BUF_FMT_32_32_32_32_FLOAT] idxen offen offset:4092508; GFX11-NEXT:    s_endpgm509;510; GFX12-LABEL: buffer_store_voffset_large_23bit:511; GFX12:       ; %bb.0: ; %main_body512; GFX12-NEXT:    v_mov_b32_e32 v4, 0513; GFX12-NEXT:    tbuffer_store_format_xyzw v[0:3], v4, s[0:3], null format:[BUF_FMT_32_32_32_32_FLOAT] idxen offset:8388604514; GFX12-NEXT:    s_endpgm515main_body:516  call void @llvm.amdgcn.struct.tbuffer.store.v4f32(<4 x float> %data, <4 x i32> %rsrc, i32 0, i32 8388604, i32 0, i32 63, i32 0)517  ret void518}519 520define amdgpu_ps void @buffer_store_voffset_large_24bit(<4 x i32> inreg %rsrc, <4 x float> %data) {521; VERDE-LABEL: buffer_store_voffset_large_24bit:522; VERDE:       ; %bb.0: ; %main_body523; VERDE-NEXT:    s_mov_b32 s4, 0524; VERDE-NEXT:    v_mov_b32_e32 v5, 0xfff000525; VERDE-NEXT:    v_mov_b32_e32 v4, s4526; VERDE-NEXT:    tbuffer_store_format_xyzw v[0:3], v[4:5], s[0:3], 0 format:[BUF_DATA_FORMAT_RESERVED_15,BUF_NUM_FORMAT_SSCALED] idxen offen offset:4092527; VERDE-NEXT:    s_endpgm528;529; PREGFX10-LABEL: buffer_store_voffset_large_24bit:530; PREGFX10:       ; %bb.0: ; %main_body531; PREGFX10-NEXT:    s_mov_b32 s4, 0532; PREGFX10-NEXT:    v_mov_b32_e32 v5, 0xfff000533; PREGFX10-NEXT:    v_mov_b32_e32 v4, s4534; PREGFX10-NEXT:    tbuffer_store_format_xyzw v[0:3], v[4:5], s[0:3], 0 format:[BUF_DATA_FORMAT_RESERVED_15,BUF_NUM_FORMAT_SSCALED] idxen offen offset:4092535; PREGFX10-NEXT:    s_endpgm536;537; GFX10-LABEL: buffer_store_voffset_large_24bit:538; GFX10:       ; %bb.0: ; %main_body539; GFX10-NEXT:    s_mov_b32 s4, 0540; GFX10-NEXT:    v_mov_b32_e32 v5, 0xfff000541; GFX10-NEXT:    v_mov_b32_e32 v4, s4542; GFX10-NEXT:    tbuffer_store_format_xyzw v[0:3], v[4:5], s[0:3], 0 format:[BUF_FMT_32_32_SINT] idxen offen offset:4092543; GFX10-NEXT:    s_endpgm544;545; GFX11-LABEL: buffer_store_voffset_large_24bit:546; GFX11:       ; %bb.0: ; %main_body547; GFX11-NEXT:    s_mov_b32 s4, 0548; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)549; GFX11-NEXT:    v_dual_mov_b32 v5, 0xfff000 :: v_dual_mov_b32 v4, s4550; GFX11-NEXT:    tbuffer_store_format_xyzw v[0:3], v[4:5], s[0:3], 0 format:[BUF_FMT_32_32_32_32_FLOAT] idxen offen offset:4092551; GFX11-NEXT:    s_endpgm552;553; GFX12-LABEL: buffer_store_voffset_large_24bit:554; GFX12:       ; %bb.0: ; %main_body555; GFX12-NEXT:    v_dual_mov_b32 v5, 0x800000 :: v_dual_mov_b32 v4, 0556; GFX12-NEXT:    tbuffer_store_format_xyzw v[0:3], v[4:5], s[0:3], null format:[BUF_FMT_32_32_32_32_FLOAT] idxen offen offset:8388604557; GFX12-NEXT:    s_endpgm558main_body:559  call void @llvm.amdgcn.struct.tbuffer.store.v4f32(<4 x float> %data, <4 x i32> %rsrc, i32 0, i32 16777212, i32 0, i32 63, i32 0)560  ret void561}562 563declare void @llvm.amdgcn.struct.tbuffer.store.i32(i32, <4 x i32>, i32, i32, i32, i32, i32) #0564declare void @llvm.amdgcn.struct.tbuffer.store.v2i32(<2 x i32>, <4 x i32>, i32, i32, i32, i32, i32) #0565declare void @llvm.amdgcn.struct.tbuffer.store.v4i32(<4 x i32>, <4 x i32>, i32, i32, i32, i32, i32) #0566declare void @llvm.amdgcn.struct.tbuffer.store.v4f32(<4 x float>, <4 x i32>, i32, i32, i32, i32, i32) #0567declare <4 x float> @llvm.amdgcn.struct.buffer.load.format.v4f32(<4 x i32>, i32, i32, i32, i32) #1568 569attributes #0 = { nounwind }570attributes #1 = { nounwind readonly }571 572 573