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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: not --crash llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 -global-isel=0 < %s 2>&1 | FileCheck -check-prefix=GFX9-SDAG-ERR %s3; RUN: not llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 -global-isel=1 -new-reg-bank-select < %s 2>&1 | FileCheck -check-prefix=GFX9-GISEL-ERR %s4; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 -mattr=+architected-sgprs -global-isel=0 < %s | FileCheck -check-prefix=GFX9 %s5; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 -mattr=+architected-sgprs -global-isel=1 -new-reg-bank-select < %s | FileCheck -check-prefix=GFX9 %s6; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx1200 -global-isel=0 < %s | FileCheck -check-prefix=GFX1200 %s7; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx1200 -global-isel=1 -new-reg-bank-select < %s | FileCheck -check-prefix=GFX1200 %s8; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx1250 -global-isel=0 < %s | FileCheck -check-prefix=GFX1250 %s9; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx1250 -global-isel=1 -new-reg-bank-select < %s | FileCheck -check-prefix=GFX1250 %s10 11; GFX9-SDAG-ERR: LLVM ERROR: Cannot select: intrinsic %llvm.amdgcn.wave.id12; GFX9-GISEL-ERR: LLVM ERROR: unable to legalize instruction: {{.*}} = G_INTRINSIC intrinsic(@llvm.amdgcn.wave.id)13 14define amdgpu_cs void @test_wave_id(ptr addrspace(1) %out) {15; GFX9-LABEL: test_wave_id:16; GFX9:       ; %bb.0:17; GFX9-NEXT:    s_bfe_u32 s0, ttmp8, 0x5001918; GFX9-NEXT:    v_mov_b32_e32 v2, s019; GFX9-NEXT:    global_store_dword v[0:1], v2, off20; GFX9-NEXT:    s_endpgm21;22; GFX1200-LABEL: test_wave_id:23; GFX1200:       ; %bb.0:24; GFX1200-NEXT:    s_bfe_u32 s0, ttmp8, 0x5001925; GFX1200-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)26; GFX1200-NEXT:    v_mov_b32_e32 v2, s027; GFX1200-NEXT:    global_store_b32 v[0:1], v2, off28; GFX1200-NEXT:    s_endpgm29;30; GFX1250-LABEL: test_wave_id:31; GFX1250:       ; %bb.0:32; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 133; GFX1250-NEXT:    s_bfe_u32 s0, ttmp8, 0x5001934; GFX1250-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)35; GFX1250-NEXT:    v_mov_b32_e32 v2, s036; GFX1250-NEXT:    global_store_b32 v[0:1], v2, off37; GFX1250-NEXT:    s_endpgm38  %waveid = call i32 @llvm.amdgcn.wave.id()39  store i32 %waveid, ptr addrspace(1) %out40  ret void41}42 43define amdgpu_gfx void @test_wave_id_callable(ptr addrspace(1) %out) {44; GFX9-LABEL: test_wave_id_callable:45; GFX9:       ; %bb.0:46; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)47; GFX9-NEXT:    s_bfe_u32 s34, ttmp8, 0x5001948; GFX9-NEXT:    v_mov_b32_e32 v2, s3449; GFX9-NEXT:    global_store_dword v[0:1], v2, off50; GFX9-NEXT:    s_waitcnt vmcnt(0)51; GFX9-NEXT:    s_setpc_b64 s[30:31]52;53; GFX1200-LABEL: test_wave_id_callable:54; GFX1200:       ; %bb.0:55; GFX1200-NEXT:    s_wait_loadcnt_dscnt 0x056; GFX1200-NEXT:    s_wait_expcnt 0x057; GFX1200-NEXT:    s_wait_samplecnt 0x058; GFX1200-NEXT:    s_wait_bvhcnt 0x059; GFX1200-NEXT:    s_wait_kmcnt 0x060; GFX1200-NEXT:    s_bfe_u32 s0, ttmp8, 0x5001961; GFX1200-NEXT:    s_wait_alu depctr_sa_sdst(0)62; GFX1200-NEXT:    v_mov_b32_e32 v2, s063; GFX1200-NEXT:    global_store_b32 v[0:1], v2, off64; GFX1200-NEXT:    s_setpc_b64 s[30:31]65;66; GFX1250-LABEL: test_wave_id_callable:67; GFX1250:       ; %bb.0:68; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x069; GFX1250-NEXT:    s_wait_kmcnt 0x070; GFX1250-NEXT:    s_bfe_u32 s0, ttmp8, 0x5001971; GFX1250-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)72; GFX1250-NEXT:    v_mov_b32_e32 v2, s073; GFX1250-NEXT:    global_store_b32 v[0:1], v2, off74; GFX1250-NEXT:    s_set_pc_i64 s[30:31]75; GFX12-LABEL: test_wave_id_callable:76; GFX12:       ; %bb.0:77; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x078; GFX12-NEXT:    s_wait_expcnt 0x079; GFX12-NEXT:    s_wait_samplecnt 0x080; GFX12-NEXT:    s_wait_bvhcnt 0x081; GFX12-NEXT:    s_wait_kmcnt 0x082; GFX12-NEXT:    s_bfe_u32 s0, ttmp8, 0x5001983; GFX12-NEXT:    s_wait_alu 0xfffe84; GFX12-NEXT:    v_mov_b32_e32 v2, s085; GFX12-NEXT:    global_store_b32 v[0:1], v2, off86; GFX12-NEXT:    s_setpc_b64 s[30:31]87  %waveid = call i32 @llvm.amdgcn.wave.id()88  store i32 %waveid, ptr addrspace(1) %out89  ret void90}91 92declare i32 @llvm.amdgcn.wave.id()93