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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32 < %s | FileCheck %s --check-prefix=W323 4declare <8 x float> @llvm.amdgcn.wmma.f32.16x16x16.f16(<16 x half>, <16 x half> , <8 x float>)5declare <8 x float> @llvm.amdgcn.wmma.f32.16x16x16.bf16(<16 x i16>, <16 x i16> , <8 x float>)6declare <16 x half> @llvm.amdgcn.wmma.f16.16x16x16.f16(<16 x half>, <16 x half> , <16 x half>, i1 immarg)7declare <16 x half> @llvm.amdgcn.wmma.f16.16x16x16.f16.tied(<16 x half>, <16 x half> , <16 x half>, i1 immarg)8declare <16 x i16> @llvm.amdgcn.wmma.bf16.16x16x16.bf16(<16 x i16>, <16 x i16> , <16 x i16>, i1 immarg)9declare <16 x i16> @llvm.amdgcn.wmma.bf16.16x16x16.bf16.tied(<16 x i16>, <16 x i16> , <16 x i16>, i1 immarg)10declare <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8(i1 immarg, <4 x i32>, i1 immarg, <4 x i32> , <8 x i32>, i1 immarg)11declare <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4(i1 immarg, <2 x i32>, i1 immarg, <2 x i32> , <8 x i32>, i1 immarg)12 13; @llvm.amdgcn.wmma.f32.16x16x16.f1614 15define amdgpu_ps void @test_wmma_f32_16x16x16_f16(<16 x half> %A, <16 x half> %B, <8 x float> %C, ptr addrspace(1) %out) {16; W32-LABEL: test_wmma_f32_16x16x16_f16:17; W32: ; %bb.0: ; %bb18; W32-NEXT: v_wmma_f32_16x16x16_f16 v[16:23], v[0:7], v[8:15], v[16:23]19; W32-NEXT: s_clause 0x120; W32-NEXT: global_store_b128 v[24:25], v[20:23], off offset:1621; W32-NEXT: global_store_b128 v[24:25], v[16:19], off22; W32-NEXT: s_endpgm23bb:24 %res = call <8 x float> @llvm.amdgcn.wmma.f32.16x16x16.f16(<16 x half> %A, <16 x half> %B, <8 x float> %C)25 store <8 x float> %res, ptr addrspace(1) %out, align 3226 ret void27}28 29; @llvm.amdgcn.wmma.f32.16x16x16.bf1630 31define amdgpu_ps void @test_wmma_f32_16x16x16_bf16(<16 x i16> %A, <16 x i16> %B, <8 x float> %C, ptr addrspace(1) %out) {32; W32-LABEL: test_wmma_f32_16x16x16_bf16:33; W32: ; %bb.0: ; %bb34; W32-NEXT: v_wmma_f32_16x16x16_bf16 v[16:23], v[0:7], v[8:15], v[16:23]35; W32-NEXT: s_clause 0x136; W32-NEXT: global_store_b128 v[24:25], v[20:23], off offset:1637; W32-NEXT: global_store_b128 v[24:25], v[16:19], off38; W32-NEXT: s_endpgm39bb:40 %res = call <8 x float> @llvm.amdgcn.wmma.f32.16x16x16.bf16(<16 x i16> %A, <16 x i16> %B, <8 x float> %C)41 store <8 x float> %res, ptr addrspace(1) %out, align 3242 ret void43}44 45; @llvm.amdgcn.wmma.f16.16x16x16.f1646 47define amdgpu_ps void @test_wmma_f16_16x16x16_f16_lo(<16 x half> %A, <16 x half> %B, <16 x half> %C, ptr addrspace(1) %out) {48; W32-LABEL: test_wmma_f16_16x16x16_f16_lo:49; W32: ; %bb.0: ; %bb50; W32-NEXT: v_wmma_f16_16x16x16_f16 v[16:23], v[0:7], v[8:15], v[16:23]51; W32-NEXT: s_clause 0x152; W32-NEXT: global_store_b128 v[24:25], v[20:23], off offset:1653; W32-NEXT: global_store_b128 v[24:25], v[16:19], off54; W32-NEXT: s_endpgm55bb:56 %res = call <16 x half> @llvm.amdgcn.wmma.f16.16x16x16.f16(<16 x half> %A, <16 x half> %B, <16 x half> %C, i1 0)57 store <16 x half> %res, ptr addrspace(1) %out, align 3258 ret void59}60 61define amdgpu_ps void @test_wmma_f16_16x16x16_f16_hi(<16 x half> %A, <16 x half> %B, <16 x half> %C, ptr addrspace(1) %out) {62; W32-LABEL: test_wmma_f16_16x16x16_f16_hi:63; W32: ; %bb.0: ; %bb64; W32-NEXT: v_wmma_f16_16x16x16_f16 v[16:23], v[0:7], v[8:15], v[16:23] op_sel:[0,0,1]65; W32-NEXT: s_clause 0x166; W32-NEXT: global_store_b128 v[24:25], v[20:23], off offset:1667; W32-NEXT: global_store_b128 v[24:25], v[16:19], off68; W32-NEXT: s_endpgm69bb:70 %res = call <16 x half> @llvm.amdgcn.wmma.f16.16x16x16.f16(<16 x half> %A, <16 x half> %B, <16 x half> %C, i1 1)71 store <16 x half> %res, ptr addrspace(1) %out, align 3272 ret void73}74 75define amdgpu_ps void @test_wmma_f16_16x16x16_f16_untied(<16 x half> %A.0, <16 x half> %B.0, <16 x half> %A.1, <16 x half> %B.1, <16 x half> %C, ptr addrspace(1) %out.0, ptr addrspace(1) %out.1) {76; W32-LABEL: test_wmma_f16_16x16x16_f16_untied:77; W32: ; %bb.0: ; %bb78; W32-NEXT: v_wmma_f16_16x16x16_f16 v[44:51], v[0:7], v[8:15], v[32:39]79; W32-NEXT: v_wmma_f16_16x16x16_f16 v[32:39], v[16:23], v[24:31], v[32:39]80; W32-NEXT: s_clause 0x181; W32-NEXT: global_store_b128 v[40:41], v[48:51], off offset:1682; W32-NEXT: global_store_b128 v[40:41], v[44:47], off83; W32-NEXT: s_clause 0x184; W32-NEXT: global_store_b128 v[42:43], v[36:39], off offset:1685; W32-NEXT: global_store_b128 v[42:43], v[32:35], off86; W32-NEXT: s_endpgm87bb:88 %res.0 = call <16 x half> @llvm.amdgcn.wmma.f16.16x16x16.f16(<16 x half> %A.0, <16 x half> %B.0, <16 x half> %C, i1 0)89 %res.1 = call <16 x half> @llvm.amdgcn.wmma.f16.16x16x16.f16(<16 x half> %A.1, <16 x half> %B.1, <16 x half> %C, i1 0)90 store <16 x half> %res.0, ptr addrspace(1) %out.0, align 3291 store <16 x half> %res.1, ptr addrspace(1) %out.1, align 3292 ret void93}94 95define amdgpu_ps void @test_wmma_f16_16x16x16_f16_tied(<16 x half> %A.0, <16 x half> %B.0, <16 x half> %A.1, <16 x half> %B.1, <16 x half> %C, ptr addrspace(1) %out.0, ptr addrspace(1) %out.1) {96; W32-LABEL: test_wmma_f16_16x16x16_f16_tied:97; W32: ; %bb.0: ; %bb98; W32-NEXT: v_dual_mov_b32 v51, v39 :: v_dual_mov_b32 v50, v3899; W32-NEXT: v_dual_mov_b32 v49, v37 :: v_dual_mov_b32 v48, v36100; W32-NEXT: v_dual_mov_b32 v47, v35 :: v_dual_mov_b32 v46, v34101; W32-NEXT: v_dual_mov_b32 v45, v33 :: v_dual_mov_b32 v44, v32102; W32-NEXT: v_wmma_f16_16x16x16_f16 v[32:39], v[16:23], v[24:31], v[32:39]103; W32-NEXT: s_delay_alu instid0(VALU_DEP_2)104; W32-NEXT: v_wmma_f16_16x16x16_f16 v[44:51], v[0:7], v[8:15], v[44:51]105; W32-NEXT: s_clause 0x1106; W32-NEXT: global_store_b128 v[40:41], v[48:51], off offset:16107; W32-NEXT: global_store_b128 v[40:41], v[44:47], off108; W32-NEXT: s_clause 0x1109; W32-NEXT: global_store_b128 v[42:43], v[36:39], off offset:16110; W32-NEXT: global_store_b128 v[42:43], v[32:35], off111; W32-NEXT: s_endpgm112bb:113 %res.0 = call <16 x half> @llvm.amdgcn.wmma.f16.16x16x16.f16.tied(<16 x half> %A.0, <16 x half> %B.0, <16 x half> %C, i1 0)114 %res.1 = call <16 x half> @llvm.amdgcn.wmma.f16.16x16x16.f16.tied(<16 x half> %A.1, <16 x half> %B.1, <16 x half> %C, i1 0)115 store <16 x half> %res.0, ptr addrspace(1) %out.0, align 32116 store <16 x half> %res.1, ptr addrspace(1) %out.1, align 32117 ret void118}119 120; @llvm.amdgcn.wmma.bf16.16x16x16.bf16121 122define amdgpu_ps void @test_wmma_bf16_16x16x16_bf16_lo(<16 x i16> %A, <16 x i16> %B, <16 x i16> %C, ptr addrspace(1) %out) {123; W32-LABEL: test_wmma_bf16_16x16x16_bf16_lo:124; W32: ; %bb.0: ; %bb125; W32-NEXT: v_wmma_bf16_16x16x16_bf16 v[16:23], v[0:7], v[8:15], v[16:23]126; W32-NEXT: s_clause 0x1127; W32-NEXT: global_store_b128 v[24:25], v[20:23], off offset:16128; W32-NEXT: global_store_b128 v[24:25], v[16:19], off129; W32-NEXT: s_endpgm130bb:131 %res = call <16 x i16> @llvm.amdgcn.wmma.bf16.16x16x16.bf16(<16 x i16> %A, <16 x i16> %B, <16 x i16> %C, i1 0)132 store <16 x i16> %res, ptr addrspace(1) %out, align 32133 ret void134}135 136define amdgpu_ps void @test_wmma_bf16_16x16x16_bf16_hi(<16 x i16> %A, <16 x i16> %B, <16 x i16> %C, ptr addrspace(1) %out) {137; W32-LABEL: test_wmma_bf16_16x16x16_bf16_hi:138; W32: ; %bb.0: ; %bb139; W32-NEXT: v_wmma_bf16_16x16x16_bf16 v[16:23], v[0:7], v[8:15], v[16:23] op_sel:[0,0,1]140; W32-NEXT: s_clause 0x1141; W32-NEXT: global_store_b128 v[24:25], v[20:23], off offset:16142; W32-NEXT: global_store_b128 v[24:25], v[16:19], off143; W32-NEXT: s_endpgm144bb:145 %res = call <16 x i16> @llvm.amdgcn.wmma.bf16.16x16x16.bf16(<16 x i16> %A, <16 x i16> %B, <16 x i16> %C, i1 1)146 store <16 x i16> %res, ptr addrspace(1) %out, align 32147 ret void148}149 150define amdgpu_ps void @test_wmma_bf16_16x16x16_bf16_untied(<16 x i16> %A.0, <16 x i16> %B.0, <16 x i16> %A.1, <16 x i16> %B.1, <16 x i16> %C, ptr addrspace(1) %out.0, ptr addrspace(1) %out.1) {151; W32-LABEL: test_wmma_bf16_16x16x16_bf16_untied:152; W32: ; %bb.0: ; %bb153; W32-NEXT: v_wmma_bf16_16x16x16_bf16 v[44:51], v[0:7], v[8:15], v[32:39]154; W32-NEXT: v_wmma_bf16_16x16x16_bf16 v[32:39], v[16:23], v[24:31], v[32:39]155; W32-NEXT: s_clause 0x1156; W32-NEXT: global_store_b128 v[40:41], v[48:51], off offset:16157; W32-NEXT: global_store_b128 v[40:41], v[44:47], off158; W32-NEXT: s_clause 0x1159; W32-NEXT: global_store_b128 v[42:43], v[36:39], off offset:16160; W32-NEXT: global_store_b128 v[42:43], v[32:35], off161; W32-NEXT: s_endpgm162bb:163 %res.0 = call <16 x i16> @llvm.amdgcn.wmma.bf16.16x16x16.bf16(<16 x i16> %A.0, <16 x i16> %B.0, <16 x i16> %C, i1 0)164 %res.1 = call <16 x i16> @llvm.amdgcn.wmma.bf16.16x16x16.bf16(<16 x i16> %A.1, <16 x i16> %B.1, <16 x i16> %C, i1 0)165 store <16 x i16> %res.0, ptr addrspace(1) %out.0, align 32166 store <16 x i16> %res.1, ptr addrspace(1) %out.1, align 32167 ret void168}169 170define amdgpu_ps void @test_wmma_bf16_16x16x16_bf16_tied(<16 x i16> %A.0, <16 x i16> %B.0, <16 x i16> %A.1, <16 x i16> %B.1, <16 x i16> %C, ptr addrspace(1) %out.0, ptr addrspace(1) %out.1) {171; W32-LABEL: test_wmma_bf16_16x16x16_bf16_tied:172; W32: ; %bb.0: ; %bb173; W32-NEXT: v_dual_mov_b32 v51, v39 :: v_dual_mov_b32 v50, v38174; W32-NEXT: v_dual_mov_b32 v49, v37 :: v_dual_mov_b32 v48, v36175; W32-NEXT: v_dual_mov_b32 v47, v35 :: v_dual_mov_b32 v46, v34176; W32-NEXT: v_dual_mov_b32 v45, v33 :: v_dual_mov_b32 v44, v32177; W32-NEXT: v_wmma_bf16_16x16x16_bf16 v[32:39], v[16:23], v[24:31], v[32:39]178; W32-NEXT: s_delay_alu instid0(VALU_DEP_2)179; W32-NEXT: v_wmma_bf16_16x16x16_bf16 v[44:51], v[0:7], v[8:15], v[44:51]180; W32-NEXT: s_clause 0x1181; W32-NEXT: global_store_b128 v[40:41], v[48:51], off offset:16182; W32-NEXT: global_store_b128 v[40:41], v[44:47], off183; W32-NEXT: s_clause 0x1184; W32-NEXT: global_store_b128 v[42:43], v[36:39], off offset:16185; W32-NEXT: global_store_b128 v[42:43], v[32:35], off186; W32-NEXT: s_endpgm187bb:188 %res.0 = call <16 x i16> @llvm.amdgcn.wmma.bf16.16x16x16.bf16.tied(<16 x i16> %A.0, <16 x i16> %B.0, <16 x i16> %C, i1 0)189 %res.1 = call <16 x i16> @llvm.amdgcn.wmma.bf16.16x16x16.bf16.tied(<16 x i16> %A.1, <16 x i16> %B.1, <16 x i16> %C, i1 0)190 store <16 x i16> %res.0, ptr addrspace(1) %out.0, align 32191 store <16 x i16> %res.1, ptr addrspace(1) %out.1, align 32192 ret void193}194 195; @llvm.amdgcn.wmma.i32.16x16x16.iu8196 197define amdgpu_ps void @test_wmma_i32_16x16x16_ui8_unsigned_unsigned(<4 x i32> %A, <4 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out) {198; W32-LABEL: test_wmma_i32_16x16x16_ui8_unsigned_unsigned:199; W32: ; %bb.0: ; %bb200; W32-NEXT: v_wmma_i32_16x16x16_iu8 v[8:15], v[0:3], v[4:7], v[8:15]201; W32-NEXT: s_clause 0x1202; W32-NEXT: global_store_b128 v[16:17], v[12:15], off offset:16203; W32-NEXT: global_store_b128 v[16:17], v[8:11], off204; W32-NEXT: s_endpgm205bb:206 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8(i1 0, <4 x i32> %A, i1 0, <4 x i32> %B, <8 x i32> %C, i1 0)207 store <8 x i32> %res, ptr addrspace(1) %out, align 32208 ret void209}210 211define amdgpu_ps void @test_wmma_i32_16x16x16_ui8_unsigned_signed(<4 x i32> %A, <4 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out) {212; W32-LABEL: test_wmma_i32_16x16x16_ui8_unsigned_signed:213; W32: ; %bb.0: ; %bb214; W32-NEXT: v_wmma_i32_16x16x16_iu8 v[8:15], v[0:3], v[4:7], v[8:15] neg_lo:[0,1,0]215; W32-NEXT: s_clause 0x1216; W32-NEXT: global_store_b128 v[16:17], v[12:15], off offset:16217; W32-NEXT: global_store_b128 v[16:17], v[8:11], off218; W32-NEXT: s_endpgm219bb:220 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8(i1 0, <4 x i32> %A, i1 1, <4 x i32> %B, <8 x i32> %C, i1 0)221 store <8 x i32> %res, ptr addrspace(1) %out, align 32222 ret void223}224 225define amdgpu_ps void @test_wmma_i32_16x16x16_ui8_signed_unsigned(<4 x i32> %A, <4 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out) {226; W32-LABEL: test_wmma_i32_16x16x16_ui8_signed_unsigned:227; W32: ; %bb.0: ; %bb228; W32-NEXT: v_wmma_i32_16x16x16_iu8 v[8:15], v[0:3], v[4:7], v[8:15] neg_lo:[1,0,0]229; W32-NEXT: s_clause 0x1230; W32-NEXT: global_store_b128 v[16:17], v[12:15], off offset:16231; W32-NEXT: global_store_b128 v[16:17], v[8:11], off232; W32-NEXT: s_endpgm233bb:234 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8(i1 1, <4 x i32> %A, i1 0, <4 x i32> %B, <8 x i32> %C, i1 0)235 store <8 x i32> %res, ptr addrspace(1) %out, align 32236 ret void237}238 239define amdgpu_ps void @test_wmma_i32_16x16x16_ui8_signed_signed(<4 x i32> %A, <4 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out) {240; W32-LABEL: test_wmma_i32_16x16x16_ui8_signed_signed:241; W32: ; %bb.0: ; %bb242; W32-NEXT: v_wmma_i32_16x16x16_iu8 v[8:15], v[0:3], v[4:7], v[8:15] neg_lo:[1,1,0]243; W32-NEXT: s_clause 0x1244; W32-NEXT: global_store_b128 v[16:17], v[12:15], off offset:16245; W32-NEXT: global_store_b128 v[16:17], v[8:11], off246; W32-NEXT: s_endpgm247bb:248 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8(i1 1, <4 x i32> %A, i1 1, <4 x i32> %B, <8 x i32> %C, i1 0)249 store <8 x i32> %res, ptr addrspace(1) %out, align 32250 ret void251}252 253define amdgpu_ps void @test_wmma_i32_16x16x16_ui8_unsigned_unsigned_clamp(<4 x i32> %A, <4 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out) {254; W32-LABEL: test_wmma_i32_16x16x16_ui8_unsigned_unsigned_clamp:255; W32: ; %bb.0: ; %bb256; W32-NEXT: v_wmma_i32_16x16x16_iu8 v[8:15], v[0:3], v[4:7], v[8:15] clamp257; W32-NEXT: s_clause 0x1258; W32-NEXT: global_store_b128 v[16:17], v[12:15], off offset:16259; W32-NEXT: global_store_b128 v[16:17], v[8:11], off260; W32-NEXT: s_endpgm261bb:262 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8(i1 0, <4 x i32> %A, i1 0, <4 x i32> %B, <8 x i32> %C, i1 1)263 store <8 x i32> %res, ptr addrspace(1) %out, align 32264 ret void265}266 267define amdgpu_ps void @test_wmma_i32_16x16x16_ui8_unsigned_signed_clamp(<4 x i32> %A, <4 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out) {268; W32-LABEL: test_wmma_i32_16x16x16_ui8_unsigned_signed_clamp:269; W32: ; %bb.0: ; %bb270; W32-NEXT: v_wmma_i32_16x16x16_iu8 v[8:15], v[0:3], v[4:7], v[8:15] neg_lo:[0,1,0] clamp271; W32-NEXT: s_clause 0x1272; W32-NEXT: global_store_b128 v[16:17], v[12:15], off offset:16273; W32-NEXT: global_store_b128 v[16:17], v[8:11], off274; W32-NEXT: s_endpgm275bb:276 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8(i1 0, <4 x i32> %A, i1 1, <4 x i32> %B, <8 x i32> %C, i1 1)277 store <8 x i32> %res, ptr addrspace(1) %out, align 32278 ret void279}280 281define amdgpu_ps void @test_wmma_i32_16x16x16_ui8_signed_unsigned_clamp(<4 x i32> %A, <4 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out) {282; W32-LABEL: test_wmma_i32_16x16x16_ui8_signed_unsigned_clamp:283; W32: ; %bb.0: ; %bb284; W32-NEXT: v_wmma_i32_16x16x16_iu8 v[8:15], v[0:3], v[4:7], v[8:15] neg_lo:[1,0,0] clamp285; W32-NEXT: s_clause 0x1286; W32-NEXT: global_store_b128 v[16:17], v[12:15], off offset:16287; W32-NEXT: global_store_b128 v[16:17], v[8:11], off288; W32-NEXT: s_endpgm289bb:290 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8(i1 1, <4 x i32> %A, i1 0, <4 x i32> %B, <8 x i32> %C, i1 1)291 store <8 x i32> %res, ptr addrspace(1) %out, align 32292 ret void293}294 295define amdgpu_ps void @test_wmma_i32_16x16x16_ui8_signed_signed_clamp(<4 x i32> %A, <4 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out) {296; W32-LABEL: test_wmma_i32_16x16x16_ui8_signed_signed_clamp:297; W32: ; %bb.0: ; %bb298; W32-NEXT: v_wmma_i32_16x16x16_iu8 v[8:15], v[0:3], v[4:7], v[8:15] neg_lo:[1,1,0] clamp299; W32-NEXT: s_clause 0x1300; W32-NEXT: global_store_b128 v[16:17], v[12:15], off offset:16301; W32-NEXT: global_store_b128 v[16:17], v[8:11], off302; W32-NEXT: s_endpgm303bb:304 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8(i1 1, <4 x i32> %A, i1 1, <4 x i32> %B, <8 x i32> %C, i1 1)305 store <8 x i32> %res, ptr addrspace(1) %out, align 32306 ret void307}308 309; @llvm.amdgcn.wmma.i32.16x16x16.iu4310 311define amdgpu_ps void @test_wmma_i32_16x16x16_ui4_unsigned_unsigned(<2 x i32> %A, <2 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out) {312; W32-LABEL: test_wmma_i32_16x16x16_ui4_unsigned_unsigned:313; W32: ; %bb.0: ; %bb314; W32-NEXT: v_wmma_i32_16x16x16_iu4 v[4:11], v[0:1], v[2:3], v[4:11]315; W32-NEXT: s_clause 0x1316; W32-NEXT: global_store_b128 v[12:13], v[8:11], off offset:16317; W32-NEXT: global_store_b128 v[12:13], v[4:7], off318; W32-NEXT: s_endpgm319bb:320 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4(i1 0, <2 x i32> %A, i1 0, <2 x i32> %B, <8 x i32> %C, i1 0)321 store <8 x i32> %res, ptr addrspace(1) %out, align 32322 ret void323}324 325define amdgpu_ps void @test_wmma_i32_16x16x16_ui4_unsigned_signed(<2 x i32> %A, <2 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out) {326; W32-LABEL: test_wmma_i32_16x16x16_ui4_unsigned_signed:327; W32: ; %bb.0: ; %bb328; W32-NEXT: v_wmma_i32_16x16x16_iu4 v[4:11], v[0:1], v[2:3], v[4:11] neg_lo:[0,1,0]329; W32-NEXT: s_clause 0x1330; W32-NEXT: global_store_b128 v[12:13], v[8:11], off offset:16331; W32-NEXT: global_store_b128 v[12:13], v[4:7], off332; W32-NEXT: s_endpgm333bb:334 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4(i1 0, <2 x i32> %A, i1 1, <2 x i32> %B, <8 x i32> %C, i1 0)335 store <8 x i32> %res, ptr addrspace(1) %out, align 32336 ret void337}338 339define amdgpu_ps void @test_wmma_i32_16x16x16_ui4_signed_unsigned(<2 x i32> %A, <2 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out) {340; W32-LABEL: test_wmma_i32_16x16x16_ui4_signed_unsigned:341; W32: ; %bb.0: ; %bb342; W32-NEXT: v_wmma_i32_16x16x16_iu4 v[4:11], v[0:1], v[2:3], v[4:11] neg_lo:[1,0,0]343; W32-NEXT: s_clause 0x1344; W32-NEXT: global_store_b128 v[12:13], v[8:11], off offset:16345; W32-NEXT: global_store_b128 v[12:13], v[4:7], off346; W32-NEXT: s_endpgm347bb:348 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4(i1 1, <2 x i32> %A, i1 0, <2 x i32> %B, <8 x i32> %C, i1 0)349 store <8 x i32> %res, ptr addrspace(1) %out, align 32350 ret void351}352 353define amdgpu_ps void @test_wmma_i32_16x16x16_ui4_signed_signed(<2 x i32> %A, <2 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out) {354; W32-LABEL: test_wmma_i32_16x16x16_ui4_signed_signed:355; W32: ; %bb.0: ; %bb356; W32-NEXT: v_wmma_i32_16x16x16_iu4 v[4:11], v[0:1], v[2:3], v[4:11] neg_lo:[1,1,0]357; W32-NEXT: s_clause 0x1358; W32-NEXT: global_store_b128 v[12:13], v[8:11], off offset:16359; W32-NEXT: global_store_b128 v[12:13], v[4:7], off360; W32-NEXT: s_endpgm361bb:362 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4(i1 1, <2 x i32> %A, i1 1, <2 x i32> %B, <8 x i32> %C, i1 0)363 store <8 x i32> %res, ptr addrspace(1) %out, align 32364 ret void365}366 367 368define amdgpu_ps void @test_wmma_i32_16x16x16_ui4_unsigned_unsigned_clamp(<2 x i32> %A, <2 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out) {369; W32-LABEL: test_wmma_i32_16x16x16_ui4_unsigned_unsigned_clamp:370; W32: ; %bb.0: ; %bb371; W32-NEXT: v_wmma_i32_16x16x16_iu4 v[4:11], v[0:1], v[2:3], v[4:11] clamp372; W32-NEXT: s_clause 0x1373; W32-NEXT: global_store_b128 v[12:13], v[8:11], off offset:16374; W32-NEXT: global_store_b128 v[12:13], v[4:7], off375; W32-NEXT: s_endpgm376bb:377 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4(i1 0, <2 x i32> %A, i1 0, <2 x i32> %B, <8 x i32> %C, i1 1)378 store <8 x i32> %res, ptr addrspace(1) %out, align 32379 ret void380}381 382define amdgpu_ps void @test_wmma_i32_16x16x16_ui4_unsigned_signed_clamp(<2 x i32> %A, <2 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out) {383; W32-LABEL: test_wmma_i32_16x16x16_ui4_unsigned_signed_clamp:384; W32: ; %bb.0: ; %bb385; W32-NEXT: v_wmma_i32_16x16x16_iu4 v[4:11], v[0:1], v[2:3], v[4:11] neg_lo:[0,1,0] clamp386; W32-NEXT: s_clause 0x1387; W32-NEXT: global_store_b128 v[12:13], v[8:11], off offset:16388; W32-NEXT: global_store_b128 v[12:13], v[4:7], off389; W32-NEXT: s_endpgm390bb:391 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4(i1 0, <2 x i32> %A, i1 1, <2 x i32> %B, <8 x i32> %C, i1 1)392 store <8 x i32> %res, ptr addrspace(1) %out, align 32393 ret void394}395 396define amdgpu_ps void @test_wmma_i32_16x16x16_ui4_signed_unsigned_clamp(<2 x i32> %A, <2 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out) {397; W32-LABEL: test_wmma_i32_16x16x16_ui4_signed_unsigned_clamp:398; W32: ; %bb.0: ; %bb399; W32-NEXT: v_wmma_i32_16x16x16_iu4 v[4:11], v[0:1], v[2:3], v[4:11] neg_lo:[1,0,0] clamp400; W32-NEXT: s_clause 0x1401; W32-NEXT: global_store_b128 v[12:13], v[8:11], off offset:16402; W32-NEXT: global_store_b128 v[12:13], v[4:7], off403; W32-NEXT: s_endpgm404bb:405 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4(i1 1, <2 x i32> %A, i1 0, <2 x i32> %B, <8 x i32> %C, i1 1)406 store <8 x i32> %res, ptr addrspace(1) %out, align 32407 ret void408}409 410define amdgpu_ps void @test_wmma_i32_16x16x16_ui4_signed_signed_clamp(<2 x i32> %A, <2 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out) {411; W32-LABEL: test_wmma_i32_16x16x16_ui4_signed_signed_clamp:412; W32: ; %bb.0: ; %bb413; W32-NEXT: v_wmma_i32_16x16x16_iu4 v[4:11], v[0:1], v[2:3], v[4:11] neg_lo:[1,1,0] clamp414; W32-NEXT: s_clause 0x1415; W32-NEXT: global_store_b128 v[12:13], v[8:11], off offset:16416; W32-NEXT: global_store_b128 v[12:13], v[4:7], off417; W32-NEXT: s_endpgm418bb:419 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4(i1 1, <2 x i32> %A, i1 1, <2 x i32> %B, <8 x i32> %C, i1 1)420 store <8 x i32> %res, ptr addrspace(1) %out, align 32421 ret void422}423 424