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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize64 < %s | FileCheck %s --check-prefix=W643 4declare <4 x float> @llvm.amdgcn.wmma.f32.16x16x16.f16.v4f32.v16f16(<16 x half>, <16 x half>, <4 x float>)5declare <4 x float> @llvm.amdgcn.wmma.f32.16x16x16.bf16.v4f32.v16i16(<16 x i16>, <16 x i16>, <4 x float>)6declare <8 x half> @llvm.amdgcn.wmma.f16.16x16x16.f16.b8f16.v16f16(<16 x half>, <16 x half>, <8 x half>, i1 immarg)7declare <8 x half> @llvm.amdgcn.wmma.f16.16x16x16.f16.tied.v8f16.v16f16(<16 x half>, <16 x half>, <8 x half>, i1 immarg)8declare <8 x i16> @llvm.amdgcn.wmma.bf16.16x16x16.bf16.v8i16.v16i16(<16 x i16>, <16 x i16>, <8 x i16>, i1 immarg)9declare <8 x i16> @llvm.amdgcn.wmma.bf16.16x16x16.bf16.tied.v8i16.v16i16(<16 x i16>, <16 x i16>, <8 x i16>, i1 immarg)10declare <4 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8.v4i32.v4i32(i1 immarg, <4 x i32>, i1 immarg, <4 x i32>, <4 x i32>, i1 immarg)11declare <4 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4.v4i32.v2i32(i1 immarg, <2 x i32>, i1 immarg, <2 x i32>, <4 x i32>, i1 immarg)12 13; @llvm.amdgcn.wmma.f32.16x16x16.f1614 15define amdgpu_ps void @test_wmma_f32_16x16x16_f16(<16 x half> %A, <16 x half> %B, <4 x float> %C, ptr addrspace(1) %out) {16; W64-LABEL: test_wmma_f32_16x16x16_f16:17; W64: ; %bb.0: ; %bb18; W64-NEXT: v_wmma_f32_16x16x16_f16 v[16:19], v[0:7], v[8:15], v[16:19]19; W64-NEXT: global_store_b128 v[20:21], v[16:19], off20; W64-NEXT: s_endpgm21bb:22 %res = call <4 x float> @llvm.amdgcn.wmma.f32.16x16x16.f16.v4f32.v16f16(<16 x half> %A, <16 x half> %B, <4 x float> %C)23 store <4 x float> %res, ptr addrspace(1) %out, align 1624 ret void25}26 27; @llvm.amdgcn.wmma.f32.16x16x16.bf1628 29define amdgpu_ps void @test_wmma_f32_16x16x16_bf16(<16 x i16> %A, <16 x i16> %B, <4 x float> %C, ptr addrspace(1) %out) {30; W64-LABEL: test_wmma_f32_16x16x16_bf16:31; W64: ; %bb.0: ; %bb32; W64-NEXT: v_wmma_f32_16x16x16_bf16 v[16:19], v[0:7], v[8:15], v[16:19]33; W64-NEXT: global_store_b128 v[20:21], v[16:19], off34; W64-NEXT: s_endpgm35bb:36 %res = call <4 x float> @llvm.amdgcn.wmma.f32.16x16x16.bf16.v4f32.v16i16(<16 x i16> %A, <16 x i16> %B, <4 x float> %C)37 store <4 x float> %res, ptr addrspace(1) %out, align 1638 ret void39}40 41; @llvm.amdgcn.wmma.f16.16x16x16.f1642 43define amdgpu_ps void @test_wmma_f16_16x16x16_f16_lo(<16 x half> %A, <16 x half> %B, <8 x half> %C, ptr addrspace(1) %out) {44; W64-LABEL: test_wmma_f16_16x16x16_f16_lo:45; W64: ; %bb.0: ; %bb46; W64-NEXT: v_wmma_f16_16x16x16_f16 v[16:19], v[0:7], v[8:15], v[16:19]47; W64-NEXT: global_store_b128 v[20:21], v[16:19], off48; W64-NEXT: s_endpgm49bb:50 %res = call <8 x half> @llvm.amdgcn.wmma.f16.16x16x16.f16.v8f16.v16f16(<16 x half> %A, <16 x half> %B, <8 x half> %C, i1 0)51 store <8 x half> %res, ptr addrspace(1) %out, align 1652 ret void53}54 55define amdgpu_ps void @test_wmma_f16_16x16x16_f16_hi(<16 x half> %A, <16 x half> %B, <8 x half> %C, ptr addrspace(1) %out) {56; W64-LABEL: test_wmma_f16_16x16x16_f16_hi:57; W64: ; %bb.0: ; %bb58; W64-NEXT: v_wmma_f16_16x16x16_f16 v[16:19], v[0:7], v[8:15], v[16:19] op_sel:[0,0,1]59; W64-NEXT: global_store_b128 v[20:21], v[16:19], off60; W64-NEXT: s_endpgm61bb:62 %res = call <8 x half> @llvm.amdgcn.wmma.f16.16x16x16.f16.v8f16.v16f16(<16 x half> %A, <16 x half> %B, <8 x half> %C, i1 1)63 store <8 x half> %res, ptr addrspace(1) %out, align 1664 ret void65}66 67define amdgpu_ps void @test_wmma_f16_16x16x16_f16_untied(<16 x half> %A.0, <16 x half> %B.0, <16 x half> %A.1, <16 x half> %B.1, <8 x half> %C, ptr addrspace(1) %out.0, ptr addrspace(1) %out.1) {68; W64-LABEL: test_wmma_f16_16x16x16_f16_untied:69; W64: ; %bb.0: ; %bb70; W64-NEXT: v_wmma_f16_16x16x16_f16 v[40:43], v[0:7], v[8:15], v[32:35]71; W64-NEXT: v_wmma_f16_16x16x16_f16 v[32:35], v[16:23], v[24:31], v[32:35]72; W64-NEXT: global_store_b128 v[36:37], v[40:43], off73; W64-NEXT: global_store_b128 v[38:39], v[32:35], off74; W64-NEXT: s_endpgm75bb:76 %res.0 = call <8 x half> @llvm.amdgcn.wmma.f16.16x16x16.f16.v8f16.v16f16(<16 x half> %A.0, <16 x half> %B.0, <8 x half> %C, i1 0)77 %res.1 = call <8 x half> @llvm.amdgcn.wmma.f16.16x16x16.f16.v8f16.v16f16(<16 x half> %A.1, <16 x half> %B.1, <8 x half> %C, i1 0)78 store <8 x half> %res.0, ptr addrspace(1) %out.0, align 3279 store <8 x half> %res.1, ptr addrspace(1) %out.1, align 3280 ret void81}82 83define amdgpu_ps void @test_wmma_f16_16x16x16_f16_tied(<16 x half> %A.0, <16 x half> %B.0, <16 x half> %A.1, <16 x half> %B.1, <8 x half> %C, ptr addrspace(1) %out.0, ptr addrspace(1) %out.1) {84; W64-LABEL: test_wmma_f16_16x16x16_f16_tied:85; W64: ; %bb.0: ; %bb86; W64-NEXT: v_mov_b32_e32 v43, v3587; W64-NEXT: v_mov_b32_e32 v42, v3488; W64-NEXT: v_mov_b32_e32 v41, v3389; W64-NEXT: v_mov_b32_e32 v40, v3290; W64-NEXT: v_wmma_f16_16x16x16_f16 v[32:35], v[16:23], v[24:31], v[32:35]91; W64-NEXT: s_delay_alu instid0(VALU_DEP_2)92; W64-NEXT: v_wmma_f16_16x16x16_f16 v[40:43], v[0:7], v[8:15], v[40:43]93; W64-NEXT: global_store_b128 v[36:37], v[40:43], off94; W64-NEXT: global_store_b128 v[38:39], v[32:35], off95; W64-NEXT: s_endpgm96bb:97 %res.0 = call <8 x half> @llvm.amdgcn.wmma.f16.16x16x16.f16.tied.v8f16.v16f16(<16 x half> %A.0, <16 x half> %B.0, <8 x half> %C, i1 0)98 %res.1 = call <8 x half> @llvm.amdgcn.wmma.f16.16x16x16.f16.tied.v8f16.v16f16(<16 x half> %A.1, <16 x half> %B.1, <8 x half> %C, i1 0)99 store <8 x half> %res.0, ptr addrspace(1) %out.0, align 32100 store <8 x half> %res.1, ptr addrspace(1) %out.1, align 32101 ret void102}103 104; @llvm.amdgcn.wmma.bf16.16x16x16.bf16105 106define amdgpu_ps void @test_wmma_bf16_16x16x16_bf16_lo(<16 x i16> %A, <16 x i16> %B, <8 x i16> %C, ptr addrspace(1) %out) {107; W64-LABEL: test_wmma_bf16_16x16x16_bf16_lo:108; W64: ; %bb.0: ; %bb109; W64-NEXT: v_wmma_bf16_16x16x16_bf16 v[16:19], v[0:7], v[8:15], v[16:19]110; W64-NEXT: global_store_b128 v[20:21], v[16:19], off111; W64-NEXT: s_endpgm112bb:113 %res = call <8 x i16> @llvm.amdgcn.wmma.bf16.16x16x16.bf16.v8i16.v16i16(<16 x i16> %A, <16 x i16> %B, <8 x i16> %C, i1 0)114 store <8 x i16> %res, ptr addrspace(1) %out, align 16115 ret void116}117 118define amdgpu_ps void @test_wmma_bf16_16x16x16_bf16_hi(<16 x i16> %A, <16 x i16> %B, <8 x i16> %C, ptr addrspace(1) %out) {119; W64-LABEL: test_wmma_bf16_16x16x16_bf16_hi:120; W64: ; %bb.0: ; %bb121; W64-NEXT: v_wmma_bf16_16x16x16_bf16 v[16:19], v[0:7], v[8:15], v[16:19] op_sel:[0,0,1]122; W64-NEXT: global_store_b128 v[20:21], v[16:19], off123; W64-NEXT: s_endpgm124bb:125 %res = call <8 x i16> @llvm.amdgcn.wmma.bf16.16x16x16.bf16.v8i16.v16i16(<16 x i16> %A, <16 x i16> %B, <8 x i16> %C, i1 1)126 store <8 x i16> %res, ptr addrspace(1) %out, align 16127 ret void128}129 130define amdgpu_ps void @test_wmma_bf16_16x16x16_bf16_untied(<16 x i16> %A.0, <16 x i16> %B.0, <16 x i16> %A.1, <16 x i16> %B.1, <8 x i16> %C, ptr addrspace(1) %out.0, ptr addrspace(1) %out.1) {131; W64-LABEL: test_wmma_bf16_16x16x16_bf16_untied:132; W64: ; %bb.0: ; %bb133; W64-NEXT: v_wmma_bf16_16x16x16_bf16 v[40:43], v[0:7], v[8:15], v[32:35]134; W64-NEXT: v_wmma_bf16_16x16x16_bf16 v[32:35], v[16:23], v[24:31], v[32:35]135; W64-NEXT: global_store_b128 v[36:37], v[40:43], off136; W64-NEXT: global_store_b128 v[38:39], v[32:35], off137; W64-NEXT: s_endpgm138bb:139 %res.0 = call <8 x i16> @llvm.amdgcn.wmma.bf16.16x16x16.bf16.v8i16.v16i16(<16 x i16> %A.0, <16 x i16> %B.0, <8 x i16> %C, i1 0)140 %res.1 = call <8 x i16> @llvm.amdgcn.wmma.bf16.16x16x16.bf16.v8i16.v16i16(<16 x i16> %A.1, <16 x i16> %B.1, <8 x i16> %C, i1 0)141 store <8 x i16> %res.0, ptr addrspace(1) %out.0, align 32142 store <8 x i16> %res.1, ptr addrspace(1) %out.1, align 32143 ret void144}145 146define amdgpu_ps void @test_wmma_bf16_16x16x16_bf16_tied(<16 x i16> %A.0, <16 x i16> %B.0, <16 x i16> %A.1, <16 x i16> %B.1, <8 x i16> %C, ptr addrspace(1) %out.0, ptr addrspace(1) %out.1) {147; W64-LABEL: test_wmma_bf16_16x16x16_bf16_tied:148; W64: ; %bb.0: ; %bb149; W64-NEXT: v_mov_b32_e32 v43, v35150; W64-NEXT: v_mov_b32_e32 v42, v34151; W64-NEXT: v_mov_b32_e32 v41, v33152; W64-NEXT: v_mov_b32_e32 v40, v32153; W64-NEXT: v_wmma_bf16_16x16x16_bf16 v[32:35], v[16:23], v[24:31], v[32:35]154; W64-NEXT: s_delay_alu instid0(VALU_DEP_2)155; W64-NEXT: v_wmma_bf16_16x16x16_bf16 v[40:43], v[0:7], v[8:15], v[40:43]156; W64-NEXT: global_store_b128 v[36:37], v[40:43], off157; W64-NEXT: global_store_b128 v[38:39], v[32:35], off158; W64-NEXT: s_endpgm159bb:160 %res.0 = call <8 x i16> @llvm.amdgcn.wmma.bf16.16x16x16.bf16.tied.v8i16.v16i16(<16 x i16> %A.0, <16 x i16> %B.0, <8 x i16> %C, i1 0)161 %res.1 = call <8 x i16> @llvm.amdgcn.wmma.bf16.16x16x16.bf16.tied.v8i16.v16i16(<16 x i16> %A.1, <16 x i16> %B.1, <8 x i16> %C, i1 0)162 store <8 x i16> %res.0, ptr addrspace(1) %out.0, align 32163 store <8 x i16> %res.1, ptr addrspace(1) %out.1, align 32164 ret void165}166 167; @llvm.amdgcn.wmma.i32.16x16x16.iu8168 169define amdgpu_ps void @test_wmma_i32_16x16x16_ui8_unsigned_unsigned(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, ptr addrspace(1) %out) {170; W64-LABEL: test_wmma_i32_16x16x16_ui8_unsigned_unsigned:171; W64: ; %bb.0: ; %bb172; W64-NEXT: v_wmma_i32_16x16x16_iu8 v[8:11], v[0:3], v[4:7], v[8:11]173; W64-NEXT: global_store_b128 v[12:13], v[8:11], off174; W64-NEXT: s_endpgm175bb:176 %res = call <4 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8.v4i32.v4i32(i1 0, <4 x i32> %A, i1 0, <4 x i32> %B, <4 x i32> %C, i1 0)177 store <4 x i32> %res, ptr addrspace(1) %out, align 16178 ret void179}180 181 182define amdgpu_ps void @test_wmma_i32_16x16x16_ui8_unsigned_signed(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, ptr addrspace(1) %out) {183; W64-LABEL: test_wmma_i32_16x16x16_ui8_unsigned_signed:184; W64: ; %bb.0: ; %bb185; W64-NEXT: v_wmma_i32_16x16x16_iu8 v[8:11], v[0:3], v[4:7], v[8:11] neg_lo:[0,1,0]186; W64-NEXT: global_store_b128 v[12:13], v[8:11], off187; W64-NEXT: s_endpgm188bb:189 %res = call <4 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8.v4i32.v4i32(i1 0, <4 x i32> %A, i1 1, <4 x i32> %B, <4 x i32> %C, i1 0)190 store <4 x i32> %res, ptr addrspace(1) %out, align 16191 ret void192}193 194define amdgpu_ps void @test_wmma_i32_16x16x16_ui8_signed_unsigned(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, ptr addrspace(1) %out) {195; W64-LABEL: test_wmma_i32_16x16x16_ui8_signed_unsigned:196; W64: ; %bb.0: ; %bb197; W64-NEXT: v_wmma_i32_16x16x16_iu8 v[8:11], v[0:3], v[4:7], v[8:11] neg_lo:[1,0,0]198; W64-NEXT: global_store_b128 v[12:13], v[8:11], off199; W64-NEXT: s_endpgm200bb:201 %res = call <4 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8.v4i32.v4i32(i1 1, <4 x i32> %A, i1 0, <4 x i32> %B, <4 x i32> %C, i1 0)202 store <4 x i32> %res, ptr addrspace(1) %out, align 16203 ret void204}205 206define amdgpu_ps void @test_wmma_i32_16x16x16_ui8_signed_signed(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, ptr addrspace(1) %out) {207; W64-LABEL: test_wmma_i32_16x16x16_ui8_signed_signed:208; W64: ; %bb.0: ; %bb209; W64-NEXT: v_wmma_i32_16x16x16_iu8 v[8:11], v[0:3], v[4:7], v[8:11] neg_lo:[1,1,0]210; W64-NEXT: global_store_b128 v[12:13], v[8:11], off211; W64-NEXT: s_endpgm212bb:213 %res = call <4 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8.v4i32.v4i32(i1 1, <4 x i32> %A, i1 1, <4 x i32> %B, <4 x i32> %C, i1 0)214 store <4 x i32> %res, ptr addrspace(1) %out, align 16215 ret void216}217 218define amdgpu_ps void @test_wmma_i32_16x16x16_ui8_unsigned_unsigned_clamp(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, ptr addrspace(1) %out) {219; W64-LABEL: test_wmma_i32_16x16x16_ui8_unsigned_unsigned_clamp:220; W64: ; %bb.0: ; %bb221; W64-NEXT: v_wmma_i32_16x16x16_iu8 v[8:11], v[0:3], v[4:7], v[8:11] clamp222; W64-NEXT: global_store_b128 v[12:13], v[8:11], off223; W64-NEXT: s_endpgm224bb:225 %res = call <4 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8.v4i32.v4i32(i1 0, <4 x i32> %A, i1 0, <4 x i32> %B, <4 x i32> %C, i1 1)226 store <4 x i32> %res, ptr addrspace(1) %out, align 16227 ret void228}229 230define amdgpu_ps void @test_wmma_i32_16x16x16_ui8_unsigned_signed_clamp(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, ptr addrspace(1) %out) {231; W64-LABEL: test_wmma_i32_16x16x16_ui8_unsigned_signed_clamp:232; W64: ; %bb.0: ; %bb233; W64-NEXT: v_wmma_i32_16x16x16_iu8 v[8:11], v[0:3], v[4:7], v[8:11] neg_lo:[0,1,0] clamp234; W64-NEXT: global_store_b128 v[12:13], v[8:11], off235; W64-NEXT: s_endpgm236bb:237 %res = call <4 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8.v4i32.v4i32(i1 0, <4 x i32> %A, i1 1, <4 x i32> %B, <4 x i32> %C, i1 1)238 store <4 x i32> %res, ptr addrspace(1) %out, align 16239 ret void240}241 242define amdgpu_ps void @test_wmma_i32_16x16x16_ui8_signed_unsigned_clamp(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, ptr addrspace(1) %out) {243; W64-LABEL: test_wmma_i32_16x16x16_ui8_signed_unsigned_clamp:244; W64: ; %bb.0: ; %bb245; W64-NEXT: v_wmma_i32_16x16x16_iu8 v[8:11], v[0:3], v[4:7], v[8:11] neg_lo:[1,0,0] clamp246; W64-NEXT: global_store_b128 v[12:13], v[8:11], off247; W64-NEXT: s_endpgm248bb:249 %res = call <4 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8.v4i32.v4i32(i1 1, <4 x i32> %A, i1 0, <4 x i32> %B, <4 x i32> %C, i1 1)250 store <4 x i32> %res, ptr addrspace(1) %out, align 16251 ret void252}253 254define amdgpu_ps void @test_wmma_i32_16x16x16_ui8_signed_signed_clamp(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, ptr addrspace(1) %out) {255; W64-LABEL: test_wmma_i32_16x16x16_ui8_signed_signed_clamp:256; W64: ; %bb.0: ; %bb257; W64-NEXT: v_wmma_i32_16x16x16_iu8 v[8:11], v[0:3], v[4:7], v[8:11] neg_lo:[1,1,0] clamp258; W64-NEXT: global_store_b128 v[12:13], v[8:11], off259; W64-NEXT: s_endpgm260bb:261 %res = call <4 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8.v4i32.v4i32(i1 1, <4 x i32> %A, i1 1, <4 x i32> %B, <4 x i32> %C, i1 1)262 store <4 x i32> %res, ptr addrspace(1) %out, align 16263 ret void264}265 266; @llvm.amdgcn.wmma.i32.16x16x16.iu4267 268define amdgpu_ps void @test_wmma_i32_16x16x16_ui4_unsigned_unsigned(<2 x i32> %A, <2 x i32> %B, <4 x i32> %C, ptr addrspace(1) %out) {269; W64-LABEL: test_wmma_i32_16x16x16_ui4_unsigned_unsigned:270; W64: ; %bb.0: ; %bb271; W64-NEXT: v_wmma_i32_16x16x16_iu4 v[4:7], v[0:1], v[2:3], v[4:7]272; W64-NEXT: global_store_b128 v[8:9], v[4:7], off273; W64-NEXT: s_endpgm274bb:275 %res = call <4 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4.v4i32.v2i32(i1 0, <2 x i32> %A, i1 0, <2 x i32> %B, <4 x i32> %C, i1 0)276 store <4 x i32> %res, ptr addrspace(1) %out, align 16277 ret void278}279 280define amdgpu_ps void @test_wmma_i32_16x16x16_ui4_unsigned_signed(<2 x i32> %A, <2 x i32> %B, <4 x i32> %C, ptr addrspace(1) %out) {281; W64-LABEL: test_wmma_i32_16x16x16_ui4_unsigned_signed:282; W64: ; %bb.0: ; %bb283; W64-NEXT: v_wmma_i32_16x16x16_iu4 v[4:7], v[0:1], v[2:3], v[4:7] neg_lo:[0,1,0]284; W64-NEXT: global_store_b128 v[8:9], v[4:7], off285; W64-NEXT: s_endpgm286bb:287 %res = call <4 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4.v4i32.v2i32(i1 0, <2 x i32> %A, i1 1, <2 x i32> %B, <4 x i32> %C, i1 0)288 store <4 x i32> %res, ptr addrspace(1) %out, align 16289 ret void290}291 292define amdgpu_ps void @test_wmma_i32_16x16x16_ui4_signed_unsigned(<2 x i32> %A, <2 x i32> %B, <4 x i32> %C, ptr addrspace(1) %out) {293; W64-LABEL: test_wmma_i32_16x16x16_ui4_signed_unsigned:294; W64: ; %bb.0: ; %bb295; W64-NEXT: v_wmma_i32_16x16x16_iu4 v[4:7], v[0:1], v[2:3], v[4:7] neg_lo:[1,0,0]296; W64-NEXT: global_store_b128 v[8:9], v[4:7], off297; W64-NEXT: s_endpgm298bb:299 %res = call <4 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4.v4i32.v2i32(i1 1, <2 x i32> %A, i1 0, <2 x i32> %B, <4 x i32> %C, i1 0)300 store <4 x i32> %res, ptr addrspace(1) %out, align 16301 ret void302}303 304define amdgpu_ps void @test_wmma_i32_16x16x16_ui4_signed_signed(<2 x i32> %A, <2 x i32> %B, <4 x i32> %C, ptr addrspace(1) %out) {305; W64-LABEL: test_wmma_i32_16x16x16_ui4_signed_signed:306; W64: ; %bb.0: ; %bb307; W64-NEXT: v_wmma_i32_16x16x16_iu4 v[4:7], v[0:1], v[2:3], v[4:7] neg_lo:[1,1,0]308; W64-NEXT: global_store_b128 v[8:9], v[4:7], off309; W64-NEXT: s_endpgm310bb:311 %res = call <4 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4.v4i32.v2i32(i1 1, <2 x i32> %A, i1 1, <2 x i32> %B, <4 x i32> %C, i1 0)312 store <4 x i32> %res, ptr addrspace(1) %out, align 16313 ret void314}315 316define amdgpu_ps void @test_wmma_i32_16x16x16_ui4_unsigned_unsigned_clamp(<2 x i32> %A, <2 x i32> %B, <4 x i32> %C, ptr addrspace(1) %out) {317; W64-LABEL: test_wmma_i32_16x16x16_ui4_unsigned_unsigned_clamp:318; W64: ; %bb.0: ; %bb319; W64-NEXT: v_wmma_i32_16x16x16_iu4 v[4:7], v[0:1], v[2:3], v[4:7] clamp320; W64-NEXT: global_store_b128 v[8:9], v[4:7], off321; W64-NEXT: s_endpgm322bb:323 %res = call <4 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4.v4i32.v2i32(i1 0, <2 x i32> %A, i1 0, <2 x i32> %B, <4 x i32> %C, i1 1)324 store <4 x i32> %res, ptr addrspace(1) %out, align 16325 ret void326}327 328define amdgpu_ps void @test_wmma_i32_16x16x16_ui4_unsigned_signed_clamp(<2 x i32> %A, <2 x i32> %B, <4 x i32> %C, ptr addrspace(1) %out) {329; W64-LABEL: test_wmma_i32_16x16x16_ui4_unsigned_signed_clamp:330; W64: ; %bb.0: ; %bb331; W64-NEXT: v_wmma_i32_16x16x16_iu4 v[4:7], v[0:1], v[2:3], v[4:7] neg_lo:[0,1,0] clamp332; W64-NEXT: global_store_b128 v[8:9], v[4:7], off333; W64-NEXT: s_endpgm334bb:335 %res = call <4 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4.v4i32.v2i32(i1 0, <2 x i32> %A, i1 1, <2 x i32> %B, <4 x i32> %C, i1 1)336 store <4 x i32> %res, ptr addrspace(1) %out, align 16337 ret void338}339 340define amdgpu_ps void @test_wmma_i32_16x16x16_ui4_signed_unsigned_clamp(<2 x i32> %A, <2 x i32> %B, <4 x i32> %C, ptr addrspace(1) %out) {341; W64-LABEL: test_wmma_i32_16x16x16_ui4_signed_unsigned_clamp:342; W64: ; %bb.0: ; %bb343; W64-NEXT: v_wmma_i32_16x16x16_iu4 v[4:7], v[0:1], v[2:3], v[4:7] neg_lo:[1,0,0] clamp344; W64-NEXT: global_store_b128 v[8:9], v[4:7], off345; W64-NEXT: s_endpgm346bb:347 %res = call <4 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4.v4i32.v2i32(i1 1, <2 x i32> %A, i1 0, <2 x i32> %B, <4 x i32> %C, i1 1)348 store <4 x i32> %res, ptr addrspace(1) %out, align 16349 ret void350}351 352define amdgpu_ps void @test_wmma_i32_16x16x16_ui4_signed_signed_clamp(<2 x i32> %A, <2 x i32> %B, <4 x i32> %C, ptr addrspace(1) %out) {353; W64-LABEL: test_wmma_i32_16x16x16_ui4_signed_signed_clamp:354; W64: ; %bb.0: ; %bb355; W64-NEXT: v_wmma_i32_16x16x16_iu4 v[4:7], v[0:1], v[2:3], v[4:7] neg_lo:[1,1,0] clamp356; W64-NEXT: global_store_b128 v[8:9], v[4:7], off357; W64-NEXT: s_endpgm358bb:359 %res = call <4 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4.v4i32.v2i32(i1 1, <2 x i32> %A, i1 1, <2 x i32> %B, <4 x i32> %C, i1 1)360 store <4 x i32> %res, ptr addrspace(1) %out, align 16361 ret void362}363 364