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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefixes=GCN,SI,GCN-SDAG,SI-SDAG %s3; RUN: llc -global-isel=1 -global-isel-abort=2 -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefixes=GCN,SI,GCN-GISEL,SI-GISEL %s4; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=tonga < %s | FileCheck -check-prefixes=GCN,VI,GCN-SDAG,VI-SDAG %s5; RUN: llc -global-isel=1 -global-isel-abort=2 -mtriple=amdgcn -mcpu=tonga < %s | FileCheck -check-prefixes=GCN,VI,GCN-GISEL,VI-GISEL %s6; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,GFX900,GCN-SDAG,GFX900-SDAG %s7; RUN: llc -global-isel=1 -global-isel-abort=2 -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,GFX900,GCN-GISEL,GFX900-GISEL %s8 9; RUN: llc -mtriple=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 %s10; RUN: llc -mtriple=r600 -mcpu=cayman < %s | FileCheck -check-prefix=CM %s11 12define amdgpu_kernel void @s_exp2_f32(ptr addrspace(1) %out, float %in) {13; SI-SDAG-LABEL: s_exp2_f32:14; SI-SDAG: ; %bb.0:15; SI-SDAG-NEXT: s_load_dword s2, s[4:5], 0xb16; SI-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x917; SI-SDAG-NEXT: v_mov_b32_e32 v0, 0xc2fc000018; SI-SDAG-NEXT: v_mov_b32_e32 v1, 0x4280000019; SI-SDAG-NEXT: s_mov_b32 s3, 0xf00020; SI-SDAG-NEXT: s_waitcnt lgkmcnt(0)21; SI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s2, v022; SI-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc23; SI-SDAG-NEXT: v_add_f32_e32 v0, s2, v024; SI-SDAG-NEXT: v_exp_f32_e32 v0, v025; SI-SDAG-NEXT: s_and_b64 s[4:5], vcc, exec26; SI-SDAG-NEXT: s_cselect_b32 s4, 0xffffffc0, 027; SI-SDAG-NEXT: s_mov_b32 s2, -128; SI-SDAG-NEXT: v_ldexp_f32_e64 v0, v0, s429; SI-SDAG-NEXT: buffer_store_dword v0, off, s[0:3], 030; SI-SDAG-NEXT: s_endpgm31;32; SI-GISEL-LABEL: s_exp2_f32:33; SI-GISEL: ; %bb.0:34; SI-GISEL-NEXT: s_load_dword s2, s[4:5], 0xb35; SI-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x936; SI-GISEL-NEXT: v_mov_b32_e32 v0, 0xc2fc000037; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x4280000038; SI-GISEL-NEXT: s_mov_b32 s3, 0xf00039; SI-GISEL-NEXT: s_waitcnt lgkmcnt(0)40; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s2, v041; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc42; SI-GISEL-NEXT: v_add_f32_e32 v0, s2, v043; SI-GISEL-NEXT: v_exp_f32_e32 v0, v044; SI-GISEL-NEXT: v_not_b32_e32 v1, 6345; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc46; SI-GISEL-NEXT: s_mov_b32 s2, -147; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v148; SI-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 049; SI-GISEL-NEXT: s_endpgm50;51; VI-SDAG-LABEL: s_exp2_f32:52; VI-SDAG: ; %bb.0:53; VI-SDAG-NEXT: s_load_dword s2, s[4:5], 0x2c54; VI-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2455; VI-SDAG-NEXT: v_mov_b32_e32 v0, 0xc2fc000056; VI-SDAG-NEXT: v_mov_b32_e32 v1, 0x4280000057; VI-SDAG-NEXT: s_waitcnt lgkmcnt(0)58; VI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s2, v059; VI-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc60; VI-SDAG-NEXT: v_add_f32_e32 v0, s2, v061; VI-SDAG-NEXT: v_exp_f32_e32 v0, v062; VI-SDAG-NEXT: s_and_b64 s[2:3], vcc, exec63; VI-SDAG-NEXT: s_cselect_b32 s2, 0xffffffc0, 064; VI-SDAG-NEXT: v_ldexp_f32 v2, v0, s265; VI-SDAG-NEXT: v_mov_b32_e32 v0, s066; VI-SDAG-NEXT: v_mov_b32_e32 v1, s167; VI-SDAG-NEXT: flat_store_dword v[0:1], v268; VI-SDAG-NEXT: s_endpgm69;70; VI-GISEL-LABEL: s_exp2_f32:71; VI-GISEL: ; %bb.0:72; VI-GISEL-NEXT: s_load_dword s2, s[4:5], 0x2c73; VI-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2474; VI-GISEL-NEXT: v_mov_b32_e32 v0, 0xc2fc000075; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x4280000076; VI-GISEL-NEXT: s_waitcnt lgkmcnt(0)77; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s2, v078; VI-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc79; VI-GISEL-NEXT: v_add_f32_e32 v0, s2, v080; VI-GISEL-NEXT: v_exp_f32_e32 v0, v081; VI-GISEL-NEXT: v_not_b32_e32 v1, 6382; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc83; VI-GISEL-NEXT: v_ldexp_f32 v2, v0, v184; VI-GISEL-NEXT: v_mov_b32_e32 v0, s085; VI-GISEL-NEXT: v_mov_b32_e32 v1, s186; VI-GISEL-NEXT: flat_store_dword v[0:1], v287; VI-GISEL-NEXT: s_endpgm88;89; GFX900-SDAG-LABEL: s_exp2_f32:90; GFX900-SDAG: ; %bb.0:91; GFX900-SDAG-NEXT: s_load_dword s2, s[4:5], 0x2c92; GFX900-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2493; GFX900-SDAG-NEXT: v_mov_b32_e32 v0, 0xc2fc000094; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, 0x4280000095; GFX900-SDAG-NEXT: s_waitcnt lgkmcnt(0)96; GFX900-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s2, v097; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc98; GFX900-SDAG-NEXT: v_add_f32_e32 v0, s2, v099; GFX900-SDAG-NEXT: v_exp_f32_e32 v0, v0100; GFX900-SDAG-NEXT: s_and_b64 s[2:3], vcc, exec101; GFX900-SDAG-NEXT: s_cselect_b32 s2, 0xffffffc0, 0102; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, 0103; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, s2104; GFX900-SDAG-NEXT: global_store_dword v1, v0, s[0:1]105; GFX900-SDAG-NEXT: s_endpgm106;107; GFX900-GISEL-LABEL: s_exp2_f32:108; GFX900-GISEL: ; %bb.0:109; GFX900-GISEL-NEXT: s_load_dword s0, s[4:5], 0x2c110; GFX900-GISEL-NEXT: v_mov_b32_e32 v0, 0xc2fc0000111; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x42800000112; GFX900-GISEL-NEXT: s_waitcnt lgkmcnt(0)113; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s0, v0114; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc115; GFX900-GISEL-NEXT: v_add_f32_e32 v0, s0, v0116; GFX900-GISEL-NEXT: v_exp_f32_e32 v0, v0117; GFX900-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24118; GFX900-GISEL-NEXT: v_not_b32_e32 v1, 63119; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc120; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v1121; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0122; GFX900-GISEL-NEXT: s_waitcnt lgkmcnt(0)123; GFX900-GISEL-NEXT: global_store_dword v1, v0, s[0:1]124; GFX900-GISEL-NEXT: s_endpgm125;126; R600-LABEL: s_exp2_f32:127; R600: ; %bb.0:128; R600-NEXT: ALU 10, @4, KC0[CB0:0-32], KC1[]129; R600-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1130; R600-NEXT: CF_END131; R600-NEXT: PAD132; R600-NEXT: ALU clause starting at 4:133; R600-NEXT: SETGT * T0.W, literal.x, KC0[2].Z,134; R600-NEXT: -1023672320(-1.260000e+02), 0(0.000000e+00)135; R600-NEXT: CNDE * T1.W, PV.W, 0.0, literal.x,136; R600-NEXT: 1115684864(6.400000e+01), 0(0.000000e+00)137; R600-NEXT: ADD T1.W, KC0[2].Z, PV.W,138; R600-NEXT: CNDE * T0.W, T0.W, 1.0, literal.x,139; R600-NEXT: 528482304(5.421011e-20), 0(0.000000e+00)140; R600-NEXT: EXP_IEEE * T0.X, PV.W,141; R600-NEXT: MUL_IEEE T0.X, PS, T0.W,142; R600-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,143; R600-NEXT: 2(2.802597e-45), 0(0.000000e+00)144;145; CM-LABEL: s_exp2_f32:146; CM: ; %bb.0:147; CM-NEXT: ALU 13, @4, KC0[CB0:0-32], KC1[]148; CM-NEXT: MEM_RAT_CACHELESS STORE_DWORD T0.X, T1.X149; CM-NEXT: CF_END150; CM-NEXT: PAD151; CM-NEXT: ALU clause starting at 4:152; CM-NEXT: SETGT * T0.W, literal.x, KC0[2].Z,153; CM-NEXT: -1023672320(-1.260000e+02), 0(0.000000e+00)154; CM-NEXT: CNDE * T1.W, PV.W, 0.0, literal.x,155; CM-NEXT: 1115684864(6.400000e+01), 0(0.000000e+00)156; CM-NEXT: CNDE T0.Z, T0.W, 1.0, literal.x,157; CM-NEXT: ADD * T0.W, KC0[2].Z, PV.W,158; CM-NEXT: 528482304(5.421011e-20), 0(0.000000e+00)159; CM-NEXT: EXP_IEEE T0.X, T0.W,160; CM-NEXT: EXP_IEEE T0.Y (MASKED), T0.W,161; CM-NEXT: EXP_IEEE T0.Z (MASKED), T0.W,162; CM-NEXT: EXP_IEEE * T0.W (MASKED), T0.W,163; CM-NEXT: MUL_IEEE * T0.X, PV.X, T0.Z,164; CM-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,165; CM-NEXT: 2(2.802597e-45), 0(0.000000e+00)166 %result = call float @llvm.exp2.f32(float %in)167 store float %result, ptr addrspace(1) %out168 ret void169}170 171; FIXME: We should be able to merge these packets together on Cayman so we172; have a maximum of 4 instructions.173define amdgpu_kernel void @s_exp2_v2f32(ptr addrspace(1) %out, <2 x float> %in) {174; SI-SDAG-LABEL: s_exp2_v2f32:175; SI-SDAG: ; %bb.0:176; SI-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9177; SI-SDAG-NEXT: v_mov_b32_e32 v0, 0xc2fc0000178; SI-SDAG-NEXT: v_mov_b32_e32 v1, 0x42800000179; SI-SDAG-NEXT: s_waitcnt lgkmcnt(0)180; SI-SDAG-NEXT: s_mov_b64 s[4:5], s[2:3]181; SI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s5, v0182; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v1, vcc183; SI-SDAG-NEXT: s_and_b64 s[6:7], vcc, exec184; SI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s4, v0185; SI-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc186; SI-SDAG-NEXT: v_add_f32_e32 v2, s5, v2187; SI-SDAG-NEXT: v_add_f32_e32 v0, s4, v0188; SI-SDAG-NEXT: v_exp_f32_e32 v2, v2189; SI-SDAG-NEXT: v_exp_f32_e32 v0, v0190; SI-SDAG-NEXT: s_cselect_b32 s6, 0xffffffc0, 0191; SI-SDAG-NEXT: s_and_b64 s[4:5], vcc, exec192; SI-SDAG-NEXT: s_cselect_b32 s4, 0xffffffc0, 0193; SI-SDAG-NEXT: s_mov_b32 s3, 0xf000194; SI-SDAG-NEXT: s_mov_b32 s2, -1195; SI-SDAG-NEXT: v_ldexp_f32_e64 v1, v2, s6196; SI-SDAG-NEXT: v_ldexp_f32_e64 v0, v0, s4197; SI-SDAG-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0198; SI-SDAG-NEXT: s_endpgm199;200; SI-GISEL-LABEL: s_exp2_v2f32:201; SI-GISEL: ; %bb.0:202; SI-GISEL-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x9203; SI-GISEL-NEXT: v_mov_b32_e32 v0, 0xc2fc0000204; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x42800000205; SI-GISEL-NEXT: v_not_b32_e32 v2, 63206; SI-GISEL-NEXT: s_waitcnt lgkmcnt(0)207; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s6, v0208; SI-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], s7, v0209; SI-GISEL-NEXT: v_cndmask_b32_e32 v3, 0, v1, vcc210; SI-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, v1, s[0:1]211; SI-GISEL-NEXT: v_add_f32_e32 v3, s6, v3212; SI-GISEL-NEXT: v_add_f32_e32 v0, s7, v0213; SI-GISEL-NEXT: v_exp_f32_e32 v3, v3214; SI-GISEL-NEXT: v_exp_f32_e32 v1, v0215; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v2, vcc216; SI-GISEL-NEXT: v_cndmask_b32_e64 v2, 0, v2, s[0:1]217; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v3, v0218; SI-GISEL-NEXT: v_ldexp_f32_e32 v1, v1, v2219; SI-GISEL-NEXT: s_mov_b32 s6, -1220; SI-GISEL-NEXT: s_mov_b32 s7, 0xf000221; SI-GISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0222; SI-GISEL-NEXT: s_endpgm223;224; VI-SDAG-LABEL: s_exp2_v2f32:225; VI-SDAG: ; %bb.0:226; VI-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24227; VI-SDAG-NEXT: v_mov_b32_e32 v0, 0xc2fc0000228; VI-SDAG-NEXT: v_mov_b32_e32 v1, 0x42800000229; VI-SDAG-NEXT: s_waitcnt lgkmcnt(0)230; VI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s3, v0231; VI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v1, vcc232; VI-SDAG-NEXT: s_and_b64 s[4:5], vcc, exec233; VI-SDAG-NEXT: v_add_f32_e32 v2, s3, v2234; VI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s2, v0235; VI-SDAG-NEXT: v_exp_f32_e32 v2, v2236; VI-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc237; VI-SDAG-NEXT: v_add_f32_e32 v0, s2, v0238; VI-SDAG-NEXT: v_exp_f32_e32 v0, v0239; VI-SDAG-NEXT: s_cselect_b32 s3, 0xffffffc0, 0240; VI-SDAG-NEXT: v_ldexp_f32 v1, v2, s3241; VI-SDAG-NEXT: s_and_b64 s[2:3], vcc, exec242; VI-SDAG-NEXT: s_cselect_b32 s2, 0xffffffc0, 0243; VI-SDAG-NEXT: v_mov_b32_e32 v3, s1244; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, s2245; VI-SDAG-NEXT: v_mov_b32_e32 v2, s0246; VI-SDAG-NEXT: flat_store_dwordx2 v[2:3], v[0:1]247; VI-SDAG-NEXT: s_endpgm248;249; VI-GISEL-LABEL: s_exp2_v2f32:250; VI-GISEL: ; %bb.0:251; VI-GISEL-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x24252; VI-GISEL-NEXT: v_mov_b32_e32 v0, 0xc2fc0000253; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x42800000254; VI-GISEL-NEXT: v_not_b32_e32 v2, 63255; VI-GISEL-NEXT: s_waitcnt lgkmcnt(0)256; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s6, v0257; VI-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], s7, v0258; VI-GISEL-NEXT: v_cndmask_b32_e32 v3, 0, v1, vcc259; VI-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, v1, s[0:1]260; VI-GISEL-NEXT: v_add_f32_e32 v3, s6, v3261; VI-GISEL-NEXT: v_add_f32_e32 v0, s7, v0262; VI-GISEL-NEXT: v_exp_f32_e32 v3, v3263; VI-GISEL-NEXT: v_exp_f32_e32 v1, v0264; VI-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v2, vcc265; VI-GISEL-NEXT: v_cndmask_b32_e64 v2, 0, v2, s[0:1]266; VI-GISEL-NEXT: v_ldexp_f32 v0, v3, v0267; VI-GISEL-NEXT: v_ldexp_f32 v1, v1, v2268; VI-GISEL-NEXT: v_mov_b32_e32 v2, s4269; VI-GISEL-NEXT: v_mov_b32_e32 v3, s5270; VI-GISEL-NEXT: flat_store_dwordx2 v[2:3], v[0:1]271; VI-GISEL-NEXT: s_endpgm272;273; GFX900-SDAG-LABEL: s_exp2_v2f32:274; GFX900-SDAG: ; %bb.0:275; GFX900-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24276; GFX900-SDAG-NEXT: v_mov_b32_e32 v0, 0xc2fc0000277; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, 0x42800000278; GFX900-SDAG-NEXT: v_mov_b32_e32 v2, 0279; GFX900-SDAG-NEXT: s_waitcnt lgkmcnt(0)280; GFX900-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s3, v0281; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v3, 0, v1, vcc282; GFX900-SDAG-NEXT: s_and_b64 s[4:5], vcc, exec283; GFX900-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s2, v0284; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc285; GFX900-SDAG-NEXT: v_add_f32_e32 v3, s3, v3286; GFX900-SDAG-NEXT: v_add_f32_e32 v0, s2, v0287; GFX900-SDAG-NEXT: v_exp_f32_e32 v3, v3288; GFX900-SDAG-NEXT: v_exp_f32_e32 v0, v0289; GFX900-SDAG-NEXT: s_cselect_b32 s4, 0xffffffc0, 0290; GFX900-SDAG-NEXT: s_and_b64 s[2:3], vcc, exec291; GFX900-SDAG-NEXT: s_cselect_b32 s2, 0xffffffc0, 0292; GFX900-SDAG-NEXT: v_ldexp_f32 v1, v3, s4293; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, s2294; GFX900-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]295; GFX900-SDAG-NEXT: s_endpgm296;297; GFX900-GISEL-LABEL: s_exp2_v2f32:298; GFX900-GISEL: ; %bb.0:299; GFX900-GISEL-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x24300; GFX900-GISEL-NEXT: v_mov_b32_e32 v0, 0xc2fc0000301; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x42800000302; GFX900-GISEL-NEXT: v_not_b32_e32 v2, 63303; GFX900-GISEL-NEXT: s_waitcnt lgkmcnt(0)304; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s10, v0305; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], s11, v0306; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v3, 0, v1, vcc307; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, v1, s[0:1]308; GFX900-GISEL-NEXT: v_add_f32_e32 v3, s10, v3309; GFX900-GISEL-NEXT: v_add_f32_e32 v0, s11, v0310; GFX900-GISEL-NEXT: v_exp_f32_e32 v3, v3311; GFX900-GISEL-NEXT: v_exp_f32_e32 v1, v0312; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v2, vcc313; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v2, 0, v2, s[0:1]314; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v3, v0315; GFX900-GISEL-NEXT: v_ldexp_f32 v1, v1, v2316; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0317; GFX900-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[8:9]318; GFX900-GISEL-NEXT: s_endpgm319;320; R600-LABEL: s_exp2_v2f32:321; R600: ; %bb.0:322; R600-NEXT: ALU 18, @4, KC0[CB0:0-32], KC1[]323; R600-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1324; R600-NEXT: CF_END325; R600-NEXT: PAD326; R600-NEXT: ALU clause starting at 4:327; R600-NEXT: SETGT T0.W, literal.x, KC0[3].X,328; R600-NEXT: SETGT * T1.W, literal.x, KC0[2].W,329; R600-NEXT: -1023672320(-1.260000e+02), 0(0.000000e+00)330; R600-NEXT: CNDE * T2.W, PV.W, 0.0, literal.x,331; R600-NEXT: 1115684864(6.400000e+01), 0(0.000000e+00)332; R600-NEXT: ADD T2.W, KC0[3].X, PV.W,333; R600-NEXT: CNDE * T3.W, T1.W, 0.0, literal.x,334; R600-NEXT: 1115684864(6.400000e+01), 0(0.000000e+00)335; R600-NEXT: ADD T0.Z, KC0[2].W, PS,336; R600-NEXT: CNDE T0.W, T0.W, 1.0, literal.x,337; R600-NEXT: EXP_IEEE * T0.X, PV.W,338; R600-NEXT: 528482304(5.421011e-20), 0(0.000000e+00)339; R600-NEXT: MUL_IEEE T0.Y, PS, PV.W,340; R600-NEXT: CNDE T0.W, T1.W, 1.0, literal.x,341; R600-NEXT: EXP_IEEE * T0.X, PV.Z,342; R600-NEXT: 528482304(5.421011e-20), 0(0.000000e+00)343; R600-NEXT: MUL_IEEE T0.X, PS, PV.W,344; R600-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,345; R600-NEXT: 2(2.802597e-45), 0(0.000000e+00)346;347; CM-LABEL: s_exp2_v2f32:348; CM: ; %bb.0:349; CM-NEXT: ALU 23, @4, KC0[CB0:0-32], KC1[]350; CM-NEXT: MEM_RAT_CACHELESS STORE_DWORD T1, T0.X351; CM-NEXT: CF_END352; CM-NEXT: PAD353; CM-NEXT: ALU clause starting at 4:354; CM-NEXT: SETGT * T0.W, literal.x, KC0[3].X,355; CM-NEXT: -1023672320(-1.260000e+02), 0(0.000000e+00)356; CM-NEXT: CNDE T0.Z, PV.W, 0.0, literal.x,357; CM-NEXT: SETGT * T1.W, literal.y, KC0[2].W,358; CM-NEXT: 1115684864(6.400000e+01), -1023672320(-1.260000e+02)359; CM-NEXT: CNDE T0.Y, PV.W, 0.0, literal.x,360; CM-NEXT: CNDE T1.Z, T0.W, 1.0, literal.y,361; CM-NEXT: ADD * T0.W, KC0[3].X, PV.Z,362; CM-NEXT: 1115684864(6.400000e+01), 528482304(5.421011e-20)363; CM-NEXT: EXP_IEEE T0.X, T0.W,364; CM-NEXT: EXP_IEEE T0.Y (MASKED), T0.W,365; CM-NEXT: EXP_IEEE T0.Z (MASKED), T0.W,366; CM-NEXT: EXP_IEEE * T0.W (MASKED), T0.W,367; CM-NEXT: MUL_IEEE T1.Y, PV.X, T1.Z,368; CM-NEXT: CNDE T0.Z, T1.W, 1.0, literal.x,369; CM-NEXT: ADD * T0.W, KC0[2].W, T0.Y,370; CM-NEXT: 528482304(5.421011e-20), 0(0.000000e+00)371; CM-NEXT: EXP_IEEE T0.X, T0.W,372; CM-NEXT: EXP_IEEE T0.Y (MASKED), T0.W,373; CM-NEXT: EXP_IEEE T0.Z (MASKED), T0.W,374; CM-NEXT: EXP_IEEE * T0.W (MASKED), T0.W,375; CM-NEXT: MUL_IEEE * T1.X, PV.X, T0.Z,376; CM-NEXT: LSHR * T0.X, KC0[2].Y, literal.x,377; CM-NEXT: 2(2.802597e-45), 0(0.000000e+00)378 %result = call <2 x float> @llvm.exp2.v2f32(<2 x float> %in)379 store <2 x float> %result, ptr addrspace(1) %out380 ret void381}382 383define amdgpu_kernel void @s_exp2_v3f32(ptr addrspace(1) %out, <3 x float> %in) {384; SI-SDAG-LABEL: s_exp2_v3f32:385; SI-SDAG: ; %bb.0:386; SI-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0xd387; SI-SDAG-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x9388; SI-SDAG-NEXT: v_mov_b32_e32 v0, 0xc2fc0000389; SI-SDAG-NEXT: v_mov_b32_e32 v2, 0x42800000390; SI-SDAG-NEXT: s_mov_b32 s7, 0xf000391; SI-SDAG-NEXT: s_waitcnt lgkmcnt(0)392; SI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s1, v0393; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc394; SI-SDAG-NEXT: s_and_b64 s[8:9], vcc, exec395; SI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s0, v0396; SI-SDAG-NEXT: v_add_f32_e32 v1, s1, v1397; SI-SDAG-NEXT: v_cndmask_b32_e32 v3, 0, v2, vcc398; SI-SDAG-NEXT: v_exp_f32_e32 v1, v1399; SI-SDAG-NEXT: s_cselect_b32 s1, 0xffffffc0, 0400; SI-SDAG-NEXT: s_and_b64 s[8:9], vcc, exec401; SI-SDAG-NEXT: v_add_f32_e32 v3, s0, v3402; SI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s2, v0403; SI-SDAG-NEXT: v_exp_f32_e32 v3, v3404; SI-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v2, vcc405; SI-SDAG-NEXT: v_add_f32_e32 v0, s2, v0406; SI-SDAG-NEXT: v_exp_f32_e32 v2, v0407; SI-SDAG-NEXT: v_ldexp_f32_e64 v1, v1, s1408; SI-SDAG-NEXT: s_cselect_b32 s1, 0xffffffc0, 0409; SI-SDAG-NEXT: v_ldexp_f32_e64 v0, v3, s1410; SI-SDAG-NEXT: s_and_b64 s[0:1], vcc, exec411; SI-SDAG-NEXT: s_cselect_b32 s0, 0xffffffc0, 0412; SI-SDAG-NEXT: s_mov_b32 s6, -1413; SI-SDAG-NEXT: v_ldexp_f32_e64 v2, v2, s0414; SI-SDAG-NEXT: buffer_store_dword v2, off, s[4:7], 0 offset:8415; SI-SDAG-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0416; SI-SDAG-NEXT: s_endpgm417;418; SI-GISEL-LABEL: s_exp2_v3f32:419; SI-GISEL: ; %bb.0:420; SI-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0xd421; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc0000422; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x42800000423; SI-GISEL-NEXT: v_not_b32_e32 v3, 63424; SI-GISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x9425; SI-GISEL-NEXT: s_waitcnt lgkmcnt(0)426; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s0, v1427; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v2, vcc428; SI-GISEL-NEXT: v_add_f32_e32 v0, s0, v0429; SI-GISEL-NEXT: v_exp_f32_e32 v0, v0430; SI-GISEL-NEXT: v_cndmask_b32_e32 v4, 0, v3, vcc431; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s1, v1432; SI-GISEL-NEXT: s_mov_b32 s6, -1433; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v4434; SI-GISEL-NEXT: v_cndmask_b32_e32 v4, 0, v2, vcc435; SI-GISEL-NEXT: v_add_f32_e32 v4, s1, v4436; SI-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], s2, v1437; SI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, v2, s[0:1]438; SI-GISEL-NEXT: v_exp_f32_e32 v4, v4439; SI-GISEL-NEXT: v_add_f32_e32 v1, s2, v1440; SI-GISEL-NEXT: v_exp_f32_e32 v2, v1441; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v3, vcc442; SI-GISEL-NEXT: v_ldexp_f32_e32 v1, v4, v1443; SI-GISEL-NEXT: v_cndmask_b32_e64 v3, 0, v3, s[0:1]444; SI-GISEL-NEXT: s_mov_b32 s7, 0xf000445; SI-GISEL-NEXT: v_ldexp_f32_e32 v2, v2, v3446; SI-GISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0447; SI-GISEL-NEXT: buffer_store_dword v2, off, s[4:7], 0 offset:8448; SI-GISEL-NEXT: s_endpgm449;450; VI-SDAG-LABEL: s_exp2_v3f32:451; VI-SDAG: ; %bb.0:452; VI-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34453; VI-SDAG-NEXT: v_mov_b32_e32 v0, 0xc2fc0000454; VI-SDAG-NEXT: v_mov_b32_e32 v1, 0x42800000455; VI-SDAG-NEXT: s_waitcnt lgkmcnt(0)456; VI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s2, v0457; VI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v1, vcc458; VI-SDAG-NEXT: v_add_f32_e32 v2, s2, v2459; VI-SDAG-NEXT: v_exp_f32_e32 v2, v2460; VI-SDAG-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24461; VI-SDAG-NEXT: s_and_b64 s[4:5], vcc, exec462; VI-SDAG-NEXT: s_cselect_b32 s4, 0xffffffc0, 0463; VI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s1, v0464; VI-SDAG-NEXT: v_ldexp_f32 v2, v2, s4465; VI-SDAG-NEXT: v_cndmask_b32_e32 v3, 0, v1, vcc466; VI-SDAG-NEXT: s_and_b64 s[4:5], vcc, exec467; VI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s0, v0468; VI-SDAG-NEXT: v_add_f32_e32 v3, s1, v3469; VI-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc470; VI-SDAG-NEXT: v_exp_f32_e32 v3, v3471; VI-SDAG-NEXT: v_add_f32_e32 v0, s0, v0472; VI-SDAG-NEXT: v_exp_f32_e32 v0, v0473; VI-SDAG-NEXT: s_cselect_b32 s4, 0xffffffc0, 0474; VI-SDAG-NEXT: s_and_b64 s[0:1], vcc, exec475; VI-SDAG-NEXT: v_ldexp_f32 v1, v3, s4476; VI-SDAG-NEXT: s_cselect_b32 s0, 0xffffffc0, 0477; VI-SDAG-NEXT: s_waitcnt lgkmcnt(0)478; VI-SDAG-NEXT: v_mov_b32_e32 v4, s3479; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, s0480; VI-SDAG-NEXT: v_mov_b32_e32 v3, s2481; VI-SDAG-NEXT: flat_store_dwordx3 v[3:4], v[0:2]482; VI-SDAG-NEXT: s_endpgm483;484; VI-GISEL-LABEL: s_exp2_v3f32:485; VI-GISEL: ; %bb.0:486; VI-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34487; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc0000488; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x42800000489; VI-GISEL-NEXT: v_not_b32_e32 v3, 63490; VI-GISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x24491; VI-GISEL-NEXT: s_waitcnt lgkmcnt(0)492; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s0, v1493; VI-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v2, vcc494; VI-GISEL-NEXT: v_add_f32_e32 v0, s0, v0495; VI-GISEL-NEXT: v_exp_f32_e32 v0, v0496; VI-GISEL-NEXT: v_cndmask_b32_e32 v4, 0, v3, vcc497; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s1, v1498; VI-GISEL-NEXT: v_ldexp_f32 v0, v0, v4499; VI-GISEL-NEXT: v_cndmask_b32_e32 v4, 0, v2, vcc500; VI-GISEL-NEXT: v_add_f32_e32 v4, s1, v4501; VI-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], s2, v1502; VI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, v2, s[0:1]503; VI-GISEL-NEXT: v_add_f32_e32 v1, s2, v1504; VI-GISEL-NEXT: v_exp_f32_e32 v4, v4505; VI-GISEL-NEXT: v_exp_f32_e32 v2, v1506; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v3, vcc507; VI-GISEL-NEXT: v_cndmask_b32_e64 v3, 0, v3, s[0:1]508; VI-GISEL-NEXT: v_ldexp_f32 v1, v4, v1509; VI-GISEL-NEXT: v_ldexp_f32 v2, v2, v3510; VI-GISEL-NEXT: v_mov_b32_e32 v3, s4511; VI-GISEL-NEXT: v_mov_b32_e32 v4, s5512; VI-GISEL-NEXT: flat_store_dwordx3 v[3:4], v[0:2]513; VI-GISEL-NEXT: s_endpgm514;515; GFX900-SDAG-LABEL: s_exp2_v3f32:516; GFX900-SDAG: ; %bb.0:517; GFX900-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34518; GFX900-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x24519; GFX900-SDAG-NEXT: v_mov_b32_e32 v0, 0xc2fc0000520; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, 0x42800000521; GFX900-SDAG-NEXT: v_mov_b32_e32 v3, 0522; GFX900-SDAG-NEXT: s_waitcnt lgkmcnt(0)523; GFX900-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s2, v0524; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v1, vcc525; GFX900-SDAG-NEXT: v_add_f32_e32 v2, s2, v2526; GFX900-SDAG-NEXT: v_exp_f32_e32 v2, v2527; GFX900-SDAG-NEXT: s_and_b64 s[2:3], vcc, exec528; GFX900-SDAG-NEXT: s_cselect_b32 s2, 0xffffffc0, 0529; GFX900-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s1, v0530; GFX900-SDAG-NEXT: v_ldexp_f32 v2, v2, s2531; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v4, 0, v1, vcc532; GFX900-SDAG-NEXT: s_and_b64 s[2:3], vcc, exec533; GFX900-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s0, v0534; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc535; GFX900-SDAG-NEXT: v_add_f32_e32 v4, s1, v4536; GFX900-SDAG-NEXT: v_add_f32_e32 v0, s0, v0537; GFX900-SDAG-NEXT: v_exp_f32_e32 v4, v4538; GFX900-SDAG-NEXT: v_exp_f32_e32 v0, v0539; GFX900-SDAG-NEXT: s_cselect_b32 s2, 0xffffffc0, 0540; GFX900-SDAG-NEXT: s_and_b64 s[0:1], vcc, exec541; GFX900-SDAG-NEXT: s_cselect_b32 s0, 0xffffffc0, 0542; GFX900-SDAG-NEXT: v_ldexp_f32 v1, v4, s2543; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, s0544; GFX900-SDAG-NEXT: global_store_dwordx3 v3, v[0:2], s[6:7]545; GFX900-SDAG-NEXT: s_endpgm546;547; GFX900-GISEL-LABEL: s_exp2_v3f32:548; GFX900-GISEL: ; %bb.0:549; GFX900-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34550; GFX900-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x24551; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc0000552; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x42800000553; GFX900-GISEL-NEXT: v_not_b32_e32 v3, 63554; GFX900-GISEL-NEXT: s_waitcnt lgkmcnt(0)555; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s0, v1556; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v2, vcc557; GFX900-GISEL-NEXT: v_add_f32_e32 v0, s0, v0558; GFX900-GISEL-NEXT: v_exp_f32_e32 v0, v0559; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v4, 0, v3, vcc560; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s1, v1561; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v4562; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v4, 0, v2, vcc563; GFX900-GISEL-NEXT: v_add_f32_e32 v4, s1, v4564; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], s2, v1565; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, v2, s[0:1]566; GFX900-GISEL-NEXT: v_add_f32_e32 v1, s2, v1567; GFX900-GISEL-NEXT: v_exp_f32_e32 v4, v4568; GFX900-GISEL-NEXT: v_exp_f32_e32 v2, v1569; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v3, vcc570; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v3, 0, v3, s[0:1]571; GFX900-GISEL-NEXT: v_ldexp_f32 v1, v4, v1572; GFX900-GISEL-NEXT: v_ldexp_f32 v2, v2, v3573; GFX900-GISEL-NEXT: v_mov_b32_e32 v3, 0574; GFX900-GISEL-NEXT: global_store_dwordx3 v3, v[0:2], s[6:7]575; GFX900-GISEL-NEXT: s_endpgm576;577; R600-LABEL: s_exp2_v3f32:578; R600: ; %bb.0:579; R600-NEXT: ALU 29, @4, KC0[CB0:0-32], KC1[]580; R600-NEXT: MEM_RAT_CACHELESS STORE_RAW T2.X, T3.X, 0581; R600-NEXT: MEM_RAT_CACHELESS STORE_RAW T1.XY, T0.X, 1582; R600-NEXT: CF_END583; R600-NEXT: ALU clause starting at 4:584; R600-NEXT: SETGT T0.W, literal.x, KC0[3].Z,585; R600-NEXT: SETGT * T1.W, literal.x, KC0[3].Y,586; R600-NEXT: -1023672320(-1.260000e+02), 0(0.000000e+00)587; R600-NEXT: CNDE * T2.W, PV.W, 0.0, literal.x,588; R600-NEXT: 1115684864(6.400000e+01), 0(0.000000e+00)589; R600-NEXT: ADD T2.W, KC0[3].Z, PV.W,590; R600-NEXT: CNDE * T3.W, T1.W, 0.0, literal.x,591; R600-NEXT: 1115684864(6.400000e+01), 0(0.000000e+00)592; R600-NEXT: ADD T0.Y, KC0[3].Y, PS,593; R600-NEXT: SETGT T0.Z, literal.x, KC0[3].W,594; R600-NEXT: CNDE T0.W, T0.W, 1.0, literal.y,595; R600-NEXT: EXP_IEEE * T0.X, PV.W,596; R600-NEXT: -1023672320(-1.260000e+02), 528482304(5.421011e-20)597; R600-NEXT: MUL_IEEE T1.Y, PS, PV.W,598; R600-NEXT: CNDE T1.Z, PV.Z, 0.0, literal.x,599; R600-NEXT: CNDE T0.W, T1.W, 1.0, literal.y,600; R600-NEXT: EXP_IEEE * T0.X, PV.Y,601; R600-NEXT: 1115684864(6.400000e+01), 528482304(5.421011e-20)602; R600-NEXT: MUL_IEEE T1.X, PS, PV.W,603; R600-NEXT: ADD T0.W, KC0[3].W, PV.Z,604; R600-NEXT: LSHR * T0.X, KC0[2].Y, literal.x,605; R600-NEXT: 2(2.802597e-45), 0(0.000000e+00)606; R600-NEXT: CNDE T1.W, T0.Z, 1.0, literal.x,607; R600-NEXT: EXP_IEEE * T0.Y, PV.W,608; R600-NEXT: 528482304(5.421011e-20), 0(0.000000e+00)609; R600-NEXT: MUL_IEEE T2.X, PS, PV.W,610; R600-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.x,611; R600-NEXT: 8(1.121039e-44), 0(0.000000e+00)612; R600-NEXT: LSHR * T3.X, PV.W, literal.x,613; R600-NEXT: 2(2.802597e-45), 0(0.000000e+00)614;615; CM-LABEL: s_exp2_v3f32:616; CM: ; %bb.0:617; CM-NEXT: ALU 35, @4, KC0[CB0:0-32], KC1[]618; CM-NEXT: MEM_RAT_CACHELESS STORE_DWORD T0, T3.X619; CM-NEXT: MEM_RAT_CACHELESS STORE_DWORD T1.X, T2.X620; CM-NEXT: CF_END621; CM-NEXT: ALU clause starting at 4:622; CM-NEXT: SETGT * T0.W, literal.x, KC0[3].W,623; CM-NEXT: -1023672320(-1.260000e+02), 0(0.000000e+00)624; CM-NEXT: CNDE T0.Y, PV.W, 0.0, literal.x,625; CM-NEXT: SETGT T0.Z, literal.y, KC0[3].Z,626; CM-NEXT: SETGT * T1.W, literal.y, KC0[3].Y,627; CM-NEXT: 1115684864(6.400000e+01), -1023672320(-1.260000e+02)628; CM-NEXT: CNDE T0.X, PV.W, 0.0, literal.x,629; CM-NEXT: CNDE T1.Y, PV.Z, 0.0, literal.x,630; CM-NEXT: CNDE T1.Z, T0.W, 1.0, literal.y,631; CM-NEXT: ADD * T0.W, KC0[3].W, PV.Y,632; CM-NEXT: 1115684864(6.400000e+01), 528482304(5.421011e-20)633; CM-NEXT: EXP_IEEE T0.X (MASKED), T0.W,634; CM-NEXT: EXP_IEEE T0.Y, T0.W,635; CM-NEXT: EXP_IEEE T0.Z (MASKED), T0.W,636; CM-NEXT: EXP_IEEE * T0.W (MASKED), T0.W,637; CM-NEXT: MUL_IEEE T1.X, PV.Y, T1.Z,638; CM-NEXT: CNDE T0.Y, T0.Z, 1.0, literal.x,639; CM-NEXT: ADD_INT T0.Z, KC0[2].Y, literal.y,640; CM-NEXT: ADD * T0.W, KC0[3].Z, T1.Y,641; CM-NEXT: 528482304(5.421011e-20), 8(1.121039e-44)642; CM-NEXT: EXP_IEEE T0.X (MASKED), T0.W,643; CM-NEXT: EXP_IEEE T0.Y (MASKED), T0.W,644; CM-NEXT: EXP_IEEE T0.Z (MASKED), T0.W,645; CM-NEXT: EXP_IEEE * T0.W, T0.W,646; CM-NEXT: LSHR T2.X, T0.Z, literal.x,647; CM-NEXT: MUL_IEEE T0.Y, PV.W, T0.Y,648; CM-NEXT: CNDE T0.Z, T1.W, 1.0, literal.y,649; CM-NEXT: ADD * T0.W, KC0[3].Y, T0.X,650; CM-NEXT: 2(2.802597e-45), 528482304(5.421011e-20)651; CM-NEXT: EXP_IEEE T0.X, T0.W,652; CM-NEXT: EXP_IEEE T0.Y (MASKED), T0.W,653; CM-NEXT: EXP_IEEE T0.Z (MASKED), T0.W,654; CM-NEXT: EXP_IEEE * T0.W (MASKED), T0.W,655; CM-NEXT: MUL_IEEE * T0.X, PV.X, T0.Z,656; CM-NEXT: LSHR * T3.X, KC0[2].Y, literal.x,657; CM-NEXT: 2(2.802597e-45), 0(0.000000e+00)658 %result = call <3 x float> @llvm.exp2.v3f32(<3 x float> %in)659 store <3 x float> %result, ptr addrspace(1) %out660 ret void661}662 663; FIXME: We should be able to merge these packets together on Cayman so we664; have a maximum of 4 instructions.665define amdgpu_kernel void @s_exp2_v4f32(ptr addrspace(1) %out, <4 x float> %in) {666; SI-SDAG-LABEL: s_exp2_v4f32:667; SI-SDAG: ; %bb.0:668; SI-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9669; SI-SDAG-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0xd670; SI-SDAG-NEXT: v_mov_b32_e32 v0, 0xc2fc0000671; SI-SDAG-NEXT: v_mov_b32_e32 v1, 0x42800000672; SI-SDAG-NEXT: s_mov_b32 s3, 0xf000673; SI-SDAG-NEXT: s_mov_b32 s2, -1674; SI-SDAG-NEXT: s_waitcnt lgkmcnt(0)675; SI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s7, v0676; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v1, vcc677; SI-SDAG-NEXT: s_and_b64 s[8:9], vcc, exec678; SI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s6, v0679; SI-SDAG-NEXT: v_cndmask_b32_e32 v3, 0, v1, vcc680; SI-SDAG-NEXT: v_add_f32_e32 v2, s7, v2681; SI-SDAG-NEXT: v_add_f32_e32 v3, s6, v3682; SI-SDAG-NEXT: v_exp_f32_e32 v2, v2683; SI-SDAG-NEXT: v_exp_f32_e32 v4, v3684; SI-SDAG-NEXT: s_cselect_b32 s8, 0xffffffc0, 0685; SI-SDAG-NEXT: s_and_b64 s[6:7], vcc, exec686; SI-SDAG-NEXT: s_cselect_b32 s6, 0xffffffc0, 0687; SI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s5, v0688; SI-SDAG-NEXT: v_ldexp_f32_e64 v3, v2, s8689; SI-SDAG-NEXT: v_ldexp_f32_e64 v2, v4, s6690; SI-SDAG-NEXT: v_cndmask_b32_e32 v4, 0, v1, vcc691; SI-SDAG-NEXT: s_and_b64 s[6:7], vcc, exec692; SI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s4, v0693; SI-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc694; SI-SDAG-NEXT: v_add_f32_e32 v4, s5, v4695; SI-SDAG-NEXT: v_add_f32_e32 v0, s4, v0696; SI-SDAG-NEXT: v_exp_f32_e32 v4, v4697; SI-SDAG-NEXT: v_exp_f32_e32 v0, v0698; SI-SDAG-NEXT: s_cselect_b32 s6, 0xffffffc0, 0699; SI-SDAG-NEXT: s_and_b64 s[4:5], vcc, exec700; SI-SDAG-NEXT: s_cselect_b32 s4, 0xffffffc0, 0701; SI-SDAG-NEXT: v_ldexp_f32_e64 v1, v4, s6702; SI-SDAG-NEXT: v_ldexp_f32_e64 v0, v0, s4703; SI-SDAG-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0704; SI-SDAG-NEXT: s_endpgm705;706; SI-GISEL-LABEL: s_exp2_v4f32:707; SI-GISEL: ; %bb.0:708; SI-GISEL-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0xd709; SI-GISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x9710; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0xc2fc0000711; SI-GISEL-NEXT: v_mov_b32_e32 v3, 0x42800000712; SI-GISEL-NEXT: v_not_b32_e32 v4, 63713; SI-GISEL-NEXT: s_waitcnt lgkmcnt(0)714; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s8, v2715; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v3, vcc716; SI-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], s9, v2717; SI-GISEL-NEXT: v_add_f32_e32 v0, s8, v0718; SI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, v3, s[0:1]719; SI-GISEL-NEXT: v_exp_f32_e32 v0, v0720; SI-GISEL-NEXT: v_add_f32_e32 v1, s9, v1721; SI-GISEL-NEXT: v_exp_f32_e32 v1, v1722; SI-GISEL-NEXT: v_cndmask_b32_e32 v5, 0, v4, vcc723; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v5724; SI-GISEL-NEXT: v_cndmask_b32_e64 v5, 0, v4, s[0:1]725; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s10, v2726; SI-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], s11, v2727; SI-GISEL-NEXT: v_ldexp_f32_e32 v1, v1, v5728; SI-GISEL-NEXT: v_cndmask_b32_e32 v5, 0, v3, vcc729; SI-GISEL-NEXT: v_cndmask_b32_e64 v2, 0, v3, s[0:1]730; SI-GISEL-NEXT: v_add_f32_e32 v5, s10, v5731; SI-GISEL-NEXT: v_add_f32_e32 v2, s11, v2732; SI-GISEL-NEXT: v_exp_f32_e32 v5, v5733; SI-GISEL-NEXT: v_exp_f32_e32 v3, v2734; SI-GISEL-NEXT: v_cndmask_b32_e32 v2, 0, v4, vcc735; SI-GISEL-NEXT: v_cndmask_b32_e64 v4, 0, v4, s[0:1]736; SI-GISEL-NEXT: v_ldexp_f32_e32 v2, v5, v2737; SI-GISEL-NEXT: v_ldexp_f32_e32 v3, v3, v4738; SI-GISEL-NEXT: s_mov_b32 s6, -1739; SI-GISEL-NEXT: s_mov_b32 s7, 0xf000740; SI-GISEL-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0741; SI-GISEL-NEXT: s_endpgm742;743; VI-SDAG-LABEL: s_exp2_v4f32:744; VI-SDAG: ; %bb.0:745; VI-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34746; VI-SDAG-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x24747; VI-SDAG-NEXT: v_mov_b32_e32 v0, 0xc2fc0000748; VI-SDAG-NEXT: v_mov_b32_e32 v1, 0x42800000749; VI-SDAG-NEXT: s_waitcnt lgkmcnt(0)750; VI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s3, v0751; VI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v1, vcc752; VI-SDAG-NEXT: s_and_b64 s[6:7], vcc, exec753; VI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s2, v0754; VI-SDAG-NEXT: v_cndmask_b32_e32 v3, 0, v1, vcc755; VI-SDAG-NEXT: v_add_f32_e32 v2, s3, v2756; VI-SDAG-NEXT: v_add_f32_e32 v3, s2, v3757; VI-SDAG-NEXT: v_exp_f32_e32 v2, v2758; VI-SDAG-NEXT: v_exp_f32_e32 v4, v3759; VI-SDAG-NEXT: s_cselect_b32 s6, 0xffffffc0, 0760; VI-SDAG-NEXT: s_and_b64 s[2:3], vcc, exec761; VI-SDAG-NEXT: s_cselect_b32 s2, 0xffffffc0, 0762; VI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s1, v0763; VI-SDAG-NEXT: v_ldexp_f32 v3, v2, s6764; VI-SDAG-NEXT: v_ldexp_f32 v2, v4, s2765; VI-SDAG-NEXT: v_cndmask_b32_e32 v4, 0, v1, vcc766; VI-SDAG-NEXT: s_and_b64 s[2:3], vcc, exec767; VI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s0, v0768; VI-SDAG-NEXT: v_add_f32_e32 v4, s1, v4769; VI-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc770; VI-SDAG-NEXT: v_exp_f32_e32 v4, v4771; VI-SDAG-NEXT: v_add_f32_e32 v0, s0, v0772; VI-SDAG-NEXT: v_exp_f32_e32 v0, v0773; VI-SDAG-NEXT: s_cselect_b32 s2, 0xffffffc0, 0774; VI-SDAG-NEXT: s_and_b64 s[0:1], vcc, exec775; VI-SDAG-NEXT: v_ldexp_f32 v1, v4, s2776; VI-SDAG-NEXT: s_cselect_b32 s0, 0xffffffc0, 0777; VI-SDAG-NEXT: v_mov_b32_e32 v4, s4778; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, s0779; VI-SDAG-NEXT: v_mov_b32_e32 v5, s5780; VI-SDAG-NEXT: flat_store_dwordx4 v[4:5], v[0:3]781; VI-SDAG-NEXT: s_endpgm782;783; VI-GISEL-LABEL: s_exp2_v4f32:784; VI-GISEL: ; %bb.0:785; VI-GISEL-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x34786; VI-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24787; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0xc2fc0000788; VI-GISEL-NEXT: v_mov_b32_e32 v3, 0x42800000789; VI-GISEL-NEXT: v_not_b32_e32 v4, 63790; VI-GISEL-NEXT: s_waitcnt lgkmcnt(0)791; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s8, v2792; VI-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v3, vcc793; VI-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], s9, v2794; VI-GISEL-NEXT: v_add_f32_e32 v0, s8, v0795; VI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, v3, s[0:1]796; VI-GISEL-NEXT: v_exp_f32_e32 v0, v0797; VI-GISEL-NEXT: v_add_f32_e32 v1, s9, v1798; VI-GISEL-NEXT: v_exp_f32_e32 v1, v1799; VI-GISEL-NEXT: v_cndmask_b32_e32 v5, 0, v4, vcc800; VI-GISEL-NEXT: v_ldexp_f32 v0, v0, v5801; VI-GISEL-NEXT: v_cndmask_b32_e64 v5, 0, v4, s[0:1]802; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s10, v2803; VI-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], s11, v2804; VI-GISEL-NEXT: v_ldexp_f32 v1, v1, v5805; VI-GISEL-NEXT: v_cndmask_b32_e32 v5, 0, v3, vcc806; VI-GISEL-NEXT: v_cndmask_b32_e64 v2, 0, v3, s[0:1]807; VI-GISEL-NEXT: v_add_f32_e32 v5, s10, v5808; VI-GISEL-NEXT: v_add_f32_e32 v2, s11, v2809; VI-GISEL-NEXT: v_exp_f32_e32 v5, v5810; VI-GISEL-NEXT: v_exp_f32_e32 v3, v2811; VI-GISEL-NEXT: v_cndmask_b32_e32 v2, 0, v4, vcc812; VI-GISEL-NEXT: v_cndmask_b32_e64 v4, 0, v4, s[0:1]813; VI-GISEL-NEXT: v_ldexp_f32 v2, v5, v2814; VI-GISEL-NEXT: v_ldexp_f32 v3, v3, v4815; VI-GISEL-NEXT: v_mov_b32_e32 v5, s3816; VI-GISEL-NEXT: v_mov_b32_e32 v4, s2817; VI-GISEL-NEXT: flat_store_dwordx4 v[4:5], v[0:3]818; VI-GISEL-NEXT: s_endpgm819;820; GFX900-SDAG-LABEL: s_exp2_v4f32:821; GFX900-SDAG: ; %bb.0:822; GFX900-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34823; GFX900-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x24824; GFX900-SDAG-NEXT: v_mov_b32_e32 v0, 0xc2fc0000825; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, 0x42800000826; GFX900-SDAG-NEXT: v_mov_b32_e32 v4, 0827; GFX900-SDAG-NEXT: s_waitcnt lgkmcnt(0)828; GFX900-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s3, v0829; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v1, vcc830; GFX900-SDAG-NEXT: s_and_b64 s[4:5], vcc, exec831; GFX900-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s2, v0832; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v3, 0, v1, vcc833; GFX900-SDAG-NEXT: v_add_f32_e32 v2, s3, v2834; GFX900-SDAG-NEXT: v_add_f32_e32 v3, s2, v3835; GFX900-SDAG-NEXT: v_exp_f32_e32 v2, v2836; GFX900-SDAG-NEXT: v_exp_f32_e32 v5, v3837; GFX900-SDAG-NEXT: s_cselect_b32 s4, 0xffffffc0, 0838; GFX900-SDAG-NEXT: s_and_b64 s[2:3], vcc, exec839; GFX900-SDAG-NEXT: s_cselect_b32 s2, 0xffffffc0, 0840; GFX900-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s1, v0841; GFX900-SDAG-NEXT: v_ldexp_f32 v3, v2, s4842; GFX900-SDAG-NEXT: v_ldexp_f32 v2, v5, s2843; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v5, 0, v1, vcc844; GFX900-SDAG-NEXT: s_and_b64 s[2:3], vcc, exec845; GFX900-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s0, v0846; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc847; GFX900-SDAG-NEXT: v_add_f32_e32 v5, s1, v5848; GFX900-SDAG-NEXT: v_add_f32_e32 v0, s0, v0849; GFX900-SDAG-NEXT: v_exp_f32_e32 v5, v5850; GFX900-SDAG-NEXT: v_exp_f32_e32 v0, v0851; GFX900-SDAG-NEXT: s_cselect_b32 s2, 0xffffffc0, 0852; GFX900-SDAG-NEXT: s_and_b64 s[0:1], vcc, exec853; GFX900-SDAG-NEXT: s_cselect_b32 s0, 0xffffffc0, 0854; GFX900-SDAG-NEXT: v_ldexp_f32 v1, v5, s2855; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, s0856; GFX900-SDAG-NEXT: global_store_dwordx4 v4, v[0:3], s[6:7]857; GFX900-SDAG-NEXT: s_endpgm858;859; GFX900-GISEL-LABEL: s_exp2_v4f32:860; GFX900-GISEL: ; %bb.0:861; GFX900-GISEL-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x34862; GFX900-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24863; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0xc2fc0000864; GFX900-GISEL-NEXT: v_mov_b32_e32 v3, 0x42800000865; GFX900-GISEL-NEXT: v_not_b32_e32 v4, 63866; GFX900-GISEL-NEXT: s_waitcnt lgkmcnt(0)867; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s8, v2868; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v3, vcc869; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], s9, v2870; GFX900-GISEL-NEXT: v_add_f32_e32 v0, s8, v0871; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, v3, s[0:1]872; GFX900-GISEL-NEXT: v_exp_f32_e32 v0, v0873; GFX900-GISEL-NEXT: v_add_f32_e32 v1, s9, v1874; GFX900-GISEL-NEXT: v_exp_f32_e32 v1, v1875; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v5, 0, v4, vcc876; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v5877; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v5, 0, v4, s[0:1]878; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s10, v2879; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], s11, v2880; GFX900-GISEL-NEXT: v_ldexp_f32 v1, v1, v5881; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v5, 0, v3, vcc882; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v2, 0, v3, s[0:1]883; GFX900-GISEL-NEXT: v_add_f32_e32 v5, s10, v5884; GFX900-GISEL-NEXT: v_add_f32_e32 v2, s11, v2885; GFX900-GISEL-NEXT: v_exp_f32_e32 v5, v5886; GFX900-GISEL-NEXT: v_exp_f32_e32 v3, v2887; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v2, 0, v4, vcc888; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v4, 0, v4, s[0:1]889; GFX900-GISEL-NEXT: v_ldexp_f32 v2, v5, v2890; GFX900-GISEL-NEXT: v_ldexp_f32 v3, v3, v4891; GFX900-GISEL-NEXT: v_mov_b32_e32 v4, 0892; GFX900-GISEL-NEXT: global_store_dwordx4 v4, v[0:3], s[2:3]893; GFX900-GISEL-NEXT: s_endpgm894;895; R600-LABEL: s_exp2_v4f32:896; R600: ; %bb.0:897; R600-NEXT: ALU 33, @4, KC0[CB0:0-32], KC1[]898; R600-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T1.X, 1899; R600-NEXT: CF_END900; R600-NEXT: PAD901; R600-NEXT: ALU clause starting at 4:902; R600-NEXT: SETGT T0.W, literal.x, KC0[4].X,903; R600-NEXT: SETGT * T1.W, literal.x, KC0[3].W,904; R600-NEXT: -1023672320(-1.260000e+02), 0(0.000000e+00)905; R600-NEXT: CNDE * T2.W, PV.W, 0.0, literal.x,906; R600-NEXT: 1115684864(6.400000e+01), 0(0.000000e+00)907; R600-NEXT: ADD T0.Z, KC0[4].X, PV.W,908; R600-NEXT: SETGT T2.W, literal.x, KC0[3].Z,909; R600-NEXT: CNDE * T3.W, T1.W, 0.0, literal.y,910; R600-NEXT: -1023672320(-1.260000e+02), 1115684864(6.400000e+01)911; R600-NEXT: ADD T0.X, KC0[3].W, PS,912; R600-NEXT: CNDE T0.Y, T0.W, 1.0, literal.x,913; R600-NEXT: SETGT T1.Z, literal.y, KC0[3].Y,914; R600-NEXT: CNDE T0.W, PV.W, 0.0, literal.z,915; R600-NEXT: EXP_IEEE * T0.Z, PV.Z,916; R600-NEXT: 528482304(5.421011e-20), -1023672320(-1.260000e+02)917; R600-NEXT: 1115684864(6.400000e+01), 0(0.000000e+00)918; R600-NEXT: ADD T1.X, KC0[3].Z, PV.W,919; R600-NEXT: CNDE T1.Y, T1.W, 1.0, literal.x,920; R600-NEXT: CNDE T2.Z, PV.Z, 0.0, literal.y,921; R600-NEXT: MUL_IEEE T0.W, PS, PV.Y,922; R600-NEXT: EXP_IEEE * T0.X, PV.X,923; R600-NEXT: 528482304(5.421011e-20), 1115684864(6.400000e+01)924; R600-NEXT: ADD T2.Y, KC0[3].Y, PV.Z,925; R600-NEXT: MUL_IEEE T0.Z, PS, PV.Y,926; R600-NEXT: CNDE T1.W, T2.W, 1.0, literal.x,927; R600-NEXT: EXP_IEEE * T0.X, PV.X,928; R600-NEXT: 528482304(5.421011e-20), 0(0.000000e+00)929; R600-NEXT: MUL_IEEE T0.Y, PS, PV.W,930; R600-NEXT: CNDE T1.W, T1.Z, 1.0, literal.x,931; R600-NEXT: EXP_IEEE * T0.X, PV.Y,932; R600-NEXT: 528482304(5.421011e-20), 0(0.000000e+00)933; R600-NEXT: MUL_IEEE T0.X, PS, PV.W,934; R600-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,935; R600-NEXT: 2(2.802597e-45), 0(0.000000e+00)936;937; CM-LABEL: s_exp2_v4f32:938; CM: ; %bb.0:939; CM-NEXT: ALU 43, @4, KC0[CB0:0-32], KC1[]940; CM-NEXT: MEM_RAT_CACHELESS STORE_DWORD T0, T1.X941; CM-NEXT: CF_END942; CM-NEXT: PAD943; CM-NEXT: ALU clause starting at 4:944; CM-NEXT: SETGT * T0.W, literal.x, KC0[4].X,945; CM-NEXT: -1023672320(-1.260000e+02), 0(0.000000e+00)946; CM-NEXT: CNDE T0.Y, PV.W, 0.0, literal.x,947; CM-NEXT: SETGT T0.Z, literal.y, KC0[3].W,948; CM-NEXT: SETGT * T1.W, literal.y, KC0[3].Z,949; CM-NEXT: 1115684864(6.400000e+01), -1023672320(-1.260000e+02)950; CM-NEXT: CNDE T0.X, PV.W, 0.0, literal.x,951; CM-NEXT: CNDE T1.Y, T0.W, 1.0, literal.y,952; CM-NEXT: CNDE T1.Z, PV.Z, 0.0, literal.x,953; CM-NEXT: ADD * T0.W, KC0[4].X, PV.Y,954; CM-NEXT: 1115684864(6.400000e+01), 528482304(5.421011e-20)955; CM-NEXT: EXP_IEEE T0.X (MASKED), T0.W,956; CM-NEXT: EXP_IEEE T0.Y, T0.W,957; CM-NEXT: EXP_IEEE T0.Z (MASKED), T0.W,958; CM-NEXT: EXP_IEEE * T0.W (MASKED), T0.W,959; CM-NEXT: CNDE T1.X, T0.Z, 1.0, literal.x,960; CM-NEXT: SETGT T2.Y, literal.y, KC0[3].Y,961; CM-NEXT: ADD T0.Z, KC0[3].W, T1.Z,962; CM-NEXT: MUL_IEEE * T0.W, PV.Y, T1.Y,963; CM-NEXT: 528482304(5.421011e-20), -1023672320(-1.260000e+02)964; CM-NEXT: EXP_IEEE T0.X (MASKED), T0.Z,965; CM-NEXT: EXP_IEEE T0.Y, T0.Z,966; CM-NEXT: EXP_IEEE T0.Z (MASKED), T0.Z,967; CM-NEXT: EXP_IEEE * T0.W (MASKED), T0.Z,968; CM-NEXT: CNDE T2.X, T2.Y, 0.0, literal.x,969; CM-NEXT: CNDE T1.Y, T1.W, 1.0, literal.y,970; CM-NEXT: MUL_IEEE T0.Z, PV.Y, T1.X,971; CM-NEXT: ADD * T1.W, KC0[3].Z, T0.X, BS:VEC_021/SCL_122972; CM-NEXT: 1115684864(6.400000e+01), 528482304(5.421011e-20)973; CM-NEXT: EXP_IEEE T0.X, T1.W,974; CM-NEXT: EXP_IEEE T0.Y (MASKED), T1.W,975; CM-NEXT: EXP_IEEE T0.Z (MASKED), T1.W,976; CM-NEXT: EXP_IEEE * T0.W (MASKED), T1.W,977; CM-NEXT: MUL_IEEE T0.Y, PV.X, T1.Y,978; CM-NEXT: CNDE T1.Z, T2.Y, 1.0, literal.x,979; CM-NEXT: ADD * T1.W, KC0[3].Y, T2.X,980; CM-NEXT: 528482304(5.421011e-20), 0(0.000000e+00)981; CM-NEXT: EXP_IEEE T0.X, T1.W,982; CM-NEXT: EXP_IEEE T0.Y (MASKED), T1.W,983; CM-NEXT: EXP_IEEE T0.Z (MASKED), T1.W,984; CM-NEXT: EXP_IEEE * T0.W (MASKED), T1.W,985; CM-NEXT: MUL_IEEE * T0.X, PV.X, T1.Z,986; CM-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,987; CM-NEXT: 2(2.802597e-45), 0(0.000000e+00)988 %result = call <4 x float> @llvm.exp2.v4f32(<4 x float> %in)989 store <4 x float> %result, ptr addrspace(1) %out990 ret void991}992 993define float @v_exp2_f32(float %in) {994; SI-SDAG-LABEL: v_exp2_f32:995; SI-SDAG: ; %bb.0:996; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)997; SI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc0000998; SI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v0999; SI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000001000; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1001; SI-SDAG-NEXT: v_add_f32_e32 v0, v0, v21002; SI-SDAG-NEXT: v_exp_f32_e32 v0, v01003; SI-SDAG-NEXT: v_not_b32_e32 v1, 631004; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1005; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v11006; SI-SDAG-NEXT: s_setpc_b64 s[30:31]1007;1008; SI-GISEL-LABEL: v_exp2_f32:1009; SI-GISEL: ; %bb.0:1010; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1011; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00001012; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000001013; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11014; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1015; SI-GISEL-NEXT: v_add_f32_e32 v0, v0, v11016; SI-GISEL-NEXT: v_exp_f32_e32 v0, v01017; SI-GISEL-NEXT: v_not_b32_e32 v1, 631018; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1019; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v11020; SI-GISEL-NEXT: s_setpc_b64 s[30:31]1021;1022; VI-SDAG-LABEL: v_exp2_f32:1023; VI-SDAG: ; %bb.0:1024; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1025; VI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00001026; VI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v01027; VI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000001028; VI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1029; VI-SDAG-NEXT: v_add_f32_e32 v0, v0, v21030; VI-SDAG-NEXT: v_exp_f32_e32 v0, v01031; VI-SDAG-NEXT: v_not_b32_e32 v1, 631032; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1033; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, v11034; VI-SDAG-NEXT: s_setpc_b64 s[30:31]1035;1036; VI-GISEL-LABEL: v_exp2_f32:1037; VI-GISEL: ; %bb.0:1038; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1039; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00001040; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000001041; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11042; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1043; VI-GISEL-NEXT: v_add_f32_e32 v0, v0, v11044; VI-GISEL-NEXT: v_exp_f32_e32 v0, v01045; VI-GISEL-NEXT: v_not_b32_e32 v1, 631046; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1047; VI-GISEL-NEXT: v_ldexp_f32 v0, v0, v11048; VI-GISEL-NEXT: s_setpc_b64 s[30:31]1049;1050; GFX900-SDAG-LABEL: v_exp2_f32:1051; GFX900-SDAG: ; %bb.0:1052; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1053; GFX900-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00001054; GFX900-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v01055; GFX900-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000001056; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1057; GFX900-SDAG-NEXT: v_add_f32_e32 v0, v0, v21058; GFX900-SDAG-NEXT: v_exp_f32_e32 v0, v01059; GFX900-SDAG-NEXT: v_not_b32_e32 v1, 631060; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1061; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, v11062; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]1063;1064; GFX900-GISEL-LABEL: v_exp2_f32:1065; GFX900-GISEL: ; %bb.0:1066; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1067; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00001068; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000001069; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11070; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1071; GFX900-GISEL-NEXT: v_add_f32_e32 v0, v0, v11072; GFX900-GISEL-NEXT: v_exp_f32_e32 v0, v01073; GFX900-GISEL-NEXT: v_not_b32_e32 v1, 631074; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1075; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v11076; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]1077;1078; R600-LABEL: v_exp2_f32:1079; R600: ; %bb.0:1080; R600-NEXT: CF_END1081; R600-NEXT: PAD1082;1083; CM-LABEL: v_exp2_f32:1084; CM: ; %bb.0:1085; CM-NEXT: CF_END1086; CM-NEXT: PAD1087 %result = call float @llvm.exp2.f32(float %in)1088 ret float %result1089}1090 1091define float @v_exp2_fabs_f32(float %in) {1092; SI-SDAG-LABEL: v_exp2_fabs_f32:1093; SI-SDAG: ; %bb.0:1094; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1095; SI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00001096; SI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s41097; SI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000001098; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1099; SI-SDAG-NEXT: v_add_f32_e64 v0, |v0|, v21100; SI-SDAG-NEXT: v_exp_f32_e32 v0, v01101; SI-SDAG-NEXT: v_not_b32_e32 v1, 631102; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1103; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v11104; SI-SDAG-NEXT: s_setpc_b64 s[30:31]1105;1106; SI-GISEL-LABEL: v_exp2_fabs_f32:1107; SI-GISEL: ; %bb.0:1108; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1109; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00001110; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000001111; SI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v11112; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1113; SI-GISEL-NEXT: v_add_f32_e64 v0, |v0|, v11114; SI-GISEL-NEXT: v_exp_f32_e32 v0, v01115; SI-GISEL-NEXT: v_not_b32_e32 v1, 631116; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1117; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v11118; SI-GISEL-NEXT: s_setpc_b64 s[30:31]1119;1120; VI-SDAG-LABEL: v_exp2_fabs_f32:1121; VI-SDAG: ; %bb.0:1122; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1123; VI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00001124; VI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s41125; VI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000001126; VI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1127; VI-SDAG-NEXT: v_add_f32_e64 v0, |v0|, v21128; VI-SDAG-NEXT: v_exp_f32_e32 v0, v01129; VI-SDAG-NEXT: v_not_b32_e32 v1, 631130; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1131; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, v11132; VI-SDAG-NEXT: s_setpc_b64 s[30:31]1133;1134; VI-GISEL-LABEL: v_exp2_fabs_f32:1135; VI-GISEL: ; %bb.0:1136; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1137; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00001138; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000001139; VI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v11140; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1141; VI-GISEL-NEXT: v_add_f32_e64 v0, |v0|, v11142; VI-GISEL-NEXT: v_exp_f32_e32 v0, v01143; VI-GISEL-NEXT: v_not_b32_e32 v1, 631144; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1145; VI-GISEL-NEXT: v_ldexp_f32 v0, v0, v11146; VI-GISEL-NEXT: s_setpc_b64 s[30:31]1147;1148; GFX900-SDAG-LABEL: v_exp2_fabs_f32:1149; GFX900-SDAG: ; %bb.0:1150; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1151; GFX900-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00001152; GFX900-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s41153; GFX900-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000001154; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1155; GFX900-SDAG-NEXT: v_add_f32_e64 v0, |v0|, v21156; GFX900-SDAG-NEXT: v_exp_f32_e32 v0, v01157; GFX900-SDAG-NEXT: v_not_b32_e32 v1, 631158; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1159; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, v11160; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]1161;1162; GFX900-GISEL-LABEL: v_exp2_fabs_f32:1163; GFX900-GISEL: ; %bb.0:1164; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1165; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00001166; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000001167; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v11168; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1169; GFX900-GISEL-NEXT: v_add_f32_e64 v0, |v0|, v11170; GFX900-GISEL-NEXT: v_exp_f32_e32 v0, v01171; GFX900-GISEL-NEXT: v_not_b32_e32 v1, 631172; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1173; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v11174; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]1175;1176; R600-LABEL: v_exp2_fabs_f32:1177; R600: ; %bb.0:1178; R600-NEXT: CF_END1179; R600-NEXT: PAD1180;1181; CM-LABEL: v_exp2_fabs_f32:1182; CM: ; %bb.0:1183; CM-NEXT: CF_END1184; CM-NEXT: PAD1185 %fabs = call float @llvm.fabs.f32(float %in)1186 %result = call float @llvm.exp2.f32(float %fabs)1187 ret float %result1188}1189 1190define float @v_exp2_fneg_fabs_f32(float %in) {1191; SI-SDAG-LABEL: v_exp2_fneg_fabs_f32:1192; SI-SDAG: ; %bb.0:1193; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1194; SI-SDAG-NEXT: s_mov_b32 s4, 0x42fc00001195; SI-SDAG-NEXT: v_cmp_gt_f32_e64 vcc, |v0|, s41196; SI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000001197; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1198; SI-SDAG-NEXT: v_sub_f32_e64 v0, v2, |v0|1199; SI-SDAG-NEXT: v_exp_f32_e32 v0, v01200; SI-SDAG-NEXT: v_not_b32_e32 v1, 631201; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1202; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v11203; SI-SDAG-NEXT: s_setpc_b64 s[30:31]1204;1205; SI-GISEL-LABEL: v_exp2_fneg_fabs_f32:1206; SI-GISEL: ; %bb.0:1207; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1208; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00001209; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000001210; SI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, -|v0|, v11211; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1212; SI-GISEL-NEXT: v_sub_f32_e64 v0, v1, |v0|1213; SI-GISEL-NEXT: v_exp_f32_e32 v0, v01214; SI-GISEL-NEXT: v_not_b32_e32 v1, 631215; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1216; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v11217; SI-GISEL-NEXT: s_setpc_b64 s[30:31]1218;1219; VI-SDAG-LABEL: v_exp2_fneg_fabs_f32:1220; VI-SDAG: ; %bb.0:1221; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1222; VI-SDAG-NEXT: s_mov_b32 s4, 0x42fc00001223; VI-SDAG-NEXT: v_cmp_gt_f32_e64 vcc, |v0|, s41224; VI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000001225; VI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1226; VI-SDAG-NEXT: v_sub_f32_e64 v0, v2, |v0|1227; VI-SDAG-NEXT: v_exp_f32_e32 v0, v01228; VI-SDAG-NEXT: v_not_b32_e32 v1, 631229; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1230; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, v11231; VI-SDAG-NEXT: s_setpc_b64 s[30:31]1232;1233; VI-GISEL-LABEL: v_exp2_fneg_fabs_f32:1234; VI-GISEL: ; %bb.0:1235; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1236; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00001237; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000001238; VI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, -|v0|, v11239; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1240; VI-GISEL-NEXT: v_sub_f32_e64 v0, v1, |v0|1241; VI-GISEL-NEXT: v_exp_f32_e32 v0, v01242; VI-GISEL-NEXT: v_not_b32_e32 v1, 631243; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1244; VI-GISEL-NEXT: v_ldexp_f32 v0, v0, v11245; VI-GISEL-NEXT: s_setpc_b64 s[30:31]1246;1247; GFX900-SDAG-LABEL: v_exp2_fneg_fabs_f32:1248; GFX900-SDAG: ; %bb.0:1249; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1250; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x42fc00001251; GFX900-SDAG-NEXT: v_cmp_gt_f32_e64 vcc, |v0|, s41252; GFX900-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000001253; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1254; GFX900-SDAG-NEXT: v_sub_f32_e64 v0, v2, |v0|1255; GFX900-SDAG-NEXT: v_exp_f32_e32 v0, v01256; GFX900-SDAG-NEXT: v_not_b32_e32 v1, 631257; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1258; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, v11259; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]1260;1261; GFX900-GISEL-LABEL: v_exp2_fneg_fabs_f32:1262; GFX900-GISEL: ; %bb.0:1263; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1264; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00001265; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000001266; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, -|v0|, v11267; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1268; GFX900-GISEL-NEXT: v_sub_f32_e64 v0, v1, |v0|1269; GFX900-GISEL-NEXT: v_exp_f32_e32 v0, v01270; GFX900-GISEL-NEXT: v_not_b32_e32 v1, 631271; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1272; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v11273; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]1274;1275; R600-LABEL: v_exp2_fneg_fabs_f32:1276; R600: ; %bb.0:1277; R600-NEXT: CF_END1278; R600-NEXT: PAD1279;1280; CM-LABEL: v_exp2_fneg_fabs_f32:1281; CM: ; %bb.0:1282; CM-NEXT: CF_END1283; CM-NEXT: PAD1284 %fabs = call float @llvm.fabs.f32(float %in)1285 %fneg.fabs = fneg float %fabs1286 %result = call float @llvm.exp2.f32(float %fneg.fabs)1287 ret float %result1288}1289 1290define float @v_exp2_fneg_f32(float %in) {1291; SI-SDAG-LABEL: v_exp2_fneg_f32:1292; SI-SDAG: ; %bb.0:1293; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1294; SI-SDAG-NEXT: s_mov_b32 s4, 0x42fc00001295; SI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s4, v01296; SI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000001297; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1298; SI-SDAG-NEXT: v_sub_f32_e32 v0, v2, v01299; SI-SDAG-NEXT: v_exp_f32_e32 v0, v01300; SI-SDAG-NEXT: v_not_b32_e32 v1, 631301; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1302; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v11303; SI-SDAG-NEXT: s_setpc_b64 s[30:31]1304;1305; SI-GISEL-LABEL: v_exp2_fneg_f32:1306; SI-GISEL: ; %bb.0:1307; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1308; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00001309; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000001310; SI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, -v0, v11311; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1312; SI-GISEL-NEXT: v_sub_f32_e32 v0, v1, v01313; SI-GISEL-NEXT: v_exp_f32_e32 v0, v01314; SI-GISEL-NEXT: v_not_b32_e32 v1, 631315; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1316; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v11317; SI-GISEL-NEXT: s_setpc_b64 s[30:31]1318;1319; VI-SDAG-LABEL: v_exp2_fneg_f32:1320; VI-SDAG: ; %bb.0:1321; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1322; VI-SDAG-NEXT: s_mov_b32 s4, 0x42fc00001323; VI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s4, v01324; VI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000001325; VI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1326; VI-SDAG-NEXT: v_sub_f32_e32 v0, v2, v01327; VI-SDAG-NEXT: v_exp_f32_e32 v0, v01328; VI-SDAG-NEXT: v_not_b32_e32 v1, 631329; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1330; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, v11331; VI-SDAG-NEXT: s_setpc_b64 s[30:31]1332;1333; VI-GISEL-LABEL: v_exp2_fneg_f32:1334; VI-GISEL: ; %bb.0:1335; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1336; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00001337; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000001338; VI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, -v0, v11339; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1340; VI-GISEL-NEXT: v_sub_f32_e32 v0, v1, v01341; VI-GISEL-NEXT: v_exp_f32_e32 v0, v01342; VI-GISEL-NEXT: v_not_b32_e32 v1, 631343; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1344; VI-GISEL-NEXT: v_ldexp_f32 v0, v0, v11345; VI-GISEL-NEXT: s_setpc_b64 s[30:31]1346;1347; GFX900-SDAG-LABEL: v_exp2_fneg_f32:1348; GFX900-SDAG: ; %bb.0:1349; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1350; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x42fc00001351; GFX900-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s4, v01352; GFX900-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000001353; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1354; GFX900-SDAG-NEXT: v_sub_f32_e32 v0, v2, v01355; GFX900-SDAG-NEXT: v_exp_f32_e32 v0, v01356; GFX900-SDAG-NEXT: v_not_b32_e32 v1, 631357; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1358; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, v11359; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]1360;1361; GFX900-GISEL-LABEL: v_exp2_fneg_f32:1362; GFX900-GISEL: ; %bb.0:1363; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1364; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00001365; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000001366; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, -v0, v11367; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1368; GFX900-GISEL-NEXT: v_sub_f32_e32 v0, v1, v01369; GFX900-GISEL-NEXT: v_exp_f32_e32 v0, v01370; GFX900-GISEL-NEXT: v_not_b32_e32 v1, 631371; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1372; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v11373; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]1374;1375; R600-LABEL: v_exp2_fneg_f32:1376; R600: ; %bb.0:1377; R600-NEXT: CF_END1378; R600-NEXT: PAD1379;1380; CM-LABEL: v_exp2_fneg_f32:1381; CM: ; %bb.0:1382; CM-NEXT: CF_END1383; CM-NEXT: PAD1384 %fneg = fneg float %in1385 %result = call float @llvm.exp2.f32(float %fneg)1386 ret float %result1387}1388 1389define float @v_exp2_f32_fast(float %in) {1390; SI-SDAG-LABEL: v_exp2_f32_fast:1391; SI-SDAG: ; %bb.0:1392; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1393; SI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00001394; SI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v01395; SI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000001396; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1397; SI-SDAG-NEXT: v_add_f32_e32 v0, v0, v21398; SI-SDAG-NEXT: v_exp_f32_e32 v0, v01399; SI-SDAG-NEXT: v_not_b32_e32 v1, 631400; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1401; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v11402; SI-SDAG-NEXT: s_setpc_b64 s[30:31]1403;1404; SI-GISEL-LABEL: v_exp2_f32_fast:1405; SI-GISEL: ; %bb.0:1406; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1407; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00001408; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000001409; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11410; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1411; SI-GISEL-NEXT: v_add_f32_e32 v0, v0, v11412; SI-GISEL-NEXT: v_exp_f32_e32 v0, v01413; SI-GISEL-NEXT: v_not_b32_e32 v1, 631414; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1415; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v11416; SI-GISEL-NEXT: s_setpc_b64 s[30:31]1417;1418; VI-SDAG-LABEL: v_exp2_f32_fast:1419; VI-SDAG: ; %bb.0:1420; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1421; VI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00001422; VI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v01423; VI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000001424; VI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1425; VI-SDAG-NEXT: v_add_f32_e32 v0, v0, v21426; VI-SDAG-NEXT: v_exp_f32_e32 v0, v01427; VI-SDAG-NEXT: v_not_b32_e32 v1, 631428; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1429; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, v11430; VI-SDAG-NEXT: s_setpc_b64 s[30:31]1431;1432; VI-GISEL-LABEL: v_exp2_f32_fast:1433; VI-GISEL: ; %bb.0:1434; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1435; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00001436; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000001437; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11438; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1439; VI-GISEL-NEXT: v_add_f32_e32 v0, v0, v11440; VI-GISEL-NEXT: v_exp_f32_e32 v0, v01441; VI-GISEL-NEXT: v_not_b32_e32 v1, 631442; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1443; VI-GISEL-NEXT: v_ldexp_f32 v0, v0, v11444; VI-GISEL-NEXT: s_setpc_b64 s[30:31]1445;1446; GFX900-SDAG-LABEL: v_exp2_f32_fast:1447; GFX900-SDAG: ; %bb.0:1448; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1449; GFX900-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00001450; GFX900-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v01451; GFX900-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000001452; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1453; GFX900-SDAG-NEXT: v_add_f32_e32 v0, v0, v21454; GFX900-SDAG-NEXT: v_exp_f32_e32 v0, v01455; GFX900-SDAG-NEXT: v_not_b32_e32 v1, 631456; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1457; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, v11458; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]1459;1460; GFX900-GISEL-LABEL: v_exp2_f32_fast:1461; GFX900-GISEL: ; %bb.0:1462; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1463; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00001464; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000001465; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11466; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1467; GFX900-GISEL-NEXT: v_add_f32_e32 v0, v0, v11468; GFX900-GISEL-NEXT: v_exp_f32_e32 v0, v01469; GFX900-GISEL-NEXT: v_not_b32_e32 v1, 631470; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1471; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v11472; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]1473;1474; R600-LABEL: v_exp2_f32_fast:1475; R600: ; %bb.0:1476; R600-NEXT: CF_END1477; R600-NEXT: PAD1478;1479; CM-LABEL: v_exp2_f32_fast:1480; CM: ; %bb.0:1481; CM-NEXT: CF_END1482; CM-NEXT: PAD1483 %result = call fast float @llvm.exp2.f32(float %in)1484 ret float %result1485}1486 1487define float @v_exp2_f32_unsafe_math_attr(float %in) {1488; SI-SDAG-LABEL: v_exp2_f32_unsafe_math_attr:1489; SI-SDAG: ; %bb.0:1490; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1491; SI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00001492; SI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v01493; SI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000001494; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1495; SI-SDAG-NEXT: v_add_f32_e32 v0, v0, v21496; SI-SDAG-NEXT: v_exp_f32_e32 v0, v01497; SI-SDAG-NEXT: v_not_b32_e32 v1, 631498; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1499; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v11500; SI-SDAG-NEXT: s_setpc_b64 s[30:31]1501;1502; SI-GISEL-LABEL: v_exp2_f32_unsafe_math_attr:1503; SI-GISEL: ; %bb.0:1504; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1505; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00001506; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000001507; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11508; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1509; SI-GISEL-NEXT: v_add_f32_e32 v0, v0, v11510; SI-GISEL-NEXT: v_exp_f32_e32 v0, v01511; SI-GISEL-NEXT: v_not_b32_e32 v1, 631512; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1513; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v11514; SI-GISEL-NEXT: s_setpc_b64 s[30:31]1515;1516; VI-SDAG-LABEL: v_exp2_f32_unsafe_math_attr:1517; VI-SDAG: ; %bb.0:1518; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1519; VI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00001520; VI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v01521; VI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000001522; VI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1523; VI-SDAG-NEXT: v_add_f32_e32 v0, v0, v21524; VI-SDAG-NEXT: v_exp_f32_e32 v0, v01525; VI-SDAG-NEXT: v_not_b32_e32 v1, 631526; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1527; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, v11528; VI-SDAG-NEXT: s_setpc_b64 s[30:31]1529;1530; VI-GISEL-LABEL: v_exp2_f32_unsafe_math_attr:1531; VI-GISEL: ; %bb.0:1532; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1533; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00001534; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000001535; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11536; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1537; VI-GISEL-NEXT: v_add_f32_e32 v0, v0, v11538; VI-GISEL-NEXT: v_exp_f32_e32 v0, v01539; VI-GISEL-NEXT: v_not_b32_e32 v1, 631540; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1541; VI-GISEL-NEXT: v_ldexp_f32 v0, v0, v11542; VI-GISEL-NEXT: s_setpc_b64 s[30:31]1543;1544; GFX900-SDAG-LABEL: v_exp2_f32_unsafe_math_attr:1545; GFX900-SDAG: ; %bb.0:1546; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1547; GFX900-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00001548; GFX900-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v01549; GFX900-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000001550; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1551; GFX900-SDAG-NEXT: v_add_f32_e32 v0, v0, v21552; GFX900-SDAG-NEXT: v_exp_f32_e32 v0, v01553; GFX900-SDAG-NEXT: v_not_b32_e32 v1, 631554; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1555; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, v11556; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]1557;1558; GFX900-GISEL-LABEL: v_exp2_f32_unsafe_math_attr:1559; GFX900-GISEL: ; %bb.0:1560; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1561; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00001562; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000001563; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11564; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1565; GFX900-GISEL-NEXT: v_add_f32_e32 v0, v0, v11566; GFX900-GISEL-NEXT: v_exp_f32_e32 v0, v01567; GFX900-GISEL-NEXT: v_not_b32_e32 v1, 631568; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1569; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v11570; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]1571;1572; R600-LABEL: v_exp2_f32_unsafe_math_attr:1573; R600: ; %bb.0:1574; R600-NEXT: CF_END1575; R600-NEXT: PAD1576;1577; CM-LABEL: v_exp2_f32_unsafe_math_attr:1578; CM: ; %bb.0:1579; CM-NEXT: CF_END1580; CM-NEXT: PAD1581 %result = call float @llvm.exp2.f32(float %in)1582 ret float %result1583}1584 1585define float @v_exp2_f32_ninf(float %in) {1586; SI-SDAG-LABEL: v_exp2_f32_ninf:1587; SI-SDAG: ; %bb.0:1588; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1589; SI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00001590; SI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v01591; SI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000001592; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1593; SI-SDAG-NEXT: v_add_f32_e32 v0, v0, v21594; SI-SDAG-NEXT: v_exp_f32_e32 v0, v01595; SI-SDAG-NEXT: v_not_b32_e32 v1, 631596; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1597; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v11598; SI-SDAG-NEXT: s_setpc_b64 s[30:31]1599;1600; SI-GISEL-LABEL: v_exp2_f32_ninf:1601; SI-GISEL: ; %bb.0:1602; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1603; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00001604; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000001605; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11606; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1607; SI-GISEL-NEXT: v_add_f32_e32 v0, v0, v11608; SI-GISEL-NEXT: v_exp_f32_e32 v0, v01609; SI-GISEL-NEXT: v_not_b32_e32 v1, 631610; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1611; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v11612; SI-GISEL-NEXT: s_setpc_b64 s[30:31]1613;1614; VI-SDAG-LABEL: v_exp2_f32_ninf:1615; VI-SDAG: ; %bb.0:1616; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1617; VI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00001618; VI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v01619; VI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000001620; VI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1621; VI-SDAG-NEXT: v_add_f32_e32 v0, v0, v21622; VI-SDAG-NEXT: v_exp_f32_e32 v0, v01623; VI-SDAG-NEXT: v_not_b32_e32 v1, 631624; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1625; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, v11626; VI-SDAG-NEXT: s_setpc_b64 s[30:31]1627;1628; VI-GISEL-LABEL: v_exp2_f32_ninf:1629; VI-GISEL: ; %bb.0:1630; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1631; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00001632; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000001633; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11634; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1635; VI-GISEL-NEXT: v_add_f32_e32 v0, v0, v11636; VI-GISEL-NEXT: v_exp_f32_e32 v0, v01637; VI-GISEL-NEXT: v_not_b32_e32 v1, 631638; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1639; VI-GISEL-NEXT: v_ldexp_f32 v0, v0, v11640; VI-GISEL-NEXT: s_setpc_b64 s[30:31]1641;1642; GFX900-SDAG-LABEL: v_exp2_f32_ninf:1643; GFX900-SDAG: ; %bb.0:1644; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1645; GFX900-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00001646; GFX900-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v01647; GFX900-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000001648; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1649; GFX900-SDAG-NEXT: v_add_f32_e32 v0, v0, v21650; GFX900-SDAG-NEXT: v_exp_f32_e32 v0, v01651; GFX900-SDAG-NEXT: v_not_b32_e32 v1, 631652; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1653; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, v11654; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]1655;1656; GFX900-GISEL-LABEL: v_exp2_f32_ninf:1657; GFX900-GISEL: ; %bb.0:1658; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1659; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00001660; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000001661; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11662; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1663; GFX900-GISEL-NEXT: v_add_f32_e32 v0, v0, v11664; GFX900-GISEL-NEXT: v_exp_f32_e32 v0, v01665; GFX900-GISEL-NEXT: v_not_b32_e32 v1, 631666; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1667; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v11668; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]1669;1670; R600-LABEL: v_exp2_f32_ninf:1671; R600: ; %bb.0:1672; R600-NEXT: CF_END1673; R600-NEXT: PAD1674;1675; CM-LABEL: v_exp2_f32_ninf:1676; CM: ; %bb.0:1677; CM-NEXT: CF_END1678; CM-NEXT: PAD1679 %result = call ninf float @llvm.exp2.f32(float %in)1680 ret float %result1681}1682 1683define float @v_exp2_f32_afn(float %in) {1684; SI-SDAG-LABEL: v_exp2_f32_afn:1685; SI-SDAG: ; %bb.0:1686; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1687; SI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00001688; SI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v01689; SI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000001690; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1691; SI-SDAG-NEXT: v_add_f32_e32 v0, v0, v21692; SI-SDAG-NEXT: v_exp_f32_e32 v0, v01693; SI-SDAG-NEXT: v_not_b32_e32 v1, 631694; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1695; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v11696; SI-SDAG-NEXT: s_setpc_b64 s[30:31]1697;1698; SI-GISEL-LABEL: v_exp2_f32_afn:1699; SI-GISEL: ; %bb.0:1700; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1701; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00001702; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000001703; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11704; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1705; SI-GISEL-NEXT: v_add_f32_e32 v0, v0, v11706; SI-GISEL-NEXT: v_exp_f32_e32 v0, v01707; SI-GISEL-NEXT: v_not_b32_e32 v1, 631708; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1709; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v11710; SI-GISEL-NEXT: s_setpc_b64 s[30:31]1711;1712; VI-SDAG-LABEL: v_exp2_f32_afn:1713; VI-SDAG: ; %bb.0:1714; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1715; VI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00001716; VI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v01717; VI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000001718; VI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1719; VI-SDAG-NEXT: v_add_f32_e32 v0, v0, v21720; VI-SDAG-NEXT: v_exp_f32_e32 v0, v01721; VI-SDAG-NEXT: v_not_b32_e32 v1, 631722; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1723; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, v11724; VI-SDAG-NEXT: s_setpc_b64 s[30:31]1725;1726; VI-GISEL-LABEL: v_exp2_f32_afn:1727; VI-GISEL: ; %bb.0:1728; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1729; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00001730; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000001731; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11732; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1733; VI-GISEL-NEXT: v_add_f32_e32 v0, v0, v11734; VI-GISEL-NEXT: v_exp_f32_e32 v0, v01735; VI-GISEL-NEXT: v_not_b32_e32 v1, 631736; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1737; VI-GISEL-NEXT: v_ldexp_f32 v0, v0, v11738; VI-GISEL-NEXT: s_setpc_b64 s[30:31]1739;1740; GFX900-SDAG-LABEL: v_exp2_f32_afn:1741; GFX900-SDAG: ; %bb.0:1742; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1743; GFX900-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00001744; GFX900-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v01745; GFX900-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000001746; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1747; GFX900-SDAG-NEXT: v_add_f32_e32 v0, v0, v21748; GFX900-SDAG-NEXT: v_exp_f32_e32 v0, v01749; GFX900-SDAG-NEXT: v_not_b32_e32 v1, 631750; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1751; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, v11752; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]1753;1754; GFX900-GISEL-LABEL: v_exp2_f32_afn:1755; GFX900-GISEL: ; %bb.0:1756; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1757; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00001758; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000001759; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11760; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1761; GFX900-GISEL-NEXT: v_add_f32_e32 v0, v0, v11762; GFX900-GISEL-NEXT: v_exp_f32_e32 v0, v01763; GFX900-GISEL-NEXT: v_not_b32_e32 v1, 631764; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1765; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v11766; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]1767;1768; R600-LABEL: v_exp2_f32_afn:1769; R600: ; %bb.0:1770; R600-NEXT: CF_END1771; R600-NEXT: PAD1772;1773; CM-LABEL: v_exp2_f32_afn:1774; CM: ; %bb.0:1775; CM-NEXT: CF_END1776; CM-NEXT: PAD1777 %result = call afn float @llvm.exp2.f32(float %in)1778 ret float %result1779}1780 1781define float @v_exp2_f32_afn_daz(float %in) #0 {1782; GCN-LABEL: v_exp2_f32_afn_daz:1783; GCN: ; %bb.0:1784; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1785; GCN-NEXT: v_exp_f32_e32 v0, v01786; GCN-NEXT: s_setpc_b64 s[30:31]1787;1788; R600-LABEL: v_exp2_f32_afn_daz:1789; R600: ; %bb.0:1790; R600-NEXT: CF_END1791; R600-NEXT: PAD1792;1793; CM-LABEL: v_exp2_f32_afn_daz:1794; CM: ; %bb.0:1795; CM-NEXT: CF_END1796; CM-NEXT: PAD1797 %result = call afn float @llvm.exp2.f32(float %in)1798 ret float %result1799}1800 1801define float @v_exp2_f32_afn_dynamic(float %in) #1 {1802; SI-SDAG-LABEL: v_exp2_f32_afn_dynamic:1803; SI-SDAG: ; %bb.0:1804; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1805; SI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00001806; SI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v01807; SI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000001808; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1809; SI-SDAG-NEXT: v_add_f32_e32 v0, v0, v21810; SI-SDAG-NEXT: v_exp_f32_e32 v0, v01811; SI-SDAG-NEXT: v_not_b32_e32 v1, 631812; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1813; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v11814; SI-SDAG-NEXT: s_setpc_b64 s[30:31]1815;1816; SI-GISEL-LABEL: v_exp2_f32_afn_dynamic:1817; SI-GISEL: ; %bb.0:1818; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1819; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00001820; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000001821; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11822; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1823; SI-GISEL-NEXT: v_add_f32_e32 v0, v0, v11824; SI-GISEL-NEXT: v_exp_f32_e32 v0, v01825; SI-GISEL-NEXT: v_not_b32_e32 v1, 631826; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1827; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v11828; SI-GISEL-NEXT: s_setpc_b64 s[30:31]1829;1830; VI-SDAG-LABEL: v_exp2_f32_afn_dynamic:1831; VI-SDAG: ; %bb.0:1832; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1833; VI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00001834; VI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v01835; VI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000001836; VI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1837; VI-SDAG-NEXT: v_add_f32_e32 v0, v0, v21838; VI-SDAG-NEXT: v_exp_f32_e32 v0, v01839; VI-SDAG-NEXT: v_not_b32_e32 v1, 631840; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1841; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, v11842; VI-SDAG-NEXT: s_setpc_b64 s[30:31]1843;1844; VI-GISEL-LABEL: v_exp2_f32_afn_dynamic:1845; VI-GISEL: ; %bb.0:1846; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1847; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00001848; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000001849; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11850; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1851; VI-GISEL-NEXT: v_add_f32_e32 v0, v0, v11852; VI-GISEL-NEXT: v_exp_f32_e32 v0, v01853; VI-GISEL-NEXT: v_not_b32_e32 v1, 631854; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1855; VI-GISEL-NEXT: v_ldexp_f32 v0, v0, v11856; VI-GISEL-NEXT: s_setpc_b64 s[30:31]1857;1858; GFX900-SDAG-LABEL: v_exp2_f32_afn_dynamic:1859; GFX900-SDAG: ; %bb.0:1860; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1861; GFX900-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00001862; GFX900-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v01863; GFX900-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000001864; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1865; GFX900-SDAG-NEXT: v_add_f32_e32 v0, v0, v21866; GFX900-SDAG-NEXT: v_exp_f32_e32 v0, v01867; GFX900-SDAG-NEXT: v_not_b32_e32 v1, 631868; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1869; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, v11870; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]1871;1872; GFX900-GISEL-LABEL: v_exp2_f32_afn_dynamic:1873; GFX900-GISEL: ; %bb.0:1874; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1875; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00001876; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000001877; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11878; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1879; GFX900-GISEL-NEXT: v_add_f32_e32 v0, v0, v11880; GFX900-GISEL-NEXT: v_exp_f32_e32 v0, v01881; GFX900-GISEL-NEXT: v_not_b32_e32 v1, 631882; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1883; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v11884; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]1885;1886; R600-LABEL: v_exp2_f32_afn_dynamic:1887; R600: ; %bb.0:1888; R600-NEXT: CF_END1889; R600-NEXT: PAD1890;1891; CM-LABEL: v_exp2_f32_afn_dynamic:1892; CM: ; %bb.0:1893; CM-NEXT: CF_END1894; CM-NEXT: PAD1895 %result = call afn float @llvm.exp2.f32(float %in)1896 ret float %result1897}1898 1899define float @v_fabs_exp2_f32_afn(float %in) {1900; SI-SDAG-LABEL: v_fabs_exp2_f32_afn:1901; SI-SDAG: ; %bb.0:1902; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1903; SI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00001904; SI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s41905; SI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000001906; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1907; SI-SDAG-NEXT: v_add_f32_e64 v0, |v0|, v21908; SI-SDAG-NEXT: v_exp_f32_e32 v0, v01909; SI-SDAG-NEXT: v_not_b32_e32 v1, 631910; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1911; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v11912; SI-SDAG-NEXT: s_setpc_b64 s[30:31]1913;1914; SI-GISEL-LABEL: v_fabs_exp2_f32_afn:1915; SI-GISEL: ; %bb.0:1916; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1917; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00001918; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000001919; SI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v11920; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1921; SI-GISEL-NEXT: v_add_f32_e64 v0, |v0|, v11922; SI-GISEL-NEXT: v_exp_f32_e32 v0, v01923; SI-GISEL-NEXT: v_not_b32_e32 v1, 631924; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1925; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v11926; SI-GISEL-NEXT: s_setpc_b64 s[30:31]1927;1928; VI-SDAG-LABEL: v_fabs_exp2_f32_afn:1929; VI-SDAG: ; %bb.0:1930; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1931; VI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00001932; VI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s41933; VI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000001934; VI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1935; VI-SDAG-NEXT: v_add_f32_e64 v0, |v0|, v21936; VI-SDAG-NEXT: v_exp_f32_e32 v0, v01937; VI-SDAG-NEXT: v_not_b32_e32 v1, 631938; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1939; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, v11940; VI-SDAG-NEXT: s_setpc_b64 s[30:31]1941;1942; VI-GISEL-LABEL: v_fabs_exp2_f32_afn:1943; VI-GISEL: ; %bb.0:1944; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1945; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00001946; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000001947; VI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v11948; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1949; VI-GISEL-NEXT: v_add_f32_e64 v0, |v0|, v11950; VI-GISEL-NEXT: v_exp_f32_e32 v0, v01951; VI-GISEL-NEXT: v_not_b32_e32 v1, 631952; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1953; VI-GISEL-NEXT: v_ldexp_f32 v0, v0, v11954; VI-GISEL-NEXT: s_setpc_b64 s[30:31]1955;1956; GFX900-SDAG-LABEL: v_fabs_exp2_f32_afn:1957; GFX900-SDAG: ; %bb.0:1958; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1959; GFX900-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00001960; GFX900-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s41961; GFX900-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000001962; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc1963; GFX900-SDAG-NEXT: v_add_f32_e64 v0, |v0|, v21964; GFX900-SDAG-NEXT: v_exp_f32_e32 v0, v01965; GFX900-SDAG-NEXT: v_not_b32_e32 v1, 631966; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1967; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, v11968; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]1969;1970; GFX900-GISEL-LABEL: v_fabs_exp2_f32_afn:1971; GFX900-GISEL: ; %bb.0:1972; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1973; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00001974; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000001975; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v11976; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc1977; GFX900-GISEL-NEXT: v_add_f32_e64 v0, |v0|, v11978; GFX900-GISEL-NEXT: v_exp_f32_e32 v0, v01979; GFX900-GISEL-NEXT: v_not_b32_e32 v1, 631980; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc1981; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v11982; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]1983;1984; R600-LABEL: v_fabs_exp2_f32_afn:1985; R600: ; %bb.0:1986; R600-NEXT: CF_END1987; R600-NEXT: PAD1988;1989; CM-LABEL: v_fabs_exp2_f32_afn:1990; CM: ; %bb.0:1991; CM-NEXT: CF_END1992; CM-NEXT: PAD1993 %fabs = call float @llvm.fabs.f32(float %in)1994 %result = call afn float @llvm.exp2.f32(float %fabs)1995 ret float %result1996}1997 1998define float @v_exp2_f32_daz(float %in) #0 {1999; GCN-LABEL: v_exp2_f32_daz:2000; GCN: ; %bb.0:2001; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2002; GCN-NEXT: v_exp_f32_e32 v0, v02003; GCN-NEXT: s_setpc_b64 s[30:31]2004;2005; R600-LABEL: v_exp2_f32_daz:2006; R600: ; %bb.0:2007; R600-NEXT: CF_END2008; R600-NEXT: PAD2009;2010; CM-LABEL: v_exp2_f32_daz:2011; CM: ; %bb.0:2012; CM-NEXT: CF_END2013; CM-NEXT: PAD2014 %result = call float @llvm.exp2.f32(float %in)2015 ret float %result2016}2017 2018define float @v_exp2_f32_nnan(float %in) {2019; SI-SDAG-LABEL: v_exp2_f32_nnan:2020; SI-SDAG: ; %bb.0:2021; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2022; SI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00002023; SI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02024; SI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000002025; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc2026; SI-SDAG-NEXT: v_add_f32_e32 v0, v0, v22027; SI-SDAG-NEXT: v_exp_f32_e32 v0, v02028; SI-SDAG-NEXT: v_not_b32_e32 v1, 632029; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2030; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v12031; SI-SDAG-NEXT: s_setpc_b64 s[30:31]2032;2033; SI-GISEL-LABEL: v_exp2_f32_nnan:2034; SI-GISEL: ; %bb.0:2035; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2036; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00002037; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000002038; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v12039; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc2040; SI-GISEL-NEXT: v_add_f32_e32 v0, v0, v12041; SI-GISEL-NEXT: v_exp_f32_e32 v0, v02042; SI-GISEL-NEXT: v_not_b32_e32 v1, 632043; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2044; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v12045; SI-GISEL-NEXT: s_setpc_b64 s[30:31]2046;2047; VI-SDAG-LABEL: v_exp2_f32_nnan:2048; VI-SDAG: ; %bb.0:2049; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2050; VI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00002051; VI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02052; VI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000002053; VI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc2054; VI-SDAG-NEXT: v_add_f32_e32 v0, v0, v22055; VI-SDAG-NEXT: v_exp_f32_e32 v0, v02056; VI-SDAG-NEXT: v_not_b32_e32 v1, 632057; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2058; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, v12059; VI-SDAG-NEXT: s_setpc_b64 s[30:31]2060;2061; VI-GISEL-LABEL: v_exp2_f32_nnan:2062; VI-GISEL: ; %bb.0:2063; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2064; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00002065; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000002066; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v12067; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc2068; VI-GISEL-NEXT: v_add_f32_e32 v0, v0, v12069; VI-GISEL-NEXT: v_exp_f32_e32 v0, v02070; VI-GISEL-NEXT: v_not_b32_e32 v1, 632071; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2072; VI-GISEL-NEXT: v_ldexp_f32 v0, v0, v12073; VI-GISEL-NEXT: s_setpc_b64 s[30:31]2074;2075; GFX900-SDAG-LABEL: v_exp2_f32_nnan:2076; GFX900-SDAG: ; %bb.0:2077; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2078; GFX900-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00002079; GFX900-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02080; GFX900-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000002081; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc2082; GFX900-SDAG-NEXT: v_add_f32_e32 v0, v0, v22083; GFX900-SDAG-NEXT: v_exp_f32_e32 v0, v02084; GFX900-SDAG-NEXT: v_not_b32_e32 v1, 632085; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2086; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, v12087; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]2088;2089; GFX900-GISEL-LABEL: v_exp2_f32_nnan:2090; GFX900-GISEL: ; %bb.0:2091; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2092; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00002093; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000002094; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v12095; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc2096; GFX900-GISEL-NEXT: v_add_f32_e32 v0, v0, v12097; GFX900-GISEL-NEXT: v_exp_f32_e32 v0, v02098; GFX900-GISEL-NEXT: v_not_b32_e32 v1, 632099; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2100; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v12101; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]2102;2103; R600-LABEL: v_exp2_f32_nnan:2104; R600: ; %bb.0:2105; R600-NEXT: CF_END2106; R600-NEXT: PAD2107;2108; CM-LABEL: v_exp2_f32_nnan:2109; CM: ; %bb.0:2110; CM-NEXT: CF_END2111; CM-NEXT: PAD2112 %result = call nnan float @llvm.exp2.f32(float %in)2113 ret float %result2114}2115 2116define float @v_exp2_f32_nnan_daz(float %in) #0 {2117; GCN-LABEL: v_exp2_f32_nnan_daz:2118; GCN: ; %bb.0:2119; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2120; GCN-NEXT: v_exp_f32_e32 v0, v02121; GCN-NEXT: s_setpc_b64 s[30:31]2122;2123; R600-LABEL: v_exp2_f32_nnan_daz:2124; R600: ; %bb.0:2125; R600-NEXT: CF_END2126; R600-NEXT: PAD2127;2128; CM-LABEL: v_exp2_f32_nnan_daz:2129; CM: ; %bb.0:2130; CM-NEXT: CF_END2131; CM-NEXT: PAD2132 %result = call nnan float @llvm.exp2.f32(float %in)2133 ret float %result2134}2135 2136define float @v_exp2_f32_nnan_dynamic(float %in) #1 {2137; SI-SDAG-LABEL: v_exp2_f32_nnan_dynamic:2138; SI-SDAG: ; %bb.0:2139; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2140; SI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00002141; SI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02142; SI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000002143; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc2144; SI-SDAG-NEXT: v_add_f32_e32 v0, v0, v22145; SI-SDAG-NEXT: v_exp_f32_e32 v0, v02146; SI-SDAG-NEXT: v_not_b32_e32 v1, 632147; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2148; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v12149; SI-SDAG-NEXT: s_setpc_b64 s[30:31]2150;2151; SI-GISEL-LABEL: v_exp2_f32_nnan_dynamic:2152; SI-GISEL: ; %bb.0:2153; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2154; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00002155; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000002156; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v12157; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc2158; SI-GISEL-NEXT: v_add_f32_e32 v0, v0, v12159; SI-GISEL-NEXT: v_exp_f32_e32 v0, v02160; SI-GISEL-NEXT: v_not_b32_e32 v1, 632161; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2162; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v12163; SI-GISEL-NEXT: s_setpc_b64 s[30:31]2164;2165; VI-SDAG-LABEL: v_exp2_f32_nnan_dynamic:2166; VI-SDAG: ; %bb.0:2167; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2168; VI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00002169; VI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02170; VI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000002171; VI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc2172; VI-SDAG-NEXT: v_add_f32_e32 v0, v0, v22173; VI-SDAG-NEXT: v_exp_f32_e32 v0, v02174; VI-SDAG-NEXT: v_not_b32_e32 v1, 632175; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2176; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, v12177; VI-SDAG-NEXT: s_setpc_b64 s[30:31]2178;2179; VI-GISEL-LABEL: v_exp2_f32_nnan_dynamic:2180; VI-GISEL: ; %bb.0:2181; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2182; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00002183; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000002184; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v12185; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc2186; VI-GISEL-NEXT: v_add_f32_e32 v0, v0, v12187; VI-GISEL-NEXT: v_exp_f32_e32 v0, v02188; VI-GISEL-NEXT: v_not_b32_e32 v1, 632189; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2190; VI-GISEL-NEXT: v_ldexp_f32 v0, v0, v12191; VI-GISEL-NEXT: s_setpc_b64 s[30:31]2192;2193; GFX900-SDAG-LABEL: v_exp2_f32_nnan_dynamic:2194; GFX900-SDAG: ; %bb.0:2195; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2196; GFX900-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00002197; GFX900-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02198; GFX900-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000002199; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc2200; GFX900-SDAG-NEXT: v_add_f32_e32 v0, v0, v22201; GFX900-SDAG-NEXT: v_exp_f32_e32 v0, v02202; GFX900-SDAG-NEXT: v_not_b32_e32 v1, 632203; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2204; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, v12205; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]2206;2207; GFX900-GISEL-LABEL: v_exp2_f32_nnan_dynamic:2208; GFX900-GISEL: ; %bb.0:2209; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2210; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00002211; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000002212; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v12213; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc2214; GFX900-GISEL-NEXT: v_add_f32_e32 v0, v0, v12215; GFX900-GISEL-NEXT: v_exp_f32_e32 v0, v02216; GFX900-GISEL-NEXT: v_not_b32_e32 v1, 632217; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2218; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v12219; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]2220;2221; R600-LABEL: v_exp2_f32_nnan_dynamic:2222; R600: ; %bb.0:2223; R600-NEXT: CF_END2224; R600-NEXT: PAD2225;2226; CM-LABEL: v_exp2_f32_nnan_dynamic:2227; CM: ; %bb.0:2228; CM-NEXT: CF_END2229; CM-NEXT: PAD2230 %result = call nnan float @llvm.exp2.f32(float %in)2231 ret float %result2232}2233 2234define float @v_exp2_f32_ninf_daz(float %in) #0 {2235; GCN-LABEL: v_exp2_f32_ninf_daz:2236; GCN: ; %bb.0:2237; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2238; GCN-NEXT: v_exp_f32_e32 v0, v02239; GCN-NEXT: s_setpc_b64 s[30:31]2240;2241; R600-LABEL: v_exp2_f32_ninf_daz:2242; R600: ; %bb.0:2243; R600-NEXT: CF_END2244; R600-NEXT: PAD2245;2246; CM-LABEL: v_exp2_f32_ninf_daz:2247; CM: ; %bb.0:2248; CM-NEXT: CF_END2249; CM-NEXT: PAD2250 %result = call ninf float @llvm.exp2.f32(float %in)2251 ret float %result2252}2253 2254define float @v_exp2_f32_ninf_dynamic(float %in) #1 {2255; SI-SDAG-LABEL: v_exp2_f32_ninf_dynamic:2256; SI-SDAG: ; %bb.0:2257; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2258; SI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00002259; SI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02260; SI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000002261; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc2262; SI-SDAG-NEXT: v_add_f32_e32 v0, v0, v22263; SI-SDAG-NEXT: v_exp_f32_e32 v0, v02264; SI-SDAG-NEXT: v_not_b32_e32 v1, 632265; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2266; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v12267; SI-SDAG-NEXT: s_setpc_b64 s[30:31]2268;2269; SI-GISEL-LABEL: v_exp2_f32_ninf_dynamic:2270; SI-GISEL: ; %bb.0:2271; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2272; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00002273; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000002274; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v12275; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc2276; SI-GISEL-NEXT: v_add_f32_e32 v0, v0, v12277; SI-GISEL-NEXT: v_exp_f32_e32 v0, v02278; SI-GISEL-NEXT: v_not_b32_e32 v1, 632279; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2280; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v12281; SI-GISEL-NEXT: s_setpc_b64 s[30:31]2282;2283; VI-SDAG-LABEL: v_exp2_f32_ninf_dynamic:2284; VI-SDAG: ; %bb.0:2285; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2286; VI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00002287; VI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02288; VI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000002289; VI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc2290; VI-SDAG-NEXT: v_add_f32_e32 v0, v0, v22291; VI-SDAG-NEXT: v_exp_f32_e32 v0, v02292; VI-SDAG-NEXT: v_not_b32_e32 v1, 632293; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2294; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, v12295; VI-SDAG-NEXT: s_setpc_b64 s[30:31]2296;2297; VI-GISEL-LABEL: v_exp2_f32_ninf_dynamic:2298; VI-GISEL: ; %bb.0:2299; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2300; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00002301; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000002302; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v12303; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc2304; VI-GISEL-NEXT: v_add_f32_e32 v0, v0, v12305; VI-GISEL-NEXT: v_exp_f32_e32 v0, v02306; VI-GISEL-NEXT: v_not_b32_e32 v1, 632307; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2308; VI-GISEL-NEXT: v_ldexp_f32 v0, v0, v12309; VI-GISEL-NEXT: s_setpc_b64 s[30:31]2310;2311; GFX900-SDAG-LABEL: v_exp2_f32_ninf_dynamic:2312; GFX900-SDAG: ; %bb.0:2313; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2314; GFX900-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00002315; GFX900-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02316; GFX900-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000002317; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc2318; GFX900-SDAG-NEXT: v_add_f32_e32 v0, v0, v22319; GFX900-SDAG-NEXT: v_exp_f32_e32 v0, v02320; GFX900-SDAG-NEXT: v_not_b32_e32 v1, 632321; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2322; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, v12323; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]2324;2325; GFX900-GISEL-LABEL: v_exp2_f32_ninf_dynamic:2326; GFX900-GISEL: ; %bb.0:2327; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2328; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00002329; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000002330; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v12331; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc2332; GFX900-GISEL-NEXT: v_add_f32_e32 v0, v0, v12333; GFX900-GISEL-NEXT: v_exp_f32_e32 v0, v02334; GFX900-GISEL-NEXT: v_not_b32_e32 v1, 632335; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2336; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v12337; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]2338;2339; R600-LABEL: v_exp2_f32_ninf_dynamic:2340; R600: ; %bb.0:2341; R600-NEXT: CF_END2342; R600-NEXT: PAD2343;2344; CM-LABEL: v_exp2_f32_ninf_dynamic:2345; CM: ; %bb.0:2346; CM-NEXT: CF_END2347; CM-NEXT: PAD2348 %result = call ninf float @llvm.exp2.f32(float %in)2349 ret float %result2350}2351 2352define float @v_exp2_f32_nnan_ninf(float %in) {2353; SI-SDAG-LABEL: v_exp2_f32_nnan_ninf:2354; SI-SDAG: ; %bb.0:2355; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2356; SI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00002357; SI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02358; SI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000002359; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc2360; SI-SDAG-NEXT: v_add_f32_e32 v0, v0, v22361; SI-SDAG-NEXT: v_exp_f32_e32 v0, v02362; SI-SDAG-NEXT: v_not_b32_e32 v1, 632363; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2364; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v12365; SI-SDAG-NEXT: s_setpc_b64 s[30:31]2366;2367; SI-GISEL-LABEL: v_exp2_f32_nnan_ninf:2368; SI-GISEL: ; %bb.0:2369; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2370; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00002371; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000002372; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v12373; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc2374; SI-GISEL-NEXT: v_add_f32_e32 v0, v0, v12375; SI-GISEL-NEXT: v_exp_f32_e32 v0, v02376; SI-GISEL-NEXT: v_not_b32_e32 v1, 632377; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2378; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v12379; SI-GISEL-NEXT: s_setpc_b64 s[30:31]2380;2381; VI-SDAG-LABEL: v_exp2_f32_nnan_ninf:2382; VI-SDAG: ; %bb.0:2383; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2384; VI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00002385; VI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02386; VI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000002387; VI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc2388; VI-SDAG-NEXT: v_add_f32_e32 v0, v0, v22389; VI-SDAG-NEXT: v_exp_f32_e32 v0, v02390; VI-SDAG-NEXT: v_not_b32_e32 v1, 632391; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2392; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, v12393; VI-SDAG-NEXT: s_setpc_b64 s[30:31]2394;2395; VI-GISEL-LABEL: v_exp2_f32_nnan_ninf:2396; VI-GISEL: ; %bb.0:2397; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2398; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00002399; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000002400; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v12401; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc2402; VI-GISEL-NEXT: v_add_f32_e32 v0, v0, v12403; VI-GISEL-NEXT: v_exp_f32_e32 v0, v02404; VI-GISEL-NEXT: v_not_b32_e32 v1, 632405; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2406; VI-GISEL-NEXT: v_ldexp_f32 v0, v0, v12407; VI-GISEL-NEXT: s_setpc_b64 s[30:31]2408;2409; GFX900-SDAG-LABEL: v_exp2_f32_nnan_ninf:2410; GFX900-SDAG: ; %bb.0:2411; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2412; GFX900-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00002413; GFX900-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02414; GFX900-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000002415; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc2416; GFX900-SDAG-NEXT: v_add_f32_e32 v0, v0, v22417; GFX900-SDAG-NEXT: v_exp_f32_e32 v0, v02418; GFX900-SDAG-NEXT: v_not_b32_e32 v1, 632419; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2420; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, v12421; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]2422;2423; GFX900-GISEL-LABEL: v_exp2_f32_nnan_ninf:2424; GFX900-GISEL: ; %bb.0:2425; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2426; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00002427; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000002428; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v12429; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc2430; GFX900-GISEL-NEXT: v_add_f32_e32 v0, v0, v12431; GFX900-GISEL-NEXT: v_exp_f32_e32 v0, v02432; GFX900-GISEL-NEXT: v_not_b32_e32 v1, 632433; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2434; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v12435; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]2436;2437; R600-LABEL: v_exp2_f32_nnan_ninf:2438; R600: ; %bb.0:2439; R600-NEXT: CF_END2440; R600-NEXT: PAD2441;2442; CM-LABEL: v_exp2_f32_nnan_ninf:2443; CM: ; %bb.0:2444; CM-NEXT: CF_END2445; CM-NEXT: PAD2446 %result = call nnan ninf float @llvm.exp2.f32(float %in)2447 ret float %result2448}2449 2450define float @v_exp2_f32_nnan_ninf_daz(float %in) #0 {2451; GCN-LABEL: v_exp2_f32_nnan_ninf_daz:2452; GCN: ; %bb.0:2453; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2454; GCN-NEXT: v_exp_f32_e32 v0, v02455; GCN-NEXT: s_setpc_b64 s[30:31]2456;2457; R600-LABEL: v_exp2_f32_nnan_ninf_daz:2458; R600: ; %bb.0:2459; R600-NEXT: CF_END2460; R600-NEXT: PAD2461;2462; CM-LABEL: v_exp2_f32_nnan_ninf_daz:2463; CM: ; %bb.0:2464; CM-NEXT: CF_END2465; CM-NEXT: PAD2466 %result = call nnan ninf float @llvm.exp2.f32(float %in)2467 ret float %result2468}2469 2470define float @v_exp2_f32_nnan_ninf_dynamic(float %in) #1 {2471; SI-SDAG-LABEL: v_exp2_f32_nnan_ninf_dynamic:2472; SI-SDAG: ; %bb.0:2473; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2474; SI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00002475; SI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02476; SI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000002477; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc2478; SI-SDAG-NEXT: v_add_f32_e32 v0, v0, v22479; SI-SDAG-NEXT: v_exp_f32_e32 v0, v02480; SI-SDAG-NEXT: v_not_b32_e32 v1, 632481; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2482; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v12483; SI-SDAG-NEXT: s_setpc_b64 s[30:31]2484;2485; SI-GISEL-LABEL: v_exp2_f32_nnan_ninf_dynamic:2486; SI-GISEL: ; %bb.0:2487; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2488; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00002489; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000002490; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v12491; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc2492; SI-GISEL-NEXT: v_add_f32_e32 v0, v0, v12493; SI-GISEL-NEXT: v_exp_f32_e32 v0, v02494; SI-GISEL-NEXT: v_not_b32_e32 v1, 632495; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2496; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v12497; SI-GISEL-NEXT: s_setpc_b64 s[30:31]2498;2499; VI-SDAG-LABEL: v_exp2_f32_nnan_ninf_dynamic:2500; VI-SDAG: ; %bb.0:2501; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2502; VI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00002503; VI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02504; VI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000002505; VI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc2506; VI-SDAG-NEXT: v_add_f32_e32 v0, v0, v22507; VI-SDAG-NEXT: v_exp_f32_e32 v0, v02508; VI-SDAG-NEXT: v_not_b32_e32 v1, 632509; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2510; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, v12511; VI-SDAG-NEXT: s_setpc_b64 s[30:31]2512;2513; VI-GISEL-LABEL: v_exp2_f32_nnan_ninf_dynamic:2514; VI-GISEL: ; %bb.0:2515; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2516; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00002517; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000002518; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v12519; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc2520; VI-GISEL-NEXT: v_add_f32_e32 v0, v0, v12521; VI-GISEL-NEXT: v_exp_f32_e32 v0, v02522; VI-GISEL-NEXT: v_not_b32_e32 v1, 632523; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2524; VI-GISEL-NEXT: v_ldexp_f32 v0, v0, v12525; VI-GISEL-NEXT: s_setpc_b64 s[30:31]2526;2527; GFX900-SDAG-LABEL: v_exp2_f32_nnan_ninf_dynamic:2528; GFX900-SDAG: ; %bb.0:2529; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2530; GFX900-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00002531; GFX900-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02532; GFX900-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000002533; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc2534; GFX900-SDAG-NEXT: v_add_f32_e32 v0, v0, v22535; GFX900-SDAG-NEXT: v_exp_f32_e32 v0, v02536; GFX900-SDAG-NEXT: v_not_b32_e32 v1, 632537; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2538; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, v12539; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]2540;2541; GFX900-GISEL-LABEL: v_exp2_f32_nnan_ninf_dynamic:2542; GFX900-GISEL: ; %bb.0:2543; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2544; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00002545; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000002546; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v12547; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc2548; GFX900-GISEL-NEXT: v_add_f32_e32 v0, v0, v12549; GFX900-GISEL-NEXT: v_exp_f32_e32 v0, v02550; GFX900-GISEL-NEXT: v_not_b32_e32 v1, 632551; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2552; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v12553; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]2554;2555; R600-LABEL: v_exp2_f32_nnan_ninf_dynamic:2556; R600: ; %bb.0:2557; R600-NEXT: CF_END2558; R600-NEXT: PAD2559;2560; CM-LABEL: v_exp2_f32_nnan_ninf_dynamic:2561; CM: ; %bb.0:2562; CM-NEXT: CF_END2563; CM-NEXT: PAD2564 %result = call nnan ninf float @llvm.exp2.f32(float %in)2565 ret float %result2566}2567 2568define float @v_exp2_f32_fast_daz(float %in) #0 {2569; GCN-LABEL: v_exp2_f32_fast_daz:2570; GCN: ; %bb.0:2571; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2572; GCN-NEXT: v_exp_f32_e32 v0, v02573; GCN-NEXT: s_setpc_b64 s[30:31]2574;2575; R600-LABEL: v_exp2_f32_fast_daz:2576; R600: ; %bb.0:2577; R600-NEXT: CF_END2578; R600-NEXT: PAD2579;2580; CM-LABEL: v_exp2_f32_fast_daz:2581; CM: ; %bb.0:2582; CM-NEXT: CF_END2583; CM-NEXT: PAD2584 %result = call fast float @llvm.exp2.f32(float %in)2585 ret float %result2586}2587 2588define float @v_exp2_f32_dynamic_mode(float %in) #1 {2589; SI-SDAG-LABEL: v_exp2_f32_dynamic_mode:2590; SI-SDAG: ; %bb.0:2591; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2592; SI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00002593; SI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02594; SI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000002595; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc2596; SI-SDAG-NEXT: v_add_f32_e32 v0, v0, v22597; SI-SDAG-NEXT: v_exp_f32_e32 v0, v02598; SI-SDAG-NEXT: v_not_b32_e32 v1, 632599; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2600; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v12601; SI-SDAG-NEXT: s_setpc_b64 s[30:31]2602;2603; SI-GISEL-LABEL: v_exp2_f32_dynamic_mode:2604; SI-GISEL: ; %bb.0:2605; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2606; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00002607; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000002608; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v12609; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc2610; SI-GISEL-NEXT: v_add_f32_e32 v0, v0, v12611; SI-GISEL-NEXT: v_exp_f32_e32 v0, v02612; SI-GISEL-NEXT: v_not_b32_e32 v1, 632613; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2614; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v12615; SI-GISEL-NEXT: s_setpc_b64 s[30:31]2616;2617; VI-SDAG-LABEL: v_exp2_f32_dynamic_mode:2618; VI-SDAG: ; %bb.0:2619; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2620; VI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00002621; VI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02622; VI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000002623; VI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc2624; VI-SDAG-NEXT: v_add_f32_e32 v0, v0, v22625; VI-SDAG-NEXT: v_exp_f32_e32 v0, v02626; VI-SDAG-NEXT: v_not_b32_e32 v1, 632627; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2628; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, v12629; VI-SDAG-NEXT: s_setpc_b64 s[30:31]2630;2631; VI-GISEL-LABEL: v_exp2_f32_dynamic_mode:2632; VI-GISEL: ; %bb.0:2633; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2634; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00002635; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000002636; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v12637; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc2638; VI-GISEL-NEXT: v_add_f32_e32 v0, v0, v12639; VI-GISEL-NEXT: v_exp_f32_e32 v0, v02640; VI-GISEL-NEXT: v_not_b32_e32 v1, 632641; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2642; VI-GISEL-NEXT: v_ldexp_f32 v0, v0, v12643; VI-GISEL-NEXT: s_setpc_b64 s[30:31]2644;2645; GFX900-SDAG-LABEL: v_exp2_f32_dynamic_mode:2646; GFX900-SDAG: ; %bb.0:2647; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2648; GFX900-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00002649; GFX900-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02650; GFX900-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000002651; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc2652; GFX900-SDAG-NEXT: v_add_f32_e32 v0, v0, v22653; GFX900-SDAG-NEXT: v_exp_f32_e32 v0, v02654; GFX900-SDAG-NEXT: v_not_b32_e32 v1, 632655; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2656; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, v12657; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]2658;2659; GFX900-GISEL-LABEL: v_exp2_f32_dynamic_mode:2660; GFX900-GISEL: ; %bb.0:2661; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2662; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00002663; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000002664; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v12665; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc2666; GFX900-GISEL-NEXT: v_add_f32_e32 v0, v0, v12667; GFX900-GISEL-NEXT: v_exp_f32_e32 v0, v02668; GFX900-GISEL-NEXT: v_not_b32_e32 v1, 632669; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2670; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v12671; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]2672;2673; R600-LABEL: v_exp2_f32_dynamic_mode:2674; R600: ; %bb.0:2675; R600-NEXT: CF_END2676; R600-NEXT: PAD2677;2678; CM-LABEL: v_exp2_f32_dynamic_mode:2679; CM: ; %bb.0:2680; CM-NEXT: CF_END2681; CM-NEXT: PAD2682 %result = call float @llvm.exp2.f32(float %in)2683 ret float %result2684}2685 2686define float @v_exp2_f32_undef() {2687; GCN-LABEL: v_exp2_f32_undef:2688; GCN: ; %bb.0:2689; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2690; GCN-NEXT: s_setpc_b64 s[30:31]2691;2692; R600-LABEL: v_exp2_f32_undef:2693; R600: ; %bb.0:2694; R600-NEXT: CF_END2695; R600-NEXT: PAD2696;2697; CM-LABEL: v_exp2_f32_undef:2698; CM: ; %bb.0:2699; CM-NEXT: CF_END2700; CM-NEXT: PAD2701 %result = call float @llvm.exp2.f32(float poison)2702 ret float %result2703}2704 2705define float @v_exp2_f32_0() {2706; GCN-LABEL: v_exp2_f32_0:2707; GCN: ; %bb.0:2708; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2709; GCN-NEXT: v_mov_b32_e32 v0, 1.02710; GCN-NEXT: s_setpc_b64 s[30:31]2711;2712; R600-LABEL: v_exp2_f32_0:2713; R600: ; %bb.0:2714; R600-NEXT: CF_END2715; R600-NEXT: PAD2716;2717; CM-LABEL: v_exp2_f32_0:2718; CM: ; %bb.0:2719; CM-NEXT: CF_END2720; CM-NEXT: PAD2721; GFX89-SDAG-LABEL: v_exp2_f32_0:2722; GFX89-SDAG: ; %bb.0:2723; GFX89-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2724; GFX89-SDAG-NEXT: v_log_f32_e32 v0, 02725; GFX89-SDAG-NEXT: s_setpc_b64 s[30:31]2726; GFX89-GISEL-LABEL: v_exp2_f32_0:2727; GFX89-GISEL: ; %bb.0:2728; GFX89-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2729; GFX89-GISEL-NEXT: v_mov_b32_e32 v0, 0xff8000002730; GFX89-GISEL-NEXT: s_setpc_b64 s[30:31]2731 %result = call float @llvm.exp2.f32(float 0.0)2732 ret float %result2733}2734 2735define float @v_exp2_f32_from_fpext_f16(i16 %src.i) {2736; GCN-LABEL: v_exp2_f32_from_fpext_f16:2737; GCN: ; %bb.0:2738; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2739; GCN-NEXT: v_cvt_f32_f16_e32 v0, v02740; GCN-NEXT: v_exp_f32_e32 v0, v02741; GCN-NEXT: s_setpc_b64 s[30:31]2742;2743; R600-LABEL: v_exp2_f32_from_fpext_f16:2744; R600: ; %bb.0:2745; R600-NEXT: CF_END2746; R600-NEXT: PAD2747;2748; CM-LABEL: v_exp2_f32_from_fpext_f16:2749; CM: ; %bb.0:2750; CM-NEXT: CF_END2751; CM-NEXT: PAD2752 %src = bitcast i16 %src.i to half2753 %fpext = fpext half %src to float2754 %result = call float @llvm.exp2.f32(float %fpext)2755 ret float %result2756}2757 2758define float @v_exp2_f32_from_fpext_math_f16(i16 %src0.i, i16 %src1.i) {2759; SI-SDAG-LABEL: v_exp2_f32_from_fpext_math_f16:2760; SI-SDAG: ; %bb.0:2761; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2762; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v02763; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v12764; SI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00002765; SI-SDAG-NEXT: v_add_f32_e32 v0, v0, v12766; SI-SDAG-NEXT: v_mov_b32_e32 v1, 0x428000002767; SI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02768; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2769; SI-SDAG-NEXT: v_add_f32_e32 v0, v0, v12770; SI-SDAG-NEXT: v_exp_f32_e32 v0, v02771; SI-SDAG-NEXT: v_not_b32_e32 v1, 632772; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2773; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v12774; SI-SDAG-NEXT: s_setpc_b64 s[30:31]2775;2776; SI-GISEL-LABEL: v_exp2_f32_from_fpext_math_f16:2777; SI-GISEL: ; %bb.0:2778; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2779; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v02780; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v12781; SI-GISEL-NEXT: v_add_f32_e32 v0, v0, v12782; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v02783; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v02784; SI-GISEL-NEXT: v_exp_f32_e32 v0, v02785; SI-GISEL-NEXT: s_setpc_b64 s[30:31]2786;2787; VI-LABEL: v_exp2_f32_from_fpext_math_f16:2788; VI: ; %bb.0:2789; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2790; VI-NEXT: v_add_f16_e32 v0, v0, v12791; VI-NEXT: v_cvt_f32_f16_e32 v0, v02792; VI-NEXT: v_exp_f32_e32 v0, v02793; VI-NEXT: s_setpc_b64 s[30:31]2794;2795; GFX900-LABEL: v_exp2_f32_from_fpext_math_f16:2796; GFX900: ; %bb.0:2797; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2798; GFX900-NEXT: v_add_f16_e32 v0, v0, v12799; GFX900-NEXT: v_cvt_f32_f16_e32 v0, v02800; GFX900-NEXT: v_exp_f32_e32 v0, v02801; GFX900-NEXT: s_setpc_b64 s[30:31]2802;2803; R600-LABEL: v_exp2_f32_from_fpext_math_f16:2804; R600: ; %bb.0:2805; R600-NEXT: CF_END2806; R600-NEXT: PAD2807;2808; CM-LABEL: v_exp2_f32_from_fpext_math_f16:2809; CM: ; %bb.0:2810; CM-NEXT: CF_END2811; CM-NEXT: PAD2812; GFX89-LABEL: v_exp2_f32_from_fpext_math_f16:2813; GFX89: ; %bb.0:2814; GFX89-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2815; GFX89-NEXT: v_add_f16_e32 v0, v0, v12816; GFX89-NEXT: v_cvt_f32_f16_e32 v0, v02817; GFX89-NEXT: v_log_f32_e32 v0, v02818; GFX89-NEXT: s_setpc_b64 s[30:31]2819 %src0 = bitcast i16 %src0.i to half2820 %src1 = bitcast i16 %src1.i to half2821 %fadd = fadd half %src0, %src12822 %fpext = fpext half %fadd to float2823 %result = call float @llvm.exp2.f32(float %fpext)2824 ret float %result2825}2826 2827define float @v_exp2_f32_from_fpext_bf16(bfloat %src) {2828; SI-LABEL: v_exp2_f32_from_fpext_bf16:2829; SI: ; %bb.0:2830; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2831; SI-NEXT: s_mov_b32 s4, 0xc2fc00002832; SI-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02833; SI-NEXT: v_mov_b32_e32 v2, 0x428000002834; SI-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc2835; SI-NEXT: v_add_f32_e32 v0, v0, v22836; SI-NEXT: v_exp_f32_e32 v0, v02837; SI-NEXT: v_not_b32_e32 v1, 632838; SI-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2839; SI-NEXT: v_ldexp_f32_e32 v0, v0, v12840; SI-NEXT: s_setpc_b64 s[30:31]2841;2842; VI-LABEL: v_exp2_f32_from_fpext_bf16:2843; VI: ; %bb.0:2844; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2845; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v02846; VI-NEXT: s_mov_b32 s4, 0xc2fc00002847; VI-NEXT: v_mov_b32_e32 v1, 0x428000002848; VI-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02849; VI-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2850; VI-NEXT: v_add_f32_e32 v0, v0, v12851; VI-NEXT: v_exp_f32_e32 v0, v02852; VI-NEXT: v_not_b32_e32 v1, 632853; VI-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2854; VI-NEXT: v_ldexp_f32 v0, v0, v12855; VI-NEXT: s_setpc_b64 s[30:31]2856;2857; GFX900-LABEL: v_exp2_f32_from_fpext_bf16:2858; GFX900: ; %bb.0:2859; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2860; GFX900-NEXT: v_lshlrev_b32_e32 v0, 16, v02861; GFX900-NEXT: s_mov_b32 s4, 0xc2fc00002862; GFX900-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02863; GFX900-NEXT: v_mov_b32_e32 v2, 0x428000002864; GFX900-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc2865; GFX900-NEXT: v_add_f32_e32 v0, v0, v22866; GFX900-NEXT: v_exp_f32_e32 v0, v02867; GFX900-NEXT: v_not_b32_e32 v1, 632868; GFX900-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2869; GFX900-NEXT: v_ldexp_f32 v0, v0, v12870; GFX900-NEXT: s_setpc_b64 s[30:31]2871;2872; R600-LABEL: v_exp2_f32_from_fpext_bf16:2873; R600: ; %bb.0:2874; R600-NEXT: CF_END2875; R600-NEXT: PAD2876;2877; CM-LABEL: v_exp2_f32_from_fpext_bf16:2878; CM: ; %bb.0:2879; CM-NEXT: CF_END2880; CM-NEXT: PAD2881; GFX89-SDAG-LABEL: v_exp2_f32_from_fpext_bf16:2882; GFX89-SDAG: ; %bb.0:2883; GFX89-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2884; GFX89-SDAG-NEXT: v_log_f32_e32 v0, v02885; GFX89-SDAG-NEXT: s_setpc_b64 s[30:31]2886; GFX89-GISEL-LABEL: v_exp2_f32_from_fpext_bf16:2887; GFX89-GISEL: ; %bb.0:2888; GFX89-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2889; GFX89-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v02890; GFX89-GISEL-NEXT: v_log_f32_e32 v0, v02891; GFX89-GISEL-NEXT: s_setpc_b64 s[30:31]2892 %fpext = fpext bfloat %src to float2893 %result = call float @llvm.exp2.f32(float %fpext)2894 ret float %result2895}2896 2897; FIXME: Fold out fp16_to_fp (FP_TO_FP16) on no-f16 targets2898define half @v_exp2_f16(half %in) {2899; SI-SDAG-LABEL: v_exp2_f16:2900; SI-SDAG: ; %bb.0:2901; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2902; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v02903; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v02904; SI-SDAG-NEXT: v_exp_f32_e32 v0, v02905; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v02906; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v02907; SI-SDAG-NEXT: s_setpc_b64 s[30:31]2908;2909; SI-GISEL-LABEL: v_exp2_f16:2910; SI-GISEL: ; %bb.0:2911; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2912; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v02913; SI-GISEL-NEXT: v_exp_f32_e32 v0, v02914; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v02915; SI-GISEL-NEXT: s_setpc_b64 s[30:31]2916;2917; VI-LABEL: v_exp2_f16:2918; VI: ; %bb.0:2919; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2920; VI-NEXT: v_exp_f16_e32 v0, v02921; VI-NEXT: s_setpc_b64 s[30:31]2922;2923; GFX900-LABEL: v_exp2_f16:2924; GFX900: ; %bb.0:2925; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2926; GFX900-NEXT: v_exp_f16_e32 v0, v02927; GFX900-NEXT: s_setpc_b64 s[30:31]2928;2929; R600-LABEL: v_exp2_f16:2930; R600: ; %bb.0:2931; R600-NEXT: CF_END2932; R600-NEXT: PAD2933;2934; CM-LABEL: v_exp2_f16:2935; CM: ; %bb.0:2936; CM-NEXT: CF_END2937; CM-NEXT: PAD2938; GFX89-LABEL: v_exp2_f16:2939; GFX89: ; %bb.0:2940; GFX89-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2941; GFX89-NEXT: v_log_f16_e32 v0, v02942; GFX89-NEXT: s_setpc_b64 s[30:31]2943 %result = call half @llvm.exp2.f16(half %in)2944 ret half %result2945}2946 2947define half @v_exp2_fabs_f16(half %in) {2948; SI-SDAG-LABEL: v_exp2_fabs_f16:2949; SI-SDAG: ; %bb.0:2950; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2951; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v02952; SI-SDAG-NEXT: v_cvt_f32_f16_e64 v0, |v0|2953; SI-SDAG-NEXT: v_exp_f32_e32 v0, v02954; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v02955; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v02956; SI-SDAG-NEXT: s_setpc_b64 s[30:31]2957;2958; SI-GISEL-LABEL: v_exp2_fabs_f16:2959; SI-GISEL: ; %bb.0:2960; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2961; SI-GISEL-NEXT: v_cvt_f32_f16_e64 v0, |v0|2962; SI-GISEL-NEXT: v_exp_f32_e32 v0, v02963; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v02964; SI-GISEL-NEXT: s_setpc_b64 s[30:31]2965;2966; VI-LABEL: v_exp2_fabs_f16:2967; VI: ; %bb.0:2968; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2969; VI-NEXT: v_exp_f16_e64 v0, |v0|2970; VI-NEXT: s_setpc_b64 s[30:31]2971;2972; GFX900-LABEL: v_exp2_fabs_f16:2973; GFX900: ; %bb.0:2974; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2975; GFX900-NEXT: v_exp_f16_e64 v0, |v0|2976; GFX900-NEXT: s_setpc_b64 s[30:31]2977;2978; R600-LABEL: v_exp2_fabs_f16:2979; R600: ; %bb.0:2980; R600-NEXT: CF_END2981; R600-NEXT: PAD2982;2983; CM-LABEL: v_exp2_fabs_f16:2984; CM: ; %bb.0:2985; CM-NEXT: CF_END2986; CM-NEXT: PAD2987; GFX89-LABEL: v_exp2_fabs_f16:2988; GFX89: ; %bb.0:2989; GFX89-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2990; GFX89-NEXT: v_log_f16_e64 v0, |v0|2991; GFX89-NEXT: s_setpc_b64 s[30:31]2992 %fabs = call half @llvm.fabs.f16(half %in)2993 %result = call half @llvm.exp2.f16(half %fabs)2994 ret half %result2995}2996 2997define half @v_exp2_fneg_fabs_f16(half %in) {2998; SI-SDAG-LABEL: v_exp2_fneg_fabs_f16:2999; SI-SDAG: ; %bb.0:3000; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3001; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v03002; SI-SDAG-NEXT: v_cvt_f32_f16_e64 v0, -|v0|3003; SI-SDAG-NEXT: v_exp_f32_e32 v0, v03004; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v03005; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v03006; SI-SDAG-NEXT: s_setpc_b64 s[30:31]3007;3008; SI-GISEL-LABEL: v_exp2_fneg_fabs_f16:3009; SI-GISEL: ; %bb.0:3010; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3011; SI-GISEL-NEXT: v_cvt_f32_f16_e64 v0, -|v0|3012; SI-GISEL-NEXT: v_exp_f32_e32 v0, v03013; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v03014; SI-GISEL-NEXT: s_setpc_b64 s[30:31]3015;3016; VI-LABEL: v_exp2_fneg_fabs_f16:3017; VI: ; %bb.0:3018; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3019; VI-NEXT: v_exp_f16_e64 v0, -|v0|3020; VI-NEXT: s_setpc_b64 s[30:31]3021;3022; GFX900-LABEL: v_exp2_fneg_fabs_f16:3023; GFX900: ; %bb.0:3024; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3025; GFX900-NEXT: v_exp_f16_e64 v0, -|v0|3026; GFX900-NEXT: s_setpc_b64 s[30:31]3027;3028; R600-LABEL: v_exp2_fneg_fabs_f16:3029; R600: ; %bb.0:3030; R600-NEXT: CF_END3031; R600-NEXT: PAD3032;3033; CM-LABEL: v_exp2_fneg_fabs_f16:3034; CM: ; %bb.0:3035; CM-NEXT: CF_END3036; CM-NEXT: PAD3037; GFX89-LABEL: v_exp2_fneg_fabs_f16:3038; GFX89: ; %bb.0:3039; GFX89-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3040; GFX89-NEXT: v_log_f16_e64 v0, -|v0|3041; GFX89-NEXT: s_setpc_b64 s[30:31]3042 %fabs = call half @llvm.fabs.f16(half %in)3043 %fneg.fabs = fneg half %fabs3044 %result = call half @llvm.exp2.f16(half %fneg.fabs)3045 ret half %result3046}3047 3048define half @v_exp2_fneg_f16(half %in) {3049; SI-SDAG-LABEL: v_exp2_fneg_f16:3050; SI-SDAG: ; %bb.0:3051; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3052; SI-SDAG-NEXT: v_cvt_f16_f32_e64 v0, -v03053; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v03054; SI-SDAG-NEXT: v_exp_f32_e32 v0, v03055; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v03056; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v03057; SI-SDAG-NEXT: s_setpc_b64 s[30:31]3058;3059; SI-GISEL-LABEL: v_exp2_fneg_f16:3060; SI-GISEL: ; %bb.0:3061; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3062; SI-GISEL-NEXT: v_cvt_f32_f16_e64 v0, -v03063; SI-GISEL-NEXT: v_exp_f32_e32 v0, v03064; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v03065; SI-GISEL-NEXT: s_setpc_b64 s[30:31]3066;3067; VI-LABEL: v_exp2_fneg_f16:3068; VI: ; %bb.0:3069; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3070; VI-NEXT: v_exp_f16_e64 v0, -v03071; VI-NEXT: s_setpc_b64 s[30:31]3072;3073; GFX900-LABEL: v_exp2_fneg_f16:3074; GFX900: ; %bb.0:3075; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3076; GFX900-NEXT: v_exp_f16_e64 v0, -v03077; GFX900-NEXT: s_setpc_b64 s[30:31]3078;3079; R600-LABEL: v_exp2_fneg_f16:3080; R600: ; %bb.0:3081; R600-NEXT: CF_END3082; R600-NEXT: PAD3083;3084; CM-LABEL: v_exp2_fneg_f16:3085; CM: ; %bb.0:3086; CM-NEXT: CF_END3087; CM-NEXT: PAD3088; GFX89-LABEL: v_exp2_fneg_f16:3089; GFX89: ; %bb.0:3090; GFX89-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3091; GFX89-NEXT: v_log_f16_e64 v0, -v03092; GFX89-NEXT: s_setpc_b64 s[30:31]3093 %fneg = fneg half %in3094 %result = call half @llvm.exp2.f16(half %fneg)3095 ret half %result3096}3097 3098define half @v_exp2_f16_fast(half %in) {3099; SI-SDAG-LABEL: v_exp2_f16_fast:3100; SI-SDAG: ; %bb.0:3101; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3102; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v03103; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v03104; SI-SDAG-NEXT: v_exp_f32_e32 v0, v03105; SI-SDAG-NEXT: s_setpc_b64 s[30:31]3106;3107; SI-GISEL-LABEL: v_exp2_f16_fast:3108; SI-GISEL: ; %bb.0:3109; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3110; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v03111; SI-GISEL-NEXT: v_exp_f32_e32 v0, v03112; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v03113; SI-GISEL-NEXT: s_setpc_b64 s[30:31]3114;3115; VI-LABEL: v_exp2_f16_fast:3116; VI: ; %bb.0:3117; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3118; VI-NEXT: v_exp_f16_e32 v0, v03119; VI-NEXT: s_setpc_b64 s[30:31]3120;3121; GFX900-LABEL: v_exp2_f16_fast:3122; GFX900: ; %bb.0:3123; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3124; GFX900-NEXT: v_exp_f16_e32 v0, v03125; GFX900-NEXT: s_setpc_b64 s[30:31]3126;3127; R600-LABEL: v_exp2_f16_fast:3128; R600: ; %bb.0:3129; R600-NEXT: CF_END3130; R600-NEXT: PAD3131;3132; CM-LABEL: v_exp2_f16_fast:3133; CM: ; %bb.0:3134; CM-NEXT: CF_END3135; CM-NEXT: PAD3136; GFX89-LABEL: v_exp2_f16_fast:3137; GFX89: ; %bb.0:3138; GFX89-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3139; GFX89-NEXT: v_log_f16_e32 v0, v03140; GFX89-NEXT: s_setpc_b64 s[30:31]3141 %result = call fast half @llvm.exp2.f16(half %in)3142 ret half %result3143}3144 3145define <2 x half> @v_exp2_v2f16(<2 x half> %in) {3146; SI-SDAG-LABEL: v_exp2_v2f16:3147; SI-SDAG: ; %bb.0:3148; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3149; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v03150; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v13151; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v03152; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v13153; SI-SDAG-NEXT: v_exp_f32_e32 v0, v03154; SI-SDAG-NEXT: v_exp_f32_e32 v1, v13155; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v03156; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v13157; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v03158; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v13159; SI-SDAG-NEXT: s_setpc_b64 s[30:31]3160;3161; SI-GISEL-LABEL: v_exp2_v2f16:3162; SI-GISEL: ; %bb.0:3163; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3164; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v03165; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v13166; SI-GISEL-NEXT: v_exp_f32_e32 v0, v03167; SI-GISEL-NEXT: v_exp_f32_e32 v1, v13168; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v03169; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v13170; SI-GISEL-NEXT: s_setpc_b64 s[30:31]3171;3172; VI-SDAG-LABEL: v_exp2_v2f16:3173; VI-SDAG: ; %bb.0:3174; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3175; VI-SDAG-NEXT: v_exp_f16_sdwa v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_13176; VI-SDAG-NEXT: v_exp_f16_e32 v0, v03177; VI-SDAG-NEXT: v_or_b32_e32 v0, v0, v13178; VI-SDAG-NEXT: s_setpc_b64 s[30:31]3179;3180; VI-GISEL-LABEL: v_exp2_v2f16:3181; VI-GISEL: ; %bb.0:3182; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3183; VI-GISEL-NEXT: v_exp_f16_e32 v1, v03184; VI-GISEL-NEXT: v_exp_f16_sdwa v0, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_13185; VI-GISEL-NEXT: v_or_b32_e32 v0, v1, v03186; VI-GISEL-NEXT: s_setpc_b64 s[30:31]3187;3188; GFX900-SDAG-LABEL: v_exp2_v2f16:3189; GFX900-SDAG: ; %bb.0:3190; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3191; GFX900-SDAG-NEXT: v_exp_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_13192; GFX900-SDAG-NEXT: v_exp_f16_e32 v0, v03193; GFX900-SDAG-NEXT: v_pack_b32_f16 v0, v0, v13194; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]3195;3196; GFX900-GISEL-LABEL: v_exp2_v2f16:3197; GFX900-GISEL: ; %bb.0:3198; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3199; GFX900-GISEL-NEXT: v_exp_f16_e32 v1, v03200; GFX900-GISEL-NEXT: v_exp_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_13201; GFX900-GISEL-NEXT: v_lshl_or_b32 v0, v0, 16, v13202; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]3203;3204; R600-LABEL: v_exp2_v2f16:3205; R600: ; %bb.0:3206; R600-NEXT: CF_END3207; R600-NEXT: PAD3208;3209; CM-LABEL: v_exp2_v2f16:3210; CM: ; %bb.0:3211; CM-NEXT: CF_END3212; CM-NEXT: PAD3213 %result = call <2 x half> @llvm.exp2.v2f16(<2 x half> %in)3214 ret <2 x half> %result3215}3216 3217define <2 x half> @v_exp2_fabs_v2f16(<2 x half> %in) {3218; SI-SDAG-LABEL: v_exp2_fabs_v2f16:3219; SI-SDAG: ; %bb.0:3220; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3221; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v03222; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v13223; SI-SDAG-NEXT: v_cvt_f32_f16_e64 v0, |v0|3224; SI-SDAG-NEXT: v_cvt_f32_f16_e64 v1, |v1|3225; SI-SDAG-NEXT: v_exp_f32_e32 v0, v03226; SI-SDAG-NEXT: v_exp_f32_e32 v1, v13227; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v03228; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v13229; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v03230; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v13231; SI-SDAG-NEXT: s_setpc_b64 s[30:31]3232;3233; SI-GISEL-LABEL: v_exp2_fabs_v2f16:3234; SI-GISEL: ; %bb.0:3235; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3236; SI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 16, v13237; SI-GISEL-NEXT: v_and_b32_e32 v0, 0xffff, v03238; SI-GISEL-NEXT: v_or_b32_e32 v0, v1, v03239; SI-GISEL-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v03240; SI-GISEL-NEXT: v_lshrrev_b32_e32 v1, 16, v03241; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v03242; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v13243; SI-GISEL-NEXT: v_exp_f32_e32 v0, v03244; SI-GISEL-NEXT: v_exp_f32_e32 v1, v13245; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v03246; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v13247; SI-GISEL-NEXT: s_setpc_b64 s[30:31]3248;3249; VI-SDAG-LABEL: v_exp2_fabs_v2f16:3250; VI-SDAG: ; %bb.0:3251; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3252; VI-SDAG-NEXT: v_exp_f16_sdwa v1, |v0| dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_13253; VI-SDAG-NEXT: v_exp_f16_e64 v0, |v0|3254; VI-SDAG-NEXT: v_or_b32_e32 v0, v0, v13255; VI-SDAG-NEXT: s_setpc_b64 s[30:31]3256;3257; VI-GISEL-LABEL: v_exp2_fabs_v2f16:3258; VI-GISEL: ; %bb.0:3259; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3260; VI-GISEL-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v03261; VI-GISEL-NEXT: v_exp_f16_e32 v1, v03262; VI-GISEL-NEXT: v_exp_f16_sdwa v0, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_13263; VI-GISEL-NEXT: v_or_b32_e32 v0, v1, v03264; VI-GISEL-NEXT: s_setpc_b64 s[30:31]3265;3266; GFX900-SDAG-LABEL: v_exp2_fabs_v2f16:3267; GFX900-SDAG: ; %bb.0:3268; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3269; GFX900-SDAG-NEXT: v_exp_f16_sdwa v1, |v0| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_13270; GFX900-SDAG-NEXT: v_exp_f16_e64 v0, |v0|3271; GFX900-SDAG-NEXT: v_pack_b32_f16 v0, v0, v13272; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]3273;3274; GFX900-GISEL-LABEL: v_exp2_fabs_v2f16:3275; GFX900-GISEL: ; %bb.0:3276; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3277; GFX900-GISEL-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v03278; GFX900-GISEL-NEXT: v_exp_f16_e32 v1, v03279; GFX900-GISEL-NEXT: v_exp_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_13280; GFX900-GISEL-NEXT: v_lshl_or_b32 v0, v0, 16, v13281; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]3282;3283; R600-LABEL: v_exp2_fabs_v2f16:3284; R600: ; %bb.0:3285; R600-NEXT: CF_END3286; R600-NEXT: PAD3287;3288; CM-LABEL: v_exp2_fabs_v2f16:3289; CM: ; %bb.0:3290; CM-NEXT: CF_END3291; CM-NEXT: PAD3292 %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %in)3293 %result = call <2 x half> @llvm.exp2.v2f16(<2 x half> %fabs)3294 ret <2 x half> %result3295}3296 3297define <2 x half> @v_exp2_fneg_fabs_v2f16(<2 x half> %in) {3298; SI-SDAG-LABEL: v_exp2_fneg_fabs_v2f16:3299; SI-SDAG: ; %bb.0:3300; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3301; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v13302; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v03303; SI-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v13304; SI-SDAG-NEXT: v_or_b32_e32 v0, v0, v13305; SI-SDAG-NEXT: v_or_b32_e32 v0, 0x80008000, v03306; SI-SDAG-NEXT: v_lshrrev_b32_e32 v1, 16, v03307; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v03308; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v13309; SI-SDAG-NEXT: v_exp_f32_e32 v0, v03310; SI-SDAG-NEXT: v_exp_f32_e32 v1, v13311; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v03312; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v13313; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v03314; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v13315; SI-SDAG-NEXT: s_setpc_b64 s[30:31]3316;3317; SI-GISEL-LABEL: v_exp2_fneg_fabs_v2f16:3318; SI-GISEL: ; %bb.0:3319; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3320; SI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 16, v13321; SI-GISEL-NEXT: v_and_b32_e32 v0, 0xffff, v03322; SI-GISEL-NEXT: v_or_b32_e32 v0, v1, v03323; SI-GISEL-NEXT: v_or_b32_e32 v0, 0x80008000, v03324; SI-GISEL-NEXT: v_lshrrev_b32_e32 v1, 16, v03325; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v03326; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v13327; SI-GISEL-NEXT: v_exp_f32_e32 v0, v03328; SI-GISEL-NEXT: v_exp_f32_e32 v1, v13329; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v03330; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v13331; SI-GISEL-NEXT: s_setpc_b64 s[30:31]3332;3333; VI-SDAG-LABEL: v_exp2_fneg_fabs_v2f16:3334; VI-SDAG: ; %bb.0:3335; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3336; VI-SDAG-NEXT: v_exp_f16_sdwa v1, -|v0| dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_13337; VI-SDAG-NEXT: v_exp_f16_e64 v0, -|v0|3338; VI-SDAG-NEXT: v_or_b32_e32 v0, v0, v13339; VI-SDAG-NEXT: s_setpc_b64 s[30:31]3340;3341; VI-GISEL-LABEL: v_exp2_fneg_fabs_v2f16:3342; VI-GISEL: ; %bb.0:3343; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3344; VI-GISEL-NEXT: v_or_b32_e32 v0, 0x80008000, v03345; VI-GISEL-NEXT: v_exp_f16_e32 v1, v03346; VI-GISEL-NEXT: v_exp_f16_sdwa v0, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_13347; VI-GISEL-NEXT: v_or_b32_e32 v0, v1, v03348; VI-GISEL-NEXT: s_setpc_b64 s[30:31]3349;3350; GFX900-SDAG-LABEL: v_exp2_fneg_fabs_v2f16:3351; GFX900-SDAG: ; %bb.0:3352; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3353; GFX900-SDAG-NEXT: v_exp_f16_sdwa v1, -|v0| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_13354; GFX900-SDAG-NEXT: v_exp_f16_e64 v0, -|v0|3355; GFX900-SDAG-NEXT: v_pack_b32_f16 v0, v0, v13356; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]3357;3358; GFX900-GISEL-LABEL: v_exp2_fneg_fabs_v2f16:3359; GFX900-GISEL: ; %bb.0:3360; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3361; GFX900-GISEL-NEXT: v_or_b32_e32 v0, 0x80008000, v03362; GFX900-GISEL-NEXT: v_exp_f16_e32 v1, v03363; GFX900-GISEL-NEXT: v_exp_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_13364; GFX900-GISEL-NEXT: v_lshl_or_b32 v0, v0, 16, v13365; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]3366;3367; R600-LABEL: v_exp2_fneg_fabs_v2f16:3368; R600: ; %bb.0:3369; R600-NEXT: CF_END3370; R600-NEXT: PAD3371;3372; CM-LABEL: v_exp2_fneg_fabs_v2f16:3373; CM: ; %bb.0:3374; CM-NEXT: CF_END3375; CM-NEXT: PAD3376 %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %in)3377 %fneg.fabs = fneg <2 x half> %fabs3378 %result = call <2 x half> @llvm.exp2.v2f16(<2 x half> %fneg.fabs)3379 ret <2 x half> %result3380}3381 3382define <2 x half> @v_exp2_fneg_v2f16(<2 x half> %in) {3383; SI-SDAG-LABEL: v_exp2_fneg_v2f16:3384; SI-SDAG: ; %bb.0:3385; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3386; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v13387; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v03388; SI-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v13389; SI-SDAG-NEXT: v_or_b32_e32 v0, v0, v13390; SI-SDAG-NEXT: v_xor_b32_e32 v0, 0x80008000, v03391; SI-SDAG-NEXT: v_lshrrev_b32_e32 v1, 16, v03392; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v03393; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v13394; SI-SDAG-NEXT: v_exp_f32_e32 v0, v03395; SI-SDAG-NEXT: v_exp_f32_e32 v1, v13396; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v03397; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v13398; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v03399; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v13400; SI-SDAG-NEXT: s_setpc_b64 s[30:31]3401;3402; SI-GISEL-LABEL: v_exp2_fneg_v2f16:3403; SI-GISEL: ; %bb.0:3404; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3405; SI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 16, v13406; SI-GISEL-NEXT: v_and_b32_e32 v0, 0xffff, v03407; SI-GISEL-NEXT: v_or_b32_e32 v0, v1, v03408; SI-GISEL-NEXT: v_xor_b32_e32 v0, 0x80008000, v03409; SI-GISEL-NEXT: v_lshrrev_b32_e32 v1, 16, v03410; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v03411; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v13412; SI-GISEL-NEXT: v_exp_f32_e32 v0, v03413; SI-GISEL-NEXT: v_exp_f32_e32 v1, v13414; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v03415; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v13416; SI-GISEL-NEXT: s_setpc_b64 s[30:31]3417;3418; VI-SDAG-LABEL: v_exp2_fneg_v2f16:3419; VI-SDAG: ; %bb.0:3420; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3421; VI-SDAG-NEXT: v_exp_f16_sdwa v1, -v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_13422; VI-SDAG-NEXT: v_exp_f16_e64 v0, -v03423; VI-SDAG-NEXT: v_or_b32_e32 v0, v0, v13424; VI-SDAG-NEXT: s_setpc_b64 s[30:31]3425;3426; VI-GISEL-LABEL: v_exp2_fneg_v2f16:3427; VI-GISEL: ; %bb.0:3428; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3429; VI-GISEL-NEXT: v_xor_b32_e32 v0, 0x80008000, v03430; VI-GISEL-NEXT: v_exp_f16_e32 v1, v03431; VI-GISEL-NEXT: v_exp_f16_sdwa v0, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_13432; VI-GISEL-NEXT: v_or_b32_e32 v0, v1, v03433; VI-GISEL-NEXT: s_setpc_b64 s[30:31]3434;3435; GFX900-SDAG-LABEL: v_exp2_fneg_v2f16:3436; GFX900-SDAG: ; %bb.0:3437; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3438; GFX900-SDAG-NEXT: v_exp_f16_sdwa v1, -v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_13439; GFX900-SDAG-NEXT: v_exp_f16_e64 v0, -v03440; GFX900-SDAG-NEXT: v_pack_b32_f16 v0, v0, v13441; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]3442;3443; GFX900-GISEL-LABEL: v_exp2_fneg_v2f16:3444; GFX900-GISEL: ; %bb.0:3445; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3446; GFX900-GISEL-NEXT: v_xor_b32_e32 v0, 0x80008000, v03447; GFX900-GISEL-NEXT: v_exp_f16_e32 v1, v03448; GFX900-GISEL-NEXT: v_exp_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_13449; GFX900-GISEL-NEXT: v_lshl_or_b32 v0, v0, 16, v13450; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]3451;3452; R600-LABEL: v_exp2_fneg_v2f16:3453; R600: ; %bb.0:3454; R600-NEXT: CF_END3455; R600-NEXT: PAD3456;3457; CM-LABEL: v_exp2_fneg_v2f16:3458; CM: ; %bb.0:3459; CM-NEXT: CF_END3460; CM-NEXT: PAD3461 %fneg = fneg <2 x half> %in3462 %result = call <2 x half> @llvm.exp2.v2f16(<2 x half> %fneg)3463 ret <2 x half> %result3464}3465 3466define <2 x half> @v_exp2_v2f16_fast(<2 x half> %in) {3467; SI-SDAG-LABEL: v_exp2_v2f16_fast:3468; SI-SDAG: ; %bb.0:3469; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3470; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v03471; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v13472; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v03473; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v13474; SI-SDAG-NEXT: v_exp_f32_e32 v0, v03475; SI-SDAG-NEXT: v_exp_f32_e32 v1, v13476; SI-SDAG-NEXT: s_setpc_b64 s[30:31]3477;3478; SI-GISEL-LABEL: v_exp2_v2f16_fast:3479; SI-GISEL: ; %bb.0:3480; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3481; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v03482; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v13483; SI-GISEL-NEXT: v_exp_f32_e32 v0, v03484; SI-GISEL-NEXT: v_exp_f32_e32 v1, v13485; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v03486; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v13487; SI-GISEL-NEXT: s_setpc_b64 s[30:31]3488;3489; VI-SDAG-LABEL: v_exp2_v2f16_fast:3490; VI-SDAG: ; %bb.0:3491; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3492; VI-SDAG-NEXT: v_exp_f16_sdwa v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_13493; VI-SDAG-NEXT: v_exp_f16_e32 v0, v03494; VI-SDAG-NEXT: v_or_b32_e32 v0, v0, v13495; VI-SDAG-NEXT: s_setpc_b64 s[30:31]3496;3497; VI-GISEL-LABEL: v_exp2_v2f16_fast:3498; VI-GISEL: ; %bb.0:3499; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3500; VI-GISEL-NEXT: v_exp_f16_e32 v1, v03501; VI-GISEL-NEXT: v_exp_f16_sdwa v0, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_13502; VI-GISEL-NEXT: v_or_b32_e32 v0, v1, v03503; VI-GISEL-NEXT: s_setpc_b64 s[30:31]3504;3505; GFX900-SDAG-LABEL: v_exp2_v2f16_fast:3506; GFX900-SDAG: ; %bb.0:3507; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3508; GFX900-SDAG-NEXT: v_exp_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_13509; GFX900-SDAG-NEXT: v_exp_f16_e32 v0, v03510; GFX900-SDAG-NEXT: v_pack_b32_f16 v0, v0, v13511; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]3512;3513; GFX900-GISEL-LABEL: v_exp2_v2f16_fast:3514; GFX900-GISEL: ; %bb.0:3515; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3516; GFX900-GISEL-NEXT: v_exp_f16_e32 v1, v03517; GFX900-GISEL-NEXT: v_exp_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_13518; GFX900-GISEL-NEXT: v_lshl_or_b32 v0, v0, 16, v13519; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]3520;3521; R600-LABEL: v_exp2_v2f16_fast:3522; R600: ; %bb.0:3523; R600-NEXT: CF_END3524; R600-NEXT: PAD3525;3526; CM-LABEL: v_exp2_v2f16_fast:3527; CM: ; %bb.0:3528; CM-NEXT: CF_END3529; CM-NEXT: PAD3530 %result = call fast <2 x half> @llvm.exp2.v2f16(<2 x half> %in)3531 ret <2 x half> %result3532}3533 3534define <3 x half> @v_exp_v3f16(<3 x half> %in) {3535; SI-SDAG-LABEL: v_exp_v3f16:3536; SI-SDAG: ; %bb.0:3537; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3538; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v03539; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v13540; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v23541; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v03542; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v13543; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v23544; SI-SDAG-NEXT: v_exp_f32_e32 v0, v03545; SI-SDAG-NEXT: v_exp_f32_e32 v1, v13546; SI-SDAG-NEXT: v_exp_f32_e32 v2, v23547; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v03548; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v13549; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v23550; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v03551; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v13552; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v23553; SI-SDAG-NEXT: s_setpc_b64 s[30:31]3554;3555; SI-GISEL-LABEL: v_exp_v3f16:3556; SI-GISEL: ; %bb.0:3557; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3558; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v03559; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v13560; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v23561; SI-GISEL-NEXT: v_exp_f32_e32 v0, v03562; SI-GISEL-NEXT: v_exp_f32_e32 v1, v13563; SI-GISEL-NEXT: v_exp_f32_e32 v2, v23564; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v03565; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v13566; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v23567; SI-GISEL-NEXT: s_setpc_b64 s[30:31]3568;3569; VI-SDAG-LABEL: v_exp_v3f16:3570; VI-SDAG: ; %bb.0:3571; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3572; VI-SDAG-NEXT: v_exp_f16_sdwa v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_13573; VI-SDAG-NEXT: v_exp_f16_e32 v0, v03574; VI-SDAG-NEXT: v_exp_f16_e32 v1, v13575; VI-SDAG-NEXT: v_or_b32_e32 v0, v0, v23576; VI-SDAG-NEXT: s_setpc_b64 s[30:31]3577;3578; VI-GISEL-LABEL: v_exp_v3f16:3579; VI-GISEL: ; %bb.0:3580; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3581; VI-GISEL-NEXT: v_exp_f16_e32 v2, v03582; VI-GISEL-NEXT: v_exp_f16_sdwa v0, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_13583; VI-GISEL-NEXT: v_exp_f16_e32 v1, v13584; VI-GISEL-NEXT: v_or_b32_e32 v0, v2, v03585; VI-GISEL-NEXT: s_setpc_b64 s[30:31]3586;3587; GFX900-SDAG-LABEL: v_exp_v3f16:3588; GFX900-SDAG: ; %bb.0:3589; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3590; GFX900-SDAG-NEXT: v_exp_f16_sdwa v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_13591; GFX900-SDAG-NEXT: v_exp_f16_e32 v0, v03592; GFX900-SDAG-NEXT: v_exp_f16_e32 v1, v13593; GFX900-SDAG-NEXT: v_pack_b32_f16 v0, v0, v23594; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]3595;3596; GFX900-GISEL-LABEL: v_exp_v3f16:3597; GFX900-GISEL: ; %bb.0:3598; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3599; GFX900-GISEL-NEXT: v_exp_f16_e32 v2, v03600; GFX900-GISEL-NEXT: v_exp_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_13601; GFX900-GISEL-NEXT: v_exp_f16_e32 v1, v13602; GFX900-GISEL-NEXT: v_lshl_or_b32 v0, v0, 16, v23603; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]3604;3605; R600-LABEL: v_exp_v3f16:3606; R600: ; %bb.0:3607; R600-NEXT: CF_END3608; R600-NEXT: PAD3609;3610; CM-LABEL: v_exp_v3f16:3611; CM: ; %bb.0:3612; CM-NEXT: CF_END3613; CM-NEXT: PAD3614 %result = call <3 x half> @llvm.exp2.v3f16(<3 x half> %in)3615 ret <3 x half> %result3616}3617 3618define <3 x half> @v_exp2_v3f16_afn(<3 x half> %in) {3619; SI-SDAG-LABEL: v_exp2_v3f16_afn:3620; SI-SDAG: ; %bb.0:3621; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3622; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v03623; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v13624; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v23625; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v03626; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v13627; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v23628; SI-SDAG-NEXT: v_exp_f32_e32 v0, v03629; SI-SDAG-NEXT: v_exp_f32_e32 v1, v13630; SI-SDAG-NEXT: v_exp_f32_e32 v2, v23631; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v03632; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v13633; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v23634; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v03635; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v13636; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v23637; SI-SDAG-NEXT: s_setpc_b64 s[30:31]3638;3639; SI-GISEL-LABEL: v_exp2_v3f16_afn:3640; SI-GISEL: ; %bb.0:3641; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3642; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v03643; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v13644; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v23645; SI-GISEL-NEXT: v_exp_f32_e32 v0, v03646; SI-GISEL-NEXT: v_exp_f32_e32 v1, v13647; SI-GISEL-NEXT: v_exp_f32_e32 v2, v23648; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v03649; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v13650; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v23651; SI-GISEL-NEXT: s_setpc_b64 s[30:31]3652;3653; VI-SDAG-LABEL: v_exp2_v3f16_afn:3654; VI-SDAG: ; %bb.0:3655; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3656; VI-SDAG-NEXT: v_exp_f16_sdwa v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_13657; VI-SDAG-NEXT: v_exp_f16_e32 v0, v03658; VI-SDAG-NEXT: v_exp_f16_e32 v1, v13659; VI-SDAG-NEXT: v_or_b32_e32 v0, v0, v23660; VI-SDAG-NEXT: s_setpc_b64 s[30:31]3661;3662; VI-GISEL-LABEL: v_exp2_v3f16_afn:3663; VI-GISEL: ; %bb.0:3664; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3665; VI-GISEL-NEXT: v_exp_f16_e32 v2, v03666; VI-GISEL-NEXT: v_exp_f16_sdwa v0, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_13667; VI-GISEL-NEXT: v_exp_f16_e32 v1, v13668; VI-GISEL-NEXT: v_or_b32_e32 v0, v2, v03669; VI-GISEL-NEXT: s_setpc_b64 s[30:31]3670;3671; GFX900-SDAG-LABEL: v_exp2_v3f16_afn:3672; GFX900-SDAG: ; %bb.0:3673; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3674; GFX900-SDAG-NEXT: v_exp_f16_sdwa v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_13675; GFX900-SDAG-NEXT: v_exp_f16_e32 v0, v03676; GFX900-SDAG-NEXT: v_exp_f16_e32 v1, v13677; GFX900-SDAG-NEXT: v_pack_b32_f16 v0, v0, v23678; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]3679;3680; GFX900-GISEL-LABEL: v_exp2_v3f16_afn:3681; GFX900-GISEL: ; %bb.0:3682; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3683; GFX900-GISEL-NEXT: v_exp_f16_e32 v2, v03684; GFX900-GISEL-NEXT: v_exp_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_13685; GFX900-GISEL-NEXT: v_exp_f16_e32 v1, v13686; GFX900-GISEL-NEXT: v_lshl_or_b32 v0, v0, 16, v23687; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]3688;3689; R600-LABEL: v_exp2_v3f16_afn:3690; R600: ; %bb.0:3691; R600-NEXT: CF_END3692; R600-NEXT: PAD3693;3694; CM-LABEL: v_exp2_v3f16_afn:3695; CM: ; %bb.0:3696; CM-NEXT: CF_END3697; CM-NEXT: PAD3698 %result = call afn <3 x half> @llvm.exp2.v3f16(<3 x half> %in)3699 ret <3 x half> %result3700}3701 3702define float @v_exp2_f32_contract(float %in) {3703; SI-SDAG-LABEL: v_exp2_f32_contract:3704; SI-SDAG: ; %bb.0:3705; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3706; SI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00003707; SI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03708; SI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000003709; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc3710; SI-SDAG-NEXT: v_add_f32_e32 v0, v0, v23711; SI-SDAG-NEXT: v_exp_f32_e32 v0, v03712; SI-SDAG-NEXT: v_not_b32_e32 v1, 633713; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3714; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v13715; SI-SDAG-NEXT: s_setpc_b64 s[30:31]3716;3717; SI-GISEL-LABEL: v_exp2_f32_contract:3718; SI-GISEL: ; %bb.0:3719; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3720; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00003721; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000003722; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13723; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc3724; SI-GISEL-NEXT: v_add_f32_e32 v0, v0, v13725; SI-GISEL-NEXT: v_exp_f32_e32 v0, v03726; SI-GISEL-NEXT: v_not_b32_e32 v1, 633727; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3728; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v13729; SI-GISEL-NEXT: s_setpc_b64 s[30:31]3730;3731; VI-SDAG-LABEL: v_exp2_f32_contract:3732; VI-SDAG: ; %bb.0:3733; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3734; VI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00003735; VI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03736; VI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000003737; VI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc3738; VI-SDAG-NEXT: v_add_f32_e32 v0, v0, v23739; VI-SDAG-NEXT: v_exp_f32_e32 v0, v03740; VI-SDAG-NEXT: v_not_b32_e32 v1, 633741; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3742; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, v13743; VI-SDAG-NEXT: s_setpc_b64 s[30:31]3744;3745; VI-GISEL-LABEL: v_exp2_f32_contract:3746; VI-GISEL: ; %bb.0:3747; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3748; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00003749; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000003750; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13751; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc3752; VI-GISEL-NEXT: v_add_f32_e32 v0, v0, v13753; VI-GISEL-NEXT: v_exp_f32_e32 v0, v03754; VI-GISEL-NEXT: v_not_b32_e32 v1, 633755; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3756; VI-GISEL-NEXT: v_ldexp_f32 v0, v0, v13757; VI-GISEL-NEXT: s_setpc_b64 s[30:31]3758;3759; GFX900-SDAG-LABEL: v_exp2_f32_contract:3760; GFX900-SDAG: ; %bb.0:3761; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3762; GFX900-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00003763; GFX900-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03764; GFX900-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000003765; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc3766; GFX900-SDAG-NEXT: v_add_f32_e32 v0, v0, v23767; GFX900-SDAG-NEXT: v_exp_f32_e32 v0, v03768; GFX900-SDAG-NEXT: v_not_b32_e32 v1, 633769; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3770; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, v13771; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]3772;3773; GFX900-GISEL-LABEL: v_exp2_f32_contract:3774; GFX900-GISEL: ; %bb.0:3775; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3776; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00003777; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000003778; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13779; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc3780; GFX900-GISEL-NEXT: v_add_f32_e32 v0, v0, v13781; GFX900-GISEL-NEXT: v_exp_f32_e32 v0, v03782; GFX900-GISEL-NEXT: v_not_b32_e32 v1, 633783; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3784; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v13785; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]3786;3787; R600-LABEL: v_exp2_f32_contract:3788; R600: ; %bb.0:3789; R600-NEXT: CF_END3790; R600-NEXT: PAD3791;3792; CM-LABEL: v_exp2_f32_contract:3793; CM: ; %bb.0:3794; CM-NEXT: CF_END3795; CM-NEXT: PAD3796 %result = call contract float @llvm.exp2.f32(float %in)3797 ret float %result3798}3799 3800define float @v_exp2_f32_contract_daz(float %in) #0 {3801; GCN-LABEL: v_exp2_f32_contract_daz:3802; GCN: ; %bb.0:3803; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3804; GCN-NEXT: v_exp_f32_e32 v0, v03805; GCN-NEXT: s_setpc_b64 s[30:31]3806;3807; R600-LABEL: v_exp2_f32_contract_daz:3808; R600: ; %bb.0:3809; R600-NEXT: CF_END3810; R600-NEXT: PAD3811;3812; CM-LABEL: v_exp2_f32_contract_daz:3813; CM: ; %bb.0:3814; CM-NEXT: CF_END3815; CM-NEXT: PAD3816 %result = call contract float @llvm.exp2.f32(float %in)3817 ret float %result3818}3819 3820define float @v_exp2_f32_contract_nnan_ninf(float %in) {3821; SI-SDAG-LABEL: v_exp2_f32_contract_nnan_ninf:3822; SI-SDAG: ; %bb.0:3823; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3824; SI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00003825; SI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03826; SI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000003827; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc3828; SI-SDAG-NEXT: v_add_f32_e32 v0, v0, v23829; SI-SDAG-NEXT: v_exp_f32_e32 v0, v03830; SI-SDAG-NEXT: v_not_b32_e32 v1, 633831; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3832; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v13833; SI-SDAG-NEXT: s_setpc_b64 s[30:31]3834;3835; SI-GISEL-LABEL: v_exp2_f32_contract_nnan_ninf:3836; SI-GISEL: ; %bb.0:3837; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3838; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00003839; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000003840; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13841; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc3842; SI-GISEL-NEXT: v_add_f32_e32 v0, v0, v13843; SI-GISEL-NEXT: v_exp_f32_e32 v0, v03844; SI-GISEL-NEXT: v_not_b32_e32 v1, 633845; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3846; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v13847; SI-GISEL-NEXT: s_setpc_b64 s[30:31]3848;3849; VI-SDAG-LABEL: v_exp2_f32_contract_nnan_ninf:3850; VI-SDAG: ; %bb.0:3851; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3852; VI-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00003853; VI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03854; VI-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000003855; VI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc3856; VI-SDAG-NEXT: v_add_f32_e32 v0, v0, v23857; VI-SDAG-NEXT: v_exp_f32_e32 v0, v03858; VI-SDAG-NEXT: v_not_b32_e32 v1, 633859; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3860; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, v13861; VI-SDAG-NEXT: s_setpc_b64 s[30:31]3862;3863; VI-GISEL-LABEL: v_exp2_f32_contract_nnan_ninf:3864; VI-GISEL: ; %bb.0:3865; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3866; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00003867; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000003868; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13869; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc3870; VI-GISEL-NEXT: v_add_f32_e32 v0, v0, v13871; VI-GISEL-NEXT: v_exp_f32_e32 v0, v03872; VI-GISEL-NEXT: v_not_b32_e32 v1, 633873; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3874; VI-GISEL-NEXT: v_ldexp_f32 v0, v0, v13875; VI-GISEL-NEXT: s_setpc_b64 s[30:31]3876;3877; GFX900-SDAG-LABEL: v_exp2_f32_contract_nnan_ninf:3878; GFX900-SDAG: ; %bb.0:3879; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3880; GFX900-SDAG-NEXT: s_mov_b32 s4, 0xc2fc00003881; GFX900-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03882; GFX900-SDAG-NEXT: v_mov_b32_e32 v2, 0x428000003883; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc3884; GFX900-SDAG-NEXT: v_add_f32_e32 v0, v0, v23885; GFX900-SDAG-NEXT: v_exp_f32_e32 v0, v03886; GFX900-SDAG-NEXT: v_not_b32_e32 v1, 633887; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3888; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, v13889; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]3890;3891; GFX900-GISEL-LABEL: v_exp2_f32_contract_nnan_ninf:3892; GFX900-GISEL: ; %bb.0:3893; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3894; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0xc2fc00003895; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x428000003896; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13897; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc3898; GFX900-GISEL-NEXT: v_add_f32_e32 v0, v0, v13899; GFX900-GISEL-NEXT: v_exp_f32_e32 v0, v03900; GFX900-GISEL-NEXT: v_not_b32_e32 v1, 633901; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3902; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v13903; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]3904;3905; R600-LABEL: v_exp2_f32_contract_nnan_ninf:3906; R600: ; %bb.0:3907; R600-NEXT: CF_END3908; R600-NEXT: PAD3909;3910; CM-LABEL: v_exp2_f32_contract_nnan_ninf:3911; CM: ; %bb.0:3912; CM-NEXT: CF_END3913; CM-NEXT: PAD3914 %result = call contract nnan ninf float @llvm.exp2.f32(float %in)3915 ret float %result3916}3917 3918declare float @llvm.fabs.f32(float) #23919declare float @llvm.exp2.f32(float) #23920declare <2 x float> @llvm.exp2.v2f32(<2 x float>) #23921declare <3 x float> @llvm.exp2.v3f32(<3 x float>) #23922declare <4 x float> @llvm.exp2.v4f32(<4 x float>) #23923declare half @llvm.fabs.f16(half) #23924declare half @llvm.exp2.f16(half) #23925declare <2 x half> @llvm.exp2.v2f16(<2 x half>) #23926declare <2 x half> @llvm.fabs.v2f16(<2 x half>) #23927declare <3 x half> @llvm.exp2.v3f16(<3 x half>) #23928 3929attributes #0 = { "denormal-fp-math-f32"="ieee,preserve-sign" }3930attributes #1 = { "denormal-fp-math-f32"="dynamic,dynamic" }3931attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }3932;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:3933; GCN-GISEL: {{.*}}3934; GCN-SDAG: {{.*}}3935