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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefixes=SI %s3; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=fiji -mattr=-flat-for-global < %s | FileCheck -check-prefixes=VI %s4; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,-flat-for-global < %s | FileCheck -check-prefixes=GFX11 %s5; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16,-flat-for-global < %s | FileCheck -check-prefixes=GFX11-FAKE16 %s6 7declare half @llvm.floor.f16(half %a)8declare <2 x half> @llvm.floor.v2f16(<2 x half> %a)9 10define amdgpu_kernel void @floor_f16(11; SI-LABEL: floor_f16:12; SI: ; %bb.0: ; %entry13; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x914; SI-NEXT: s_mov_b32 s7, 0xf00015; SI-NEXT: s_mov_b32 s6, -116; SI-NEXT: s_mov_b32 s10, s617; SI-NEXT: s_mov_b32 s11, s718; SI-NEXT: s_waitcnt lgkmcnt(0)19; SI-NEXT: s_mov_b32 s8, s220; SI-NEXT: s_mov_b32 s9, s321; SI-NEXT: buffer_load_ushort v0, off, s[8:11], 022; SI-NEXT: s_mov_b32 s4, s023; SI-NEXT: s_mov_b32 s5, s124; SI-NEXT: s_waitcnt vmcnt(0)25; SI-NEXT: v_cvt_f32_f16_e32 v0, v026; SI-NEXT: v_floor_f32_e32 v0, v027; SI-NEXT: v_cvt_f16_f32_e32 v0, v028; SI-NEXT: buffer_store_short v0, off, s[4:7], 029; SI-NEXT: s_endpgm30;31; VI-LABEL: floor_f16:32; VI: ; %bb.0: ; %entry33; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2434; VI-NEXT: s_mov_b32 s7, 0xf00035; VI-NEXT: s_mov_b32 s6, -136; VI-NEXT: s_mov_b32 s10, s637; VI-NEXT: s_mov_b32 s11, s738; VI-NEXT: s_waitcnt lgkmcnt(0)39; VI-NEXT: s_mov_b32 s8, s240; VI-NEXT: s_mov_b32 s9, s341; VI-NEXT: buffer_load_ushort v0, off, s[8:11], 042; VI-NEXT: s_mov_b32 s4, s043; VI-NEXT: s_mov_b32 s5, s144; VI-NEXT: s_waitcnt vmcnt(0)45; VI-NEXT: v_floor_f16_e32 v0, v046; VI-NEXT: buffer_store_short v0, off, s[4:7], 047; VI-NEXT: s_endpgm48;49; GFX11-LABEL: floor_f16:50; GFX11: ; %bb.0: ; %entry51; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x2452; GFX11-NEXT: s_mov_b32 s6, -153; GFX11-NEXT: s_mov_b32 s7, 0x3101600054; GFX11-NEXT: s_mov_b32 s10, s655; GFX11-NEXT: s_mov_b32 s11, s756; GFX11-NEXT: s_waitcnt lgkmcnt(0)57; GFX11-NEXT: s_mov_b32 s8, s258; GFX11-NEXT: s_mov_b32 s9, s359; GFX11-NEXT: s_mov_b32 s4, s060; GFX11-NEXT: buffer_load_u16 v0, off, s[8:11], 061; GFX11-NEXT: s_mov_b32 s5, s162; GFX11-NEXT: s_waitcnt vmcnt(0)63; GFX11-NEXT: v_floor_f16_e32 v0.l, v0.l64; GFX11-NEXT: buffer_store_b16 v0, off, s[4:7], 065; GFX11-NEXT: s_endpgm66;67; GFX11-FAKE16-LABEL: floor_f16:68; GFX11-FAKE16: ; %bb.0: ; %entry69; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x2470; GFX11-FAKE16-NEXT: s_mov_b32 s6, -171; GFX11-FAKE16-NEXT: s_mov_b32 s7, 0x3101600072; GFX11-FAKE16-NEXT: s_mov_b32 s10, s673; GFX11-FAKE16-NEXT: s_mov_b32 s11, s774; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)75; GFX11-FAKE16-NEXT: s_mov_b32 s8, s276; GFX11-FAKE16-NEXT: s_mov_b32 s9, s377; GFX11-FAKE16-NEXT: s_mov_b32 s4, s078; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[8:11], 079; GFX11-FAKE16-NEXT: s_mov_b32 s5, s180; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)81; GFX11-FAKE16-NEXT: v_floor_f16_e32 v0, v082; GFX11-FAKE16-NEXT: buffer_store_b16 v0, off, s[4:7], 083; GFX11-FAKE16-NEXT: s_endpgm84 ptr addrspace(1) %r,85 ptr addrspace(1) %a) {86entry:87 %a.val = load half, ptr addrspace(1) %a88 %r.val = call half @llvm.floor.f16(half %a.val)89 store half %r.val, ptr addrspace(1) %r90 ret void91}92 93; The original test with manual checks also had these NOT directives:94; COM: SI-DAG: v_lshlrev_b32_e32 v[[R_F16_HI:[0-9]+]], 16, v[[R_F16_1]]95; COM: SI-NOT: and96; COM: SI: v_or_b32_e32 v[[R_V2_F16:[0-9]+]], v[[R_F16_0]], v[[R_F16_HI]]97; COM: VI-DAG: v_floor_f16_e32 v[[R_F16_0:[0-9]+]], v[[A_V2_F16]]98; COM: VI-DAG: v_floor_f16_sdwa v[[R_F16_1:[0-9]+]], v[[A_V2_F16]] dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_199; COM: VI-NOT: and100; COM: VI: v_or_b32_e32 v[[R_V2_F16:[0-9]+]], v[[R_F16_0]], v[[R_F16_1]]101define amdgpu_kernel void @floor_v2f16(102; SI-LABEL: floor_v2f16:103; SI: ; %bb.0: ; %entry104; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9105; SI-NEXT: s_mov_b32 s7, 0xf000106; SI-NEXT: s_mov_b32 s6, -1107; SI-NEXT: s_mov_b32 s10, s6108; SI-NEXT: s_mov_b32 s11, s7109; SI-NEXT: s_waitcnt lgkmcnt(0)110; SI-NEXT: s_mov_b32 s8, s2111; SI-NEXT: s_mov_b32 s9, s3112; SI-NEXT: buffer_load_dword v0, off, s[8:11], 0113; SI-NEXT: s_mov_b32 s4, s0114; SI-NEXT: s_mov_b32 s5, s1115; SI-NEXT: s_waitcnt vmcnt(0)116; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0117; SI-NEXT: v_cvt_f32_f16_e32 v1, v1118; SI-NEXT: v_cvt_f32_f16_e32 v0, v0119; SI-NEXT: v_floor_f32_e32 v1, v1120; SI-NEXT: v_cvt_f16_f32_e32 v1, v1121; SI-NEXT: v_floor_f32_e32 v0, v0122; SI-NEXT: v_cvt_f16_f32_e32 v0, v0123; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1124; SI-NEXT: v_or_b32_e32 v0, v0, v1125; SI-NEXT: buffer_store_dword v0, off, s[4:7], 0126; SI-NEXT: s_endpgm127;128; VI-LABEL: floor_v2f16:129; VI: ; %bb.0: ; %entry130; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24131; VI-NEXT: s_mov_b32 s7, 0xf000132; VI-NEXT: s_mov_b32 s6, -1133; VI-NEXT: s_mov_b32 s10, s6134; VI-NEXT: s_mov_b32 s11, s7135; VI-NEXT: s_waitcnt lgkmcnt(0)136; VI-NEXT: s_mov_b32 s8, s2137; VI-NEXT: s_mov_b32 s9, s3138; VI-NEXT: buffer_load_dword v0, off, s[8:11], 0139; VI-NEXT: s_mov_b32 s4, s0140; VI-NEXT: s_mov_b32 s5, s1141; VI-NEXT: s_waitcnt vmcnt(0)142; VI-NEXT: v_floor_f16_sdwa v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1143; VI-NEXT: v_floor_f16_e32 v0, v0144; VI-NEXT: v_or_b32_e32 v0, v0, v1145; VI-NEXT: buffer_store_dword v0, off, s[4:7], 0146; VI-NEXT: s_endpgm147;148; GFX11-LABEL: floor_v2f16:149; GFX11: ; %bb.0: ; %entry150; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24151; GFX11-NEXT: s_mov_b32 s6, -1152; GFX11-NEXT: s_mov_b32 s7, 0x31016000153; GFX11-NEXT: s_mov_b32 s10, s6154; GFX11-NEXT: s_mov_b32 s11, s7155; GFX11-NEXT: s_waitcnt lgkmcnt(0)156; GFX11-NEXT: s_mov_b32 s8, s2157; GFX11-NEXT: s_mov_b32 s9, s3158; GFX11-NEXT: s_mov_b32 s4, s0159; GFX11-NEXT: buffer_load_b32 v0, off, s[8:11], 0160; GFX11-NEXT: s_mov_b32 s5, s1161; GFX11-NEXT: s_waitcnt vmcnt(0)162; GFX11-NEXT: v_lshrrev_b32_e32 v1, 16, v0163; GFX11-NEXT: v_floor_f16_e32 v0.l, v0.l164; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)165; GFX11-NEXT: v_floor_f16_e32 v0.h, v1.l166; GFX11-NEXT: v_pack_b32_f16 v0, v0.l, v0.h167; GFX11-NEXT: buffer_store_b32 v0, off, s[4:7], 0168; GFX11-NEXT: s_endpgm169;170; GFX11-FAKE16-LABEL: floor_v2f16:171; GFX11-FAKE16: ; %bb.0: ; %entry172; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24173; GFX11-FAKE16-NEXT: s_mov_b32 s6, -1174; GFX11-FAKE16-NEXT: s_mov_b32 s7, 0x31016000175; GFX11-FAKE16-NEXT: s_mov_b32 s10, s6176; GFX11-FAKE16-NEXT: s_mov_b32 s11, s7177; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)178; GFX11-FAKE16-NEXT: s_mov_b32 s8, s2179; GFX11-FAKE16-NEXT: s_mov_b32 s9, s3180; GFX11-FAKE16-NEXT: s_mov_b32 s4, s0181; GFX11-FAKE16-NEXT: buffer_load_b32 v0, off, s[8:11], 0182; GFX11-FAKE16-NEXT: s_mov_b32 s5, s1183; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)184; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0185; GFX11-FAKE16-NEXT: v_floor_f16_e32 v0, v0186; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)187; GFX11-FAKE16-NEXT: v_floor_f16_e32 v1, v1188; GFX11-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v1189; GFX11-FAKE16-NEXT: buffer_store_b32 v0, off, s[4:7], 0190; GFX11-FAKE16-NEXT: s_endpgm191 ptr addrspace(1) %r,192 ptr addrspace(1) %a) {193entry:194 %a.val = load <2 x half>, ptr addrspace(1) %a195 %r.val = call <2 x half> @llvm.floor.v2f16(<2 x half> %a.val)196 store <2 x half> %r.val, ptr addrspace(1) %r197 ret void198}199