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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefixes=GFX689,SI,GFX689-SDAG,SI-SDAG %s3; RUN: llc -global-isel=1 -global-isel-abort=2 -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefixes=GFX689,SI,GFX689-GISEL,SI-GISEL %s4; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=tonga < %s | FileCheck -check-prefixes=GFX689,VI,GFX689-SDAG,VI-SDAG %s5; RUN: llc -global-isel=1 -global-isel-abort=2 -mtriple=amdgcn -mcpu=tonga < %s | FileCheck -check-prefixes=GFX689,VI,GFX689-GISEL,VI-GISEL %s6; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefixes=GFX689,GFX900,GFX689-SDAG,GFX900-SDAG %s7; RUN: llc -global-isel=1 -global-isel-abort=2 -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefixes=GFX689,GFX900,GFX689-GISEL,GFX900-GISEL %s8; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX1100,GFX1100-SDAG,GFX1100-SDAG-TRUE16 %s9; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX1100,GFX1100-SDAG,GFX1100-SDAG-FAKE16 %s10; RUN: llc -global-isel=1 -global-isel-abort=2 -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX1100,GFX1100-GISEL,GFX1100-GISEL-TRUE16 %s11; RUN: llc -global-isel=1 -global-isel-abort=2 -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX1100,GFX1100-GISEL,GFX1100-GISEL-FAKE16 %s12 13; RUN: llc -mtriple=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 %s14; RUN: llc -mtriple=r600 -mcpu=cayman < %s | FileCheck -check-prefix=CM %s15 16define amdgpu_kernel void @s_log_f32(ptr addrspace(1) %out, float %in) {17; SI-SDAG-LABEL: s_log_f32:18; SI-SDAG: ; %bb.0:19; SI-SDAG-NEXT: s_load_dword s6, s[4:5], 0xb20; SI-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x921; SI-SDAG-NEXT: v_mov_b32_e32 v0, 0x80000022; SI-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b1721823; SI-SDAG-NEXT: s_mov_b32 s4, 0x3f31721724; SI-SDAG-NEXT: s_waitcnt lgkmcnt(0)25; SI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s6, v026; SI-SDAG-NEXT: s_and_b64 s[2:3], vcc, exec27; SI-SDAG-NEXT: s_cselect_b32 s2, 32, 028; SI-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc29; SI-SDAG-NEXT: v_mov_b32_e32 v1, s230; SI-SDAG-NEXT: v_ldexp_f32_e32 v1, s6, v131; SI-SDAG-NEXT: v_log_f32_e32 v1, v132; SI-SDAG-NEXT: s_mov_b32 s3, 0xf00033; SI-SDAG-NEXT: s_mov_b32 s2, -134; SI-SDAG-NEXT: v_mul_f32_e32 v2, 0x3f317217, v135; SI-SDAG-NEXT: v_fma_f32 v3, v1, s4, -v236; SI-SDAG-NEXT: s_mov_b32 s4, 0x3377d1cf37; SI-SDAG-NEXT: v_fma_f32 v3, v1, s4, v338; SI-SDAG-NEXT: s_mov_b32 s4, 0x7f80000039; SI-SDAG-NEXT: v_add_f32_e32 v2, v2, v340; SI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, s441; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc42; SI-SDAG-NEXT: v_sub_f32_e32 v0, v1, v043; SI-SDAG-NEXT: buffer_store_dword v0, off, s[0:3], 044; SI-SDAG-NEXT: s_endpgm45;46; SI-GISEL-LABEL: s_log_f32:47; SI-GISEL: ; %bb.0:48; SI-GISEL-NEXT: s_load_dword s0, s[4:5], 0xb49; SI-GISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x950; SI-GISEL-NEXT: v_mov_b32_e32 v0, 0x80000051; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f31721752; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x3377d1cf53; SI-GISEL-NEXT: s_waitcnt lgkmcnt(0)54; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s0, v055; SI-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc56; SI-GISEL-NEXT: v_lshlrev_b32_e32 v0, 5, v057; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, s0, v058; SI-GISEL-NEXT: v_log_f32_e32 v0, v059; SI-GISEL-NEXT: v_mov_b32_e32 v3, 0x7f80000060; SI-GISEL-NEXT: s_mov_b32 s6, -161; SI-GISEL-NEXT: s_mov_b32 s7, 0xf00062; SI-GISEL-NEXT: v_mul_f32_e32 v4, 0x3f317217, v063; SI-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v464; SI-GISEL-NEXT: v_fma_f32 v1, v0, v2, v165; SI-GISEL-NEXT: v_add_f32_e32 v1, v4, v166; SI-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], |v0|, v367; SI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[0:1]68; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b1721869; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc70; SI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v171; SI-GISEL-NEXT: buffer_store_dword v0, off, s[4:7], 072; SI-GISEL-NEXT: s_endpgm73;74; VI-SDAG-LABEL: s_log_f32:75; VI-SDAG: ; %bb.0:76; VI-SDAG-NEXT: s_load_dword s2, s[4:5], 0x2c77; VI-SDAG-NEXT: v_mov_b32_e32 v0, 0x80000078; VI-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b1721879; VI-SDAG-NEXT: s_waitcnt lgkmcnt(0)80; VI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s2, v081; VI-SDAG-NEXT: s_and_b64 s[0:1], vcc, exec82; VI-SDAG-NEXT: s_cselect_b32 s0, 32, 083; VI-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc84; VI-SDAG-NEXT: v_mov_b32_e32 v1, s085; VI-SDAG-NEXT: v_ldexp_f32 v1, s2, v186; VI-SDAG-NEXT: v_log_f32_e32 v1, v187; VI-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2488; VI-SDAG-NEXT: s_mov_b32 s2, 0x7f80000089; VI-SDAG-NEXT: v_and_b32_e32 v2, 0xfffff000, v190; VI-SDAG-NEXT: v_sub_f32_e32 v3, v1, v291; VI-SDAG-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v292; VI-SDAG-NEXT: v_mul_f32_e32 v5, 0x3f317000, v393; VI-SDAG-NEXT: v_mul_f32_e32 v3, 0x3805fdf4, v394; VI-SDAG-NEXT: v_add_f32_e32 v3, v4, v395; VI-SDAG-NEXT: v_mul_f32_e32 v2, 0x3f317000, v296; VI-SDAG-NEXT: v_add_f32_e32 v3, v5, v397; VI-SDAG-NEXT: v_add_f32_e32 v2, v2, v398; VI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, s299; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc100; VI-SDAG-NEXT: v_sub_f32_e32 v2, v1, v0101; VI-SDAG-NEXT: s_waitcnt lgkmcnt(0)102; VI-SDAG-NEXT: v_mov_b32_e32 v0, s0103; VI-SDAG-NEXT: v_mov_b32_e32 v1, s1104; VI-SDAG-NEXT: flat_store_dword v[0:1], v2105; VI-SDAG-NEXT: s_endpgm106;107; VI-GISEL-LABEL: s_log_f32:108; VI-GISEL: ; %bb.0:109; VI-GISEL-NEXT: s_load_dword s0, s[4:5], 0x2c110; VI-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24111; VI-GISEL-NEXT: v_mov_b32_e32 v0, 0x800000112; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x7f800000113; VI-GISEL-NEXT: s_waitcnt lgkmcnt(0)114; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s0, v0115; VI-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc116; VI-GISEL-NEXT: v_lshlrev_b32_e32 v0, 5, v0117; VI-GISEL-NEXT: v_ldexp_f32 v0, s0, v0118; VI-GISEL-NEXT: v_log_f32_e32 v0, v0119; VI-GISEL-NEXT: v_and_b32_e32 v2, 0xfffff000, v0120; VI-GISEL-NEXT: v_sub_f32_e32 v3, v0, v2121; VI-GISEL-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v2122; VI-GISEL-NEXT: v_mul_f32_e32 v5, 0x3805fdf4, v3123; VI-GISEL-NEXT: v_mul_f32_e32 v3, 0x3f317000, v3124; VI-GISEL-NEXT: v_add_f32_e32 v4, v4, v5125; VI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317000, v2126; VI-GISEL-NEXT: v_add_f32_e32 v3, v3, v4127; VI-GISEL-NEXT: v_add_f32_e32 v2, v2, v3128; VI-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], |v0|, v1129; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b17218130; VI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]131; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc132; VI-GISEL-NEXT: v_sub_f32_e32 v2, v0, v1133; VI-GISEL-NEXT: v_mov_b32_e32 v0, s2134; VI-GISEL-NEXT: v_mov_b32_e32 v1, s3135; VI-GISEL-NEXT: flat_store_dword v[0:1], v2136; VI-GISEL-NEXT: s_endpgm137;138; GFX900-SDAG-LABEL: s_log_f32:139; GFX900-SDAG: ; %bb.0:140; GFX900-SDAG-NEXT: s_load_dword s6, s[4:5], 0x2c141; GFX900-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24142; GFX900-SDAG-NEXT: v_mov_b32_e32 v0, 0x800000143; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b17218144; GFX900-SDAG-NEXT: v_mov_b32_e32 v2, 0145; GFX900-SDAG-NEXT: s_waitcnt lgkmcnt(0)146; GFX900-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s6, v0147; GFX900-SDAG-NEXT: s_and_b64 s[2:3], vcc, exec148; GFX900-SDAG-NEXT: s_cselect_b32 s2, 32, 0149; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc150; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, s2151; GFX900-SDAG-NEXT: v_ldexp_f32 v1, s6, v1152; GFX900-SDAG-NEXT: v_log_f32_e32 v1, v1153; GFX900-SDAG-NEXT: s_mov_b32 s2, 0x3f317217154; GFX900-SDAG-NEXT: s_mov_b32 s3, 0x3377d1cf155; GFX900-SDAG-NEXT: v_mul_f32_e32 v3, 0x3f317217, v1156; GFX900-SDAG-NEXT: v_fma_f32 v4, v1, s2, -v3157; GFX900-SDAG-NEXT: v_fma_f32 v4, v1, s3, v4158; GFX900-SDAG-NEXT: s_mov_b32 s2, 0x7f800000159; GFX900-SDAG-NEXT: v_add_f32_e32 v3, v3, v4160; GFX900-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, s2161; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc162; GFX900-SDAG-NEXT: v_sub_f32_e32 v0, v1, v0163; GFX900-SDAG-NEXT: global_store_dword v2, v0, s[0:1]164; GFX900-SDAG-NEXT: s_endpgm165;166; GFX900-GISEL-LABEL: s_log_f32:167; GFX900-GISEL: ; %bb.0:168; GFX900-GISEL-NEXT: s_load_dword s0, s[4:5], 0x2c169; GFX900-GISEL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24170; GFX900-GISEL-NEXT: v_mov_b32_e32 v0, 0x800000171; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x3f317217172; GFX900-GISEL-NEXT: v_mov_b32_e32 v3, 0x3377d1cf173; GFX900-GISEL-NEXT: s_waitcnt lgkmcnt(0)174; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s0, v0175; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc176; GFX900-GISEL-NEXT: v_lshlrev_b32_e32 v0, 5, v0177; GFX900-GISEL-NEXT: v_ldexp_f32 v0, s0, v0178; GFX900-GISEL-NEXT: v_log_f32_e32 v0, v0179; GFX900-GISEL-NEXT: v_mov_b32_e32 v4, 0x7f800000180; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0181; GFX900-GISEL-NEXT: v_mul_f32_e32 v5, 0x3f317217, v0182; GFX900-GISEL-NEXT: v_fma_f32 v2, v0, v2, -v5183; GFX900-GISEL-NEXT: v_fma_f32 v2, v0, v3, v2184; GFX900-GISEL-NEXT: v_add_f32_e32 v2, v5, v2185; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], |v0|, v4186; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]187; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x41b17218188; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc189; GFX900-GISEL-NEXT: v_sub_f32_e32 v0, v0, v2190; GFX900-GISEL-NEXT: global_store_dword v1, v0, s[2:3]191; GFX900-GISEL-NEXT: s_endpgm192;193; GFX1100-SDAG-LABEL: s_log_f32:194; GFX1100-SDAG: ; %bb.0:195; GFX1100-SDAG-NEXT: s_load_b32 s0, s[4:5], 0x2c196; GFX1100-SDAG-NEXT: s_waitcnt lgkmcnt(0)197; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 s1, 0x800000, s0198; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)199; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 0x41b17218, s1200; GFX1100-SDAG-NEXT: s_and_b32 s1, s1, exec_lo201; GFX1100-SDAG-NEXT: s_cselect_b32 s1, 32, 0202; GFX1100-SDAG-NEXT: v_ldexp_f32 v1, s0, s1203; GFX1100-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24204; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)205; GFX1100-SDAG-NEXT: v_log_f32_e32 v1, v1206; GFX1100-SDAG-NEXT: s_waitcnt_depctr depctr_va_vdst(0)207; GFX1100-SDAG-NEXT: v_mul_f32_e32 v2, 0x3f317217, v1208; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v1|209; GFX1100-SDAG-NEXT: v_fma_f32 v3, 0x3f317217, v1, -v2210; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)211; GFX1100-SDAG-NEXT: v_fmamk_f32 v3, v1, 0x3377d1cf, v3212; GFX1100-SDAG-NEXT: v_add_f32_e32 v2, v2, v3213; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)214; GFX1100-SDAG-NEXT: v_dual_cndmask_b32 v1, v1, v2 :: v_dual_mov_b32 v2, 0215; GFX1100-SDAG-NEXT: v_sub_f32_e32 v0, v1, v0216; GFX1100-SDAG-NEXT: s_waitcnt lgkmcnt(0)217; GFX1100-SDAG-NEXT: global_store_b32 v2, v0, s[0:1]218; GFX1100-SDAG-NEXT: s_endpgm219;220; GFX1100-GISEL-LABEL: s_log_f32:221; GFX1100-GISEL: ; %bb.0:222; GFX1100-GISEL-NEXT: s_load_b32 s0, s[4:5], 0x2c223; GFX1100-GISEL-NEXT: s_waitcnt lgkmcnt(0)224; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 s2, 0x800000, s0225; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)226; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, s2227; GFX1100-GISEL-NEXT: v_lshlrev_b32_e32 v0, 5, v0228; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)229; GFX1100-GISEL-NEXT: v_ldexp_f32 v0, s0, v0230; GFX1100-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24231; GFX1100-GISEL-NEXT: v_log_f32_e32 v0, v0232; GFX1100-GISEL-NEXT: s_waitcnt_depctr depctr_va_vdst(0)233; GFX1100-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317217, v0234; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|235; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)236; GFX1100-GISEL-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v1237; GFX1100-GISEL-NEXT: v_fmac_f32_e32 v2, 0x3377d1cf, v0238; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)239; GFX1100-GISEL-NEXT: v_dual_add_f32 v1, v1, v2 :: v_dual_mov_b32 v2, 0240; GFX1100-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo241; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 0x41b17218, s2242; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)243; GFX1100-GISEL-NEXT: v_sub_f32_e32 v0, v0, v1244; GFX1100-GISEL-NEXT: s_waitcnt lgkmcnt(0)245; GFX1100-GISEL-NEXT: global_store_b32 v2, v0, s[0:1]246; GFX1100-GISEL-NEXT: s_endpgm247;248; R600-LABEL: s_log_f32:249; R600: ; %bb.0:250; R600-NEXT: ALU 23, @4, KC0[CB0:0-32], KC1[]251; R600-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1252; R600-NEXT: CF_END253; R600-NEXT: PAD254; R600-NEXT: ALU clause starting at 4:255; R600-NEXT: SETGT * T0.W, literal.x, KC0[2].Z,256; R600-NEXT: 8388608(1.175494e-38), 0(0.000000e+00)257; R600-NEXT: CNDE * T1.W, PV.W, 1.0, literal.x,258; R600-NEXT: 1333788672(4.294967e+09), 0(0.000000e+00)259; R600-NEXT: MUL_IEEE * T1.W, KC0[2].Z, PV.W,260; R600-NEXT: LOG_IEEE * T0.X, PV.W,261; R600-NEXT: AND_INT * T1.W, PS, literal.x,262; R600-NEXT: -4096(nan), 0(0.000000e+00)263; R600-NEXT: ADD * T2.W, T0.X, -PV.W,264; R600-NEXT: MUL_IEEE * T3.W, PV.W, literal.x,265; R600-NEXT: 939916788(3.194618e-05), 0(0.000000e+00)266; R600-NEXT: MULADD_IEEE * T3.W, T1.W, literal.x, PV.W,267; R600-NEXT: 939916788(3.194618e-05), 0(0.000000e+00)268; R600-NEXT: MULADD_IEEE * T2.W, T2.W, literal.x, PV.W,269; R600-NEXT: 1060204544(6.931152e-01), 0(0.000000e+00)270; R600-NEXT: MULADD_IEEE T1.W, T1.W, literal.x, PV.W,271; R600-NEXT: SETGT * T2.W, literal.y, |T0.X|,272; R600-NEXT: 1060204544(6.931152e-01), 2139095040(INF)273; R600-NEXT: CNDE T1.W, PS, T0.X, PV.W,274; R600-NEXT: CNDE * T0.W, T0.W, 0.0, literal.x,275; R600-NEXT: 1102148120(2.218071e+01), 0(0.000000e+00)276; R600-NEXT: ADD T0.X, PV.W, -PS,277; R600-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,278; R600-NEXT: 2(2.802597e-45), 0(0.000000e+00)279;280; CM-LABEL: s_log_f32:281; CM: ; %bb.0:282; CM-NEXT: ALU 26, @4, KC0[CB0:0-32], KC1[]283; CM-NEXT: MEM_RAT_CACHELESS STORE_DWORD T0.X, T1.X284; CM-NEXT: CF_END285; CM-NEXT: PAD286; CM-NEXT: ALU clause starting at 4:287; CM-NEXT: SETGT * T0.W, literal.x, KC0[2].Z,288; CM-NEXT: 8388608(1.175494e-38), 0(0.000000e+00)289; CM-NEXT: CNDE * T1.W, PV.W, 1.0, literal.x,290; CM-NEXT: 1333788672(4.294967e+09), 0(0.000000e+00)291; CM-NEXT: MUL_IEEE * T1.W, KC0[2].Z, PV.W,292; CM-NEXT: LOG_IEEE T0.X, T1.W,293; CM-NEXT: LOG_IEEE T0.Y (MASKED), T1.W,294; CM-NEXT: LOG_IEEE T0.Z (MASKED), T1.W,295; CM-NEXT: LOG_IEEE * T0.W (MASKED), T1.W,296; CM-NEXT: AND_INT * T1.W, PV.X, literal.x,297; CM-NEXT: -4096(nan), 0(0.000000e+00)298; CM-NEXT: ADD * T2.W, T0.X, -PV.W,299; CM-NEXT: MUL_IEEE * T3.W, PV.W, literal.x,300; CM-NEXT: 939916788(3.194618e-05), 0(0.000000e+00)301; CM-NEXT: MULADD_IEEE * T3.W, T1.W, literal.x, PV.W,302; CM-NEXT: 939916788(3.194618e-05), 0(0.000000e+00)303; CM-NEXT: MULADD_IEEE * T2.W, T2.W, literal.x, PV.W,304; CM-NEXT: 1060204544(6.931152e-01), 0(0.000000e+00)305; CM-NEXT: MULADD_IEEE T0.Z, T1.W, literal.x, PV.W,306; CM-NEXT: SETGT * T1.W, literal.y, |T0.X|,307; CM-NEXT: 1060204544(6.931152e-01), 2139095040(INF)308; CM-NEXT: CNDE T0.Z, PV.W, T0.X, PV.Z,309; CM-NEXT: CNDE * T0.W, T0.W, 0.0, literal.x,310; CM-NEXT: 1102148120(2.218071e+01), 0(0.000000e+00)311; CM-NEXT: ADD * T0.X, PV.Z, -PV.W,312; CM-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,313; CM-NEXT: 2(2.802597e-45), 0(0.000000e+00)314 %result = call float @llvm.log.f32(float %in)315 store float %result, ptr addrspace(1) %out316 ret void317}318 319; FIXME: We should be able to merge these packets together on Cayman so we320; have a maximum of 4 instructions.321define amdgpu_kernel void @s_log_v2f32(ptr addrspace(1) %out, <2 x float> %in) {322; SI-SDAG-LABEL: s_log_v2f32:323; SI-SDAG: ; %bb.0:324; SI-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9325; SI-SDAG-NEXT: v_mov_b32_e32 v0, 0x800000326; SI-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b17218327; SI-SDAG-NEXT: s_mov_b32 s8, 0x3f317217328; SI-SDAG-NEXT: s_mov_b32 s9, 0x7f800000329; SI-SDAG-NEXT: s_waitcnt lgkmcnt(0)330; SI-SDAG-NEXT: s_mov_b64 s[4:5], s[2:3]331; SI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s5, v0332; SI-SDAG-NEXT: s_and_b64 s[2:3], vcc, exec333; SI-SDAG-NEXT: s_cselect_b32 s2, 32, 0334; SI-SDAG-NEXT: v_mov_b32_e32 v3, s2335; SI-SDAG-NEXT: v_ldexp_f32_e32 v3, s5, v3336; SI-SDAG-NEXT: v_log_f32_e32 v3, v3337; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v1, vcc338; SI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s4, v0339; SI-SDAG-NEXT: s_and_b64 s[6:7], vcc, exec340; SI-SDAG-NEXT: v_mul_f32_e32 v4, 0x3f317217, v3341; SI-SDAG-NEXT: s_cselect_b32 s6, 32, 0342; SI-SDAG-NEXT: s_mov_b32 s5, 0x3377d1cf343; SI-SDAG-NEXT: v_fma_f32 v5, v3, s8, -v4344; SI-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc345; SI-SDAG-NEXT: v_mov_b32_e32 v1, s6346; SI-SDAG-NEXT: v_fma_f32 v5, v3, s5, v5347; SI-SDAG-NEXT: v_ldexp_f32_e32 v1, s4, v1348; SI-SDAG-NEXT: v_add_f32_e32 v4, v4, v5349; SI-SDAG-NEXT: v_log_f32_e32 v5, v1350; SI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v3|, s9351; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc352; SI-SDAG-NEXT: v_sub_f32_e32 v1, v1, v2353; SI-SDAG-NEXT: v_mul_f32_e32 v2, 0x3f317217, v5354; SI-SDAG-NEXT: v_fma_f32 v3, v5, s8, -v2355; SI-SDAG-NEXT: v_fma_f32 v3, v5, s5, v3356; SI-SDAG-NEXT: v_add_f32_e32 v2, v2, v3357; SI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v5|, s9358; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, v5, v2, vcc359; SI-SDAG-NEXT: s_mov_b32 s3, 0xf000360; SI-SDAG-NEXT: s_mov_b32 s2, -1361; SI-SDAG-NEXT: v_sub_f32_e32 v0, v2, v0362; SI-SDAG-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0363; SI-SDAG-NEXT: s_endpgm364;365; SI-GISEL-LABEL: s_log_v2f32:366; SI-GISEL: ; %bb.0:367; SI-GISEL-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x9368; SI-GISEL-NEXT: v_mov_b32_e32 v0, 0x800000369; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x3f317217370; SI-GISEL-NEXT: v_mov_b32_e32 v3, 0x3377d1cf371; SI-GISEL-NEXT: v_mov_b32_e32 v4, 0x7f800000372; SI-GISEL-NEXT: s_waitcnt lgkmcnt(0)373; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s6, v0374; SI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc375; SI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v1376; SI-GISEL-NEXT: v_ldexp_f32_e32 v1, s6, v1377; SI-GISEL-NEXT: v_log_f32_e32 v1, v1378; SI-GISEL-NEXT: s_mov_b32 s6, -1379; SI-GISEL-NEXT: v_mul_f32_e32 v5, 0x3f317217, v1380; SI-GISEL-NEXT: v_fma_f32 v6, v1, v2, -v5381; SI-GISEL-NEXT: v_fma_f32 v6, v1, v3, v6382; SI-GISEL-NEXT: v_add_f32_e32 v5, v5, v6383; SI-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], |v1|, v4384; SI-GISEL-NEXT: v_cndmask_b32_e64 v1, v1, v5, s[0:1]385; SI-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], s7, v0386; SI-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[0:1]387; SI-GISEL-NEXT: v_lshlrev_b32_e32 v0, 5, v0388; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, s7, v0389; SI-GISEL-NEXT: v_log_f32_e32 v5, v0390; SI-GISEL-NEXT: v_mov_b32_e32 v6, 0x41b17218391; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v6, vcc392; SI-GISEL-NEXT: v_sub_f32_e32 v0, v1, v0393; SI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317217, v5394; SI-GISEL-NEXT: v_fma_f32 v2, v5, v2, -v1395; SI-GISEL-NEXT: v_fma_f32 v2, v5, v3, v2396; SI-GISEL-NEXT: v_add_f32_e32 v1, v1, v2397; SI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v5|, v4398; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc399; SI-GISEL-NEXT: v_cndmask_b32_e64 v2, 0, v6, s[0:1]400; SI-GISEL-NEXT: v_sub_f32_e32 v1, v1, v2401; SI-GISEL-NEXT: s_mov_b32 s7, 0xf000402; SI-GISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0403; SI-GISEL-NEXT: s_endpgm404;405; VI-SDAG-LABEL: s_log_v2f32:406; VI-SDAG: ; %bb.0:407; VI-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24408; VI-SDAG-NEXT: v_mov_b32_e32 v0, 0x800000409; VI-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b17218410; VI-SDAG-NEXT: s_waitcnt lgkmcnt(0)411; VI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s3, v0412; VI-SDAG-NEXT: s_and_b64 s[4:5], vcc, exec413; VI-SDAG-NEXT: s_cselect_b32 s4, 32, 0414; VI-SDAG-NEXT: v_mov_b32_e32 v3, s4415; VI-SDAG-NEXT: v_ldexp_f32 v3, s3, v3416; VI-SDAG-NEXT: v_log_f32_e32 v3, v3417; VI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v1, vcc418; VI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s2, v0419; VI-SDAG-NEXT: s_and_b64 s[4:5], vcc, exec420; VI-SDAG-NEXT: v_and_b32_e32 v4, 0xfffff000, v3421; VI-SDAG-NEXT: v_sub_f32_e32 v5, v3, v4422; VI-SDAG-NEXT: v_mul_f32_e32 v6, 0x3805fdf4, v4423; VI-SDAG-NEXT: v_mul_f32_e32 v7, 0x3f317000, v5424; VI-SDAG-NEXT: v_mul_f32_e32 v5, 0x3805fdf4, v5425; VI-SDAG-NEXT: s_cselect_b32 s4, 32, 0426; VI-SDAG-NEXT: v_add_f32_e32 v5, v6, v5427; VI-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc428; VI-SDAG-NEXT: v_mov_b32_e32 v1, s4429; VI-SDAG-NEXT: v_mul_f32_e32 v4, 0x3f317000, v4430; VI-SDAG-NEXT: v_add_f32_e32 v5, v7, v5431; VI-SDAG-NEXT: v_ldexp_f32 v1, s2, v1432; VI-SDAG-NEXT: v_add_f32_e32 v4, v4, v5433; VI-SDAG-NEXT: v_log_f32_e32 v5, v1434; VI-SDAG-NEXT: s_mov_b32 s3, 0x7f800000435; VI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v3|, s3436; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc437; VI-SDAG-NEXT: v_sub_f32_e32 v1, v1, v2438; VI-SDAG-NEXT: v_and_b32_e32 v2, 0xfffff000, v5439; VI-SDAG-NEXT: v_sub_f32_e32 v3, v5, v2440; VI-SDAG-NEXT: v_mul_f32_e32 v4, 0x3f317000, v3441; VI-SDAG-NEXT: v_mul_f32_e32 v3, 0x3805fdf4, v3442; VI-SDAG-NEXT: v_mul_f32_e32 v6, 0x3805fdf4, v2443; VI-SDAG-NEXT: v_add_f32_e32 v3, v6, v3444; VI-SDAG-NEXT: v_add_f32_e32 v3, v4, v3445; VI-SDAG-NEXT: v_mul_f32_e32 v2, 0x3f317000, v2446; VI-SDAG-NEXT: v_add_f32_e32 v2, v2, v3447; VI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v5|, s3448; VI-SDAG-NEXT: v_cndmask_b32_e32 v2, v5, v2, vcc449; VI-SDAG-NEXT: v_sub_f32_e32 v0, v2, v0450; VI-SDAG-NEXT: v_mov_b32_e32 v3, s1451; VI-SDAG-NEXT: v_mov_b32_e32 v2, s0452; VI-SDAG-NEXT: flat_store_dwordx2 v[2:3], v[0:1]453; VI-SDAG-NEXT: s_endpgm454;455; VI-GISEL-LABEL: s_log_v2f32:456; VI-GISEL: ; %bb.0:457; VI-GISEL-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x24458; VI-GISEL-NEXT: v_mov_b32_e32 v0, 0x800000459; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f800000460; VI-GISEL-NEXT: s_waitcnt lgkmcnt(0)461; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s6, v0462; VI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc463; VI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v1464; VI-GISEL-NEXT: v_ldexp_f32 v1, s6, v1465; VI-GISEL-NEXT: v_log_f32_e32 v1, v1466; VI-GISEL-NEXT: v_and_b32_e32 v3, 0xfffff000, v1467; VI-GISEL-NEXT: v_sub_f32_e32 v4, v1, v3468; VI-GISEL-NEXT: v_mul_f32_e32 v5, 0x3805fdf4, v3469; VI-GISEL-NEXT: v_mul_f32_e32 v6, 0x3805fdf4, v4470; VI-GISEL-NEXT: v_mul_f32_e32 v4, 0x3f317000, v4471; VI-GISEL-NEXT: v_add_f32_e32 v5, v5, v6472; VI-GISEL-NEXT: v_mul_f32_e32 v3, 0x3f317000, v3473; VI-GISEL-NEXT: v_add_f32_e32 v4, v4, v5474; VI-GISEL-NEXT: v_add_f32_e32 v3, v3, v4475; VI-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], |v1|, v2476; VI-GISEL-NEXT: v_cndmask_b32_e64 v1, v1, v3, s[0:1]477; VI-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], s7, v0478; VI-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[0:1]479; VI-GISEL-NEXT: v_lshlrev_b32_e32 v0, 5, v0480; VI-GISEL-NEXT: v_ldexp_f32 v0, s7, v0481; VI-GISEL-NEXT: v_log_f32_e32 v3, v0482; VI-GISEL-NEXT: v_mov_b32_e32 v4, 0x41b17218483; VI-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v4, vcc484; VI-GISEL-NEXT: v_sub_f32_e32 v0, v1, v0485; VI-GISEL-NEXT: v_and_b32_e32 v1, 0xfffff000, v3486; VI-GISEL-NEXT: v_sub_f32_e32 v5, v3, v1487; VI-GISEL-NEXT: v_mul_f32_e32 v6, 0x3805fdf4, v5488; VI-GISEL-NEXT: v_mul_f32_e32 v7, 0x3805fdf4, v1489; VI-GISEL-NEXT: v_add_f32_e32 v6, v7, v6490; VI-GISEL-NEXT: v_mul_f32_e32 v5, 0x3f317000, v5491; VI-GISEL-NEXT: v_add_f32_e32 v5, v5, v6492; VI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317000, v1493; VI-GISEL-NEXT: v_add_f32_e32 v1, v1, v5494; VI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v3|, v2495; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc496; VI-GISEL-NEXT: v_cndmask_b32_e64 v2, 0, v4, s[0:1]497; VI-GISEL-NEXT: v_sub_f32_e32 v1, v1, v2498; VI-GISEL-NEXT: v_mov_b32_e32 v2, s4499; VI-GISEL-NEXT: v_mov_b32_e32 v3, s5500; VI-GISEL-NEXT: flat_store_dwordx2 v[2:3], v[0:1]501; VI-GISEL-NEXT: s_endpgm502;503; GFX900-SDAG-LABEL: s_log_v2f32:504; GFX900-SDAG: ; %bb.0:505; GFX900-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24506; GFX900-SDAG-NEXT: v_mov_b32_e32 v0, 0x800000507; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b17218508; GFX900-SDAG-NEXT: s_mov_b32 s6, 0x3377d1cf509; GFX900-SDAG-NEXT: s_mov_b32 s7, 0x7f800000510; GFX900-SDAG-NEXT: s_waitcnt lgkmcnt(0)511; GFX900-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s3, v0512; GFX900-SDAG-NEXT: s_and_b64 s[4:5], vcc, exec513; GFX900-SDAG-NEXT: s_cselect_b32 s4, 32, 0514; GFX900-SDAG-NEXT: v_mov_b32_e32 v4, s4515; GFX900-SDAG-NEXT: v_ldexp_f32 v4, s3, v4516; GFX900-SDAG-NEXT: v_log_f32_e32 v4, v4517; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v3, 0, v1, vcc518; GFX900-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s2, v0519; GFX900-SDAG-NEXT: s_and_b64 s[4:5], vcc, exec520; GFX900-SDAG-NEXT: s_mov_b32 s3, 0x3f317217521; GFX900-SDAG-NEXT: v_mul_f32_e32 v5, 0x3f317217, v4522; GFX900-SDAG-NEXT: s_cselect_b32 s4, 32, 0523; GFX900-SDAG-NEXT: v_fma_f32 v6, v4, s3, -v5524; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc525; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, s4526; GFX900-SDAG-NEXT: v_fma_f32 v6, v4, s6, v6527; GFX900-SDAG-NEXT: v_ldexp_f32 v1, s2, v1528; GFX900-SDAG-NEXT: v_add_f32_e32 v5, v5, v6529; GFX900-SDAG-NEXT: v_log_f32_e32 v6, v1530; GFX900-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v4|, s7531; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc532; GFX900-SDAG-NEXT: v_sub_f32_e32 v1, v1, v3533; GFX900-SDAG-NEXT: v_mul_f32_e32 v3, 0x3f317217, v6534; GFX900-SDAG-NEXT: v_fma_f32 v4, v6, s3, -v3535; GFX900-SDAG-NEXT: v_fma_f32 v4, v6, s6, v4536; GFX900-SDAG-NEXT: v_add_f32_e32 v3, v3, v4537; GFX900-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v6|, s7538; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v3, v6, v3, vcc539; GFX900-SDAG-NEXT: v_mov_b32_e32 v2, 0540; GFX900-SDAG-NEXT: v_sub_f32_e32 v0, v3, v0541; GFX900-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]542; GFX900-SDAG-NEXT: s_endpgm543;544; GFX900-GISEL-LABEL: s_log_v2f32:545; GFX900-GISEL: ; %bb.0:546; GFX900-GISEL-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x24547; GFX900-GISEL-NEXT: v_mov_b32_e32 v0, 0x800000548; GFX900-GISEL-NEXT: v_mov_b32_e32 v3, 0x3f317217549; GFX900-GISEL-NEXT: v_mov_b32_e32 v4, 0x3377d1cf550; GFX900-GISEL-NEXT: v_mov_b32_e32 v5, 0x7f800000551; GFX900-GISEL-NEXT: s_waitcnt lgkmcnt(0)552; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s10, v0553; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc554; GFX900-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v1555; GFX900-GISEL-NEXT: v_ldexp_f32 v1, s10, v1556; GFX900-GISEL-NEXT: v_log_f32_e32 v1, v1557; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0558; GFX900-GISEL-NEXT: v_mul_f32_e32 v6, 0x3f317217, v1559; GFX900-GISEL-NEXT: v_fma_f32 v7, v1, v3, -v6560; GFX900-GISEL-NEXT: v_fma_f32 v7, v1, v4, v7561; GFX900-GISEL-NEXT: v_add_f32_e32 v6, v6, v7562; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], |v1|, v5563; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v1, v1, v6, s[0:1]564; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], s11, v0565; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[0:1]566; GFX900-GISEL-NEXT: v_lshlrev_b32_e32 v0, 5, v0567; GFX900-GISEL-NEXT: v_ldexp_f32 v0, s11, v0568; GFX900-GISEL-NEXT: v_log_f32_e32 v6, v0569; GFX900-GISEL-NEXT: v_mov_b32_e32 v7, 0x41b17218570; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v7, vcc571; GFX900-GISEL-NEXT: v_sub_f32_e32 v0, v1, v0572; GFX900-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317217, v6573; GFX900-GISEL-NEXT: v_fma_f32 v3, v6, v3, -v1574; GFX900-GISEL-NEXT: v_fma_f32 v3, v6, v4, v3575; GFX900-GISEL-NEXT: v_add_f32_e32 v1, v1, v3576; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v6|, v5577; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, v6, v1, vcc578; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v3, 0, v7, s[0:1]579; GFX900-GISEL-NEXT: v_sub_f32_e32 v1, v1, v3580; GFX900-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[8:9]581; GFX900-GISEL-NEXT: s_endpgm582;583; GFX1100-SDAG-LABEL: s_log_v2f32:584; GFX1100-SDAG: ; %bb.0:585; GFX1100-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24586; GFX1100-SDAG-NEXT: s_waitcnt lgkmcnt(0)587; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 s4, 0x800000, s3588; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 s5, 0x800000, s2589; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)590; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 0x41b17218, s4591; GFX1100-SDAG-NEXT: s_and_b32 s4, s4, exec_lo592; GFX1100-SDAG-NEXT: s_cselect_b32 s4, 32, 0593; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v2, 0, 0x41b17218, s5594; GFX1100-SDAG-NEXT: v_ldexp_f32 v1, s3, s4595; GFX1100-SDAG-NEXT: s_and_b32 s5, s5, exec_lo596; GFX1100-SDAG-NEXT: s_cselect_b32 s5, 32, 0597; GFX1100-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)598; GFX1100-SDAG-NEXT: v_ldexp_f32 v3, s2, s5599; GFX1100-SDAG-NEXT: v_log_f32_e32 v1, v1600; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)601; GFX1100-SDAG-NEXT: v_log_f32_e32 v3, v3602; GFX1100-SDAG-NEXT: s_waitcnt_depctr depctr_va_vdst(0)603; GFX1100-SDAG-NEXT: v_mul_f32_e32 v4, 0x3f317217, v1604; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v1|605; GFX1100-SDAG-NEXT: v_mul_f32_e32 v5, 0x3f317217, v3606; GFX1100-SDAG-NEXT: v_fma_f32 v6, 0x3f317217, v1, -v4607; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)608; GFX1100-SDAG-NEXT: v_fma_f32 v7, 0x3f317217, v3, -v5609; GFX1100-SDAG-NEXT: v_dual_fmac_f32 v6, 0x3377d1cf, v1 :: v_dual_fmac_f32 v7, 0x3377d1cf, v3610; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)611; GFX1100-SDAG-NEXT: v_dual_add_f32 v4, v4, v6 :: v_dual_add_f32 v5, v5, v7612; GFX1100-SDAG-NEXT: v_dual_cndmask_b32 v1, v1, v4 :: v_dual_mov_b32 v4, 0613; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v3|614; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)615; GFX1100-SDAG-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc_lo616; GFX1100-SDAG-NEXT: v_dual_sub_f32 v1, v1, v0 :: v_dual_sub_f32 v0, v3, v2617; GFX1100-SDAG-NEXT: global_store_b64 v4, v[0:1], s[0:1]618; GFX1100-SDAG-NEXT: s_endpgm619;620; GFX1100-GISEL-LABEL: s_log_v2f32:621; GFX1100-GISEL: ; %bb.0:622; GFX1100-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24623; GFX1100-GISEL-NEXT: s_waitcnt lgkmcnt(0)624; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 s5, 0x800000, s3625; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 s4, 0x800000, s2626; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)627; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, s5628; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, s4629; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)630; GFX1100-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v1631; GFX1100-GISEL-NEXT: v_ldexp_f32 v1, s3, v1632; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)633; GFX1100-GISEL-NEXT: v_log_f32_e32 v1, v1634; GFX1100-GISEL-NEXT: s_waitcnt_depctr depctr_va_vdst(0)635; GFX1100-GISEL-NEXT: v_dual_mul_f32 v3, 0x3f317217, v1 :: v_dual_lshlrev_b32 v0, 5, v0636; GFX1100-GISEL-NEXT: v_ldexp_f32 v0, s2, v0637; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)638; GFX1100-GISEL-NEXT: v_fma_f32 v5, 0x3f317217, v1, -v3639; GFX1100-GISEL-NEXT: v_log_f32_e32 v0, v0640; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)641; GFX1100-GISEL-NEXT: v_fmac_f32_e32 v5, 0x3377d1cf, v1642; GFX1100-GISEL-NEXT: s_waitcnt_depctr depctr_va_vdst(0)643; GFX1100-GISEL-NEXT: v_dual_add_f32 v3, v3, v5 :: v_dual_mul_f32 v2, 0x3f317217, v0644; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|645; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v5, 0, 0x41b17218, s5646; GFX1100-GISEL-NEXT: v_fma_f32 v4, 0x3f317217, v0, -v2647; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)648; GFX1100-GISEL-NEXT: v_fmac_f32_e32 v4, 0x3377d1cf, v0649; GFX1100-GISEL-NEXT: v_add_f32_e32 v2, v2, v4650; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v4, 0, 0x41b17218, s4651; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)652; GFX1100-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo653; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v1|654; GFX1100-GISEL-NEXT: v_dual_cndmask_b32 v1, v1, v3 :: v_dual_mov_b32 v2, 0655; GFX1100-GISEL-NEXT: v_dual_sub_f32 v0, v0, v4 :: v_dual_sub_f32 v1, v1, v5656; GFX1100-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]657; GFX1100-GISEL-NEXT: s_endpgm658;659; R600-LABEL: s_log_v2f32:660; R600: ; %bb.0:661; R600-NEXT: ALU 41, @4, KC0[CB0:0-32], KC1[]662; R600-NEXT: MEM_RAT_CACHELESS STORE_RAW T2.XY, T0.X, 1663; R600-NEXT: CF_END664; R600-NEXT: PAD665; R600-NEXT: ALU clause starting at 4:666; R600-NEXT: SETGT T0.W, literal.x, KC0[3].X,667; R600-NEXT: SETGT * T1.W, literal.x, KC0[2].W,668; R600-NEXT: 8388608(1.175494e-38), 0(0.000000e+00)669; R600-NEXT: CNDE * T2.W, PV.W, 1.0, literal.x,670; R600-NEXT: 1333788672(4.294967e+09), 0(0.000000e+00)671; R600-NEXT: MUL_IEEE T2.W, KC0[3].X, PV.W,672; R600-NEXT: CNDE * T3.W, T1.W, 1.0, literal.x,673; R600-NEXT: 1333788672(4.294967e+09), 0(0.000000e+00)674; R600-NEXT: MUL_IEEE T3.W, KC0[2].W, PS,675; R600-NEXT: LOG_IEEE * T0.X, PV.W,676; R600-NEXT: AND_INT T2.W, PS, literal.x,677; R600-NEXT: LOG_IEEE * T0.Y, PV.W,678; R600-NEXT: -4096(nan), 0(0.000000e+00)679; R600-NEXT: ADD T3.W, T0.X, -PV.W,680; R600-NEXT: AND_INT * T4.W, PS, literal.x,681; R600-NEXT: -4096(nan), 0(0.000000e+00)682; R600-NEXT: ADD T5.W, T0.Y, -PS,683; R600-NEXT: MUL_IEEE * T6.W, PV.W, literal.x,684; R600-NEXT: 939916788(3.194618e-05), 0(0.000000e+00)685; R600-NEXT: MULADD_IEEE T6.W, T2.W, literal.x, PS,686; R600-NEXT: MUL_IEEE * T7.W, PV.W, literal.x,687; R600-NEXT: 939916788(3.194618e-05), 0(0.000000e+00)688; R600-NEXT: MULADD_IEEE T7.W, T4.W, literal.x, PS,689; R600-NEXT: MULADD_IEEE * T3.W, T3.W, literal.y, PV.W, BS:VEC_021/SCL_122690; R600-NEXT: 939916788(3.194618e-05), 1060204544(6.931152e-01)691; R600-NEXT: MULADD_IEEE T0.Z, T2.W, literal.x, PS,692; R600-NEXT: SETGT T2.W, literal.y, |T0.X|,693; R600-NEXT: MULADD_IEEE * T3.W, T5.W, literal.x, PV.W, BS:VEC_021/SCL_122694; R600-NEXT: 1060204544(6.931152e-01), 2139095040(INF)695; R600-NEXT: MULADD_IEEE T1.Y, T4.W, literal.x, PS,696; R600-NEXT: SETGT T1.Z, literal.y, |T0.Y|,697; R600-NEXT: CNDE T2.W, PV.W, T0.X, PV.Z,698; R600-NEXT: CNDE * T0.W, T0.W, 0.0, literal.z,699; R600-NEXT: 1060204544(6.931152e-01), 2139095040(INF)700; R600-NEXT: 1102148120(2.218071e+01), 0(0.000000e+00)701; R600-NEXT: ADD T2.Y, PV.W, -PS,702; R600-NEXT: CNDE T0.W, PV.Z, T0.Y, PV.Y,703; R600-NEXT: CNDE * T1.W, T1.W, 0.0, literal.x,704; R600-NEXT: 1102148120(2.218071e+01), 0(0.000000e+00)705; R600-NEXT: ADD T2.X, PV.W, -PS,706; R600-NEXT: LSHR * T0.X, KC0[2].Y, literal.x,707; R600-NEXT: 2(2.802597e-45), 0(0.000000e+00)708;709; CM-LABEL: s_log_v2f32:710; CM: ; %bb.0:711; CM-NEXT: ALU 47, @4, KC0[CB0:0-32], KC1[]712; CM-NEXT: MEM_RAT_CACHELESS STORE_DWORD T1, T0.X713; CM-NEXT: CF_END714; CM-NEXT: PAD715; CM-NEXT: ALU clause starting at 4:716; CM-NEXT: SETGT * T0.W, literal.x, KC0[3].X,717; CM-NEXT: 8388608(1.175494e-38), 0(0.000000e+00)718; CM-NEXT: CNDE T0.Z, PV.W, 1.0, literal.x,719; CM-NEXT: SETGT * T1.W, literal.y, KC0[2].W,720; CM-NEXT: 1333788672(4.294967e+09), 8388608(1.175494e-38)721; CM-NEXT: CNDE T1.Z, PV.W, 1.0, literal.x,722; CM-NEXT: MUL_IEEE * T2.W, KC0[3].X, PV.Z,723; CM-NEXT: 1333788672(4.294967e+09), 0(0.000000e+00)724; CM-NEXT: LOG_IEEE T0.X, T2.W,725; CM-NEXT: LOG_IEEE T0.Y (MASKED), T2.W,726; CM-NEXT: LOG_IEEE T0.Z (MASKED), T2.W,727; CM-NEXT: LOG_IEEE * T0.W (MASKED), T2.W,728; CM-NEXT: AND_INT T0.Z, PV.X, literal.x,729; CM-NEXT: MUL_IEEE * T2.W, KC0[2].W, T1.Z,730; CM-NEXT: -4096(nan), 0(0.000000e+00)731; CM-NEXT: LOG_IEEE T0.X (MASKED), T2.W,732; CM-NEXT: LOG_IEEE T0.Y, T2.W,733; CM-NEXT: LOG_IEEE T0.Z (MASKED), T2.W,734; CM-NEXT: LOG_IEEE * T0.W (MASKED), T2.W,735; CM-NEXT: ADD T1.Z, T0.X, -T0.Z,736; CM-NEXT: AND_INT * T2.W, PV.Y, literal.x,737; CM-NEXT: -4096(nan), 0(0.000000e+00)738; CM-NEXT: ADD T2.Z, T0.Y, -PV.W,739; CM-NEXT: MUL_IEEE * T3.W, PV.Z, literal.x,740; CM-NEXT: 939916788(3.194618e-05), 0(0.000000e+00)741; CM-NEXT: MULADD_IEEE T3.Z, T0.Z, literal.x, PV.W,742; CM-NEXT: MUL_IEEE * T3.W, PV.Z, literal.x,743; CM-NEXT: 939916788(3.194618e-05), 0(0.000000e+00)744; CM-NEXT: MULADD_IEEE T4.Z, T2.W, literal.x, PV.W,745; CM-NEXT: MULADD_IEEE * T3.W, T1.Z, literal.y, PV.Z,746; CM-NEXT: 939916788(3.194618e-05), 1060204544(6.931152e-01)747; CM-NEXT: MULADD_IEEE T1.Y, T0.Z, literal.x, PV.W,748; CM-NEXT: SETGT T0.Z, literal.y, |T0.X|,749; CM-NEXT: MULADD_IEEE * T3.W, T2.Z, literal.x, PV.Z, BS:VEC_120/SCL_212750; CM-NEXT: 1060204544(6.931152e-01), 2139095040(INF)751; CM-NEXT: MULADD_IEEE T1.X, T2.W, literal.x, PV.W,752; CM-NEXT: SETGT T2.Y, literal.y, |T0.Y|,753; CM-NEXT: CNDE T0.Z, PV.Z, T0.X, PV.Y,754; CM-NEXT: CNDE * T0.W, T0.W, 0.0, literal.z, BS:VEC_120/SCL_212755; CM-NEXT: 1060204544(6.931152e-01), 2139095040(INF)756; CM-NEXT: 1102148120(2.218071e+01), 0(0.000000e+00)757; CM-NEXT: ADD T1.Y, PV.Z, -PV.W,758; CM-NEXT: CNDE T0.Z, PV.Y, T0.Y, PV.X,759; CM-NEXT: CNDE * T0.W, T1.W, 0.0, literal.x,760; CM-NEXT: 1102148120(2.218071e+01), 0(0.000000e+00)761; CM-NEXT: ADD * T1.X, PV.Z, -PV.W,762; CM-NEXT: LSHR * T0.X, KC0[2].Y, literal.x,763; CM-NEXT: 2(2.802597e-45), 0(0.000000e+00)764 %result = call <2 x float> @llvm.log.v2f32(<2 x float> %in)765 store <2 x float> %result, ptr addrspace(1) %out766 ret void767}768 769define amdgpu_kernel void @s_log_v3f32(ptr addrspace(1) %out, <3 x float> %in) {770; SI-SDAG-LABEL: s_log_v3f32:771; SI-SDAG: ; %bb.0:772; SI-SDAG-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0xd773; SI-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9774; SI-SDAG-NEXT: v_mov_b32_e32 v0, 0x800000775; SI-SDAG-NEXT: v_mov_b32_e32 v2, 0x41b17218776; SI-SDAG-NEXT: s_mov_b32 s6, 0x3f317217777; SI-SDAG-NEXT: s_waitcnt lgkmcnt(0)778; SI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s9, v0779; SI-SDAG-NEXT: s_and_b64 s[2:3], vcc, exec780; SI-SDAG-NEXT: s_cselect_b32 s2, 32, 0781; SI-SDAG-NEXT: v_mov_b32_e32 v3, s2782; SI-SDAG-NEXT: v_ldexp_f32_e32 v3, s9, v3783; SI-SDAG-NEXT: v_log_f32_e32 v3, v3784; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc785; SI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s8, v0786; SI-SDAG-NEXT: s_and_b64 s[4:5], vcc, exec787; SI-SDAG-NEXT: s_cselect_b32 s4, 32, 0788; SI-SDAG-NEXT: v_mul_f32_e32 v4, 0x3f317217, v3789; SI-SDAG-NEXT: v_mov_b32_e32 v6, s4790; SI-SDAG-NEXT: v_fma_f32 v5, v3, s6, -v4791; SI-SDAG-NEXT: s_mov_b32 s7, 0x3377d1cf792; SI-SDAG-NEXT: v_ldexp_f32_e32 v6, s8, v6793; SI-SDAG-NEXT: v_fma_f32 v5, v3, s7, v5794; SI-SDAG-NEXT: s_mov_b32 s9, 0x7f800000795; SI-SDAG-NEXT: v_log_f32_e32 v6, v6796; SI-SDAG-NEXT: v_add_f32_e32 v4, v4, v5797; SI-SDAG-NEXT: v_cndmask_b32_e32 v5, 0, v2, vcc798; SI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v3|, s9799; SI-SDAG-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc800; SI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s10, v0801; SI-SDAG-NEXT: s_and_b64 s[4:5], vcc, exec802; SI-SDAG-NEXT: v_sub_f32_e32 v1, v3, v1803; SI-SDAG-NEXT: v_mul_f32_e32 v3, 0x3f317217, v6804; SI-SDAG-NEXT: s_cselect_b32 s4, 32, 0805; SI-SDAG-NEXT: v_fma_f32 v4, v6, s6, -v3806; SI-SDAG-NEXT: v_mov_b32_e32 v0, s4807; SI-SDAG-NEXT: v_fma_f32 v4, v6, s7, v4808; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, s10, v0809; SI-SDAG-NEXT: v_add_f32_e32 v3, v3, v4810; SI-SDAG-NEXT: v_log_f32_e32 v4, v0811; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc812; SI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v6|, s9813; SI-SDAG-NEXT: v_cndmask_b32_e32 v0, v6, v3, vcc814; SI-SDAG-NEXT: v_mul_f32_e32 v3, 0x3f317217, v4815; SI-SDAG-NEXT: v_sub_f32_e32 v0, v0, v5816; SI-SDAG-NEXT: v_fma_f32 v5, v4, s6, -v3817; SI-SDAG-NEXT: v_fma_f32 v5, v4, s7, v5818; SI-SDAG-NEXT: v_add_f32_e32 v3, v3, v5819; SI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v4|, s9820; SI-SDAG-NEXT: v_cndmask_b32_e32 v3, v4, v3, vcc821; SI-SDAG-NEXT: s_mov_b32 s3, 0xf000822; SI-SDAG-NEXT: s_mov_b32 s2, -1823; SI-SDAG-NEXT: v_sub_f32_e32 v2, v3, v2824; SI-SDAG-NEXT: buffer_store_dword v2, off, s[0:3], 0 offset:8825; SI-SDAG-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0826; SI-SDAG-NEXT: s_endpgm827;828; SI-GISEL-LABEL: s_log_v3f32:829; SI-GISEL: ; %bb.0:830; SI-GISEL-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0xd831; SI-GISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x9832; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x800000833; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x3f317217834; SI-GISEL-NEXT: v_mov_b32_e32 v3, 0x3377d1cf835; SI-GISEL-NEXT: s_waitcnt lgkmcnt(0)836; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s8, v1837; SI-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc838; SI-GISEL-NEXT: v_lshlrev_b32_e32 v0, 5, v0839; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, s8, v0840; SI-GISEL-NEXT: v_log_f32_e32 v0, v0841; SI-GISEL-NEXT: v_mov_b32_e32 v4, 0x7f800000842; SI-GISEL-NEXT: s_mov_b32 s6, -1843; SI-GISEL-NEXT: s_mov_b32 s7, 0xf000844; SI-GISEL-NEXT: v_mul_f32_e32 v5, 0x3f317217, v0845; SI-GISEL-NEXT: v_fma_f32 v6, v0, v2, -v5846; SI-GISEL-NEXT: v_fma_f32 v6, v0, v3, v6847; SI-GISEL-NEXT: v_add_f32_e32 v5, v5, v6848; SI-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], |v0|, v4849; SI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v5, s[0:1]850; SI-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], s9, v1851; SI-GISEL-NEXT: v_cndmask_b32_e64 v5, 0, 1, s[0:1]852; SI-GISEL-NEXT: v_lshlrev_b32_e32 v5, 5, v5853; SI-GISEL-NEXT: v_ldexp_f32_e32 v5, s9, v5854; SI-GISEL-NEXT: v_log_f32_e32 v5, v5855; SI-GISEL-NEXT: v_mov_b32_e32 v6, 0x41b17218856; SI-GISEL-NEXT: v_cndmask_b32_e32 v7, 0, v6, vcc857; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s10, v1858; SI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v7859; SI-GISEL-NEXT: v_mul_f32_e32 v7, 0x3f317217, v5860; SI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc861; SI-GISEL-NEXT: v_fma_f32 v8, v5, v2, -v7862; SI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v1863; SI-GISEL-NEXT: v_fma_f32 v8, v5, v3, v8864; SI-GISEL-NEXT: v_ldexp_f32_e32 v1, s10, v1865; SI-GISEL-NEXT: v_add_f32_e32 v7, v7, v8866; SI-GISEL-NEXT: v_log_f32_e32 v8, v1867; SI-GISEL-NEXT: v_cmp_lt_f32_e64 s[2:3], |v5|, v4868; SI-GISEL-NEXT: v_cndmask_b32_e64 v1, v5, v7, s[2:3]869; SI-GISEL-NEXT: v_cndmask_b32_e64 v5, 0, v6, s[0:1]870; SI-GISEL-NEXT: v_sub_f32_e32 v1, v1, v5871; SI-GISEL-NEXT: v_mul_f32_e32 v5, 0x3f317217, v8872; SI-GISEL-NEXT: v_fma_f32 v2, v8, v2, -v5873; SI-GISEL-NEXT: v_fma_f32 v2, v8, v3, v2874; SI-GISEL-NEXT: v_add_f32_e32 v2, v5, v2875; SI-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], |v8|, v4876; SI-GISEL-NEXT: v_cndmask_b32_e64 v2, v8, v2, s[0:1]877; SI-GISEL-NEXT: v_cndmask_b32_e32 v3, 0, v6, vcc878; SI-GISEL-NEXT: v_sub_f32_e32 v2, v2, v3879; SI-GISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0880; SI-GISEL-NEXT: buffer_store_dword v2, off, s[4:7], 0 offset:8881; SI-GISEL-NEXT: s_endpgm882;883; VI-SDAG-LABEL: s_log_v3f32:884; VI-SDAG: ; %bb.0:885; VI-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34886; VI-SDAG-NEXT: v_mov_b32_e32 v0, 0x800000887; VI-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b17218888; VI-SDAG-NEXT: s_waitcnt lgkmcnt(0)889; VI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s2, v0890; VI-SDAG-NEXT: s_and_b64 s[6:7], vcc, exec891; VI-SDAG-NEXT: s_cselect_b32 s3, 32, 0892; VI-SDAG-NEXT: v_mov_b32_e32 v3, s3893; VI-SDAG-NEXT: v_ldexp_f32 v3, s2, v3894; VI-SDAG-NEXT: v_log_f32_e32 v3, v3895; VI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v1, vcc896; VI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s1, v0897; VI-SDAG-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24898; VI-SDAG-NEXT: v_and_b32_e32 v4, 0xfffff000, v3899; VI-SDAG-NEXT: v_sub_f32_e32 v5, v3, v4900; VI-SDAG-NEXT: s_and_b64 s[4:5], vcc, exec901; VI-SDAG-NEXT: v_mul_f32_e32 v6, 0x3805fdf4, v4902; VI-SDAG-NEXT: v_mul_f32_e32 v7, 0x3f317000, v5903; VI-SDAG-NEXT: v_mul_f32_e32 v5, 0x3805fdf4, v5904; VI-SDAG-NEXT: s_cselect_b32 s4, 32, 0905; VI-SDAG-NEXT: v_add_f32_e32 v5, v6, v5906; VI-SDAG-NEXT: v_mov_b32_e32 v6, s4907; VI-SDAG-NEXT: v_ldexp_f32 v6, s1, v6908; VI-SDAG-NEXT: v_log_f32_e32 v6, v6909; VI-SDAG-NEXT: v_mul_f32_e32 v4, 0x3f317000, v4910; VI-SDAG-NEXT: v_add_f32_e32 v5, v7, v5911; VI-SDAG-NEXT: s_mov_b32 s6, 0x7f800000912; VI-SDAG-NEXT: v_add_f32_e32 v4, v4, v5913; VI-SDAG-NEXT: v_cndmask_b32_e32 v5, 0, v1, vcc914; VI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v3|, s6915; VI-SDAG-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc916; VI-SDAG-NEXT: v_sub_f32_e32 v2, v3, v2917; VI-SDAG-NEXT: v_and_b32_e32 v3, 0xfffff000, v6918; VI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s0, v0919; VI-SDAG-NEXT: v_sub_f32_e32 v4, v6, v3920; VI-SDAG-NEXT: s_and_b64 s[4:5], vcc, exec921; VI-SDAG-NEXT: v_mul_f32_e32 v7, 0x3f317000, v4922; VI-SDAG-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v4923; VI-SDAG-NEXT: v_mul_f32_e32 v8, 0x3805fdf4, v3924; VI-SDAG-NEXT: s_cselect_b32 s1, 32, 0925; VI-SDAG-NEXT: v_add_f32_e32 v4, v8, v4926; VI-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc927; VI-SDAG-NEXT: v_mov_b32_e32 v1, s1928; VI-SDAG-NEXT: v_add_f32_e32 v4, v7, v4929; VI-SDAG-NEXT: v_mul_f32_e32 v3, 0x3f317000, v3930; VI-SDAG-NEXT: v_ldexp_f32 v1, s0, v1931; VI-SDAG-NEXT: v_add_f32_e32 v3, v3, v4932; VI-SDAG-NEXT: v_log_f32_e32 v4, v1933; VI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v6|, s6934; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, v6, v3, vcc935; VI-SDAG-NEXT: v_sub_f32_e32 v1, v1, v5936; VI-SDAG-NEXT: v_and_b32_e32 v3, 0xfffff000, v4937; VI-SDAG-NEXT: v_sub_f32_e32 v5, v4, v3938; VI-SDAG-NEXT: v_mul_f32_e32 v6, 0x3f317000, v5939; VI-SDAG-NEXT: v_mul_f32_e32 v5, 0x3805fdf4, v5940; VI-SDAG-NEXT: v_mul_f32_e32 v7, 0x3805fdf4, v3941; VI-SDAG-NEXT: v_add_f32_e32 v5, v7, v5942; VI-SDAG-NEXT: v_add_f32_e32 v5, v6, v5943; VI-SDAG-NEXT: v_mul_f32_e32 v3, 0x3f317000, v3944; VI-SDAG-NEXT: v_add_f32_e32 v3, v3, v5945; VI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v4|, s6946; VI-SDAG-NEXT: v_cndmask_b32_e32 v3, v4, v3, vcc947; VI-SDAG-NEXT: v_sub_f32_e32 v0, v3, v0948; VI-SDAG-NEXT: s_waitcnt lgkmcnt(0)949; VI-SDAG-NEXT: v_mov_b32_e32 v4, s3950; VI-SDAG-NEXT: v_mov_b32_e32 v3, s2951; VI-SDAG-NEXT: flat_store_dwordx3 v[3:4], v[0:2]952; VI-SDAG-NEXT: s_endpgm953;954; VI-GISEL-LABEL: s_log_v3f32:955; VI-GISEL: ; %bb.0:956; VI-GISEL-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x34957; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x800000958; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f800000959; VI-GISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x24960; VI-GISEL-NEXT: s_waitcnt lgkmcnt(0)961; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s8, v1962; VI-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc963; VI-GISEL-NEXT: v_lshlrev_b32_e32 v0, 5, v0964; VI-GISEL-NEXT: v_ldexp_f32 v0, s8, v0965; VI-GISEL-NEXT: v_log_f32_e32 v0, v0966; VI-GISEL-NEXT: v_and_b32_e32 v3, 0xfffff000, v0967; VI-GISEL-NEXT: v_sub_f32_e32 v4, v0, v3968; VI-GISEL-NEXT: v_mul_f32_e32 v5, 0x3805fdf4, v3969; VI-GISEL-NEXT: v_mul_f32_e32 v6, 0x3805fdf4, v4970; VI-GISEL-NEXT: v_mul_f32_e32 v4, 0x3f317000, v4971; VI-GISEL-NEXT: v_add_f32_e32 v5, v5, v6972; VI-GISEL-NEXT: v_mul_f32_e32 v3, 0x3f317000, v3973; VI-GISEL-NEXT: v_add_f32_e32 v4, v4, v5974; VI-GISEL-NEXT: v_add_f32_e32 v3, v3, v4975; VI-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], |v0|, v2976; VI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v3, s[0:1]977; VI-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], s9, v1978; VI-GISEL-NEXT: v_cndmask_b32_e64 v3, 0, 1, s[0:1]979; VI-GISEL-NEXT: v_lshlrev_b32_e32 v3, 5, v3980; VI-GISEL-NEXT: v_ldexp_f32 v3, s9, v3981; VI-GISEL-NEXT: v_log_f32_e32 v3, v3982; VI-GISEL-NEXT: v_mov_b32_e32 v4, 0x41b17218983; VI-GISEL-NEXT: v_cndmask_b32_e32 v5, 0, v4, vcc984; VI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v5985; VI-GISEL-NEXT: v_and_b32_e32 v5, 0xfffff000, v3986; VI-GISEL-NEXT: v_sub_f32_e32 v6, v3, v5987; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s10, v1988; VI-GISEL-NEXT: v_mul_f32_e32 v7, 0x3805fdf4, v6989; VI-GISEL-NEXT: v_mul_f32_e32 v8, 0x3805fdf4, v5990; VI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc991; VI-GISEL-NEXT: v_add_f32_e32 v7, v8, v7992; VI-GISEL-NEXT: v_mul_f32_e32 v6, 0x3f317000, v6993; VI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v1994; VI-GISEL-NEXT: v_add_f32_e32 v6, v6, v7995; VI-GISEL-NEXT: v_mul_f32_e32 v5, 0x3f317000, v5996; VI-GISEL-NEXT: v_ldexp_f32 v1, s10, v1997; VI-GISEL-NEXT: v_add_f32_e32 v5, v5, v6998; VI-GISEL-NEXT: v_log_f32_e32 v6, v1999; VI-GISEL-NEXT: v_cmp_lt_f32_e64 s[2:3], |v3|, v21000; VI-GISEL-NEXT: v_cndmask_b32_e64 v1, v3, v5, s[2:3]1001; VI-GISEL-NEXT: v_cndmask_b32_e64 v3, 0, v4, s[0:1]1002; VI-GISEL-NEXT: v_sub_f32_e32 v1, v1, v31003; VI-GISEL-NEXT: v_and_b32_e32 v3, 0xfffff000, v61004; VI-GISEL-NEXT: v_sub_f32_e32 v5, v6, v31005; VI-GISEL-NEXT: v_mul_f32_e32 v7, 0x3805fdf4, v51006; VI-GISEL-NEXT: v_mul_f32_e32 v8, 0x3805fdf4, v31007; VI-GISEL-NEXT: v_add_f32_e32 v7, v8, v71008; VI-GISEL-NEXT: v_mul_f32_e32 v5, 0x3f317000, v51009; VI-GISEL-NEXT: v_add_f32_e32 v5, v5, v71010; VI-GISEL-NEXT: v_mul_f32_e32 v3, 0x3f317000, v31011; VI-GISEL-NEXT: v_add_f32_e32 v3, v3, v51012; VI-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], |v6|, v21013; VI-GISEL-NEXT: v_cndmask_b32_e64 v2, v6, v3, s[0:1]1014; VI-GISEL-NEXT: v_cndmask_b32_e32 v3, 0, v4, vcc1015; VI-GISEL-NEXT: v_sub_f32_e32 v2, v2, v31016; VI-GISEL-NEXT: v_mov_b32_e32 v3, s41017; VI-GISEL-NEXT: v_mov_b32_e32 v4, s51018; VI-GISEL-NEXT: flat_store_dwordx3 v[3:4], v[0:2]1019; VI-GISEL-NEXT: s_endpgm1020;1021; GFX900-SDAG-LABEL: s_log_v3f32:1022; GFX900-SDAG: ; %bb.0:1023; GFX900-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x341024; GFX900-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x241025; GFX900-SDAG-NEXT: v_mov_b32_e32 v0, 0x8000001026; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172181027; GFX900-SDAG-NEXT: s_mov_b32 s8, 0x7f8000001028; GFX900-SDAG-NEXT: s_waitcnt lgkmcnt(0)1029; GFX900-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s2, v01030; GFX900-SDAG-NEXT: s_and_b64 s[4:5], vcc, exec1031; GFX900-SDAG-NEXT: s_cselect_b32 s3, 32, 01032; GFX900-SDAG-NEXT: v_mov_b32_e32 v3, s31033; GFX900-SDAG-NEXT: v_ldexp_f32 v3, s2, v31034; GFX900-SDAG-NEXT: v_log_f32_e32 v3, v31035; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v1, vcc1036; GFX900-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s1, v01037; GFX900-SDAG-NEXT: s_and_b64 s[2:3], vcc, exec1038; GFX900-SDAG-NEXT: s_cselect_b32 s2, 32, 01039; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3f3172171040; GFX900-SDAG-NEXT: v_mul_f32_e32 v5, 0x3f317217, v31041; GFX900-SDAG-NEXT: v_mov_b32_e32 v7, s21042; GFX900-SDAG-NEXT: s_mov_b32 s5, 0x3377d1cf1043; GFX900-SDAG-NEXT: v_fma_f32 v6, v3, s4, -v51044; GFX900-SDAG-NEXT: v_ldexp_f32 v7, s1, v71045; GFX900-SDAG-NEXT: v_fma_f32 v6, v3, s5, v61046; GFX900-SDAG-NEXT: v_log_f32_e32 v7, v71047; GFX900-SDAG-NEXT: v_add_f32_e32 v5, v5, v61048; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v6, 0, v1, vcc1049; GFX900-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v3|, s81050; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc1051; GFX900-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s0, v01052; GFX900-SDAG-NEXT: s_and_b64 s[2:3], vcc, exec1053; GFX900-SDAG-NEXT: v_sub_f32_e32 v2, v3, v21054; GFX900-SDAG-NEXT: v_mul_f32_e32 v3, 0x3f317217, v71055; GFX900-SDAG-NEXT: s_cselect_b32 s1, 32, 01056; GFX900-SDAG-NEXT: v_fma_f32 v5, v7, s4, -v31057; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc1058; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, s11059; GFX900-SDAG-NEXT: v_fma_f32 v5, v7, s5, v51060; GFX900-SDAG-NEXT: v_ldexp_f32 v1, s0, v11061; GFX900-SDAG-NEXT: v_add_f32_e32 v3, v3, v51062; GFX900-SDAG-NEXT: v_log_f32_e32 v5, v11063; GFX900-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v7|, s81064; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, v7, v3, vcc1065; GFX900-SDAG-NEXT: v_sub_f32_e32 v1, v1, v61066; GFX900-SDAG-NEXT: v_mul_f32_e32 v3, 0x3f317217, v51067; GFX900-SDAG-NEXT: v_fma_f32 v6, v5, s4, -v31068; GFX900-SDAG-NEXT: v_fma_f32 v6, v5, s5, v61069; GFX900-SDAG-NEXT: v_add_f32_e32 v3, v3, v61070; GFX900-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v5|, s81071; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc1072; GFX900-SDAG-NEXT: v_mov_b32_e32 v4, 01073; GFX900-SDAG-NEXT: v_sub_f32_e32 v0, v3, v01074; GFX900-SDAG-NEXT: global_store_dwordx3 v4, v[0:2], s[6:7]1075; GFX900-SDAG-NEXT: s_endpgm1076;1077; GFX900-GISEL-LABEL: s_log_v3f32:1078; GFX900-GISEL: ; %bb.0:1079; GFX900-GISEL-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x341080; GFX900-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x241081; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000001082; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x3f3172171083; GFX900-GISEL-NEXT: v_mov_b32_e32 v4, 0x3377d1cf1084; GFX900-GISEL-NEXT: s_waitcnt lgkmcnt(0)1085; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s8, v11086; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc1087; GFX900-GISEL-NEXT: v_lshlrev_b32_e32 v0, 5, v01088; GFX900-GISEL-NEXT: v_ldexp_f32 v0, s8, v01089; GFX900-GISEL-NEXT: v_log_f32_e32 v0, v01090; GFX900-GISEL-NEXT: v_mov_b32_e32 v5, 0x7f8000001091; GFX900-GISEL-NEXT: v_mov_b32_e32 v3, 01092; GFX900-GISEL-NEXT: v_mul_f32_e32 v6, 0x3f317217, v01093; GFX900-GISEL-NEXT: v_fma_f32 v7, v0, v2, -v61094; GFX900-GISEL-NEXT: v_fma_f32 v7, v0, v4, v71095; GFX900-GISEL-NEXT: v_add_f32_e32 v6, v6, v71096; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], |v0|, v51097; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v6, s[0:1]1098; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], s9, v11099; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v6, 0, 1, s[0:1]1100; GFX900-GISEL-NEXT: v_lshlrev_b32_e32 v6, 5, v61101; GFX900-GISEL-NEXT: v_ldexp_f32 v6, s9, v61102; GFX900-GISEL-NEXT: v_log_f32_e32 v6, v61103; GFX900-GISEL-NEXT: v_mov_b32_e32 v7, 0x41b172181104; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v8, 0, v7, vcc1105; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s10, v11106; GFX900-GISEL-NEXT: v_sub_f32_e32 v0, v0, v81107; GFX900-GISEL-NEXT: v_mul_f32_e32 v8, 0x3f317217, v61108; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc1109; GFX900-GISEL-NEXT: v_fma_f32 v9, v6, v2, -v81110; GFX900-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v11111; GFX900-GISEL-NEXT: v_fma_f32 v9, v6, v4, v91112; GFX900-GISEL-NEXT: v_ldexp_f32 v1, s10, v11113; GFX900-GISEL-NEXT: v_add_f32_e32 v8, v8, v91114; GFX900-GISEL-NEXT: v_log_f32_e32 v9, v11115; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 s[2:3], |v6|, v51116; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v1, v6, v8, s[2:3]1117; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v6, 0, v7, s[0:1]1118; GFX900-GISEL-NEXT: v_sub_f32_e32 v1, v1, v61119; GFX900-GISEL-NEXT: v_mul_f32_e32 v6, 0x3f317217, v91120; GFX900-GISEL-NEXT: v_fma_f32 v2, v9, v2, -v61121; GFX900-GISEL-NEXT: v_fma_f32 v2, v9, v4, v21122; GFX900-GISEL-NEXT: v_add_f32_e32 v2, v6, v21123; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], |v9|, v51124; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v2, v9, v2, s[0:1]1125; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v4, 0, v7, vcc1126; GFX900-GISEL-NEXT: v_sub_f32_e32 v2, v2, v41127; GFX900-GISEL-NEXT: global_store_dwordx3 v3, v[0:2], s[6:7]1128; GFX900-GISEL-NEXT: s_endpgm1129;1130; GFX1100-SDAG-LABEL: s_log_v3f32:1131; GFX1100-SDAG: ; %bb.0:1132; GFX1100-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x341133; GFX1100-SDAG-NEXT: s_waitcnt lgkmcnt(0)1134; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 s3, 0x800000, s21135; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 s6, 0x800000, s11136; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 s7, 0x800000, s01137; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3)1138; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 0x41b17218, s31139; GFX1100-SDAG-NEXT: s_and_b32 s3, s3, exec_lo1140; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 0x41b17218, s61141; GFX1100-SDAG-NEXT: s_cselect_b32 s3, 32, 01142; GFX1100-SDAG-NEXT: s_and_b32 s6, s6, exec_lo1143; GFX1100-SDAG-NEXT: s_cselect_b32 s6, 32, 01144; GFX1100-SDAG-NEXT: v_ldexp_f32 v2, s2, s31145; GFX1100-SDAG-NEXT: v_ldexp_f32 v4, s1, s61146; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v3, 0, 0x41b17218, s71147; GFX1100-SDAG-NEXT: s_and_b32 s7, s7, exec_lo1148; GFX1100-SDAG-NEXT: s_cselect_b32 s2, 32, 01149; GFX1100-SDAG-NEXT: v_log_f32_e32 v2, v21150; GFX1100-SDAG-NEXT: v_log_f32_e32 v4, v41151; GFX1100-SDAG-NEXT: v_ldexp_f32 v5, s0, s21152; GFX1100-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x241153; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)1154; GFX1100-SDAG-NEXT: v_log_f32_e32 v5, v51155; GFX1100-SDAG-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1156; GFX1100-SDAG-NEXT: v_dual_mul_f32 v6, 0x3f317217, v2 :: v_dual_mul_f32 v7, 0x3f317217, v41157; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v2|1158; GFX1100-SDAG-NEXT: v_fma_f32 v9, 0x3f317217, v2, -v61159; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)1160; GFX1100-SDAG-NEXT: v_fma_f32 v10, 0x3f317217, v4, -v71161; GFX1100-SDAG-NEXT: v_dual_fmac_f32 v9, 0x3377d1cf, v2 :: v_dual_fmac_f32 v10, 0x3377d1cf, v41162; GFX1100-SDAG-NEXT: v_mul_f32_e32 v8, 0x3f317217, v51163; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1164; GFX1100-SDAG-NEXT: v_dual_add_f32 v6, v6, v9 :: v_dual_add_f32 v7, v7, v101165; GFX1100-SDAG-NEXT: v_fma_f32 v11, 0x3f317217, v5, -v81166; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)1167; GFX1100-SDAG-NEXT: v_cndmask_b32_e32 v2, v2, v6, vcc_lo1168; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v4|1169; GFX1100-SDAG-NEXT: v_dual_fmac_f32 v11, 0x3377d1cf, v5 :: v_dual_sub_f32 v2, v2, v01170; GFX1100-SDAG-NEXT: v_cndmask_b32_e32 v4, v4, v7, vcc_lo1171; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)1172; GFX1100-SDAG-NEXT: v_add_f32_e32 v8, v8, v111173; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v5|1174; GFX1100-SDAG-NEXT: v_dual_mov_b32 v6, 0 :: v_dual_sub_f32 v1, v4, v11175; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)1176; GFX1100-SDAG-NEXT: v_cndmask_b32_e32 v5, v5, v8, vcc_lo1177; GFX1100-SDAG-NEXT: v_sub_f32_e32 v0, v5, v31178; GFX1100-SDAG-NEXT: s_waitcnt lgkmcnt(0)1179; GFX1100-SDAG-NEXT: global_store_b96 v6, v[0:2], s[0:1]1180; GFX1100-SDAG-NEXT: s_endpgm1181;1182; GFX1100-GISEL-LABEL: s_log_v3f32:1183; GFX1100-GISEL: ; %bb.0:1184; GFX1100-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x341185; GFX1100-GISEL-NEXT: s_waitcnt lgkmcnt(0)1186; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 s7, 0x800000, s21187; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 s3, 0x800000, s01188; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 s6, 0x800000, s11189; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)1190; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v2, 0, 1, s71191; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, s31192; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)1193; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, s61194; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 0x41b17218, s31195; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 0x41b17218, s61196; GFX1100-GISEL-NEXT: v_lshlrev_b32_e32 v2, 5, v21197; GFX1100-GISEL-NEXT: v_ldexp_f32 v2, s2, v21198; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)1199; GFX1100-GISEL-NEXT: v_log_f32_e32 v2, v21200; GFX1100-GISEL-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1201; GFX1100-GISEL-NEXT: v_dual_mul_f32 v5, 0x3f317217, v2 :: v_dual_lshlrev_b32 v0, 5, v01202; GFX1100-GISEL-NEXT: v_ldexp_f32 v0, s0, v01203; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1204; GFX1100-GISEL-NEXT: v_fma_f32 v8, 0x3f317217, v2, -v51205; GFX1100-GISEL-NEXT: v_log_f32_e32 v0, v01206; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1207; GFX1100-GISEL-NEXT: v_fmac_f32_e32 v8, 0x3377d1cf, v21208; GFX1100-GISEL-NEXT: v_add_f32_e32 v5, v5, v81209; GFX1100-GISEL-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1210; GFX1100-GISEL-NEXT: v_mul_f32_e32 v3, 0x3f317217, v01211; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|1212; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1213; GFX1100-GISEL-NEXT: v_fma_f32 v6, 0x3f317217, v0, -v31214; GFX1100-GISEL-NEXT: v_dual_fmac_f32 v6, 0x3377d1cf, v0 :: v_dual_lshlrev_b32 v1, 5, v11215; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1216; GFX1100-GISEL-NEXT: v_ldexp_f32 v1, s1, v11217; GFX1100-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x241218; GFX1100-GISEL-NEXT: v_add_f32_e32 v3, v3, v61219; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)1220; GFX1100-GISEL-NEXT: v_log_f32_e32 v1, v11221; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v6, 0, 0x41b17218, s71222; GFX1100-GISEL-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1223; GFX1100-GISEL-NEXT: v_mul_f32_e32 v4, 0x3f317217, v11224; GFX1100-GISEL-NEXT: v_fma_f32 v7, 0x3f317217, v1, -v41225; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1226; GFX1100-GISEL-NEXT: v_fmac_f32_e32 v7, 0x3377d1cf, v11227; GFX1100-GISEL-NEXT: v_add_f32_e32 v4, v4, v71228; GFX1100-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc_lo1229; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v1|1230; GFX1100-GISEL-NEXT: v_mov_b32_e32 v3, 01231; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)1232; GFX1100-GISEL-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc_lo1233; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v2|1234; GFX1100-GISEL-NEXT: v_dual_sub_f32 v0, v0, v9 :: v_dual_sub_f32 v1, v1, v101235; GFX1100-GISEL-NEXT: v_cndmask_b32_e32 v2, v2, v5, vcc_lo1236; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)1237; GFX1100-GISEL-NEXT: v_sub_f32_e32 v2, v2, v61238; GFX1100-GISEL-NEXT: s_waitcnt lgkmcnt(0)1239; GFX1100-GISEL-NEXT: global_store_b96 v3, v[0:2], s[0:1]1240; GFX1100-GISEL-NEXT: s_endpgm1241;1242; R600-LABEL: s_log_v3f32:1243; R600: ; %bb.0:1244; R600-NEXT: ALU 62, @4, KC0[CB0:0-32], KC1[]1245; R600-NEXT: MEM_RAT_CACHELESS STORE_RAW T2.X, T3.X, 01246; R600-NEXT: MEM_RAT_CACHELESS STORE_RAW T1.XY, T0.X, 11247; R600-NEXT: CF_END1248; R600-NEXT: ALU clause starting at 4:1249; R600-NEXT: SETGT T0.W, literal.x, KC0[3].Z,1250; R600-NEXT: SETGT * T1.W, literal.x, KC0[3].Y,1251; R600-NEXT: 8388608(1.175494e-38), 0(0.000000e+00)1252; R600-NEXT: CNDE * T2.W, PV.W, 1.0, literal.x,1253; R600-NEXT: 1333788672(4.294967e+09), 0(0.000000e+00)1254; R600-NEXT: MUL_IEEE T2.W, KC0[3].Z, PV.W,1255; R600-NEXT: CNDE * T3.W, T1.W, 1.0, literal.x,1256; R600-NEXT: 1333788672(4.294967e+09), 0(0.000000e+00)1257; R600-NEXT: MUL_IEEE T0.Z, KC0[3].Y, PS,1258; R600-NEXT: SETGT T3.W, literal.x, KC0[3].W,1259; R600-NEXT: LOG_IEEE * T0.X, PV.W,1260; R600-NEXT: 8388608(1.175494e-38), 0(0.000000e+00)1261; R600-NEXT: AND_INT T1.Z, PS, literal.x,1262; R600-NEXT: CNDE T2.W, PV.W, 1.0, literal.y,1263; R600-NEXT: LOG_IEEE * T0.Y, PV.Z,1264; R600-NEXT: -4096(nan), 1333788672(4.294967e+09)1265; R600-NEXT: MUL_IEEE T0.Z, KC0[3].W, PV.W,1266; R600-NEXT: ADD T2.W, T0.X, -PV.Z,1267; R600-NEXT: AND_INT * T4.W, PS, literal.x,1268; R600-NEXT: -4096(nan), 0(0.000000e+00)1269; R600-NEXT: ADD T2.Z, T0.Y, -PS,1270; R600-NEXT: MUL_IEEE T5.W, PV.W, literal.x,1271; R600-NEXT: LOG_IEEE * T0.Z, PV.Z,1272; R600-NEXT: 939916788(3.194618e-05), 0(0.000000e+00)1273; R600-NEXT: MULADD_IEEE T3.Z, T1.Z, literal.x, PV.W,1274; R600-NEXT: AND_INT T5.W, PS, literal.y,1275; R600-NEXT: MUL_IEEE * T6.W, PV.Z, literal.x,1276; R600-NEXT: 939916788(3.194618e-05), -4096(nan)1277; R600-NEXT: MULADD_IEEE T4.Z, T4.W, literal.x, PS,1278; R600-NEXT: ADD T6.W, T0.Z, -PV.W,1279; R600-NEXT: MULADD_IEEE * T2.W, T2.W, literal.y, PV.Z, BS:VEC_021/SCL_1221280; R600-NEXT: 939916788(3.194618e-05), 1060204544(6.931152e-01)1281; R600-NEXT: MULADD_IEEE T1.Y, T1.Z, literal.x, PS,1282; R600-NEXT: SETGT T1.Z, literal.y, |T0.X|,1283; R600-NEXT: MUL_IEEE T2.W, PV.W, literal.z,1284; R600-NEXT: MULADD_IEEE * T7.W, T2.Z, literal.x, PV.Z, BS:VEC_021/SCL_1221285; R600-NEXT: 1060204544(6.931152e-01), 2139095040(INF)1286; R600-NEXT: 939916788(3.194618e-05), 0(0.000000e+00)1287; R600-NEXT: MULADD_IEEE T1.X, T4.W, literal.x, PS,1288; R600-NEXT: SETGT T2.Y, literal.y, |T0.Y|,1289; R600-NEXT: MULADD_IEEE T2.Z, T5.W, literal.z, PV.W, BS:VEC_120/SCL_2121290; R600-NEXT: CNDE T2.W, PV.Z, T0.X, PV.Y,1291; R600-NEXT: CNDE * T0.W, T0.W, 0.0, literal.w,1292; R600-NEXT: 1060204544(6.931152e-01), 2139095040(INF)1293; R600-NEXT: 939916788(3.194618e-05), 1102148120(2.218071e+01)1294; R600-NEXT: ADD T1.Y, PV.W, -PS,1295; R600-NEXT: MULADD_IEEE T1.Z, T6.W, literal.x, PV.Z,1296; R600-NEXT: CNDE T0.W, PV.Y, T0.Y, PV.X,1297; R600-NEXT: CNDE * T1.W, T1.W, 0.0, literal.y,1298; R600-NEXT: 1060204544(6.931152e-01), 1102148120(2.218071e+01)1299; R600-NEXT: ADD T1.X, PV.W, -PS,1300; R600-NEXT: MULADD_IEEE T0.W, T5.W, literal.x, PV.Z,1301; R600-NEXT: SETGT * T1.W, literal.y, |T0.Z|,1302; R600-NEXT: 1060204544(6.931152e-01), 2139095040(INF)1303; R600-NEXT: LSHR T0.X, KC0[2].Y, literal.x,1304; R600-NEXT: CNDE T0.W, PS, T0.Z, PV.W,1305; R600-NEXT: CNDE * T1.W, T3.W, 0.0, literal.y,1306; R600-NEXT: 2(2.802597e-45), 1102148120(2.218071e+01)1307; R600-NEXT: ADD T2.X, PV.W, -PS,1308; R600-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.x,1309; R600-NEXT: 8(1.121039e-44), 0(0.000000e+00)1310; R600-NEXT: LSHR * T3.X, PV.W, literal.x,1311; R600-NEXT: 2(2.802597e-45), 0(0.000000e+00)1312;1313; CM-LABEL: s_log_v3f32:1314; CM: ; %bb.0:1315; CM-NEXT: ALU 68, @4, KC0[CB0:0-32], KC1[]1316; CM-NEXT: MEM_RAT_CACHELESS STORE_DWORD T0, T2.X1317; CM-NEXT: MEM_RAT_CACHELESS STORE_DWORD T4.X, T1.X1318; CM-NEXT: CF_END1319; CM-NEXT: ALU clause starting at 4:1320; CM-NEXT: SETGT * T0.W, literal.x, KC0[3].Y,1321; CM-NEXT: 8388608(1.175494e-38), 0(0.000000e+00)1322; CM-NEXT: CNDE T0.Z, PV.W, 1.0, literal.x,1323; CM-NEXT: SETGT * T1.W, literal.y, KC0[3].W,1324; CM-NEXT: 1333788672(4.294967e+09), 8388608(1.175494e-38)1325; CM-NEXT: CNDE T0.Y, PV.W, 1.0, literal.x,1326; CM-NEXT: SETGT T1.Z, literal.y, KC0[3].Z,1327; CM-NEXT: MUL_IEEE * T2.W, KC0[3].Y, PV.Z,1328; CM-NEXT: 1333788672(4.294967e+09), 8388608(1.175494e-38)1329; CM-NEXT: LOG_IEEE T0.X, T2.W,1330; CM-NEXT: LOG_IEEE T0.Y (MASKED), T2.W,1331; CM-NEXT: LOG_IEEE T0.Z (MASKED), T2.W,1332; CM-NEXT: LOG_IEEE * T0.W (MASKED), T2.W,1333; CM-NEXT: CNDE T1.Y, T1.Z, 1.0, literal.x,1334; CM-NEXT: AND_INT T0.Z, PV.X, literal.y,1335; CM-NEXT: MUL_IEEE * T2.W, KC0[3].W, T0.Y,1336; CM-NEXT: 1333788672(4.294967e+09), -4096(nan)1337; CM-NEXT: LOG_IEEE T0.X (MASKED), T2.W,1338; CM-NEXT: LOG_IEEE T0.Y, T2.W,1339; CM-NEXT: LOG_IEEE T0.Z (MASKED), T2.W,1340; CM-NEXT: LOG_IEEE * T0.W (MASKED), T2.W,1341; CM-NEXT: ADD T2.Y, T0.X, -T0.Z,1342; CM-NEXT: AND_INT T2.Z, PV.Y, literal.x,1343; CM-NEXT: MUL_IEEE * T2.W, KC0[3].Z, T1.Y,1344; CM-NEXT: -4096(nan), 0(0.000000e+00)1345; CM-NEXT: LOG_IEEE T1.X, T2.W,1346; CM-NEXT: LOG_IEEE T1.Y (MASKED), T2.W,1347; CM-NEXT: LOG_IEEE T1.Z (MASKED), T2.W,1348; CM-NEXT: LOG_IEEE * T1.W (MASKED), T2.W,1349; CM-NEXT: ADD T1.Y, T0.Y, -T2.Z,1350; CM-NEXT: AND_INT T3.Z, PV.X, literal.x,1351; CM-NEXT: MUL_IEEE * T2.W, T2.Y, literal.y, BS:VEC_120/SCL_2121352; CM-NEXT: -4096(nan), 939916788(3.194618e-05)1353; CM-NEXT: MULADD_IEEE T3.Y, T0.Z, literal.x, PV.W,1354; CM-NEXT: ADD T4.Z, T1.X, -PV.Z,1355; CM-NEXT: MUL_IEEE * T2.W, PV.Y, literal.x,1356; CM-NEXT: 939916788(3.194618e-05), 0(0.000000e+00)1357; CM-NEXT: MULADD_IEEE T4.Y, T2.Z, literal.x, PV.W,1358; CM-NEXT: MUL_IEEE T5.Z, PV.Z, literal.x,1359; CM-NEXT: MULADD_IEEE * T2.W, T2.Y, literal.y, PV.Y,1360; CM-NEXT: 939916788(3.194618e-05), 1060204544(6.931152e-01)1361; CM-NEXT: MULADD_IEEE T2.Y, T0.Z, literal.x, PV.W,1362; CM-NEXT: MULADD_IEEE T0.Z, T3.Z, literal.y, PV.Z, BS:VEC_120/SCL_2121363; CM-NEXT: MULADD_IEEE * T2.W, T1.Y, literal.x, PV.Y,1364; CM-NEXT: 1060204544(6.931152e-01), 939916788(3.194618e-05)1365; CM-NEXT: SETGT T2.X, literal.x, |T0.X|,1366; CM-NEXT: MULADD_IEEE T1.Y, T2.Z, literal.y, PV.W,1367; CM-NEXT: SETGT T2.Z, literal.x, |T0.Y|,1368; CM-NEXT: MULADD_IEEE * T2.W, T4.Z, literal.y, PV.Z, BS:VEC_120/SCL_2121369; CM-NEXT: 2139095040(INF), 1060204544(6.931152e-01)1370; CM-NEXT: MULADD_IEEE T3.X, T3.Z, literal.x, PV.W,1371; CM-NEXT: SETGT T3.Y, literal.y, |T1.X|,1372; CM-NEXT: CNDE T0.Z, PV.Z, T0.Y, PV.Y,1373; CM-NEXT: CNDE * T1.W, T1.W, 0.0, literal.z,1374; CM-NEXT: 1060204544(6.931152e-01), 2139095040(INF)1375; CM-NEXT: 1102148120(2.218071e+01), 0(0.000000e+00)1376; CM-NEXT: ADD T4.X, PV.Z, -PV.W,1377; CM-NEXT: CNDE T0.Y, PV.Y, T1.X, PV.X,1378; CM-NEXT: CNDE T0.Z, T1.Z, 0.0, literal.x,1379; CM-NEXT: ADD_INT * T1.W, KC0[2].Y, literal.y,1380; CM-NEXT: 1102148120(2.218071e+01), 8(1.121039e-44)1381; CM-NEXT: LSHR T1.X, PV.W, literal.x,1382; CM-NEXT: ADD T0.Y, PV.Y, -PV.Z,1383; CM-NEXT: CNDE T0.Z, T2.X, T0.X, T2.Y,1384; CM-NEXT: CNDE * T0.W, T0.W, 0.0, literal.y,1385; CM-NEXT: 2(2.802597e-45), 1102148120(2.218071e+01)1386; CM-NEXT: ADD * T0.X, PV.Z, -PV.W,1387; CM-NEXT: LSHR * T2.X, KC0[2].Y, literal.x,1388; CM-NEXT: 2(2.802597e-45), 0(0.000000e+00)1389 %result = call <3 x float> @llvm.log.v3f32(<3 x float> %in)1390 store <3 x float> %result, ptr addrspace(1) %out1391 ret void1392}1393 1394; FIXME: We should be able to merge these packets together on Cayman so we1395; have a maximum of 4 instructions.1396define amdgpu_kernel void @s_log_v4f32(ptr addrspace(1) %out, <4 x float> %in) {1397; SI-SDAG-LABEL: s_log_v4f32:1398; SI-SDAG: ; %bb.0:1399; SI-SDAG-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0xd1400; SI-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91401; SI-SDAG-NEXT: v_mov_b32_e32 v0, 0x8000001402; SI-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172181403; SI-SDAG-NEXT: s_mov_b32 s6, 0x3f3172171404; SI-SDAG-NEXT: s_waitcnt lgkmcnt(0)1405; SI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s11, v01406; SI-SDAG-NEXT: s_and_b64 s[2:3], vcc, exec1407; SI-SDAG-NEXT: s_cselect_b32 s2, 32, 01408; SI-SDAG-NEXT: v_mov_b32_e32 v3, s21409; SI-SDAG-NEXT: v_ldexp_f32_e32 v3, s11, v31410; SI-SDAG-NEXT: v_log_f32_e32 v3, v31411; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v1, vcc1412; SI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s10, v01413; SI-SDAG-NEXT: s_and_b64 s[4:5], vcc, exec1414; SI-SDAG-NEXT: v_mul_f32_e32 v4, 0x3f317217, v31415; SI-SDAG-NEXT: s_cselect_b32 s4, 32, 01416; SI-SDAG-NEXT: v_fma_f32 v5, v3, s6, -v41417; SI-SDAG-NEXT: s_mov_b32 s7, 0x3377d1cf1418; SI-SDAG-NEXT: v_mov_b32_e32 v6, s41419; SI-SDAG-NEXT: v_fma_f32 v5, v3, s7, v51420; SI-SDAG-NEXT: s_mov_b32 s11, 0x7f8000001421; SI-SDAG-NEXT: v_ldexp_f32_e32 v6, s10, v61422; SI-SDAG-NEXT: v_add_f32_e32 v4, v4, v51423; SI-SDAG-NEXT: v_cndmask_b32_e32 v5, 0, v1, vcc1424; SI-SDAG-NEXT: v_log_f32_e32 v6, v61425; SI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v3|, s111426; SI-SDAG-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc1427; SI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s9, v01428; SI-SDAG-NEXT: s_and_b64 s[4:5], vcc, exec1429; SI-SDAG-NEXT: s_cselect_b32 s4, 32, 01430; SI-SDAG-NEXT: v_sub_f32_e32 v3, v3, v21431; SI-SDAG-NEXT: v_mul_f32_e32 v2, 0x3f317217, v61432; SI-SDAG-NEXT: v_mov_b32_e32 v7, s41433; SI-SDAG-NEXT: v_fma_f32 v4, v6, s6, -v21434; SI-SDAG-NEXT: v_ldexp_f32_e32 v7, s9, v71435; SI-SDAG-NEXT: v_fma_f32 v4, v6, s7, v41436; SI-SDAG-NEXT: v_log_f32_e32 v7, v71437; SI-SDAG-NEXT: v_add_f32_e32 v2, v2, v41438; SI-SDAG-NEXT: v_cndmask_b32_e32 v4, 0, v1, vcc1439; SI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v6|, s111440; SI-SDAG-NEXT: v_cndmask_b32_e32 v2, v6, v2, vcc1441; SI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s8, v01442; SI-SDAG-NEXT: s_and_b64 s[4:5], vcc, exec1443; SI-SDAG-NEXT: v_sub_f32_e32 v2, v2, v51444; SI-SDAG-NEXT: v_mul_f32_e32 v5, 0x3f317217, v71445; SI-SDAG-NEXT: s_cselect_b32 s4, 32, 01446; SI-SDAG-NEXT: v_fma_f32 v6, v7, s6, -v51447; SI-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc1448; SI-SDAG-NEXT: v_mov_b32_e32 v1, s41449; SI-SDAG-NEXT: v_fma_f32 v6, v7, s7, v61450; SI-SDAG-NEXT: v_ldexp_f32_e32 v1, s8, v11451; SI-SDAG-NEXT: v_add_f32_e32 v5, v5, v61452; SI-SDAG-NEXT: v_log_f32_e32 v6, v11453; SI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v7|, s111454; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, v7, v5, vcc1455; SI-SDAG-NEXT: v_sub_f32_e32 v1, v1, v41456; SI-SDAG-NEXT: v_mul_f32_e32 v4, 0x3f317217, v61457; SI-SDAG-NEXT: v_fma_f32 v5, v6, s6, -v41458; SI-SDAG-NEXT: v_fma_f32 v5, v6, s7, v51459; SI-SDAG-NEXT: v_add_f32_e32 v4, v4, v51460; SI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v6|, s111461; SI-SDAG-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc1462; SI-SDAG-NEXT: s_mov_b32 s3, 0xf0001463; SI-SDAG-NEXT: s_mov_b32 s2, -11464; SI-SDAG-NEXT: v_sub_f32_e32 v0, v4, v01465; SI-SDAG-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 01466; SI-SDAG-NEXT: s_endpgm1467;1468; SI-GISEL-LABEL: s_log_v4f32:1469; SI-GISEL: ; %bb.0:1470; SI-GISEL-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0xd1471; SI-GISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x91472; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x8000001473; SI-GISEL-NEXT: v_mov_b32_e32 v3, 0x3f3172171474; SI-GISEL-NEXT: v_mov_b32_e32 v4, 0x3377d1cf1475; SI-GISEL-NEXT: s_waitcnt lgkmcnt(0)1476; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s8, v21477; SI-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc1478; SI-GISEL-NEXT: v_lshlrev_b32_e32 v0, 5, v01479; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, s8, v01480; SI-GISEL-NEXT: v_log_f32_e32 v0, v01481; SI-GISEL-NEXT: v_mov_b32_e32 v5, 0x7f8000001482; SI-GISEL-NEXT: s_mov_b32 s6, -11483; SI-GISEL-NEXT: s_mov_b32 s7, 0xf0001484; SI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317217, v01485; SI-GISEL-NEXT: v_fma_f32 v6, v0, v3, -v11486; SI-GISEL-NEXT: v_fma_f32 v6, v0, v4, v61487; SI-GISEL-NEXT: v_add_f32_e32 v1, v1, v61488; SI-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], |v0|, v51489; SI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[0:1]1490; SI-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], s9, v21491; SI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, s[0:1]1492; SI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v11493; SI-GISEL-NEXT: v_ldexp_f32_e32 v1, s9, v11494; SI-GISEL-NEXT: v_log_f32_e32 v1, v11495; SI-GISEL-NEXT: v_mov_b32_e32 v6, 0x41b172181496; SI-GISEL-NEXT: v_cndmask_b32_e32 v7, 0, v6, vcc1497; SI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v71498; SI-GISEL-NEXT: v_mul_f32_e32 v7, 0x3f317217, v11499; SI-GISEL-NEXT: v_fma_f32 v8, v1, v3, -v71500; SI-GISEL-NEXT: v_fma_f32 v8, v1, v4, v81501; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s10, v21502; SI-GISEL-NEXT: v_add_f32_e32 v7, v7, v81503; SI-GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc1504; SI-GISEL-NEXT: v_lshlrev_b32_e32 v8, 5, v81505; SI-GISEL-NEXT: v_ldexp_f32_e32 v8, s10, v81506; SI-GISEL-NEXT: v_log_f32_e32 v8, v81507; SI-GISEL-NEXT: v_cmp_lt_f32_e64 s[2:3], |v1|, v51508; SI-GISEL-NEXT: v_cndmask_b32_e64 v1, v1, v7, s[2:3]1509; SI-GISEL-NEXT: v_cndmask_b32_e64 v7, 0, v6, s[0:1]1510; SI-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], s11, v21511; SI-GISEL-NEXT: v_sub_f32_e32 v1, v1, v71512; SI-GISEL-NEXT: v_mul_f32_e32 v7, 0x3f317217, v81513; SI-GISEL-NEXT: v_cndmask_b32_e64 v2, 0, 1, s[0:1]1514; SI-GISEL-NEXT: v_fma_f32 v9, v8, v3, -v71515; SI-GISEL-NEXT: v_lshlrev_b32_e32 v2, 5, v21516; SI-GISEL-NEXT: v_fma_f32 v9, v8, v4, v91517; SI-GISEL-NEXT: v_ldexp_f32_e32 v2, s11, v21518; SI-GISEL-NEXT: v_add_f32_e32 v7, v7, v91519; SI-GISEL-NEXT: v_log_f32_e32 v9, v21520; SI-GISEL-NEXT: v_cmp_lt_f32_e64 s[2:3], |v8|, v51521; SI-GISEL-NEXT: v_cndmask_b32_e64 v2, v8, v7, s[2:3]1522; SI-GISEL-NEXT: v_cndmask_b32_e32 v7, 0, v6, vcc1523; SI-GISEL-NEXT: v_sub_f32_e32 v2, v2, v71524; SI-GISEL-NEXT: v_mul_f32_e32 v7, 0x3f317217, v91525; SI-GISEL-NEXT: v_fma_f32 v3, v9, v3, -v71526; SI-GISEL-NEXT: v_fma_f32 v3, v9, v4, v31527; SI-GISEL-NEXT: v_add_f32_e32 v3, v7, v31528; SI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v9|, v51529; SI-GISEL-NEXT: v_cndmask_b32_e32 v3, v9, v3, vcc1530; SI-GISEL-NEXT: v_cndmask_b32_e64 v4, 0, v6, s[0:1]1531; SI-GISEL-NEXT: v_sub_f32_e32 v3, v3, v41532; SI-GISEL-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 01533; SI-GISEL-NEXT: s_endpgm1534;1535; VI-SDAG-LABEL: s_log_v4f32:1536; VI-SDAG: ; %bb.0:1537; VI-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x341538; VI-SDAG-NEXT: v_mov_b32_e32 v0, 0x8000001539; VI-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172181540; VI-SDAG-NEXT: s_mov_b32 s8, 0x7f8000001541; VI-SDAG-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x241542; VI-SDAG-NEXT: s_waitcnt lgkmcnt(0)1543; VI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s3, v01544; VI-SDAG-NEXT: s_and_b64 s[6:7], vcc, exec1545; VI-SDAG-NEXT: s_cselect_b32 s6, 32, 01546; VI-SDAG-NEXT: v_mov_b32_e32 v3, s61547; VI-SDAG-NEXT: v_ldexp_f32 v3, s3, v31548; VI-SDAG-NEXT: v_log_f32_e32 v3, v31549; VI-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v1, vcc1550; VI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s2, v01551; VI-SDAG-NEXT: s_and_b64 s[6:7], vcc, exec1552; VI-SDAG-NEXT: v_and_b32_e32 v4, 0xfffff000, v31553; VI-SDAG-NEXT: v_sub_f32_e32 v5, v3, v41554; VI-SDAG-NEXT: v_mul_f32_e32 v6, 0x3805fdf4, v41555; VI-SDAG-NEXT: v_mul_f32_e32 v7, 0x3f317000, v51556; VI-SDAG-NEXT: v_mul_f32_e32 v5, 0x3805fdf4, v51557; VI-SDAG-NEXT: s_cselect_b32 s3, 32, 01558; VI-SDAG-NEXT: v_add_f32_e32 v5, v6, v51559; VI-SDAG-NEXT: v_mov_b32_e32 v6, s31560; VI-SDAG-NEXT: v_ldexp_f32 v6, s2, v61561; VI-SDAG-NEXT: v_log_f32_e32 v6, v61562; VI-SDAG-NEXT: v_mul_f32_e32 v4, 0x3f317000, v41563; VI-SDAG-NEXT: v_add_f32_e32 v5, v7, v51564; VI-SDAG-NEXT: v_add_f32_e32 v4, v4, v51565; VI-SDAG-NEXT: v_cndmask_b32_e32 v5, 0, v1, vcc1566; VI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v3|, s81567; VI-SDAG-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc1568; VI-SDAG-NEXT: v_sub_f32_e32 v3, v3, v21569; VI-SDAG-NEXT: v_and_b32_e32 v2, 0xfffff000, v61570; VI-SDAG-NEXT: v_sub_f32_e32 v4, v6, v21571; VI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s1, v01572; VI-SDAG-NEXT: v_mul_f32_e32 v7, 0x3f317000, v41573; VI-SDAG-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v41574; VI-SDAG-NEXT: v_mul_f32_e32 v8, 0x3805fdf4, v21575; VI-SDAG-NEXT: s_and_b64 s[2:3], vcc, exec1576; VI-SDAG-NEXT: v_add_f32_e32 v4, v8, v41577; VI-SDAG-NEXT: s_cselect_b32 s2, 32, 01578; VI-SDAG-NEXT: v_add_f32_e32 v4, v7, v41579; VI-SDAG-NEXT: v_mov_b32_e32 v7, s21580; VI-SDAG-NEXT: v_ldexp_f32 v7, s1, v71581; VI-SDAG-NEXT: v_log_f32_e32 v7, v71582; VI-SDAG-NEXT: v_mul_f32_e32 v2, 0x3f317000, v21583; VI-SDAG-NEXT: v_add_f32_e32 v2, v2, v41584; VI-SDAG-NEXT: v_cndmask_b32_e32 v4, 0, v1, vcc1585; VI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v6|, s81586; VI-SDAG-NEXT: v_cndmask_b32_e32 v2, v6, v2, vcc1587; VI-SDAG-NEXT: v_sub_f32_e32 v2, v2, v51588; VI-SDAG-NEXT: v_and_b32_e32 v5, 0xfffff000, v71589; VI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s0, v01590; VI-SDAG-NEXT: v_sub_f32_e32 v6, v7, v51591; VI-SDAG-NEXT: s_and_b64 s[2:3], vcc, exec1592; VI-SDAG-NEXT: v_mul_f32_e32 v8, 0x3f317000, v61593; VI-SDAG-NEXT: v_mul_f32_e32 v6, 0x3805fdf4, v61594; VI-SDAG-NEXT: v_mul_f32_e32 v9, 0x3805fdf4, v51595; VI-SDAG-NEXT: s_cselect_b32 s1, 32, 01596; VI-SDAG-NEXT: v_add_f32_e32 v6, v9, v61597; VI-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc1598; VI-SDAG-NEXT: v_mov_b32_e32 v1, s11599; VI-SDAG-NEXT: v_add_f32_e32 v6, v8, v61600; VI-SDAG-NEXT: v_mul_f32_e32 v5, 0x3f317000, v51601; VI-SDAG-NEXT: v_ldexp_f32 v1, s0, v11602; VI-SDAG-NEXT: v_add_f32_e32 v5, v5, v61603; VI-SDAG-NEXT: v_log_f32_e32 v6, v11604; VI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v7|, s81605; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, v7, v5, vcc1606; VI-SDAG-NEXT: v_sub_f32_e32 v1, v1, v41607; VI-SDAG-NEXT: v_and_b32_e32 v4, 0xfffff000, v61608; VI-SDAG-NEXT: v_sub_f32_e32 v5, v6, v41609; VI-SDAG-NEXT: v_mul_f32_e32 v7, 0x3f317000, v51610; VI-SDAG-NEXT: v_mul_f32_e32 v5, 0x3805fdf4, v51611; VI-SDAG-NEXT: v_mul_f32_e32 v8, 0x3805fdf4, v41612; VI-SDAG-NEXT: v_add_f32_e32 v5, v8, v51613; VI-SDAG-NEXT: v_add_f32_e32 v5, v7, v51614; VI-SDAG-NEXT: v_mul_f32_e32 v4, 0x3f317000, v41615; VI-SDAG-NEXT: v_add_f32_e32 v4, v4, v51616; VI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v6|, s81617; VI-SDAG-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc1618; VI-SDAG-NEXT: v_sub_f32_e32 v0, v4, v01619; VI-SDAG-NEXT: v_mov_b32_e32 v4, s41620; VI-SDAG-NEXT: v_mov_b32_e32 v5, s51621; VI-SDAG-NEXT: flat_store_dwordx4 v[4:5], v[0:3]1622; VI-SDAG-NEXT: s_endpgm1623;1624; VI-GISEL-LABEL: s_log_v4f32:1625; VI-GISEL: ; %bb.0:1626; VI-GISEL-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x341627; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x8000001628; VI-GISEL-NEXT: v_mov_b32_e32 v3, 0x7f8000001629; VI-GISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x241630; VI-GISEL-NEXT: s_waitcnt lgkmcnt(0)1631; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s8, v21632; VI-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc1633; VI-GISEL-NEXT: v_lshlrev_b32_e32 v0, 5, v01634; VI-GISEL-NEXT: v_ldexp_f32 v0, s8, v01635; VI-GISEL-NEXT: v_log_f32_e32 v0, v01636; VI-GISEL-NEXT: v_and_b32_e32 v1, 0xfffff000, v01637; VI-GISEL-NEXT: v_sub_f32_e32 v4, v0, v11638; VI-GISEL-NEXT: v_mul_f32_e32 v5, 0x3805fdf4, v11639; VI-GISEL-NEXT: v_mul_f32_e32 v6, 0x3805fdf4, v41640; VI-GISEL-NEXT: v_mul_f32_e32 v4, 0x3f317000, v41641; VI-GISEL-NEXT: v_add_f32_e32 v5, v5, v61642; VI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317000, v11643; VI-GISEL-NEXT: v_add_f32_e32 v4, v4, v51644; VI-GISEL-NEXT: v_add_f32_e32 v1, v1, v41645; VI-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], |v0|, v31646; VI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[0:1]1647; VI-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], s9, v21648; VI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, s[0:1]1649; VI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v11650; VI-GISEL-NEXT: v_ldexp_f32 v1, s9, v11651; VI-GISEL-NEXT: v_log_f32_e32 v1, v11652; VI-GISEL-NEXT: v_mov_b32_e32 v4, 0x41b172181653; VI-GISEL-NEXT: v_cndmask_b32_e32 v5, 0, v4, vcc1654; VI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v51655; VI-GISEL-NEXT: v_and_b32_e32 v5, 0xfffff000, v11656; VI-GISEL-NEXT: v_sub_f32_e32 v6, v1, v51657; VI-GISEL-NEXT: v_mul_f32_e32 v7, 0x3805fdf4, v61658; VI-GISEL-NEXT: v_mul_f32_e32 v8, 0x3805fdf4, v51659; VI-GISEL-NEXT: v_add_f32_e32 v7, v8, v71660; VI-GISEL-NEXT: v_mul_f32_e32 v6, 0x3f317000, v61661; VI-GISEL-NEXT: v_add_f32_e32 v6, v6, v71662; VI-GISEL-NEXT: v_mul_f32_e32 v5, 0x3f317000, v51663; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s10, v21664; VI-GISEL-NEXT: v_add_f32_e32 v5, v5, v61665; VI-GISEL-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc1666; VI-GISEL-NEXT: v_lshlrev_b32_e32 v6, 5, v61667; VI-GISEL-NEXT: v_ldexp_f32 v6, s10, v61668; VI-GISEL-NEXT: v_log_f32_e32 v6, v61669; VI-GISEL-NEXT: v_cmp_lt_f32_e64 s[2:3], |v1|, v31670; VI-GISEL-NEXT: v_cndmask_b32_e64 v1, v1, v5, s[2:3]1671; VI-GISEL-NEXT: v_cndmask_b32_e64 v5, 0, v4, s[0:1]1672; VI-GISEL-NEXT: v_sub_f32_e32 v1, v1, v51673; VI-GISEL-NEXT: v_and_b32_e32 v5, 0xfffff000, v61674; VI-GISEL-NEXT: v_sub_f32_e32 v7, v6, v51675; VI-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], s11, v21676; VI-GISEL-NEXT: v_mul_f32_e32 v8, 0x3805fdf4, v71677; VI-GISEL-NEXT: v_mul_f32_e32 v9, 0x3805fdf4, v51678; VI-GISEL-NEXT: v_cndmask_b32_e64 v2, 0, 1, s[0:1]1679; VI-GISEL-NEXT: v_add_f32_e32 v8, v9, v81680; VI-GISEL-NEXT: v_mul_f32_e32 v7, 0x3f317000, v71681; VI-GISEL-NEXT: v_lshlrev_b32_e32 v2, 5, v21682; VI-GISEL-NEXT: v_add_f32_e32 v7, v7, v81683; VI-GISEL-NEXT: v_mul_f32_e32 v5, 0x3f317000, v51684; VI-GISEL-NEXT: v_ldexp_f32 v2, s11, v21685; VI-GISEL-NEXT: v_add_f32_e32 v5, v5, v71686; VI-GISEL-NEXT: v_log_f32_e32 v7, v21687; VI-GISEL-NEXT: v_cmp_lt_f32_e64 s[2:3], |v6|, v31688; VI-GISEL-NEXT: v_cndmask_b32_e64 v2, v6, v5, s[2:3]1689; VI-GISEL-NEXT: v_cndmask_b32_e32 v5, 0, v4, vcc1690; VI-GISEL-NEXT: v_sub_f32_e32 v2, v2, v51691; VI-GISEL-NEXT: v_and_b32_e32 v5, 0xfffff000, v71692; VI-GISEL-NEXT: v_sub_f32_e32 v6, v7, v51693; VI-GISEL-NEXT: v_mul_f32_e32 v8, 0x3805fdf4, v61694; VI-GISEL-NEXT: v_mul_f32_e32 v9, 0x3805fdf4, v51695; VI-GISEL-NEXT: v_add_f32_e32 v8, v9, v81696; VI-GISEL-NEXT: v_mul_f32_e32 v6, 0x3f317000, v61697; VI-GISEL-NEXT: v_add_f32_e32 v6, v6, v81698; VI-GISEL-NEXT: v_mul_f32_e32 v5, 0x3f317000, v51699; VI-GISEL-NEXT: v_add_f32_e32 v5, v5, v61700; VI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v7|, v31701; VI-GISEL-NEXT: v_cndmask_b32_e32 v3, v7, v5, vcc1702; VI-GISEL-NEXT: v_cndmask_b32_e64 v4, 0, v4, s[0:1]1703; VI-GISEL-NEXT: v_sub_f32_e32 v3, v3, v41704; VI-GISEL-NEXT: v_mov_b32_e32 v4, s41705; VI-GISEL-NEXT: v_mov_b32_e32 v5, s51706; VI-GISEL-NEXT: flat_store_dwordx4 v[4:5], v[0:3]1707; VI-GISEL-NEXT: s_endpgm1708;1709; GFX900-SDAG-LABEL: s_log_v4f32:1710; GFX900-SDAG: ; %bb.0:1711; GFX900-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x341712; GFX900-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x241713; GFX900-SDAG-NEXT: v_mov_b32_e32 v0, 0x8000001714; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172181715; GFX900-SDAG-NEXT: s_mov_b32 s8, 0x3f3172171716; GFX900-SDAG-NEXT: s_waitcnt lgkmcnt(0)1717; GFX900-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s3, v01718; GFX900-SDAG-NEXT: s_and_b64 s[4:5], vcc, exec1719; GFX900-SDAG-NEXT: s_cselect_b32 s4, 32, 01720; GFX900-SDAG-NEXT: v_mov_b32_e32 v3, s41721; GFX900-SDAG-NEXT: v_ldexp_f32 v3, s3, v31722; GFX900-SDAG-NEXT: v_log_f32_e32 v3, v31723; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v1, vcc1724; GFX900-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s2, v01725; GFX900-SDAG-NEXT: s_and_b64 s[4:5], vcc, exec1726; GFX900-SDAG-NEXT: v_mul_f32_e32 v5, 0x3f317217, v31727; GFX900-SDAG-NEXT: s_cselect_b32 s3, 32, 01728; GFX900-SDAG-NEXT: s_mov_b32 s9, 0x3377d1cf1729; GFX900-SDAG-NEXT: v_fma_f32 v6, v3, s8, -v51730; GFX900-SDAG-NEXT: v_mov_b32_e32 v7, s31731; GFX900-SDAG-NEXT: v_fma_f32 v6, v3, s9, v61732; GFX900-SDAG-NEXT: s_mov_b32 s10, 0x7f8000001733; GFX900-SDAG-NEXT: v_ldexp_f32 v7, s2, v71734; GFX900-SDAG-NEXT: v_add_f32_e32 v5, v5, v61735; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v6, 0, v1, vcc1736; GFX900-SDAG-NEXT: v_log_f32_e32 v7, v71737; GFX900-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v3|, s101738; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc1739; GFX900-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s1, v01740; GFX900-SDAG-NEXT: s_and_b64 s[2:3], vcc, exec1741; GFX900-SDAG-NEXT: s_cselect_b32 s2, 32, 01742; GFX900-SDAG-NEXT: v_sub_f32_e32 v3, v3, v21743; GFX900-SDAG-NEXT: v_mul_f32_e32 v2, 0x3f317217, v71744; GFX900-SDAG-NEXT: v_mov_b32_e32 v8, s21745; GFX900-SDAG-NEXT: v_fma_f32 v5, v7, s8, -v21746; GFX900-SDAG-NEXT: v_ldexp_f32 v8, s1, v81747; GFX900-SDAG-NEXT: v_fma_f32 v5, v7, s9, v51748; GFX900-SDAG-NEXT: v_log_f32_e32 v8, v81749; GFX900-SDAG-NEXT: v_add_f32_e32 v2, v2, v51750; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v5, 0, v1, vcc1751; GFX900-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v7|, s101752; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v2, v7, v2, vcc1753; GFX900-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s0, v01754; GFX900-SDAG-NEXT: s_and_b64 s[2:3], vcc, exec1755; GFX900-SDAG-NEXT: v_sub_f32_e32 v2, v2, v61756; GFX900-SDAG-NEXT: v_mul_f32_e32 v6, 0x3f317217, v81757; GFX900-SDAG-NEXT: s_cselect_b32 s1, 32, 01758; GFX900-SDAG-NEXT: v_fma_f32 v7, v8, s8, -v61759; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc1760; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, s11761; GFX900-SDAG-NEXT: v_fma_f32 v7, v8, s9, v71762; GFX900-SDAG-NEXT: v_ldexp_f32 v1, s0, v11763; GFX900-SDAG-NEXT: v_add_f32_e32 v6, v6, v71764; GFX900-SDAG-NEXT: v_log_f32_e32 v7, v11765; GFX900-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v8|, s101766; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, v8, v6, vcc1767; GFX900-SDAG-NEXT: v_sub_f32_e32 v1, v1, v51768; GFX900-SDAG-NEXT: v_mul_f32_e32 v5, 0x3f317217, v71769; GFX900-SDAG-NEXT: v_fma_f32 v6, v7, s8, -v51770; GFX900-SDAG-NEXT: v_fma_f32 v6, v7, s9, v61771; GFX900-SDAG-NEXT: v_add_f32_e32 v5, v5, v61772; GFX900-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v7|, s101773; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v5, v7, v5, vcc1774; GFX900-SDAG-NEXT: v_mov_b32_e32 v4, 01775; GFX900-SDAG-NEXT: v_sub_f32_e32 v0, v5, v01776; GFX900-SDAG-NEXT: global_store_dwordx4 v4, v[0:3], s[6:7]1777; GFX900-SDAG-NEXT: s_endpgm1778;1779; GFX900-GISEL-LABEL: s_log_v4f32:1780; GFX900-GISEL: ; %bb.0:1781; GFX900-GISEL-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x341782; GFX900-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x241783; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x8000001784; GFX900-GISEL-NEXT: v_mov_b32_e32 v3, 0x3f3172171785; GFX900-GISEL-NEXT: v_mov_b32_e32 v5, 0x3377d1cf1786; GFX900-GISEL-NEXT: s_waitcnt lgkmcnt(0)1787; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s8, v21788; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc1789; GFX900-GISEL-NEXT: v_lshlrev_b32_e32 v0, 5, v01790; GFX900-GISEL-NEXT: v_ldexp_f32 v0, s8, v01791; GFX900-GISEL-NEXT: v_log_f32_e32 v0, v01792; GFX900-GISEL-NEXT: v_mov_b32_e32 v6, 0x7f8000001793; GFX900-GISEL-NEXT: v_mov_b32_e32 v4, 01794; GFX900-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317217, v01795; GFX900-GISEL-NEXT: v_fma_f32 v7, v0, v3, -v11796; GFX900-GISEL-NEXT: v_fma_f32 v7, v0, v5, v71797; GFX900-GISEL-NEXT: v_add_f32_e32 v1, v1, v71798; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], |v0|, v61799; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[0:1]1800; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], s9, v21801; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, s[0:1]1802; GFX900-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v11803; GFX900-GISEL-NEXT: v_ldexp_f32 v1, s9, v11804; GFX900-GISEL-NEXT: v_log_f32_e32 v1, v11805; GFX900-GISEL-NEXT: v_mov_b32_e32 v7, 0x41b172181806; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v8, 0, v7, vcc1807; GFX900-GISEL-NEXT: v_sub_f32_e32 v0, v0, v81808; GFX900-GISEL-NEXT: v_mul_f32_e32 v8, 0x3f317217, v11809; GFX900-GISEL-NEXT: v_fma_f32 v9, v1, v3, -v81810; GFX900-GISEL-NEXT: v_fma_f32 v9, v1, v5, v91811; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, s10, v21812; GFX900-GISEL-NEXT: v_add_f32_e32 v8, v8, v91813; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc1814; GFX900-GISEL-NEXT: v_lshlrev_b32_e32 v9, 5, v91815; GFX900-GISEL-NEXT: v_ldexp_f32 v9, s10, v91816; GFX900-GISEL-NEXT: v_log_f32_e32 v9, v91817; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 s[2:3], |v1|, v61818; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v1, v1, v8, s[2:3]1819; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v8, 0, v7, s[0:1]1820; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 s[0:1], s11, v21821; GFX900-GISEL-NEXT: v_sub_f32_e32 v1, v1, v81822; GFX900-GISEL-NEXT: v_mul_f32_e32 v8, 0x3f317217, v91823; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v2, 0, 1, s[0:1]1824; GFX900-GISEL-NEXT: v_fma_f32 v10, v9, v3, -v81825; GFX900-GISEL-NEXT: v_lshlrev_b32_e32 v2, 5, v21826; GFX900-GISEL-NEXT: v_fma_f32 v10, v9, v5, v101827; GFX900-GISEL-NEXT: v_ldexp_f32 v2, s11, v21828; GFX900-GISEL-NEXT: v_add_f32_e32 v8, v8, v101829; GFX900-GISEL-NEXT: v_log_f32_e32 v10, v21830; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 s[2:3], |v9|, v61831; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v2, v9, v8, s[2:3]1832; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v8, 0, v7, vcc1833; GFX900-GISEL-NEXT: v_sub_f32_e32 v2, v2, v81834; GFX900-GISEL-NEXT: v_mul_f32_e32 v8, 0x3f317217, v101835; GFX900-GISEL-NEXT: v_fma_f32 v3, v10, v3, -v81836; GFX900-GISEL-NEXT: v_fma_f32 v3, v10, v5, v31837; GFX900-GISEL-NEXT: v_add_f32_e32 v3, v8, v31838; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v10|, v61839; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v3, v10, v3, vcc1840; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v5, 0, v7, s[0:1]1841; GFX900-GISEL-NEXT: v_sub_f32_e32 v3, v3, v51842; GFX900-GISEL-NEXT: global_store_dwordx4 v4, v[0:3], s[6:7]1843; GFX900-GISEL-NEXT: s_endpgm1844;1845; GFX1100-SDAG-LABEL: s_log_v4f32:1846; GFX1100-SDAG: ; %bb.0:1847; GFX1100-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x341848; GFX1100-SDAG-NEXT: s_waitcnt lgkmcnt(0)1849; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 s6, 0x800000, s31850; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 s7, 0x800000, s21851; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 s8, 0x800000, s11852; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 s9, 0x800000, s01853; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4)1854; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 0x41b17218, s61855; GFX1100-SDAG-NEXT: s_and_b32 s6, s6, exec_lo1856; GFX1100-SDAG-NEXT: s_cselect_b32 s6, 32, 01857; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 0x41b17218, s71858; GFX1100-SDAG-NEXT: s_and_b32 s7, s7, exec_lo1859; GFX1100-SDAG-NEXT: v_ldexp_f32 v2, s3, s61860; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v4, 0, 0x41b17218, s81861; GFX1100-SDAG-NEXT: s_cselect_b32 s7, 32, 01862; GFX1100-SDAG-NEXT: s_and_b32 s8, s8, exec_lo1863; GFX1100-SDAG-NEXT: s_cselect_b32 s3, 32, 01864; GFX1100-SDAG-NEXT: s_and_b32 s6, s9, exec_lo1865; GFX1100-SDAG-NEXT: v_ldexp_f32 v3, s2, s71866; GFX1100-SDAG-NEXT: s_cselect_b32 s2, 32, 01867; GFX1100-SDAG-NEXT: v_ldexp_f32 v6, s1, s31868; GFX1100-SDAG-NEXT: v_ldexp_f32 v7, s0, s21869; GFX1100-SDAG-NEXT: v_log_f32_e32 v2, v21870; GFX1100-SDAG-NEXT: v_log_f32_e32 v3, v31871; GFX1100-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x241872; GFX1100-SDAG-NEXT: v_log_f32_e32 v6, v61873; GFX1100-SDAG-NEXT: v_log_f32_e32 v7, v71874; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v5, 0, 0x41b17218, s91875; GFX1100-SDAG-NEXT: s_delay_alu instid0(TRANS32_DEP_3)1876; GFX1100-SDAG-NEXT: v_dual_mul_f32 v8, 0x3f317217, v2 :: v_dual_mul_f32 v9, 0x3f317217, v31877; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v2|1878; GFX1100-SDAG-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1879; GFX1100-SDAG-NEXT: v_dual_mul_f32 v10, 0x3f317217, v6 :: v_dual_mul_f32 v11, 0x3f317217, v71880; GFX1100-SDAG-NEXT: v_fma_f32 v12, 0x3f317217, v2, -v81881; GFX1100-SDAG-NEXT: v_fma_f32 v13, 0x3f317217, v3, -v91882; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)1883; GFX1100-SDAG-NEXT: v_fma_f32 v14, 0x3f317217, v6, -v101884; GFX1100-SDAG-NEXT: v_fma_f32 v15, 0x3f317217, v7, -v111885; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)1886; GFX1100-SDAG-NEXT: v_dual_fmac_f32 v12, 0x3377d1cf, v2 :: v_dual_fmac_f32 v13, 0x3377d1cf, v31887; GFX1100-SDAG-NEXT: v_dual_fmac_f32 v14, 0x3377d1cf, v6 :: v_dual_fmac_f32 v15, 0x3377d1cf, v71888; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1889; GFX1100-SDAG-NEXT: v_dual_add_f32 v8, v8, v12 :: v_dual_add_f32 v9, v9, v131890; GFX1100-SDAG-NEXT: v_dual_add_f32 v10, v10, v14 :: v_dual_add_f32 v11, v11, v151891; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_4)1892; GFX1100-SDAG-NEXT: v_cndmask_b32_e32 v2, v2, v8, vcc_lo1893; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v3|1894; GFX1100-SDAG-NEXT: v_dual_cndmask_b32 v8, v3, v9 :: v_dual_mov_b32 v9, 01895; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v6|1896; GFX1100-SDAG-NEXT: v_cndmask_b32_e32 v6, v6, v10, vcc_lo1897; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v7|1898; GFX1100-SDAG-NEXT: v_cndmask_b32_e32 v7, v7, v11, vcc_lo1899; GFX1100-SDAG-NEXT: v_dual_sub_f32 v3, v2, v0 :: v_dual_sub_f32 v2, v8, v11900; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)1901; GFX1100-SDAG-NEXT: v_dual_sub_f32 v1, v6, v4 :: v_dual_sub_f32 v0, v7, v51902; GFX1100-SDAG-NEXT: s_waitcnt lgkmcnt(0)1903; GFX1100-SDAG-NEXT: global_store_b128 v9, v[0:3], s[0:1]1904; GFX1100-SDAG-NEXT: s_endpgm1905;1906; GFX1100-GISEL-LABEL: s_log_v4f32:1907; GFX1100-GISEL: ; %bb.0:1908; GFX1100-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x341909; GFX1100-GISEL-NEXT: s_waitcnt lgkmcnt(0)1910; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 s8, 0x800000, s21911; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 s9, 0x800000, s31912; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 s6, 0x800000, s01913; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 s7, 0x800000, s11914; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1915; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v2, 0, 1, s81916; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v3, 0, 1, s91917; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1918; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, s61919; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, s71920; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v4, 0, 0x41b17218, s61921; GFX1100-GISEL-NEXT: v_lshlrev_b32_e32 v2, 5, v21922; GFX1100-GISEL-NEXT: v_lshlrev_b32_e32 v3, 5, v31923; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 0x41b17218, s71924; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 0x41b17218, s81925; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 0x41b17218, s91926; GFX1100-GISEL-NEXT: v_ldexp_f32 v2, s2, v21927; GFX1100-GISEL-NEXT: v_ldexp_f32 v3, s3, v31928; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)1929; GFX1100-GISEL-NEXT: v_log_f32_e32 v2, v21930; GFX1100-GISEL-NEXT: v_lshlrev_b32_e32 v0, 5, v01931; GFX1100-GISEL-NEXT: v_log_f32_e32 v3, v31932; GFX1100-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v11933; GFX1100-GISEL-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1934; GFX1100-GISEL-NEXT: v_mul_f32_e32 v7, 0x3f317217, v21935; GFX1100-GISEL-NEXT: v_ldexp_f32 v0, s0, v01936; GFX1100-GISEL-NEXT: v_mul_f32_e32 v8, 0x3f317217, v31937; GFX1100-GISEL-NEXT: v_ldexp_f32 v1, s1, v11938; GFX1100-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x241939; GFX1100-GISEL-NEXT: v_fma_f32 v12, 0x3f317217, v2, -v71940; GFX1100-GISEL-NEXT: v_log_f32_e32 v0, v01941; GFX1100-GISEL-NEXT: v_fma_f32 v13, 0x3f317217, v3, -v81942; GFX1100-GISEL-NEXT: v_log_f32_e32 v1, v11943; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1944; GFX1100-GISEL-NEXT: v_dual_fmac_f32 v12, 0x3377d1cf, v2 :: v_dual_fmac_f32 v13, 0x3377d1cf, v31945; GFX1100-GISEL-NEXT: v_add_f32_e32 v7, v7, v121946; GFX1100-GISEL-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1947; GFX1100-GISEL-NEXT: v_mul_f32_e32 v5, 0x3f317217, v01948; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|1949; GFX1100-GISEL-NEXT: v_mul_f32_e32 v6, 0x3f317217, v11950; GFX1100-GISEL-NEXT: v_add_f32_e32 v8, v8, v131951; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)1952; GFX1100-GISEL-NEXT: v_fma_f32 v10, 0x3f317217, v0, -v51953; GFX1100-GISEL-NEXT: v_fma_f32 v11, 0x3f317217, v1, -v61954; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1955; GFX1100-GISEL-NEXT: v_dual_fmac_f32 v10, 0x3377d1cf, v0 :: v_dual_fmac_f32 v11, 0x3377d1cf, v11956; GFX1100-GISEL-NEXT: v_dual_add_f32 v5, v5, v10 :: v_dual_add_f32 v6, v6, v111957; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)1958; GFX1100-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc_lo1959; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v1|1960; GFX1100-GISEL-NEXT: v_cndmask_b32_e32 v1, v1, v6, vcc_lo1961; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v2|1962; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)1963; GFX1100-GISEL-NEXT: v_dual_mov_b32 v5, 0 :: v_dual_sub_f32 v0, v0, v41964; GFX1100-GISEL-NEXT: v_cndmask_b32_e32 v2, v2, v7, vcc_lo1965; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v3|1966; GFX1100-GISEL-NEXT: v_cndmask_b32_e32 v3, v3, v8, vcc_lo1967; GFX1100-GISEL-NEXT: v_dual_sub_f32 v1, v1, v9 :: v_dual_sub_f32 v2, v2, v141968; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2)1969; GFX1100-GISEL-NEXT: v_sub_f32_e32 v3, v3, v151970; GFX1100-GISEL-NEXT: s_waitcnt lgkmcnt(0)1971; GFX1100-GISEL-NEXT: global_store_b128 v5, v[0:3], s[0:1]1972; GFX1100-GISEL-NEXT: s_endpgm1973;1974; R600-LABEL: s_log_v4f32:1975; R600: ; %bb.0:1976; R600-NEXT: ALU 76, @4, KC0[CB0:0-32], KC1[]1977; R600-NEXT: MEM_RAT_CACHELESS STORE_RAW T2.XYZW, T0.X, 11978; R600-NEXT: CF_END1979; R600-NEXT: PAD1980; R600-NEXT: ALU clause starting at 4:1981; R600-NEXT: SETGT T0.W, literal.x, KC0[3].Z,1982; R600-NEXT: SETGT * T1.W, literal.x, KC0[4].X,1983; R600-NEXT: 8388608(1.175494e-38), 0(0.000000e+00)1984; R600-NEXT: CNDE * T2.W, PV.W, 1.0, literal.x,1985; R600-NEXT: 1333788672(4.294967e+09), 0(0.000000e+00)1986; R600-NEXT: MUL_IEEE T0.Z, KC0[3].Z, PV.W,1987; R600-NEXT: SETGT T2.W, literal.x, KC0[3].W,1988; R600-NEXT: CNDE * T3.W, T1.W, 1.0, literal.y,1989; R600-NEXT: 8388608(1.175494e-38), 1333788672(4.294967e+09)1990; R600-NEXT: MUL_IEEE T1.Z, KC0[4].X, PS,1991; R600-NEXT: CNDE T3.W, PV.W, 1.0, literal.x,1992; R600-NEXT: LOG_IEEE * T0.X, PV.Z,1993; R600-NEXT: 1333788672(4.294967e+09), 0(0.000000e+00)1994; R600-NEXT: MUL_IEEE T0.Z, KC0[3].W, PV.W,1995; R600-NEXT: SETGT T3.W, literal.x, KC0[3].Y,1996; R600-NEXT: LOG_IEEE * T0.Y, PV.Z,1997; R600-NEXT: 8388608(1.175494e-38), 0(0.000000e+00)1998; R600-NEXT: AND_INT T1.Y, PS, literal.x,1999; R600-NEXT: AND_INT T1.Z, T0.X, literal.x,2000; R600-NEXT: CNDE T4.W, PV.W, 1.0, literal.y,2001; R600-NEXT: LOG_IEEE * T0.Z, PV.Z,2002; R600-NEXT: -4096(nan), 1333788672(4.294967e+09)2003; R600-NEXT: MUL_IEEE T2.Y, KC0[3].Y, PV.W,2004; R600-NEXT: ADD T2.Z, T0.X, -PV.Z,2005; R600-NEXT: AND_INT T4.W, PS, literal.x,2006; R600-NEXT: ADD * T5.W, T0.Y, -PV.Y,2007; R600-NEXT: -4096(nan), 0(0.000000e+00)2008; R600-NEXT: MUL_IEEE T3.Y, PS, literal.x,2009; R600-NEXT: ADD T3.Z, T0.Z, -PV.W,2010; R600-NEXT: MUL_IEEE T6.W, PV.Z, literal.x,2011; R600-NEXT: LOG_IEEE * T1.X, PV.Y,2012; R600-NEXT: 939916788(3.194618e-05), 0(0.000000e+00)2013; R600-NEXT: MULADD_IEEE T2.Y, T1.Z, literal.x, PV.W,2014; R600-NEXT: MUL_IEEE T4.Z, PV.Z, literal.x,2015; R600-NEXT: AND_INT T6.W, PS, literal.y,2016; R600-NEXT: MULADD_IEEE * T7.W, T1.Y, literal.x, PV.Y, BS:VEC_021/SCL_1222017; R600-NEXT: 939916788(3.194618e-05), -4096(nan)2018; R600-NEXT: MULADD_IEEE T3.Y, T5.W, literal.x, PS,2019; R600-NEXT: ADD T5.Z, T1.X, -PV.W,2020; R600-NEXT: MULADD_IEEE T5.W, T4.W, literal.y, PV.Z, BS:VEC_120/SCL_2122021; R600-NEXT: MULADD_IEEE * T7.W, T2.Z, literal.x, PV.Y, BS:VEC_021/SCL_1222022; R600-NEXT: 1060204544(6.931152e-01), 939916788(3.194618e-05)2023; R600-NEXT: MULADD_IEEE T2.X, T1.Z, literal.x, PS,2024; R600-NEXT: MULADD_IEEE T2.Y, T3.Z, literal.x, PV.W, BS:VEC_120/SCL_2122025; R600-NEXT: MUL_IEEE T1.Z, PV.Z, literal.y,2026; R600-NEXT: MULADD_IEEE T5.W, T1.Y, literal.x, PV.Y,2027; R600-NEXT: SETGT * T7.W, literal.z, |T0.Y|,2028; R600-NEXT: 1060204544(6.931152e-01), 939916788(3.194618e-05)2029; R600-NEXT: 2139095040(INF), 0(0.000000e+00)2030; R600-NEXT: CNDE T3.X, PS, T0.Y, PV.W,2031; R600-NEXT: CNDE T0.Y, T1.W, 0.0, literal.x,2032; R600-NEXT: MULADD_IEEE T1.Z, T6.W, literal.y, PV.Z, BS:VEC_120/SCL_2122033; R600-NEXT: MULADD_IEEE T1.W, T4.W, literal.z, PV.Y, BS:VEC_2012034; R600-NEXT: SETGT * T4.W, literal.w, |T0.Z|,2035; R600-NEXT: 1102148120(2.218071e+01), 939916788(3.194618e-05)2036; R600-NEXT: 1060204544(6.931152e-01), 2139095040(INF)2037; R600-NEXT: SETGT T4.X, literal.x, |T0.X|,2038; R600-NEXT: CNDE T1.Y, PS, T0.Z, PV.W,2039; R600-NEXT: CNDE T0.Z, T2.W, 0.0, literal.y,2040; R600-NEXT: MULADD_IEEE T1.W, T5.Z, literal.z, PV.Z,2041; R600-NEXT: ADD * T2.W, PV.X, -PV.Y,2042; R600-NEXT: 2139095040(INF), 1102148120(2.218071e+01)2043; R600-NEXT: 1060204544(6.931152e-01), 0(0.000000e+00)2044; R600-NEXT: MULADD_IEEE T3.X, T6.W, literal.x, PV.W,2045; R600-NEXT: SETGT T0.Y, literal.y, |T1.X|,2046; R600-NEXT: ADD T2.Z, PV.Y, -PV.Z,2047; R600-NEXT: CNDE T1.W, PV.X, T0.X, T2.X, BS:VEC_120/SCL_2122048; R600-NEXT: CNDE * T0.W, T0.W, 0.0, literal.z,2049; R600-NEXT: 1060204544(6.931152e-01), 2139095040(INF)2050; R600-NEXT: 1102148120(2.218071e+01), 0(0.000000e+00)2051; R600-NEXT: ADD T2.Y, PV.W, -PS,2052; R600-NEXT: CNDE T0.W, PV.Y, T1.X, PV.X,2053; R600-NEXT: CNDE * T1.W, T3.W, 0.0, literal.x,2054; R600-NEXT: 1102148120(2.218071e+01), 0(0.000000e+00)2055; R600-NEXT: ADD T2.X, PV.W, -PS,2056; R600-NEXT: LSHR * T0.X, KC0[2].Y, literal.x,2057; R600-NEXT: 2(2.802597e-45), 0(0.000000e+00)2058;2059; CM-LABEL: s_log_v4f32:2060; CM: ; %bb.0:2061; CM-NEXT: ALU 84, @4, KC0[CB0:0-32], KC1[]2062; CM-NEXT: MEM_RAT_CACHELESS STORE_DWORD T2, T0.X2063; CM-NEXT: CF_END2064; CM-NEXT: PAD2065; CM-NEXT: ALU clause starting at 4:2066; CM-NEXT: SETGT * T0.W, literal.x, KC0[3].Y,2067; CM-NEXT: 8388608(1.175494e-38), 0(0.000000e+00)2068; CM-NEXT: CNDE T0.Y, PV.W, 1.0, literal.x,2069; CM-NEXT: SETGT T0.Z, literal.y, KC0[3].W,2070; CM-NEXT: SETGT * T1.W, literal.y, KC0[4].X,2071; CM-NEXT: 1333788672(4.294967e+09), 8388608(1.175494e-38)2072; CM-NEXT: CNDE T0.X, PV.W, 1.0, literal.x,2073; CM-NEXT: CNDE T1.Y, PV.Z, 1.0, literal.x,2074; CM-NEXT: SETGT T1.Z, literal.y, KC0[3].Z,2075; CM-NEXT: MUL_IEEE * T2.W, KC0[3].Y, PV.Y,2076; CM-NEXT: 1333788672(4.294967e+09), 8388608(1.175494e-38)2077; CM-NEXT: LOG_IEEE T0.X (MASKED), T2.W,2078; CM-NEXT: LOG_IEEE T0.Y, T2.W,2079; CM-NEXT: LOG_IEEE T0.Z (MASKED), T2.W,2080; CM-NEXT: LOG_IEEE * T0.W (MASKED), T2.W,2081; CM-NEXT: CNDE T1.X, T1.Z, 1.0, literal.x,2082; CM-NEXT: AND_INT T2.Y, PV.Y, literal.y,2083; CM-NEXT: MUL_IEEE T2.Z, KC0[3].W, T1.Y,2084; CM-NEXT: MUL_IEEE * T2.W, KC0[4].X, T0.X,2085; CM-NEXT: 1333788672(4.294967e+09), -4096(nan)2086; CM-NEXT: LOG_IEEE T0.X, T2.W,2087; CM-NEXT: LOG_IEEE T0.Y (MASKED), T2.W,2088; CM-NEXT: LOG_IEEE T0.Z (MASKED), T2.W,2089; CM-NEXT: LOG_IEEE * T0.W (MASKED), T2.W,2090; CM-NEXT: LOG_IEEE T1.X (MASKED), T2.Z,2091; CM-NEXT: LOG_IEEE T1.Y, T2.Z,2092; CM-NEXT: LOG_IEEE T1.Z (MASKED), T2.Z,2093; CM-NEXT: LOG_IEEE * T1.W (MASKED), T2.Z,2094; CM-NEXT: ADD T2.X, T0.Y, -T2.Y,2095; CM-NEXT: AND_INT T3.Y, PV.Y, literal.x,2096; CM-NEXT: AND_INT T2.Z, T0.X, literal.x,2097; CM-NEXT: MUL_IEEE * T2.W, KC0[3].Z, T1.X,2098; CM-NEXT: -4096(nan), 0(0.000000e+00)2099; CM-NEXT: LOG_IEEE T1.X, T2.W,2100; CM-NEXT: LOG_IEEE T1.Y (MASKED), T2.W,2101; CM-NEXT: LOG_IEEE T1.Z (MASKED), T2.W,2102; CM-NEXT: LOG_IEEE * T1.W (MASKED), T2.W,2103; CM-NEXT: ADD T3.X, T0.X, -T2.Z,2104; CM-NEXT: ADD T4.Y, T1.Y, -T3.Y,2105; CM-NEXT: AND_INT T3.Z, PV.X, literal.x,2106; CM-NEXT: MUL_IEEE * T2.W, T2.X, literal.y, BS:VEC_120/SCL_2122107; CM-NEXT: -4096(nan), 939916788(3.194618e-05)2108; CM-NEXT: MULADD_IEEE T4.X, T2.Y, literal.x, PV.W,2109; CM-NEXT: ADD T5.Y, T1.X, -PV.Z,2110; CM-NEXT: MUL_IEEE T4.Z, PV.Y, literal.x,2111; CM-NEXT: MUL_IEEE * T2.W, PV.X, literal.x,2112; CM-NEXT: 939916788(3.194618e-05), 0(0.000000e+00)2113; CM-NEXT: MULADD_IEEE T5.X, T2.Z, literal.x, PV.W,2114; CM-NEXT: MULADD_IEEE T6.Y, T3.Y, literal.x, PV.Z,2115; CM-NEXT: MUL_IEEE T4.Z, PV.Y, literal.x,2116; CM-NEXT: MULADD_IEEE * T2.W, T2.X, literal.y, PV.X,2117; CM-NEXT: 939916788(3.194618e-05), 1060204544(6.931152e-01)2118; CM-NEXT: MULADD_IEEE T2.X, T2.Y, literal.x, PV.W,2119; CM-NEXT: MULADD_IEEE T2.Y, T3.Z, literal.y, PV.Z,2120; CM-NEXT: MULADD_IEEE T4.Z, T4.Y, literal.x, PV.Y, BS:VEC_120/SCL_2122121; CM-NEXT: MULADD_IEEE * T2.W, T3.X, literal.x, PV.X,2122; CM-NEXT: 1060204544(6.931152e-01), 939916788(3.194618e-05)2123; CM-NEXT: MULADD_IEEE T3.X, T2.Z, literal.x, PV.W,2124; CM-NEXT: SETGT T4.Y, literal.y, |T0.X|,2125; CM-NEXT: MULADD_IEEE T2.Z, T3.Y, literal.x, PV.Z,2126; CM-NEXT: SETGT * T2.W, literal.y, |T1.Y|,2127; CM-NEXT: 1060204544(6.931152e-01), 2139095040(INF)2128; CM-NEXT: CNDE T4.X, PV.W, T1.Y, PV.Z,2129; CM-NEXT: CNDE T1.Y, PV.Y, T0.X, PV.X,2130; CM-NEXT: CNDE T2.Z, T1.W, 0.0, literal.x,2131; CM-NEXT: MULADD_IEEE * T1.W, T5.Y, literal.y, T2.Y,2132; CM-NEXT: 1102148120(2.218071e+01), 1060204544(6.931152e-01)2133; CM-NEXT: CNDE T0.X, T0.Z, 0.0, literal.x,2134; CM-NEXT: MULADD_IEEE T2.Y, T3.Z, literal.y, PV.W, BS:VEC_120/SCL_2122135; CM-NEXT: SETGT T0.Z, literal.z, |T1.X|,2136; CM-NEXT: ADD * T2.W, PV.Y, -PV.Z,2137; CM-NEXT: 1102148120(2.218071e+01), 1060204544(6.931152e-01)2138; CM-NEXT: 2139095040(INF), 0(0.000000e+00)2139; CM-NEXT: SETGT T3.X, literal.x, |T0.Y|,2140; CM-NEXT: CNDE T1.Y, PV.Z, T1.X, PV.Y,2141; CM-NEXT: ADD T2.Z, T4.X, -PV.X,2142; CM-NEXT: CNDE * T1.W, T1.Z, 0.0, literal.y,2143; CM-NEXT: 2139095040(INF), 1102148120(2.218071e+01)2144; CM-NEXT: ADD T2.Y, PV.Y, -PV.W,2145; CM-NEXT: CNDE T0.Z, PV.X, T0.Y, T2.X,2146; CM-NEXT: CNDE * T0.W, T0.W, 0.0, literal.x,2147; CM-NEXT: 1102148120(2.218071e+01), 0(0.000000e+00)2148; CM-NEXT: ADD * T2.X, PV.Z, -PV.W,2149; CM-NEXT: LSHR * T0.X, KC0[2].Y, literal.x,2150; CM-NEXT: 2(2.802597e-45), 0(0.000000e+00)2151 %result = call <4 x float> @llvm.log.v4f32(<4 x float> %in)2152 store <4 x float> %result, ptr addrspace(1) %out2153 ret void2154}2155 2156define float @v_log_f32(float %in) {2157; SI-SDAG-LABEL: v_log_f32:2158; SI-SDAG: ; %bb.0:2159; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2160; SI-SDAG-NEXT: s_mov_b32 s4, 0x8000002161; SI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02162; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc2163; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v12164; SI-SDAG-NEXT: v_log_f32_e32 v0, v02165; SI-SDAG-NEXT: s_mov_b32 s4, 0x3f3172172166; SI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v02167; SI-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v12168; SI-SDAG-NEXT: s_mov_b32 s4, 0x3377d1cf2169; SI-SDAG-NEXT: v_fma_f32 v2, v0, s4, v22170; SI-SDAG-NEXT: s_mov_b32 s4, 0x7f8000002171; SI-SDAG-NEXT: v_add_f32_e32 v1, v1, v22172; SI-SDAG-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s42173; SI-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]2174; SI-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172182175; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2176; SI-SDAG-NEXT: v_sub_f32_e32 v0, v0, v12177; SI-SDAG-NEXT: s_setpc_b64 s[30:31]2178;2179; SI-GISEL-LABEL: v_log_f32:2180; SI-GISEL: ; %bb.0:2181; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2182; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000002183; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v12184; SI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc2185; SI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v12186; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v12187; SI-GISEL-NEXT: v_log_f32_e32 v0, v02188; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172172189; SI-GISEL-NEXT: v_mov_b32_e32 v3, 0x3377d1cf2190; SI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317217, v02191; SI-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v22192; SI-GISEL-NEXT: v_fma_f32 v1, v0, v3, v12193; SI-GISEL-NEXT: v_add_f32_e32 v1, v2, v12194; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000002195; SI-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v22196; SI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]2197; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172182198; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2199; SI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v12200; SI-GISEL-NEXT: s_setpc_b64 s[30:31]2201;2202; VI-SDAG-LABEL: v_log_f32:2203; VI-SDAG: ; %bb.0:2204; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2205; VI-SDAG-NEXT: s_mov_b32 s4, 0x8000002206; VI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02207; VI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc2208; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, v12209; VI-SDAG-NEXT: v_log_f32_e32 v0, v02210; VI-SDAG-NEXT: s_mov_b32 s4, 0x7f8000002211; VI-SDAG-NEXT: v_and_b32_e32 v1, 0xfffff000, v02212; VI-SDAG-NEXT: v_sub_f32_e32 v2, v0, v12213; VI-SDAG-NEXT: v_mul_f32_e32 v3, 0x3f317000, v22214; VI-SDAG-NEXT: v_mul_f32_e32 v2, 0x3805fdf4, v22215; VI-SDAG-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v12216; VI-SDAG-NEXT: v_add_f32_e32 v2, v4, v22217; VI-SDAG-NEXT: v_add_f32_e32 v2, v3, v22218; VI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317000, v12219; VI-SDAG-NEXT: v_add_f32_e32 v1, v1, v22220; VI-SDAG-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s42221; VI-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]2222; VI-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172182223; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2224; VI-SDAG-NEXT: v_sub_f32_e32 v0, v0, v12225; VI-SDAG-NEXT: s_setpc_b64 s[30:31]2226;2227; VI-GISEL-LABEL: v_log_f32:2228; VI-GISEL: ; %bb.0:2229; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2230; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000002231; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v12232; VI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc2233; VI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v12234; VI-GISEL-NEXT: v_ldexp_f32 v0, v0, v12235; VI-GISEL-NEXT: v_log_f32_e32 v0, v02236; VI-GISEL-NEXT: v_and_b32_e32 v1, 0xfffff000, v02237; VI-GISEL-NEXT: v_sub_f32_e32 v2, v0, v12238; VI-GISEL-NEXT: v_mul_f32_e32 v3, 0x3805fdf4, v12239; VI-GISEL-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v22240; VI-GISEL-NEXT: v_add_f32_e32 v3, v3, v42241; VI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317000, v22242; VI-GISEL-NEXT: v_add_f32_e32 v2, v2, v32243; VI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317000, v12244; VI-GISEL-NEXT: v_add_f32_e32 v1, v1, v22245; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000002246; VI-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v22247; VI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]2248; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172182249; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2250; VI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v12251; VI-GISEL-NEXT: s_setpc_b64 s[30:31]2252;2253; GFX900-SDAG-LABEL: v_log_f32:2254; GFX900-SDAG: ; %bb.0:2255; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2256; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x8000002257; GFX900-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02258; GFX900-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc2259; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, v12260; GFX900-SDAG-NEXT: v_log_f32_e32 v0, v02261; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3f3172172262; GFX900-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v02263; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v12264; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3377d1cf2265; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s4, v22266; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x7f8000002267; GFX900-SDAG-NEXT: v_add_f32_e32 v1, v1, v22268; GFX900-SDAG-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s42269; GFX900-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]2270; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172182271; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2272; GFX900-SDAG-NEXT: v_sub_f32_e32 v0, v0, v12273; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]2274;2275; GFX900-GISEL-LABEL: v_log_f32:2276; GFX900-GISEL: ; %bb.0:2277; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2278; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000002279; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v12280; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc2281; GFX900-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v12282; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v12283; GFX900-GISEL-NEXT: v_log_f32_e32 v0, v02284; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172172285; GFX900-GISEL-NEXT: v_mov_b32_e32 v3, 0x3377d1cf2286; GFX900-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317217, v02287; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v22288; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v3, v12289; GFX900-GISEL-NEXT: v_add_f32_e32 v1, v2, v12290; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000002291; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v22292; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]2293; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172182294; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2295; GFX900-GISEL-NEXT: v_sub_f32_e32 v0, v0, v12296; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]2297;2298; GFX1100-SDAG-LABEL: v_log_f32:2299; GFX1100-SDAG: ; %bb.0:2300; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2301; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v02302; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc_lo2303; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2304; GFX1100-SDAG-NEXT: v_ldexp_f32 v0, v0, v12305; GFX1100-SDAG-NEXT: v_log_f32_e32 v0, v02306; GFX1100-SDAG-NEXT: s_waitcnt_depctr depctr_va_vdst(0)2307; GFX1100-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v02308; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|2309; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)2310; GFX1100-SDAG-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v12311; GFX1100-SDAG-NEXT: v_fmamk_f32 v2, v0, 0x3377d1cf, v22312; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2313; GFX1100-SDAG-NEXT: v_add_f32_e32 v1, v1, v22314; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s02315; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo2316; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)2317; GFX1100-SDAG-NEXT: v_sub_f32_e32 v0, v0, v12318; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]2319;2320; GFX1100-GISEL-LABEL: v_log_f32:2321; GFX1100-GISEL: ; %bb.0:2322; GFX1100-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2323; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v02324; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo2325; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2326; GFX1100-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v12327; GFX1100-GISEL-NEXT: v_ldexp_f32 v0, v0, v12328; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)2329; GFX1100-GISEL-NEXT: v_log_f32_e32 v0, v02330; GFX1100-GISEL-NEXT: s_waitcnt_depctr depctr_va_vdst(0)2331; GFX1100-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317217, v02332; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|2333; GFX1100-GISEL-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v12334; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2335; GFX1100-GISEL-NEXT: v_fmac_f32_e32 v2, 0x3377d1cf, v02336; GFX1100-GISEL-NEXT: v_add_f32_e32 v1, v1, v22337; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)2338; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s02339; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo2340; GFX1100-GISEL-NEXT: v_sub_f32_e32 v0, v0, v12341; GFX1100-GISEL-NEXT: s_setpc_b64 s[30:31]2342;2343; R600-LABEL: v_log_f32:2344; R600: ; %bb.0:2345; R600-NEXT: CF_END2346; R600-NEXT: PAD2347;2348; CM-LABEL: v_log_f32:2349; CM: ; %bb.0:2350; CM-NEXT: CF_END2351; CM-NEXT: PAD2352 %result = call float @llvm.log.f32(float %in)2353 ret float %result2354}2355 2356define float @v_log_fabs_f32(float %in) {2357; SI-SDAG-LABEL: v_log_fabs_f32:2358; SI-SDAG: ; %bb.0:2359; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2360; SI-SDAG-NEXT: s_mov_b32 s4, 0x8000002361; SI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s42362; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc2363; SI-SDAG-NEXT: v_ldexp_f32_e64 v0, |v0|, v12364; SI-SDAG-NEXT: v_log_f32_e32 v0, v02365; SI-SDAG-NEXT: s_mov_b32 s4, 0x3f3172172366; SI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v02367; SI-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v12368; SI-SDAG-NEXT: s_mov_b32 s4, 0x3377d1cf2369; SI-SDAG-NEXT: v_fma_f32 v2, v0, s4, v22370; SI-SDAG-NEXT: s_mov_b32 s4, 0x7f8000002371; SI-SDAG-NEXT: v_add_f32_e32 v1, v1, v22372; SI-SDAG-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s42373; SI-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]2374; SI-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172182375; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2376; SI-SDAG-NEXT: v_sub_f32_e32 v0, v0, v12377; SI-SDAG-NEXT: s_setpc_b64 s[30:31]2378;2379; SI-GISEL-LABEL: v_log_fabs_f32:2380; SI-GISEL: ; %bb.0:2381; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2382; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000002383; SI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v12384; SI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc2385; SI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v12386; SI-GISEL-NEXT: v_ldexp_f32_e64 v0, |v0|, v12387; SI-GISEL-NEXT: v_log_f32_e32 v0, v02388; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172172389; SI-GISEL-NEXT: v_mov_b32_e32 v3, 0x3377d1cf2390; SI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317217, v02391; SI-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v22392; SI-GISEL-NEXT: v_fma_f32 v1, v0, v3, v12393; SI-GISEL-NEXT: v_add_f32_e32 v1, v2, v12394; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000002395; SI-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v22396; SI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]2397; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172182398; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2399; SI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v12400; SI-GISEL-NEXT: s_setpc_b64 s[30:31]2401;2402; VI-SDAG-LABEL: v_log_fabs_f32:2403; VI-SDAG: ; %bb.0:2404; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2405; VI-SDAG-NEXT: s_mov_b32 s4, 0x8000002406; VI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s42407; VI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc2408; VI-SDAG-NEXT: v_ldexp_f32 v0, |v0|, v12409; VI-SDAG-NEXT: v_log_f32_e32 v0, v02410; VI-SDAG-NEXT: s_mov_b32 s4, 0x7f8000002411; VI-SDAG-NEXT: v_and_b32_e32 v1, 0xfffff000, v02412; VI-SDAG-NEXT: v_sub_f32_e32 v2, v0, v12413; VI-SDAG-NEXT: v_mul_f32_e32 v3, 0x3f317000, v22414; VI-SDAG-NEXT: v_mul_f32_e32 v2, 0x3805fdf4, v22415; VI-SDAG-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v12416; VI-SDAG-NEXT: v_add_f32_e32 v2, v4, v22417; VI-SDAG-NEXT: v_add_f32_e32 v2, v3, v22418; VI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317000, v12419; VI-SDAG-NEXT: v_add_f32_e32 v1, v1, v22420; VI-SDAG-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s42421; VI-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]2422; VI-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172182423; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2424; VI-SDAG-NEXT: v_sub_f32_e32 v0, v0, v12425; VI-SDAG-NEXT: s_setpc_b64 s[30:31]2426;2427; VI-GISEL-LABEL: v_log_fabs_f32:2428; VI-GISEL: ; %bb.0:2429; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2430; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000002431; VI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v12432; VI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc2433; VI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v12434; VI-GISEL-NEXT: v_ldexp_f32 v0, |v0|, v12435; VI-GISEL-NEXT: v_log_f32_e32 v0, v02436; VI-GISEL-NEXT: v_and_b32_e32 v1, 0xfffff000, v02437; VI-GISEL-NEXT: v_sub_f32_e32 v2, v0, v12438; VI-GISEL-NEXT: v_mul_f32_e32 v3, 0x3805fdf4, v12439; VI-GISEL-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v22440; VI-GISEL-NEXT: v_add_f32_e32 v3, v3, v42441; VI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317000, v22442; VI-GISEL-NEXT: v_add_f32_e32 v2, v2, v32443; VI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317000, v12444; VI-GISEL-NEXT: v_add_f32_e32 v1, v1, v22445; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000002446; VI-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v22447; VI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]2448; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172182449; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2450; VI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v12451; VI-GISEL-NEXT: s_setpc_b64 s[30:31]2452;2453; GFX900-SDAG-LABEL: v_log_fabs_f32:2454; GFX900-SDAG: ; %bb.0:2455; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2456; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x8000002457; GFX900-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s42458; GFX900-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc2459; GFX900-SDAG-NEXT: v_ldexp_f32 v0, |v0|, v12460; GFX900-SDAG-NEXT: v_log_f32_e32 v0, v02461; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3f3172172462; GFX900-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v02463; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v12464; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3377d1cf2465; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s4, v22466; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x7f8000002467; GFX900-SDAG-NEXT: v_add_f32_e32 v1, v1, v22468; GFX900-SDAG-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s42469; GFX900-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]2470; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172182471; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2472; GFX900-SDAG-NEXT: v_sub_f32_e32 v0, v0, v12473; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]2474;2475; GFX900-GISEL-LABEL: v_log_fabs_f32:2476; GFX900-GISEL: ; %bb.0:2477; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2478; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000002479; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v12480; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc2481; GFX900-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v12482; GFX900-GISEL-NEXT: v_ldexp_f32 v0, |v0|, v12483; GFX900-GISEL-NEXT: v_log_f32_e32 v0, v02484; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172172485; GFX900-GISEL-NEXT: v_mov_b32_e32 v3, 0x3377d1cf2486; GFX900-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317217, v02487; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v22488; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v3, v12489; GFX900-GISEL-NEXT: v_add_f32_e32 v1, v2, v12490; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000002491; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v22492; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]2493; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172182494; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2495; GFX900-GISEL-NEXT: v_sub_f32_e32 v0, v0, v12496; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]2497;2498; GFX1100-SDAG-LABEL: v_log_fabs_f32:2499; GFX1100-SDAG: ; %bb.0:2500; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2501; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 s0, 0x800000, |v0|2502; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2503; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, s02504; GFX1100-SDAG-NEXT: v_ldexp_f32 v0, |v0|, v12505; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)2506; GFX1100-SDAG-NEXT: v_log_f32_e32 v0, v02507; GFX1100-SDAG-NEXT: s_waitcnt_depctr depctr_va_vdst(0)2508; GFX1100-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v02509; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|2510; GFX1100-SDAG-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v12511; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2512; GFX1100-SDAG-NEXT: v_fmamk_f32 v2, v0, 0x3377d1cf, v22513; GFX1100-SDAG-NEXT: v_add_f32_e32 v1, v1, v22514; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)2515; GFX1100-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo2516; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 0x41b17218, s02517; GFX1100-SDAG-NEXT: v_sub_f32_e32 v0, v0, v12518; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]2519;2520; GFX1100-GISEL-LABEL: v_log_fabs_f32:2521; GFX1100-GISEL: ; %bb.0:2522; GFX1100-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2523; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 s0, 0x800000, |v0|2524; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2525; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, s02526; GFX1100-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v12527; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2528; GFX1100-GISEL-NEXT: v_ldexp_f32 v0, |v0|, v12529; GFX1100-GISEL-NEXT: v_log_f32_e32 v0, v02530; GFX1100-GISEL-NEXT: s_waitcnt_depctr depctr_va_vdst(0)2531; GFX1100-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317217, v02532; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|2533; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)2534; GFX1100-GISEL-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v12535; GFX1100-GISEL-NEXT: v_fmac_f32_e32 v2, 0x3377d1cf, v02536; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2537; GFX1100-GISEL-NEXT: v_add_f32_e32 v1, v1, v22538; GFX1100-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo2539; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 0x41b17218, s02540; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)2541; GFX1100-GISEL-NEXT: v_sub_f32_e32 v0, v0, v12542; GFX1100-GISEL-NEXT: s_setpc_b64 s[30:31]2543;2544; R600-LABEL: v_log_fabs_f32:2545; R600: ; %bb.0:2546; R600-NEXT: CF_END2547; R600-NEXT: PAD2548;2549; CM-LABEL: v_log_fabs_f32:2550; CM: ; %bb.0:2551; CM-NEXT: CF_END2552; CM-NEXT: PAD2553 %fabs = call float @llvm.fabs.f32(float %in)2554 %result = call float @llvm.log.f32(float %fabs)2555 ret float %result2556}2557 2558define float @v_log_fneg_fabs_f32(float %in) {2559; SI-SDAG-LABEL: v_log_fneg_fabs_f32:2560; SI-SDAG: ; %bb.0:2561; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2562; SI-SDAG-NEXT: s_mov_b32 s4, 0x808000002563; SI-SDAG-NEXT: v_cmp_gt_f32_e64 vcc, |v0|, s42564; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc2565; SI-SDAG-NEXT: v_ldexp_f32_e64 v0, -|v0|, v12566; SI-SDAG-NEXT: v_log_f32_e32 v0, v02567; SI-SDAG-NEXT: s_mov_b32 s4, 0x3f3172172568; SI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v02569; SI-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v12570; SI-SDAG-NEXT: s_mov_b32 s4, 0x3377d1cf2571; SI-SDAG-NEXT: v_fma_f32 v2, v0, s4, v22572; SI-SDAG-NEXT: s_mov_b32 s4, 0x7f8000002573; SI-SDAG-NEXT: v_add_f32_e32 v1, v1, v22574; SI-SDAG-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s42575; SI-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]2576; SI-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172182577; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2578; SI-SDAG-NEXT: v_sub_f32_e32 v0, v0, v12579; SI-SDAG-NEXT: s_setpc_b64 s[30:31]2580;2581; SI-GISEL-LABEL: v_log_fneg_fabs_f32:2582; SI-GISEL: ; %bb.0:2583; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2584; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000002585; SI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, -|v0|, v12586; SI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc2587; SI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v12588; SI-GISEL-NEXT: v_ldexp_f32_e64 v0, -|v0|, v12589; SI-GISEL-NEXT: v_log_f32_e32 v0, v02590; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172172591; SI-GISEL-NEXT: v_mov_b32_e32 v3, 0x3377d1cf2592; SI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317217, v02593; SI-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v22594; SI-GISEL-NEXT: v_fma_f32 v1, v0, v3, v12595; SI-GISEL-NEXT: v_add_f32_e32 v1, v2, v12596; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000002597; SI-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v22598; SI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]2599; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172182600; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2601; SI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v12602; SI-GISEL-NEXT: s_setpc_b64 s[30:31]2603;2604; VI-SDAG-LABEL: v_log_fneg_fabs_f32:2605; VI-SDAG: ; %bb.0:2606; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2607; VI-SDAG-NEXT: s_mov_b32 s4, 0x808000002608; VI-SDAG-NEXT: v_cmp_gt_f32_e64 vcc, |v0|, s42609; VI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc2610; VI-SDAG-NEXT: v_ldexp_f32 v0, -|v0|, v12611; VI-SDAG-NEXT: v_log_f32_e32 v0, v02612; VI-SDAG-NEXT: s_mov_b32 s4, 0x7f8000002613; VI-SDAG-NEXT: v_and_b32_e32 v1, 0xfffff000, v02614; VI-SDAG-NEXT: v_sub_f32_e32 v2, v0, v12615; VI-SDAG-NEXT: v_mul_f32_e32 v3, 0x3f317000, v22616; VI-SDAG-NEXT: v_mul_f32_e32 v2, 0x3805fdf4, v22617; VI-SDAG-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v12618; VI-SDAG-NEXT: v_add_f32_e32 v2, v4, v22619; VI-SDAG-NEXT: v_add_f32_e32 v2, v3, v22620; VI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317000, v12621; VI-SDAG-NEXT: v_add_f32_e32 v1, v1, v22622; VI-SDAG-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s42623; VI-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]2624; VI-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172182625; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2626; VI-SDAG-NEXT: v_sub_f32_e32 v0, v0, v12627; VI-SDAG-NEXT: s_setpc_b64 s[30:31]2628;2629; VI-GISEL-LABEL: v_log_fneg_fabs_f32:2630; VI-GISEL: ; %bb.0:2631; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2632; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000002633; VI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, -|v0|, v12634; VI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc2635; VI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v12636; VI-GISEL-NEXT: v_ldexp_f32 v0, -|v0|, v12637; VI-GISEL-NEXT: v_log_f32_e32 v0, v02638; VI-GISEL-NEXT: v_and_b32_e32 v1, 0xfffff000, v02639; VI-GISEL-NEXT: v_sub_f32_e32 v2, v0, v12640; VI-GISEL-NEXT: v_mul_f32_e32 v3, 0x3805fdf4, v12641; VI-GISEL-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v22642; VI-GISEL-NEXT: v_add_f32_e32 v3, v3, v42643; VI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317000, v22644; VI-GISEL-NEXT: v_add_f32_e32 v2, v2, v32645; VI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317000, v12646; VI-GISEL-NEXT: v_add_f32_e32 v1, v1, v22647; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000002648; VI-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v22649; VI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]2650; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172182651; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2652; VI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v12653; VI-GISEL-NEXT: s_setpc_b64 s[30:31]2654;2655; GFX900-SDAG-LABEL: v_log_fneg_fabs_f32:2656; GFX900-SDAG: ; %bb.0:2657; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2658; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x808000002659; GFX900-SDAG-NEXT: v_cmp_gt_f32_e64 vcc, |v0|, s42660; GFX900-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc2661; GFX900-SDAG-NEXT: v_ldexp_f32 v0, -|v0|, v12662; GFX900-SDAG-NEXT: v_log_f32_e32 v0, v02663; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3f3172172664; GFX900-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v02665; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v12666; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3377d1cf2667; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s4, v22668; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x7f8000002669; GFX900-SDAG-NEXT: v_add_f32_e32 v1, v1, v22670; GFX900-SDAG-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s42671; GFX900-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]2672; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172182673; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2674; GFX900-SDAG-NEXT: v_sub_f32_e32 v0, v0, v12675; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]2676;2677; GFX900-GISEL-LABEL: v_log_fneg_fabs_f32:2678; GFX900-GISEL: ; %bb.0:2679; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2680; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000002681; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, -|v0|, v12682; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc2683; GFX900-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v12684; GFX900-GISEL-NEXT: v_ldexp_f32 v0, -|v0|, v12685; GFX900-GISEL-NEXT: v_log_f32_e32 v0, v02686; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172172687; GFX900-GISEL-NEXT: v_mov_b32_e32 v3, 0x3377d1cf2688; GFX900-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317217, v02689; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v22690; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v3, v12691; GFX900-GISEL-NEXT: v_add_f32_e32 v1, v2, v12692; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000002693; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v22694; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]2695; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172182696; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2697; GFX900-GISEL-NEXT: v_sub_f32_e32 v0, v0, v12698; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]2699;2700; GFX1100-SDAG-LABEL: v_log_fneg_fabs_f32:2701; GFX1100-SDAG: ; %bb.0:2702; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2703; GFX1100-SDAG-NEXT: v_cmp_lt_f32_e64 s0, 0x80800000, |v0|2704; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2705; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, s02706; GFX1100-SDAG-NEXT: v_ldexp_f32 v0, -|v0|, v12707; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)2708; GFX1100-SDAG-NEXT: v_log_f32_e32 v0, v02709; GFX1100-SDAG-NEXT: s_waitcnt_depctr depctr_va_vdst(0)2710; GFX1100-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v02711; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|2712; GFX1100-SDAG-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v12713; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2714; GFX1100-SDAG-NEXT: v_fmamk_f32 v2, v0, 0x3377d1cf, v22715; GFX1100-SDAG-NEXT: v_add_f32_e32 v1, v1, v22716; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)2717; GFX1100-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo2718; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 0x41b17218, s02719; GFX1100-SDAG-NEXT: v_sub_f32_e32 v0, v0, v12720; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]2721;2722; GFX1100-GISEL-LABEL: v_log_fneg_fabs_f32:2723; GFX1100-GISEL: ; %bb.0:2724; GFX1100-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2725; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 s0, 0x800000, -|v0|2726; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2727; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, s02728; GFX1100-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v12729; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2730; GFX1100-GISEL-NEXT: v_ldexp_f32 v0, -|v0|, v12731; GFX1100-GISEL-NEXT: v_log_f32_e32 v0, v02732; GFX1100-GISEL-NEXT: s_waitcnt_depctr depctr_va_vdst(0)2733; GFX1100-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317217, v02734; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|2735; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)2736; GFX1100-GISEL-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v12737; GFX1100-GISEL-NEXT: v_fmac_f32_e32 v2, 0x3377d1cf, v02738; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2739; GFX1100-GISEL-NEXT: v_add_f32_e32 v1, v1, v22740; GFX1100-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo2741; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 0x41b17218, s02742; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)2743; GFX1100-GISEL-NEXT: v_sub_f32_e32 v0, v0, v12744; GFX1100-GISEL-NEXT: s_setpc_b64 s[30:31]2745;2746; R600-LABEL: v_log_fneg_fabs_f32:2747; R600: ; %bb.0:2748; R600-NEXT: CF_END2749; R600-NEXT: PAD2750;2751; CM-LABEL: v_log_fneg_fabs_f32:2752; CM: ; %bb.0:2753; CM-NEXT: CF_END2754; CM-NEXT: PAD2755 %fabs = call float @llvm.fabs.f32(float %in)2756 %fneg.fabs = fneg float %fabs2757 %result = call float @llvm.log.f32(float %fneg.fabs)2758 ret float %result2759}2760 2761define float @v_log_fneg_f32(float %in) {2762; SI-SDAG-LABEL: v_log_fneg_f32:2763; SI-SDAG: ; %bb.0:2764; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2765; SI-SDAG-NEXT: s_mov_b32 s4, 0x808000002766; SI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s4, v02767; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc2768; SI-SDAG-NEXT: v_ldexp_f32_e64 v0, -v0, v12769; SI-SDAG-NEXT: v_log_f32_e32 v0, v02770; SI-SDAG-NEXT: s_mov_b32 s4, 0x3f3172172771; SI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v02772; SI-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v12773; SI-SDAG-NEXT: s_mov_b32 s4, 0x3377d1cf2774; SI-SDAG-NEXT: v_fma_f32 v2, v0, s4, v22775; SI-SDAG-NEXT: s_mov_b32 s4, 0x7f8000002776; SI-SDAG-NEXT: v_add_f32_e32 v1, v1, v22777; SI-SDAG-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s42778; SI-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]2779; SI-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172182780; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2781; SI-SDAG-NEXT: v_sub_f32_e32 v0, v0, v12782; SI-SDAG-NEXT: s_setpc_b64 s[30:31]2783;2784; SI-GISEL-LABEL: v_log_fneg_f32:2785; SI-GISEL: ; %bb.0:2786; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2787; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000002788; SI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, -v0, v12789; SI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc2790; SI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v12791; SI-GISEL-NEXT: v_ldexp_f32_e64 v0, -v0, v12792; SI-GISEL-NEXT: v_log_f32_e32 v0, v02793; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172172794; SI-GISEL-NEXT: v_mov_b32_e32 v3, 0x3377d1cf2795; SI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317217, v02796; SI-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v22797; SI-GISEL-NEXT: v_fma_f32 v1, v0, v3, v12798; SI-GISEL-NEXT: v_add_f32_e32 v1, v2, v12799; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000002800; SI-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v22801; SI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]2802; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172182803; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2804; SI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v12805; SI-GISEL-NEXT: s_setpc_b64 s[30:31]2806;2807; VI-SDAG-LABEL: v_log_fneg_f32:2808; VI-SDAG: ; %bb.0:2809; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2810; VI-SDAG-NEXT: s_mov_b32 s4, 0x808000002811; VI-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s4, v02812; VI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc2813; VI-SDAG-NEXT: v_ldexp_f32 v0, -v0, v12814; VI-SDAG-NEXT: v_log_f32_e32 v0, v02815; VI-SDAG-NEXT: s_mov_b32 s4, 0x7f8000002816; VI-SDAG-NEXT: v_and_b32_e32 v1, 0xfffff000, v02817; VI-SDAG-NEXT: v_sub_f32_e32 v2, v0, v12818; VI-SDAG-NEXT: v_mul_f32_e32 v3, 0x3f317000, v22819; VI-SDAG-NEXT: v_mul_f32_e32 v2, 0x3805fdf4, v22820; VI-SDAG-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v12821; VI-SDAG-NEXT: v_add_f32_e32 v2, v4, v22822; VI-SDAG-NEXT: v_add_f32_e32 v2, v3, v22823; VI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317000, v12824; VI-SDAG-NEXT: v_add_f32_e32 v1, v1, v22825; VI-SDAG-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s42826; VI-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]2827; VI-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172182828; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2829; VI-SDAG-NEXT: v_sub_f32_e32 v0, v0, v12830; VI-SDAG-NEXT: s_setpc_b64 s[30:31]2831;2832; VI-GISEL-LABEL: v_log_fneg_f32:2833; VI-GISEL: ; %bb.0:2834; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2835; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000002836; VI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, -v0, v12837; VI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc2838; VI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v12839; VI-GISEL-NEXT: v_ldexp_f32 v0, -v0, v12840; VI-GISEL-NEXT: v_log_f32_e32 v0, v02841; VI-GISEL-NEXT: v_and_b32_e32 v1, 0xfffff000, v02842; VI-GISEL-NEXT: v_sub_f32_e32 v2, v0, v12843; VI-GISEL-NEXT: v_mul_f32_e32 v3, 0x3805fdf4, v12844; VI-GISEL-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v22845; VI-GISEL-NEXT: v_add_f32_e32 v3, v3, v42846; VI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317000, v22847; VI-GISEL-NEXT: v_add_f32_e32 v2, v2, v32848; VI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317000, v12849; VI-GISEL-NEXT: v_add_f32_e32 v1, v1, v22850; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000002851; VI-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v22852; VI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]2853; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172182854; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2855; VI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v12856; VI-GISEL-NEXT: s_setpc_b64 s[30:31]2857;2858; GFX900-SDAG-LABEL: v_log_fneg_f32:2859; GFX900-SDAG: ; %bb.0:2860; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2861; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x808000002862; GFX900-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, s4, v02863; GFX900-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc2864; GFX900-SDAG-NEXT: v_ldexp_f32 v0, -v0, v12865; GFX900-SDAG-NEXT: v_log_f32_e32 v0, v02866; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3f3172172867; GFX900-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v02868; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v12869; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3377d1cf2870; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s4, v22871; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x7f8000002872; GFX900-SDAG-NEXT: v_add_f32_e32 v1, v1, v22873; GFX900-SDAG-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s42874; GFX900-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]2875; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172182876; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2877; GFX900-SDAG-NEXT: v_sub_f32_e32 v0, v0, v12878; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]2879;2880; GFX900-GISEL-LABEL: v_log_fneg_f32:2881; GFX900-GISEL: ; %bb.0:2882; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2883; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000002884; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, -v0, v12885; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc2886; GFX900-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v12887; GFX900-GISEL-NEXT: v_ldexp_f32 v0, -v0, v12888; GFX900-GISEL-NEXT: v_log_f32_e32 v0, v02889; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172172890; GFX900-GISEL-NEXT: v_mov_b32_e32 v3, 0x3377d1cf2891; GFX900-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317217, v02892; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v22893; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v3, v12894; GFX900-GISEL-NEXT: v_add_f32_e32 v1, v2, v12895; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000002896; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v22897; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]2898; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172182899; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2900; GFX900-GISEL-NEXT: v_sub_f32_e32 v0, v0, v12901; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]2902;2903; GFX1100-SDAG-LABEL: v_log_fneg_f32:2904; GFX1100-SDAG: ; %bb.0:2905; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2906; GFX1100-SDAG-NEXT: v_cmp_lt_f32_e32 vcc_lo, 0x80800000, v02907; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc_lo2908; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2909; GFX1100-SDAG-NEXT: v_ldexp_f32 v0, -v0, v12910; GFX1100-SDAG-NEXT: v_log_f32_e32 v0, v02911; GFX1100-SDAG-NEXT: s_waitcnt_depctr depctr_va_vdst(0)2912; GFX1100-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v02913; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|2914; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)2915; GFX1100-SDAG-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v12916; GFX1100-SDAG-NEXT: v_fmamk_f32 v2, v0, 0x3377d1cf, v22917; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2918; GFX1100-SDAG-NEXT: v_add_f32_e32 v1, v1, v22919; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s02920; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo2921; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)2922; GFX1100-SDAG-NEXT: v_sub_f32_e32 v0, v0, v12923; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]2924;2925; GFX1100-GISEL-LABEL: v_log_fneg_f32:2926; GFX1100-GISEL: ; %bb.0:2927; GFX1100-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2928; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 s0, 0x800000, -v02929; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2930; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, s02931; GFX1100-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v12932; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2933; GFX1100-GISEL-NEXT: v_ldexp_f32 v0, -v0, v12934; GFX1100-GISEL-NEXT: v_log_f32_e32 v0, v02935; GFX1100-GISEL-NEXT: s_waitcnt_depctr depctr_va_vdst(0)2936; GFX1100-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317217, v02937; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|2938; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)2939; GFX1100-GISEL-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v12940; GFX1100-GISEL-NEXT: v_fmac_f32_e32 v2, 0x3377d1cf, v02941; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2942; GFX1100-GISEL-NEXT: v_add_f32_e32 v1, v1, v22943; GFX1100-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo2944; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 0x41b17218, s02945; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)2946; GFX1100-GISEL-NEXT: v_sub_f32_e32 v0, v0, v12947; GFX1100-GISEL-NEXT: s_setpc_b64 s[30:31]2948;2949; R600-LABEL: v_log_fneg_f32:2950; R600: ; %bb.0:2951; R600-NEXT: CF_END2952; R600-NEXT: PAD2953;2954; CM-LABEL: v_log_fneg_f32:2955; CM: ; %bb.0:2956; CM-NEXT: CF_END2957; CM-NEXT: PAD2958 %fneg = fneg float %in2959 %result = call float @llvm.log.f32(float %fneg)2960 ret float %result2961}2962 2963define float @v_log_f32_fast(float %in) {2964; SI-SDAG-LABEL: v_log_f32_fast:2965; SI-SDAG: ; %bb.0:2966; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2967; SI-SDAG-NEXT: s_mov_b32 s4, 0x8000002968; SI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02969; SI-SDAG-NEXT: v_cndmask_b32_e64 v2, 0, 32, vcc2970; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v22971; SI-SDAG-NEXT: v_log_f32_e32 v0, v02972; SI-SDAG-NEXT: v_mov_b32_e32 v1, 0xc1b172182973; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc2974; SI-SDAG-NEXT: s_mov_b32 s4, 0x3f3172182975; SI-SDAG-NEXT: v_fma_f32 v0, v0, s4, v12976; SI-SDAG-NEXT: s_setpc_b64 s[30:31]2977;2978; SI-GISEL-LABEL: v_log_f32_fast:2979; SI-GISEL: ; %bb.0:2980; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2981; SI-GISEL-NEXT: v_log_f32_e32 v2, v02982; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000002983; SI-GISEL-NEXT: v_mov_b32_e32 v3, 0xc1b172182984; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v12985; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v3, vcc2986; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172182987; SI-GISEL-NEXT: v_fma_f32 v0, v2, v1, v02988; SI-GISEL-NEXT: s_setpc_b64 s[30:31]2989;2990; VI-SDAG-LABEL: v_log_f32_fast:2991; VI-SDAG: ; %bb.0:2992; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2993; VI-SDAG-NEXT: s_mov_b32 s4, 0x8000002994; VI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02995; VI-SDAG-NEXT: v_cndmask_b32_e64 v2, 0, 32, vcc2996; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, v22997; VI-SDAG-NEXT: v_log_f32_e32 v0, v02998; VI-SDAG-NEXT: v_mov_b32_e32 v1, 0xc1b172182999; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3000; VI-SDAG-NEXT: v_mul_f32_e32 v0, 0x3f317218, v03001; VI-SDAG-NEXT: v_add_f32_e32 v0, v0, v13002; VI-SDAG-NEXT: s_setpc_b64 s[30:31]3003;3004; VI-GISEL-LABEL: v_log_f32_fast:3005; VI-GISEL: ; %bb.0:3006; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3007; VI-GISEL-NEXT: v_log_f32_e32 v2, v03008; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000003009; VI-GISEL-NEXT: v_mov_b32_e32 v3, 0xc1b172183010; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13011; VI-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v3, vcc3012; VI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317218, v23013; VI-GISEL-NEXT: v_add_f32_e32 v0, v1, v03014; VI-GISEL-NEXT: s_setpc_b64 s[30:31]3015;3016; GFX900-SDAG-LABEL: v_log_f32_fast:3017; GFX900-SDAG: ; %bb.0:3018; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3019; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x8000003020; GFX900-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03021; GFX900-SDAG-NEXT: v_cndmask_b32_e64 v2, 0, 32, vcc3022; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, v23023; GFX900-SDAG-NEXT: v_log_f32_e32 v0, v03024; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, 0xc1b172183025; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3026; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3f3172183027; GFX900-SDAG-NEXT: v_fma_f32 v0, v0, s4, v13028; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]3029;3030; GFX900-GISEL-LABEL: v_log_f32_fast:3031; GFX900-GISEL: ; %bb.0:3032; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3033; GFX900-GISEL-NEXT: v_log_f32_e32 v2, v03034; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000003035; GFX900-GISEL-NEXT: v_mov_b32_e32 v3, 0xc1b172183036; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13037; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v3, vcc3038; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172183039; GFX900-GISEL-NEXT: v_fma_f32 v0, v2, v1, v03040; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]3041;3042; GFX1100-SDAG-LABEL: v_log_f32_fast:3043; GFX1100-SDAG: ; %bb.0:3044; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3045; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v03046; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v2, 0, 32, vcc_lo3047; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 0xc1b17218, vcc_lo3048; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)3049; GFX1100-SDAG-NEXT: v_ldexp_f32 v0, v0, v23050; GFX1100-SDAG-NEXT: v_log_f32_e32 v0, v03051; GFX1100-SDAG-NEXT: s_waitcnt_depctr depctr_va_vdst(0)3052; GFX1100-SDAG-NEXT: v_fmamk_f32 v0, v0, 0x3f317218, v13053; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]3054;3055; GFX1100-GISEL-LABEL: v_log_f32_fast:3056; GFX1100-GISEL: ; %bb.0:3057; GFX1100-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3058; GFX1100-GISEL-NEXT: v_log_f32_e32 v1, v03059; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v03060; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 0xc1b17218, vcc_lo3061; GFX1100-GISEL-NEXT: s_waitcnt_depctr depctr_va_vdst(0)3062; GFX1100-GISEL-NEXT: v_fmac_f32_e32 v0, 0x3f317218, v13063; GFX1100-GISEL-NEXT: s_setpc_b64 s[30:31]3064;3065; R600-LABEL: v_log_f32_fast:3066; R600: ; %bb.0:3067; R600-NEXT: CF_END3068; R600-NEXT: PAD3069;3070; CM-LABEL: v_log_f32_fast:3071; CM: ; %bb.0:3072; CM-NEXT: CF_END3073; CM-NEXT: PAD3074 %result = call fast float @llvm.log.f32(float %in)3075 ret float %result3076}3077 3078define float @v_log_f32_ninf(float %in) {3079; SI-SDAG-LABEL: v_log_f32_ninf:3080; SI-SDAG: ; %bb.0:3081; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3082; SI-SDAG-NEXT: s_mov_b32 s4, 0x8000003083; SI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03084; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc3085; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v13086; SI-SDAG-NEXT: v_log_f32_e32 v0, v03087; SI-SDAG-NEXT: s_mov_b32 s4, 0x3f3172173088; SI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v03089; SI-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v13090; SI-SDAG-NEXT: s_mov_b32 s4, 0x3377d1cf3091; SI-SDAG-NEXT: v_fma_f32 v2, v0, s4, v23092; SI-SDAG-NEXT: s_mov_b32 s4, 0x7f8000003093; SI-SDAG-NEXT: v_add_f32_e32 v1, v1, v23094; SI-SDAG-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s43095; SI-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]3096; SI-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172183097; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3098; SI-SDAG-NEXT: v_sub_f32_e32 v0, v0, v13099; SI-SDAG-NEXT: s_setpc_b64 s[30:31]3100;3101; SI-GISEL-LABEL: v_log_f32_ninf:3102; SI-GISEL: ; %bb.0:3103; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3104; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000003105; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13106; SI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc3107; SI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v13108; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v13109; SI-GISEL-NEXT: v_log_f32_e32 v0, v03110; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172173111; SI-GISEL-NEXT: v_mov_b32_e32 v3, 0x3377d1cf3112; SI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317217, v03113; SI-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v23114; SI-GISEL-NEXT: v_fma_f32 v1, v0, v3, v13115; SI-GISEL-NEXT: v_add_f32_e32 v1, v2, v13116; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000003117; SI-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v23118; SI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]3119; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172183120; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3121; SI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v13122; SI-GISEL-NEXT: s_setpc_b64 s[30:31]3123;3124; VI-SDAG-LABEL: v_log_f32_ninf:3125; VI-SDAG: ; %bb.0:3126; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3127; VI-SDAG-NEXT: s_mov_b32 s4, 0x8000003128; VI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03129; VI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc3130; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, v13131; VI-SDAG-NEXT: v_log_f32_e32 v0, v03132; VI-SDAG-NEXT: s_mov_b32 s4, 0x7f8000003133; VI-SDAG-NEXT: v_and_b32_e32 v1, 0xfffff000, v03134; VI-SDAG-NEXT: v_sub_f32_e32 v2, v0, v13135; VI-SDAG-NEXT: v_mul_f32_e32 v3, 0x3f317000, v23136; VI-SDAG-NEXT: v_mul_f32_e32 v2, 0x3805fdf4, v23137; VI-SDAG-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v13138; VI-SDAG-NEXT: v_add_f32_e32 v2, v4, v23139; VI-SDAG-NEXT: v_add_f32_e32 v2, v3, v23140; VI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317000, v13141; VI-SDAG-NEXT: v_add_f32_e32 v1, v1, v23142; VI-SDAG-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s43143; VI-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]3144; VI-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172183145; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3146; VI-SDAG-NEXT: v_sub_f32_e32 v0, v0, v13147; VI-SDAG-NEXT: s_setpc_b64 s[30:31]3148;3149; VI-GISEL-LABEL: v_log_f32_ninf:3150; VI-GISEL: ; %bb.0:3151; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3152; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000003153; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13154; VI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc3155; VI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v13156; VI-GISEL-NEXT: v_ldexp_f32 v0, v0, v13157; VI-GISEL-NEXT: v_log_f32_e32 v0, v03158; VI-GISEL-NEXT: v_and_b32_e32 v1, 0xfffff000, v03159; VI-GISEL-NEXT: v_sub_f32_e32 v2, v0, v13160; VI-GISEL-NEXT: v_mul_f32_e32 v3, 0x3805fdf4, v13161; VI-GISEL-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v23162; VI-GISEL-NEXT: v_add_f32_e32 v3, v3, v43163; VI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317000, v23164; VI-GISEL-NEXT: v_add_f32_e32 v2, v2, v33165; VI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317000, v13166; VI-GISEL-NEXT: v_add_f32_e32 v1, v1, v23167; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000003168; VI-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v23169; VI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]3170; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172183171; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3172; VI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v13173; VI-GISEL-NEXT: s_setpc_b64 s[30:31]3174;3175; GFX900-SDAG-LABEL: v_log_f32_ninf:3176; GFX900-SDAG: ; %bb.0:3177; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3178; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x8000003179; GFX900-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03180; GFX900-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc3181; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, v13182; GFX900-SDAG-NEXT: v_log_f32_e32 v0, v03183; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3f3172173184; GFX900-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v03185; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v13186; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3377d1cf3187; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s4, v23188; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x7f8000003189; GFX900-SDAG-NEXT: v_add_f32_e32 v1, v1, v23190; GFX900-SDAG-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s43191; GFX900-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]3192; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172183193; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3194; GFX900-SDAG-NEXT: v_sub_f32_e32 v0, v0, v13195; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]3196;3197; GFX900-GISEL-LABEL: v_log_f32_ninf:3198; GFX900-GISEL: ; %bb.0:3199; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3200; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000003201; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13202; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc3203; GFX900-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v13204; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v13205; GFX900-GISEL-NEXT: v_log_f32_e32 v0, v03206; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172173207; GFX900-GISEL-NEXT: v_mov_b32_e32 v3, 0x3377d1cf3208; GFX900-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317217, v03209; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v23210; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v3, v13211; GFX900-GISEL-NEXT: v_add_f32_e32 v1, v2, v13212; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000003213; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v23214; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]3215; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172183216; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3217; GFX900-GISEL-NEXT: v_sub_f32_e32 v0, v0, v13218; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]3219;3220; GFX1100-SDAG-LABEL: v_log_f32_ninf:3221; GFX1100-SDAG: ; %bb.0:3222; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3223; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v03224; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc_lo3225; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3226; GFX1100-SDAG-NEXT: v_ldexp_f32 v0, v0, v13227; GFX1100-SDAG-NEXT: v_log_f32_e32 v0, v03228; GFX1100-SDAG-NEXT: s_waitcnt_depctr depctr_va_vdst(0)3229; GFX1100-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v03230; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|3231; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)3232; GFX1100-SDAG-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v13233; GFX1100-SDAG-NEXT: v_fmamk_f32 v2, v0, 0x3377d1cf, v23234; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3235; GFX1100-SDAG-NEXT: v_add_f32_e32 v1, v1, v23236; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s03237; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo3238; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)3239; GFX1100-SDAG-NEXT: v_sub_f32_e32 v0, v0, v13240; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]3241;3242; GFX1100-GISEL-LABEL: v_log_f32_ninf:3243; GFX1100-GISEL: ; %bb.0:3244; GFX1100-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3245; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v03246; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo3247; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3248; GFX1100-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v13249; GFX1100-GISEL-NEXT: v_ldexp_f32 v0, v0, v13250; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)3251; GFX1100-GISEL-NEXT: v_log_f32_e32 v0, v03252; GFX1100-GISEL-NEXT: s_waitcnt_depctr depctr_va_vdst(0)3253; GFX1100-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317217, v03254; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|3255; GFX1100-GISEL-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v13256; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3257; GFX1100-GISEL-NEXT: v_fmac_f32_e32 v2, 0x3377d1cf, v03258; GFX1100-GISEL-NEXT: v_add_f32_e32 v1, v1, v23259; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)3260; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s03261; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo3262; GFX1100-GISEL-NEXT: v_sub_f32_e32 v0, v0, v13263; GFX1100-GISEL-NEXT: s_setpc_b64 s[30:31]3264;3265; R600-LABEL: v_log_f32_ninf:3266; R600: ; %bb.0:3267; R600-NEXT: CF_END3268; R600-NEXT: PAD3269;3270; CM-LABEL: v_log_f32_ninf:3271; CM: ; %bb.0:3272; CM-NEXT: CF_END3273; CM-NEXT: PAD3274 %result = call ninf float @llvm.log.f32(float %in)3275 ret float %result3276}3277 3278define float @v_log_f32_afn(float %in) {3279; SI-SDAG-LABEL: v_log_f32_afn:3280; SI-SDAG: ; %bb.0:3281; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3282; SI-SDAG-NEXT: s_mov_b32 s4, 0x8000003283; SI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03284; SI-SDAG-NEXT: v_cndmask_b32_e64 v2, 0, 32, vcc3285; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v23286; SI-SDAG-NEXT: v_log_f32_e32 v0, v03287; SI-SDAG-NEXT: v_mov_b32_e32 v1, 0xc1b172183288; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3289; SI-SDAG-NEXT: s_mov_b32 s4, 0x3f3172183290; SI-SDAG-NEXT: v_fma_f32 v0, v0, s4, v13291; SI-SDAG-NEXT: s_setpc_b64 s[30:31]3292;3293; SI-GISEL-LABEL: v_log_f32_afn:3294; SI-GISEL: ; %bb.0:3295; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3296; SI-GISEL-NEXT: v_log_f32_e32 v2, v03297; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000003298; SI-GISEL-NEXT: v_mov_b32_e32 v3, 0xc1b172183299; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13300; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v3, vcc3301; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172183302; SI-GISEL-NEXT: v_fma_f32 v0, v2, v1, v03303; SI-GISEL-NEXT: s_setpc_b64 s[30:31]3304;3305; VI-SDAG-LABEL: v_log_f32_afn:3306; VI-SDAG: ; %bb.0:3307; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3308; VI-SDAG-NEXT: s_mov_b32 s4, 0x8000003309; VI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03310; VI-SDAG-NEXT: v_cndmask_b32_e64 v2, 0, 32, vcc3311; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, v23312; VI-SDAG-NEXT: v_log_f32_e32 v0, v03313; VI-SDAG-NEXT: v_mov_b32_e32 v1, 0xc1b172183314; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3315; VI-SDAG-NEXT: v_mul_f32_e32 v0, 0x3f317218, v03316; VI-SDAG-NEXT: v_add_f32_e32 v0, v0, v13317; VI-SDAG-NEXT: s_setpc_b64 s[30:31]3318;3319; VI-GISEL-LABEL: v_log_f32_afn:3320; VI-GISEL: ; %bb.0:3321; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3322; VI-GISEL-NEXT: v_log_f32_e32 v2, v03323; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000003324; VI-GISEL-NEXT: v_mov_b32_e32 v3, 0xc1b172183325; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13326; VI-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v3, vcc3327; VI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317218, v23328; VI-GISEL-NEXT: v_add_f32_e32 v0, v1, v03329; VI-GISEL-NEXT: s_setpc_b64 s[30:31]3330;3331; GFX900-SDAG-LABEL: v_log_f32_afn:3332; GFX900-SDAG: ; %bb.0:3333; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3334; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x8000003335; GFX900-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03336; GFX900-SDAG-NEXT: v_cndmask_b32_e64 v2, 0, 32, vcc3337; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, v23338; GFX900-SDAG-NEXT: v_log_f32_e32 v0, v03339; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, 0xc1b172183340; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3341; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3f3172183342; GFX900-SDAG-NEXT: v_fma_f32 v0, v0, s4, v13343; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]3344;3345; GFX900-GISEL-LABEL: v_log_f32_afn:3346; GFX900-GISEL: ; %bb.0:3347; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3348; GFX900-GISEL-NEXT: v_log_f32_e32 v2, v03349; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000003350; GFX900-GISEL-NEXT: v_mov_b32_e32 v3, 0xc1b172183351; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13352; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v3, vcc3353; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172183354; GFX900-GISEL-NEXT: v_fma_f32 v0, v2, v1, v03355; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]3356;3357; GFX1100-SDAG-LABEL: v_log_f32_afn:3358; GFX1100-SDAG: ; %bb.0:3359; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3360; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v03361; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v2, 0, 32, vcc_lo3362; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 0xc1b17218, vcc_lo3363; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)3364; GFX1100-SDAG-NEXT: v_ldexp_f32 v0, v0, v23365; GFX1100-SDAG-NEXT: v_log_f32_e32 v0, v03366; GFX1100-SDAG-NEXT: s_waitcnt_depctr depctr_va_vdst(0)3367; GFX1100-SDAG-NEXT: v_fmamk_f32 v0, v0, 0x3f317218, v13368; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]3369;3370; GFX1100-GISEL-LABEL: v_log_f32_afn:3371; GFX1100-GISEL: ; %bb.0:3372; GFX1100-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3373; GFX1100-GISEL-NEXT: v_log_f32_e32 v1, v03374; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v03375; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 0xc1b17218, vcc_lo3376; GFX1100-GISEL-NEXT: s_waitcnt_depctr depctr_va_vdst(0)3377; GFX1100-GISEL-NEXT: v_fmac_f32_e32 v0, 0x3f317218, v13378; GFX1100-GISEL-NEXT: s_setpc_b64 s[30:31]3379;3380; R600-LABEL: v_log_f32_afn:3381; R600: ; %bb.0:3382; R600-NEXT: CF_END3383; R600-NEXT: PAD3384;3385; CM-LABEL: v_log_f32_afn:3386; CM: ; %bb.0:3387; CM-NEXT: CF_END3388; CM-NEXT: PAD3389 %result = call afn float @llvm.log.f32(float %in)3390 ret float %result3391}3392 3393define float @v_log_f32_afn_daz(float %in) #0 {3394; GFX689-LABEL: v_log_f32_afn_daz:3395; GFX689: ; %bb.0:3396; GFX689-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3397; GFX689-NEXT: v_log_f32_e32 v0, v03398; GFX689-NEXT: v_mul_f32_e32 v0, 0x3f317218, v03399; GFX689-NEXT: s_setpc_b64 s[30:31]3400;3401; GFX1100-LABEL: v_log_f32_afn_daz:3402; GFX1100: ; %bb.0:3403; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3404; GFX1100-NEXT: v_log_f32_e32 v0, v03405; GFX1100-NEXT: s_waitcnt_depctr depctr_va_vdst(0)3406; GFX1100-NEXT: v_mul_f32_e32 v0, 0x3f317218, v03407; GFX1100-NEXT: s_setpc_b64 s[30:31]3408;3409; R600-LABEL: v_log_f32_afn_daz:3410; R600: ; %bb.0:3411; R600-NEXT: CF_END3412; R600-NEXT: PAD3413;3414; CM-LABEL: v_log_f32_afn_daz:3415; CM: ; %bb.0:3416; CM-NEXT: CF_END3417; CM-NEXT: PAD3418 %result = call afn float @llvm.log.f32(float %in)3419 ret float %result3420}3421 3422define float @v_log_f32_afn_dynamic(float %in) #1 {3423; SI-SDAG-LABEL: v_log_f32_afn_dynamic:3424; SI-SDAG: ; %bb.0:3425; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3426; SI-SDAG-NEXT: s_mov_b32 s4, 0x8000003427; SI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03428; SI-SDAG-NEXT: v_cndmask_b32_e64 v2, 0, 32, vcc3429; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v23430; SI-SDAG-NEXT: v_log_f32_e32 v0, v03431; SI-SDAG-NEXT: v_mov_b32_e32 v1, 0xc1b172183432; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3433; SI-SDAG-NEXT: s_mov_b32 s4, 0x3f3172183434; SI-SDAG-NEXT: v_fma_f32 v0, v0, s4, v13435; SI-SDAG-NEXT: s_setpc_b64 s[30:31]3436;3437; SI-GISEL-LABEL: v_log_f32_afn_dynamic:3438; SI-GISEL: ; %bb.0:3439; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3440; SI-GISEL-NEXT: v_log_f32_e32 v2, v03441; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000003442; SI-GISEL-NEXT: v_mov_b32_e32 v3, 0xc1b172183443; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13444; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v3, vcc3445; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172183446; SI-GISEL-NEXT: v_fma_f32 v0, v2, v1, v03447; SI-GISEL-NEXT: s_setpc_b64 s[30:31]3448;3449; VI-SDAG-LABEL: v_log_f32_afn_dynamic:3450; VI-SDAG: ; %bb.0:3451; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3452; VI-SDAG-NEXT: s_mov_b32 s4, 0x8000003453; VI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03454; VI-SDAG-NEXT: v_cndmask_b32_e64 v2, 0, 32, vcc3455; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, v23456; VI-SDAG-NEXT: v_log_f32_e32 v0, v03457; VI-SDAG-NEXT: v_mov_b32_e32 v1, 0xc1b172183458; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3459; VI-SDAG-NEXT: v_mul_f32_e32 v0, 0x3f317218, v03460; VI-SDAG-NEXT: v_add_f32_e32 v0, v0, v13461; VI-SDAG-NEXT: s_setpc_b64 s[30:31]3462;3463; VI-GISEL-LABEL: v_log_f32_afn_dynamic:3464; VI-GISEL: ; %bb.0:3465; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3466; VI-GISEL-NEXT: v_log_f32_e32 v2, v03467; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000003468; VI-GISEL-NEXT: v_mov_b32_e32 v3, 0xc1b172183469; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13470; VI-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v3, vcc3471; VI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317218, v23472; VI-GISEL-NEXT: v_add_f32_e32 v0, v1, v03473; VI-GISEL-NEXT: s_setpc_b64 s[30:31]3474;3475; GFX900-SDAG-LABEL: v_log_f32_afn_dynamic:3476; GFX900-SDAG: ; %bb.0:3477; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3478; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x8000003479; GFX900-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03480; GFX900-SDAG-NEXT: v_cndmask_b32_e64 v2, 0, 32, vcc3481; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, v23482; GFX900-SDAG-NEXT: v_log_f32_e32 v0, v03483; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, 0xc1b172183484; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3485; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3f3172183486; GFX900-SDAG-NEXT: v_fma_f32 v0, v0, s4, v13487; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]3488;3489; GFX900-GISEL-LABEL: v_log_f32_afn_dynamic:3490; GFX900-GISEL: ; %bb.0:3491; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3492; GFX900-GISEL-NEXT: v_log_f32_e32 v2, v03493; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000003494; GFX900-GISEL-NEXT: v_mov_b32_e32 v3, 0xc1b172183495; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13496; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v3, vcc3497; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172183498; GFX900-GISEL-NEXT: v_fma_f32 v0, v2, v1, v03499; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]3500;3501; GFX1100-SDAG-LABEL: v_log_f32_afn_dynamic:3502; GFX1100-SDAG: ; %bb.0:3503; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3504; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v03505; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v2, 0, 32, vcc_lo3506; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 0xc1b17218, vcc_lo3507; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)3508; GFX1100-SDAG-NEXT: v_ldexp_f32 v0, v0, v23509; GFX1100-SDAG-NEXT: v_log_f32_e32 v0, v03510; GFX1100-SDAG-NEXT: s_waitcnt_depctr depctr_va_vdst(0)3511; GFX1100-SDAG-NEXT: v_fmamk_f32 v0, v0, 0x3f317218, v13512; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]3513;3514; GFX1100-GISEL-LABEL: v_log_f32_afn_dynamic:3515; GFX1100-GISEL: ; %bb.0:3516; GFX1100-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3517; GFX1100-GISEL-NEXT: v_log_f32_e32 v1, v03518; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v03519; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 0xc1b17218, vcc_lo3520; GFX1100-GISEL-NEXT: s_waitcnt_depctr depctr_va_vdst(0)3521; GFX1100-GISEL-NEXT: v_fmac_f32_e32 v0, 0x3f317218, v13522; GFX1100-GISEL-NEXT: s_setpc_b64 s[30:31]3523;3524; R600-LABEL: v_log_f32_afn_dynamic:3525; R600: ; %bb.0:3526; R600-NEXT: CF_END3527; R600-NEXT: PAD3528;3529; CM-LABEL: v_log_f32_afn_dynamic:3530; CM: ; %bb.0:3531; CM-NEXT: CF_END3532; CM-NEXT: PAD3533 %result = call afn float @llvm.log.f32(float %in)3534 ret float %result3535}3536 3537define float @v_fabs_log_f32_afn(float %in) {3538; SI-SDAG-LABEL: v_fabs_log_f32_afn:3539; SI-SDAG: ; %bb.0:3540; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3541; SI-SDAG-NEXT: s_mov_b32 s4, 0x8000003542; SI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s43543; SI-SDAG-NEXT: v_cndmask_b32_e64 v2, 0, 32, vcc3544; SI-SDAG-NEXT: v_ldexp_f32_e64 v0, |v0|, v23545; SI-SDAG-NEXT: v_log_f32_e32 v0, v03546; SI-SDAG-NEXT: v_mov_b32_e32 v1, 0xc1b172183547; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3548; SI-SDAG-NEXT: s_mov_b32 s4, 0x3f3172183549; SI-SDAG-NEXT: v_fma_f32 v0, v0, s4, v13550; SI-SDAG-NEXT: s_setpc_b64 s[30:31]3551;3552; SI-GISEL-LABEL: v_fabs_log_f32_afn:3553; SI-GISEL: ; %bb.0:3554; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3555; SI-GISEL-NEXT: v_log_f32_e64 v2, |v0|3556; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000003557; SI-GISEL-NEXT: v_mov_b32_e32 v3, 0xc1b172183558; SI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v13559; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v3, vcc3560; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172183561; SI-GISEL-NEXT: v_fma_f32 v0, v2, v1, v03562; SI-GISEL-NEXT: s_setpc_b64 s[30:31]3563;3564; VI-SDAG-LABEL: v_fabs_log_f32_afn:3565; VI-SDAG: ; %bb.0:3566; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3567; VI-SDAG-NEXT: s_mov_b32 s4, 0x8000003568; VI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s43569; VI-SDAG-NEXT: v_cndmask_b32_e64 v2, 0, 32, vcc3570; VI-SDAG-NEXT: v_ldexp_f32 v0, |v0|, v23571; VI-SDAG-NEXT: v_log_f32_e32 v0, v03572; VI-SDAG-NEXT: v_mov_b32_e32 v1, 0xc1b172183573; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3574; VI-SDAG-NEXT: v_mul_f32_e32 v0, 0x3f317218, v03575; VI-SDAG-NEXT: v_add_f32_e32 v0, v0, v13576; VI-SDAG-NEXT: s_setpc_b64 s[30:31]3577;3578; VI-GISEL-LABEL: v_fabs_log_f32_afn:3579; VI-GISEL: ; %bb.0:3580; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3581; VI-GISEL-NEXT: v_log_f32_e64 v2, |v0|3582; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000003583; VI-GISEL-NEXT: v_mov_b32_e32 v3, 0xc1b172183584; VI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v13585; VI-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v3, vcc3586; VI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317218, v23587; VI-GISEL-NEXT: v_add_f32_e32 v0, v1, v03588; VI-GISEL-NEXT: s_setpc_b64 s[30:31]3589;3590; GFX900-SDAG-LABEL: v_fabs_log_f32_afn:3591; GFX900-SDAG: ; %bb.0:3592; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3593; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x8000003594; GFX900-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s43595; GFX900-SDAG-NEXT: v_cndmask_b32_e64 v2, 0, 32, vcc3596; GFX900-SDAG-NEXT: v_ldexp_f32 v0, |v0|, v23597; GFX900-SDAG-NEXT: v_log_f32_e32 v0, v03598; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, 0xc1b172183599; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3600; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3f3172183601; GFX900-SDAG-NEXT: v_fma_f32 v0, v0, s4, v13602; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]3603;3604; GFX900-GISEL-LABEL: v_fabs_log_f32_afn:3605; GFX900-GISEL: ; %bb.0:3606; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3607; GFX900-GISEL-NEXT: v_log_f32_e64 v2, |v0|3608; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000003609; GFX900-GISEL-NEXT: v_mov_b32_e32 v3, 0xc1b172183610; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v13611; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v3, vcc3612; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172183613; GFX900-GISEL-NEXT: v_fma_f32 v0, v2, v1, v03614; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]3615;3616; GFX1100-SDAG-LABEL: v_fabs_log_f32_afn:3617; GFX1100-SDAG: ; %bb.0:3618; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3619; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 s0, 0x800000, |v0|3620; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)3621; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v2, 0, 32, s03622; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 0xc1b17218, s03623; GFX1100-SDAG-NEXT: v_ldexp_f32 v0, |v0|, v23624; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)3625; GFX1100-SDAG-NEXT: v_log_f32_e32 v0, v03626; GFX1100-SDAG-NEXT: s_waitcnt_depctr depctr_va_vdst(0)3627; GFX1100-SDAG-NEXT: v_fmamk_f32 v0, v0, 0x3f317218, v13628; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]3629;3630; GFX1100-GISEL-LABEL: v_fabs_log_f32_afn:3631; GFX1100-GISEL: ; %bb.0:3632; GFX1100-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3633; GFX1100-GISEL-NEXT: v_log_f32_e64 v1, |v0|3634; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 s0, 0x800000, |v0|3635; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)3636; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 0xc1b17218, s03637; GFX1100-GISEL-NEXT: s_waitcnt_depctr depctr_va_vdst(0)3638; GFX1100-GISEL-NEXT: v_fmac_f32_e32 v0, 0x3f317218, v13639; GFX1100-GISEL-NEXT: s_setpc_b64 s[30:31]3640;3641; R600-LABEL: v_fabs_log_f32_afn:3642; R600: ; %bb.0:3643; R600-NEXT: CF_END3644; R600-NEXT: PAD3645;3646; CM-LABEL: v_fabs_log_f32_afn:3647; CM: ; %bb.0:3648; CM-NEXT: CF_END3649; CM-NEXT: PAD3650 %fabs = call float @llvm.fabs.f32(float %in)3651 %result = call afn float @llvm.log.f32(float %fabs)3652 ret float %result3653}3654 3655define float @v_log_f32_daz(float %in) #0 {3656; SI-SDAG-LABEL: v_log_f32_daz:3657; SI-SDAG: ; %bb.0:3658; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3659; SI-SDAG-NEXT: v_log_f32_e32 v0, v03660; SI-SDAG-NEXT: s_mov_b32 s4, 0x3f3172173661; SI-SDAG-NEXT: s_mov_b32 s5, 0x3377d1cf3662; SI-SDAG-NEXT: s_mov_b32 s6, 0x7f8000003663; SI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v03664; SI-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v13665; SI-SDAG-NEXT: v_fma_f32 v2, v0, s5, v23666; SI-SDAG-NEXT: v_add_f32_e32 v1, v1, v23667; SI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s63668; SI-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc3669; SI-SDAG-NEXT: s_setpc_b64 s[30:31]3670;3671; SI-GISEL-LABEL: v_log_f32_daz:3672; SI-GISEL: ; %bb.0:3673; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3674; SI-GISEL-NEXT: v_log_f32_e32 v0, v03675; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172173676; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x3377d1cf3677; SI-GISEL-NEXT: v_mov_b32_e32 v3, 0x7f8000003678; SI-GISEL-NEXT: v_mul_f32_e32 v4, 0x3f317217, v03679; SI-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v43680; SI-GISEL-NEXT: v_fma_f32 v1, v0, v2, v13681; SI-GISEL-NEXT: v_add_f32_e32 v1, v4, v13682; SI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v33683; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc3684; SI-GISEL-NEXT: s_setpc_b64 s[30:31]3685;3686; VI-SDAG-LABEL: v_log_f32_daz:3687; VI-SDAG: ; %bb.0:3688; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3689; VI-SDAG-NEXT: v_log_f32_e32 v0, v03690; VI-SDAG-NEXT: s_mov_b32 s4, 0x7f8000003691; VI-SDAG-NEXT: v_and_b32_e32 v1, 0xfffff000, v03692; VI-SDAG-NEXT: v_sub_f32_e32 v3, v0, v13693; VI-SDAG-NEXT: v_mul_f32_e32 v2, 0x3805fdf4, v13694; VI-SDAG-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v33695; VI-SDAG-NEXT: v_mul_f32_e32 v3, 0x3f317000, v33696; VI-SDAG-NEXT: v_add_f32_e32 v2, v2, v43697; VI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317000, v13698; VI-SDAG-NEXT: v_add_f32_e32 v2, v3, v23699; VI-SDAG-NEXT: v_add_f32_e32 v1, v1, v23700; VI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s43701; VI-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc3702; VI-SDAG-NEXT: s_setpc_b64 s[30:31]3703;3704; VI-GISEL-LABEL: v_log_f32_daz:3705; VI-GISEL: ; %bb.0:3706; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3707; VI-GISEL-NEXT: v_log_f32_e32 v0, v03708; VI-GISEL-NEXT: v_and_b32_e32 v1, 0xfffff000, v03709; VI-GISEL-NEXT: v_sub_f32_e32 v2, v0, v13710; VI-GISEL-NEXT: v_mul_f32_e32 v3, 0x3805fdf4, v13711; VI-GISEL-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v23712; VI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317000, v23713; VI-GISEL-NEXT: v_add_f32_e32 v3, v3, v43714; VI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317000, v13715; VI-GISEL-NEXT: v_add_f32_e32 v2, v2, v33716; VI-GISEL-NEXT: v_add_f32_e32 v1, v1, v23717; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000003718; VI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v23719; VI-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc3720; VI-GISEL-NEXT: s_setpc_b64 s[30:31]3721;3722; GFX900-SDAG-LABEL: v_log_f32_daz:3723; GFX900-SDAG: ; %bb.0:3724; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3725; GFX900-SDAG-NEXT: v_log_f32_e32 v0, v03726; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3f3172173727; GFX900-SDAG-NEXT: s_mov_b32 s5, 0x3377d1cf3728; GFX900-SDAG-NEXT: s_mov_b32 s6, 0x7f8000003729; GFX900-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v03730; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v13731; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s5, v23732; GFX900-SDAG-NEXT: v_add_f32_e32 v1, v1, v23733; GFX900-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s63734; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc3735; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]3736;3737; GFX900-GISEL-LABEL: v_log_f32_daz:3738; GFX900-GISEL: ; %bb.0:3739; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3740; GFX900-GISEL-NEXT: v_log_f32_e32 v0, v03741; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172173742; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x3377d1cf3743; GFX900-GISEL-NEXT: v_mov_b32_e32 v3, 0x7f8000003744; GFX900-GISEL-NEXT: v_mul_f32_e32 v4, 0x3f317217, v03745; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v43746; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v2, v13747; GFX900-GISEL-NEXT: v_add_f32_e32 v1, v4, v13748; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v33749; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc3750; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]3751;3752; GFX1100-SDAG-LABEL: v_log_f32_daz:3753; GFX1100-SDAG: ; %bb.0:3754; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3755; GFX1100-SDAG-NEXT: v_log_f32_e32 v0, v03756; GFX1100-SDAG-NEXT: s_waitcnt_depctr depctr_va_vdst(0)3757; GFX1100-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v03758; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|3759; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)3760; GFX1100-SDAG-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v13761; GFX1100-SDAG-NEXT: v_fmamk_f32 v2, v0, 0x3377d1cf, v23762; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3763; GFX1100-SDAG-NEXT: v_add_f32_e32 v1, v1, v23764; GFX1100-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo3765; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]3766;3767; GFX1100-GISEL-LABEL: v_log_f32_daz:3768; GFX1100-GISEL: ; %bb.0:3769; GFX1100-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3770; GFX1100-GISEL-NEXT: v_log_f32_e32 v0, v03771; GFX1100-GISEL-NEXT: s_waitcnt_depctr depctr_va_vdst(0)3772; GFX1100-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317217, v03773; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|3774; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)3775; GFX1100-GISEL-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v13776; GFX1100-GISEL-NEXT: v_fmac_f32_e32 v2, 0x3377d1cf, v03777; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3778; GFX1100-GISEL-NEXT: v_add_f32_e32 v1, v1, v23779; GFX1100-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo3780; GFX1100-GISEL-NEXT: s_setpc_b64 s[30:31]3781;3782; R600-LABEL: v_log_f32_daz:3783; R600: ; %bb.0:3784; R600-NEXT: CF_END3785; R600-NEXT: PAD3786;3787; CM-LABEL: v_log_f32_daz:3788; CM: ; %bb.0:3789; CM-NEXT: CF_END3790; CM-NEXT: PAD3791 %result = call float @llvm.log.f32(float %in)3792 ret float %result3793}3794 3795define float @v_log_f32_nnan(float %in) {3796; SI-SDAG-LABEL: v_log_f32_nnan:3797; SI-SDAG: ; %bb.0:3798; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3799; SI-SDAG-NEXT: s_mov_b32 s4, 0x8000003800; SI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03801; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc3802; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v13803; SI-SDAG-NEXT: v_log_f32_e32 v0, v03804; SI-SDAG-NEXT: s_mov_b32 s4, 0x3f3172173805; SI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v03806; SI-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v13807; SI-SDAG-NEXT: s_mov_b32 s4, 0x3377d1cf3808; SI-SDAG-NEXT: v_fma_f32 v2, v0, s4, v23809; SI-SDAG-NEXT: s_mov_b32 s4, 0x7f8000003810; SI-SDAG-NEXT: v_add_f32_e32 v1, v1, v23811; SI-SDAG-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s43812; SI-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]3813; SI-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172183814; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3815; SI-SDAG-NEXT: v_sub_f32_e32 v0, v0, v13816; SI-SDAG-NEXT: s_setpc_b64 s[30:31]3817;3818; SI-GISEL-LABEL: v_log_f32_nnan:3819; SI-GISEL: ; %bb.0:3820; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3821; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000003822; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13823; SI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc3824; SI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v13825; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v13826; SI-GISEL-NEXT: v_log_f32_e32 v0, v03827; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172173828; SI-GISEL-NEXT: v_mov_b32_e32 v3, 0x3377d1cf3829; SI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317217, v03830; SI-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v23831; SI-GISEL-NEXT: v_fma_f32 v1, v0, v3, v13832; SI-GISEL-NEXT: v_add_f32_e32 v1, v2, v13833; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000003834; SI-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v23835; SI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]3836; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172183837; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3838; SI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v13839; SI-GISEL-NEXT: s_setpc_b64 s[30:31]3840;3841; VI-SDAG-LABEL: v_log_f32_nnan:3842; VI-SDAG: ; %bb.0:3843; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3844; VI-SDAG-NEXT: s_mov_b32 s4, 0x8000003845; VI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03846; VI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc3847; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, v13848; VI-SDAG-NEXT: v_log_f32_e32 v0, v03849; VI-SDAG-NEXT: s_mov_b32 s4, 0x7f8000003850; VI-SDAG-NEXT: v_and_b32_e32 v1, 0xfffff000, v03851; VI-SDAG-NEXT: v_sub_f32_e32 v2, v0, v13852; VI-SDAG-NEXT: v_mul_f32_e32 v3, 0x3f317000, v23853; VI-SDAG-NEXT: v_mul_f32_e32 v2, 0x3805fdf4, v23854; VI-SDAG-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v13855; VI-SDAG-NEXT: v_add_f32_e32 v2, v4, v23856; VI-SDAG-NEXT: v_add_f32_e32 v2, v3, v23857; VI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317000, v13858; VI-SDAG-NEXT: v_add_f32_e32 v1, v1, v23859; VI-SDAG-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s43860; VI-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]3861; VI-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172183862; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3863; VI-SDAG-NEXT: v_sub_f32_e32 v0, v0, v13864; VI-SDAG-NEXT: s_setpc_b64 s[30:31]3865;3866; VI-GISEL-LABEL: v_log_f32_nnan:3867; VI-GISEL: ; %bb.0:3868; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3869; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000003870; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13871; VI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc3872; VI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v13873; VI-GISEL-NEXT: v_ldexp_f32 v0, v0, v13874; VI-GISEL-NEXT: v_log_f32_e32 v0, v03875; VI-GISEL-NEXT: v_and_b32_e32 v1, 0xfffff000, v03876; VI-GISEL-NEXT: v_sub_f32_e32 v2, v0, v13877; VI-GISEL-NEXT: v_mul_f32_e32 v3, 0x3805fdf4, v13878; VI-GISEL-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v23879; VI-GISEL-NEXT: v_add_f32_e32 v3, v3, v43880; VI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317000, v23881; VI-GISEL-NEXT: v_add_f32_e32 v2, v2, v33882; VI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317000, v13883; VI-GISEL-NEXT: v_add_f32_e32 v1, v1, v23884; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000003885; VI-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v23886; VI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]3887; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172183888; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3889; VI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v13890; VI-GISEL-NEXT: s_setpc_b64 s[30:31]3891;3892; GFX900-SDAG-LABEL: v_log_f32_nnan:3893; GFX900-SDAG: ; %bb.0:3894; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3895; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x8000003896; GFX900-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03897; GFX900-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc3898; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, v13899; GFX900-SDAG-NEXT: v_log_f32_e32 v0, v03900; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3f3172173901; GFX900-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v03902; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v13903; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3377d1cf3904; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s4, v23905; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x7f8000003906; GFX900-SDAG-NEXT: v_add_f32_e32 v1, v1, v23907; GFX900-SDAG-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s43908; GFX900-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]3909; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172183910; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3911; GFX900-SDAG-NEXT: v_sub_f32_e32 v0, v0, v13912; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]3913;3914; GFX900-GISEL-LABEL: v_log_f32_nnan:3915; GFX900-GISEL: ; %bb.0:3916; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3917; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000003918; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13919; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc3920; GFX900-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v13921; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v13922; GFX900-GISEL-NEXT: v_log_f32_e32 v0, v03923; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172173924; GFX900-GISEL-NEXT: v_mov_b32_e32 v3, 0x3377d1cf3925; GFX900-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317217, v03926; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v23927; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v3, v13928; GFX900-GISEL-NEXT: v_add_f32_e32 v1, v2, v13929; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000003930; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v23931; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]3932; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172183933; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc3934; GFX900-GISEL-NEXT: v_sub_f32_e32 v0, v0, v13935; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]3936;3937; GFX1100-SDAG-LABEL: v_log_f32_nnan:3938; GFX1100-SDAG: ; %bb.0:3939; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3940; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v03941; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc_lo3942; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3943; GFX1100-SDAG-NEXT: v_ldexp_f32 v0, v0, v13944; GFX1100-SDAG-NEXT: v_log_f32_e32 v0, v03945; GFX1100-SDAG-NEXT: s_waitcnt_depctr depctr_va_vdst(0)3946; GFX1100-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v03947; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|3948; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)3949; GFX1100-SDAG-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v13950; GFX1100-SDAG-NEXT: v_fmamk_f32 v2, v0, 0x3377d1cf, v23951; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3952; GFX1100-SDAG-NEXT: v_add_f32_e32 v1, v1, v23953; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s03954; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo3955; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)3956; GFX1100-SDAG-NEXT: v_sub_f32_e32 v0, v0, v13957; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]3958;3959; GFX1100-GISEL-LABEL: v_log_f32_nnan:3960; GFX1100-GISEL: ; %bb.0:3961; GFX1100-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3962; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v03963; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo3964; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3965; GFX1100-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v13966; GFX1100-GISEL-NEXT: v_ldexp_f32 v0, v0, v13967; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)3968; GFX1100-GISEL-NEXT: v_log_f32_e32 v0, v03969; GFX1100-GISEL-NEXT: s_waitcnt_depctr depctr_va_vdst(0)3970; GFX1100-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317217, v03971; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|3972; GFX1100-GISEL-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v13973; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3974; GFX1100-GISEL-NEXT: v_fmac_f32_e32 v2, 0x3377d1cf, v03975; GFX1100-GISEL-NEXT: v_add_f32_e32 v1, v1, v23976; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)3977; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s03978; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo3979; GFX1100-GISEL-NEXT: v_sub_f32_e32 v0, v0, v13980; GFX1100-GISEL-NEXT: s_setpc_b64 s[30:31]3981;3982; R600-LABEL: v_log_f32_nnan:3983; R600: ; %bb.0:3984; R600-NEXT: CF_END3985; R600-NEXT: PAD3986;3987; CM-LABEL: v_log_f32_nnan:3988; CM: ; %bb.0:3989; CM-NEXT: CF_END3990; CM-NEXT: PAD3991 %result = call nnan float @llvm.log.f32(float %in)3992 ret float %result3993}3994 3995define float @v_log_f32_nnan_daz(float %in) #0 {3996; SI-SDAG-LABEL: v_log_f32_nnan_daz:3997; SI-SDAG: ; %bb.0:3998; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3999; SI-SDAG-NEXT: v_log_f32_e32 v0, v04000; SI-SDAG-NEXT: s_mov_b32 s4, 0x3f3172174001; SI-SDAG-NEXT: s_mov_b32 s5, 0x3377d1cf4002; SI-SDAG-NEXT: s_mov_b32 s6, 0x7f8000004003; SI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v04004; SI-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v14005; SI-SDAG-NEXT: v_fma_f32 v2, v0, s5, v24006; SI-SDAG-NEXT: v_add_f32_e32 v1, v1, v24007; SI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s64008; SI-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc4009; SI-SDAG-NEXT: s_setpc_b64 s[30:31]4010;4011; SI-GISEL-LABEL: v_log_f32_nnan_daz:4012; SI-GISEL: ; %bb.0:4013; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4014; SI-GISEL-NEXT: v_log_f32_e32 v0, v04015; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172174016; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x3377d1cf4017; SI-GISEL-NEXT: v_mov_b32_e32 v3, 0x7f8000004018; SI-GISEL-NEXT: v_mul_f32_e32 v4, 0x3f317217, v04019; SI-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v44020; SI-GISEL-NEXT: v_fma_f32 v1, v0, v2, v14021; SI-GISEL-NEXT: v_add_f32_e32 v1, v4, v14022; SI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v34023; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc4024; SI-GISEL-NEXT: s_setpc_b64 s[30:31]4025;4026; VI-SDAG-LABEL: v_log_f32_nnan_daz:4027; VI-SDAG: ; %bb.0:4028; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4029; VI-SDAG-NEXT: v_log_f32_e32 v0, v04030; VI-SDAG-NEXT: s_mov_b32 s4, 0x7f8000004031; VI-SDAG-NEXT: v_and_b32_e32 v1, 0xfffff000, v04032; VI-SDAG-NEXT: v_sub_f32_e32 v3, v0, v14033; VI-SDAG-NEXT: v_mul_f32_e32 v2, 0x3805fdf4, v14034; VI-SDAG-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v34035; VI-SDAG-NEXT: v_mul_f32_e32 v3, 0x3f317000, v34036; VI-SDAG-NEXT: v_add_f32_e32 v2, v2, v44037; VI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317000, v14038; VI-SDAG-NEXT: v_add_f32_e32 v2, v3, v24039; VI-SDAG-NEXT: v_add_f32_e32 v1, v1, v24040; VI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s44041; VI-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc4042; VI-SDAG-NEXT: s_setpc_b64 s[30:31]4043;4044; VI-GISEL-LABEL: v_log_f32_nnan_daz:4045; VI-GISEL: ; %bb.0:4046; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4047; VI-GISEL-NEXT: v_log_f32_e32 v0, v04048; VI-GISEL-NEXT: v_and_b32_e32 v1, 0xfffff000, v04049; VI-GISEL-NEXT: v_sub_f32_e32 v2, v0, v14050; VI-GISEL-NEXT: v_mul_f32_e32 v3, 0x3805fdf4, v14051; VI-GISEL-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v24052; VI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317000, v24053; VI-GISEL-NEXT: v_add_f32_e32 v3, v3, v44054; VI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317000, v14055; VI-GISEL-NEXT: v_add_f32_e32 v2, v2, v34056; VI-GISEL-NEXT: v_add_f32_e32 v1, v1, v24057; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000004058; VI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v24059; VI-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc4060; VI-GISEL-NEXT: s_setpc_b64 s[30:31]4061;4062; GFX900-SDAG-LABEL: v_log_f32_nnan_daz:4063; GFX900-SDAG: ; %bb.0:4064; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4065; GFX900-SDAG-NEXT: v_log_f32_e32 v0, v04066; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3f3172174067; GFX900-SDAG-NEXT: s_mov_b32 s5, 0x3377d1cf4068; GFX900-SDAG-NEXT: s_mov_b32 s6, 0x7f8000004069; GFX900-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v04070; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v14071; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s5, v24072; GFX900-SDAG-NEXT: v_add_f32_e32 v1, v1, v24073; GFX900-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s64074; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc4075; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]4076;4077; GFX900-GISEL-LABEL: v_log_f32_nnan_daz:4078; GFX900-GISEL: ; %bb.0:4079; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4080; GFX900-GISEL-NEXT: v_log_f32_e32 v0, v04081; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172174082; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x3377d1cf4083; GFX900-GISEL-NEXT: v_mov_b32_e32 v3, 0x7f8000004084; GFX900-GISEL-NEXT: v_mul_f32_e32 v4, 0x3f317217, v04085; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v44086; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v2, v14087; GFX900-GISEL-NEXT: v_add_f32_e32 v1, v4, v14088; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v34089; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc4090; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]4091;4092; GFX1100-SDAG-LABEL: v_log_f32_nnan_daz:4093; GFX1100-SDAG: ; %bb.0:4094; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4095; GFX1100-SDAG-NEXT: v_log_f32_e32 v0, v04096; GFX1100-SDAG-NEXT: s_waitcnt_depctr depctr_va_vdst(0)4097; GFX1100-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v04098; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|4099; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)4100; GFX1100-SDAG-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v14101; GFX1100-SDAG-NEXT: v_fmamk_f32 v2, v0, 0x3377d1cf, v24102; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4103; GFX1100-SDAG-NEXT: v_add_f32_e32 v1, v1, v24104; GFX1100-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo4105; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]4106;4107; GFX1100-GISEL-LABEL: v_log_f32_nnan_daz:4108; GFX1100-GISEL: ; %bb.0:4109; GFX1100-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4110; GFX1100-GISEL-NEXT: v_log_f32_e32 v0, v04111; GFX1100-GISEL-NEXT: s_waitcnt_depctr depctr_va_vdst(0)4112; GFX1100-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317217, v04113; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|4114; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)4115; GFX1100-GISEL-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v14116; GFX1100-GISEL-NEXT: v_fmac_f32_e32 v2, 0x3377d1cf, v04117; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4118; GFX1100-GISEL-NEXT: v_add_f32_e32 v1, v1, v24119; GFX1100-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo4120; GFX1100-GISEL-NEXT: s_setpc_b64 s[30:31]4121;4122; R600-LABEL: v_log_f32_nnan_daz:4123; R600: ; %bb.0:4124; R600-NEXT: CF_END4125; R600-NEXT: PAD4126;4127; CM-LABEL: v_log_f32_nnan_daz:4128; CM: ; %bb.0:4129; CM-NEXT: CF_END4130; CM-NEXT: PAD4131 %result = call nnan float @llvm.log.f32(float %in)4132 ret float %result4133}4134 4135define float @v_log_f32_nnan_dynamic(float %in) #1 {4136; SI-SDAG-LABEL: v_log_f32_nnan_dynamic:4137; SI-SDAG: ; %bb.0:4138; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4139; SI-SDAG-NEXT: s_mov_b32 s4, 0x8000004140; SI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v04141; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc4142; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v14143; SI-SDAG-NEXT: v_log_f32_e32 v0, v04144; SI-SDAG-NEXT: s_mov_b32 s4, 0x3f3172174145; SI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v04146; SI-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v14147; SI-SDAG-NEXT: s_mov_b32 s4, 0x3377d1cf4148; SI-SDAG-NEXT: v_fma_f32 v2, v0, s4, v24149; SI-SDAG-NEXT: s_mov_b32 s4, 0x7f8000004150; SI-SDAG-NEXT: v_add_f32_e32 v1, v1, v24151; SI-SDAG-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s44152; SI-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]4153; SI-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172184154; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc4155; SI-SDAG-NEXT: v_sub_f32_e32 v0, v0, v14156; SI-SDAG-NEXT: s_setpc_b64 s[30:31]4157;4158; SI-GISEL-LABEL: v_log_f32_nnan_dynamic:4159; SI-GISEL: ; %bb.0:4160; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4161; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000004162; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v14163; SI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc4164; SI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v14165; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v14166; SI-GISEL-NEXT: v_log_f32_e32 v0, v04167; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172174168; SI-GISEL-NEXT: v_mov_b32_e32 v3, 0x3377d1cf4169; SI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317217, v04170; SI-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v24171; SI-GISEL-NEXT: v_fma_f32 v1, v0, v3, v14172; SI-GISEL-NEXT: v_add_f32_e32 v1, v2, v14173; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000004174; SI-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v24175; SI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]4176; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172184177; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc4178; SI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v14179; SI-GISEL-NEXT: s_setpc_b64 s[30:31]4180;4181; VI-SDAG-LABEL: v_log_f32_nnan_dynamic:4182; VI-SDAG: ; %bb.0:4183; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4184; VI-SDAG-NEXT: s_mov_b32 s4, 0x8000004185; VI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v04186; VI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc4187; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, v14188; VI-SDAG-NEXT: v_log_f32_e32 v0, v04189; VI-SDAG-NEXT: s_mov_b32 s4, 0x7f8000004190; VI-SDAG-NEXT: v_and_b32_e32 v1, 0xfffff000, v04191; VI-SDAG-NEXT: v_sub_f32_e32 v2, v0, v14192; VI-SDAG-NEXT: v_mul_f32_e32 v3, 0x3f317000, v24193; VI-SDAG-NEXT: v_mul_f32_e32 v2, 0x3805fdf4, v24194; VI-SDAG-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v14195; VI-SDAG-NEXT: v_add_f32_e32 v2, v4, v24196; VI-SDAG-NEXT: v_add_f32_e32 v2, v3, v24197; VI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317000, v14198; VI-SDAG-NEXT: v_add_f32_e32 v1, v1, v24199; VI-SDAG-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s44200; VI-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]4201; VI-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172184202; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc4203; VI-SDAG-NEXT: v_sub_f32_e32 v0, v0, v14204; VI-SDAG-NEXT: s_setpc_b64 s[30:31]4205;4206; VI-GISEL-LABEL: v_log_f32_nnan_dynamic:4207; VI-GISEL: ; %bb.0:4208; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4209; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000004210; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v14211; VI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc4212; VI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v14213; VI-GISEL-NEXT: v_ldexp_f32 v0, v0, v14214; VI-GISEL-NEXT: v_log_f32_e32 v0, v04215; VI-GISEL-NEXT: v_and_b32_e32 v1, 0xfffff000, v04216; VI-GISEL-NEXT: v_sub_f32_e32 v2, v0, v14217; VI-GISEL-NEXT: v_mul_f32_e32 v3, 0x3805fdf4, v14218; VI-GISEL-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v24219; VI-GISEL-NEXT: v_add_f32_e32 v3, v3, v44220; VI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317000, v24221; VI-GISEL-NEXT: v_add_f32_e32 v2, v2, v34222; VI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317000, v14223; VI-GISEL-NEXT: v_add_f32_e32 v1, v1, v24224; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000004225; VI-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v24226; VI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]4227; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172184228; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc4229; VI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v14230; VI-GISEL-NEXT: s_setpc_b64 s[30:31]4231;4232; GFX900-SDAG-LABEL: v_log_f32_nnan_dynamic:4233; GFX900-SDAG: ; %bb.0:4234; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4235; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x8000004236; GFX900-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v04237; GFX900-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc4238; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, v14239; GFX900-SDAG-NEXT: v_log_f32_e32 v0, v04240; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3f3172174241; GFX900-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v04242; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v14243; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3377d1cf4244; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s4, v24245; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x7f8000004246; GFX900-SDAG-NEXT: v_add_f32_e32 v1, v1, v24247; GFX900-SDAG-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s44248; GFX900-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]4249; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172184250; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc4251; GFX900-SDAG-NEXT: v_sub_f32_e32 v0, v0, v14252; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]4253;4254; GFX900-GISEL-LABEL: v_log_f32_nnan_dynamic:4255; GFX900-GISEL: ; %bb.0:4256; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4257; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000004258; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v14259; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc4260; GFX900-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v14261; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v14262; GFX900-GISEL-NEXT: v_log_f32_e32 v0, v04263; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172174264; GFX900-GISEL-NEXT: v_mov_b32_e32 v3, 0x3377d1cf4265; GFX900-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317217, v04266; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v24267; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v3, v14268; GFX900-GISEL-NEXT: v_add_f32_e32 v1, v2, v14269; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000004270; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v24271; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]4272; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172184273; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc4274; GFX900-GISEL-NEXT: v_sub_f32_e32 v0, v0, v14275; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]4276;4277; GFX1100-SDAG-LABEL: v_log_f32_nnan_dynamic:4278; GFX1100-SDAG: ; %bb.0:4279; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4280; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v04281; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc_lo4282; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4283; GFX1100-SDAG-NEXT: v_ldexp_f32 v0, v0, v14284; GFX1100-SDAG-NEXT: v_log_f32_e32 v0, v04285; GFX1100-SDAG-NEXT: s_waitcnt_depctr depctr_va_vdst(0)4286; GFX1100-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v04287; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|4288; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)4289; GFX1100-SDAG-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v14290; GFX1100-SDAG-NEXT: v_fmamk_f32 v2, v0, 0x3377d1cf, v24291; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4292; GFX1100-SDAG-NEXT: v_add_f32_e32 v1, v1, v24293; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s04294; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo4295; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)4296; GFX1100-SDAG-NEXT: v_sub_f32_e32 v0, v0, v14297; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]4298;4299; GFX1100-GISEL-LABEL: v_log_f32_nnan_dynamic:4300; GFX1100-GISEL: ; %bb.0:4301; GFX1100-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4302; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v04303; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo4304; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4305; GFX1100-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v14306; GFX1100-GISEL-NEXT: v_ldexp_f32 v0, v0, v14307; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)4308; GFX1100-GISEL-NEXT: v_log_f32_e32 v0, v04309; GFX1100-GISEL-NEXT: s_waitcnt_depctr depctr_va_vdst(0)4310; GFX1100-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317217, v04311; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|4312; GFX1100-GISEL-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v14313; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4314; GFX1100-GISEL-NEXT: v_fmac_f32_e32 v2, 0x3377d1cf, v04315; GFX1100-GISEL-NEXT: v_add_f32_e32 v1, v1, v24316; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)4317; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s04318; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo4319; GFX1100-GISEL-NEXT: v_sub_f32_e32 v0, v0, v14320; GFX1100-GISEL-NEXT: s_setpc_b64 s[30:31]4321;4322; R600-LABEL: v_log_f32_nnan_dynamic:4323; R600: ; %bb.0:4324; R600-NEXT: CF_END4325; R600-NEXT: PAD4326;4327; CM-LABEL: v_log_f32_nnan_dynamic:4328; CM: ; %bb.0:4329; CM-NEXT: CF_END4330; CM-NEXT: PAD4331 %result = call nnan float @llvm.log.f32(float %in)4332 ret float %result4333}4334 4335define float @v_log_f32_ninf_daz(float %in) #0 {4336; SI-SDAG-LABEL: v_log_f32_ninf_daz:4337; SI-SDAG: ; %bb.0:4338; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4339; SI-SDAG-NEXT: v_log_f32_e32 v0, v04340; SI-SDAG-NEXT: s_mov_b32 s4, 0x3f3172174341; SI-SDAG-NEXT: s_mov_b32 s5, 0x3377d1cf4342; SI-SDAG-NEXT: s_mov_b32 s6, 0x7f8000004343; SI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v04344; SI-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v14345; SI-SDAG-NEXT: v_fma_f32 v2, v0, s5, v24346; SI-SDAG-NEXT: v_add_f32_e32 v1, v1, v24347; SI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s64348; SI-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc4349; SI-SDAG-NEXT: s_setpc_b64 s[30:31]4350;4351; SI-GISEL-LABEL: v_log_f32_ninf_daz:4352; SI-GISEL: ; %bb.0:4353; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4354; SI-GISEL-NEXT: v_log_f32_e32 v0, v04355; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172174356; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x3377d1cf4357; SI-GISEL-NEXT: v_mov_b32_e32 v3, 0x7f8000004358; SI-GISEL-NEXT: v_mul_f32_e32 v4, 0x3f317217, v04359; SI-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v44360; SI-GISEL-NEXT: v_fma_f32 v1, v0, v2, v14361; SI-GISEL-NEXT: v_add_f32_e32 v1, v4, v14362; SI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v34363; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc4364; SI-GISEL-NEXT: s_setpc_b64 s[30:31]4365;4366; VI-SDAG-LABEL: v_log_f32_ninf_daz:4367; VI-SDAG: ; %bb.0:4368; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4369; VI-SDAG-NEXT: v_log_f32_e32 v0, v04370; VI-SDAG-NEXT: s_mov_b32 s4, 0x7f8000004371; VI-SDAG-NEXT: v_and_b32_e32 v1, 0xfffff000, v04372; VI-SDAG-NEXT: v_sub_f32_e32 v3, v0, v14373; VI-SDAG-NEXT: v_mul_f32_e32 v2, 0x3805fdf4, v14374; VI-SDAG-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v34375; VI-SDAG-NEXT: v_mul_f32_e32 v3, 0x3f317000, v34376; VI-SDAG-NEXT: v_add_f32_e32 v2, v2, v44377; VI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317000, v14378; VI-SDAG-NEXT: v_add_f32_e32 v2, v3, v24379; VI-SDAG-NEXT: v_add_f32_e32 v1, v1, v24380; VI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s44381; VI-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc4382; VI-SDAG-NEXT: s_setpc_b64 s[30:31]4383;4384; VI-GISEL-LABEL: v_log_f32_ninf_daz:4385; VI-GISEL: ; %bb.0:4386; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4387; VI-GISEL-NEXT: v_log_f32_e32 v0, v04388; VI-GISEL-NEXT: v_and_b32_e32 v1, 0xfffff000, v04389; VI-GISEL-NEXT: v_sub_f32_e32 v2, v0, v14390; VI-GISEL-NEXT: v_mul_f32_e32 v3, 0x3805fdf4, v14391; VI-GISEL-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v24392; VI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317000, v24393; VI-GISEL-NEXT: v_add_f32_e32 v3, v3, v44394; VI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317000, v14395; VI-GISEL-NEXT: v_add_f32_e32 v2, v2, v34396; VI-GISEL-NEXT: v_add_f32_e32 v1, v1, v24397; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000004398; VI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v24399; VI-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc4400; VI-GISEL-NEXT: s_setpc_b64 s[30:31]4401;4402; GFX900-SDAG-LABEL: v_log_f32_ninf_daz:4403; GFX900-SDAG: ; %bb.0:4404; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4405; GFX900-SDAG-NEXT: v_log_f32_e32 v0, v04406; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3f3172174407; GFX900-SDAG-NEXT: s_mov_b32 s5, 0x3377d1cf4408; GFX900-SDAG-NEXT: s_mov_b32 s6, 0x7f8000004409; GFX900-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v04410; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v14411; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s5, v24412; GFX900-SDAG-NEXT: v_add_f32_e32 v1, v1, v24413; GFX900-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s64414; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc4415; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]4416;4417; GFX900-GISEL-LABEL: v_log_f32_ninf_daz:4418; GFX900-GISEL: ; %bb.0:4419; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4420; GFX900-GISEL-NEXT: v_log_f32_e32 v0, v04421; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172174422; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x3377d1cf4423; GFX900-GISEL-NEXT: v_mov_b32_e32 v3, 0x7f8000004424; GFX900-GISEL-NEXT: v_mul_f32_e32 v4, 0x3f317217, v04425; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v44426; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v2, v14427; GFX900-GISEL-NEXT: v_add_f32_e32 v1, v4, v14428; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v34429; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc4430; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]4431;4432; GFX1100-SDAG-LABEL: v_log_f32_ninf_daz:4433; GFX1100-SDAG: ; %bb.0:4434; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4435; GFX1100-SDAG-NEXT: v_log_f32_e32 v0, v04436; GFX1100-SDAG-NEXT: s_waitcnt_depctr depctr_va_vdst(0)4437; GFX1100-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v04438; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|4439; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)4440; GFX1100-SDAG-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v14441; GFX1100-SDAG-NEXT: v_fmamk_f32 v2, v0, 0x3377d1cf, v24442; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4443; GFX1100-SDAG-NEXT: v_add_f32_e32 v1, v1, v24444; GFX1100-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo4445; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]4446;4447; GFX1100-GISEL-LABEL: v_log_f32_ninf_daz:4448; GFX1100-GISEL: ; %bb.0:4449; GFX1100-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4450; GFX1100-GISEL-NEXT: v_log_f32_e32 v0, v04451; GFX1100-GISEL-NEXT: s_waitcnt_depctr depctr_va_vdst(0)4452; GFX1100-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317217, v04453; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|4454; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)4455; GFX1100-GISEL-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v14456; GFX1100-GISEL-NEXT: v_fmac_f32_e32 v2, 0x3377d1cf, v04457; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4458; GFX1100-GISEL-NEXT: v_add_f32_e32 v1, v1, v24459; GFX1100-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo4460; GFX1100-GISEL-NEXT: s_setpc_b64 s[30:31]4461;4462; R600-LABEL: v_log_f32_ninf_daz:4463; R600: ; %bb.0:4464; R600-NEXT: CF_END4465; R600-NEXT: PAD4466;4467; CM-LABEL: v_log_f32_ninf_daz:4468; CM: ; %bb.0:4469; CM-NEXT: CF_END4470; CM-NEXT: PAD4471 %result = call ninf float @llvm.log.f32(float %in)4472 ret float %result4473}4474 4475define float @v_log_f32_ninf_dynamic(float %in) #1 {4476; SI-SDAG-LABEL: v_log_f32_ninf_dynamic:4477; SI-SDAG: ; %bb.0:4478; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4479; SI-SDAG-NEXT: s_mov_b32 s4, 0x8000004480; SI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v04481; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc4482; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v14483; SI-SDAG-NEXT: v_log_f32_e32 v0, v04484; SI-SDAG-NEXT: s_mov_b32 s4, 0x3f3172174485; SI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v04486; SI-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v14487; SI-SDAG-NEXT: s_mov_b32 s4, 0x3377d1cf4488; SI-SDAG-NEXT: v_fma_f32 v2, v0, s4, v24489; SI-SDAG-NEXT: s_mov_b32 s4, 0x7f8000004490; SI-SDAG-NEXT: v_add_f32_e32 v1, v1, v24491; SI-SDAG-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s44492; SI-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]4493; SI-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172184494; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc4495; SI-SDAG-NEXT: v_sub_f32_e32 v0, v0, v14496; SI-SDAG-NEXT: s_setpc_b64 s[30:31]4497;4498; SI-GISEL-LABEL: v_log_f32_ninf_dynamic:4499; SI-GISEL: ; %bb.0:4500; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4501; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000004502; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v14503; SI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc4504; SI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v14505; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v14506; SI-GISEL-NEXT: v_log_f32_e32 v0, v04507; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172174508; SI-GISEL-NEXT: v_mov_b32_e32 v3, 0x3377d1cf4509; SI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317217, v04510; SI-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v24511; SI-GISEL-NEXT: v_fma_f32 v1, v0, v3, v14512; SI-GISEL-NEXT: v_add_f32_e32 v1, v2, v14513; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000004514; SI-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v24515; SI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]4516; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172184517; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc4518; SI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v14519; SI-GISEL-NEXT: s_setpc_b64 s[30:31]4520;4521; VI-SDAG-LABEL: v_log_f32_ninf_dynamic:4522; VI-SDAG: ; %bb.0:4523; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4524; VI-SDAG-NEXT: s_mov_b32 s4, 0x8000004525; VI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v04526; VI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc4527; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, v14528; VI-SDAG-NEXT: v_log_f32_e32 v0, v04529; VI-SDAG-NEXT: s_mov_b32 s4, 0x7f8000004530; VI-SDAG-NEXT: v_and_b32_e32 v1, 0xfffff000, v04531; VI-SDAG-NEXT: v_sub_f32_e32 v2, v0, v14532; VI-SDAG-NEXT: v_mul_f32_e32 v3, 0x3f317000, v24533; VI-SDAG-NEXT: v_mul_f32_e32 v2, 0x3805fdf4, v24534; VI-SDAG-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v14535; VI-SDAG-NEXT: v_add_f32_e32 v2, v4, v24536; VI-SDAG-NEXT: v_add_f32_e32 v2, v3, v24537; VI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317000, v14538; VI-SDAG-NEXT: v_add_f32_e32 v1, v1, v24539; VI-SDAG-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s44540; VI-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]4541; VI-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172184542; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc4543; VI-SDAG-NEXT: v_sub_f32_e32 v0, v0, v14544; VI-SDAG-NEXT: s_setpc_b64 s[30:31]4545;4546; VI-GISEL-LABEL: v_log_f32_ninf_dynamic:4547; VI-GISEL: ; %bb.0:4548; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4549; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000004550; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v14551; VI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc4552; VI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v14553; VI-GISEL-NEXT: v_ldexp_f32 v0, v0, v14554; VI-GISEL-NEXT: v_log_f32_e32 v0, v04555; VI-GISEL-NEXT: v_and_b32_e32 v1, 0xfffff000, v04556; VI-GISEL-NEXT: v_sub_f32_e32 v2, v0, v14557; VI-GISEL-NEXT: v_mul_f32_e32 v3, 0x3805fdf4, v14558; VI-GISEL-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v24559; VI-GISEL-NEXT: v_add_f32_e32 v3, v3, v44560; VI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317000, v24561; VI-GISEL-NEXT: v_add_f32_e32 v2, v2, v34562; VI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317000, v14563; VI-GISEL-NEXT: v_add_f32_e32 v1, v1, v24564; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000004565; VI-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v24566; VI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]4567; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172184568; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc4569; VI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v14570; VI-GISEL-NEXT: s_setpc_b64 s[30:31]4571;4572; GFX900-SDAG-LABEL: v_log_f32_ninf_dynamic:4573; GFX900-SDAG: ; %bb.0:4574; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4575; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x8000004576; GFX900-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v04577; GFX900-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc4578; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, v14579; GFX900-SDAG-NEXT: v_log_f32_e32 v0, v04580; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3f3172174581; GFX900-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v04582; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v14583; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3377d1cf4584; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s4, v24585; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x7f8000004586; GFX900-SDAG-NEXT: v_add_f32_e32 v1, v1, v24587; GFX900-SDAG-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s44588; GFX900-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]4589; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172184590; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc4591; GFX900-SDAG-NEXT: v_sub_f32_e32 v0, v0, v14592; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]4593;4594; GFX900-GISEL-LABEL: v_log_f32_ninf_dynamic:4595; GFX900-GISEL: ; %bb.0:4596; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4597; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000004598; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v14599; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc4600; GFX900-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v14601; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v14602; GFX900-GISEL-NEXT: v_log_f32_e32 v0, v04603; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172174604; GFX900-GISEL-NEXT: v_mov_b32_e32 v3, 0x3377d1cf4605; GFX900-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317217, v04606; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v24607; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v3, v14608; GFX900-GISEL-NEXT: v_add_f32_e32 v1, v2, v14609; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000004610; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v24611; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]4612; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172184613; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc4614; GFX900-GISEL-NEXT: v_sub_f32_e32 v0, v0, v14615; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]4616;4617; GFX1100-SDAG-LABEL: v_log_f32_ninf_dynamic:4618; GFX1100-SDAG: ; %bb.0:4619; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4620; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v04621; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc_lo4622; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4623; GFX1100-SDAG-NEXT: v_ldexp_f32 v0, v0, v14624; GFX1100-SDAG-NEXT: v_log_f32_e32 v0, v04625; GFX1100-SDAG-NEXT: s_waitcnt_depctr depctr_va_vdst(0)4626; GFX1100-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v04627; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|4628; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)4629; GFX1100-SDAG-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v14630; GFX1100-SDAG-NEXT: v_fmamk_f32 v2, v0, 0x3377d1cf, v24631; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4632; GFX1100-SDAG-NEXT: v_add_f32_e32 v1, v1, v24633; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s04634; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo4635; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)4636; GFX1100-SDAG-NEXT: v_sub_f32_e32 v0, v0, v14637; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]4638;4639; GFX1100-GISEL-LABEL: v_log_f32_ninf_dynamic:4640; GFX1100-GISEL: ; %bb.0:4641; GFX1100-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4642; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v04643; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo4644; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4645; GFX1100-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v14646; GFX1100-GISEL-NEXT: v_ldexp_f32 v0, v0, v14647; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)4648; GFX1100-GISEL-NEXT: v_log_f32_e32 v0, v04649; GFX1100-GISEL-NEXT: s_waitcnt_depctr depctr_va_vdst(0)4650; GFX1100-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317217, v04651; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|4652; GFX1100-GISEL-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v14653; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4654; GFX1100-GISEL-NEXT: v_fmac_f32_e32 v2, 0x3377d1cf, v04655; GFX1100-GISEL-NEXT: v_add_f32_e32 v1, v1, v24656; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)4657; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s04658; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo4659; GFX1100-GISEL-NEXT: v_sub_f32_e32 v0, v0, v14660; GFX1100-GISEL-NEXT: s_setpc_b64 s[30:31]4661;4662; R600-LABEL: v_log_f32_ninf_dynamic:4663; R600: ; %bb.0:4664; R600-NEXT: CF_END4665; R600-NEXT: PAD4666;4667; CM-LABEL: v_log_f32_ninf_dynamic:4668; CM: ; %bb.0:4669; CM-NEXT: CF_END4670; CM-NEXT: PAD4671 %result = call ninf float @llvm.log.f32(float %in)4672 ret float %result4673}4674 4675define float @v_log_f32_nnan_ninf(float %in) {4676; SI-SDAG-LABEL: v_log_f32_nnan_ninf:4677; SI-SDAG: ; %bb.0:4678; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4679; SI-SDAG-NEXT: s_mov_b32 s4, 0x8000004680; SI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v04681; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc4682; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v14683; SI-SDAG-NEXT: v_log_f32_e32 v0, v04684; SI-SDAG-NEXT: s_mov_b32 s4, 0x3f3172174685; SI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v04686; SI-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v14687; SI-SDAG-NEXT: s_mov_b32 s4, 0x3377d1cf4688; SI-SDAG-NEXT: v_fma_f32 v0, v0, s4, v24689; SI-SDAG-NEXT: v_add_f32_e32 v0, v1, v04690; SI-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172184691; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc4692; SI-SDAG-NEXT: v_sub_f32_e32 v0, v0, v14693; SI-SDAG-NEXT: s_setpc_b64 s[30:31]4694;4695; SI-GISEL-LABEL: v_log_f32_nnan_ninf:4696; SI-GISEL: ; %bb.0:4697; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4698; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000004699; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v14700; SI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc4701; SI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v14702; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v14703; SI-GISEL-NEXT: v_log_f32_e32 v0, v04704; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172174705; SI-GISEL-NEXT: v_mov_b32_e32 v3, 0x3377d1cf4706; SI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317217, v04707; SI-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v24708; SI-GISEL-NEXT: v_fma_f32 v0, v0, v3, v14709; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172184710; SI-GISEL-NEXT: v_add_f32_e32 v0, v2, v04711; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc4712; SI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v14713; SI-GISEL-NEXT: s_setpc_b64 s[30:31]4714;4715; VI-SDAG-LABEL: v_log_f32_nnan_ninf:4716; VI-SDAG: ; %bb.0:4717; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4718; VI-SDAG-NEXT: s_mov_b32 s4, 0x8000004719; VI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v04720; VI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc4721; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, v14722; VI-SDAG-NEXT: v_log_f32_e32 v0, v04723; VI-SDAG-NEXT: v_and_b32_e32 v1, 0xfffff000, v04724; VI-SDAG-NEXT: v_sub_f32_e32 v0, v0, v14725; VI-SDAG-NEXT: v_mul_f32_e32 v2, 0x3f317000, v04726; VI-SDAG-NEXT: v_mul_f32_e32 v0, 0x3805fdf4, v04727; VI-SDAG-NEXT: v_mul_f32_e32 v3, 0x3805fdf4, v14728; VI-SDAG-NEXT: v_add_f32_e32 v0, v3, v04729; VI-SDAG-NEXT: v_add_f32_e32 v0, v2, v04730; VI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317000, v14731; VI-SDAG-NEXT: v_add_f32_e32 v0, v1, v04732; VI-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172184733; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc4734; VI-SDAG-NEXT: v_sub_f32_e32 v0, v0, v14735; VI-SDAG-NEXT: s_setpc_b64 s[30:31]4736;4737; VI-GISEL-LABEL: v_log_f32_nnan_ninf:4738; VI-GISEL: ; %bb.0:4739; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4740; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000004741; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v14742; VI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc4743; VI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v14744; VI-GISEL-NEXT: v_ldexp_f32 v0, v0, v14745; VI-GISEL-NEXT: v_log_f32_e32 v0, v04746; VI-GISEL-NEXT: v_and_b32_e32 v1, 0xfffff000, v04747; VI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v14748; VI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3805fdf4, v14749; VI-GISEL-NEXT: v_mul_f32_e32 v3, 0x3805fdf4, v04750; VI-GISEL-NEXT: v_add_f32_e32 v2, v2, v34751; VI-GISEL-NEXT: v_mul_f32_e32 v0, 0x3f317000, v04752; VI-GISEL-NEXT: v_add_f32_e32 v0, v0, v24753; VI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317000, v14754; VI-GISEL-NEXT: v_add_f32_e32 v0, v1, v04755; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172184756; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc4757; VI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v14758; VI-GISEL-NEXT: s_setpc_b64 s[30:31]4759;4760; GFX900-SDAG-LABEL: v_log_f32_nnan_ninf:4761; GFX900-SDAG: ; %bb.0:4762; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4763; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x8000004764; GFX900-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v04765; GFX900-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc4766; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, v14767; GFX900-SDAG-NEXT: v_log_f32_e32 v0, v04768; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3f3172174769; GFX900-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v04770; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v14771; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3377d1cf4772; GFX900-SDAG-NEXT: v_fma_f32 v0, v0, s4, v24773; GFX900-SDAG-NEXT: v_add_f32_e32 v0, v1, v04774; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172184775; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc4776; GFX900-SDAG-NEXT: v_sub_f32_e32 v0, v0, v14777; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]4778;4779; GFX900-GISEL-LABEL: v_log_f32_nnan_ninf:4780; GFX900-GISEL: ; %bb.0:4781; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4782; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000004783; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v14784; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc4785; GFX900-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v14786; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v14787; GFX900-GISEL-NEXT: v_log_f32_e32 v0, v04788; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172174789; GFX900-GISEL-NEXT: v_mov_b32_e32 v3, 0x3377d1cf4790; GFX900-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317217, v04791; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v24792; GFX900-GISEL-NEXT: v_fma_f32 v0, v0, v3, v14793; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172184794; GFX900-GISEL-NEXT: v_add_f32_e32 v0, v2, v04795; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc4796; GFX900-GISEL-NEXT: v_sub_f32_e32 v0, v0, v14797; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]4798;4799; GFX1100-SDAG-LABEL: v_log_f32_nnan_ninf:4800; GFX1100-SDAG: ; %bb.0:4801; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4802; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v04803; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc_lo4804; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4805; GFX1100-SDAG-NEXT: v_ldexp_f32 v0, v0, v14806; GFX1100-SDAG-NEXT: v_log_f32_e32 v0, v04807; GFX1100-SDAG-NEXT: s_waitcnt_depctr depctr_va_vdst(0)4808; GFX1100-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v04809; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4810; GFX1100-SDAG-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v14811; GFX1100-SDAG-NEXT: v_fmamk_f32 v0, v0, 0x3377d1cf, v24812; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)4813; GFX1100-SDAG-NEXT: v_add_f32_e32 v0, v1, v04814; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo4815; GFX1100-SDAG-NEXT: v_sub_f32_e32 v0, v0, v14816; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]4817;4818; GFX1100-GISEL-LABEL: v_log_f32_nnan_ninf:4819; GFX1100-GISEL: ; %bb.0:4820; GFX1100-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4821; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v04822; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo4823; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4824; GFX1100-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v14825; GFX1100-GISEL-NEXT: v_ldexp_f32 v0, v0, v14826; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)4827; GFX1100-GISEL-NEXT: v_log_f32_e32 v0, v04828; GFX1100-GISEL-NEXT: s_waitcnt_depctr depctr_va_vdst(0)4829; GFX1100-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317217, v04830; GFX1100-GISEL-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v14831; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4832; GFX1100-GISEL-NEXT: v_fmac_f32_e32 v2, 0x3377d1cf, v04833; GFX1100-GISEL-NEXT: v_add_f32_e32 v0, v1, v24834; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo4835; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)4836; GFX1100-GISEL-NEXT: v_sub_f32_e32 v0, v0, v14837; GFX1100-GISEL-NEXT: s_setpc_b64 s[30:31]4838;4839; R600-LABEL: v_log_f32_nnan_ninf:4840; R600: ; %bb.0:4841; R600-NEXT: CF_END4842; R600-NEXT: PAD4843;4844; CM-LABEL: v_log_f32_nnan_ninf:4845; CM: ; %bb.0:4846; CM-NEXT: CF_END4847; CM-NEXT: PAD4848 %result = call nnan ninf float @llvm.log.f32(float %in)4849 ret float %result4850}4851 4852define float @v_log_f32_nnan_ninf_daz(float %in) #0 {4853; SI-SDAG-LABEL: v_log_f32_nnan_ninf_daz:4854; SI-SDAG: ; %bb.0:4855; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4856; SI-SDAG-NEXT: v_log_f32_e32 v0, v04857; SI-SDAG-NEXT: s_mov_b32 s4, 0x3f3172174858; SI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v04859; SI-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v14860; SI-SDAG-NEXT: s_mov_b32 s4, 0x3377d1cf4861; SI-SDAG-NEXT: v_fma_f32 v0, v0, s4, v24862; SI-SDAG-NEXT: v_add_f32_e32 v0, v1, v04863; SI-SDAG-NEXT: s_setpc_b64 s[30:31]4864;4865; SI-GISEL-LABEL: v_log_f32_nnan_ninf_daz:4866; SI-GISEL: ; %bb.0:4867; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4868; SI-GISEL-NEXT: v_log_f32_e32 v0, v04869; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172174870; SI-GISEL-NEXT: v_mov_b32_e32 v3, 0x3377d1cf4871; SI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317217, v04872; SI-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v24873; SI-GISEL-NEXT: v_fma_f32 v0, v0, v3, v14874; SI-GISEL-NEXT: v_add_f32_e32 v0, v2, v04875; SI-GISEL-NEXT: s_setpc_b64 s[30:31]4876;4877; VI-LABEL: v_log_f32_nnan_ninf_daz:4878; VI: ; %bb.0:4879; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4880; VI-NEXT: v_log_f32_e32 v0, v04881; VI-NEXT: v_and_b32_e32 v1, 0xfffff000, v04882; VI-NEXT: v_sub_f32_e32 v0, v0, v14883; VI-NEXT: v_mul_f32_e32 v2, 0x3805fdf4, v14884; VI-NEXT: v_mul_f32_e32 v3, 0x3805fdf4, v04885; VI-NEXT: v_mul_f32_e32 v0, 0x3f317000, v04886; VI-NEXT: v_add_f32_e32 v2, v2, v34887; VI-NEXT: v_add_f32_e32 v0, v0, v24888; VI-NEXT: v_mul_f32_e32 v1, 0x3f317000, v14889; VI-NEXT: v_add_f32_e32 v0, v1, v04890; VI-NEXT: s_setpc_b64 s[30:31]4891;4892; GFX900-SDAG-LABEL: v_log_f32_nnan_ninf_daz:4893; GFX900-SDAG: ; %bb.0:4894; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4895; GFX900-SDAG-NEXT: v_log_f32_e32 v0, v04896; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3f3172174897; GFX900-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v04898; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v14899; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3377d1cf4900; GFX900-SDAG-NEXT: v_fma_f32 v0, v0, s4, v24901; GFX900-SDAG-NEXT: v_add_f32_e32 v0, v1, v04902; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]4903;4904; GFX900-GISEL-LABEL: v_log_f32_nnan_ninf_daz:4905; GFX900-GISEL: ; %bb.0:4906; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4907; GFX900-GISEL-NEXT: v_log_f32_e32 v0, v04908; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172174909; GFX900-GISEL-NEXT: v_mov_b32_e32 v3, 0x3377d1cf4910; GFX900-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317217, v04911; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v24912; GFX900-GISEL-NEXT: v_fma_f32 v0, v0, v3, v14913; GFX900-GISEL-NEXT: v_add_f32_e32 v0, v2, v04914; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]4915;4916; GFX1100-SDAG-LABEL: v_log_f32_nnan_ninf_daz:4917; GFX1100-SDAG: ; %bb.0:4918; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4919; GFX1100-SDAG-NEXT: v_log_f32_e32 v0, v04920; GFX1100-SDAG-NEXT: s_waitcnt_depctr depctr_va_vdst(0)4921; GFX1100-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v04922; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4923; GFX1100-SDAG-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v14924; GFX1100-SDAG-NEXT: v_fmamk_f32 v0, v0, 0x3377d1cf, v24925; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)4926; GFX1100-SDAG-NEXT: v_add_f32_e32 v0, v1, v04927; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]4928;4929; GFX1100-GISEL-LABEL: v_log_f32_nnan_ninf_daz:4930; GFX1100-GISEL: ; %bb.0:4931; GFX1100-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4932; GFX1100-GISEL-NEXT: v_log_f32_e32 v0, v04933; GFX1100-GISEL-NEXT: s_waitcnt_depctr depctr_va_vdst(0)4934; GFX1100-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317217, v04935; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4936; GFX1100-GISEL-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v14937; GFX1100-GISEL-NEXT: v_fmac_f32_e32 v2, 0x3377d1cf, v04938; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)4939; GFX1100-GISEL-NEXT: v_add_f32_e32 v0, v1, v24940; GFX1100-GISEL-NEXT: s_setpc_b64 s[30:31]4941;4942; R600-LABEL: v_log_f32_nnan_ninf_daz:4943; R600: ; %bb.0:4944; R600-NEXT: CF_END4945; R600-NEXT: PAD4946;4947; CM-LABEL: v_log_f32_nnan_ninf_daz:4948; CM: ; %bb.0:4949; CM-NEXT: CF_END4950; CM-NEXT: PAD4951 %result = call nnan ninf float @llvm.log.f32(float %in)4952 ret float %result4953}4954 4955define float @v_log_f32_nnan_ninf_dynamic(float %in) #1 {4956; SI-SDAG-LABEL: v_log_f32_nnan_ninf_dynamic:4957; SI-SDAG: ; %bb.0:4958; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4959; SI-SDAG-NEXT: s_mov_b32 s4, 0x8000004960; SI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v04961; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc4962; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v14963; SI-SDAG-NEXT: v_log_f32_e32 v0, v04964; SI-SDAG-NEXT: s_mov_b32 s4, 0x3f3172174965; SI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v04966; SI-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v14967; SI-SDAG-NEXT: s_mov_b32 s4, 0x3377d1cf4968; SI-SDAG-NEXT: v_fma_f32 v0, v0, s4, v24969; SI-SDAG-NEXT: v_add_f32_e32 v0, v1, v04970; SI-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172184971; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc4972; SI-SDAG-NEXT: v_sub_f32_e32 v0, v0, v14973; SI-SDAG-NEXT: s_setpc_b64 s[30:31]4974;4975; SI-GISEL-LABEL: v_log_f32_nnan_ninf_dynamic:4976; SI-GISEL: ; %bb.0:4977; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4978; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000004979; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v14980; SI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc4981; SI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v14982; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v14983; SI-GISEL-NEXT: v_log_f32_e32 v0, v04984; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172174985; SI-GISEL-NEXT: v_mov_b32_e32 v3, 0x3377d1cf4986; SI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317217, v04987; SI-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v24988; SI-GISEL-NEXT: v_fma_f32 v0, v0, v3, v14989; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172184990; SI-GISEL-NEXT: v_add_f32_e32 v0, v2, v04991; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc4992; SI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v14993; SI-GISEL-NEXT: s_setpc_b64 s[30:31]4994;4995; VI-SDAG-LABEL: v_log_f32_nnan_ninf_dynamic:4996; VI-SDAG: ; %bb.0:4997; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4998; VI-SDAG-NEXT: s_mov_b32 s4, 0x8000004999; VI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v05000; VI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc5001; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, v15002; VI-SDAG-NEXT: v_log_f32_e32 v0, v05003; VI-SDAG-NEXT: v_and_b32_e32 v1, 0xfffff000, v05004; VI-SDAG-NEXT: v_sub_f32_e32 v0, v0, v15005; VI-SDAG-NEXT: v_mul_f32_e32 v2, 0x3f317000, v05006; VI-SDAG-NEXT: v_mul_f32_e32 v0, 0x3805fdf4, v05007; VI-SDAG-NEXT: v_mul_f32_e32 v3, 0x3805fdf4, v15008; VI-SDAG-NEXT: v_add_f32_e32 v0, v3, v05009; VI-SDAG-NEXT: v_add_f32_e32 v0, v2, v05010; VI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317000, v15011; VI-SDAG-NEXT: v_add_f32_e32 v0, v1, v05012; VI-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172185013; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc5014; VI-SDAG-NEXT: v_sub_f32_e32 v0, v0, v15015; VI-SDAG-NEXT: s_setpc_b64 s[30:31]5016;5017; VI-GISEL-LABEL: v_log_f32_nnan_ninf_dynamic:5018; VI-GISEL: ; %bb.0:5019; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5020; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000005021; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v15022; VI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc5023; VI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v15024; VI-GISEL-NEXT: v_ldexp_f32 v0, v0, v15025; VI-GISEL-NEXT: v_log_f32_e32 v0, v05026; VI-GISEL-NEXT: v_and_b32_e32 v1, 0xfffff000, v05027; VI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v15028; VI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3805fdf4, v15029; VI-GISEL-NEXT: v_mul_f32_e32 v3, 0x3805fdf4, v05030; VI-GISEL-NEXT: v_add_f32_e32 v2, v2, v35031; VI-GISEL-NEXT: v_mul_f32_e32 v0, 0x3f317000, v05032; VI-GISEL-NEXT: v_add_f32_e32 v0, v0, v25033; VI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317000, v15034; VI-GISEL-NEXT: v_add_f32_e32 v0, v1, v05035; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172185036; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc5037; VI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v15038; VI-GISEL-NEXT: s_setpc_b64 s[30:31]5039;5040; GFX900-SDAG-LABEL: v_log_f32_nnan_ninf_dynamic:5041; GFX900-SDAG: ; %bb.0:5042; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5043; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x8000005044; GFX900-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v05045; GFX900-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc5046; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, v15047; GFX900-SDAG-NEXT: v_log_f32_e32 v0, v05048; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3f3172175049; GFX900-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v05050; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v15051; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3377d1cf5052; GFX900-SDAG-NEXT: v_fma_f32 v0, v0, s4, v25053; GFX900-SDAG-NEXT: v_add_f32_e32 v0, v1, v05054; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172185055; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc5056; GFX900-SDAG-NEXT: v_sub_f32_e32 v0, v0, v15057; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]5058;5059; GFX900-GISEL-LABEL: v_log_f32_nnan_ninf_dynamic:5060; GFX900-GISEL: ; %bb.0:5061; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5062; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000005063; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v15064; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc5065; GFX900-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v15066; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v15067; GFX900-GISEL-NEXT: v_log_f32_e32 v0, v05068; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172175069; GFX900-GISEL-NEXT: v_mov_b32_e32 v3, 0x3377d1cf5070; GFX900-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317217, v05071; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v25072; GFX900-GISEL-NEXT: v_fma_f32 v0, v0, v3, v15073; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172185074; GFX900-GISEL-NEXT: v_add_f32_e32 v0, v2, v05075; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc5076; GFX900-GISEL-NEXT: v_sub_f32_e32 v0, v0, v15077; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]5078;5079; GFX1100-SDAG-LABEL: v_log_f32_nnan_ninf_dynamic:5080; GFX1100-SDAG: ; %bb.0:5081; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5082; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v05083; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc_lo5084; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5085; GFX1100-SDAG-NEXT: v_ldexp_f32 v0, v0, v15086; GFX1100-SDAG-NEXT: v_log_f32_e32 v0, v05087; GFX1100-SDAG-NEXT: s_waitcnt_depctr depctr_va_vdst(0)5088; GFX1100-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v05089; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5090; GFX1100-SDAG-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v15091; GFX1100-SDAG-NEXT: v_fmamk_f32 v0, v0, 0x3377d1cf, v25092; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)5093; GFX1100-SDAG-NEXT: v_add_f32_e32 v0, v1, v05094; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo5095; GFX1100-SDAG-NEXT: v_sub_f32_e32 v0, v0, v15096; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]5097;5098; GFX1100-GISEL-LABEL: v_log_f32_nnan_ninf_dynamic:5099; GFX1100-GISEL: ; %bb.0:5100; GFX1100-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5101; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v05102; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo5103; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5104; GFX1100-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v15105; GFX1100-GISEL-NEXT: v_ldexp_f32 v0, v0, v15106; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)5107; GFX1100-GISEL-NEXT: v_log_f32_e32 v0, v05108; GFX1100-GISEL-NEXT: s_waitcnt_depctr depctr_va_vdst(0)5109; GFX1100-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317217, v05110; GFX1100-GISEL-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v15111; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5112; GFX1100-GISEL-NEXT: v_fmac_f32_e32 v2, 0x3377d1cf, v05113; GFX1100-GISEL-NEXT: v_add_f32_e32 v0, v1, v25114; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo5115; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)5116; GFX1100-GISEL-NEXT: v_sub_f32_e32 v0, v0, v15117; GFX1100-GISEL-NEXT: s_setpc_b64 s[30:31]5118;5119; R600-LABEL: v_log_f32_nnan_ninf_dynamic:5120; R600: ; %bb.0:5121; R600-NEXT: CF_END5122; R600-NEXT: PAD5123;5124; CM-LABEL: v_log_f32_nnan_ninf_dynamic:5125; CM: ; %bb.0:5126; CM-NEXT: CF_END5127; CM-NEXT: PAD5128 %result = call nnan ninf float @llvm.log.f32(float %in)5129 ret float %result5130}5131 5132define float @v_log_f32_fast_daz(float %in) #0 {5133; GFX689-LABEL: v_log_f32_fast_daz:5134; GFX689: ; %bb.0:5135; GFX689-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5136; GFX689-NEXT: v_log_f32_e32 v0, v05137; GFX689-NEXT: v_mul_f32_e32 v0, 0x3f317218, v05138; GFX689-NEXT: s_setpc_b64 s[30:31]5139;5140; GFX1100-LABEL: v_log_f32_fast_daz:5141; GFX1100: ; %bb.0:5142; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5143; GFX1100-NEXT: v_log_f32_e32 v0, v05144; GFX1100-NEXT: s_waitcnt_depctr depctr_va_vdst(0)5145; GFX1100-NEXT: v_mul_f32_e32 v0, 0x3f317218, v05146; GFX1100-NEXT: s_setpc_b64 s[30:31]5147;5148; R600-LABEL: v_log_f32_fast_daz:5149; R600: ; %bb.0:5150; R600-NEXT: CF_END5151; R600-NEXT: PAD5152;5153; CM-LABEL: v_log_f32_fast_daz:5154; CM: ; %bb.0:5155; CM-NEXT: CF_END5156; CM-NEXT: PAD5157 %result = call fast float @llvm.log.f32(float %in)5158 ret float %result5159}5160 5161define float @v_log_f32_dynamic_mode(float %in) #1 {5162; SI-SDAG-LABEL: v_log_f32_dynamic_mode:5163; SI-SDAG: ; %bb.0:5164; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5165; SI-SDAG-NEXT: s_mov_b32 s4, 0x8000005166; SI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v05167; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc5168; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v15169; SI-SDAG-NEXT: v_log_f32_e32 v0, v05170; SI-SDAG-NEXT: s_mov_b32 s4, 0x3f3172175171; SI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v05172; SI-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v15173; SI-SDAG-NEXT: s_mov_b32 s4, 0x3377d1cf5174; SI-SDAG-NEXT: v_fma_f32 v2, v0, s4, v25175; SI-SDAG-NEXT: s_mov_b32 s4, 0x7f8000005176; SI-SDAG-NEXT: v_add_f32_e32 v1, v1, v25177; SI-SDAG-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s45178; SI-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]5179; SI-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172185180; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc5181; SI-SDAG-NEXT: v_sub_f32_e32 v0, v0, v15182; SI-SDAG-NEXT: s_setpc_b64 s[30:31]5183;5184; SI-GISEL-LABEL: v_log_f32_dynamic_mode:5185; SI-GISEL: ; %bb.0:5186; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5187; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000005188; SI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v15189; SI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc5190; SI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v15191; SI-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v15192; SI-GISEL-NEXT: v_log_f32_e32 v0, v05193; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172175194; SI-GISEL-NEXT: v_mov_b32_e32 v3, 0x3377d1cf5195; SI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317217, v05196; SI-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v25197; SI-GISEL-NEXT: v_fma_f32 v1, v0, v3, v15198; SI-GISEL-NEXT: v_add_f32_e32 v1, v2, v15199; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000005200; SI-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v25201; SI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]5202; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172185203; SI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc5204; SI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v15205; SI-GISEL-NEXT: s_setpc_b64 s[30:31]5206;5207; VI-SDAG-LABEL: v_log_f32_dynamic_mode:5208; VI-SDAG: ; %bb.0:5209; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5210; VI-SDAG-NEXT: s_mov_b32 s4, 0x8000005211; VI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v05212; VI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc5213; VI-SDAG-NEXT: v_ldexp_f32 v0, v0, v15214; VI-SDAG-NEXT: v_log_f32_e32 v0, v05215; VI-SDAG-NEXT: s_mov_b32 s4, 0x7f8000005216; VI-SDAG-NEXT: v_and_b32_e32 v1, 0xfffff000, v05217; VI-SDAG-NEXT: v_sub_f32_e32 v2, v0, v15218; VI-SDAG-NEXT: v_mul_f32_e32 v3, 0x3f317000, v25219; VI-SDAG-NEXT: v_mul_f32_e32 v2, 0x3805fdf4, v25220; VI-SDAG-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v15221; VI-SDAG-NEXT: v_add_f32_e32 v2, v4, v25222; VI-SDAG-NEXT: v_add_f32_e32 v2, v3, v25223; VI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317000, v15224; VI-SDAG-NEXT: v_add_f32_e32 v1, v1, v25225; VI-SDAG-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s45226; VI-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]5227; VI-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172185228; VI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc5229; VI-SDAG-NEXT: v_sub_f32_e32 v0, v0, v15230; VI-SDAG-NEXT: s_setpc_b64 s[30:31]5231;5232; VI-GISEL-LABEL: v_log_f32_dynamic_mode:5233; VI-GISEL: ; %bb.0:5234; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5235; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000005236; VI-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v15237; VI-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc5238; VI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v15239; VI-GISEL-NEXT: v_ldexp_f32 v0, v0, v15240; VI-GISEL-NEXT: v_log_f32_e32 v0, v05241; VI-GISEL-NEXT: v_and_b32_e32 v1, 0xfffff000, v05242; VI-GISEL-NEXT: v_sub_f32_e32 v2, v0, v15243; VI-GISEL-NEXT: v_mul_f32_e32 v3, 0x3805fdf4, v15244; VI-GISEL-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v25245; VI-GISEL-NEXT: v_add_f32_e32 v3, v3, v45246; VI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317000, v25247; VI-GISEL-NEXT: v_add_f32_e32 v2, v2, v35248; VI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317000, v15249; VI-GISEL-NEXT: v_add_f32_e32 v1, v1, v25250; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000005251; VI-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v25252; VI-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]5253; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172185254; VI-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc5255; VI-GISEL-NEXT: v_sub_f32_e32 v0, v0, v15256; VI-GISEL-NEXT: s_setpc_b64 s[30:31]5257;5258; GFX900-SDAG-LABEL: v_log_f32_dynamic_mode:5259; GFX900-SDAG: ; %bb.0:5260; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5261; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x8000005262; GFX900-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v05263; GFX900-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc5264; GFX900-SDAG-NEXT: v_ldexp_f32 v0, v0, v15265; GFX900-SDAG-NEXT: v_log_f32_e32 v0, v05266; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3f3172175267; GFX900-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v05268; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v15269; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3377d1cf5270; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s4, v25271; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x7f8000005272; GFX900-SDAG-NEXT: v_add_f32_e32 v1, v1, v25273; GFX900-SDAG-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s45274; GFX900-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]5275; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172185276; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc5277; GFX900-SDAG-NEXT: v_sub_f32_e32 v0, v0, v15278; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]5279;5280; GFX900-GISEL-LABEL: v_log_f32_dynamic_mode:5281; GFX900-GISEL: ; %bb.0:5282; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5283; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x8000005284; GFX900-GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v15285; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc5286; GFX900-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v15287; GFX900-GISEL-NEXT: v_ldexp_f32 v0, v0, v15288; GFX900-GISEL-NEXT: v_log_f32_e32 v0, v05289; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172175290; GFX900-GISEL-NEXT: v_mov_b32_e32 v3, 0x3377d1cf5291; GFX900-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317217, v05292; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v25293; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v3, v15294; GFX900-GISEL-NEXT: v_add_f32_e32 v1, v2, v15295; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000005296; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v25297; GFX900-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]5298; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x41b172185299; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc5300; GFX900-GISEL-NEXT: v_sub_f32_e32 v0, v0, v15301; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]5302;5303; GFX1100-SDAG-LABEL: v_log_f32_dynamic_mode:5304; GFX1100-SDAG: ; %bb.0:5305; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5306; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v05307; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc_lo5308; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5309; GFX1100-SDAG-NEXT: v_ldexp_f32 v0, v0, v15310; GFX1100-SDAG-NEXT: v_log_f32_e32 v0, v05311; GFX1100-SDAG-NEXT: s_waitcnt_depctr depctr_va_vdst(0)5312; GFX1100-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v05313; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|5314; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)5315; GFX1100-SDAG-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v15316; GFX1100-SDAG-NEXT: v_fmamk_f32 v2, v0, 0x3377d1cf, v25317; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5318; GFX1100-SDAG-NEXT: v_add_f32_e32 v1, v1, v25319; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s05320; GFX1100-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo5321; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)5322; GFX1100-SDAG-NEXT: v_sub_f32_e32 v0, v0, v15323; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]5324;5325; GFX1100-GISEL-LABEL: v_log_f32_dynamic_mode:5326; GFX1100-GISEL: ; %bb.0:5327; GFX1100-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5328; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v05329; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo5330; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5331; GFX1100-GISEL-NEXT: v_lshlrev_b32_e32 v1, 5, v15332; GFX1100-GISEL-NEXT: v_ldexp_f32 v0, v0, v15333; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)5334; GFX1100-GISEL-NEXT: v_log_f32_e32 v0, v05335; GFX1100-GISEL-NEXT: s_waitcnt_depctr depctr_va_vdst(0)5336; GFX1100-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317217, v05337; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|5338; GFX1100-GISEL-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v15339; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5340; GFX1100-GISEL-NEXT: v_fmac_f32_e32 v2, 0x3377d1cf, v05341; GFX1100-GISEL-NEXT: v_add_f32_e32 v1, v1, v25342; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)5343; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v0, v0, v1, s05344; GFX1100-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo5345; GFX1100-GISEL-NEXT: v_sub_f32_e32 v0, v0, v15346; GFX1100-GISEL-NEXT: s_setpc_b64 s[30:31]5347;5348; R600-LABEL: v_log_f32_dynamic_mode:5349; R600: ; %bb.0:5350; R600-NEXT: CF_END5351; R600-NEXT: PAD5352;5353; CM-LABEL: v_log_f32_dynamic_mode:5354; CM: ; %bb.0:5355; CM-NEXT: CF_END5356; CM-NEXT: PAD5357 %result = call float @llvm.log.f32(float %in)5358 ret float %result5359}5360 5361define float @v_log_f32_undef() {5362; GFX689-LABEL: v_log_f32_undef:5363; GFX689: ; %bb.0:5364; GFX689-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5365; GFX689-NEXT: s_setpc_b64 s[30:31]5366;5367; GFX1100-LABEL: v_log_f32_undef:5368; GFX1100: ; %bb.0:5369; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5370; GFX1100-NEXT: s_setpc_b64 s[30:31]5371;5372; R600-LABEL: v_log_f32_undef:5373; R600: ; %bb.0:5374; R600-NEXT: CF_END5375; R600-NEXT: PAD5376;5377; CM-LABEL: v_log_f32_undef:5378; CM: ; %bb.0:5379; CM-NEXT: CF_END5380; CM-NEXT: PAD5381 %result = call float @llvm.log.f32(float poison)5382 ret float %result5383}5384 5385define float @v_log_f32_0() {5386; SI-SDAG-LABEL: v_log_f32_0:5387; SI-SDAG: ; %bb.0:5388; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5389; SI-SDAG-NEXT: v_log_f32_e32 v0, 05390; SI-SDAG-NEXT: s_mov_b32 s4, 0x3f3172175391; SI-SDAG-NEXT: s_mov_b32 s5, 0x3377d1cf5392; SI-SDAG-NEXT: s_mov_b32 s6, 0x7f8000005393; SI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v05394; SI-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v15395; SI-SDAG-NEXT: v_fma_f32 v2, v0, s5, v25396; SI-SDAG-NEXT: v_add_f32_e32 v1, v1, v25397; SI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s65398; SI-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc5399; SI-SDAG-NEXT: v_add_f32_e32 v0, 0xc1b17218, v05400; SI-SDAG-NEXT: s_setpc_b64 s[30:31]5401;5402; SI-GISEL-LABEL: v_log_f32_0:5403; SI-GISEL: ; %bb.0:5404; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5405; SI-GISEL-NEXT: v_log_f32_e32 v0, 05406; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172175407; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x3377d1cf5408; SI-GISEL-NEXT: v_mov_b32_e32 v3, 0x7f8000005409; SI-GISEL-NEXT: v_mul_f32_e32 v4, 0x3f317217, v05410; SI-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v45411; SI-GISEL-NEXT: v_fma_f32 v1, v0, v2, v15412; SI-GISEL-NEXT: v_add_f32_e32 v1, v4, v15413; SI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v35414; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc5415; SI-GISEL-NEXT: v_subrev_f32_e32 v0, 0x41b17218, v05416; SI-GISEL-NEXT: s_setpc_b64 s[30:31]5417;5418; VI-SDAG-LABEL: v_log_f32_0:5419; VI-SDAG: ; %bb.0:5420; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5421; VI-SDAG-NEXT: v_log_f32_e32 v0, 05422; VI-SDAG-NEXT: s_mov_b32 s4, 0x7f8000005423; VI-SDAG-NEXT: v_and_b32_e32 v1, 0xfffff000, v05424; VI-SDAG-NEXT: v_sub_f32_e32 v3, v0, v15425; VI-SDAG-NEXT: v_mul_f32_e32 v2, 0x3805fdf4, v15426; VI-SDAG-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v35427; VI-SDAG-NEXT: v_mul_f32_e32 v3, 0x3f317000, v35428; VI-SDAG-NEXT: v_add_f32_e32 v2, v2, v45429; VI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317000, v15430; VI-SDAG-NEXT: v_add_f32_e32 v2, v3, v25431; VI-SDAG-NEXT: v_add_f32_e32 v1, v1, v25432; VI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s45433; VI-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc5434; VI-SDAG-NEXT: v_add_f32_e32 v0, 0xc1b17218, v05435; VI-SDAG-NEXT: s_setpc_b64 s[30:31]5436;5437; VI-GISEL-LABEL: v_log_f32_0:5438; VI-GISEL: ; %bb.0:5439; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5440; VI-GISEL-NEXT: v_log_f32_e32 v0, 05441; VI-GISEL-NEXT: v_and_b32_e32 v1, 0xfffff000, v05442; VI-GISEL-NEXT: v_sub_f32_e32 v2, v0, v15443; VI-GISEL-NEXT: v_mul_f32_e32 v3, 0x3805fdf4, v15444; VI-GISEL-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v25445; VI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317000, v25446; VI-GISEL-NEXT: v_add_f32_e32 v3, v3, v45447; VI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317000, v15448; VI-GISEL-NEXT: v_add_f32_e32 v2, v2, v35449; VI-GISEL-NEXT: v_add_f32_e32 v1, v1, v25450; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000005451; VI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v25452; VI-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc5453; VI-GISEL-NEXT: v_subrev_f32_e32 v0, 0x41b17218, v05454; VI-GISEL-NEXT: s_setpc_b64 s[30:31]5455;5456; GFX900-SDAG-LABEL: v_log_f32_0:5457; GFX900-SDAG: ; %bb.0:5458; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5459; GFX900-SDAG-NEXT: v_log_f32_e32 v0, 05460; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3f3172175461; GFX900-SDAG-NEXT: s_mov_b32 s5, 0x3377d1cf5462; GFX900-SDAG-NEXT: s_mov_b32 s6, 0x7f8000005463; GFX900-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v05464; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v15465; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s5, v25466; GFX900-SDAG-NEXT: v_add_f32_e32 v1, v1, v25467; GFX900-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s65468; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc5469; GFX900-SDAG-NEXT: v_add_f32_e32 v0, 0xc1b17218, v05470; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]5471;5472; GFX900-GISEL-LABEL: v_log_f32_0:5473; GFX900-GISEL: ; %bb.0:5474; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5475; GFX900-GISEL-NEXT: v_log_f32_e32 v0, 05476; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172175477; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x3377d1cf5478; GFX900-GISEL-NEXT: v_mov_b32_e32 v3, 0x7f8000005479; GFX900-GISEL-NEXT: v_mul_f32_e32 v4, 0x3f317217, v05480; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v45481; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v2, v15482; GFX900-GISEL-NEXT: v_add_f32_e32 v1, v4, v15483; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v35484; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc5485; GFX900-GISEL-NEXT: v_subrev_f32_e32 v0, 0x41b17218, v05486; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]5487;5488; GFX1100-SDAG-LABEL: v_log_f32_0:5489; GFX1100-SDAG: ; %bb.0:5490; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5491; GFX1100-SDAG-NEXT: v_log_f32_e32 v0, 05492; GFX1100-SDAG-NEXT: s_waitcnt_depctr depctr_va_vdst(0)5493; GFX1100-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v05494; GFX1100-SDAG-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|5495; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)5496; GFX1100-SDAG-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v15497; GFX1100-SDAG-NEXT: v_fmamk_f32 v2, v0, 0x3377d1cf, v25498; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5499; GFX1100-SDAG-NEXT: v_add_f32_e32 v1, v1, v25500; GFX1100-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo5501; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)5502; GFX1100-SDAG-NEXT: v_add_f32_e32 v0, 0xc1b17218, v05503; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]5504;5505; GFX1100-GISEL-LABEL: v_log_f32_0:5506; GFX1100-GISEL: ; %bb.0:5507; GFX1100-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5508; GFX1100-GISEL-NEXT: v_log_f32_e32 v0, 05509; GFX1100-GISEL-NEXT: s_waitcnt_depctr depctr_va_vdst(0)5510; GFX1100-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317217, v05511; GFX1100-GISEL-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|5512; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)5513; GFX1100-GISEL-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v15514; GFX1100-GISEL-NEXT: v_fmac_f32_e32 v2, 0x3377d1cf, v05515; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5516; GFX1100-GISEL-NEXT: v_add_f32_e32 v1, v1, v25517; GFX1100-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo5518; GFX1100-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)5519; GFX1100-GISEL-NEXT: v_subrev_f32_e32 v0, 0x41b17218, v05520; GFX1100-GISEL-NEXT: s_setpc_b64 s[30:31]5521;5522; R600-LABEL: v_log_f32_0:5523; R600: ; %bb.0:5524; R600-NEXT: CF_END5525; R600-NEXT: PAD5526;5527; CM-LABEL: v_log_f32_0:5528; CM: ; %bb.0:5529; CM-NEXT: CF_END5530; CM-NEXT: PAD5531 %result = call float @llvm.log.f32(float 0.0)5532 ret float %result5533}5534 5535define float @v_log_f32_from_fpext_f16(i16 %src.i) {5536; SI-SDAG-LABEL: v_log_f32_from_fpext_f16:5537; SI-SDAG: ; %bb.0:5538; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5539; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v05540; SI-SDAG-NEXT: s_mov_b32 s4, 0x3f3172175541; SI-SDAG-NEXT: s_mov_b32 s5, 0x3377d1cf5542; SI-SDAG-NEXT: s_mov_b32 s6, 0x7f8000005543; SI-SDAG-NEXT: v_log_f32_e32 v0, v05544; SI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v05545; SI-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v15546; SI-SDAG-NEXT: v_fma_f32 v2, v0, s5, v25547; SI-SDAG-NEXT: v_add_f32_e32 v1, v1, v25548; SI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s65549; SI-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc5550; SI-SDAG-NEXT: s_setpc_b64 s[30:31]5551;5552; SI-GISEL-LABEL: v_log_f32_from_fpext_f16:5553; SI-GISEL: ; %bb.0:5554; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5555; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v05556; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172175557; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x3377d1cf5558; SI-GISEL-NEXT: v_mov_b32_e32 v3, 0x7f8000005559; SI-GISEL-NEXT: v_log_f32_e32 v0, v05560; SI-GISEL-NEXT: v_mul_f32_e32 v4, 0x3f317217, v05561; SI-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v45562; SI-GISEL-NEXT: v_fma_f32 v1, v0, v2, v15563; SI-GISEL-NEXT: v_add_f32_e32 v1, v4, v15564; SI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v35565; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc5566; SI-GISEL-NEXT: s_setpc_b64 s[30:31]5567;5568; VI-SDAG-LABEL: v_log_f32_from_fpext_f16:5569; VI-SDAG: ; %bb.0:5570; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5571; VI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v05572; VI-SDAG-NEXT: s_mov_b32 s4, 0x7f8000005573; VI-SDAG-NEXT: v_log_f32_e32 v0, v05574; VI-SDAG-NEXT: v_and_b32_e32 v1, 0xfffff000, v05575; VI-SDAG-NEXT: v_sub_f32_e32 v3, v0, v15576; VI-SDAG-NEXT: v_mul_f32_e32 v2, 0x3805fdf4, v15577; VI-SDAG-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v35578; VI-SDAG-NEXT: v_mul_f32_e32 v3, 0x3f317000, v35579; VI-SDAG-NEXT: v_add_f32_e32 v2, v2, v45580; VI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317000, v15581; VI-SDAG-NEXT: v_add_f32_e32 v2, v3, v25582; VI-SDAG-NEXT: v_add_f32_e32 v1, v1, v25583; VI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s45584; VI-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc5585; VI-SDAG-NEXT: s_setpc_b64 s[30:31]5586;5587; VI-GISEL-LABEL: v_log_f32_from_fpext_f16:5588; VI-GISEL: ; %bb.0:5589; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5590; VI-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v05591; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x7f8000005592; VI-GISEL-NEXT: v_log_f32_e32 v0, v05593; VI-GISEL-NEXT: v_and_b32_e32 v2, 0xfffff000, v05594; VI-GISEL-NEXT: v_sub_f32_e32 v3, v0, v25595; VI-GISEL-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v25596; VI-GISEL-NEXT: v_mul_f32_e32 v5, 0x3805fdf4, v35597; VI-GISEL-NEXT: v_mul_f32_e32 v3, 0x3f317000, v35598; VI-GISEL-NEXT: v_add_f32_e32 v4, v4, v55599; VI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317000, v25600; VI-GISEL-NEXT: v_add_f32_e32 v3, v3, v45601; VI-GISEL-NEXT: v_add_f32_e32 v2, v2, v35602; VI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v15603; VI-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc5604; VI-GISEL-NEXT: s_setpc_b64 s[30:31]5605;5606; GFX900-SDAG-LABEL: v_log_f32_from_fpext_f16:5607; GFX900-SDAG: ; %bb.0:5608; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5609; GFX900-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v05610; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3f3172175611; GFX900-SDAG-NEXT: s_mov_b32 s5, 0x3377d1cf5612; GFX900-SDAG-NEXT: s_mov_b32 s6, 0x7f8000005613; GFX900-SDAG-NEXT: v_log_f32_e32 v0, v05614; GFX900-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v05615; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v15616; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s5, v25617; GFX900-SDAG-NEXT: v_add_f32_e32 v1, v1, v25618; GFX900-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s65619; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc5620; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]5621;5622; GFX900-GISEL-LABEL: v_log_f32_from_fpext_f16:5623; GFX900-GISEL: ; %bb.0:5624; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5625; GFX900-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v05626; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172175627; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x3377d1cf5628; GFX900-GISEL-NEXT: v_mov_b32_e32 v3, 0x7f8000005629; GFX900-GISEL-NEXT: v_log_f32_e32 v0, v05630; GFX900-GISEL-NEXT: v_mul_f32_e32 v4, 0x3f317217, v05631; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v45632; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v2, v15633; GFX900-GISEL-NEXT: v_add_f32_e32 v1, v4, v15634; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v35635; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc5636; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]5637;5638; GFX1100-SDAG-TRUE16-LABEL: v_log_f32_from_fpext_f16:5639; GFX1100-SDAG-TRUE16: ; %bb.0:5640; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5641; GFX1100-SDAG-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.l5642; GFX1100-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)5643; GFX1100-SDAG-TRUE16-NEXT: v_log_f32_e32 v0, v05644; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)5645; GFX1100-SDAG-TRUE16-NEXT: v_mul_f32_e32 v1, 0x3f317217, v05646; GFX1100-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|5647; GFX1100-SDAG-TRUE16-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v15648; GFX1100-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5649; GFX1100-SDAG-TRUE16-NEXT: v_fmamk_f32 v2, v0, 0x3377d1cf, v25650; GFX1100-SDAG-TRUE16-NEXT: v_add_f32_e32 v1, v1, v25651; GFX1100-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)5652; GFX1100-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo5653; GFX1100-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]5654;5655; GFX1100-SDAG-FAKE16-LABEL: v_log_f32_from_fpext_f16:5656; GFX1100-SDAG-FAKE16: ; %bb.0:5657; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5658; GFX1100-SDAG-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, v05659; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)5660; GFX1100-SDAG-FAKE16-NEXT: v_log_f32_e32 v0, v05661; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)5662; GFX1100-SDAG-FAKE16-NEXT: v_mul_f32_e32 v1, 0x3f317217, v05663; GFX1100-SDAG-FAKE16-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|5664; GFX1100-SDAG-FAKE16-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v15665; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5666; GFX1100-SDAG-FAKE16-NEXT: v_fmamk_f32 v2, v0, 0x3377d1cf, v25667; GFX1100-SDAG-FAKE16-NEXT: v_add_f32_e32 v1, v1, v25668; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)5669; GFX1100-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo5670; GFX1100-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]5671;5672; GFX1100-GISEL-TRUE16-LABEL: v_log_f32_from_fpext_f16:5673; GFX1100-GISEL-TRUE16: ; %bb.0:5674; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5675; GFX1100-GISEL-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.l5676; GFX1100-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)5677; GFX1100-GISEL-TRUE16-NEXT: v_log_f32_e32 v0, v05678; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)5679; GFX1100-GISEL-TRUE16-NEXT: v_mul_f32_e32 v1, 0x3f317217, v05680; GFX1100-GISEL-TRUE16-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|5681; GFX1100-GISEL-TRUE16-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v15682; GFX1100-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5683; GFX1100-GISEL-TRUE16-NEXT: v_fmac_f32_e32 v2, 0x3377d1cf, v05684; GFX1100-GISEL-TRUE16-NEXT: v_add_f32_e32 v1, v1, v25685; GFX1100-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)5686; GFX1100-GISEL-TRUE16-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo5687; GFX1100-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]5688;5689; GFX1100-GISEL-FAKE16-LABEL: v_log_f32_from_fpext_f16:5690; GFX1100-GISEL-FAKE16: ; %bb.0:5691; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5692; GFX1100-GISEL-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, v05693; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)5694; GFX1100-GISEL-FAKE16-NEXT: v_log_f32_e32 v0, v05695; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)5696; GFX1100-GISEL-FAKE16-NEXT: v_mul_f32_e32 v1, 0x3f317217, v05697; GFX1100-GISEL-FAKE16-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|5698; GFX1100-GISEL-FAKE16-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v15699; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5700; GFX1100-GISEL-FAKE16-NEXT: v_fmac_f32_e32 v2, 0x3377d1cf, v05701; GFX1100-GISEL-FAKE16-NEXT: v_add_f32_e32 v1, v1, v25702; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)5703; GFX1100-GISEL-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo5704; GFX1100-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]5705;5706; R600-LABEL: v_log_f32_from_fpext_f16:5707; R600: ; %bb.0:5708; R600-NEXT: CF_END5709; R600-NEXT: PAD5710;5711; CM-LABEL: v_log_f32_from_fpext_f16:5712; CM: ; %bb.0:5713; CM-NEXT: CF_END5714; CM-NEXT: PAD5715 %src = bitcast i16 %src.i to half5716 %fpext = fpext half %src to float5717 %result = call float @llvm.log.f32(float %fpext)5718 ret float %result5719}5720 5721define float @v_log_f32_from_fpext_math_f16(i16 %src0.i, i16 %src1.i) {5722; SI-SDAG-LABEL: v_log_f32_from_fpext_math_f16:5723; SI-SDAG: ; %bb.0:5724; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5725; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v05726; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v15727; SI-SDAG-NEXT: s_mov_b32 s4, 0x8000005728; SI-SDAG-NEXT: s_mov_b32 s5, 0x3377d1cf5729; SI-SDAG-NEXT: v_add_f32_e32 v0, v0, v15730; SI-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v05731; SI-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc5732; SI-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v15733; SI-SDAG-NEXT: v_log_f32_e32 v0, v05734; SI-SDAG-NEXT: s_mov_b32 s4, 0x3f3172175735; SI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v05736; SI-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v15737; SI-SDAG-NEXT: v_fma_f32 v2, v0, s5, v25738; SI-SDAG-NEXT: s_mov_b32 s4, 0x7f8000005739; SI-SDAG-NEXT: v_add_f32_e32 v1, v1, v25740; SI-SDAG-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s45741; SI-SDAG-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]5742; SI-SDAG-NEXT: v_mov_b32_e32 v1, 0x41b172185743; SI-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc5744; SI-SDAG-NEXT: v_sub_f32_e32 v0, v0, v15745; SI-SDAG-NEXT: s_setpc_b64 s[30:31]5746;5747; SI-GISEL-LABEL: v_log_f32_from_fpext_math_f16:5748; SI-GISEL: ; %bb.0:5749; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5750; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v05751; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v15752; SI-GISEL-NEXT: v_mov_b32_e32 v2, 0x3377d1cf5753; SI-GISEL-NEXT: v_mov_b32_e32 v3, 0x7f8000005754; SI-GISEL-NEXT: v_add_f32_e32 v0, v0, v15755; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v05756; SI-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172175757; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v05758; SI-GISEL-NEXT: v_log_f32_e32 v0, v05759; SI-GISEL-NEXT: v_mul_f32_e32 v4, 0x3f317217, v05760; SI-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v45761; SI-GISEL-NEXT: v_fma_f32 v1, v0, v2, v15762; SI-GISEL-NEXT: v_add_f32_e32 v1, v4, v15763; SI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v35764; SI-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc5765; SI-GISEL-NEXT: s_setpc_b64 s[30:31]5766;5767; VI-SDAG-LABEL: v_log_f32_from_fpext_math_f16:5768; VI-SDAG: ; %bb.0:5769; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5770; VI-SDAG-NEXT: v_add_f16_e32 v0, v0, v15771; VI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v05772; VI-SDAG-NEXT: s_mov_b32 s4, 0x7f8000005773; VI-SDAG-NEXT: v_log_f32_e32 v0, v05774; VI-SDAG-NEXT: v_and_b32_e32 v1, 0xfffff000, v05775; VI-SDAG-NEXT: v_sub_f32_e32 v2, v0, v15776; VI-SDAG-NEXT: v_mul_f32_e32 v3, 0x3805fdf4, v15777; VI-SDAG-NEXT: v_mul_f32_e32 v4, 0x3f317000, v25778; VI-SDAG-NEXT: v_mul_f32_e32 v2, 0x3805fdf4, v25779; VI-SDAG-NEXT: v_add_f32_e32 v2, v3, v25780; VI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317000, v15781; VI-SDAG-NEXT: v_add_f32_e32 v2, v4, v25782; VI-SDAG-NEXT: v_add_f32_e32 v1, v1, v25783; VI-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s45784; VI-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc5785; VI-SDAG-NEXT: s_setpc_b64 s[30:31]5786;5787; VI-GISEL-LABEL: v_log_f32_from_fpext_math_f16:5788; VI-GISEL: ; %bb.0:5789; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5790; VI-GISEL-NEXT: v_add_f16_e32 v0, v0, v15791; VI-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v05792; VI-GISEL-NEXT: v_mov_b32_e32 v1, 0x7f8000005793; VI-GISEL-NEXT: v_log_f32_e32 v0, v05794; VI-GISEL-NEXT: v_and_b32_e32 v2, 0xfffff000, v05795; VI-GISEL-NEXT: v_sub_f32_e32 v3, v0, v25796; VI-GISEL-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v25797; VI-GISEL-NEXT: v_mul_f32_e32 v5, 0x3805fdf4, v35798; VI-GISEL-NEXT: v_mul_f32_e32 v3, 0x3f317000, v35799; VI-GISEL-NEXT: v_add_f32_e32 v4, v4, v55800; VI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317000, v25801; VI-GISEL-NEXT: v_add_f32_e32 v3, v3, v45802; VI-GISEL-NEXT: v_add_f32_e32 v2, v2, v35803; VI-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v15804; VI-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc5805; VI-GISEL-NEXT: s_setpc_b64 s[30:31]5806;5807; GFX900-SDAG-LABEL: v_log_f32_from_fpext_math_f16:5808; GFX900-SDAG: ; %bb.0:5809; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5810; GFX900-SDAG-NEXT: v_add_f16_e32 v0, v0, v15811; GFX900-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v05812; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x3f3172175813; GFX900-SDAG-NEXT: s_mov_b32 s5, 0x3377d1cf5814; GFX900-SDAG-NEXT: s_mov_b32 s6, 0x7f8000005815; GFX900-SDAG-NEXT: v_log_f32_e32 v0, v05816; GFX900-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317217, v05817; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s4, -v15818; GFX900-SDAG-NEXT: v_fma_f32 v2, v0, s5, v25819; GFX900-SDAG-NEXT: v_add_f32_e32 v1, v1, v25820; GFX900-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s65821; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc5822; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]5823;5824; GFX900-GISEL-LABEL: v_log_f32_from_fpext_math_f16:5825; GFX900-GISEL: ; %bb.0:5826; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5827; GFX900-GISEL-NEXT: v_add_f16_e32 v0, v0, v15828; GFX900-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v05829; GFX900-GISEL-NEXT: v_mov_b32_e32 v1, 0x3f3172175830; GFX900-GISEL-NEXT: v_mov_b32_e32 v2, 0x3377d1cf5831; GFX900-GISEL-NEXT: v_mov_b32_e32 v3, 0x7f8000005832; GFX900-GISEL-NEXT: v_log_f32_e32 v0, v05833; GFX900-GISEL-NEXT: v_mul_f32_e32 v4, 0x3f317217, v05834; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v1, -v45835; GFX900-GISEL-NEXT: v_fma_f32 v1, v0, v2, v15836; GFX900-GISEL-NEXT: v_add_f32_e32 v1, v4, v15837; GFX900-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v35838; GFX900-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc5839; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]5840;5841; GFX1100-SDAG-TRUE16-LABEL: v_log_f32_from_fpext_math_f16:5842; GFX1100-SDAG-TRUE16: ; %bb.0:5843; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5844; GFX1100-SDAG-TRUE16-NEXT: v_add_f16_e32 v0.l, v0.l, v1.l5845; GFX1100-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5846; GFX1100-SDAG-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.l5847; GFX1100-SDAG-TRUE16-NEXT: v_log_f32_e32 v0, v05848; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)5849; GFX1100-SDAG-TRUE16-NEXT: v_mul_f32_e32 v1, 0x3f317217, v05850; GFX1100-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|5851; GFX1100-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)5852; GFX1100-SDAG-TRUE16-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v15853; GFX1100-SDAG-TRUE16-NEXT: v_fmamk_f32 v2, v0, 0x3377d1cf, v25854; GFX1100-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5855; GFX1100-SDAG-TRUE16-NEXT: v_add_f32_e32 v1, v1, v25856; GFX1100-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo5857; GFX1100-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]5858;5859; GFX1100-SDAG-FAKE16-LABEL: v_log_f32_from_fpext_math_f16:5860; GFX1100-SDAG-FAKE16: ; %bb.0:5861; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5862; GFX1100-SDAG-FAKE16-NEXT: v_add_f16_e32 v0, v0, v15863; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5864; GFX1100-SDAG-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, v05865; GFX1100-SDAG-FAKE16-NEXT: v_log_f32_e32 v0, v05866; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)5867; GFX1100-SDAG-FAKE16-NEXT: v_mul_f32_e32 v1, 0x3f317217, v05868; GFX1100-SDAG-FAKE16-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|5869; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)5870; GFX1100-SDAG-FAKE16-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v15871; GFX1100-SDAG-FAKE16-NEXT: v_fmamk_f32 v2, v0, 0x3377d1cf, v25872; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5873; GFX1100-SDAG-FAKE16-NEXT: v_add_f32_e32 v1, v1, v25874; GFX1100-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo5875; GFX1100-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]5876;5877; GFX1100-GISEL-TRUE16-LABEL: v_log_f32_from_fpext_math_f16:5878; GFX1100-GISEL-TRUE16: ; %bb.0:5879; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5880; GFX1100-GISEL-TRUE16-NEXT: v_add_f16_e32 v0.l, v0.l, v1.l5881; GFX1100-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5882; GFX1100-GISEL-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.l5883; GFX1100-GISEL-TRUE16-NEXT: v_log_f32_e32 v0, v05884; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)5885; GFX1100-GISEL-TRUE16-NEXT: v_mul_f32_e32 v1, 0x3f317217, v05886; GFX1100-GISEL-TRUE16-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|5887; GFX1100-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)5888; GFX1100-GISEL-TRUE16-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v15889; GFX1100-GISEL-TRUE16-NEXT: v_fmac_f32_e32 v2, 0x3377d1cf, v05890; GFX1100-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5891; GFX1100-GISEL-TRUE16-NEXT: v_add_f32_e32 v1, v1, v25892; GFX1100-GISEL-TRUE16-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo5893; GFX1100-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]5894;5895; GFX1100-GISEL-FAKE16-LABEL: v_log_f32_from_fpext_math_f16:5896; GFX1100-GISEL-FAKE16: ; %bb.0:5897; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5898; GFX1100-GISEL-FAKE16-NEXT: v_add_f16_e32 v0, v0, v15899; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5900; GFX1100-GISEL-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, v05901; GFX1100-GISEL-FAKE16-NEXT: v_log_f32_e32 v0, v05902; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)5903; GFX1100-GISEL-FAKE16-NEXT: v_mul_f32_e32 v1, 0x3f317217, v05904; GFX1100-GISEL-FAKE16-NEXT: v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|5905; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)5906; GFX1100-GISEL-FAKE16-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v15907; GFX1100-GISEL-FAKE16-NEXT: v_fmac_f32_e32 v2, 0x3377d1cf, v05908; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)5909; GFX1100-GISEL-FAKE16-NEXT: v_add_f32_e32 v1, v1, v25910; GFX1100-GISEL-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo5911; GFX1100-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]5912;5913; R600-LABEL: v_log_f32_from_fpext_math_f16:5914; R600: ; %bb.0:5915; R600-NEXT: CF_END5916; R600-NEXT: PAD5917;5918; CM-LABEL: v_log_f32_from_fpext_math_f16:5919; CM: ; %bb.0:5920; CM-NEXT: CF_END5921; CM-NEXT: PAD5922 %src0 = bitcast i16 %src0.i to half5923 %src1 = bitcast i16 %src1.i to half5924 %fadd = fadd half %src0, %src15925 %fpext = fpext half %fadd to float5926 %result = call float @llvm.log.f32(float %fpext)5927 ret float %result5928}5929 5930define float @v_log_f32_from_fpext_bf16(bfloat %src) {5931; SI-LABEL: v_log_f32_from_fpext_bf16:5932; SI: ; %bb.0:5933; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5934; SI-NEXT: s_mov_b32 s4, 0x8000005935; SI-NEXT: v_cmp_gt_f32_e32 vcc, s4, v05936; SI-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc5937; SI-NEXT: v_ldexp_f32_e32 v0, v0, v15938; SI-NEXT: v_log_f32_e32 v0, v05939; SI-NEXT: s_mov_b32 s4, 0x3f3172175940; SI-NEXT: v_mul_f32_e32 v1, 0x3f317217, v05941; SI-NEXT: v_fma_f32 v2, v0, s4, -v15942; SI-NEXT: s_mov_b32 s4, 0x3377d1cf5943; SI-NEXT: v_fma_f32 v2, v0, s4, v25944; SI-NEXT: s_mov_b32 s4, 0x7f8000005945; SI-NEXT: v_add_f32_e32 v1, v1, v25946; SI-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s45947; SI-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]5948; SI-NEXT: v_mov_b32_e32 v1, 0x41b172185949; SI-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc5950; SI-NEXT: v_sub_f32_e32 v0, v0, v15951; SI-NEXT: s_setpc_b64 s[30:31]5952;5953; VI-LABEL: v_log_f32_from_fpext_bf16:5954; VI: ; %bb.0:5955; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5956; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v05957; VI-NEXT: s_mov_b32 s4, 0x8000005958; VI-NEXT: v_cmp_gt_f32_e32 vcc, s4, v05959; VI-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc5960; VI-NEXT: v_ldexp_f32 v0, v0, v15961; VI-NEXT: v_log_f32_e32 v0, v05962; VI-NEXT: s_mov_b32 s4, 0x7f8000005963; VI-NEXT: v_and_b32_e32 v1, 0xfffff000, v05964; VI-NEXT: v_sub_f32_e32 v2, v0, v15965; VI-NEXT: v_mul_f32_e32 v3, 0x3f317000, v25966; VI-NEXT: v_mul_f32_e32 v2, 0x3805fdf4, v25967; VI-NEXT: v_mul_f32_e32 v4, 0x3805fdf4, v15968; VI-NEXT: v_add_f32_e32 v2, v4, v25969; VI-NEXT: v_add_f32_e32 v2, v3, v25970; VI-NEXT: v_mul_f32_e32 v1, 0x3f317000, v15971; VI-NEXT: v_add_f32_e32 v1, v1, v25972; VI-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s45973; VI-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]5974; VI-NEXT: v_mov_b32_e32 v1, 0x41b172185975; VI-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc5976; VI-NEXT: v_sub_f32_e32 v0, v0, v15977; VI-NEXT: s_setpc_b64 s[30:31]5978;5979; GFX900-LABEL: v_log_f32_from_fpext_bf16:5980; GFX900: ; %bb.0:5981; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5982; GFX900-NEXT: v_lshlrev_b32_e32 v0, 16, v05983; GFX900-NEXT: s_mov_b32 s4, 0x8000005984; GFX900-NEXT: v_cmp_gt_f32_e32 vcc, s4, v05985; GFX900-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc5986; GFX900-NEXT: v_ldexp_f32 v0, v0, v15987; GFX900-NEXT: v_log_f32_e32 v0, v05988; GFX900-NEXT: s_mov_b32 s4, 0x3f3172175989; GFX900-NEXT: v_mul_f32_e32 v1, 0x3f317217, v05990; GFX900-NEXT: v_fma_f32 v2, v0, s4, -v15991; GFX900-NEXT: s_mov_b32 s4, 0x3377d1cf5992; GFX900-NEXT: v_fma_f32 v2, v0, s4, v25993; GFX900-NEXT: s_mov_b32 s4, 0x7f8000005994; GFX900-NEXT: v_add_f32_e32 v1, v1, v25995; GFX900-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s45996; GFX900-NEXT: v_cndmask_b32_e64 v0, v0, v1, s[4:5]5997; GFX900-NEXT: v_mov_b32_e32 v1, 0x41b172185998; GFX900-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc5999; GFX900-NEXT: v_sub_f32_e32 v0, v0, v16000; GFX900-NEXT: s_setpc_b64 s[30:31]6001;6002; GFX1100-SDAG-TRUE16-LABEL: v_log_f32_from_fpext_bf16:6003; GFX1100-SDAG-TRUE16: ; %bb.0:6004; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6005; GFX1100-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.l, 06006; GFX1100-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.h, v0.l6007; GFX1100-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)6008; GFX1100-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v16009; GFX1100-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 32, vcc_lo6010; GFX1100-SDAG-TRUE16-NEXT: v_ldexp_f32 v0, v1, v06011; GFX1100-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)6012; GFX1100-SDAG-TRUE16-NEXT: v_log_f32_e32 v0, v06013; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6014; GFX1100-SDAG-TRUE16-NEXT: v_mul_f32_e32 v1, 0x3f317217, v06015; GFX1100-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|6016; GFX1100-SDAG-TRUE16-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v16017; GFX1100-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)6018; GFX1100-SDAG-TRUE16-NEXT: v_fmamk_f32 v2, v0, 0x3377d1cf, v26019; GFX1100-SDAG-TRUE16-NEXT: v_add_f32_e32 v1, v1, v26020; GFX1100-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)6021; GFX1100-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v0, v0, v1, s06022; GFX1100-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo6023; GFX1100-SDAG-TRUE16-NEXT: v_sub_f32_e32 v0, v0, v16024; GFX1100-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]6025;6026; GFX1100-SDAG-FAKE16-LABEL: v_log_f32_from_fpext_bf16:6027; GFX1100-SDAG-FAKE16: ; %bb.0:6028; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6029; GFX1100-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v06030; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)6031; GFX1100-SDAG-FAKE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v06032; GFX1100-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc_lo6033; GFX1100-SDAG-FAKE16-NEXT: v_ldexp_f32 v0, v0, v16034; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)6035; GFX1100-SDAG-FAKE16-NEXT: v_log_f32_e32 v0, v06036; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6037; GFX1100-SDAG-FAKE16-NEXT: v_mul_f32_e32 v1, 0x3f317217, v06038; GFX1100-SDAG-FAKE16-NEXT: v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|6039; GFX1100-SDAG-FAKE16-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v16040; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)6041; GFX1100-SDAG-FAKE16-NEXT: v_fmamk_f32 v2, v0, 0x3377d1cf, v26042; GFX1100-SDAG-FAKE16-NEXT: v_add_f32_e32 v1, v1, v26043; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)6044; GFX1100-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v0, v0, v1, s06045; GFX1100-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo6046; GFX1100-SDAG-FAKE16-NEXT: v_sub_f32_e32 v0, v0, v16047; GFX1100-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]6048;6049; GFX1100-GISEL-TRUE16-LABEL: v_log_f32_from_fpext_bf16:6050; GFX1100-GISEL-TRUE16: ; %bb.0:6051; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6052; GFX1100-GISEL-TRUE16-NEXT: v_mov_b16_e32 v1.l, 06053; GFX1100-GISEL-TRUE16-NEXT: v_mov_b16_e32 v1.h, v0.l6054; GFX1100-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)6055; GFX1100-GISEL-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v16056; GFX1100-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 32, vcc_lo6057; GFX1100-GISEL-TRUE16-NEXT: v_ldexp_f32 v0, v1, v06058; GFX1100-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)6059; GFX1100-GISEL-TRUE16-NEXT: v_log_f32_e32 v0, v06060; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6061; GFX1100-GISEL-TRUE16-NEXT: v_mul_f32_e32 v1, 0x3f317217, v06062; GFX1100-GISEL-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|6063; GFX1100-GISEL-TRUE16-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v16064; GFX1100-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)6065; GFX1100-GISEL-TRUE16-NEXT: v_fmamk_f32 v2, v0, 0x3377d1cf, v26066; GFX1100-GISEL-TRUE16-NEXT: v_add_f32_e32 v1, v1, v26067; GFX1100-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)6068; GFX1100-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, v0, v1, s06069; GFX1100-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo6070; GFX1100-GISEL-TRUE16-NEXT: v_sub_f32_e32 v0, v0, v16071; GFX1100-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]6072;6073; GFX1100-GISEL-FAKE16-LABEL: v_log_f32_from_fpext_bf16:6074; GFX1100-GISEL-FAKE16: ; %bb.0:6075; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6076; GFX1100-GISEL-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v06077; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)6078; GFX1100-GISEL-FAKE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0x800000, v06079; GFX1100-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc_lo6080; GFX1100-GISEL-FAKE16-NEXT: v_ldexp_f32 v0, v0, v16081; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)6082; GFX1100-GISEL-FAKE16-NEXT: v_log_f32_e32 v0, v06083; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6084; GFX1100-GISEL-FAKE16-NEXT: v_mul_f32_e32 v1, 0x3f317217, v06085; GFX1100-GISEL-FAKE16-NEXT: v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|6086; GFX1100-GISEL-FAKE16-NEXT: v_fma_f32 v2, 0x3f317217, v0, -v16087; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)6088; GFX1100-GISEL-FAKE16-NEXT: v_fmamk_f32 v2, v0, 0x3377d1cf, v26089; GFX1100-GISEL-FAKE16-NEXT: v_add_f32_e32 v1, v1, v26090; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)6091; GFX1100-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v0, v0, v1, s06092; GFX1100-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo6093; GFX1100-GISEL-FAKE16-NEXT: v_sub_f32_e32 v0, v0, v16094; GFX1100-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]6095;6096; R600-LABEL: v_log_f32_from_fpext_bf16:6097; R600: ; %bb.0:6098; R600-NEXT: CF_END6099; R600-NEXT: PAD6100;6101; CM-LABEL: v_log_f32_from_fpext_bf16:6102; CM: ; %bb.0:6103; CM-NEXT: CF_END6104; CM-NEXT: PAD6105 %fpext = fpext bfloat %src to float6106 %result = call float @llvm.log.f32(float %fpext)6107 ret float %result6108}6109 6110define half @v_log_f16(half %in) {6111; SI-SDAG-LABEL: v_log_f16:6112; SI-SDAG: ; %bb.0:6113; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6114; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v06115; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v06116; SI-SDAG-NEXT: v_log_f32_e32 v0, v06117; SI-SDAG-NEXT: v_mul_f32_e32 v0, 0x3f317218, v06118; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v06119; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v06120; SI-SDAG-NEXT: s_setpc_b64 s[30:31]6121;6122; SI-GISEL-LABEL: v_log_f16:6123; SI-GISEL: ; %bb.0:6124; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6125; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v06126; SI-GISEL-NEXT: v_log_f32_e32 v0, v06127; SI-GISEL-NEXT: v_mul_f32_e32 v0, 0x3f317218, v06128; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v06129; SI-GISEL-NEXT: s_setpc_b64 s[30:31]6130;6131; VI-LABEL: v_log_f16:6132; VI: ; %bb.0:6133; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6134; VI-NEXT: v_log_f16_e32 v0, v06135; VI-NEXT: v_mul_f16_e32 v0, 0x398c, v06136; VI-NEXT: s_setpc_b64 s[30:31]6137;6138; GFX900-LABEL: v_log_f16:6139; GFX900: ; %bb.0:6140; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6141; GFX900-NEXT: v_log_f16_e32 v0, v06142; GFX900-NEXT: v_mul_f16_e32 v0, 0x398c, v06143; GFX900-NEXT: s_setpc_b64 s[30:31]6144;6145; GFX1100-SDAG-TRUE16-LABEL: v_log_f16:6146; GFX1100-SDAG-TRUE16: ; %bb.0:6147; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6148; GFX1100-SDAG-TRUE16-NEXT: v_log_f16_e32 v0.l, v0.l6149; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6150; GFX1100-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x398c, v0.l6151; GFX1100-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]6152;6153; GFX1100-SDAG-FAKE16-LABEL: v_log_f16:6154; GFX1100-SDAG-FAKE16: ; %bb.0:6155; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6156; GFX1100-SDAG-FAKE16-NEXT: v_log_f16_e32 v0, v06157; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6158; GFX1100-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0x398c, v06159; GFX1100-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]6160;6161; GFX1100-GISEL-TRUE16-LABEL: v_log_f16:6162; GFX1100-GISEL-TRUE16: ; %bb.0:6163; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6164; GFX1100-GISEL-TRUE16-NEXT: v_log_f16_e32 v0.l, v0.l6165; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6166; GFX1100-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x398c, v0.l6167; GFX1100-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]6168;6169; GFX1100-GISEL-FAKE16-LABEL: v_log_f16:6170; GFX1100-GISEL-FAKE16: ; %bb.0:6171; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6172; GFX1100-GISEL-FAKE16-NEXT: v_log_f16_e32 v0, v06173; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6174; GFX1100-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0x398c, v06175; GFX1100-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]6176;6177; R600-LABEL: v_log_f16:6178; R600: ; %bb.0:6179; R600-NEXT: CF_END6180; R600-NEXT: PAD6181;6182; CM-LABEL: v_log_f16:6183; CM: ; %bb.0:6184; CM-NEXT: CF_END6185; CM-NEXT: PAD6186 %result = call half @llvm.log.f16(half %in)6187 ret half %result6188}6189 6190define half @v_log_fabs_f16(half %in) {6191; SI-SDAG-LABEL: v_log_fabs_f16:6192; SI-SDAG: ; %bb.0:6193; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6194; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v06195; SI-SDAG-NEXT: v_cvt_f32_f16_e64 v0, |v0|6196; SI-SDAG-NEXT: v_log_f32_e32 v0, v06197; SI-SDAG-NEXT: v_mul_f32_e32 v0, 0x3f317218, v06198; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v06199; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v06200; SI-SDAG-NEXT: s_setpc_b64 s[30:31]6201;6202; SI-GISEL-LABEL: v_log_fabs_f16:6203; SI-GISEL: ; %bb.0:6204; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6205; SI-GISEL-NEXT: v_cvt_f32_f16_e64 v0, |v0|6206; SI-GISEL-NEXT: v_log_f32_e32 v0, v06207; SI-GISEL-NEXT: v_mul_f32_e32 v0, 0x3f317218, v06208; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v06209; SI-GISEL-NEXT: s_setpc_b64 s[30:31]6210;6211; VI-LABEL: v_log_fabs_f16:6212; VI: ; %bb.0:6213; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6214; VI-NEXT: v_log_f16_e64 v0, |v0|6215; VI-NEXT: v_mul_f16_e32 v0, 0x398c, v06216; VI-NEXT: s_setpc_b64 s[30:31]6217;6218; GFX900-LABEL: v_log_fabs_f16:6219; GFX900: ; %bb.0:6220; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6221; GFX900-NEXT: v_log_f16_e64 v0, |v0|6222; GFX900-NEXT: v_mul_f16_e32 v0, 0x398c, v06223; GFX900-NEXT: s_setpc_b64 s[30:31]6224;6225; GFX1100-SDAG-TRUE16-LABEL: v_log_fabs_f16:6226; GFX1100-SDAG-TRUE16: ; %bb.0:6227; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6228; GFX1100-SDAG-TRUE16-NEXT: v_log_f16_e64 v0.l, |v0.l|6229; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6230; GFX1100-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x398c, v0.l6231; GFX1100-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]6232;6233; GFX1100-SDAG-FAKE16-LABEL: v_log_fabs_f16:6234; GFX1100-SDAG-FAKE16: ; %bb.0:6235; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6236; GFX1100-SDAG-FAKE16-NEXT: v_log_f16_e64 v0, |v0|6237; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6238; GFX1100-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0x398c, v06239; GFX1100-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]6240;6241; GFX1100-GISEL-TRUE16-LABEL: v_log_fabs_f16:6242; GFX1100-GISEL-TRUE16: ; %bb.0:6243; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6244; GFX1100-GISEL-TRUE16-NEXT: v_log_f16_e64 v0.l, |v0.l|6245; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6246; GFX1100-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x398c, v0.l6247; GFX1100-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]6248;6249; GFX1100-GISEL-FAKE16-LABEL: v_log_fabs_f16:6250; GFX1100-GISEL-FAKE16: ; %bb.0:6251; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6252; GFX1100-GISEL-FAKE16-NEXT: v_log_f16_e64 v0, |v0|6253; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6254; GFX1100-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0x398c, v06255; GFX1100-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]6256;6257; R600-LABEL: v_log_fabs_f16:6258; R600: ; %bb.0:6259; R600-NEXT: CF_END6260; R600-NEXT: PAD6261;6262; CM-LABEL: v_log_fabs_f16:6263; CM: ; %bb.0:6264; CM-NEXT: CF_END6265; CM-NEXT: PAD6266 %fabs = call half @llvm.fabs.f16(half %in)6267 %result = call half @llvm.log.f16(half %fabs)6268 ret half %result6269}6270 6271define half @v_log_fneg_fabs_f16(half %in) {6272; SI-SDAG-LABEL: v_log_fneg_fabs_f16:6273; SI-SDAG: ; %bb.0:6274; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6275; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v06276; SI-SDAG-NEXT: v_cvt_f32_f16_e64 v0, -|v0|6277; SI-SDAG-NEXT: v_log_f32_e32 v0, v06278; SI-SDAG-NEXT: v_mul_f32_e32 v0, 0x3f317218, v06279; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v06280; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v06281; SI-SDAG-NEXT: s_setpc_b64 s[30:31]6282;6283; SI-GISEL-LABEL: v_log_fneg_fabs_f16:6284; SI-GISEL: ; %bb.0:6285; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6286; SI-GISEL-NEXT: v_cvt_f32_f16_e64 v0, -|v0|6287; SI-GISEL-NEXT: v_log_f32_e32 v0, v06288; SI-GISEL-NEXT: v_mul_f32_e32 v0, 0x3f317218, v06289; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v06290; SI-GISEL-NEXT: s_setpc_b64 s[30:31]6291;6292; VI-LABEL: v_log_fneg_fabs_f16:6293; VI: ; %bb.0:6294; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6295; VI-NEXT: v_log_f16_e64 v0, -|v0|6296; VI-NEXT: v_mul_f16_e32 v0, 0x398c, v06297; VI-NEXT: s_setpc_b64 s[30:31]6298;6299; GFX900-LABEL: v_log_fneg_fabs_f16:6300; GFX900: ; %bb.0:6301; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6302; GFX900-NEXT: v_log_f16_e64 v0, -|v0|6303; GFX900-NEXT: v_mul_f16_e32 v0, 0x398c, v06304; GFX900-NEXT: s_setpc_b64 s[30:31]6305;6306; GFX1100-SDAG-TRUE16-LABEL: v_log_fneg_fabs_f16:6307; GFX1100-SDAG-TRUE16: ; %bb.0:6308; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6309; GFX1100-SDAG-TRUE16-NEXT: v_log_f16_e64 v0.l, -|v0.l|6310; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6311; GFX1100-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x398c, v0.l6312; GFX1100-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]6313;6314; GFX1100-SDAG-FAKE16-LABEL: v_log_fneg_fabs_f16:6315; GFX1100-SDAG-FAKE16: ; %bb.0:6316; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6317; GFX1100-SDAG-FAKE16-NEXT: v_log_f16_e64 v0, -|v0|6318; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6319; GFX1100-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0x398c, v06320; GFX1100-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]6321;6322; GFX1100-GISEL-TRUE16-LABEL: v_log_fneg_fabs_f16:6323; GFX1100-GISEL-TRUE16: ; %bb.0:6324; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6325; GFX1100-GISEL-TRUE16-NEXT: v_log_f16_e64 v0.l, -|v0.l|6326; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6327; GFX1100-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x398c, v0.l6328; GFX1100-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]6329;6330; GFX1100-GISEL-FAKE16-LABEL: v_log_fneg_fabs_f16:6331; GFX1100-GISEL-FAKE16: ; %bb.0:6332; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6333; GFX1100-GISEL-FAKE16-NEXT: v_log_f16_e64 v0, -|v0|6334; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6335; GFX1100-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0x398c, v06336; GFX1100-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]6337;6338; R600-LABEL: v_log_fneg_fabs_f16:6339; R600: ; %bb.0:6340; R600-NEXT: CF_END6341; R600-NEXT: PAD6342;6343; CM-LABEL: v_log_fneg_fabs_f16:6344; CM: ; %bb.0:6345; CM-NEXT: CF_END6346; CM-NEXT: PAD6347 %fabs = call half @llvm.fabs.f16(half %in)6348 %fneg.fabs = fneg half %fabs6349 %result = call half @llvm.log.f16(half %fneg.fabs)6350 ret half %result6351}6352 6353define half @v_log_fneg_f16(half %in) {6354; SI-SDAG-LABEL: v_log_fneg_f16:6355; SI-SDAG: ; %bb.0:6356; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6357; SI-SDAG-NEXT: v_cvt_f16_f32_e64 v0, -v06358; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v06359; SI-SDAG-NEXT: v_log_f32_e32 v0, v06360; SI-SDAG-NEXT: v_mul_f32_e32 v0, 0x3f317218, v06361; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v06362; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v06363; SI-SDAG-NEXT: s_setpc_b64 s[30:31]6364;6365; SI-GISEL-LABEL: v_log_fneg_f16:6366; SI-GISEL: ; %bb.0:6367; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6368; SI-GISEL-NEXT: v_cvt_f32_f16_e64 v0, -v06369; SI-GISEL-NEXT: v_log_f32_e32 v0, v06370; SI-GISEL-NEXT: v_mul_f32_e32 v0, 0x3f317218, v06371; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v06372; SI-GISEL-NEXT: s_setpc_b64 s[30:31]6373;6374; VI-LABEL: v_log_fneg_f16:6375; VI: ; %bb.0:6376; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6377; VI-NEXT: v_log_f16_e64 v0, -v06378; VI-NEXT: v_mul_f16_e32 v0, 0x398c, v06379; VI-NEXT: s_setpc_b64 s[30:31]6380;6381; GFX900-LABEL: v_log_fneg_f16:6382; GFX900: ; %bb.0:6383; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6384; GFX900-NEXT: v_log_f16_e64 v0, -v06385; GFX900-NEXT: v_mul_f16_e32 v0, 0x398c, v06386; GFX900-NEXT: s_setpc_b64 s[30:31]6387;6388; GFX1100-SDAG-TRUE16-LABEL: v_log_fneg_f16:6389; GFX1100-SDAG-TRUE16: ; %bb.0:6390; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6391; GFX1100-SDAG-TRUE16-NEXT: v_log_f16_e64 v0.l, -v0.l6392; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6393; GFX1100-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x398c, v0.l6394; GFX1100-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]6395;6396; GFX1100-SDAG-FAKE16-LABEL: v_log_fneg_f16:6397; GFX1100-SDAG-FAKE16: ; %bb.0:6398; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6399; GFX1100-SDAG-FAKE16-NEXT: v_log_f16_e64 v0, -v06400; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6401; GFX1100-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0x398c, v06402; GFX1100-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]6403;6404; GFX1100-GISEL-TRUE16-LABEL: v_log_fneg_f16:6405; GFX1100-GISEL-TRUE16: ; %bb.0:6406; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6407; GFX1100-GISEL-TRUE16-NEXT: v_log_f16_e64 v0.l, -v0.l6408; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6409; GFX1100-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x398c, v0.l6410; GFX1100-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]6411;6412; GFX1100-GISEL-FAKE16-LABEL: v_log_fneg_f16:6413; GFX1100-GISEL-FAKE16: ; %bb.0:6414; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6415; GFX1100-GISEL-FAKE16-NEXT: v_log_f16_e64 v0, -v06416; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6417; GFX1100-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0x398c, v06418; GFX1100-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]6419;6420; R600-LABEL: v_log_fneg_f16:6421; R600: ; %bb.0:6422; R600-NEXT: CF_END6423; R600-NEXT: PAD6424;6425; CM-LABEL: v_log_fneg_f16:6426; CM: ; %bb.0:6427; CM-NEXT: CF_END6428; CM-NEXT: PAD6429 %fneg = fneg half %in6430 %result = call half @llvm.log.f16(half %fneg)6431 ret half %result6432}6433 6434define half @v_log_f16_fast(half %in) {6435; SI-SDAG-LABEL: v_log_f16_fast:6436; SI-SDAG: ; %bb.0:6437; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6438; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v06439; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v06440; SI-SDAG-NEXT: v_log_f32_e32 v0, v06441; SI-SDAG-NEXT: v_mul_f32_e32 v0, 0x3f317218, v06442; SI-SDAG-NEXT: s_setpc_b64 s[30:31]6443;6444; SI-GISEL-LABEL: v_log_f16_fast:6445; SI-GISEL: ; %bb.0:6446; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6447; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v06448; SI-GISEL-NEXT: v_log_f32_e32 v0, v06449; SI-GISEL-NEXT: v_mul_f32_e32 v0, 0x3f317218, v06450; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v06451; SI-GISEL-NEXT: s_setpc_b64 s[30:31]6452;6453; VI-LABEL: v_log_f16_fast:6454; VI: ; %bb.0:6455; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6456; VI-NEXT: v_log_f16_e32 v0, v06457; VI-NEXT: v_mul_f16_e32 v0, 0x398c, v06458; VI-NEXT: s_setpc_b64 s[30:31]6459;6460; GFX900-LABEL: v_log_f16_fast:6461; GFX900: ; %bb.0:6462; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6463; GFX900-NEXT: v_log_f16_e32 v0, v06464; GFX900-NEXT: v_mul_f16_e32 v0, 0x398c, v06465; GFX900-NEXT: s_setpc_b64 s[30:31]6466;6467; GFX1100-SDAG-TRUE16-LABEL: v_log_f16_fast:6468; GFX1100-SDAG-TRUE16: ; %bb.0:6469; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6470; GFX1100-SDAG-TRUE16-NEXT: v_log_f16_e32 v0.l, v0.l6471; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6472; GFX1100-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x398c, v0.l6473; GFX1100-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]6474;6475; GFX1100-SDAG-FAKE16-LABEL: v_log_f16_fast:6476; GFX1100-SDAG-FAKE16: ; %bb.0:6477; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6478; GFX1100-SDAG-FAKE16-NEXT: v_log_f16_e32 v0, v06479; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6480; GFX1100-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0x398c, v06481; GFX1100-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]6482;6483; GFX1100-GISEL-TRUE16-LABEL: v_log_f16_fast:6484; GFX1100-GISEL-TRUE16: ; %bb.0:6485; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6486; GFX1100-GISEL-TRUE16-NEXT: v_log_f16_e32 v0.l, v0.l6487; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6488; GFX1100-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x398c, v0.l6489; GFX1100-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]6490;6491; GFX1100-GISEL-FAKE16-LABEL: v_log_f16_fast:6492; GFX1100-GISEL-FAKE16: ; %bb.0:6493; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6494; GFX1100-GISEL-FAKE16-NEXT: v_log_f16_e32 v0, v06495; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6496; GFX1100-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0x398c, v06497; GFX1100-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]6498;6499; R600-LABEL: v_log_f16_fast:6500; R600: ; %bb.0:6501; R600-NEXT: CF_END6502; R600-NEXT: PAD6503;6504; CM-LABEL: v_log_f16_fast:6505; CM: ; %bb.0:6506; CM-NEXT: CF_END6507; CM-NEXT: PAD6508 %result = call fast half @llvm.log.f16(half %in)6509 ret half %result6510}6511 6512define <2 x half> @v_log_v2f16(<2 x half> %in) {6513; SI-SDAG-LABEL: v_log_v2f16:6514; SI-SDAG: ; %bb.0:6515; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6516; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v06517; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v16518; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v06519; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v16520; SI-SDAG-NEXT: v_log_f32_e32 v0, v06521; SI-SDAG-NEXT: v_log_f32_e32 v1, v16522; SI-SDAG-NEXT: v_mul_f32_e32 v0, 0x3f317218, v06523; SI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317218, v16524; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v06525; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v16526; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v06527; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v16528; SI-SDAG-NEXT: s_setpc_b64 s[30:31]6529;6530; SI-GISEL-LABEL: v_log_v2f16:6531; SI-GISEL: ; %bb.0:6532; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6533; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v06534; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v16535; SI-GISEL-NEXT: v_log_f32_e32 v0, v06536; SI-GISEL-NEXT: v_log_f32_e32 v1, v16537; SI-GISEL-NEXT: v_mul_f32_e32 v0, 0x3f317218, v06538; SI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317218, v16539; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v06540; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v16541; SI-GISEL-NEXT: s_setpc_b64 s[30:31]6542;6543; VI-SDAG-LABEL: v_log_v2f16:6544; VI-SDAG: ; %bb.0:6545; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6546; VI-SDAG-NEXT: v_log_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_16547; VI-SDAG-NEXT: v_log_f16_e32 v0, v06548; VI-SDAG-NEXT: v_mov_b32_e32 v2, 0x398c6549; VI-SDAG-NEXT: v_mul_f16_sdwa v1, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD6550; VI-SDAG-NEXT: v_mul_f16_e32 v0, 0x398c, v06551; VI-SDAG-NEXT: v_or_b32_e32 v0, v0, v16552; VI-SDAG-NEXT: s_setpc_b64 s[30:31]6553;6554; VI-GISEL-LABEL: v_log_v2f16:6555; VI-GISEL: ; %bb.0:6556; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6557; VI-GISEL-NEXT: v_log_f16_e32 v1, v06558; VI-GISEL-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_16559; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x398c6560; VI-GISEL-NEXT: v_mul_f16_e32 v1, 0x398c, v16561; VI-GISEL-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD6562; VI-GISEL-NEXT: v_or_b32_e32 v0, v1, v06563; VI-GISEL-NEXT: s_setpc_b64 s[30:31]6564;6565; GFX900-LABEL: v_log_v2f16:6566; GFX900: ; %bb.0:6567; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6568; GFX900-NEXT: v_log_f16_e32 v1, v06569; GFX900-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_16570; GFX900-NEXT: v_mul_f16_e32 v1, 0x398c, v16571; GFX900-NEXT: v_mul_f16_e32 v0, 0x398c, v06572; GFX900-NEXT: v_pack_b32_f16 v0, v1, v06573; GFX900-NEXT: s_setpc_b64 s[30:31]6574;6575; GFX1100-SDAG-TRUE16-LABEL: v_log_v2f16:6576; GFX1100-SDAG-TRUE16: ; %bb.0:6577; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6578; GFX1100-SDAG-TRUE16-NEXT: v_log_f16_e32 v0.l, v0.l6579; GFX1100-SDAG-TRUE16-NEXT: v_log_f16_e32 v0.h, v0.h6580; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6581; GFX1100-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x398c, v0.l6582; GFX1100-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.h, 0x398c, v0.h6583; GFX1100-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)6584; GFX1100-SDAG-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h6585; GFX1100-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]6586;6587; GFX1100-SDAG-FAKE16-LABEL: v_log_v2f16:6588; GFX1100-SDAG-FAKE16: ; %bb.0:6589; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6590; GFX1100-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v06591; GFX1100-SDAG-FAKE16-NEXT: v_log_f16_e32 v0, v06592; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)6593; GFX1100-SDAG-FAKE16-NEXT: v_log_f16_e32 v1, v16594; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6595; GFX1100-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0x398c, v06596; GFX1100-SDAG-FAKE16-NEXT: v_mul_f16_e32 v1, 0x398c, v16597; GFX1100-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v16598; GFX1100-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]6599;6600; GFX1100-GISEL-TRUE16-LABEL: v_log_v2f16:6601; GFX1100-GISEL-TRUE16: ; %bb.0:6602; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6603; GFX1100-GISEL-TRUE16-NEXT: v_log_f16_e32 v0.l, v0.l6604; GFX1100-GISEL-TRUE16-NEXT: v_log_f16_e32 v0.h, v0.h6605; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6606; GFX1100-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x398c, v0.l6607; GFX1100-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.h, 0x398c, v0.h6608; GFX1100-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)6609; GFX1100-GISEL-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h6610; GFX1100-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]6611;6612; GFX1100-GISEL-FAKE16-LABEL: v_log_v2f16:6613; GFX1100-GISEL-FAKE16: ; %bb.0:6614; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6615; GFX1100-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v06616; GFX1100-GISEL-FAKE16-NEXT: v_log_f16_e32 v0, v06617; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)6618; GFX1100-GISEL-FAKE16-NEXT: v_log_f16_e32 v1, v16619; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6620; GFX1100-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0x398c, v06621; GFX1100-GISEL-FAKE16-NEXT: v_mul_f16_e32 v1, 0x398c, v16622; GFX1100-GISEL-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v16623; GFX1100-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]6624;6625; R600-LABEL: v_log_v2f16:6626; R600: ; %bb.0:6627; R600-NEXT: CF_END6628; R600-NEXT: PAD6629;6630; CM-LABEL: v_log_v2f16:6631; CM: ; %bb.0:6632; CM-NEXT: CF_END6633; CM-NEXT: PAD6634 %result = call <2 x half> @llvm.log.v2f16(<2 x half> %in)6635 ret <2 x half> %result6636}6637 6638define <2 x half> @v_log_fabs_v2f16(<2 x half> %in) {6639; SI-SDAG-LABEL: v_log_fabs_v2f16:6640; SI-SDAG: ; %bb.0:6641; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6642; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v06643; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v16644; SI-SDAG-NEXT: v_cvt_f32_f16_e64 v0, |v0|6645; SI-SDAG-NEXT: v_cvt_f32_f16_e64 v1, |v1|6646; SI-SDAG-NEXT: v_log_f32_e32 v0, v06647; SI-SDAG-NEXT: v_log_f32_e32 v1, v16648; SI-SDAG-NEXT: v_mul_f32_e32 v0, 0x3f317218, v06649; SI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317218, v16650; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v06651; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v16652; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v06653; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v16654; SI-SDAG-NEXT: s_setpc_b64 s[30:31]6655;6656; SI-GISEL-LABEL: v_log_fabs_v2f16:6657; SI-GISEL: ; %bb.0:6658; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6659; SI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 16, v16660; SI-GISEL-NEXT: v_and_b32_e32 v0, 0xffff, v06661; SI-GISEL-NEXT: v_or_b32_e32 v0, v1, v06662; SI-GISEL-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v06663; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v06664; SI-GISEL-NEXT: v_lshrrev_b32_e32 v0, 16, v06665; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v06666; SI-GISEL-NEXT: v_log_f32_e32 v1, v16667; SI-GISEL-NEXT: v_log_f32_e32 v2, v06668; SI-GISEL-NEXT: v_mul_f32_e32 v0, 0x3f317218, v16669; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v06670; SI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317218, v26671; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v16672; SI-GISEL-NEXT: s_setpc_b64 s[30:31]6673;6674; VI-SDAG-LABEL: v_log_fabs_v2f16:6675; VI-SDAG: ; %bb.0:6676; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6677; VI-SDAG-NEXT: v_log_f16_sdwa v1, |v0| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_16678; VI-SDAG-NEXT: v_log_f16_e64 v0, |v0|6679; VI-SDAG-NEXT: v_mov_b32_e32 v2, 0x398c6680; VI-SDAG-NEXT: v_mul_f16_sdwa v1, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD6681; VI-SDAG-NEXT: v_mul_f16_e32 v0, 0x398c, v06682; VI-SDAG-NEXT: v_or_b32_e32 v0, v0, v16683; VI-SDAG-NEXT: s_setpc_b64 s[30:31]6684;6685; VI-GISEL-LABEL: v_log_fabs_v2f16:6686; VI-GISEL: ; %bb.0:6687; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6688; VI-GISEL-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v06689; VI-GISEL-NEXT: v_log_f16_e32 v1, v06690; VI-GISEL-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_16691; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x398c6692; VI-GISEL-NEXT: v_mul_f16_e32 v1, 0x398c, v16693; VI-GISEL-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD6694; VI-GISEL-NEXT: v_or_b32_e32 v0, v1, v06695; VI-GISEL-NEXT: s_setpc_b64 s[30:31]6696;6697; GFX900-SDAG-LABEL: v_log_fabs_v2f16:6698; GFX900-SDAG: ; %bb.0:6699; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6700; GFX900-SDAG-NEXT: v_log_f16_e64 v1, |v0|6701; GFX900-SDAG-NEXT: v_log_f16_sdwa v0, |v0| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_16702; GFX900-SDAG-NEXT: v_mul_f16_e32 v1, 0x398c, v16703; GFX900-SDAG-NEXT: v_mul_f16_e32 v0, 0x398c, v06704; GFX900-SDAG-NEXT: v_pack_b32_f16 v0, v1, v06705; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]6706;6707; GFX900-GISEL-LABEL: v_log_fabs_v2f16:6708; GFX900-GISEL: ; %bb.0:6709; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6710; GFX900-GISEL-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v06711; GFX900-GISEL-NEXT: v_log_f16_e32 v1, v06712; GFX900-GISEL-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_16713; GFX900-GISEL-NEXT: v_mul_f16_e32 v1, 0x398c, v16714; GFX900-GISEL-NEXT: v_mul_f16_e32 v0, 0x398c, v06715; GFX900-GISEL-NEXT: v_pack_b32_f16 v0, v1, v06716; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]6717;6718; GFX1100-SDAG-TRUE16-LABEL: v_log_fabs_v2f16:6719; GFX1100-SDAG-TRUE16: ; %bb.0:6720; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6721; GFX1100-SDAG-TRUE16-NEXT: v_log_f16_e64 v0.l, |v0.l|6722; GFX1100-SDAG-TRUE16-NEXT: v_log_f16_e64 v0.h, |v0.h|6723; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6724; GFX1100-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x398c, v0.l6725; GFX1100-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.h, 0x398c, v0.h6726; GFX1100-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)6727; GFX1100-SDAG-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h6728; GFX1100-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]6729;6730; GFX1100-SDAG-FAKE16-LABEL: v_log_fabs_v2f16:6731; GFX1100-SDAG-FAKE16: ; %bb.0:6732; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6733; GFX1100-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v06734; GFX1100-SDAG-FAKE16-NEXT: v_log_f16_e64 v0, |v0|6735; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)6736; GFX1100-SDAG-FAKE16-NEXT: v_log_f16_e64 v1, |v1|6737; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6738; GFX1100-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0x398c, v06739; GFX1100-SDAG-FAKE16-NEXT: v_mul_f16_e32 v1, 0x398c, v16740; GFX1100-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v16741; GFX1100-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]6742;6743; GFX1100-GISEL-TRUE16-LABEL: v_log_fabs_v2f16:6744; GFX1100-GISEL-TRUE16: ; %bb.0:6745; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6746; GFX1100-GISEL-TRUE16-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v06747; GFX1100-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)6748; GFX1100-GISEL-TRUE16-NEXT: v_log_f16_e32 v0.l, v0.l6749; GFX1100-GISEL-TRUE16-NEXT: v_log_f16_e32 v0.h, v0.h6750; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6751; GFX1100-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x398c, v0.l6752; GFX1100-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.h, 0x398c, v0.h6753; GFX1100-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)6754; GFX1100-GISEL-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h6755; GFX1100-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]6756;6757; GFX1100-GISEL-FAKE16-LABEL: v_log_fabs_v2f16:6758; GFX1100-GISEL-FAKE16: ; %bb.0:6759; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6760; GFX1100-GISEL-FAKE16-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v06761; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)6762; GFX1100-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v06763; GFX1100-GISEL-FAKE16-NEXT: v_log_f16_e32 v0, v06764; GFX1100-GISEL-FAKE16-NEXT: v_log_f16_e32 v1, v16765; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6766; GFX1100-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0x398c, v06767; GFX1100-GISEL-FAKE16-NEXT: v_mul_f16_e32 v1, 0x398c, v16768; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)6769; GFX1100-GISEL-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v16770; GFX1100-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]6771;6772; R600-LABEL: v_log_fabs_v2f16:6773; R600: ; %bb.0:6774; R600-NEXT: CF_END6775; R600-NEXT: PAD6776;6777; CM-LABEL: v_log_fabs_v2f16:6778; CM: ; %bb.0:6779; CM-NEXT: CF_END6780; CM-NEXT: PAD6781 %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %in)6782 %result = call <2 x half> @llvm.log.v2f16(<2 x half> %fabs)6783 ret <2 x half> %result6784}6785 6786define <2 x half> @v_log_fneg_fabs_v2f16(<2 x half> %in) {6787; SI-SDAG-LABEL: v_log_fneg_fabs_v2f16:6788; SI-SDAG: ; %bb.0:6789; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6790; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v16791; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v06792; SI-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v16793; SI-SDAG-NEXT: v_or_b32_e32 v0, v0, v16794; SI-SDAG-NEXT: v_or_b32_e32 v0, 0x80008000, v06795; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v06796; SI-SDAG-NEXT: v_lshrrev_b32_e32 v0, 16, v06797; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v06798; SI-SDAG-NEXT: v_log_f32_e32 v1, v16799; SI-SDAG-NEXT: v_log_f32_e32 v0, v06800; SI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317218, v16801; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v16802; SI-SDAG-NEXT: v_mul_f32_e32 v0, 0x3f317218, v06803; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v06804; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v16805; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v26806; SI-SDAG-NEXT: s_setpc_b64 s[30:31]6807;6808; SI-GISEL-LABEL: v_log_fneg_fabs_v2f16:6809; SI-GISEL: ; %bb.0:6810; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6811; SI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 16, v16812; SI-GISEL-NEXT: v_and_b32_e32 v0, 0xffff, v06813; SI-GISEL-NEXT: v_or_b32_e32 v0, v1, v06814; SI-GISEL-NEXT: v_or_b32_e32 v0, 0x80008000, v06815; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v06816; SI-GISEL-NEXT: v_lshrrev_b32_e32 v0, 16, v06817; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v06818; SI-GISEL-NEXT: v_log_f32_e32 v1, v16819; SI-GISEL-NEXT: v_log_f32_e32 v2, v06820; SI-GISEL-NEXT: v_mul_f32_e32 v0, 0x3f317218, v16821; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v06822; SI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317218, v26823; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v16824; SI-GISEL-NEXT: s_setpc_b64 s[30:31]6825;6826; VI-SDAG-LABEL: v_log_fneg_fabs_v2f16:6827; VI-SDAG: ; %bb.0:6828; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6829; VI-SDAG-NEXT: v_log_f16_sdwa v1, -|v0| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_16830; VI-SDAG-NEXT: v_log_f16_e64 v0, -|v0|6831; VI-SDAG-NEXT: v_mov_b32_e32 v2, 0x398c6832; VI-SDAG-NEXT: v_mul_f16_sdwa v1, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD6833; VI-SDAG-NEXT: v_mul_f16_e32 v0, 0x398c, v06834; VI-SDAG-NEXT: v_or_b32_e32 v0, v0, v16835; VI-SDAG-NEXT: s_setpc_b64 s[30:31]6836;6837; VI-GISEL-LABEL: v_log_fneg_fabs_v2f16:6838; VI-GISEL: ; %bb.0:6839; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6840; VI-GISEL-NEXT: v_or_b32_e32 v0, 0x80008000, v06841; VI-GISEL-NEXT: v_log_f16_e32 v1, v06842; VI-GISEL-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_16843; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x398c6844; VI-GISEL-NEXT: v_mul_f16_e32 v1, 0x398c, v16845; VI-GISEL-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD6846; VI-GISEL-NEXT: v_or_b32_e32 v0, v1, v06847; VI-GISEL-NEXT: s_setpc_b64 s[30:31]6848;6849; GFX900-SDAG-LABEL: v_log_fneg_fabs_v2f16:6850; GFX900-SDAG: ; %bb.0:6851; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6852; GFX900-SDAG-NEXT: v_log_f16_e64 v1, -|v0|6853; GFX900-SDAG-NEXT: v_log_f16_sdwa v0, -|v0| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_16854; GFX900-SDAG-NEXT: v_mul_f16_e32 v1, 0x398c, v16855; GFX900-SDAG-NEXT: v_mul_f16_e32 v0, 0x398c, v06856; GFX900-SDAG-NEXT: v_pack_b32_f16 v0, v1, v06857; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]6858;6859; GFX900-GISEL-LABEL: v_log_fneg_fabs_v2f16:6860; GFX900-GISEL: ; %bb.0:6861; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6862; GFX900-GISEL-NEXT: v_or_b32_e32 v0, 0x80008000, v06863; GFX900-GISEL-NEXT: v_log_f16_e32 v1, v06864; GFX900-GISEL-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_16865; GFX900-GISEL-NEXT: v_mul_f16_e32 v1, 0x398c, v16866; GFX900-GISEL-NEXT: v_mul_f16_e32 v0, 0x398c, v06867; GFX900-GISEL-NEXT: v_pack_b32_f16 v0, v1, v06868; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]6869;6870; GFX1100-SDAG-TRUE16-LABEL: v_log_fneg_fabs_v2f16:6871; GFX1100-SDAG-TRUE16: ; %bb.0:6872; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6873; GFX1100-SDAG-TRUE16-NEXT: v_log_f16_e64 v0.l, -|v0.l|6874; GFX1100-SDAG-TRUE16-NEXT: v_log_f16_e64 v0.h, -|v0.h|6875; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6876; GFX1100-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x398c, v0.l6877; GFX1100-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.h, 0x398c, v0.h6878; GFX1100-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)6879; GFX1100-SDAG-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h6880; GFX1100-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]6881;6882; GFX1100-SDAG-FAKE16-LABEL: v_log_fneg_fabs_v2f16:6883; GFX1100-SDAG-FAKE16: ; %bb.0:6884; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6885; GFX1100-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v06886; GFX1100-SDAG-FAKE16-NEXT: v_log_f16_e64 v0, -|v0|6887; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)6888; GFX1100-SDAG-FAKE16-NEXT: v_log_f16_e64 v1, -|v1|6889; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6890; GFX1100-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0x398c, v06891; GFX1100-SDAG-FAKE16-NEXT: v_mul_f16_e32 v1, 0x398c, v16892; GFX1100-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v16893; GFX1100-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]6894;6895; GFX1100-GISEL-TRUE16-LABEL: v_log_fneg_fabs_v2f16:6896; GFX1100-GISEL-TRUE16: ; %bb.0:6897; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6898; GFX1100-GISEL-TRUE16-NEXT: v_or_b32_e32 v0, 0x80008000, v06899; GFX1100-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)6900; GFX1100-GISEL-TRUE16-NEXT: v_log_f16_e32 v0.l, v0.l6901; GFX1100-GISEL-TRUE16-NEXT: v_log_f16_e32 v0.h, v0.h6902; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6903; GFX1100-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x398c, v0.l6904; GFX1100-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.h, 0x398c, v0.h6905; GFX1100-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)6906; GFX1100-GISEL-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h6907; GFX1100-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]6908;6909; GFX1100-GISEL-FAKE16-LABEL: v_log_fneg_fabs_v2f16:6910; GFX1100-GISEL-FAKE16: ; %bb.0:6911; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6912; GFX1100-GISEL-FAKE16-NEXT: v_or_b32_e32 v0, 0x80008000, v06913; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)6914; GFX1100-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v06915; GFX1100-GISEL-FAKE16-NEXT: v_log_f16_e32 v0, v06916; GFX1100-GISEL-FAKE16-NEXT: v_log_f16_e32 v1, v16917; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6918; GFX1100-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0x398c, v06919; GFX1100-GISEL-FAKE16-NEXT: v_mul_f16_e32 v1, 0x398c, v16920; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)6921; GFX1100-GISEL-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v16922; GFX1100-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]6923;6924; R600-LABEL: v_log_fneg_fabs_v2f16:6925; R600: ; %bb.0:6926; R600-NEXT: CF_END6927; R600-NEXT: PAD6928;6929; CM-LABEL: v_log_fneg_fabs_v2f16:6930; CM: ; %bb.0:6931; CM-NEXT: CF_END6932; CM-NEXT: PAD6933 %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %in)6934 %fneg.fabs = fneg <2 x half> %fabs6935 %result = call <2 x half> @llvm.log.v2f16(<2 x half> %fneg.fabs)6936 ret <2 x half> %result6937}6938 6939define <2 x half> @v_log_fneg_v2f16(<2 x half> %in) {6940; SI-SDAG-LABEL: v_log_fneg_v2f16:6941; SI-SDAG: ; %bb.0:6942; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6943; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v16944; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v06945; SI-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v16946; SI-SDAG-NEXT: v_or_b32_e32 v0, v0, v16947; SI-SDAG-NEXT: v_xor_b32_e32 v0, 0x80008000, v06948; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v06949; SI-SDAG-NEXT: v_lshrrev_b32_e32 v0, 16, v06950; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v06951; SI-SDAG-NEXT: v_log_f32_e32 v1, v16952; SI-SDAG-NEXT: v_log_f32_e32 v0, v06953; SI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317218, v16954; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v16955; SI-SDAG-NEXT: v_mul_f32_e32 v0, 0x3f317218, v06956; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v06957; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v16958; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v26959; SI-SDAG-NEXT: s_setpc_b64 s[30:31]6960;6961; SI-GISEL-LABEL: v_log_fneg_v2f16:6962; SI-GISEL: ; %bb.0:6963; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6964; SI-GISEL-NEXT: v_lshlrev_b32_e32 v1, 16, v16965; SI-GISEL-NEXT: v_and_b32_e32 v0, 0xffff, v06966; SI-GISEL-NEXT: v_or_b32_e32 v0, v1, v06967; SI-GISEL-NEXT: v_xor_b32_e32 v0, 0x80008000, v06968; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v06969; SI-GISEL-NEXT: v_lshrrev_b32_e32 v0, 16, v06970; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v06971; SI-GISEL-NEXT: v_log_f32_e32 v1, v16972; SI-GISEL-NEXT: v_log_f32_e32 v2, v06973; SI-GISEL-NEXT: v_mul_f32_e32 v0, 0x3f317218, v16974; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v06975; SI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317218, v26976; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v16977; SI-GISEL-NEXT: s_setpc_b64 s[30:31]6978;6979; VI-SDAG-LABEL: v_log_fneg_v2f16:6980; VI-SDAG: ; %bb.0:6981; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6982; VI-SDAG-NEXT: v_log_f16_sdwa v1, -v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_16983; VI-SDAG-NEXT: v_log_f16_e64 v0, -v06984; VI-SDAG-NEXT: v_mov_b32_e32 v2, 0x398c6985; VI-SDAG-NEXT: v_mul_f16_sdwa v1, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD6986; VI-SDAG-NEXT: v_mul_f16_e32 v0, 0x398c, v06987; VI-SDAG-NEXT: v_or_b32_e32 v0, v0, v16988; VI-SDAG-NEXT: s_setpc_b64 s[30:31]6989;6990; VI-GISEL-LABEL: v_log_fneg_v2f16:6991; VI-GISEL: ; %bb.0:6992; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6993; VI-GISEL-NEXT: v_xor_b32_e32 v0, 0x80008000, v06994; VI-GISEL-NEXT: v_log_f16_e32 v1, v06995; VI-GISEL-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_16996; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x398c6997; VI-GISEL-NEXT: v_mul_f16_e32 v1, 0x398c, v16998; VI-GISEL-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD6999; VI-GISEL-NEXT: v_or_b32_e32 v0, v1, v07000; VI-GISEL-NEXT: s_setpc_b64 s[30:31]7001;7002; GFX900-SDAG-LABEL: v_log_fneg_v2f16:7003; GFX900-SDAG: ; %bb.0:7004; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7005; GFX900-SDAG-NEXT: v_log_f16_e64 v1, -v07006; GFX900-SDAG-NEXT: v_log_f16_sdwa v0, -v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_17007; GFX900-SDAG-NEXT: v_mul_f16_e32 v1, 0x398c, v17008; GFX900-SDAG-NEXT: v_mul_f16_e32 v0, 0x398c, v07009; GFX900-SDAG-NEXT: v_pack_b32_f16 v0, v1, v07010; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]7011;7012; GFX900-GISEL-LABEL: v_log_fneg_v2f16:7013; GFX900-GISEL: ; %bb.0:7014; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7015; GFX900-GISEL-NEXT: v_xor_b32_e32 v0, 0x80008000, v07016; GFX900-GISEL-NEXT: v_log_f16_e32 v1, v07017; GFX900-GISEL-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_17018; GFX900-GISEL-NEXT: v_mul_f16_e32 v1, 0x398c, v17019; GFX900-GISEL-NEXT: v_mul_f16_e32 v0, 0x398c, v07020; GFX900-GISEL-NEXT: v_pack_b32_f16 v0, v1, v07021; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]7022;7023; GFX1100-SDAG-TRUE16-LABEL: v_log_fneg_v2f16:7024; GFX1100-SDAG-TRUE16: ; %bb.0:7025; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7026; GFX1100-SDAG-TRUE16-NEXT: v_log_f16_e64 v0.l, -v0.l7027; GFX1100-SDAG-TRUE16-NEXT: v_log_f16_e64 v0.h, -v0.h7028; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7029; GFX1100-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x398c, v0.l7030; GFX1100-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.h, 0x398c, v0.h7031; GFX1100-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)7032; GFX1100-SDAG-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h7033; GFX1100-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]7034;7035; GFX1100-SDAG-FAKE16-LABEL: v_log_fneg_v2f16:7036; GFX1100-SDAG-FAKE16: ; %bb.0:7037; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7038; GFX1100-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v07039; GFX1100-SDAG-FAKE16-NEXT: v_log_f16_e64 v0, -v07040; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)7041; GFX1100-SDAG-FAKE16-NEXT: v_log_f16_e64 v1, -v17042; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7043; GFX1100-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0x398c, v07044; GFX1100-SDAG-FAKE16-NEXT: v_mul_f16_e32 v1, 0x398c, v17045; GFX1100-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v17046; GFX1100-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]7047;7048; GFX1100-GISEL-TRUE16-LABEL: v_log_fneg_v2f16:7049; GFX1100-GISEL-TRUE16: ; %bb.0:7050; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7051; GFX1100-GISEL-TRUE16-NEXT: v_xor_b32_e32 v0, 0x80008000, v07052; GFX1100-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)7053; GFX1100-GISEL-TRUE16-NEXT: v_log_f16_e32 v0.l, v0.l7054; GFX1100-GISEL-TRUE16-NEXT: v_log_f16_e32 v0.h, v0.h7055; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7056; GFX1100-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x398c, v0.l7057; GFX1100-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.h, 0x398c, v0.h7058; GFX1100-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)7059; GFX1100-GISEL-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h7060; GFX1100-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]7061;7062; GFX1100-GISEL-FAKE16-LABEL: v_log_fneg_v2f16:7063; GFX1100-GISEL-FAKE16: ; %bb.0:7064; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7065; GFX1100-GISEL-FAKE16-NEXT: v_xor_b32_e32 v0, 0x80008000, v07066; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)7067; GFX1100-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v07068; GFX1100-GISEL-FAKE16-NEXT: v_log_f16_e32 v0, v07069; GFX1100-GISEL-FAKE16-NEXT: v_log_f16_e32 v1, v17070; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7071; GFX1100-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0x398c, v07072; GFX1100-GISEL-FAKE16-NEXT: v_mul_f16_e32 v1, 0x398c, v17073; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)7074; GFX1100-GISEL-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v17075; GFX1100-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]7076;7077; R600-LABEL: v_log_fneg_v2f16:7078; R600: ; %bb.0:7079; R600-NEXT: CF_END7080; R600-NEXT: PAD7081;7082; CM-LABEL: v_log_fneg_v2f16:7083; CM: ; %bb.0:7084; CM-NEXT: CF_END7085; CM-NEXT: PAD7086 %fneg = fneg <2 x half> %in7087 %result = call <2 x half> @llvm.log.v2f16(<2 x half> %fneg)7088 ret <2 x half> %result7089}7090 7091define <2 x half> @v_log_v2f16_fast(<2 x half> %in) {7092; SI-SDAG-LABEL: v_log_v2f16_fast:7093; SI-SDAG: ; %bb.0:7094; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7095; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v07096; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v17097; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v07098; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v17099; SI-SDAG-NEXT: v_log_f32_e32 v0, v07100; SI-SDAG-NEXT: v_log_f32_e32 v1, v17101; SI-SDAG-NEXT: v_mul_f32_e32 v0, 0x3f317218, v07102; SI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317218, v17103; SI-SDAG-NEXT: s_setpc_b64 s[30:31]7104;7105; SI-GISEL-LABEL: v_log_v2f16_fast:7106; SI-GISEL: ; %bb.0:7107; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7108; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v07109; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v17110; SI-GISEL-NEXT: v_log_f32_e32 v0, v07111; SI-GISEL-NEXT: v_log_f32_e32 v1, v17112; SI-GISEL-NEXT: v_mul_f32_e32 v0, 0x3f317218, v07113; SI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317218, v17114; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v07115; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v17116; SI-GISEL-NEXT: s_setpc_b64 s[30:31]7117;7118; VI-SDAG-LABEL: v_log_v2f16_fast:7119; VI-SDAG: ; %bb.0:7120; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7121; VI-SDAG-NEXT: v_log_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_17122; VI-SDAG-NEXT: v_log_f16_e32 v0, v07123; VI-SDAG-NEXT: v_mov_b32_e32 v2, 0x398c7124; VI-SDAG-NEXT: v_mul_f16_sdwa v1, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD7125; VI-SDAG-NEXT: v_mul_f16_e32 v0, 0x398c, v07126; VI-SDAG-NEXT: v_or_b32_e32 v0, v0, v17127; VI-SDAG-NEXT: s_setpc_b64 s[30:31]7128;7129; VI-GISEL-LABEL: v_log_v2f16_fast:7130; VI-GISEL: ; %bb.0:7131; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7132; VI-GISEL-NEXT: v_log_f16_e32 v1, v07133; VI-GISEL-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_17134; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x398c7135; VI-GISEL-NEXT: v_mul_f16_e32 v1, 0x398c, v17136; VI-GISEL-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD7137; VI-GISEL-NEXT: v_or_b32_e32 v0, v1, v07138; VI-GISEL-NEXT: s_setpc_b64 s[30:31]7139;7140; GFX900-LABEL: v_log_v2f16_fast:7141; GFX900: ; %bb.0:7142; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7143; GFX900-NEXT: v_log_f16_e32 v1, v07144; GFX900-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_17145; GFX900-NEXT: v_mul_f16_e32 v1, 0x398c, v17146; GFX900-NEXT: v_mul_f16_e32 v0, 0x398c, v07147; GFX900-NEXT: v_pack_b32_f16 v0, v1, v07148; GFX900-NEXT: s_setpc_b64 s[30:31]7149;7150; GFX1100-SDAG-TRUE16-LABEL: v_log_v2f16_fast:7151; GFX1100-SDAG-TRUE16: ; %bb.0:7152; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7153; GFX1100-SDAG-TRUE16-NEXT: v_log_f16_e32 v0.l, v0.l7154; GFX1100-SDAG-TRUE16-NEXT: v_log_f16_e32 v0.h, v0.h7155; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7156; GFX1100-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x398c, v0.l7157; GFX1100-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.h, 0x398c, v0.h7158; GFX1100-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)7159; GFX1100-SDAG-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h7160; GFX1100-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]7161;7162; GFX1100-SDAG-FAKE16-LABEL: v_log_v2f16_fast:7163; GFX1100-SDAG-FAKE16: ; %bb.0:7164; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7165; GFX1100-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v07166; GFX1100-SDAG-FAKE16-NEXT: v_log_f16_e32 v0, v07167; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)7168; GFX1100-SDAG-FAKE16-NEXT: v_log_f16_e32 v1, v17169; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7170; GFX1100-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0x398c, v07171; GFX1100-SDAG-FAKE16-NEXT: v_mul_f16_e32 v1, 0x398c, v17172; GFX1100-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v17173; GFX1100-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]7174;7175; GFX1100-GISEL-TRUE16-LABEL: v_log_v2f16_fast:7176; GFX1100-GISEL-TRUE16: ; %bb.0:7177; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7178; GFX1100-GISEL-TRUE16-NEXT: v_log_f16_e32 v0.l, v0.l7179; GFX1100-GISEL-TRUE16-NEXT: v_log_f16_e32 v0.h, v0.h7180; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7181; GFX1100-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x398c, v0.l7182; GFX1100-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.h, 0x398c, v0.h7183; GFX1100-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)7184; GFX1100-GISEL-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h7185; GFX1100-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]7186;7187; GFX1100-GISEL-FAKE16-LABEL: v_log_v2f16_fast:7188; GFX1100-GISEL-FAKE16: ; %bb.0:7189; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7190; GFX1100-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v07191; GFX1100-GISEL-FAKE16-NEXT: v_log_f16_e32 v0, v07192; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)7193; GFX1100-GISEL-FAKE16-NEXT: v_log_f16_e32 v1, v17194; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7195; GFX1100-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0x398c, v07196; GFX1100-GISEL-FAKE16-NEXT: v_mul_f16_e32 v1, 0x398c, v17197; GFX1100-GISEL-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v17198; GFX1100-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]7199;7200; R600-LABEL: v_log_v2f16_fast:7201; R600: ; %bb.0:7202; R600-NEXT: CF_END7203; R600-NEXT: PAD7204;7205; CM-LABEL: v_log_v2f16_fast:7206; CM: ; %bb.0:7207; CM-NEXT: CF_END7208; CM-NEXT: PAD7209 %result = call fast <2 x half> @llvm.log.v2f16(<2 x half> %in)7210 ret <2 x half> %result7211}7212 7213define <3 x half> @v_log_v3f16(<3 x half> %in) {7214; SI-SDAG-LABEL: v_log_v3f16:7215; SI-SDAG: ; %bb.0:7216; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7217; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v07218; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v17219; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v27220; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v07221; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v17222; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v27223; SI-SDAG-NEXT: v_log_f32_e32 v0, v07224; SI-SDAG-NEXT: v_log_f32_e32 v1, v17225; SI-SDAG-NEXT: v_log_f32_e32 v2, v27226; SI-SDAG-NEXT: v_mul_f32_e32 v0, 0x3f317218, v07227; SI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317218, v17228; SI-SDAG-NEXT: v_mul_f32_e32 v2, 0x3f317218, v27229; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v07230; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v17231; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v27232; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v07233; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v17234; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v27235; SI-SDAG-NEXT: s_setpc_b64 s[30:31]7236;7237; SI-GISEL-LABEL: v_log_v3f16:7238; SI-GISEL: ; %bb.0:7239; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7240; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v07241; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v17242; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v27243; SI-GISEL-NEXT: v_log_f32_e32 v0, v07244; SI-GISEL-NEXT: v_log_f32_e32 v1, v17245; SI-GISEL-NEXT: v_log_f32_e32 v2, v27246; SI-GISEL-NEXT: v_mul_f32_e32 v0, 0x3f317218, v07247; SI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317218, v17248; SI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317218, v27249; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v07250; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v17251; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v27252; SI-GISEL-NEXT: s_setpc_b64 s[30:31]7253;7254; VI-LABEL: v_log_v3f16:7255; VI: ; %bb.0:7256; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7257; VI-NEXT: v_log_f16_e32 v2, v07258; VI-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_17259; VI-NEXT: v_log_f16_e32 v1, v17260; VI-NEXT: v_mov_b32_e32 v3, 0x398c7261; VI-NEXT: v_mul_f16_e32 v2, 0x398c, v27262; VI-NEXT: v_mul_f16_sdwa v0, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD7263; VI-NEXT: v_mul_f16_e32 v1, 0x398c, v17264; VI-NEXT: v_or_b32_e32 v0, v2, v07265; VI-NEXT: s_setpc_b64 s[30:31]7266;7267; GFX900-LABEL: v_log_v3f16:7268; GFX900: ; %bb.0:7269; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7270; GFX900-NEXT: v_log_f16_e32 v2, v07271; GFX900-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_17272; GFX900-NEXT: v_log_f16_e32 v1, v17273; GFX900-NEXT: v_mul_f16_e32 v2, 0x398c, v27274; GFX900-NEXT: v_mul_f16_e32 v0, 0x398c, v07275; GFX900-NEXT: v_mul_f16_e32 v1, 0x398c, v17276; GFX900-NEXT: v_pack_b32_f16 v0, v2, v07277; GFX900-NEXT: s_setpc_b64 s[30:31]7278;7279; GFX1100-SDAG-TRUE16-LABEL: v_log_v3f16:7280; GFX1100-SDAG-TRUE16: ; %bb.0:7281; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7282; GFX1100-SDAG-TRUE16-NEXT: v_log_f16_e32 v0.l, v0.l7283; GFX1100-SDAG-TRUE16-NEXT: v_log_f16_e32 v0.h, v0.h7284; GFX1100-SDAG-TRUE16-NEXT: v_log_f16_e32 v1.l, v1.l7285; GFX1100-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)7286; GFX1100-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x398c, v0.l7287; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7288; GFX1100-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.h, 0x398c, v0.h7289; GFX1100-SDAG-TRUE16-NEXT: v_mul_f16_e32 v1.l, 0x398c, v1.l7290; GFX1100-SDAG-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h7291; GFX1100-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]7292;7293; GFX1100-SDAG-FAKE16-LABEL: v_log_v3f16:7294; GFX1100-SDAG-FAKE16: ; %bb.0:7295; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7296; GFX1100-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v07297; GFX1100-SDAG-FAKE16-NEXT: v_log_f16_e32 v0, v07298; GFX1100-SDAG-FAKE16-NEXT: v_log_f16_e32 v1, v17299; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_3)7300; GFX1100-SDAG-FAKE16-NEXT: v_log_f16_e32 v2, v27301; GFX1100-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0x398c, v07302; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7303; GFX1100-SDAG-FAKE16-NEXT: v_mul_f16_e32 v1, 0x398c, v17304; GFX1100-SDAG-FAKE16-NEXT: v_mul_f16_e32 v2, 0x398c, v27305; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)7306; GFX1100-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v27307; GFX1100-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]7308;7309; GFX1100-GISEL-TRUE16-LABEL: v_log_v3f16:7310; GFX1100-GISEL-TRUE16: ; %bb.0:7311; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7312; GFX1100-GISEL-TRUE16-NEXT: v_log_f16_e32 v0.l, v0.l7313; GFX1100-GISEL-TRUE16-NEXT: v_log_f16_e32 v0.h, v0.h7314; GFX1100-GISEL-TRUE16-NEXT: v_log_f16_e32 v1.l, v1.l7315; GFX1100-GISEL-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)7316; GFX1100-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x398c, v0.l7317; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7318; GFX1100-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.h, 0x398c, v0.h7319; GFX1100-GISEL-TRUE16-NEXT: v_mul_f16_e32 v1.l, 0x398c, v1.l7320; GFX1100-GISEL-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h7321; GFX1100-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]7322;7323; GFX1100-GISEL-FAKE16-LABEL: v_log_v3f16:7324; GFX1100-GISEL-FAKE16: ; %bb.0:7325; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7326; GFX1100-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v07327; GFX1100-GISEL-FAKE16-NEXT: v_log_f16_e32 v0, v07328; GFX1100-GISEL-FAKE16-NEXT: v_log_f16_e32 v1, v17329; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_3)7330; GFX1100-GISEL-FAKE16-NEXT: v_log_f16_e32 v2, v27331; GFX1100-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0x398c, v07332; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7333; GFX1100-GISEL-FAKE16-NEXT: v_mul_f16_e32 v1, 0x398c, v17334; GFX1100-GISEL-FAKE16-NEXT: v_mul_f16_e32 v2, 0x398c, v27335; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)7336; GFX1100-GISEL-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v27337; GFX1100-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]7338;7339; R600-LABEL: v_log_v3f16:7340; R600: ; %bb.0:7341; R600-NEXT: CF_END7342; R600-NEXT: PAD7343;7344; CM-LABEL: v_log_v3f16:7345; CM: ; %bb.0:7346; CM-NEXT: CF_END7347; CM-NEXT: PAD7348 %result = call <3 x half> @llvm.log.v3f16(<3 x half> %in)7349 ret <3 x half> %result7350}7351 7352define <3 x half> @v_log_v3f16_fast(<3 x half> %in) {7353; SI-SDAG-LABEL: v_log_v3f16_fast:7354; SI-SDAG: ; %bb.0:7355; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7356; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v07357; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v17358; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v27359; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v07360; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v17361; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v27362; SI-SDAG-NEXT: v_log_f32_e32 v0, v07363; SI-SDAG-NEXT: v_log_f32_e32 v1, v17364; SI-SDAG-NEXT: v_log_f32_e32 v2, v27365; SI-SDAG-NEXT: v_mul_f32_e32 v0, 0x3f317218, v07366; SI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317218, v17367; SI-SDAG-NEXT: v_mul_f32_e32 v2, 0x3f317218, v27368; SI-SDAG-NEXT: s_setpc_b64 s[30:31]7369;7370; SI-GISEL-LABEL: v_log_v3f16_fast:7371; SI-GISEL: ; %bb.0:7372; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7373; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v07374; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v17375; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v27376; SI-GISEL-NEXT: v_log_f32_e32 v0, v07377; SI-GISEL-NEXT: v_log_f32_e32 v1, v17378; SI-GISEL-NEXT: v_log_f32_e32 v2, v27379; SI-GISEL-NEXT: v_mul_f32_e32 v0, 0x3f317218, v07380; SI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317218, v17381; SI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317218, v27382; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v07383; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v17384; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v27385; SI-GISEL-NEXT: s_setpc_b64 s[30:31]7386;7387; VI-LABEL: v_log_v3f16_fast:7388; VI: ; %bb.0:7389; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7390; VI-NEXT: v_log_f16_e32 v2, v07391; VI-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_17392; VI-NEXT: v_log_f16_e32 v1, v17393; VI-NEXT: v_mov_b32_e32 v3, 0x398c7394; VI-NEXT: v_mul_f16_e32 v2, 0x398c, v27395; VI-NEXT: v_mul_f16_sdwa v0, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD7396; VI-NEXT: v_mul_f16_e32 v1, 0x398c, v17397; VI-NEXT: v_or_b32_e32 v0, v2, v07398; VI-NEXT: s_setpc_b64 s[30:31]7399;7400; GFX900-LABEL: v_log_v3f16_fast:7401; GFX900: ; %bb.0:7402; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7403; GFX900-NEXT: v_log_f16_e32 v2, v07404; GFX900-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_17405; GFX900-NEXT: v_log_f16_e32 v1, v17406; GFX900-NEXT: v_mul_f16_e32 v2, 0x398c, v27407; GFX900-NEXT: v_mul_f16_e32 v0, 0x398c, v07408; GFX900-NEXT: v_mul_f16_e32 v1, 0x398c, v17409; GFX900-NEXT: v_pack_b32_f16 v0, v2, v07410; GFX900-NEXT: s_setpc_b64 s[30:31]7411;7412; GFX1100-SDAG-TRUE16-LABEL: v_log_v3f16_fast:7413; GFX1100-SDAG-TRUE16: ; %bb.0:7414; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7415; GFX1100-SDAG-TRUE16-NEXT: v_log_f16_e32 v0.l, v0.l7416; GFX1100-SDAG-TRUE16-NEXT: v_log_f16_e32 v0.h, v0.h7417; GFX1100-SDAG-TRUE16-NEXT: v_log_f16_e32 v1.l, v1.l7418; GFX1100-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)7419; GFX1100-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x398c, v0.l7420; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7421; GFX1100-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.h, 0x398c, v0.h7422; GFX1100-SDAG-TRUE16-NEXT: v_mul_f16_e32 v1.l, 0x398c, v1.l7423; GFX1100-SDAG-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h7424; GFX1100-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]7425;7426; GFX1100-SDAG-FAKE16-LABEL: v_log_v3f16_fast:7427; GFX1100-SDAG-FAKE16: ; %bb.0:7428; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7429; GFX1100-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v07430; GFX1100-SDAG-FAKE16-NEXT: v_log_f16_e32 v0, v07431; GFX1100-SDAG-FAKE16-NEXT: v_log_f16_e32 v1, v17432; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_3)7433; GFX1100-SDAG-FAKE16-NEXT: v_log_f16_e32 v2, v27434; GFX1100-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0x398c, v07435; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7436; GFX1100-SDAG-FAKE16-NEXT: v_mul_f16_e32 v1, 0x398c, v17437; GFX1100-SDAG-FAKE16-NEXT: v_mul_f16_e32 v2, 0x398c, v27438; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)7439; GFX1100-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v27440; GFX1100-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]7441;7442; GFX1100-GISEL-TRUE16-LABEL: v_log_v3f16_fast:7443; GFX1100-GISEL-TRUE16: ; %bb.0:7444; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7445; GFX1100-GISEL-TRUE16-NEXT: v_log_f16_e32 v0.l, v0.l7446; GFX1100-GISEL-TRUE16-NEXT: v_log_f16_e32 v0.h, v0.h7447; GFX1100-GISEL-TRUE16-NEXT: v_log_f16_e32 v1.l, v1.l7448; GFX1100-GISEL-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)7449; GFX1100-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x398c, v0.l7450; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7451; GFX1100-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.h, 0x398c, v0.h7452; GFX1100-GISEL-TRUE16-NEXT: v_mul_f16_e32 v1.l, 0x398c, v1.l7453; GFX1100-GISEL-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h7454; GFX1100-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]7455;7456; GFX1100-GISEL-FAKE16-LABEL: v_log_v3f16_fast:7457; GFX1100-GISEL-FAKE16: ; %bb.0:7458; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7459; GFX1100-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v07460; GFX1100-GISEL-FAKE16-NEXT: v_log_f16_e32 v0, v07461; GFX1100-GISEL-FAKE16-NEXT: v_log_f16_e32 v1, v17462; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_3)7463; GFX1100-GISEL-FAKE16-NEXT: v_log_f16_e32 v2, v27464; GFX1100-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0x398c, v07465; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7466; GFX1100-GISEL-FAKE16-NEXT: v_mul_f16_e32 v1, 0x398c, v17467; GFX1100-GISEL-FAKE16-NEXT: v_mul_f16_e32 v2, 0x398c, v27468; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)7469; GFX1100-GISEL-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v27470; GFX1100-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]7471;7472; R600-LABEL: v_log_v3f16_fast:7473; R600: ; %bb.0:7474; R600-NEXT: CF_END7475; R600-NEXT: PAD7476;7477; CM-LABEL: v_log_v3f16_fast:7478; CM: ; %bb.0:7479; CM-NEXT: CF_END7480; CM-NEXT: PAD7481 %result = call fast <3 x half> @llvm.log.v3f16(<3 x half> %in)7482 ret <3 x half> %result7483}7484 7485define <4 x half> @v_log_v4f16(<4 x half> %in) {7486; SI-SDAG-LABEL: v_log_v4f16:7487; SI-SDAG: ; %bb.0:7488; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7489; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v07490; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v17491; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v3, v37492; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v27493; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v07494; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v17495; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v37496; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v27497; SI-SDAG-NEXT: v_log_f32_e32 v0, v07498; SI-SDAG-NEXT: v_log_f32_e32 v1, v17499; SI-SDAG-NEXT: v_log_f32_e32 v3, v37500; SI-SDAG-NEXT: v_log_f32_e32 v2, v27501; SI-SDAG-NEXT: v_mul_f32_e32 v0, 0x3f317218, v07502; SI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317218, v17503; SI-SDAG-NEXT: v_mul_f32_e32 v3, 0x3f317218, v37504; SI-SDAG-NEXT: v_mul_f32_e32 v2, 0x3f317218, v27505; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v07506; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v17507; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v27508; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v3, v37509; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v07510; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v17511; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v27512; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v37513; SI-SDAG-NEXT: s_setpc_b64 s[30:31]7514;7515; SI-GISEL-LABEL: v_log_v4f16:7516; SI-GISEL: ; %bb.0:7517; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7518; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v07519; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v17520; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v27521; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v37522; SI-GISEL-NEXT: v_log_f32_e32 v0, v07523; SI-GISEL-NEXT: v_log_f32_e32 v1, v17524; SI-GISEL-NEXT: v_log_f32_e32 v2, v27525; SI-GISEL-NEXT: v_log_f32_e32 v3, v37526; SI-GISEL-NEXT: v_mul_f32_e32 v0, 0x3f317218, v07527; SI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317218, v17528; SI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317218, v27529; SI-GISEL-NEXT: v_mul_f32_e32 v3, 0x3f317218, v37530; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v07531; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v17532; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v27533; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v3, v37534; SI-GISEL-NEXT: s_setpc_b64 s[30:31]7535;7536; VI-SDAG-LABEL: v_log_v4f16:7537; VI-SDAG: ; %bb.0:7538; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7539; VI-SDAG-NEXT: v_log_f16_e32 v2, v17540; VI-SDAG-NEXT: v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_17541; VI-SDAG-NEXT: v_log_f16_e32 v3, v07542; VI-SDAG-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_17543; VI-SDAG-NEXT: v_mov_b32_e32 v4, 0x398c7544; VI-SDAG-NEXT: v_mul_f16_e32 v2, 0x398c, v27545; VI-SDAG-NEXT: v_mul_f16_sdwa v1, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD7546; VI-SDAG-NEXT: v_mul_f16_e32 v3, 0x398c, v37547; VI-SDAG-NEXT: v_mul_f16_sdwa v0, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD7548; VI-SDAG-NEXT: v_or_b32_e32 v0, v3, v07549; VI-SDAG-NEXT: v_or_b32_e32 v1, v2, v17550; VI-SDAG-NEXT: s_setpc_b64 s[30:31]7551;7552; VI-GISEL-LABEL: v_log_v4f16:7553; VI-GISEL: ; %bb.0:7554; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7555; VI-GISEL-NEXT: v_log_f16_e32 v2, v07556; VI-GISEL-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_17557; VI-GISEL-NEXT: v_log_f16_e32 v4, v17558; VI-GISEL-NEXT: v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_17559; VI-GISEL-NEXT: v_mov_b32_e32 v3, 0x398c7560; VI-GISEL-NEXT: v_mul_f16_e32 v2, 0x398c, v27561; VI-GISEL-NEXT: v_mul_f16_sdwa v0, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD7562; VI-GISEL-NEXT: v_mul_f16_e32 v4, 0x398c, v47563; VI-GISEL-NEXT: v_mul_f16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD7564; VI-GISEL-NEXT: v_or_b32_e32 v0, v2, v07565; VI-GISEL-NEXT: v_or_b32_e32 v1, v4, v17566; VI-GISEL-NEXT: s_setpc_b64 s[30:31]7567;7568; GFX900-SDAG-LABEL: v_log_v4f16:7569; GFX900-SDAG: ; %bb.0:7570; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7571; GFX900-SDAG-NEXT: v_log_f16_e32 v2, v17572; GFX900-SDAG-NEXT: v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_17573; GFX900-SDAG-NEXT: v_log_f16_e32 v3, v07574; GFX900-SDAG-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_17575; GFX900-SDAG-NEXT: v_mul_f16_e32 v2, 0x398c, v27576; GFX900-SDAG-NEXT: v_mul_f16_e32 v1, 0x398c, v17577; GFX900-SDAG-NEXT: v_mul_f16_e32 v3, 0x398c, v37578; GFX900-SDAG-NEXT: v_mul_f16_e32 v0, 0x398c, v07579; GFX900-SDAG-NEXT: v_pack_b32_f16 v0, v3, v07580; GFX900-SDAG-NEXT: v_pack_b32_f16 v1, v2, v17581; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]7582;7583; GFX900-GISEL-LABEL: v_log_v4f16:7584; GFX900-GISEL: ; %bb.0:7585; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7586; GFX900-GISEL-NEXT: v_log_f16_e32 v2, v07587; GFX900-GISEL-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_17588; GFX900-GISEL-NEXT: v_log_f16_e32 v3, v17589; GFX900-GISEL-NEXT: v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_17590; GFX900-GISEL-NEXT: v_mul_f16_e32 v2, 0x398c, v27591; GFX900-GISEL-NEXT: v_mul_f16_e32 v0, 0x398c, v07592; GFX900-GISEL-NEXT: v_mul_f16_e32 v3, 0x398c, v37593; GFX900-GISEL-NEXT: v_mul_f16_e32 v1, 0x398c, v17594; GFX900-GISEL-NEXT: v_pack_b32_f16 v0, v2, v07595; GFX900-GISEL-NEXT: v_pack_b32_f16 v1, v3, v17596; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]7597;7598; GFX1100-SDAG-TRUE16-LABEL: v_log_v4f16:7599; GFX1100-SDAG-TRUE16: ; %bb.0:7600; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7601; GFX1100-SDAG-TRUE16-NEXT: v_log_f16_e32 v1.l, v1.l7602; GFX1100-SDAG-TRUE16-NEXT: v_log_f16_e32 v0.l, v0.l7603; GFX1100-SDAG-TRUE16-NEXT: v_log_f16_e32 v0.h, v0.h7604; GFX1100-SDAG-TRUE16-NEXT: v_log_f16_e32 v1.h, v1.h7605; GFX1100-SDAG-TRUE16-NEXT: v_mul_f16_e32 v1.l, 0x398c, v1.l7606; GFX1100-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)7607; GFX1100-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x398c, v0.l7608; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7609; GFX1100-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.h, 0x398c, v0.h7610; GFX1100-SDAG-TRUE16-NEXT: v_mul_f16_e32 v1.h, 0x398c, v1.h7611; GFX1100-SDAG-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h7612; GFX1100-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)7613; GFX1100-SDAG-TRUE16-NEXT: v_pack_b32_f16 v1, v1.l, v1.h7614; GFX1100-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]7615;7616; GFX1100-SDAG-FAKE16-LABEL: v_log_v4f16:7617; GFX1100-SDAG-FAKE16: ; %bb.0:7618; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7619; GFX1100-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v07620; GFX1100-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v17621; GFX1100-SDAG-FAKE16-NEXT: v_log_f16_e32 v1, v17622; GFX1100-SDAG-FAKE16-NEXT: v_log_f16_e32 v0, v07623; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)7624; GFX1100-SDAG-FAKE16-NEXT: v_log_f16_e32 v2, v27625; GFX1100-SDAG-FAKE16-NEXT: v_log_f16_e32 v3, v37626; GFX1100-SDAG-FAKE16-NEXT: v_mul_f16_e32 v1, 0x398c, v17627; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)7628; GFX1100-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0x398c, v07629; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7630; GFX1100-SDAG-FAKE16-NEXT: v_mul_f16_e32 v2, 0x398c, v27631; GFX1100-SDAG-FAKE16-NEXT: v_mul_f16_e32 v3, 0x398c, v37632; GFX1100-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v27633; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)7634; GFX1100-SDAG-FAKE16-NEXT: v_pack_b32_f16 v1, v1, v37635; GFX1100-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]7636;7637; GFX1100-GISEL-TRUE16-LABEL: v_log_v4f16:7638; GFX1100-GISEL-TRUE16: ; %bb.0:7639; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7640; GFX1100-GISEL-TRUE16-NEXT: v_log_f16_e32 v0.l, v0.l7641; GFX1100-GISEL-TRUE16-NEXT: v_log_f16_e32 v0.h, v0.h7642; GFX1100-GISEL-TRUE16-NEXT: v_log_f16_e32 v1.l, v1.l7643; GFX1100-GISEL-TRUE16-NEXT: v_log_f16_e32 v1.h, v1.h7644; GFX1100-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x398c, v0.l7645; GFX1100-GISEL-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)7646; GFX1100-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.h, 0x398c, v0.h7647; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7648; GFX1100-GISEL-TRUE16-NEXT: v_mul_f16_e32 v1.l, 0x398c, v1.l7649; GFX1100-GISEL-TRUE16-NEXT: v_mul_f16_e32 v1.h, 0x398c, v1.h7650; GFX1100-GISEL-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h7651; GFX1100-GISEL-TRUE16-NEXT: v_pack_b32_f16 v1, v1.l, v1.h7652; GFX1100-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]7653;7654; GFX1100-GISEL-FAKE16-LABEL: v_log_v4f16:7655; GFX1100-GISEL-FAKE16: ; %bb.0:7656; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7657; GFX1100-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v07658; GFX1100-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v17659; GFX1100-GISEL-FAKE16-NEXT: v_log_f16_e32 v0, v07660; GFX1100-GISEL-FAKE16-NEXT: v_log_f16_e32 v1, v17661; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)7662; GFX1100-GISEL-FAKE16-NEXT: v_log_f16_e32 v2, v27663; GFX1100-GISEL-FAKE16-NEXT: v_log_f16_e32 v3, v37664; GFX1100-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0x398c, v07665; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)7666; GFX1100-GISEL-FAKE16-NEXT: v_mul_f16_e32 v1, 0x398c, v17667; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7668; GFX1100-GISEL-FAKE16-NEXT: v_mul_f16_e32 v2, 0x398c, v27669; GFX1100-GISEL-FAKE16-NEXT: v_mul_f16_e32 v3, 0x398c, v37670; GFX1100-GISEL-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v27671; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)7672; GFX1100-GISEL-FAKE16-NEXT: v_pack_b32_f16 v1, v1, v37673; GFX1100-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]7674;7675; R600-LABEL: v_log_v4f16:7676; R600: ; %bb.0:7677; R600-NEXT: CF_END7678; R600-NEXT: PAD7679;7680; CM-LABEL: v_log_v4f16:7681; CM: ; %bb.0:7682; CM-NEXT: CF_END7683; CM-NEXT: PAD7684 %result = call <4 x half> @llvm.log.v4f16(<4 x half> %in)7685 ret <4 x half> %result7686}7687 7688define <4 x half> @v_log_v4f16_fast(<4 x half> %in) {7689; SI-SDAG-LABEL: v_log_v4f16_fast:7690; SI-SDAG: ; %bb.0:7691; SI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7692; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v07693; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v17694; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v27695; SI-SDAG-NEXT: v_cvt_f16_f32_e32 v3, v37696; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v07697; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v17698; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v27699; SI-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v37700; SI-SDAG-NEXT: v_log_f32_e32 v0, v07701; SI-SDAG-NEXT: v_log_f32_e32 v1, v17702; SI-SDAG-NEXT: v_log_f32_e32 v2, v27703; SI-SDAG-NEXT: v_log_f32_e32 v3, v37704; SI-SDAG-NEXT: v_mul_f32_e32 v0, 0x3f317218, v07705; SI-SDAG-NEXT: v_mul_f32_e32 v1, 0x3f317218, v17706; SI-SDAG-NEXT: v_mul_f32_e32 v2, 0x3f317218, v27707; SI-SDAG-NEXT: v_mul_f32_e32 v3, 0x3f317218, v37708; SI-SDAG-NEXT: s_setpc_b64 s[30:31]7709;7710; SI-GISEL-LABEL: v_log_v4f16_fast:7711; SI-GISEL: ; %bb.0:7712; SI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7713; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v07714; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v17715; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v2, v27716; SI-GISEL-NEXT: v_cvt_f32_f16_e32 v3, v37717; SI-GISEL-NEXT: v_log_f32_e32 v0, v07718; SI-GISEL-NEXT: v_log_f32_e32 v1, v17719; SI-GISEL-NEXT: v_log_f32_e32 v2, v27720; SI-GISEL-NEXT: v_log_f32_e32 v3, v37721; SI-GISEL-NEXT: v_mul_f32_e32 v0, 0x3f317218, v07722; SI-GISEL-NEXT: v_mul_f32_e32 v1, 0x3f317218, v17723; SI-GISEL-NEXT: v_mul_f32_e32 v2, 0x3f317218, v27724; SI-GISEL-NEXT: v_mul_f32_e32 v3, 0x3f317218, v37725; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v07726; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v17727; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v2, v27728; SI-GISEL-NEXT: v_cvt_f16_f32_e32 v3, v37729; SI-GISEL-NEXT: s_setpc_b64 s[30:31]7730;7731; VI-SDAG-LABEL: v_log_v4f16_fast:7732; VI-SDAG: ; %bb.0:7733; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7734; VI-SDAG-NEXT: v_log_f16_e32 v2, v17735; VI-SDAG-NEXT: v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_17736; VI-SDAG-NEXT: v_log_f16_e32 v3, v07737; VI-SDAG-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_17738; VI-SDAG-NEXT: v_mov_b32_e32 v4, 0x398c7739; VI-SDAG-NEXT: v_mul_f16_e32 v2, 0x398c, v27740; VI-SDAG-NEXT: v_mul_f16_sdwa v1, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD7741; VI-SDAG-NEXT: v_mul_f16_e32 v3, 0x398c, v37742; VI-SDAG-NEXT: v_mul_f16_sdwa v0, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD7743; VI-SDAG-NEXT: v_or_b32_e32 v0, v3, v07744; VI-SDAG-NEXT: v_or_b32_e32 v1, v2, v17745; VI-SDAG-NEXT: s_setpc_b64 s[30:31]7746;7747; VI-GISEL-LABEL: v_log_v4f16_fast:7748; VI-GISEL: ; %bb.0:7749; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7750; VI-GISEL-NEXT: v_log_f16_e32 v2, v07751; VI-GISEL-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_17752; VI-GISEL-NEXT: v_log_f16_e32 v4, v17753; VI-GISEL-NEXT: v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_17754; VI-GISEL-NEXT: v_mov_b32_e32 v3, 0x398c7755; VI-GISEL-NEXT: v_mul_f16_e32 v2, 0x398c, v27756; VI-GISEL-NEXT: v_mul_f16_sdwa v0, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD7757; VI-GISEL-NEXT: v_mul_f16_e32 v4, 0x398c, v47758; VI-GISEL-NEXT: v_mul_f16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD7759; VI-GISEL-NEXT: v_or_b32_e32 v0, v2, v07760; VI-GISEL-NEXT: v_or_b32_e32 v1, v4, v17761; VI-GISEL-NEXT: s_setpc_b64 s[30:31]7762;7763; GFX900-SDAG-LABEL: v_log_v4f16_fast:7764; GFX900-SDAG: ; %bb.0:7765; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7766; GFX900-SDAG-NEXT: v_log_f16_e32 v2, v17767; GFX900-SDAG-NEXT: v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_17768; GFX900-SDAG-NEXT: v_log_f16_e32 v3, v07769; GFX900-SDAG-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_17770; GFX900-SDAG-NEXT: v_mul_f16_e32 v2, 0x398c, v27771; GFX900-SDAG-NEXT: v_mul_f16_e32 v1, 0x398c, v17772; GFX900-SDAG-NEXT: v_mul_f16_e32 v3, 0x398c, v37773; GFX900-SDAG-NEXT: v_mul_f16_e32 v0, 0x398c, v07774; GFX900-SDAG-NEXT: v_pack_b32_f16 v0, v3, v07775; GFX900-SDAG-NEXT: v_pack_b32_f16 v1, v2, v17776; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]7777;7778; GFX900-GISEL-LABEL: v_log_v4f16_fast:7779; GFX900-GISEL: ; %bb.0:7780; GFX900-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7781; GFX900-GISEL-NEXT: v_log_f16_e32 v2, v07782; GFX900-GISEL-NEXT: v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_17783; GFX900-GISEL-NEXT: v_log_f16_e32 v3, v17784; GFX900-GISEL-NEXT: v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_17785; GFX900-GISEL-NEXT: v_mul_f16_e32 v2, 0x398c, v27786; GFX900-GISEL-NEXT: v_mul_f16_e32 v0, 0x398c, v07787; GFX900-GISEL-NEXT: v_mul_f16_e32 v3, 0x398c, v37788; GFX900-GISEL-NEXT: v_mul_f16_e32 v1, 0x398c, v17789; GFX900-GISEL-NEXT: v_pack_b32_f16 v0, v2, v07790; GFX900-GISEL-NEXT: v_pack_b32_f16 v1, v3, v17791; GFX900-GISEL-NEXT: s_setpc_b64 s[30:31]7792;7793; GFX1100-SDAG-TRUE16-LABEL: v_log_v4f16_fast:7794; GFX1100-SDAG-TRUE16: ; %bb.0:7795; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7796; GFX1100-SDAG-TRUE16-NEXT: v_log_f16_e32 v1.l, v1.l7797; GFX1100-SDAG-TRUE16-NEXT: v_log_f16_e32 v0.l, v0.l7798; GFX1100-SDAG-TRUE16-NEXT: v_log_f16_e32 v0.h, v0.h7799; GFX1100-SDAG-TRUE16-NEXT: v_log_f16_e32 v1.h, v1.h7800; GFX1100-SDAG-TRUE16-NEXT: v_mul_f16_e32 v1.l, 0x398c, v1.l7801; GFX1100-SDAG-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)7802; GFX1100-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x398c, v0.l7803; GFX1100-SDAG-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7804; GFX1100-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.h, 0x398c, v0.h7805; GFX1100-SDAG-TRUE16-NEXT: v_mul_f16_e32 v1.h, 0x398c, v1.h7806; GFX1100-SDAG-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h7807; GFX1100-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)7808; GFX1100-SDAG-TRUE16-NEXT: v_pack_b32_f16 v1, v1.l, v1.h7809; GFX1100-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]7810;7811; GFX1100-SDAG-FAKE16-LABEL: v_log_v4f16_fast:7812; GFX1100-SDAG-FAKE16: ; %bb.0:7813; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7814; GFX1100-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v07815; GFX1100-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v17816; GFX1100-SDAG-FAKE16-NEXT: v_log_f16_e32 v1, v17817; GFX1100-SDAG-FAKE16-NEXT: v_log_f16_e32 v0, v07818; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)7819; GFX1100-SDAG-FAKE16-NEXT: v_log_f16_e32 v2, v27820; GFX1100-SDAG-FAKE16-NEXT: v_log_f16_e32 v3, v37821; GFX1100-SDAG-FAKE16-NEXT: v_mul_f16_e32 v1, 0x398c, v17822; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)7823; GFX1100-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0x398c, v07824; GFX1100-SDAG-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7825; GFX1100-SDAG-FAKE16-NEXT: v_mul_f16_e32 v2, 0x398c, v27826; GFX1100-SDAG-FAKE16-NEXT: v_mul_f16_e32 v3, 0x398c, v37827; GFX1100-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v27828; GFX1100-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)7829; GFX1100-SDAG-FAKE16-NEXT: v_pack_b32_f16 v1, v1, v37830; GFX1100-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]7831;7832; GFX1100-GISEL-TRUE16-LABEL: v_log_v4f16_fast:7833; GFX1100-GISEL-TRUE16: ; %bb.0:7834; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7835; GFX1100-GISEL-TRUE16-NEXT: v_log_f16_e32 v0.l, v0.l7836; GFX1100-GISEL-TRUE16-NEXT: v_log_f16_e32 v0.h, v0.h7837; GFX1100-GISEL-TRUE16-NEXT: v_log_f16_e32 v1.l, v1.l7838; GFX1100-GISEL-TRUE16-NEXT: v_log_f16_e32 v1.h, v1.h7839; GFX1100-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x398c, v0.l7840; GFX1100-GISEL-TRUE16-NEXT: s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)7841; GFX1100-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.h, 0x398c, v0.h7842; GFX1100-GISEL-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7843; GFX1100-GISEL-TRUE16-NEXT: v_mul_f16_e32 v1.l, 0x398c, v1.l7844; GFX1100-GISEL-TRUE16-NEXT: v_mul_f16_e32 v1.h, 0x398c, v1.h7845; GFX1100-GISEL-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h7846; GFX1100-GISEL-TRUE16-NEXT: v_pack_b32_f16 v1, v1.l, v1.h7847; GFX1100-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]7848;7849; GFX1100-GISEL-FAKE16-LABEL: v_log_v4f16_fast:7850; GFX1100-GISEL-FAKE16: ; %bb.0:7851; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7852; GFX1100-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v07853; GFX1100-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v17854; GFX1100-GISEL-FAKE16-NEXT: v_log_f16_e32 v0, v07855; GFX1100-GISEL-FAKE16-NEXT: v_log_f16_e32 v1, v17856; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)7857; GFX1100-GISEL-FAKE16-NEXT: v_log_f16_e32 v2, v27858; GFX1100-GISEL-FAKE16-NEXT: v_log_f16_e32 v3, v37859; GFX1100-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0x398c, v07860; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)7861; GFX1100-GISEL-FAKE16-NEXT: v_mul_f16_e32 v1, 0x398c, v17862; GFX1100-GISEL-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7863; GFX1100-GISEL-FAKE16-NEXT: v_mul_f16_e32 v2, 0x398c, v27864; GFX1100-GISEL-FAKE16-NEXT: v_mul_f16_e32 v3, 0x398c, v37865; GFX1100-GISEL-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v27866; GFX1100-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)7867; GFX1100-GISEL-FAKE16-NEXT: v_pack_b32_f16 v1, v1, v37868; GFX1100-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]7869;7870; R600-LABEL: v_log_v4f16_fast:7871; R600: ; %bb.0:7872; R600-NEXT: CF_END7873; R600-NEXT: PAD7874;7875; CM-LABEL: v_log_v4f16_fast:7876; CM: ; %bb.0:7877; CM-NEXT: CF_END7878; CM-NEXT: PAD7879 %result = call fast <4 x half> @llvm.log.v4f16(<4 x half> %in)7880 ret <4 x half> %result7881}7882 7883declare float @llvm.fabs.f32(float) #27884declare float @llvm.log.f32(float) #27885declare <2 x float> @llvm.log.v2f32(<2 x float>) #27886declare <3 x float> @llvm.log.v3f32(<3 x float>) #27887declare <4 x float> @llvm.log.v4f32(<4 x float>) #27888declare half @llvm.fabs.f16(half) #27889declare half @llvm.log.f16(half) #27890declare <2 x half> @llvm.log.v2f16(<2 x half>) #27891declare <3 x half> @llvm.log.v3f16(<3 x half>) #27892declare <4 x half> @llvm.log.v4f16(<4 x half>) #27893declare <2 x half> @llvm.fabs.v2f16(<2 x half>) #27894 7895attributes #0 = { "denormal-fp-math-f32"="ieee,preserve-sign" }7896attributes #1 = { "denormal-fp-math-f32"="dynamic,dynamic" }7897attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }7898;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:7899; GFX689-GISEL: {{.*}}7900; GFX689-SDAG: {{.*}}7901