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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx703 < %s | FileCheck -check-prefixes=GCN,GFX7 %s3; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 < %s | FileCheck -check-prefixes=GCN,GFX8 %s4; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,GFX9,GFX900 %s5; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx950 < %s | FileCheck -check-prefixes=GCN,GFX9,GFX950 %s6; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1030 < %s | FileCheck -check-prefixes=GCN,GFX10 %s7; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GCN,GFX11,GFX11-TRUE16 %s8; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GCN,GFX11,GFX11-FAKE16 %s9; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GCN,GFX12,GFX12-TRUE16 %s10; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GCN,GFX12,GFX12-FAKE16 %s11 12define half @v_maximum_f16(half %src0, half %src1) {13; GFX7-LABEL: v_maximum_f16:14; GFX7:       ; %bb.0:15; GFX7-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)16; GFX7-NEXT:    v_cvt_f16_f32_e32 v1, v117; GFX7-NEXT:    v_cvt_f16_f32_e32 v0, v018; GFX7-NEXT:    v_mov_b32_e32 v2, 0x7fc0000019; GFX7-NEXT:    v_cvt_f32_f16_e32 v1, v120; GFX7-NEXT:    v_cvt_f32_f16_e32 v0, v021; GFX7-NEXT:    v_max_f32_e32 v3, v0, v122; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v0, v123; GFX7-NEXT:    v_cndmask_b32_e32 v0, v2, v3, vcc24; GFX7-NEXT:    s_setpc_b64 s[30:31]25;26; GFX8-LABEL: v_maximum_f16:27; GFX8:       ; %bb.0:28; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)29; GFX8-NEXT:    v_max_f16_e32 v2, v0, v130; GFX8-NEXT:    v_mov_b32_e32 v3, 0x7e0031; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v0, v132; GFX8-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc33; GFX8-NEXT:    s_setpc_b64 s[30:31]34;35; GFX900-LABEL: v_maximum_f16:36; GFX900:       ; %bb.0:37; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)38; GFX900-NEXT:    v_max_f16_e32 v2, v0, v139; GFX900-NEXT:    v_mov_b32_e32 v3, 0x7e0040; GFX900-NEXT:    v_cmp_o_f16_e32 vcc, v0, v141; GFX900-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc42; GFX900-NEXT:    s_setpc_b64 s[30:31]43;44; GFX950-LABEL: v_maximum_f16:45; GFX950:       ; %bb.0:46; GFX950-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)47; GFX950-NEXT:    v_pk_maximum3_f16 v0, v0, v1, v148; GFX950-NEXT:    s_setpc_b64 s[30:31]49;50; GFX10-LABEL: v_maximum_f16:51; GFX10:       ; %bb.0:52; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)53; GFX10-NEXT:    v_max_f16_e32 v2, v0, v154; GFX10-NEXT:    v_cmp_o_f16_e32 vcc_lo, v0, v155; GFX10-NEXT:    v_cndmask_b32_e32 v0, 0x7e00, v2, vcc_lo56; GFX10-NEXT:    s_setpc_b64 s[30:31]57;58; GFX11-TRUE16-LABEL: v_maximum_f16:59; GFX11-TRUE16:       ; %bb.0:60; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)61; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v0.l, v1.l62; GFX11-TRUE16-NEXT:    v_max_f16_e32 v0.l, v0.l, v1.l63; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)64; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0x7e00, v0.l, vcc_lo65; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]66;67; GFX11-FAKE16-LABEL: v_maximum_f16:68; GFX11-FAKE16:       ; %bb.0:69; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)70; GFX11-FAKE16-NEXT:    v_max_f16_e32 v2, v0, v171; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v0, v172; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2)73; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0x7e00, v2, vcc_lo74; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]75;76; GFX12-TRUE16-LABEL: v_maximum_f16:77; GFX12-TRUE16:       ; %bb.0:78; GFX12-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x079; GFX12-TRUE16-NEXT:    s_wait_expcnt 0x080; GFX12-TRUE16-NEXT:    s_wait_samplecnt 0x081; GFX12-TRUE16-NEXT:    s_wait_bvhcnt 0x082; GFX12-TRUE16-NEXT:    s_wait_kmcnt 0x083; GFX12-TRUE16-NEXT:    v_maximum_f16 v0.l, v0.l, v1.l84; GFX12-TRUE16-NEXT:    s_setpc_b64 s[30:31]85;86; GFX12-FAKE16-LABEL: v_maximum_f16:87; GFX12-FAKE16:       ; %bb.0:88; GFX12-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x089; GFX12-FAKE16-NEXT:    s_wait_expcnt 0x090; GFX12-FAKE16-NEXT:    s_wait_samplecnt 0x091; GFX12-FAKE16-NEXT:    s_wait_bvhcnt 0x092; GFX12-FAKE16-NEXT:    s_wait_kmcnt 0x093; GFX12-FAKE16-NEXT:    v_maximum_f16 v0, v0, v194; GFX12-FAKE16-NEXT:    s_setpc_b64 s[30:31]95  %op = call half @llvm.maximum.f16(half %src0, half %src1)96  ret half %op97}98 99define half @v_maximum_f16__nnan(half %src0, half %src1) {100; GFX7-LABEL: v_maximum_f16__nnan:101; GFX7:       ; %bb.0:102; GFX7-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)103; GFX7-NEXT:    v_cvt_f16_f32_e32 v1, v1104; GFX7-NEXT:    v_cvt_f16_f32_e32 v0, v0105; GFX7-NEXT:    v_cvt_f32_f16_e32 v1, v1106; GFX7-NEXT:    v_cvt_f32_f16_e32 v0, v0107; GFX7-NEXT:    v_max_f32_e32 v0, v0, v1108; GFX7-NEXT:    s_setpc_b64 s[30:31]109;110; GFX8-LABEL: v_maximum_f16__nnan:111; GFX8:       ; %bb.0:112; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)113; GFX8-NEXT:    v_max_f16_e32 v0, v0, v1114; GFX8-NEXT:    s_setpc_b64 s[30:31]115;116; GFX9-LABEL: v_maximum_f16__nnan:117; GFX9:       ; %bb.0:118; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)119; GFX9-NEXT:    v_max_f16_e32 v0, v0, v1120; GFX9-NEXT:    s_setpc_b64 s[30:31]121;122; GFX10-LABEL: v_maximum_f16__nnan:123; GFX10:       ; %bb.0:124; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)125; GFX10-NEXT:    v_max_f16_e32 v0, v0, v1126; GFX10-NEXT:    s_setpc_b64 s[30:31]127;128; GFX11-TRUE16-LABEL: v_maximum_f16__nnan:129; GFX11-TRUE16:       ; %bb.0:130; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)131; GFX11-TRUE16-NEXT:    v_max_f16_e32 v0.l, v0.l, v1.l132; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]133;134; GFX11-FAKE16-LABEL: v_maximum_f16__nnan:135; GFX11-FAKE16:       ; %bb.0:136; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)137; GFX11-FAKE16-NEXT:    v_max_f16_e32 v0, v0, v1138; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]139;140; GFX12-TRUE16-LABEL: v_maximum_f16__nnan:141; GFX12-TRUE16:       ; %bb.0:142; GFX12-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x0143; GFX12-TRUE16-NEXT:    s_wait_expcnt 0x0144; GFX12-TRUE16-NEXT:    s_wait_samplecnt 0x0145; GFX12-TRUE16-NEXT:    s_wait_bvhcnt 0x0146; GFX12-TRUE16-NEXT:    s_wait_kmcnt 0x0147; GFX12-TRUE16-NEXT:    v_maximum_f16 v0.l, v0.l, v1.l148; GFX12-TRUE16-NEXT:    s_setpc_b64 s[30:31]149;150; GFX12-FAKE16-LABEL: v_maximum_f16__nnan:151; GFX12-FAKE16:       ; %bb.0:152; GFX12-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x0153; GFX12-FAKE16-NEXT:    s_wait_expcnt 0x0154; GFX12-FAKE16-NEXT:    s_wait_samplecnt 0x0155; GFX12-FAKE16-NEXT:    s_wait_bvhcnt 0x0156; GFX12-FAKE16-NEXT:    s_wait_kmcnt 0x0157; GFX12-FAKE16-NEXT:    v_maximum_f16 v0, v0, v1158; GFX12-FAKE16-NEXT:    s_setpc_b64 s[30:31]159  %op = call nnan half @llvm.maximum.f16(half %src0, half %src1)160  ret half %op161}162 163define half @v_maximum_f16__nsz(half %src0, half %src1) {164; GFX7-LABEL: v_maximum_f16__nsz:165; GFX7:       ; %bb.0:166; GFX7-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)167; GFX7-NEXT:    v_cvt_f16_f32_e32 v1, v1168; GFX7-NEXT:    v_cvt_f16_f32_e32 v0, v0169; GFX7-NEXT:    v_mov_b32_e32 v2, 0x7fc00000170; GFX7-NEXT:    v_cvt_f32_f16_e32 v1, v1171; GFX7-NEXT:    v_cvt_f32_f16_e32 v0, v0172; GFX7-NEXT:    v_max_f32_e32 v3, v0, v1173; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v0, v1174; GFX7-NEXT:    v_cndmask_b32_e32 v0, v2, v3, vcc175; GFX7-NEXT:    s_setpc_b64 s[30:31]176;177; GFX8-LABEL: v_maximum_f16__nsz:178; GFX8:       ; %bb.0:179; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)180; GFX8-NEXT:    v_max_f16_e32 v2, v0, v1181; GFX8-NEXT:    v_mov_b32_e32 v3, 0x7e00182; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v0, v1183; GFX8-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc184; GFX8-NEXT:    s_setpc_b64 s[30:31]185;186; GFX900-LABEL: v_maximum_f16__nsz:187; GFX900:       ; %bb.0:188; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)189; GFX900-NEXT:    v_max_f16_e32 v2, v0, v1190; GFX900-NEXT:    v_mov_b32_e32 v3, 0x7e00191; GFX900-NEXT:    v_cmp_o_f16_e32 vcc, v0, v1192; GFX900-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc193; GFX900-NEXT:    s_setpc_b64 s[30:31]194;195; GFX950-LABEL: v_maximum_f16__nsz:196; GFX950:       ; %bb.0:197; GFX950-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)198; GFX950-NEXT:    v_pk_maximum3_f16 v0, v0, v1, v1199; GFX950-NEXT:    s_setpc_b64 s[30:31]200;201; GFX10-LABEL: v_maximum_f16__nsz:202; GFX10:       ; %bb.0:203; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)204; GFX10-NEXT:    v_max_f16_e32 v2, v0, v1205; GFX10-NEXT:    v_cmp_o_f16_e32 vcc_lo, v0, v1206; GFX10-NEXT:    v_cndmask_b32_e32 v0, 0x7e00, v2, vcc_lo207; GFX10-NEXT:    s_setpc_b64 s[30:31]208;209; GFX11-TRUE16-LABEL: v_maximum_f16__nsz:210; GFX11-TRUE16:       ; %bb.0:211; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)212; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v0.l, v1.l213; GFX11-TRUE16-NEXT:    v_max_f16_e32 v0.l, v0.l, v1.l214; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)215; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0x7e00, v0.l, vcc_lo216; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]217;218; GFX11-FAKE16-LABEL: v_maximum_f16__nsz:219; GFX11-FAKE16:       ; %bb.0:220; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)221; GFX11-FAKE16-NEXT:    v_max_f16_e32 v2, v0, v1222; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v0, v1223; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2)224; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0x7e00, v2, vcc_lo225; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]226;227; GFX12-TRUE16-LABEL: v_maximum_f16__nsz:228; GFX12-TRUE16:       ; %bb.0:229; GFX12-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x0230; GFX12-TRUE16-NEXT:    s_wait_expcnt 0x0231; GFX12-TRUE16-NEXT:    s_wait_samplecnt 0x0232; GFX12-TRUE16-NEXT:    s_wait_bvhcnt 0x0233; GFX12-TRUE16-NEXT:    s_wait_kmcnt 0x0234; GFX12-TRUE16-NEXT:    v_maximum_f16 v0.l, v0.l, v1.l235; GFX12-TRUE16-NEXT:    s_setpc_b64 s[30:31]236;237; GFX12-FAKE16-LABEL: v_maximum_f16__nsz:238; GFX12-FAKE16:       ; %bb.0:239; GFX12-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x0240; GFX12-FAKE16-NEXT:    s_wait_expcnt 0x0241; GFX12-FAKE16-NEXT:    s_wait_samplecnt 0x0242; GFX12-FAKE16-NEXT:    s_wait_bvhcnt 0x0243; GFX12-FAKE16-NEXT:    s_wait_kmcnt 0x0244; GFX12-FAKE16-NEXT:    v_maximum_f16 v0, v0, v1245; GFX12-FAKE16-NEXT:    s_setpc_b64 s[30:31]246  %op = call nsz half @llvm.maximum.f16(half %src0, half %src1)247  ret half %op248}249 250define half @v_maximum_f16__nnan_nsz(half %src0, half %src1) {251; GFX7-LABEL: v_maximum_f16__nnan_nsz:252; GFX7:       ; %bb.0:253; GFX7-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)254; GFX7-NEXT:    v_cvt_f16_f32_e32 v1, v1255; GFX7-NEXT:    v_cvt_f16_f32_e32 v0, v0256; GFX7-NEXT:    v_cvt_f32_f16_e32 v1, v1257; GFX7-NEXT:    v_cvt_f32_f16_e32 v0, v0258; GFX7-NEXT:    v_max_f32_e32 v0, v0, v1259; GFX7-NEXT:    s_setpc_b64 s[30:31]260;261; GFX8-LABEL: v_maximum_f16__nnan_nsz:262; GFX8:       ; %bb.0:263; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)264; GFX8-NEXT:    v_max_f16_e32 v0, v0, v1265; GFX8-NEXT:    s_setpc_b64 s[30:31]266;267; GFX9-LABEL: v_maximum_f16__nnan_nsz:268; GFX9:       ; %bb.0:269; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)270; GFX9-NEXT:    v_max_f16_e32 v0, v0, v1271; GFX9-NEXT:    s_setpc_b64 s[30:31]272;273; GFX10-LABEL: v_maximum_f16__nnan_nsz:274; GFX10:       ; %bb.0:275; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)276; GFX10-NEXT:    v_max_f16_e32 v0, v0, v1277; GFX10-NEXT:    s_setpc_b64 s[30:31]278;279; GFX11-TRUE16-LABEL: v_maximum_f16__nnan_nsz:280; GFX11-TRUE16:       ; %bb.0:281; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)282; GFX11-TRUE16-NEXT:    v_max_f16_e32 v0.l, v0.l, v1.l283; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]284;285; GFX11-FAKE16-LABEL: v_maximum_f16__nnan_nsz:286; GFX11-FAKE16:       ; %bb.0:287; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)288; GFX11-FAKE16-NEXT:    v_max_f16_e32 v0, v0, v1289; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]290;291; GFX12-TRUE16-LABEL: v_maximum_f16__nnan_nsz:292; GFX12-TRUE16:       ; %bb.0:293; GFX12-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x0294; GFX12-TRUE16-NEXT:    s_wait_expcnt 0x0295; GFX12-TRUE16-NEXT:    s_wait_samplecnt 0x0296; GFX12-TRUE16-NEXT:    s_wait_bvhcnt 0x0297; GFX12-TRUE16-NEXT:    s_wait_kmcnt 0x0298; GFX12-TRUE16-NEXT:    v_maximum_f16 v0.l, v0.l, v1.l299; GFX12-TRUE16-NEXT:    s_setpc_b64 s[30:31]300;301; GFX12-FAKE16-LABEL: v_maximum_f16__nnan_nsz:302; GFX12-FAKE16:       ; %bb.0:303; GFX12-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x0304; GFX12-FAKE16-NEXT:    s_wait_expcnt 0x0305; GFX12-FAKE16-NEXT:    s_wait_samplecnt 0x0306; GFX12-FAKE16-NEXT:    s_wait_bvhcnt 0x0307; GFX12-FAKE16-NEXT:    s_wait_kmcnt 0x0308; GFX12-FAKE16-NEXT:    v_maximum_f16 v0, v0, v1309; GFX12-FAKE16-NEXT:    s_setpc_b64 s[30:31]310  %op = call nnan nsz half @llvm.maximum.f16(half %src0, half %src1)311  ret half %op312}313 314define half @v_maximum_f16__nnan_src0(half %arg0, half %src1) {315; GFX7-LABEL: v_maximum_f16__nnan_src0:316; GFX7:       ; %bb.0:317; GFX7-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)318; GFX7-NEXT:    v_cvt_f16_f32_e32 v0, v0319; GFX7-NEXT:    v_cvt_f16_f32_e32 v1, v1320; GFX7-NEXT:    v_mov_b32_e32 v2, 0x7fc00000321; GFX7-NEXT:    v_cvt_f32_f16_e32 v0, v0322; GFX7-NEXT:    v_cvt_f32_f16_e32 v1, v1323; GFX7-NEXT:    v_add_f32_e32 v0, 1.0, v0324; GFX7-NEXT:    v_max_f32_e32 v3, v0, v1325; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v0, v1326; GFX7-NEXT:    v_cndmask_b32_e32 v0, v2, v3, vcc327; GFX7-NEXT:    s_setpc_b64 s[30:31]328;329; GFX8-LABEL: v_maximum_f16__nnan_src0:330; GFX8:       ; %bb.0:331; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)332; GFX8-NEXT:    v_add_f16_e32 v0, 1.0, v0333; GFX8-NEXT:    v_max_f16_e32 v2, v0, v1334; GFX8-NEXT:    v_mov_b32_e32 v3, 0x7e00335; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v0, v1336; GFX8-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc337; GFX8-NEXT:    s_setpc_b64 s[30:31]338;339; GFX900-LABEL: v_maximum_f16__nnan_src0:340; GFX900:       ; %bb.0:341; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)342; GFX900-NEXT:    v_add_f16_e32 v0, 1.0, v0343; GFX900-NEXT:    v_max_f16_e32 v2, v0, v1344; GFX900-NEXT:    v_mov_b32_e32 v3, 0x7e00345; GFX900-NEXT:    v_cmp_o_f16_e32 vcc, v0, v1346; GFX900-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc347; GFX900-NEXT:    s_setpc_b64 s[30:31]348;349; GFX950-LABEL: v_maximum_f16__nnan_src0:350; GFX950:       ; %bb.0:351; GFX950-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)352; GFX950-NEXT:    v_add_f16_e32 v0, 1.0, v0353; GFX950-NEXT:    v_pk_maximum3_f16 v0, v0, v1, v1354; GFX950-NEXT:    s_setpc_b64 s[30:31]355;356; GFX10-LABEL: v_maximum_f16__nnan_src0:357; GFX10:       ; %bb.0:358; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)359; GFX10-NEXT:    v_add_f16_e32 v0, 1.0, v0360; GFX10-NEXT:    v_max_f16_e32 v2, v0, v1361; GFX10-NEXT:    v_cmp_o_f16_e32 vcc_lo, v0, v1362; GFX10-NEXT:    v_cndmask_b32_e32 v0, 0x7e00, v2, vcc_lo363; GFX10-NEXT:    s_setpc_b64 s[30:31]364;365; GFX11-TRUE16-LABEL: v_maximum_f16__nnan_src0:366; GFX11-TRUE16:       ; %bb.0:367; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)368; GFX11-TRUE16-NEXT:    v_add_f16_e32 v0.l, 1.0, v0.l369; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)370; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v0.l, v1.l371; GFX11-TRUE16-NEXT:    v_max_f16_e32 v0.l, v0.l, v1.l372; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0x7e00, v0.l, vcc_lo373; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]374;375; GFX11-FAKE16-LABEL: v_maximum_f16__nnan_src0:376; GFX11-FAKE16:       ; %bb.0:377; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)378; GFX11-FAKE16-NEXT:    v_add_f16_e32 v0, 1.0, v0379; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)380; GFX11-FAKE16-NEXT:    v_max_f16_e32 v2, v0, v1381; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v0, v1382; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0x7e00, v2, vcc_lo383; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]384;385; GFX12-TRUE16-LABEL: v_maximum_f16__nnan_src0:386; GFX12-TRUE16:       ; %bb.0:387; GFX12-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x0388; GFX12-TRUE16-NEXT:    s_wait_expcnt 0x0389; GFX12-TRUE16-NEXT:    s_wait_samplecnt 0x0390; GFX12-TRUE16-NEXT:    s_wait_bvhcnt 0x0391; GFX12-TRUE16-NEXT:    s_wait_kmcnt 0x0392; GFX12-TRUE16-NEXT:    v_add_f16_e32 v0.l, 1.0, v0.l393; GFX12-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)394; GFX12-TRUE16-NEXT:    v_maximum_f16 v0.l, v0.l, v1.l395; GFX12-TRUE16-NEXT:    s_setpc_b64 s[30:31]396;397; GFX12-FAKE16-LABEL: v_maximum_f16__nnan_src0:398; GFX12-FAKE16:       ; %bb.0:399; GFX12-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x0400; GFX12-FAKE16-NEXT:    s_wait_expcnt 0x0401; GFX12-FAKE16-NEXT:    s_wait_samplecnt 0x0402; GFX12-FAKE16-NEXT:    s_wait_bvhcnt 0x0403; GFX12-FAKE16-NEXT:    s_wait_kmcnt 0x0404; GFX12-FAKE16-NEXT:    v_add_f16_e32 v0, 1.0, v0405; GFX12-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)406; GFX12-FAKE16-NEXT:    v_maximum_f16 v0, v0, v1407; GFX12-FAKE16-NEXT:    s_setpc_b64 s[30:31]408  %src0 = fadd nnan half %arg0, 1.0409  %op = call half @llvm.maximum.f16(half %src0, half %src1)410  ret half %op411}412 413define half @v_maximum_f16__nnan_src1(half %src0, half %arg1) {414; GFX7-LABEL: v_maximum_f16__nnan_src1:415; GFX7:       ; %bb.0:416; GFX7-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)417; GFX7-NEXT:    v_cvt_f16_f32_e32 v1, v1418; GFX7-NEXT:    v_cvt_f16_f32_e32 v0, v0419; GFX7-NEXT:    v_mov_b32_e32 v2, 0x7fc00000420; GFX7-NEXT:    v_cvt_f32_f16_e32 v1, v1421; GFX7-NEXT:    v_cvt_f32_f16_e32 v0, v0422; GFX7-NEXT:    v_add_f32_e32 v1, 1.0, v1423; GFX7-NEXT:    v_max_f32_e32 v3, v0, v1424; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v0, v1425; GFX7-NEXT:    v_cndmask_b32_e32 v0, v2, v3, vcc426; GFX7-NEXT:    s_setpc_b64 s[30:31]427;428; GFX8-LABEL: v_maximum_f16__nnan_src1:429; GFX8:       ; %bb.0:430; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)431; GFX8-NEXT:    v_add_f16_e32 v1, 1.0, v1432; GFX8-NEXT:    v_max_f16_e32 v2, v0, v1433; GFX8-NEXT:    v_mov_b32_e32 v3, 0x7e00434; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v0, v1435; GFX8-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc436; GFX8-NEXT:    s_setpc_b64 s[30:31]437;438; GFX900-LABEL: v_maximum_f16__nnan_src1:439; GFX900:       ; %bb.0:440; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)441; GFX900-NEXT:    v_add_f16_e32 v1, 1.0, v1442; GFX900-NEXT:    v_max_f16_e32 v2, v0, v1443; GFX900-NEXT:    v_mov_b32_e32 v3, 0x7e00444; GFX900-NEXT:    v_cmp_o_f16_e32 vcc, v0, v1445; GFX900-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc446; GFX900-NEXT:    s_setpc_b64 s[30:31]447;448; GFX950-LABEL: v_maximum_f16__nnan_src1:449; GFX950:       ; %bb.0:450; GFX950-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)451; GFX950-NEXT:    v_add_f16_e32 v1, 1.0, v1452; GFX950-NEXT:    v_pk_maximum3_f16 v0, v0, v1, v1453; GFX950-NEXT:    s_setpc_b64 s[30:31]454;455; GFX10-LABEL: v_maximum_f16__nnan_src1:456; GFX10:       ; %bb.0:457; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)458; GFX10-NEXT:    v_add_f16_e32 v1, 1.0, v1459; GFX10-NEXT:    v_max_f16_e32 v2, v0, v1460; GFX10-NEXT:    v_cmp_o_f16_e32 vcc_lo, v0, v1461; GFX10-NEXT:    v_cndmask_b32_e32 v0, 0x7e00, v2, vcc_lo462; GFX10-NEXT:    s_setpc_b64 s[30:31]463;464; GFX11-TRUE16-LABEL: v_maximum_f16__nnan_src1:465; GFX11-TRUE16:       ; %bb.0:466; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)467; GFX11-TRUE16-NEXT:    v_add_f16_e32 v0.h, 1.0, v1.l468; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)469; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v0.l, v0.h470; GFX11-TRUE16-NEXT:    v_max_f16_e32 v0.l, v0.l, v0.h471; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0x7e00, v0.l, vcc_lo472; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]473;474; GFX11-FAKE16-LABEL: v_maximum_f16__nnan_src1:475; GFX11-FAKE16:       ; %bb.0:476; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)477; GFX11-FAKE16-NEXT:    v_add_f16_e32 v1, 1.0, v1478; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)479; GFX11-FAKE16-NEXT:    v_max_f16_e32 v2, v0, v1480; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v0, v1481; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0x7e00, v2, vcc_lo482; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]483;484; GFX12-TRUE16-LABEL: v_maximum_f16__nnan_src1:485; GFX12-TRUE16:       ; %bb.0:486; GFX12-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x0487; GFX12-TRUE16-NEXT:    s_wait_expcnt 0x0488; GFX12-TRUE16-NEXT:    s_wait_samplecnt 0x0489; GFX12-TRUE16-NEXT:    s_wait_bvhcnt 0x0490; GFX12-TRUE16-NEXT:    s_wait_kmcnt 0x0491; GFX12-TRUE16-NEXT:    v_add_f16_e32 v1.l, 1.0, v1.l492; GFX12-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)493; GFX12-TRUE16-NEXT:    v_maximum_f16 v0.l, v0.l, v1.l494; GFX12-TRUE16-NEXT:    s_setpc_b64 s[30:31]495;496; GFX12-FAKE16-LABEL: v_maximum_f16__nnan_src1:497; GFX12-FAKE16:       ; %bb.0:498; GFX12-FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x0499; GFX12-FAKE16-NEXT:    s_wait_expcnt 0x0500; GFX12-FAKE16-NEXT:    s_wait_samplecnt 0x0501; GFX12-FAKE16-NEXT:    s_wait_bvhcnt 0x0502; GFX12-FAKE16-NEXT:    s_wait_kmcnt 0x0503; GFX12-FAKE16-NEXT:    v_add_f16_e32 v1, 1.0, v1504; GFX12-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)505; GFX12-FAKE16-NEXT:    v_maximum_f16 v0, v0, v1506; GFX12-FAKE16-NEXT:    s_setpc_b64 s[30:31]507  %src1 = fadd nnan half %arg1, 1.0508  %op = call half @llvm.maximum.f16(half %src0, half %src1)509  ret half %op510}511 512define void @s_maximum_f16(half inreg %src0, half inreg %src1) {513; GFX7-LABEL: s_maximum_f16:514; GFX7:       ; %bb.0:515; GFX7-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)516; GFX7-NEXT:    v_cvt_f16_f32_e32 v0, s17517; GFX7-NEXT:    v_cvt_f16_f32_e32 v1, s16518; GFX7-NEXT:    v_mov_b32_e32 v2, 0x7fc00000519; GFX7-NEXT:    v_cvt_f32_f16_e32 v0, v0520; GFX7-NEXT:    v_cvt_f32_f16_e32 v1, v1521; GFX7-NEXT:    v_max_f32_e32 v3, v1, v0522; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v1, v0523; GFX7-NEXT:    v_cndmask_b32_e32 v0, v2, v3, vcc524; GFX7-NEXT:    v_cvt_f16_f32_e32 v0, v0525; GFX7-NEXT:    ;;#ASMSTART526; GFX7-NEXT:    ; use v0527; GFX7-NEXT:    ;;#ASMEND528; GFX7-NEXT:    s_setpc_b64 s[30:31]529;530; GFX8-LABEL: s_maximum_f16:531; GFX8:       ; %bb.0:532; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)533; GFX8-NEXT:    v_mov_b32_e32 v0, s17534; GFX8-NEXT:    v_max_f16_e32 v1, s16, v0535; GFX8-NEXT:    v_mov_b32_e32 v2, 0x7e00536; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, s16, v0537; GFX8-NEXT:    v_cndmask_b32_e32 v0, v2, v1, vcc538; GFX8-NEXT:    v_and_b32_e32 v0, 0xffff, v0539; GFX8-NEXT:    ;;#ASMSTART540; GFX8-NEXT:    ; use v0541; GFX8-NEXT:    ;;#ASMEND542; GFX8-NEXT:    s_setpc_b64 s[30:31]543;544; GFX900-LABEL: s_maximum_f16:545; GFX900:       ; %bb.0:546; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)547; GFX900-NEXT:    v_mov_b32_e32 v0, s17548; GFX900-NEXT:    v_max_f16_e32 v1, s16, v0549; GFX900-NEXT:    v_mov_b32_e32 v2, 0x7e00550; GFX900-NEXT:    v_cmp_o_f16_e32 vcc, s16, v0551; GFX900-NEXT:    v_cndmask_b32_e32 v0, v2, v1, vcc552; GFX900-NEXT:    v_and_b32_e32 v0, 0xffff, v0553; GFX900-NEXT:    ;;#ASMSTART554; GFX900-NEXT:    ; use v0555; GFX900-NEXT:    ;;#ASMEND556; GFX900-NEXT:    s_setpc_b64 s[30:31]557;558; GFX950-LABEL: s_maximum_f16:559; GFX950:       ; %bb.0:560; GFX950-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)561; GFX950-NEXT:    v_mov_b32_e32 v0, s0562; GFX950-NEXT:    v_pk_maximum3_f16 v0, v0, s1, s1563; GFX950-NEXT:    s_nop 0564; GFX950-NEXT:    v_and_b32_e32 v0, 0xffff, v0565; GFX950-NEXT:    ;;#ASMSTART566; GFX950-NEXT:    ; use v0567; GFX950-NEXT:    ;;#ASMEND568; GFX950-NEXT:    s_setpc_b64 s[30:31]569;570; GFX10-LABEL: s_maximum_f16:571; GFX10:       ; %bb.0:572; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)573; GFX10-NEXT:    v_max_f16_e64 v0, s16, s17574; GFX10-NEXT:    v_cmp_o_f16_e64 vcc_lo, s16, s17575; GFX10-NEXT:    v_cndmask_b32_e32 v0, 0x7e00, v0, vcc_lo576; GFX10-NEXT:    v_and_b32_e32 v0, 0xffff, v0577; GFX10-NEXT:    ;;#ASMSTART578; GFX10-NEXT:    ; use v0579; GFX10-NEXT:    ;;#ASMEND580; GFX10-NEXT:    s_setpc_b64 s[30:31]581;582; GFX11-TRUE16-LABEL: s_maximum_f16:583; GFX11-TRUE16:       ; %bb.0:584; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)585; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s2, s0, s1586; GFX11-TRUE16-NEXT:    v_max_f16_e64 v0.l, s0, s1587; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)588; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0x7e00, v0.l, s2589; GFX11-TRUE16-NEXT:    v_and_b32_e32 v0, 0xffff, v0590; GFX11-TRUE16-NEXT:    ;;#ASMSTART591; GFX11-TRUE16-NEXT:    ; use v0592; GFX11-TRUE16-NEXT:    ;;#ASMEND593; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]594;595; GFX11-FAKE16-LABEL: s_maximum_f16:596; GFX11-FAKE16:       ; %bb.0:597; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)598; GFX11-FAKE16-NEXT:    v_max_f16_e64 v0, s0, s1599; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e64 vcc_lo, s0, s1600; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)601; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0x7e00, v0, vcc_lo602; GFX11-FAKE16-NEXT:    v_and_b32_e32 v0, 0xffff, v0603; GFX11-FAKE16-NEXT:    ;;#ASMSTART604; GFX11-FAKE16-NEXT:    ; use v0605; GFX11-FAKE16-NEXT:    ;;#ASMEND606; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]607;608; GFX12-LABEL: s_maximum_f16:609; GFX12:       ; %bb.0:610; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0611; GFX12-NEXT:    s_wait_expcnt 0x0612; GFX12-NEXT:    s_wait_samplecnt 0x0613; GFX12-NEXT:    s_wait_bvhcnt 0x0614; GFX12-NEXT:    s_wait_kmcnt 0x0615; GFX12-NEXT:    s_maximum_f16 s0, s0, s1616; GFX12-NEXT:    s_wait_alu depctr_sa_sdst(0)617; GFX12-NEXT:    s_delay_alu instid0(SALU_CYCLE_2)618; GFX12-NEXT:    s_and_b32 s0, 0xffff, s0619; GFX12-NEXT:    ;;#ASMSTART620; GFX12-NEXT:    ; use s0621; GFX12-NEXT:    ;;#ASMEND622; GFX12-NEXT:    s_wait_alu depctr_sa_sdst(0)623; GFX12-NEXT:    s_setpc_b64 s[30:31]624  %op = call half @llvm.maximum.f16(half %src0, half %src1)625  %cast = bitcast half %op to i16626  %zext = zext i16 %cast to i32627  call void asm sideeffect "; use $0", "s"(i32 %zext)628  ret void629}630 631define <2 x half> @v_maximum_v2f16(<2 x half> %src0, <2 x half> %src1) {632; GFX7-LABEL: v_maximum_v2f16:633; GFX7:       ; %bb.0:634; GFX7-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)635; GFX7-NEXT:    v_cvt_f16_f32_e32 v2, v2636; GFX7-NEXT:    v_cvt_f16_f32_e32 v0, v0637; GFX7-NEXT:    v_cvt_f16_f32_e32 v3, v3638; GFX7-NEXT:    v_cvt_f16_f32_e32 v1, v1639; GFX7-NEXT:    v_cvt_f32_f16_e32 v2, v2640; GFX7-NEXT:    v_cvt_f32_f16_e32 v0, v0641; GFX7-NEXT:    v_cvt_f32_f16_e32 v3, v3642; GFX7-NEXT:    v_cvt_f32_f16_e32 v1, v1643; GFX7-NEXT:    v_mov_b32_e32 v5, 0x7fc00000644; GFX7-NEXT:    v_max_f32_e32 v4, v0, v2645; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v0, v2646; GFX7-NEXT:    v_cndmask_b32_e32 v0, v5, v4, vcc647; GFX7-NEXT:    v_max_f32_e32 v2, v1, v3648; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v1, v3649; GFX7-NEXT:    v_cndmask_b32_e32 v1, v5, v2, vcc650; GFX7-NEXT:    s_setpc_b64 s[30:31]651;652; GFX8-LABEL: v_maximum_v2f16:653; GFX8:       ; %bb.0:654; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)655; GFX8-NEXT:    v_lshrrev_b32_e32 v2, 16, v1656; GFX8-NEXT:    v_lshrrev_b32_e32 v3, 16, v0657; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v3, v2658; GFX8-NEXT:    v_max_f16_e32 v2, v3, v2659; GFX8-NEXT:    v_mov_b32_e32 v3, 0x7e00660; GFX8-NEXT:    v_cndmask_b32_sdwa v2, v3, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD661; GFX8-NEXT:    v_max_f16_e32 v4, v0, v1662; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v0, v1663; GFX8-NEXT:    v_cndmask_b32_e32 v0, v3, v4, vcc664; GFX8-NEXT:    v_or_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD665; GFX8-NEXT:    s_setpc_b64 s[30:31]666;667; GFX900-LABEL: v_maximum_v2f16:668; GFX900:       ; %bb.0:669; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)670; GFX900-NEXT:    v_pk_max_f16 v2, v0, v1671; GFX900-NEXT:    v_mov_b32_e32 v3, 0x7e00672; GFX900-NEXT:    v_cmp_o_f16_e32 vcc, v0, v1673; GFX900-NEXT:    v_cndmask_b32_e32 v4, v3, v2, vcc674; GFX900-NEXT:    v_cmp_o_f16_sdwa vcc, v0, v1 src0_sel:WORD_1 src1_sel:WORD_1675; GFX900-NEXT:    v_cndmask_b32_sdwa v0, v3, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1676; GFX900-NEXT:    s_mov_b32 s4, 0x5040100677; GFX900-NEXT:    v_perm_b32 v0, v0, v4, s4678; GFX900-NEXT:    s_setpc_b64 s[30:31]679;680; GFX950-LABEL: v_maximum_v2f16:681; GFX950:       ; %bb.0:682; GFX950-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)683; GFX950-NEXT:    v_pk_maximum3_f16 v0, v0, v1, v1684; GFX950-NEXT:    s_setpc_b64 s[30:31]685;686; GFX10-LABEL: v_maximum_v2f16:687; GFX10:       ; %bb.0:688; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)689; GFX10-NEXT:    v_pk_max_f16 v2, v0, v1690; GFX10-NEXT:    v_cmp_o_f16_sdwa vcc_lo, v0, v1 src0_sel:WORD_1 src1_sel:WORD_1691; GFX10-NEXT:    v_mov_b32_e32 v3, 0x7e00692; GFX10-NEXT:    v_cmp_o_f16_e64 s4, v0, v1693; GFX10-NEXT:    v_cndmask_b32_sdwa v1, v3, v2, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1694; GFX10-NEXT:    v_cndmask_b32_e64 v0, 0x7e00, v2, s4695; GFX10-NEXT:    v_perm_b32 v0, v1, v0, 0x5040100696; GFX10-NEXT:    s_setpc_b64 s[30:31]697;698; GFX11-TRUE16-LABEL: v_maximum_v2f16:699; GFX11-TRUE16:       ; %bb.0:700; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)701; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v0.l, v1.l702; GFX11-TRUE16-NEXT:    v_pk_max_f16 v2, v0, v1703; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s0, v0.h, v1.h704; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)705; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0x7e00, v2.l, vcc_lo706; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0x7e00, v2.h, s0707; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]708;709; GFX11-FAKE16-LABEL: v_maximum_v2f16:710; GFX11-FAKE16:       ; %bb.0:711; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)712; GFX11-FAKE16-NEXT:    v_pk_max_f16 v2, v0, v1713; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v3, 16, v1714; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v4, 16, v0715; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v0, v1716; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)717; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v5, 16, v2718; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0x7e00, v2, vcc_lo719; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v4, v3720; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)721; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0x7e00, v5, vcc_lo722; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x5040100723; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]724;725; GFX12-LABEL: v_maximum_v2f16:726; GFX12:       ; %bb.0:727; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0728; GFX12-NEXT:    s_wait_expcnt 0x0729; GFX12-NEXT:    s_wait_samplecnt 0x0730; GFX12-NEXT:    s_wait_bvhcnt 0x0731; GFX12-NEXT:    s_wait_kmcnt 0x0732; GFX12-NEXT:    v_pk_maximum_f16 v0, v0, v1733; GFX12-NEXT:    s_setpc_b64 s[30:31]734  %op = call <2 x half> @llvm.maximum.v2f16(<2 x half> %src0, <2 x half> %src1)735  ret <2 x half> %op736}737 738define <2 x half> @v_maximum_v2f16__nnan(<2 x half> %src0, <2 x half> %src1) {739; GFX7-LABEL: v_maximum_v2f16__nnan:740; GFX7:       ; %bb.0:741; GFX7-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)742; GFX7-NEXT:    v_cvt_f16_f32_e32 v3, v3743; GFX7-NEXT:    v_cvt_f16_f32_e32 v2, v2744; GFX7-NEXT:    v_cvt_f16_f32_e32 v0, v0745; GFX7-NEXT:    v_cvt_f16_f32_e32 v1, v1746; GFX7-NEXT:    v_cvt_f32_f16_e32 v3, v3747; GFX7-NEXT:    v_cvt_f32_f16_e32 v2, v2748; GFX7-NEXT:    v_cvt_f32_f16_e32 v0, v0749; GFX7-NEXT:    v_cvt_f32_f16_e32 v1, v1750; GFX7-NEXT:    v_max_f32_e32 v0, v0, v2751; GFX7-NEXT:    v_max_f32_e32 v1, v1, v3752; GFX7-NEXT:    s_setpc_b64 s[30:31]753;754; GFX8-LABEL: v_maximum_v2f16__nnan:755; GFX8:       ; %bb.0:756; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)757; GFX8-NEXT:    v_max_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1758; GFX8-NEXT:    v_max_f16_e32 v0, v0, v1759; GFX8-NEXT:    v_or_b32_e32 v0, v0, v2760; GFX8-NEXT:    s_setpc_b64 s[30:31]761;762; GFX9-LABEL: v_maximum_v2f16__nnan:763; GFX9:       ; %bb.0:764; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)765; GFX9-NEXT:    v_pk_max_f16 v0, v0, v1766; GFX9-NEXT:    s_setpc_b64 s[30:31]767;768; GFX10-LABEL: v_maximum_v2f16__nnan:769; GFX10:       ; %bb.0:770; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)771; GFX10-NEXT:    v_pk_max_f16 v0, v0, v1772; GFX10-NEXT:    s_setpc_b64 s[30:31]773;774; GFX11-LABEL: v_maximum_v2f16__nnan:775; GFX11:       ; %bb.0:776; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)777; GFX11-NEXT:    v_pk_max_f16 v0, v0, v1778; GFX11-NEXT:    s_setpc_b64 s[30:31]779;780; GFX12-LABEL: v_maximum_v2f16__nnan:781; GFX12:       ; %bb.0:782; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0783; GFX12-NEXT:    s_wait_expcnt 0x0784; GFX12-NEXT:    s_wait_samplecnt 0x0785; GFX12-NEXT:    s_wait_bvhcnt 0x0786; GFX12-NEXT:    s_wait_kmcnt 0x0787; GFX12-NEXT:    v_pk_maximum_f16 v0, v0, v1788; GFX12-NEXT:    s_setpc_b64 s[30:31]789  %op = call nnan <2 x half> @llvm.maximum.v2f16(<2 x half> %src0, <2 x half> %src1)790  ret <2 x half> %op791}792 793define <2 x half> @v_maximum_v2f16__nsz(<2 x half> %src0, <2 x half> %src1) {794; GFX7-LABEL: v_maximum_v2f16__nsz:795; GFX7:       ; %bb.0:796; GFX7-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)797; GFX7-NEXT:    v_cvt_f16_f32_e32 v2, v2798; GFX7-NEXT:    v_cvt_f16_f32_e32 v0, v0799; GFX7-NEXT:    v_cvt_f16_f32_e32 v3, v3800; GFX7-NEXT:    v_cvt_f16_f32_e32 v1, v1801; GFX7-NEXT:    v_cvt_f32_f16_e32 v2, v2802; GFX7-NEXT:    v_cvt_f32_f16_e32 v0, v0803; GFX7-NEXT:    v_cvt_f32_f16_e32 v3, v3804; GFX7-NEXT:    v_cvt_f32_f16_e32 v1, v1805; GFX7-NEXT:    v_mov_b32_e32 v5, 0x7fc00000806; GFX7-NEXT:    v_max_f32_e32 v4, v0, v2807; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v0, v2808; GFX7-NEXT:    v_cndmask_b32_e32 v0, v5, v4, vcc809; GFX7-NEXT:    v_max_f32_e32 v2, v1, v3810; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v1, v3811; GFX7-NEXT:    v_cndmask_b32_e32 v1, v5, v2, vcc812; GFX7-NEXT:    s_setpc_b64 s[30:31]813;814; GFX8-LABEL: v_maximum_v2f16__nsz:815; GFX8:       ; %bb.0:816; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)817; GFX8-NEXT:    v_lshrrev_b32_e32 v2, 16, v1818; GFX8-NEXT:    v_lshrrev_b32_e32 v3, 16, v0819; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v3, v2820; GFX8-NEXT:    v_max_f16_e32 v2, v3, v2821; GFX8-NEXT:    v_mov_b32_e32 v3, 0x7e00822; GFX8-NEXT:    v_cndmask_b32_sdwa v2, v3, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD823; GFX8-NEXT:    v_max_f16_e32 v4, v0, v1824; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v0, v1825; GFX8-NEXT:    v_cndmask_b32_e32 v0, v3, v4, vcc826; GFX8-NEXT:    v_or_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD827; GFX8-NEXT:    s_setpc_b64 s[30:31]828;829; GFX900-LABEL: v_maximum_v2f16__nsz:830; GFX900:       ; %bb.0:831; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)832; GFX900-NEXT:    v_pk_max_f16 v2, v0, v1833; GFX900-NEXT:    v_mov_b32_e32 v3, 0x7e00834; GFX900-NEXT:    v_cmp_o_f16_e32 vcc, v0, v1835; GFX900-NEXT:    v_cndmask_b32_e32 v4, v3, v2, vcc836; GFX900-NEXT:    v_cmp_o_f16_sdwa vcc, v0, v1 src0_sel:WORD_1 src1_sel:WORD_1837; GFX900-NEXT:    v_cndmask_b32_sdwa v0, v3, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1838; GFX900-NEXT:    s_mov_b32 s4, 0x5040100839; GFX900-NEXT:    v_perm_b32 v0, v0, v4, s4840; GFX900-NEXT:    s_setpc_b64 s[30:31]841;842; GFX950-LABEL: v_maximum_v2f16__nsz:843; GFX950:       ; %bb.0:844; GFX950-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)845; GFX950-NEXT:    v_pk_maximum3_f16 v0, v0, v1, v1846; GFX950-NEXT:    s_setpc_b64 s[30:31]847;848; GFX10-LABEL: v_maximum_v2f16__nsz:849; GFX10:       ; %bb.0:850; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)851; GFX10-NEXT:    v_pk_max_f16 v2, v0, v1852; GFX10-NEXT:    v_cmp_o_f16_sdwa vcc_lo, v0, v1 src0_sel:WORD_1 src1_sel:WORD_1853; GFX10-NEXT:    v_mov_b32_e32 v3, 0x7e00854; GFX10-NEXT:    v_cmp_o_f16_e64 s4, v0, v1855; GFX10-NEXT:    v_cndmask_b32_sdwa v1, v3, v2, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1856; GFX10-NEXT:    v_cndmask_b32_e64 v0, 0x7e00, v2, s4857; GFX10-NEXT:    v_perm_b32 v0, v1, v0, 0x5040100858; GFX10-NEXT:    s_setpc_b64 s[30:31]859;860; GFX11-TRUE16-LABEL: v_maximum_v2f16__nsz:861; GFX11-TRUE16:       ; %bb.0:862; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)863; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v0.l, v1.l864; GFX11-TRUE16-NEXT:    v_pk_max_f16 v2, v0, v1865; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s0, v0.h, v1.h866; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)867; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0x7e00, v2.l, vcc_lo868; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0x7e00, v2.h, s0869; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]870;871; GFX11-FAKE16-LABEL: v_maximum_v2f16__nsz:872; GFX11-FAKE16:       ; %bb.0:873; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)874; GFX11-FAKE16-NEXT:    v_pk_max_f16 v2, v0, v1875; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v3, 16, v1876; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v4, 16, v0877; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v0, v1878; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)879; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v5, 16, v2880; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0x7e00, v2, vcc_lo881; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v4, v3882; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)883; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0x7e00, v5, vcc_lo884; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x5040100885; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]886;887; GFX12-LABEL: v_maximum_v2f16__nsz:888; GFX12:       ; %bb.0:889; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0890; GFX12-NEXT:    s_wait_expcnt 0x0891; GFX12-NEXT:    s_wait_samplecnt 0x0892; GFX12-NEXT:    s_wait_bvhcnt 0x0893; GFX12-NEXT:    s_wait_kmcnt 0x0894; GFX12-NEXT:    v_pk_maximum_f16 v0, v0, v1895; GFX12-NEXT:    s_setpc_b64 s[30:31]896  %op = call nsz <2 x half> @llvm.maximum.v2f16(<2 x half> %src0, <2 x half> %src1)897  ret <2 x half> %op898}899 900define <2 x half> @v_maximum_v2f16__nnan_nsz(<2 x half> %src0, <2 x half> %src1) {901; GFX7-LABEL: v_maximum_v2f16__nnan_nsz:902; GFX7:       ; %bb.0:903; GFX7-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)904; GFX7-NEXT:    v_cvt_f16_f32_e32 v3, v3905; GFX7-NEXT:    v_cvt_f16_f32_e32 v2, v2906; GFX7-NEXT:    v_cvt_f16_f32_e32 v0, v0907; GFX7-NEXT:    v_cvt_f16_f32_e32 v1, v1908; GFX7-NEXT:    v_cvt_f32_f16_e32 v3, v3909; GFX7-NEXT:    v_cvt_f32_f16_e32 v2, v2910; GFX7-NEXT:    v_cvt_f32_f16_e32 v0, v0911; GFX7-NEXT:    v_cvt_f32_f16_e32 v1, v1912; GFX7-NEXT:    v_max_f32_e32 v0, v0, v2913; GFX7-NEXT:    v_max_f32_e32 v1, v1, v3914; GFX7-NEXT:    s_setpc_b64 s[30:31]915;916; GFX8-LABEL: v_maximum_v2f16__nnan_nsz:917; GFX8:       ; %bb.0:918; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)919; GFX8-NEXT:    v_max_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1920; GFX8-NEXT:    v_max_f16_e32 v0, v0, v1921; GFX8-NEXT:    v_or_b32_e32 v0, v0, v2922; GFX8-NEXT:    s_setpc_b64 s[30:31]923;924; GFX9-LABEL: v_maximum_v2f16__nnan_nsz:925; GFX9:       ; %bb.0:926; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)927; GFX9-NEXT:    v_pk_max_f16 v0, v0, v1928; GFX9-NEXT:    s_setpc_b64 s[30:31]929;930; GFX10-LABEL: v_maximum_v2f16__nnan_nsz:931; GFX10:       ; %bb.0:932; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)933; GFX10-NEXT:    v_pk_max_f16 v0, v0, v1934; GFX10-NEXT:    s_setpc_b64 s[30:31]935;936; GFX11-LABEL: v_maximum_v2f16__nnan_nsz:937; GFX11:       ; %bb.0:938; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)939; GFX11-NEXT:    v_pk_max_f16 v0, v0, v1940; GFX11-NEXT:    s_setpc_b64 s[30:31]941;942; GFX12-LABEL: v_maximum_v2f16__nnan_nsz:943; GFX12:       ; %bb.0:944; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0945; GFX12-NEXT:    s_wait_expcnt 0x0946; GFX12-NEXT:    s_wait_samplecnt 0x0947; GFX12-NEXT:    s_wait_bvhcnt 0x0948; GFX12-NEXT:    s_wait_kmcnt 0x0949; GFX12-NEXT:    v_pk_maximum_f16 v0, v0, v1950; GFX12-NEXT:    s_setpc_b64 s[30:31]951  %op = call nnan nsz <2 x half> @llvm.maximum.v2f16(<2 x half> %src0, <2 x half> %src1)952  ret <2 x half> %op953}954 955define void @s_maximum_v2f16(<2 x half> inreg %src0, <2 x half> inreg %src1) {956; GFX7-LABEL: s_maximum_v2f16:957; GFX7:       ; %bb.0:958; GFX7-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)959; GFX7-NEXT:    v_cvt_f16_f32_e32 v0, s19960; GFX7-NEXT:    v_cvt_f16_f32_e32 v1, s17961; GFX7-NEXT:    v_cvt_f16_f32_e32 v2, s18962; GFX7-NEXT:    v_cvt_f16_f32_e32 v3, s16963; GFX7-NEXT:    v_cvt_f32_f16_e32 v0, v0964; GFX7-NEXT:    v_cvt_f32_f16_e32 v1, v1965; GFX7-NEXT:    v_cvt_f32_f16_e32 v2, v2966; GFX7-NEXT:    v_cvt_f32_f16_e32 v3, v3967; GFX7-NEXT:    v_mov_b32_e32 v5, 0x7fc00000968; GFX7-NEXT:    v_max_f32_e32 v4, v1, v0969; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v1, v0970; GFX7-NEXT:    v_cndmask_b32_e32 v0, v5, v4, vcc971; GFX7-NEXT:    v_max_f32_e32 v1, v3, v2972; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v3, v2973; GFX7-NEXT:    v_cvt_f16_f32_e32 v0, v0974; GFX7-NEXT:    v_cndmask_b32_e32 v1, v5, v1, vcc975; GFX7-NEXT:    v_cvt_f16_f32_e32 v1, v1976; GFX7-NEXT:    v_lshlrev_b32_e32 v0, 16, v0977; GFX7-NEXT:    v_or_b32_e32 v0, v1, v0978; GFX7-NEXT:    ;;#ASMSTART979; GFX7-NEXT:    ; use v0980; GFX7-NEXT:    ;;#ASMEND981; GFX7-NEXT:    s_setpc_b64 s[30:31]982;983; GFX8-LABEL: s_maximum_v2f16:984; GFX8:       ; %bb.0:985; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)986; GFX8-NEXT:    s_lshr_b32 s4, s17, 16987; GFX8-NEXT:    s_lshr_b32 s5, s16, 16988; GFX8-NEXT:    v_mov_b32_e32 v0, s4989; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, s5, v0990; GFX8-NEXT:    v_max_f16_e32 v0, s5, v0991; GFX8-NEXT:    v_mov_b32_e32 v1, 0x7e00992; GFX8-NEXT:    v_mov_b32_e32 v2, s17993; GFX8-NEXT:    v_cndmask_b32_sdwa v0, v1, v0, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD994; GFX8-NEXT:    v_max_f16_e32 v3, s16, v2995; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, s16, v2996; GFX8-NEXT:    v_cndmask_b32_e32 v1, v1, v3, vcc997; GFX8-NEXT:    v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD998; GFX8-NEXT:    ;;#ASMSTART999; GFX8-NEXT:    ; use v01000; GFX8-NEXT:    ;;#ASMEND1001; GFX8-NEXT:    s_setpc_b64 s[30:31]1002;1003; GFX900-LABEL: s_maximum_v2f16:1004; GFX900:       ; %bb.0:1005; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1006; GFX900-NEXT:    v_mov_b32_e32 v0, s171007; GFX900-NEXT:    v_mov_b32_e32 v1, s171008; GFX900-NEXT:    s_lshr_b32 s4, s17, 161009; GFX900-NEXT:    v_pk_max_f16 v1, s16, v11010; GFX900-NEXT:    v_mov_b32_e32 v2, 0x7e001011; GFX900-NEXT:    v_cmp_o_f16_e32 vcc, s16, v01012; GFX900-NEXT:    s_lshr_b32 s5, s16, 161013; GFX900-NEXT:    v_mov_b32_e32 v3, s41014; GFX900-NEXT:    v_cndmask_b32_e32 v0, v2, v1, vcc1015; GFX900-NEXT:    v_cmp_o_f16_e32 vcc, s5, v31016; GFX900-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11017; GFX900-NEXT:    v_and_b32_e32 v0, 0xffff, v01018; GFX900-NEXT:    v_lshl_or_b32 v0, v1, 16, v01019; GFX900-NEXT:    ;;#ASMSTART1020; GFX900-NEXT:    ; use v01021; GFX900-NEXT:    ;;#ASMEND1022; GFX900-NEXT:    s_setpc_b64 s[30:31]1023;1024; GFX950-LABEL: s_maximum_v2f16:1025; GFX950:       ; %bb.0:1026; GFX950-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1027; GFX950-NEXT:    v_mov_b32_e32 v0, s01028; GFX950-NEXT:    v_pk_maximum3_f16 v0, v0, s1, s11029; GFX950-NEXT:    s_nop 01030; GFX950-NEXT:    ;;#ASMSTART1031; GFX950-NEXT:    ; use v01032; GFX950-NEXT:    ;;#ASMEND1033; GFX950-NEXT:    s_setpc_b64 s[30:31]1034;1035; GFX10-LABEL: s_maximum_v2f16:1036; GFX10:       ; %bb.0:1037; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1038; GFX10-NEXT:    s_lshr_b32 s4, s17, 161039; GFX10-NEXT:    s_lshr_b32 s5, s16, 161040; GFX10-NEXT:    v_pk_max_f16 v0, s16, s171041; GFX10-NEXT:    v_cmp_o_f16_e64 vcc_lo, s5, s41042; GFX10-NEXT:    v_cmp_o_f16_e64 s4, s16, s171043; GFX10-NEXT:    v_mov_b32_e32 v1, 0x7e001044; GFX10-NEXT:    v_cndmask_b32_e64 v2, 0x7e00, v0, s41045; GFX10-NEXT:    v_cndmask_b32_sdwa v0, v1, v0, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11046; GFX10-NEXT:    v_and_b32_e32 v1, 0xffff, v21047; GFX10-NEXT:    v_lshl_or_b32 v0, v0, 16, v11048; GFX10-NEXT:    ;;#ASMSTART1049; GFX10-NEXT:    ; use v01050; GFX10-NEXT:    ;;#ASMEND1051; GFX10-NEXT:    s_setpc_b64 s[30:31]1052;1053; GFX11-TRUE16-LABEL: s_maximum_v2f16:1054; GFX11-TRUE16:       ; %bb.0:1055; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1056; GFX11-TRUE16-NEXT:    v_pk_max_f16 v0, s0, s11057; GFX11-TRUE16-NEXT:    s_lshr_b32 s2, s1, 161058; GFX11-TRUE16-NEXT:    s_lshr_b32 s3, s0, 161059; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s0, s0, s11060; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s1, s3, s21061; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v1, 16, v01062; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)1063; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0x7e00, v0.l, s01064; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0x7e00, v1.l, s11065; GFX11-TRUE16-NEXT:    ;;#ASMSTART1066; GFX11-TRUE16-NEXT:    ; use v01067; GFX11-TRUE16-NEXT:    ;;#ASMEND1068; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]1069;1070; GFX11-FAKE16-LABEL: s_maximum_v2f16:1071; GFX11-FAKE16:       ; %bb.0:1072; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1073; GFX11-FAKE16-NEXT:    v_pk_max_f16 v0, s0, s11074; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e64 vcc_lo, s0, s11075; GFX11-FAKE16-NEXT:    s_lshr_b32 s2, s1, 161076; GFX11-FAKE16-NEXT:    s_lshr_b32 s0, s0, 161077; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v1, 16, v01078; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0x7e00, v0, vcc_lo1079; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e64 vcc_lo, s0, s21080; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)1081; GFX11-FAKE16-NEXT:    v_and_b32_e32 v0, 0xffff, v01082; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0x7e00, v1, vcc_lo1083; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)1084; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v0, v1, 16, v01085; GFX11-FAKE16-NEXT:    ;;#ASMSTART1086; GFX11-FAKE16-NEXT:    ; use v01087; GFX11-FAKE16-NEXT:    ;;#ASMEND1088; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]1089;1090; GFX12-LABEL: s_maximum_v2f16:1091; GFX12:       ; %bb.0:1092; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x01093; GFX12-NEXT:    s_wait_expcnt 0x01094; GFX12-NEXT:    s_wait_samplecnt 0x01095; GFX12-NEXT:    s_wait_bvhcnt 0x01096; GFX12-NEXT:    s_wait_kmcnt 0x01097; GFX12-NEXT:    v_pk_maximum_f16 v0, s0, s11098; GFX12-NEXT:    ;;#ASMSTART1099; GFX12-NEXT:    ; use v01100; GFX12-NEXT:    ;;#ASMEND1101; GFX12-NEXT:    s_setpc_b64 s[30:31]1102  %op = call <2 x half> @llvm.maximum.v2f16(<2 x half> %src0, <2 x half> %src1)1103  %cast = bitcast <2 x half> %op to i321104  call void asm sideeffect "; use $0", "s"(i32 %cast)1105  ret void1106}1107 1108define <3 x half> @v_maximum_v3f16(<3 x half> %src0, <3 x half> %src1) {1109; GFX7-LABEL: v_maximum_v3f16:1110; GFX7:       ; %bb.0:1111; GFX7-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1112; GFX7-NEXT:    v_cvt_f16_f32_e32 v3, v31113; GFX7-NEXT:    v_cvt_f16_f32_e32 v0, v01114; GFX7-NEXT:    v_cvt_f16_f32_e32 v4, v41115; GFX7-NEXT:    v_cvt_f16_f32_e32 v1, v11116; GFX7-NEXT:    v_cvt_f16_f32_e32 v5, v51117; GFX7-NEXT:    v_cvt_f16_f32_e32 v2, v21118; GFX7-NEXT:    v_cvt_f32_f16_e32 v3, v31119; GFX7-NEXT:    v_cvt_f32_f16_e32 v0, v01120; GFX7-NEXT:    v_cvt_f32_f16_e32 v4, v41121; GFX7-NEXT:    v_cvt_f32_f16_e32 v1, v11122; GFX7-NEXT:    v_cvt_f32_f16_e32 v5, v51123; GFX7-NEXT:    v_cvt_f32_f16_e32 v2, v21124; GFX7-NEXT:    v_max_f32_e32 v6, v0, v31125; GFX7-NEXT:    v_mov_b32_e32 v7, 0x7fc000001126; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v0, v31127; GFX7-NEXT:    v_cndmask_b32_e32 v0, v7, v6, vcc1128; GFX7-NEXT:    v_max_f32_e32 v3, v1, v41129; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v1, v41130; GFX7-NEXT:    v_cndmask_b32_e32 v1, v7, v3, vcc1131; GFX7-NEXT:    v_max_f32_e32 v3, v2, v51132; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v2, v51133; GFX7-NEXT:    v_cndmask_b32_e32 v2, v7, v3, vcc1134; GFX7-NEXT:    s_setpc_b64 s[30:31]1135;1136; GFX8-LABEL: v_maximum_v3f16:1137; GFX8:       ; %bb.0:1138; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1139; GFX8-NEXT:    v_lshrrev_b32_e32 v4, 16, v21140; GFX8-NEXT:    v_lshrrev_b32_e32 v5, 16, v01141; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v5, v41142; GFX8-NEXT:    v_max_f16_e32 v4, v5, v41143; GFX8-NEXT:    v_mov_b32_e32 v5, 0x7e001144; GFX8-NEXT:    v_cndmask_b32_sdwa v4, v5, v4, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD1145; GFX8-NEXT:    v_max_f16_e32 v6, v1, v31146; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v1, v31147; GFX8-NEXT:    v_cndmask_b32_e32 v1, v5, v6, vcc1148; GFX8-NEXT:    v_max_f16_e32 v3, v0, v21149; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v0, v21150; GFX8-NEXT:    v_cndmask_b32_e32 v0, v5, v3, vcc1151; GFX8-NEXT:    v_or_b32_sdwa v0, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1152; GFX8-NEXT:    s_setpc_b64 s[30:31]1153;1154; GFX900-LABEL: v_maximum_v3f16:1155; GFX900:       ; %bb.0:1156; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1157; GFX900-NEXT:    v_pk_max_f16 v4, v1, v31158; GFX900-NEXT:    v_mov_b32_e32 v5, 0x7e001159; GFX900-NEXT:    v_cmp_o_f16_e32 vcc, v1, v31160; GFX900-NEXT:    v_cndmask_b32_e32 v1, v5, v4, vcc1161; GFX900-NEXT:    v_pk_max_f16 v3, v0, v21162; GFX900-NEXT:    v_cmp_o_f16_e32 vcc, v0, v21163; GFX900-NEXT:    v_cndmask_b32_e32 v4, v5, v3, vcc1164; GFX900-NEXT:    v_cmp_o_f16_sdwa vcc, v0, v2 src0_sel:WORD_1 src1_sel:WORD_11165; GFX900-NEXT:    v_cndmask_b32_sdwa v0, v5, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11166; GFX900-NEXT:    s_mov_b32 s4, 0x50401001167; GFX900-NEXT:    v_perm_b32 v0, v0, v4, s41168; GFX900-NEXT:    s_setpc_b64 s[30:31]1169;1170; GFX950-LABEL: v_maximum_v3f16:1171; GFX950:       ; %bb.0:1172; GFX950-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1173; GFX950-NEXT:    v_pk_maximum3_f16 v1, v1, v3, v31174; GFX950-NEXT:    v_pk_maximum3_f16 v0, v0, v2, v21175; GFX950-NEXT:    s_setpc_b64 s[30:31]1176;1177; GFX10-LABEL: v_maximum_v3f16:1178; GFX10:       ; %bb.0:1179; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1180; GFX10-NEXT:    v_pk_max_f16 v4, v0, v21181; GFX10-NEXT:    v_cmp_o_f16_sdwa vcc_lo, v0, v2 src0_sel:WORD_1 src1_sel:WORD_11182; GFX10-NEXT:    v_mov_b32_e32 v5, 0x7e001183; GFX10-NEXT:    v_cmp_o_f16_e64 s4, v0, v21184; GFX10-NEXT:    v_cndmask_b32_sdwa v2, v5, v4, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11185; GFX10-NEXT:    v_cndmask_b32_e64 v0, 0x7e00, v4, s41186; GFX10-NEXT:    v_pk_max_f16 v4, v1, v31187; GFX10-NEXT:    v_cmp_o_f16_e32 vcc_lo, v1, v31188; GFX10-NEXT:    v_perm_b32 v0, v2, v0, 0x50401001189; GFX10-NEXT:    v_cndmask_b32_e32 v1, 0x7e00, v4, vcc_lo1190; GFX10-NEXT:    s_setpc_b64 s[30:31]1191;1192; GFX11-TRUE16-LABEL: v_maximum_v3f16:1193; GFX11-TRUE16:       ; %bb.0:1194; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1195; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v1.l, v3.l1196; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s0, v0.l, v2.l1197; GFX11-TRUE16-NEXT:    v_pk_max_f16 v4, v0, v21198; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s1, v0.h, v2.h1199; GFX11-TRUE16-NEXT:    v_pk_max_f16 v1, v1, v31200; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)1201; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0x7e00, v4.l, s01202; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0x7e00, v4.h, s11203; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3)1204; GFX11-TRUE16-NEXT:    v_cndmask_b16 v1.l, 0x7e00, v1.l, vcc_lo1205; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]1206;1207; GFX11-FAKE16-LABEL: v_maximum_v3f16:1208; GFX11-FAKE16:       ; %bb.0:1209; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1210; GFX11-FAKE16-NEXT:    v_pk_max_f16 v4, v0, v21211; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v5, 16, v21212; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v6, 16, v01213; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v0, v21214; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)1215; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v7, 16, v41216; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0x7e00, v4, vcc_lo1217; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v6, v51218; GFX11-FAKE16-NEXT:    v_pk_max_f16 v4, v1, v31219; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)1220; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v2, 0x7e00, v7, vcc_lo1221; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v1, v31222; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v2, v0, 0x50401001223; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_4)1224; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0x7e00, v4, vcc_lo1225; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]1226;1227; GFX12-LABEL: v_maximum_v3f16:1228; GFX12:       ; %bb.0:1229; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x01230; GFX12-NEXT:    s_wait_expcnt 0x01231; GFX12-NEXT:    s_wait_samplecnt 0x01232; GFX12-NEXT:    s_wait_bvhcnt 0x01233; GFX12-NEXT:    s_wait_kmcnt 0x01234; GFX12-NEXT:    v_pk_maximum_f16 v0, v0, v21235; GFX12-NEXT:    v_pk_maximum_f16 v1, v1, v31236; GFX12-NEXT:    s_setpc_b64 s[30:31]1237  %op = call <3 x half> @llvm.maximum.v3f16(<3 x half> %src0, <3 x half> %src1)1238  ret <3 x half> %op1239}1240 1241define <3 x half> @v_maximum_v3f16__nnan(<3 x half> %src0, <3 x half> %src1) {1242; GFX7-LABEL: v_maximum_v3f16__nnan:1243; GFX7:       ; %bb.0:1244; GFX7-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1245; GFX7-NEXT:    v_cvt_f16_f32_e32 v5, v51246; GFX7-NEXT:    v_cvt_f16_f32_e32 v2, v21247; GFX7-NEXT:    v_cvt_f16_f32_e32 v4, v41248; GFX7-NEXT:    v_cvt_f16_f32_e32 v3, v31249; GFX7-NEXT:    v_cvt_f16_f32_e32 v0, v01250; GFX7-NEXT:    v_cvt_f16_f32_e32 v1, v11251; GFX7-NEXT:    v_cvt_f32_f16_e32 v5, v51252; GFX7-NEXT:    v_cvt_f32_f16_e32 v4, v41253; GFX7-NEXT:    v_cvt_f32_f16_e32 v3, v31254; GFX7-NEXT:    v_cvt_f32_f16_e32 v0, v01255; GFX7-NEXT:    v_cvt_f32_f16_e32 v1, v11256; GFX7-NEXT:    v_cvt_f32_f16_e32 v2, v21257; GFX7-NEXT:    v_max_f32_e32 v0, v0, v31258; GFX7-NEXT:    v_max_f32_e32 v1, v1, v41259; GFX7-NEXT:    v_max_f32_e32 v2, v2, v51260; GFX7-NEXT:    s_setpc_b64 s[30:31]1261;1262; GFX8-LABEL: v_maximum_v3f16__nnan:1263; GFX8:       ; %bb.0:1264; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1265; GFX8-NEXT:    v_max_f16_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11266; GFX8-NEXT:    v_max_f16_e32 v0, v0, v21267; GFX8-NEXT:    v_max_f16_e32 v1, v1, v31268; GFX8-NEXT:    v_or_b32_e32 v0, v0, v41269; GFX8-NEXT:    s_setpc_b64 s[30:31]1270;1271; GFX9-LABEL: v_maximum_v3f16__nnan:1272; GFX9:       ; %bb.0:1273; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1274; GFX9-NEXT:    v_pk_max_f16 v1, v1, v31275; GFX9-NEXT:    v_pk_max_f16 v0, v0, v21276; GFX9-NEXT:    s_setpc_b64 s[30:31]1277;1278; GFX10-LABEL: v_maximum_v3f16__nnan:1279; GFX10:       ; %bb.0:1280; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1281; GFX10-NEXT:    v_pk_max_f16 v0, v0, v21282; GFX10-NEXT:    v_pk_max_f16 v1, v1, v31283; GFX10-NEXT:    s_setpc_b64 s[30:31]1284;1285; GFX11-LABEL: v_maximum_v3f16__nnan:1286; GFX11:       ; %bb.0:1287; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1288; GFX11-NEXT:    v_pk_max_f16 v0, v0, v21289; GFX11-NEXT:    v_pk_max_f16 v1, v1, v31290; GFX11-NEXT:    s_setpc_b64 s[30:31]1291;1292; GFX12-LABEL: v_maximum_v3f16__nnan:1293; GFX12:       ; %bb.0:1294; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x01295; GFX12-NEXT:    s_wait_expcnt 0x01296; GFX12-NEXT:    s_wait_samplecnt 0x01297; GFX12-NEXT:    s_wait_bvhcnt 0x01298; GFX12-NEXT:    s_wait_kmcnt 0x01299; GFX12-NEXT:    v_pk_maximum_f16 v0, v0, v21300; GFX12-NEXT:    v_pk_maximum_f16 v1, v1, v31301; GFX12-NEXT:    s_setpc_b64 s[30:31]1302  %op = call nnan <3 x half> @llvm.maximum.v3f16(<3 x half> %src0, <3 x half> %src1)1303  ret <3 x half> %op1304}1305 1306define <3 x half> @v_maximum_v3f16__nsz(<3 x half> %src0, <3 x half> %src1) {1307; GFX7-LABEL: v_maximum_v3f16__nsz:1308; GFX7:       ; %bb.0:1309; GFX7-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1310; GFX7-NEXT:    v_cvt_f16_f32_e32 v3, v31311; GFX7-NEXT:    v_cvt_f16_f32_e32 v0, v01312; GFX7-NEXT:    v_cvt_f16_f32_e32 v4, v41313; GFX7-NEXT:    v_cvt_f16_f32_e32 v1, v11314; GFX7-NEXT:    v_cvt_f16_f32_e32 v5, v51315; GFX7-NEXT:    v_cvt_f16_f32_e32 v2, v21316; GFX7-NEXT:    v_cvt_f32_f16_e32 v3, v31317; GFX7-NEXT:    v_cvt_f32_f16_e32 v0, v01318; GFX7-NEXT:    v_cvt_f32_f16_e32 v4, v41319; GFX7-NEXT:    v_cvt_f32_f16_e32 v1, v11320; GFX7-NEXT:    v_cvt_f32_f16_e32 v5, v51321; GFX7-NEXT:    v_cvt_f32_f16_e32 v2, v21322; GFX7-NEXT:    v_max_f32_e32 v6, v0, v31323; GFX7-NEXT:    v_mov_b32_e32 v7, 0x7fc000001324; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v0, v31325; GFX7-NEXT:    v_cndmask_b32_e32 v0, v7, v6, vcc1326; GFX7-NEXT:    v_max_f32_e32 v3, v1, v41327; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v1, v41328; GFX7-NEXT:    v_cndmask_b32_e32 v1, v7, v3, vcc1329; GFX7-NEXT:    v_max_f32_e32 v3, v2, v51330; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v2, v51331; GFX7-NEXT:    v_cndmask_b32_e32 v2, v7, v3, vcc1332; GFX7-NEXT:    s_setpc_b64 s[30:31]1333;1334; GFX8-LABEL: v_maximum_v3f16__nsz:1335; GFX8:       ; %bb.0:1336; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1337; GFX8-NEXT:    v_lshrrev_b32_e32 v4, 16, v21338; GFX8-NEXT:    v_lshrrev_b32_e32 v5, 16, v01339; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v5, v41340; GFX8-NEXT:    v_max_f16_e32 v4, v5, v41341; GFX8-NEXT:    v_mov_b32_e32 v5, 0x7e001342; GFX8-NEXT:    v_cndmask_b32_sdwa v4, v5, v4, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD1343; GFX8-NEXT:    v_max_f16_e32 v6, v1, v31344; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v1, v31345; GFX8-NEXT:    v_cndmask_b32_e32 v1, v5, v6, vcc1346; GFX8-NEXT:    v_max_f16_e32 v3, v0, v21347; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v0, v21348; GFX8-NEXT:    v_cndmask_b32_e32 v0, v5, v3, vcc1349; GFX8-NEXT:    v_or_b32_sdwa v0, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1350; GFX8-NEXT:    s_setpc_b64 s[30:31]1351;1352; GFX900-LABEL: v_maximum_v3f16__nsz:1353; GFX900:       ; %bb.0:1354; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1355; GFX900-NEXT:    v_pk_max_f16 v4, v1, v31356; GFX900-NEXT:    v_mov_b32_e32 v5, 0x7e001357; GFX900-NEXT:    v_cmp_o_f16_e32 vcc, v1, v31358; GFX900-NEXT:    v_cndmask_b32_e32 v1, v5, v4, vcc1359; GFX900-NEXT:    v_pk_max_f16 v3, v0, v21360; GFX900-NEXT:    v_cmp_o_f16_e32 vcc, v0, v21361; GFX900-NEXT:    v_cndmask_b32_e32 v4, v5, v3, vcc1362; GFX900-NEXT:    v_cmp_o_f16_sdwa vcc, v0, v2 src0_sel:WORD_1 src1_sel:WORD_11363; GFX900-NEXT:    v_cndmask_b32_sdwa v0, v5, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11364; GFX900-NEXT:    s_mov_b32 s4, 0x50401001365; GFX900-NEXT:    v_perm_b32 v0, v0, v4, s41366; GFX900-NEXT:    s_setpc_b64 s[30:31]1367;1368; GFX950-LABEL: v_maximum_v3f16__nsz:1369; GFX950:       ; %bb.0:1370; GFX950-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1371; GFX950-NEXT:    v_pk_maximum3_f16 v1, v1, v3, v31372; GFX950-NEXT:    v_pk_maximum3_f16 v0, v0, v2, v21373; GFX950-NEXT:    s_setpc_b64 s[30:31]1374;1375; GFX10-LABEL: v_maximum_v3f16__nsz:1376; GFX10:       ; %bb.0:1377; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1378; GFX10-NEXT:    v_pk_max_f16 v4, v0, v21379; GFX10-NEXT:    v_cmp_o_f16_sdwa vcc_lo, v0, v2 src0_sel:WORD_1 src1_sel:WORD_11380; GFX10-NEXT:    v_mov_b32_e32 v5, 0x7e001381; GFX10-NEXT:    v_cmp_o_f16_e64 s4, v0, v21382; GFX10-NEXT:    v_cndmask_b32_sdwa v2, v5, v4, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11383; GFX10-NEXT:    v_cndmask_b32_e64 v0, 0x7e00, v4, s41384; GFX10-NEXT:    v_pk_max_f16 v4, v1, v31385; GFX10-NEXT:    v_cmp_o_f16_e32 vcc_lo, v1, v31386; GFX10-NEXT:    v_perm_b32 v0, v2, v0, 0x50401001387; GFX10-NEXT:    v_cndmask_b32_e32 v1, 0x7e00, v4, vcc_lo1388; GFX10-NEXT:    s_setpc_b64 s[30:31]1389;1390; GFX11-TRUE16-LABEL: v_maximum_v3f16__nsz:1391; GFX11-TRUE16:       ; %bb.0:1392; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1393; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v1.l, v3.l1394; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s0, v0.l, v2.l1395; GFX11-TRUE16-NEXT:    v_pk_max_f16 v4, v0, v21396; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s1, v0.h, v2.h1397; GFX11-TRUE16-NEXT:    v_pk_max_f16 v1, v1, v31398; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)1399; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0x7e00, v4.l, s01400; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0x7e00, v4.h, s11401; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3)1402; GFX11-TRUE16-NEXT:    v_cndmask_b16 v1.l, 0x7e00, v1.l, vcc_lo1403; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]1404;1405; GFX11-FAKE16-LABEL: v_maximum_v3f16__nsz:1406; GFX11-FAKE16:       ; %bb.0:1407; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1408; GFX11-FAKE16-NEXT:    v_pk_max_f16 v4, v0, v21409; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v5, 16, v21410; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v6, 16, v01411; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v0, v21412; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)1413; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v7, 16, v41414; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0x7e00, v4, vcc_lo1415; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v6, v51416; GFX11-FAKE16-NEXT:    v_pk_max_f16 v4, v1, v31417; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)1418; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v2, 0x7e00, v7, vcc_lo1419; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v1, v31420; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v2, v0, 0x50401001421; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_4)1422; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0x7e00, v4, vcc_lo1423; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]1424;1425; GFX12-LABEL: v_maximum_v3f16__nsz:1426; GFX12:       ; %bb.0:1427; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x01428; GFX12-NEXT:    s_wait_expcnt 0x01429; GFX12-NEXT:    s_wait_samplecnt 0x01430; GFX12-NEXT:    s_wait_bvhcnt 0x01431; GFX12-NEXT:    s_wait_kmcnt 0x01432; GFX12-NEXT:    v_pk_maximum_f16 v0, v0, v21433; GFX12-NEXT:    v_pk_maximum_f16 v1, v1, v31434; GFX12-NEXT:    s_setpc_b64 s[30:31]1435  %op = call nsz <3 x half> @llvm.maximum.v3f16(<3 x half> %src0, <3 x half> %src1)1436  ret <3 x half> %op1437}1438 1439define <3 x half> @v_maximum_v3f16__nnan_nsz(<3 x half> %src0, <3 x half> %src1) {1440; GFX7-LABEL: v_maximum_v3f16__nnan_nsz:1441; GFX7:       ; %bb.0:1442; GFX7-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1443; GFX7-NEXT:    v_cvt_f16_f32_e32 v5, v51444; GFX7-NEXT:    v_cvt_f16_f32_e32 v2, v21445; GFX7-NEXT:    v_cvt_f16_f32_e32 v4, v41446; GFX7-NEXT:    v_cvt_f16_f32_e32 v3, v31447; GFX7-NEXT:    v_cvt_f16_f32_e32 v0, v01448; GFX7-NEXT:    v_cvt_f16_f32_e32 v1, v11449; GFX7-NEXT:    v_cvt_f32_f16_e32 v5, v51450; GFX7-NEXT:    v_cvt_f32_f16_e32 v4, v41451; GFX7-NEXT:    v_cvt_f32_f16_e32 v3, v31452; GFX7-NEXT:    v_cvt_f32_f16_e32 v0, v01453; GFX7-NEXT:    v_cvt_f32_f16_e32 v1, v11454; GFX7-NEXT:    v_cvt_f32_f16_e32 v2, v21455; GFX7-NEXT:    v_max_f32_e32 v0, v0, v31456; GFX7-NEXT:    v_max_f32_e32 v1, v1, v41457; GFX7-NEXT:    v_max_f32_e32 v2, v2, v51458; GFX7-NEXT:    s_setpc_b64 s[30:31]1459;1460; GFX8-LABEL: v_maximum_v3f16__nnan_nsz:1461; GFX8:       ; %bb.0:1462; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1463; GFX8-NEXT:    v_max_f16_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11464; GFX8-NEXT:    v_max_f16_e32 v0, v0, v21465; GFX8-NEXT:    v_max_f16_e32 v1, v1, v31466; GFX8-NEXT:    v_or_b32_e32 v0, v0, v41467; GFX8-NEXT:    s_setpc_b64 s[30:31]1468;1469; GFX9-LABEL: v_maximum_v3f16__nnan_nsz:1470; GFX9:       ; %bb.0:1471; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1472; GFX9-NEXT:    v_pk_max_f16 v1, v1, v31473; GFX9-NEXT:    v_pk_max_f16 v0, v0, v21474; GFX9-NEXT:    s_setpc_b64 s[30:31]1475;1476; GFX10-LABEL: v_maximum_v3f16__nnan_nsz:1477; GFX10:       ; %bb.0:1478; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1479; GFX10-NEXT:    v_pk_max_f16 v0, v0, v21480; GFX10-NEXT:    v_pk_max_f16 v1, v1, v31481; GFX10-NEXT:    s_setpc_b64 s[30:31]1482;1483; GFX11-LABEL: v_maximum_v3f16__nnan_nsz:1484; GFX11:       ; %bb.0:1485; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1486; GFX11-NEXT:    v_pk_max_f16 v0, v0, v21487; GFX11-NEXT:    v_pk_max_f16 v1, v1, v31488; GFX11-NEXT:    s_setpc_b64 s[30:31]1489;1490; GFX12-LABEL: v_maximum_v3f16__nnan_nsz:1491; GFX12:       ; %bb.0:1492; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x01493; GFX12-NEXT:    s_wait_expcnt 0x01494; GFX12-NEXT:    s_wait_samplecnt 0x01495; GFX12-NEXT:    s_wait_bvhcnt 0x01496; GFX12-NEXT:    s_wait_kmcnt 0x01497; GFX12-NEXT:    v_pk_maximum_f16 v0, v0, v21498; GFX12-NEXT:    v_pk_maximum_f16 v1, v1, v31499; GFX12-NEXT:    s_setpc_b64 s[30:31]1500  %op = call nnan nsz <3 x half> @llvm.maximum.v3f16(<3 x half> %src0, <3 x half> %src1)1501  ret <3 x half> %op1502}1503 1504define <4 x half> @v_maximum_v4f16(<4 x half> %src0, <4 x half> %src1) {1505; GFX7-LABEL: v_maximum_v4f16:1506; GFX7:       ; %bb.0:1507; GFX7-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1508; GFX7-NEXT:    v_cvt_f16_f32_e32 v4, v41509; GFX7-NEXT:    v_cvt_f16_f32_e32 v0, v01510; GFX7-NEXT:    v_cvt_f16_f32_e32 v5, v51511; GFX7-NEXT:    v_cvt_f16_f32_e32 v1, v11512; GFX7-NEXT:    v_cvt_f16_f32_e32 v6, v61513; GFX7-NEXT:    v_cvt_f16_f32_e32 v2, v21514; GFX7-NEXT:    v_cvt_f16_f32_e32 v7, v71515; GFX7-NEXT:    v_cvt_f16_f32_e32 v3, v31516; GFX7-NEXT:    v_cvt_f32_f16_e32 v4, v41517; GFX7-NEXT:    v_cvt_f32_f16_e32 v0, v01518; GFX7-NEXT:    v_cvt_f32_f16_e32 v5, v51519; GFX7-NEXT:    v_cvt_f32_f16_e32 v1, v11520; GFX7-NEXT:    v_cvt_f32_f16_e32 v6, v61521; GFX7-NEXT:    v_cvt_f32_f16_e32 v2, v21522; GFX7-NEXT:    v_cvt_f32_f16_e32 v7, v71523; GFX7-NEXT:    v_cvt_f32_f16_e32 v3, v31524; GFX7-NEXT:    v_max_f32_e32 v8, v0, v41525; GFX7-NEXT:    v_mov_b32_e32 v9, 0x7fc000001526; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v0, v41527; GFX7-NEXT:    v_cndmask_b32_e32 v0, v9, v8, vcc1528; GFX7-NEXT:    v_max_f32_e32 v4, v1, v51529; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v1, v51530; GFX7-NEXT:    v_cndmask_b32_e32 v1, v9, v4, vcc1531; GFX7-NEXT:    v_max_f32_e32 v4, v2, v61532; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v2, v61533; GFX7-NEXT:    v_cndmask_b32_e32 v2, v9, v4, vcc1534; GFX7-NEXT:    v_max_f32_e32 v4, v3, v71535; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v3, v71536; GFX7-NEXT:    v_cndmask_b32_e32 v3, v9, v4, vcc1537; GFX7-NEXT:    s_setpc_b64 s[30:31]1538;1539; GFX8-LABEL: v_maximum_v4f16:1540; GFX8:       ; %bb.0:1541; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1542; GFX8-NEXT:    v_lshrrev_b32_e32 v4, 16, v31543; GFX8-NEXT:    v_lshrrev_b32_e32 v5, 16, v11544; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v5, v41545; GFX8-NEXT:    v_max_f16_e32 v4, v5, v41546; GFX8-NEXT:    v_mov_b32_e32 v5, 0x7e001547; GFX8-NEXT:    v_lshrrev_b32_e32 v6, 16, v21548; GFX8-NEXT:    v_lshrrev_b32_e32 v7, 16, v01549; GFX8-NEXT:    v_cndmask_b32_sdwa v4, v5, v4, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD1550; GFX8-NEXT:    v_max_f16_e32 v8, v7, v61551; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v7, v61552; GFX8-NEXT:    v_cndmask_b32_e32 v6, v5, v8, vcc1553; GFX8-NEXT:    v_max_f16_e32 v7, v1, v31554; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v1, v31555; GFX8-NEXT:    v_cndmask_b32_e32 v1, v5, v7, vcc1556; GFX8-NEXT:    v_max_f16_e32 v3, v0, v21557; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v0, v21558; GFX8-NEXT:    v_cndmask_b32_e32 v0, v5, v3, vcc1559; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 16, v61560; GFX8-NEXT:    v_or_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1561; GFX8-NEXT:    v_or_b32_sdwa v1, v1, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1562; GFX8-NEXT:    s_setpc_b64 s[30:31]1563;1564; GFX900-LABEL: v_maximum_v4f16:1565; GFX900:       ; %bb.0:1566; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1567; GFX900-NEXT:    v_pk_max_f16 v4, v1, v31568; GFX900-NEXT:    v_mov_b32_e32 v5, 0x7e001569; GFX900-NEXT:    v_cmp_o_f16_e32 vcc, v1, v31570; GFX900-NEXT:    v_cndmask_b32_e32 v6, v5, v4, vcc1571; GFX900-NEXT:    v_cmp_o_f16_sdwa vcc, v1, v3 src0_sel:WORD_1 src1_sel:WORD_11572; GFX900-NEXT:    v_cndmask_b32_sdwa v1, v5, v4, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11573; GFX900-NEXT:    v_pk_max_f16 v3, v0, v21574; GFX900-NEXT:    v_cmp_o_f16_e32 vcc, v0, v21575; GFX900-NEXT:    v_cndmask_b32_e32 v4, v5, v3, vcc1576; GFX900-NEXT:    v_cmp_o_f16_sdwa vcc, v0, v2 src0_sel:WORD_1 src1_sel:WORD_11577; GFX900-NEXT:    v_cndmask_b32_sdwa v0, v5, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11578; GFX900-NEXT:    s_mov_b32 s4, 0x50401001579; GFX900-NEXT:    v_perm_b32 v0, v0, v4, s41580; GFX900-NEXT:    v_perm_b32 v1, v1, v6, s41581; GFX900-NEXT:    s_setpc_b64 s[30:31]1582;1583; GFX950-LABEL: v_maximum_v4f16:1584; GFX950:       ; %bb.0:1585; GFX950-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1586; GFX950-NEXT:    v_pk_maximum3_f16 v0, v0, v2, v21587; GFX950-NEXT:    v_pk_maximum3_f16 v1, v1, v3, v31588; GFX950-NEXT:    s_setpc_b64 s[30:31]1589;1590; GFX10-LABEL: v_maximum_v4f16:1591; GFX10:       ; %bb.0:1592; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1593; GFX10-NEXT:    v_mov_b32_e32 v4, 0x7e001594; GFX10-NEXT:    v_cmp_o_f16_sdwa vcc_lo, v1, v3 src0_sel:WORD_1 src1_sel:WORD_11595; GFX10-NEXT:    v_pk_max_f16 v6, v1, v31596; GFX10-NEXT:    v_cmp_o_f16_sdwa s4, v0, v2 src0_sel:WORD_1 src1_sel:WORD_11597; GFX10-NEXT:    v_pk_max_f16 v5, v0, v21598; GFX10-NEXT:    v_cmp_o_f16_e64 s5, v0, v21599; GFX10-NEXT:    v_cndmask_b32_sdwa v2, v4, v6, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11600; GFX10-NEXT:    s_mov_b32 vcc_lo, s41601; GFX10-NEXT:    v_cndmask_b32_sdwa v4, v4, v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11602; GFX10-NEXT:    v_cmp_o_f16_e32 vcc_lo, v1, v31603; GFX10-NEXT:    v_cndmask_b32_e64 v0, 0x7e00, v5, s51604; GFX10-NEXT:    v_cndmask_b32_e32 v1, 0x7e00, v6, vcc_lo1605; GFX10-NEXT:    v_perm_b32 v0, v4, v0, 0x50401001606; GFX10-NEXT:    v_perm_b32 v1, v2, v1, 0x50401001607; GFX10-NEXT:    s_setpc_b64 s[30:31]1608;1609; GFX11-TRUE16-LABEL: v_maximum_v4f16:1610; GFX11-TRUE16:       ; %bb.0:1611; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1612; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v1.l, v3.l1613; GFX11-TRUE16-NEXT:    v_pk_max_f16 v4, v1, v31614; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s0, v0.l, v2.l1615; GFX11-TRUE16-NEXT:    v_pk_max_f16 v5, v0, v21616; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s1, v0.h, v2.h1617; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s2, v1.h, v3.h1618; GFX11-TRUE16-NEXT:    v_cndmask_b16 v1.l, 0x7e00, v4.l, vcc_lo1619; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1620; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0x7e00, v5.l, s01621; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0x7e00, v5.h, s11622; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_4)1623; GFX11-TRUE16-NEXT:    v_cndmask_b16 v1.h, 0x7e00, v4.h, s21624; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]1625;1626; GFX11-FAKE16-LABEL: v_maximum_v4f16:1627; GFX11-FAKE16:       ; %bb.0:1628; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1629; GFX11-FAKE16-NEXT:    v_pk_max_f16 v4, v1, v31630; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v1, v31631; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v5, 16, v31632; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v6, 16, v11633; GFX11-FAKE16-NEXT:    v_pk_max_f16 v7, v0, v21634; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v8, 16, v21635; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0x7e00, v4, vcc_lo1636; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v3, 16, v01637; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v0, v21638; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v9, 16, v71639; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v4, 16, v41640; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0x7e00, v7, vcc_lo1641; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v3, v81642; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)1643; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v2, 0x7e00, v9, vcc_lo1644; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v6, v51645; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v2, v0, 0x50401001646; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v3, 0x7e00, v4, vcc_lo1647; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)1648; GFX11-FAKE16-NEXT:    v_perm_b32 v1, v3, v1, 0x50401001649; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]1650;1651; GFX12-LABEL: v_maximum_v4f16:1652; GFX12:       ; %bb.0:1653; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x01654; GFX12-NEXT:    s_wait_expcnt 0x01655; GFX12-NEXT:    s_wait_samplecnt 0x01656; GFX12-NEXT:    s_wait_bvhcnt 0x01657; GFX12-NEXT:    s_wait_kmcnt 0x01658; GFX12-NEXT:    v_pk_maximum_f16 v0, v0, v21659; GFX12-NEXT:    v_pk_maximum_f16 v1, v1, v31660; GFX12-NEXT:    s_setpc_b64 s[30:31]1661  %op = call <4 x half> @llvm.maximum.v4f16(<4 x half> %src0, <4 x half> %src1)1662  ret <4 x half> %op1663}1664 1665define <4 x half> @v_maximum_v4f16__nnan(<4 x half> %src0, <4 x half> %src1) {1666; GFX7-LABEL: v_maximum_v4f16__nnan:1667; GFX7:       ; %bb.0:1668; GFX7-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1669; GFX7-NEXT:    v_cvt_f16_f32_e32 v7, v71670; GFX7-NEXT:    v_cvt_f16_f32_e32 v6, v61671; GFX7-NEXT:    v_cvt_f16_f32_e32 v3, v31672; GFX7-NEXT:    v_cvt_f16_f32_e32 v2, v21673; GFX7-NEXT:    v_cvt_f16_f32_e32 v5, v51674; GFX7-NEXT:    v_cvt_f16_f32_e32 v4, v41675; GFX7-NEXT:    v_cvt_f16_f32_e32 v0, v01676; GFX7-NEXT:    v_cvt_f16_f32_e32 v1, v11677; GFX7-NEXT:    v_cvt_f32_f16_e32 v7, v71678; GFX7-NEXT:    v_cvt_f32_f16_e32 v6, v61679; GFX7-NEXT:    v_cvt_f32_f16_e32 v5, v51680; GFX7-NEXT:    v_cvt_f32_f16_e32 v4, v41681; GFX7-NEXT:    v_cvt_f32_f16_e32 v0, v01682; GFX7-NEXT:    v_cvt_f32_f16_e32 v1, v11683; GFX7-NEXT:    v_cvt_f32_f16_e32 v2, v21684; GFX7-NEXT:    v_cvt_f32_f16_e32 v3, v31685; GFX7-NEXT:    v_max_f32_e32 v0, v0, v41686; GFX7-NEXT:    v_max_f32_e32 v1, v1, v51687; GFX7-NEXT:    v_max_f32_e32 v2, v2, v61688; GFX7-NEXT:    v_max_f32_e32 v3, v3, v71689; GFX7-NEXT:    s_setpc_b64 s[30:31]1690;1691; GFX8-LABEL: v_maximum_v4f16__nnan:1692; GFX8:       ; %bb.0:1693; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1694; GFX8-NEXT:    v_max_f16_sdwa v4, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11695; GFX8-NEXT:    v_max_f16_sdwa v5, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11696; GFX8-NEXT:    v_max_f16_e32 v1, v1, v31697; GFX8-NEXT:    v_max_f16_e32 v0, v0, v21698; GFX8-NEXT:    v_or_b32_e32 v0, v0, v51699; GFX8-NEXT:    v_or_b32_e32 v1, v1, v41700; GFX8-NEXT:    s_setpc_b64 s[30:31]1701;1702; GFX9-LABEL: v_maximum_v4f16__nnan:1703; GFX9:       ; %bb.0:1704; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1705; GFX9-NEXT:    v_pk_max_f16 v0, v0, v21706; GFX9-NEXT:    v_pk_max_f16 v1, v1, v31707; GFX9-NEXT:    s_setpc_b64 s[30:31]1708;1709; GFX10-LABEL: v_maximum_v4f16__nnan:1710; GFX10:       ; %bb.0:1711; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1712; GFX10-NEXT:    v_pk_max_f16 v0, v0, v21713; GFX10-NEXT:    v_pk_max_f16 v1, v1, v31714; GFX10-NEXT:    s_setpc_b64 s[30:31]1715;1716; GFX11-LABEL: v_maximum_v4f16__nnan:1717; GFX11:       ; %bb.0:1718; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1719; GFX11-NEXT:    v_pk_max_f16 v0, v0, v21720; GFX11-NEXT:    v_pk_max_f16 v1, v1, v31721; GFX11-NEXT:    s_setpc_b64 s[30:31]1722;1723; GFX12-LABEL: v_maximum_v4f16__nnan:1724; GFX12:       ; %bb.0:1725; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x01726; GFX12-NEXT:    s_wait_expcnt 0x01727; GFX12-NEXT:    s_wait_samplecnt 0x01728; GFX12-NEXT:    s_wait_bvhcnt 0x01729; GFX12-NEXT:    s_wait_kmcnt 0x01730; GFX12-NEXT:    v_pk_maximum_f16 v0, v0, v21731; GFX12-NEXT:    v_pk_maximum_f16 v1, v1, v31732; GFX12-NEXT:    s_setpc_b64 s[30:31]1733  %op = call nnan <4 x half> @llvm.maximum.v4f16(<4 x half> %src0, <4 x half> %src1)1734  ret <4 x half> %op1735}1736 1737define <4 x half> @v_maximum_v4f16__nsz(<4 x half> %src0, <4 x half> %src1) {1738; GFX7-LABEL: v_maximum_v4f16__nsz:1739; GFX7:       ; %bb.0:1740; GFX7-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1741; GFX7-NEXT:    v_cvt_f16_f32_e32 v4, v41742; GFX7-NEXT:    v_cvt_f16_f32_e32 v0, v01743; GFX7-NEXT:    v_cvt_f16_f32_e32 v5, v51744; GFX7-NEXT:    v_cvt_f16_f32_e32 v1, v11745; GFX7-NEXT:    v_cvt_f16_f32_e32 v6, v61746; GFX7-NEXT:    v_cvt_f16_f32_e32 v2, v21747; GFX7-NEXT:    v_cvt_f16_f32_e32 v7, v71748; GFX7-NEXT:    v_cvt_f16_f32_e32 v3, v31749; GFX7-NEXT:    v_cvt_f32_f16_e32 v4, v41750; GFX7-NEXT:    v_cvt_f32_f16_e32 v0, v01751; GFX7-NEXT:    v_cvt_f32_f16_e32 v5, v51752; GFX7-NEXT:    v_cvt_f32_f16_e32 v1, v11753; GFX7-NEXT:    v_cvt_f32_f16_e32 v6, v61754; GFX7-NEXT:    v_cvt_f32_f16_e32 v2, v21755; GFX7-NEXT:    v_cvt_f32_f16_e32 v7, v71756; GFX7-NEXT:    v_cvt_f32_f16_e32 v3, v31757; GFX7-NEXT:    v_max_f32_e32 v8, v0, v41758; GFX7-NEXT:    v_mov_b32_e32 v9, 0x7fc000001759; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v0, v41760; GFX7-NEXT:    v_cndmask_b32_e32 v0, v9, v8, vcc1761; GFX7-NEXT:    v_max_f32_e32 v4, v1, v51762; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v1, v51763; GFX7-NEXT:    v_cndmask_b32_e32 v1, v9, v4, vcc1764; GFX7-NEXT:    v_max_f32_e32 v4, v2, v61765; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v2, v61766; GFX7-NEXT:    v_cndmask_b32_e32 v2, v9, v4, vcc1767; GFX7-NEXT:    v_max_f32_e32 v4, v3, v71768; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v3, v71769; GFX7-NEXT:    v_cndmask_b32_e32 v3, v9, v4, vcc1770; GFX7-NEXT:    s_setpc_b64 s[30:31]1771;1772; GFX8-LABEL: v_maximum_v4f16__nsz:1773; GFX8:       ; %bb.0:1774; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1775; GFX8-NEXT:    v_lshrrev_b32_e32 v4, 16, v31776; GFX8-NEXT:    v_lshrrev_b32_e32 v5, 16, v11777; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v5, v41778; GFX8-NEXT:    v_max_f16_e32 v4, v5, v41779; GFX8-NEXT:    v_mov_b32_e32 v5, 0x7e001780; GFX8-NEXT:    v_lshrrev_b32_e32 v6, 16, v21781; GFX8-NEXT:    v_lshrrev_b32_e32 v7, 16, v01782; GFX8-NEXT:    v_cndmask_b32_sdwa v4, v5, v4, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD1783; GFX8-NEXT:    v_max_f16_e32 v8, v7, v61784; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v7, v61785; GFX8-NEXT:    v_cndmask_b32_e32 v6, v5, v8, vcc1786; GFX8-NEXT:    v_max_f16_e32 v7, v1, v31787; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v1, v31788; GFX8-NEXT:    v_cndmask_b32_e32 v1, v5, v7, vcc1789; GFX8-NEXT:    v_max_f16_e32 v3, v0, v21790; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v0, v21791; GFX8-NEXT:    v_cndmask_b32_e32 v0, v5, v3, vcc1792; GFX8-NEXT:    v_lshlrev_b32_e32 v2, 16, v61793; GFX8-NEXT:    v_or_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1794; GFX8-NEXT:    v_or_b32_sdwa v1, v1, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1795; GFX8-NEXT:    s_setpc_b64 s[30:31]1796;1797; GFX900-LABEL: v_maximum_v4f16__nsz:1798; GFX900:       ; %bb.0:1799; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1800; GFX900-NEXT:    v_pk_max_f16 v4, v1, v31801; GFX900-NEXT:    v_mov_b32_e32 v5, 0x7e001802; GFX900-NEXT:    v_cmp_o_f16_e32 vcc, v1, v31803; GFX900-NEXT:    v_cndmask_b32_e32 v6, v5, v4, vcc1804; GFX900-NEXT:    v_cmp_o_f16_sdwa vcc, v1, v3 src0_sel:WORD_1 src1_sel:WORD_11805; GFX900-NEXT:    v_cndmask_b32_sdwa v1, v5, v4, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11806; GFX900-NEXT:    v_pk_max_f16 v3, v0, v21807; GFX900-NEXT:    v_cmp_o_f16_e32 vcc, v0, v21808; GFX900-NEXT:    v_cndmask_b32_e32 v4, v5, v3, vcc1809; GFX900-NEXT:    v_cmp_o_f16_sdwa vcc, v0, v2 src0_sel:WORD_1 src1_sel:WORD_11810; GFX900-NEXT:    v_cndmask_b32_sdwa v0, v5, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11811; GFX900-NEXT:    s_mov_b32 s4, 0x50401001812; GFX900-NEXT:    v_perm_b32 v0, v0, v4, s41813; GFX900-NEXT:    v_perm_b32 v1, v1, v6, s41814; GFX900-NEXT:    s_setpc_b64 s[30:31]1815;1816; GFX950-LABEL: v_maximum_v4f16__nsz:1817; GFX950:       ; %bb.0:1818; GFX950-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1819; GFX950-NEXT:    v_pk_maximum3_f16 v0, v0, v2, v21820; GFX950-NEXT:    v_pk_maximum3_f16 v1, v1, v3, v31821; GFX950-NEXT:    s_setpc_b64 s[30:31]1822;1823; GFX10-LABEL: v_maximum_v4f16__nsz:1824; GFX10:       ; %bb.0:1825; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1826; GFX10-NEXT:    v_mov_b32_e32 v4, 0x7e001827; GFX10-NEXT:    v_cmp_o_f16_sdwa vcc_lo, v1, v3 src0_sel:WORD_1 src1_sel:WORD_11828; GFX10-NEXT:    v_pk_max_f16 v6, v1, v31829; GFX10-NEXT:    v_cmp_o_f16_sdwa s4, v0, v2 src0_sel:WORD_1 src1_sel:WORD_11830; GFX10-NEXT:    v_pk_max_f16 v5, v0, v21831; GFX10-NEXT:    v_cmp_o_f16_e64 s5, v0, v21832; GFX10-NEXT:    v_cndmask_b32_sdwa v2, v4, v6, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11833; GFX10-NEXT:    s_mov_b32 vcc_lo, s41834; GFX10-NEXT:    v_cndmask_b32_sdwa v4, v4, v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11835; GFX10-NEXT:    v_cmp_o_f16_e32 vcc_lo, v1, v31836; GFX10-NEXT:    v_cndmask_b32_e64 v0, 0x7e00, v5, s51837; GFX10-NEXT:    v_cndmask_b32_e32 v1, 0x7e00, v6, vcc_lo1838; GFX10-NEXT:    v_perm_b32 v0, v4, v0, 0x50401001839; GFX10-NEXT:    v_perm_b32 v1, v2, v1, 0x50401001840; GFX10-NEXT:    s_setpc_b64 s[30:31]1841;1842; GFX11-TRUE16-LABEL: v_maximum_v4f16__nsz:1843; GFX11-TRUE16:       ; %bb.0:1844; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1845; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v1.l, v3.l1846; GFX11-TRUE16-NEXT:    v_pk_max_f16 v4, v1, v31847; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s0, v0.l, v2.l1848; GFX11-TRUE16-NEXT:    v_pk_max_f16 v5, v0, v21849; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s1, v0.h, v2.h1850; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s2, v1.h, v3.h1851; GFX11-TRUE16-NEXT:    v_cndmask_b16 v1.l, 0x7e00, v4.l, vcc_lo1852; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1853; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0x7e00, v5.l, s01854; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0x7e00, v5.h, s11855; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_4)1856; GFX11-TRUE16-NEXT:    v_cndmask_b16 v1.h, 0x7e00, v4.h, s21857; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]1858;1859; GFX11-FAKE16-LABEL: v_maximum_v4f16__nsz:1860; GFX11-FAKE16:       ; %bb.0:1861; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1862; GFX11-FAKE16-NEXT:    v_pk_max_f16 v4, v1, v31863; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v1, v31864; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v5, 16, v31865; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v6, 16, v11866; GFX11-FAKE16-NEXT:    v_pk_max_f16 v7, v0, v21867; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v8, 16, v21868; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0x7e00, v4, vcc_lo1869; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v3, 16, v01870; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v0, v21871; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v9, 16, v71872; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v4, 16, v41873; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0x7e00, v7, vcc_lo1874; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v3, v81875; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)1876; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v2, 0x7e00, v9, vcc_lo1877; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v6, v51878; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v2, v0, 0x50401001879; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v3, 0x7e00, v4, vcc_lo1880; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)1881; GFX11-FAKE16-NEXT:    v_perm_b32 v1, v3, v1, 0x50401001882; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]1883;1884; GFX12-LABEL: v_maximum_v4f16__nsz:1885; GFX12:       ; %bb.0:1886; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x01887; GFX12-NEXT:    s_wait_expcnt 0x01888; GFX12-NEXT:    s_wait_samplecnt 0x01889; GFX12-NEXT:    s_wait_bvhcnt 0x01890; GFX12-NEXT:    s_wait_kmcnt 0x01891; GFX12-NEXT:    v_pk_maximum_f16 v0, v0, v21892; GFX12-NEXT:    v_pk_maximum_f16 v1, v1, v31893; GFX12-NEXT:    s_setpc_b64 s[30:31]1894  %op = call nsz <4 x half> @llvm.maximum.v4f16(<4 x half> %src0, <4 x half> %src1)1895  ret <4 x half> %op1896}1897 1898define <4 x half> @v_maximum_v4f16__nnan_nsz(<4 x half> %src0, <4 x half> %src1) {1899; GFX7-LABEL: v_maximum_v4f16__nnan_nsz:1900; GFX7:       ; %bb.0:1901; GFX7-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1902; GFX7-NEXT:    v_cvt_f16_f32_e32 v7, v71903; GFX7-NEXT:    v_cvt_f16_f32_e32 v6, v61904; GFX7-NEXT:    v_cvt_f16_f32_e32 v3, v31905; GFX7-NEXT:    v_cvt_f16_f32_e32 v2, v21906; GFX7-NEXT:    v_cvt_f16_f32_e32 v5, v51907; GFX7-NEXT:    v_cvt_f16_f32_e32 v4, v41908; GFX7-NEXT:    v_cvt_f16_f32_e32 v0, v01909; GFX7-NEXT:    v_cvt_f16_f32_e32 v1, v11910; GFX7-NEXT:    v_cvt_f32_f16_e32 v7, v71911; GFX7-NEXT:    v_cvt_f32_f16_e32 v6, v61912; GFX7-NEXT:    v_cvt_f32_f16_e32 v5, v51913; GFX7-NEXT:    v_cvt_f32_f16_e32 v4, v41914; GFX7-NEXT:    v_cvt_f32_f16_e32 v0, v01915; GFX7-NEXT:    v_cvt_f32_f16_e32 v1, v11916; GFX7-NEXT:    v_cvt_f32_f16_e32 v2, v21917; GFX7-NEXT:    v_cvt_f32_f16_e32 v3, v31918; GFX7-NEXT:    v_max_f32_e32 v0, v0, v41919; GFX7-NEXT:    v_max_f32_e32 v1, v1, v51920; GFX7-NEXT:    v_max_f32_e32 v2, v2, v61921; GFX7-NEXT:    v_max_f32_e32 v3, v3, v71922; GFX7-NEXT:    s_setpc_b64 s[30:31]1923;1924; GFX8-LABEL: v_maximum_v4f16__nnan_nsz:1925; GFX8:       ; %bb.0:1926; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1927; GFX8-NEXT:    v_max_f16_sdwa v4, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11928; GFX8-NEXT:    v_max_f16_sdwa v5, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11929; GFX8-NEXT:    v_max_f16_e32 v1, v1, v31930; GFX8-NEXT:    v_max_f16_e32 v0, v0, v21931; GFX8-NEXT:    v_or_b32_e32 v0, v0, v51932; GFX8-NEXT:    v_or_b32_e32 v1, v1, v41933; GFX8-NEXT:    s_setpc_b64 s[30:31]1934;1935; GFX9-LABEL: v_maximum_v4f16__nnan_nsz:1936; GFX9:       ; %bb.0:1937; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1938; GFX9-NEXT:    v_pk_max_f16 v0, v0, v21939; GFX9-NEXT:    v_pk_max_f16 v1, v1, v31940; GFX9-NEXT:    s_setpc_b64 s[30:31]1941;1942; GFX10-LABEL: v_maximum_v4f16__nnan_nsz:1943; GFX10:       ; %bb.0:1944; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1945; GFX10-NEXT:    v_pk_max_f16 v0, v0, v21946; GFX10-NEXT:    v_pk_max_f16 v1, v1, v31947; GFX10-NEXT:    s_setpc_b64 s[30:31]1948;1949; GFX11-LABEL: v_maximum_v4f16__nnan_nsz:1950; GFX11:       ; %bb.0:1951; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1952; GFX11-NEXT:    v_pk_max_f16 v0, v0, v21953; GFX11-NEXT:    v_pk_max_f16 v1, v1, v31954; GFX11-NEXT:    s_setpc_b64 s[30:31]1955;1956; GFX12-LABEL: v_maximum_v4f16__nnan_nsz:1957; GFX12:       ; %bb.0:1958; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x01959; GFX12-NEXT:    s_wait_expcnt 0x01960; GFX12-NEXT:    s_wait_samplecnt 0x01961; GFX12-NEXT:    s_wait_bvhcnt 0x01962; GFX12-NEXT:    s_wait_kmcnt 0x01963; GFX12-NEXT:    v_pk_maximum_f16 v0, v0, v21964; GFX12-NEXT:    v_pk_maximum_f16 v1, v1, v31965; GFX12-NEXT:    s_setpc_b64 s[30:31]1966  %op = call nnan nsz <4 x half> @llvm.maximum.v4f16(<4 x half> %src0, <4 x half> %src1)1967  ret <4 x half> %op1968}1969 1970define <8 x half> @v_maximum_v8f16(<8 x half> %src0, <8 x half> %src1) {1971; GFX7-LABEL: v_maximum_v8f16:1972; GFX7:       ; %bb.0:1973; GFX7-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1974; GFX7-NEXT:    v_cvt_f16_f32_e32 v8, v81975; GFX7-NEXT:    v_cvt_f16_f32_e32 v0, v01976; GFX7-NEXT:    v_cvt_f16_f32_e32 v9, v91977; GFX7-NEXT:    v_cvt_f16_f32_e32 v1, v11978; GFX7-NEXT:    v_cvt_f16_f32_e32 v10, v101979; GFX7-NEXT:    v_cvt_f16_f32_e32 v2, v21980; GFX7-NEXT:    v_cvt_f16_f32_e32 v11, v111981; GFX7-NEXT:    v_cvt_f16_f32_e32 v3, v31982; GFX7-NEXT:    v_cvt_f16_f32_e32 v12, v121983; GFX7-NEXT:    v_cvt_f16_f32_e32 v4, v41984; GFX7-NEXT:    v_cvt_f32_f16_e32 v8, v81985; GFX7-NEXT:    v_cvt_f32_f16_e32 v0, v01986; GFX7-NEXT:    v_cvt_f16_f32_e32 v13, v131987; GFX7-NEXT:    v_cvt_f16_f32_e32 v5, v51988; GFX7-NEXT:    v_cvt_f32_f16_e32 v9, v91989; GFX7-NEXT:    v_cvt_f32_f16_e32 v1, v11990; GFX7-NEXT:    v_cvt_f16_f32_e32 v14, v141991; GFX7-NEXT:    v_cvt_f16_f32_e32 v6, v61992; GFX7-NEXT:    v_cvt_f32_f16_e32 v10, v101993; GFX7-NEXT:    v_cvt_f32_f16_e32 v2, v21994; GFX7-NEXT:    v_cvt_f16_f32_e32 v15, v151995; GFX7-NEXT:    v_cvt_f16_f32_e32 v7, v71996; GFX7-NEXT:    v_cvt_f32_f16_e32 v11, v111997; GFX7-NEXT:    v_cvt_f32_f16_e32 v3, v31998; GFX7-NEXT:    v_cvt_f32_f16_e32 v12, v121999; GFX7-NEXT:    v_cvt_f32_f16_e32 v4, v42000; GFX7-NEXT:    v_max_f32_e32 v16, v0, v82001; GFX7-NEXT:    v_mov_b32_e32 v17, 0x7fc000002002; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v0, v82003; GFX7-NEXT:    v_cvt_f32_f16_e32 v13, v132004; GFX7-NEXT:    v_cvt_f32_f16_e32 v5, v52005; GFX7-NEXT:    v_cndmask_b32_e32 v0, v17, v16, vcc2006; GFX7-NEXT:    v_max_f32_e32 v8, v1, v92007; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v1, v92008; GFX7-NEXT:    v_cvt_f32_f16_e32 v14, v142009; GFX7-NEXT:    v_cvt_f32_f16_e32 v6, v62010; GFX7-NEXT:    v_cndmask_b32_e32 v1, v17, v8, vcc2011; GFX7-NEXT:    v_max_f32_e32 v8, v2, v102012; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v2, v102013; GFX7-NEXT:    v_cvt_f32_f16_e32 v15, v152014; GFX7-NEXT:    v_cvt_f32_f16_e32 v7, v72015; GFX7-NEXT:    v_cndmask_b32_e32 v2, v17, v8, vcc2016; GFX7-NEXT:    v_max_f32_e32 v8, v3, v112017; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v3, v112018; GFX7-NEXT:    v_cndmask_b32_e32 v3, v17, v8, vcc2019; GFX7-NEXT:    v_max_f32_e32 v8, v4, v122020; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v4, v122021; GFX7-NEXT:    v_cndmask_b32_e32 v4, v17, v8, vcc2022; GFX7-NEXT:    v_max_f32_e32 v8, v5, v132023; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v5, v132024; GFX7-NEXT:    v_cndmask_b32_e32 v5, v17, v8, vcc2025; GFX7-NEXT:    v_max_f32_e32 v8, v6, v142026; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v6, v142027; GFX7-NEXT:    v_cndmask_b32_e32 v6, v17, v8, vcc2028; GFX7-NEXT:    v_max_f32_e32 v8, v7, v152029; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v7, v152030; GFX7-NEXT:    v_cndmask_b32_e32 v7, v17, v8, vcc2031; GFX7-NEXT:    s_setpc_b64 s[30:31]2032;2033; GFX8-LABEL: v_maximum_v8f16:2034; GFX8:       ; %bb.0:2035; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2036; GFX8-NEXT:    v_lshrrev_b32_e32 v8, 16, v72037; GFX8-NEXT:    v_lshrrev_b32_e32 v9, 16, v32038; GFX8-NEXT:    v_max_f16_e32 v10, v9, v82039; GFX8-NEXT:    v_mov_b32_e32 v11, 0x7e002040; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v9, v82041; GFX8-NEXT:    v_cndmask_b32_e32 v8, v11, v10, vcc2042; GFX8-NEXT:    v_lshrrev_b32_e32 v9, 16, v62043; GFX8-NEXT:    v_lshrrev_b32_e32 v10, 16, v22044; GFX8-NEXT:    v_max_f16_e32 v12, v10, v92045; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v10, v92046; GFX8-NEXT:    v_cndmask_b32_e32 v9, v11, v12, vcc2047; GFX8-NEXT:    v_lshrrev_b32_e32 v10, 16, v52048; GFX8-NEXT:    v_lshrrev_b32_e32 v12, 16, v12049; GFX8-NEXT:    v_max_f16_e32 v13, v12, v102050; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v12, v102051; GFX8-NEXT:    v_cndmask_b32_e32 v10, v11, v13, vcc2052; GFX8-NEXT:    v_lshrrev_b32_e32 v12, 16, v42053; GFX8-NEXT:    v_lshrrev_b32_e32 v13, 16, v02054; GFX8-NEXT:    v_max_f16_e32 v14, v13, v122055; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v13, v122056; GFX8-NEXT:    v_cndmask_b32_e32 v12, v11, v14, vcc2057; GFX8-NEXT:    v_max_f16_e32 v13, v3, v72058; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v3, v72059; GFX8-NEXT:    v_cndmask_b32_e32 v3, v11, v13, vcc2060; GFX8-NEXT:    v_max_f16_e32 v7, v2, v62061; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v2, v62062; GFX8-NEXT:    v_cndmask_b32_e32 v2, v11, v7, vcc2063; GFX8-NEXT:    v_max_f16_e32 v6, v1, v52064; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v1, v52065; GFX8-NEXT:    v_cndmask_b32_e32 v1, v11, v6, vcc2066; GFX8-NEXT:    v_max_f16_e32 v5, v0, v42067; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v0, v42068; GFX8-NEXT:    v_cndmask_b32_e32 v0, v11, v5, vcc2069; GFX8-NEXT:    v_lshlrev_b32_e32 v4, 16, v122070; GFX8-NEXT:    v_or_b32_sdwa v0, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD2071; GFX8-NEXT:    v_lshlrev_b32_e32 v4, 16, v102072; GFX8-NEXT:    v_or_b32_sdwa v1, v1, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD2073; GFX8-NEXT:    v_lshlrev_b32_e32 v4, 16, v92074; GFX8-NEXT:    v_or_b32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD2075; GFX8-NEXT:    v_lshlrev_b32_e32 v4, 16, v82076; GFX8-NEXT:    v_or_b32_sdwa v3, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD2077; GFX8-NEXT:    s_setpc_b64 s[30:31]2078;2079; GFX900-LABEL: v_maximum_v8f16:2080; GFX900:       ; %bb.0:2081; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2082; GFX900-NEXT:    v_pk_max_f16 v8, v3, v72083; GFX900-NEXT:    v_mov_b32_e32 v9, 0x7e002084; GFX900-NEXT:    v_cmp_o_f16_e32 vcc, v3, v72085; GFX900-NEXT:    v_cndmask_b32_e32 v10, v9, v8, vcc2086; GFX900-NEXT:    v_lshrrev_b32_e32 v8, 16, v82087; GFX900-NEXT:    v_cmp_o_f16_sdwa vcc, v3, v7 src0_sel:WORD_1 src1_sel:WORD_12088; GFX900-NEXT:    v_cndmask_b32_e32 v3, v9, v8, vcc2089; GFX900-NEXT:    v_pk_max_f16 v7, v2, v62090; GFX900-NEXT:    v_cmp_o_f16_e32 vcc, v2, v62091; GFX900-NEXT:    v_cndmask_b32_e32 v8, v9, v7, vcc2092; GFX900-NEXT:    v_lshrrev_b32_e32 v7, 16, v72093; GFX900-NEXT:    v_cmp_o_f16_sdwa vcc, v2, v6 src0_sel:WORD_1 src1_sel:WORD_12094; GFX900-NEXT:    v_cndmask_b32_e32 v2, v9, v7, vcc2095; GFX900-NEXT:    v_pk_max_f16 v6, v1, v52096; GFX900-NEXT:    v_cmp_o_f16_e32 vcc, v1, v52097; GFX900-NEXT:    v_cndmask_b32_e32 v7, v9, v6, vcc2098; GFX900-NEXT:    v_lshrrev_b32_e32 v6, 16, v62099; GFX900-NEXT:    v_cmp_o_f16_sdwa vcc, v1, v5 src0_sel:WORD_1 src1_sel:WORD_12100; GFX900-NEXT:    v_cndmask_b32_e32 v1, v9, v6, vcc2101; GFX900-NEXT:    v_pk_max_f16 v5, v0, v42102; GFX900-NEXT:    v_cmp_o_f16_e32 vcc, v0, v42103; GFX900-NEXT:    v_cndmask_b32_e32 v6, v9, v5, vcc2104; GFX900-NEXT:    v_lshrrev_b32_e32 v5, 16, v52105; GFX900-NEXT:    v_cmp_o_f16_sdwa vcc, v0, v4 src0_sel:WORD_1 src1_sel:WORD_12106; GFX900-NEXT:    v_cndmask_b32_e32 v0, v9, v5, vcc2107; GFX900-NEXT:    s_mov_b32 s4, 0x50401002108; GFX900-NEXT:    v_perm_b32 v0, v0, v6, s42109; GFX900-NEXT:    v_perm_b32 v1, v1, v7, s42110; GFX900-NEXT:    v_perm_b32 v2, v2, v8, s42111; GFX900-NEXT:    v_perm_b32 v3, v3, v10, s42112; GFX900-NEXT:    s_setpc_b64 s[30:31]2113;2114; GFX950-LABEL: v_maximum_v8f16:2115; GFX950:       ; %bb.0:2116; GFX950-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2117; GFX950-NEXT:    v_pk_maximum3_f16 v0, v0, v4, v42118; GFX950-NEXT:    v_pk_maximum3_f16 v1, v1, v5, v52119; GFX950-NEXT:    v_pk_maximum3_f16 v2, v2, v6, v62120; GFX950-NEXT:    v_pk_maximum3_f16 v3, v3, v7, v72121; GFX950-NEXT:    s_setpc_b64 s[30:31]2122;2123; GFX10-LABEL: v_maximum_v8f16:2124; GFX10:       ; %bb.0:2125; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2126; GFX10-NEXT:    v_cmp_o_f16_sdwa vcc_lo, v3, v7 src0_sel:WORD_1 src1_sel:WORD_12127; GFX10-NEXT:    v_pk_max_f16 v8, v3, v72128; GFX10-NEXT:    v_mov_b32_e32 v9, 0x7e002129; GFX10-NEXT:    v_pk_max_f16 v10, v2, v62130; GFX10-NEXT:    v_cmp_o_f16_sdwa s4, v2, v6 src0_sel:WORD_1 src1_sel:WORD_12131; GFX10-NEXT:    v_cmp_o_f16_sdwa s5, v1, v5 src0_sel:WORD_1 src1_sel:WORD_12132; GFX10-NEXT:    v_pk_max_f16 v12, v0, v42133; GFX10-NEXT:    v_cndmask_b32_sdwa v11, v9, v8, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12134; GFX10-NEXT:    v_cmp_o_f16_e32 vcc_lo, v2, v62135; GFX10-NEXT:    v_cndmask_b32_e32 v2, 0x7e00, v10, vcc_lo2136; GFX10-NEXT:    s_mov_b32 vcc_lo, s42137; GFX10-NEXT:    v_cmp_o_f16_sdwa s4, v0, v4 src0_sel:WORD_1 src1_sel:WORD_12138; GFX10-NEXT:    v_cndmask_b32_sdwa v6, v9, v10, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12139; GFX10-NEXT:    v_pk_max_f16 v10, v1, v52140; GFX10-NEXT:    s_mov_b32 vcc_lo, s52141; GFX10-NEXT:    v_perm_b32 v2, v6, v2, 0x50401002142; GFX10-NEXT:    v_cndmask_b32_sdwa v13, v9, v10, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12143; GFX10-NEXT:    v_cmp_o_f16_e32 vcc_lo, v0, v42144; GFX10-NEXT:    v_cndmask_b32_e32 v0, 0x7e00, v12, vcc_lo2145; GFX10-NEXT:    s_mov_b32 vcc_lo, s42146; GFX10-NEXT:    v_cndmask_b32_sdwa v4, v9, v12, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12147; GFX10-NEXT:    v_cmp_o_f16_e32 vcc_lo, v1, v52148; GFX10-NEXT:    v_perm_b32 v0, v4, v0, 0x50401002149; GFX10-NEXT:    v_cndmask_b32_e32 v1, 0x7e00, v10, vcc_lo2150; GFX10-NEXT:    v_cmp_o_f16_e32 vcc_lo, v3, v72151; GFX10-NEXT:    v_perm_b32 v1, v13, v1, 0x50401002152; GFX10-NEXT:    v_cndmask_b32_e32 v3, 0x7e00, v8, vcc_lo2153; GFX10-NEXT:    v_perm_b32 v3, v11, v3, 0x50401002154; GFX10-NEXT:    s_setpc_b64 s[30:31]2155;2156; GFX11-TRUE16-LABEL: v_maximum_v8f16:2157; GFX11-TRUE16:       ; %bb.0:2158; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2159; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v3.l, v7.l2160; GFX11-TRUE16-NEXT:    v_pk_max_f16 v8, v3, v72161; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s0, v2.l, v6.l2162; GFX11-TRUE16-NEXT:    v_pk_max_f16 v9, v2, v62163; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s1, v0.l, v4.l2164; GFX11-TRUE16-NEXT:    v_pk_max_f16 v10, v0, v42165; GFX11-TRUE16-NEXT:    v_cndmask_b16 v3.l, 0x7e00, v8.l, vcc_lo2166; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v3.h, v7.h2167; GFX11-TRUE16-NEXT:    v_cndmask_b16 v2.l, 0x7e00, v9.l, s02168; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s0, v1.l, v5.l2169; GFX11-TRUE16-NEXT:    v_pk_max_f16 v7, v1, v52170; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s2, v0.h, v4.h2171; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s3, v1.h, v5.h2172; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s4, v2.h, v6.h2173; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0x7e00, v10.l, s12174; GFX11-TRUE16-NEXT:    v_cndmask_b16 v1.l, 0x7e00, v7.l, s02175; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0x7e00, v10.h, s22176; GFX11-TRUE16-NEXT:    v_cndmask_b16 v1.h, 0x7e00, v7.h, s32177; GFX11-TRUE16-NEXT:    v_cndmask_b16 v2.h, 0x7e00, v9.h, s42178; GFX11-TRUE16-NEXT:    v_cndmask_b16 v3.h, 0x7e00, v8.h, vcc_lo2179; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]2180;2181; GFX11-FAKE16-LABEL: v_maximum_v8f16:2182; GFX11-FAKE16:       ; %bb.0:2183; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2184; GFX11-FAKE16-NEXT:    v_pk_max_f16 v8, v3, v72185; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v3, v72186; GFX11-FAKE16-NEXT:    v_pk_max_f16 v10, v2, v62187; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v11, 16, v62188; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v12, 16, v22189; GFX11-FAKE16-NEXT:    v_pk_max_f16 v14, v1, v52190; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v9, 0x7e00, v8, vcc_lo2191; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v2, v62192; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v13, 16, v102193; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v7, 16, v72194; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v3, 16, v32195; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v8, 16, v82196; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v2, 0x7e00, v10, vcc_lo2197; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v12, v112198; GFX11-FAKE16-NEXT:    v_pk_max_f16 v11, v0, v42199; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v12, 16, v42200; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v6, 0x7e00, v13, vcc_lo2201; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v1, v52202; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v13, 16, v02203; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v5, 16, v52204; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v1, 16, v12205; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v15, 16, v112206; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v10, 0x7e00, v14, vcc_lo2207; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v0, v42208; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v14, 16, v142209; GFX11-FAKE16-NEXT:    v_perm_b32 v2, v6, v2, 0x50401002210; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0x7e00, v11, vcc_lo2211; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v13, v122212; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v4, 0x7e00, v15, vcc_lo2213; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v1, v52214; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)2215; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v4, v0, 0x50401002216; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0x7e00, v14, vcc_lo2217; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v3, v72218; GFX11-FAKE16-NEXT:    v_perm_b32 v1, v1, v10, 0x50401002219; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v3, 0x7e00, v8, vcc_lo2220; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)2221; GFX11-FAKE16-NEXT:    v_perm_b32 v3, v3, v9, 0x50401002222; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]2223;2224; GFX12-LABEL: v_maximum_v8f16:2225; GFX12:       ; %bb.0:2226; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x02227; GFX12-NEXT:    s_wait_expcnt 0x02228; GFX12-NEXT:    s_wait_samplecnt 0x02229; GFX12-NEXT:    s_wait_bvhcnt 0x02230; GFX12-NEXT:    s_wait_kmcnt 0x02231; GFX12-NEXT:    v_pk_maximum_f16 v0, v0, v42232; GFX12-NEXT:    v_pk_maximum_f16 v1, v1, v52233; GFX12-NEXT:    v_pk_maximum_f16 v2, v2, v62234; GFX12-NEXT:    v_pk_maximum_f16 v3, v3, v72235; GFX12-NEXT:    s_setpc_b64 s[30:31]2236  %op = call <8 x half> @llvm.maximum.v8f16(<8 x half> %src0, <8 x half> %src1)2237  ret <8 x half> %op2238}2239 2240define <16 x half> @v_maximum_v16f16(<16 x half> %src0, <16 x half> %src1) {2241; GFX7-LABEL: v_maximum_v16f16:2242; GFX7:       ; %bb.0:2243; GFX7-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2244; GFX7-NEXT:    v_cvt_f16_f32_e32 v16, v162245; GFX7-NEXT:    v_cvt_f16_f32_e32 v0, v02246; GFX7-NEXT:    v_cvt_f16_f32_e32 v1, v12247; GFX7-NEXT:    v_cvt_f16_f32_e32 v2, v22248; GFX7-NEXT:    v_cvt_f32_f16_e32 v16, v162249; GFX7-NEXT:    v_cvt_f32_f16_e32 v0, v02250; GFX7-NEXT:    v_cvt_f32_f16_e32 v1, v12251; GFX7-NEXT:    v_cvt_f32_f16_e32 v2, v22252; GFX7-NEXT:    v_cvt_f16_f32_e32 v3, v32253; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v0, v162254; GFX7-NEXT:    v_max_f32_e32 v0, v0, v162255; GFX7-NEXT:    v_cvt_f16_f32_e32 v16, v172256; GFX7-NEXT:    v_cvt_f32_f16_e32 v3, v32257; GFX7-NEXT:    v_cvt_f16_f32_e32 v4, v42258; GFX7-NEXT:    v_cvt_f16_f32_e32 v5, v52259; GFX7-NEXT:    v_cvt_f32_f16_e32 v16, v162260; GFX7-NEXT:    v_cvt_f16_f32_e32 v6, v62261; GFX7-NEXT:    v_cvt_f32_f16_e32 v4, v42262; GFX7-NEXT:    v_cvt_f32_f16_e32 v5, v52263; GFX7-NEXT:    v_cmp_o_f32_e64 s[4:5], v1, v162264; GFX7-NEXT:    v_max_f32_e32 v1, v1, v162265; GFX7-NEXT:    v_cvt_f16_f32_e32 v16, v182266; GFX7-NEXT:    v_cvt_f32_f16_e32 v6, v62267; GFX7-NEXT:    v_cvt_f16_f32_e32 v7, v72268; GFX7-NEXT:    v_cvt_f16_f32_e32 v8, v82269; GFX7-NEXT:    v_cvt_f32_f16_e32 v16, v162270; GFX7-NEXT:    v_cvt_f16_f32_e32 v9, v92271; GFX7-NEXT:    v_cvt_f32_f16_e32 v7, v72272; GFX7-NEXT:    v_cvt_f32_f16_e32 v8, v82273; GFX7-NEXT:    v_cmp_o_f32_e64 s[6:7], v2, v162274; GFX7-NEXT:    v_max_f32_e32 v2, v2, v162275; GFX7-NEXT:    v_cvt_f16_f32_e32 v16, v192276; GFX7-NEXT:    v_cvt_f32_f16_e32 v9, v92277; GFX7-NEXT:    v_cvt_f16_f32_e32 v10, v102278; GFX7-NEXT:    v_cvt_f16_f32_e32 v17, v272279; GFX7-NEXT:    v_cvt_f32_f16_e32 v16, v162280; GFX7-NEXT:    v_cvt_f16_f32_e32 v11, v112281; GFX7-NEXT:    v_cvt_f32_f16_e32 v10, v102282; GFX7-NEXT:    v_cvt_f32_f16_e32 v17, v172283; GFX7-NEXT:    v_cmp_o_f32_e64 s[8:9], v3, v162284; GFX7-NEXT:    v_max_f32_e32 v3, v3, v162285; GFX7-NEXT:    v_cvt_f16_f32_e32 v16, v202286; GFX7-NEXT:    v_cvt_f32_f16_e32 v11, v112287; GFX7-NEXT:    v_cvt_f16_f32_e32 v12, v122288; GFX7-NEXT:    v_cvt_f16_f32_e32 v19, v292289; GFX7-NEXT:    v_cvt_f32_f16_e32 v16, v162290; GFX7-NEXT:    v_cmp_o_f32_e64 s[24:25], v11, v172291; GFX7-NEXT:    v_max_f32_e32 v11, v11, v172292; GFX7-NEXT:    v_cvt_f16_f32_e32 v17, v282293; GFX7-NEXT:    v_cmp_o_f32_e64 s[10:11], v4, v162294; GFX7-NEXT:    v_max_f32_e32 v4, v4, v162295; GFX7-NEXT:    v_cvt_f16_f32_e32 v16, v212296; GFX7-NEXT:    v_cvt_f16_f32_e32 v20, v132297; GFX7-NEXT:    v_cvt_f32_f16_e32 v13, v172298; GFX7-NEXT:    v_cvt_f32_f16_e32 v18, v122299; GFX7-NEXT:    v_cvt_f32_f16_e32 v16, v162300; GFX7-NEXT:    v_cvt_f32_f16_e32 v12, v192301; GFX7-NEXT:    v_cvt_f32_f16_e32 v17, v202302; GFX7-NEXT:    v_cmp_o_f32_e64 s[26:27], v18, v132303; GFX7-NEXT:    v_cmp_o_f32_e64 s[12:13], v5, v162304; GFX7-NEXT:    v_max_f32_e32 v5, v5, v162305; GFX7-NEXT:    v_cvt_f16_f32_e32 v16, v222306; GFX7-NEXT:    v_max_f32_e32 v13, v18, v132307; GFX7-NEXT:    v_max_f32_e32 v18, v17, v122308; GFX7-NEXT:    v_cmp_o_f32_e64 s[28:29], v17, v122309; GFX7-NEXT:    v_cvt_f32_f16_e32 v16, v162310; GFX7-NEXT:    v_cvt_f16_f32_e32 v14, v142311; GFX7-NEXT:    v_cvt_f16_f32_e32 v15, v152312; GFX7-NEXT:    v_mov_b32_e32 v19, 0x7fc000002313; GFX7-NEXT:    v_cmp_o_f32_e64 s[14:15], v6, v162314; GFX7-NEXT:    v_max_f32_e32 v6, v6, v162315; GFX7-NEXT:    v_cvt_f16_f32_e32 v16, v232316; GFX7-NEXT:    v_cvt_f32_f16_e32 v14, v142317; GFX7-NEXT:    v_cvt_f32_f16_e32 v15, v152318; GFX7-NEXT:    v_cndmask_b32_e32 v0, v19, v0, vcc2319; GFX7-NEXT:    v_cvt_f32_f16_e32 v16, v162320; GFX7-NEXT:    v_cndmask_b32_e64 v1, v19, v1, s[4:5]2321; GFX7-NEXT:    v_cndmask_b32_e64 v2, v19, v2, s[6:7]2322; GFX7-NEXT:    v_cndmask_b32_e64 v3, v19, v3, s[8:9]2323; GFX7-NEXT:    v_cmp_o_f32_e64 s[16:17], v7, v162324; GFX7-NEXT:    v_max_f32_e32 v7, v7, v162325; GFX7-NEXT:    v_cvt_f16_f32_e32 v16, v242326; GFX7-NEXT:    v_cndmask_b32_e64 v4, v19, v4, s[10:11]2327; GFX7-NEXT:    v_cndmask_b32_e64 v5, v19, v5, s[12:13]2328; GFX7-NEXT:    v_cndmask_b32_e64 v6, v19, v6, s[14:15]2329; GFX7-NEXT:    v_cvt_f32_f16_e32 v16, v162330; GFX7-NEXT:    v_cndmask_b32_e64 v7, v19, v7, s[16:17]2331; GFX7-NEXT:    v_cndmask_b32_e64 v11, v19, v11, s[24:25]2332; GFX7-NEXT:    v_cmp_o_f32_e64 s[18:19], v8, v162333; GFX7-NEXT:    v_max_f32_e32 v8, v8, v162334; GFX7-NEXT:    v_cvt_f16_f32_e32 v16, v252335; GFX7-NEXT:    v_cndmask_b32_e64 v8, v19, v8, s[18:19]2336; GFX7-NEXT:    v_cvt_f32_f16_e32 v16, v162337; GFX7-NEXT:    v_cmp_o_f32_e64 s[20:21], v9, v162338; GFX7-NEXT:    v_max_f32_e32 v9, v9, v162339; GFX7-NEXT:    v_cvt_f16_f32_e32 v16, v262340; GFX7-NEXT:    v_cndmask_b32_e64 v9, v19, v9, s[20:21]2341; GFX7-NEXT:    v_cvt_f32_f16_e32 v16, v162342; GFX7-NEXT:    v_cmp_o_f32_e64 s[22:23], v10, v162343; GFX7-NEXT:    v_max_f32_e32 v10, v10, v162344; GFX7-NEXT:    buffer_load_dword v16, off, s[0:3], s322345; GFX7-NEXT:    v_cndmask_b32_e64 v10, v19, v10, s[22:23]2346; GFX7-NEXT:    s_waitcnt vmcnt(0)2347; GFX7-NEXT:    v_cvt_f16_f32_e32 v12, v162348; GFX7-NEXT:    v_cvt_f16_f32_e32 v16, v302349; GFX7-NEXT:    v_cvt_f32_f16_e32 v17, v122350; GFX7-NEXT:    v_cvt_f32_f16_e32 v16, v162351; GFX7-NEXT:    v_cndmask_b32_e64 v12, v19, v13, s[26:27]2352; GFX7-NEXT:    v_cndmask_b32_e64 v13, v19, v18, s[28:29]2353; GFX7-NEXT:    v_max_f32_e32 v18, v14, v162354; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v14, v162355; GFX7-NEXT:    v_cndmask_b32_e32 v14, v19, v18, vcc2356; GFX7-NEXT:    v_max_f32_e32 v16, v15, v172357; GFX7-NEXT:    v_cmp_o_f32_e32 vcc, v15, v172358; GFX7-NEXT:    v_cndmask_b32_e32 v15, v19, v16, vcc2359; GFX7-NEXT:    s_setpc_b64 s[30:31]2360;2361; GFX8-LABEL: v_maximum_v16f16:2362; GFX8:       ; %bb.0:2363; GFX8-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2364; GFX8-NEXT:    v_lshrrev_b32_e32 v17, 16, v142365; GFX8-NEXT:    v_lshrrev_b32_e32 v18, 16, v62366; GFX8-NEXT:    v_max_f16_e32 v16, v18, v172367; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v18, v172368; GFX8-NEXT:    v_lshrrev_b32_e32 v17, 16, v132369; GFX8-NEXT:    v_lshrrev_b32_e32 v18, 16, v52370; GFX8-NEXT:    v_max_f16_e32 v20, v18, v172371; GFX8-NEXT:    v_cmp_o_f16_e64 s[4:5], v18, v172372; GFX8-NEXT:    v_lshrrev_b32_e32 v17, 16, v122373; GFX8-NEXT:    v_lshrrev_b32_e32 v18, 16, v42374; GFX8-NEXT:    v_max_f16_e32 v21, v18, v172375; GFX8-NEXT:    v_cmp_o_f16_e64 s[6:7], v18, v172376; GFX8-NEXT:    v_lshrrev_b32_e32 v17, 16, v112377; GFX8-NEXT:    v_lshrrev_b32_e32 v18, 16, v32378; GFX8-NEXT:    v_max_f16_e32 v22, v18, v172379; GFX8-NEXT:    v_cmp_o_f16_e64 s[8:9], v18, v172380; GFX8-NEXT:    v_lshrrev_b32_e32 v17, 16, v102381; GFX8-NEXT:    v_lshrrev_b32_e32 v18, 16, v22382; GFX8-NEXT:    v_max_f16_e32 v23, v18, v172383; GFX8-NEXT:    v_cmp_o_f16_e64 s[10:11], v18, v172384; GFX8-NEXT:    v_lshrrev_b32_e32 v17, 16, v92385; GFX8-NEXT:    v_lshrrev_b32_e32 v18, 16, v12386; GFX8-NEXT:    v_mov_b32_e32 v19, 0x7e002387; GFX8-NEXT:    v_max_f16_e32 v24, v18, v172388; GFX8-NEXT:    v_cmp_o_f16_e64 s[12:13], v18, v172389; GFX8-NEXT:    v_lshrrev_b32_e32 v17, 16, v82390; GFX8-NEXT:    v_lshrrev_b32_e32 v18, 16, v02391; GFX8-NEXT:    v_max_f16_e32 v25, v18, v172392; GFX8-NEXT:    v_cmp_o_f16_e64 s[14:15], v18, v172393; GFX8-NEXT:    v_max_f16_e32 v17, v6, v142394; GFX8-NEXT:    v_cmp_o_f16_e64 s[16:17], v6, v142395; GFX8-NEXT:    v_max_f16_e32 v6, v5, v132396; GFX8-NEXT:    v_cmp_o_f16_e64 s[18:19], v5, v132397; GFX8-NEXT:    v_max_f16_e32 v5, v4, v122398; GFX8-NEXT:    v_cmp_o_f16_e64 s[20:21], v4, v122399; GFX8-NEXT:    v_max_f16_e32 v4, v3, v112400; GFX8-NEXT:    v_cmp_o_f16_e64 s[22:23], v3, v112401; GFX8-NEXT:    v_max_f16_e32 v3, v2, v102402; GFX8-NEXT:    v_max_f16_e32 v11, v7, v152403; GFX8-NEXT:    v_cmp_o_f16_e64 s[24:25], v7, v152404; GFX8-NEXT:    v_lshrrev_b32_e32 v12, 16, v152405; GFX8-NEXT:    v_lshrrev_b32_e32 v7, 16, v72406; GFX8-NEXT:    v_cndmask_b32_e32 v14, v19, v16, vcc2407; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v2, v102408; GFX8-NEXT:    v_max_f16_e32 v13, v7, v122409; GFX8-NEXT:    v_cmp_o_f16_e64 s[26:27], v7, v122410; GFX8-NEXT:    v_max_f16_e32 v7, v1, v92411; GFX8-NEXT:    v_cndmask_b32_e32 v2, v19, v3, vcc2412; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v1, v92413; GFX8-NEXT:    v_max_f16_e32 v12, v0, v82414; GFX8-NEXT:    v_cndmask_b32_e64 v18, v19, v22, s[8:9]2415; GFX8-NEXT:    v_cndmask_b32_e64 v22, v19, v25, s[14:15]2416; GFX8-NEXT:    v_cndmask_b32_e32 v1, v19, v7, vcc2417; GFX8-NEXT:    v_cmp_o_f16_e32 vcc, v0, v82418; GFX8-NEXT:    v_cndmask_b32_e64 v16, v19, v21, s[6:7]2419; GFX8-NEXT:    v_cndmask_b32_e64 v21, v19, v24, s[12:13]2420; GFX8-NEXT:    v_cndmask_b32_e32 v0, v19, v12, vcc2421; GFX8-NEXT:    v_lshlrev_b32_e32 v3, 16, v222422; GFX8-NEXT:    v_cndmask_b32_e64 v15, v19, v20, s[4:5]2423; GFX8-NEXT:    v_cndmask_b32_e64 v20, v19, v23, s[10:11]2424; GFX8-NEXT:    v_or_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD2425; GFX8-NEXT:    v_lshlrev_b32_e32 v3, 16, v212426; GFX8-NEXT:    v_or_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD2427; GFX8-NEXT:    v_lshlrev_b32_e32 v3, 16, v202428; GFX8-NEXT:    v_cndmask_b32_e64 v4, v19, v4, s[22:23]2429; GFX8-NEXT:    v_or_b32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD2430; GFX8-NEXT:    v_lshlrev_b32_e32 v3, 16, v182431; GFX8-NEXT:    v_cndmask_b32_e64 v5, v19, v5, s[20:21]2432; GFX8-NEXT:    v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD2433; GFX8-NEXT:    v_lshlrev_b32_e32 v4, 16, v162434; GFX8-NEXT:    v_cndmask_b32_e64 v13, v19, v13, s[26:27]2435; GFX8-NEXT:    v_cndmask_b32_e64 v6, v19, v6, s[18:19]2436; GFX8-NEXT:    v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD2437; GFX8-NEXT:    v_lshlrev_b32_e32 v5, 16, v152438; GFX8-NEXT:    v_cndmask_b32_e64 v11, v19, v11, s[24:25]2439; GFX8-NEXT:    v_cndmask_b32_e64 v17, v19, v17, s[16:17]2440; GFX8-NEXT:    v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD2441; GFX8-NEXT:    v_lshlrev_b32_e32 v6, 16, v142442; GFX8-NEXT:    v_lshlrev_b32_e32 v7, 16, v132443; GFX8-NEXT:    v_or_b32_sdwa v6, v17, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD2444; GFX8-NEXT:    v_or_b32_sdwa v7, v11, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD2445; GFX8-NEXT:    s_setpc_b64 s[30:31]2446;2447; GFX900-LABEL: v_maximum_v16f16:2448; GFX900:       ; %bb.0:2449; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2450; GFX900-NEXT:    v_pk_max_f16 v16, v7, v152451; GFX900-NEXT:    v_mov_b32_e32 v17, 0x7e002452; GFX900-NEXT:    v_cmp_o_f16_e32 vcc, v7, v152453; GFX900-NEXT:    v_cndmask_b32_e32 v18, v17, v16, vcc2454; GFX900-NEXT:    v_lshrrev_b32_e32 v16, 16, v162455; GFX900-NEXT:    v_cmp_o_f16_sdwa vcc, v7, v15 src0_sel:WORD_1 src1_sel:WORD_12456; GFX900-NEXT:    v_cndmask_b32_e32 v7, v17, v16, vcc2457; GFX900-NEXT:    v_pk_max_f16 v15, v6, v142458; GFX900-NEXT:    v_cmp_o_f16_e32 vcc, v6, v142459; GFX900-NEXT:    v_cndmask_b32_e32 v16, v17, v15, vcc2460; GFX900-NEXT:    v_lshrrev_b32_e32 v15, 16, v152461; GFX900-NEXT:    v_cmp_o_f16_sdwa vcc, v6, v14 src0_sel:WORD_1 src1_sel:WORD_12462; GFX900-NEXT:    v_cndmask_b32_e32 v6, v17, v15, vcc2463; GFX900-NEXT:    v_pk_max_f16 v14, v5, v132464; GFX900-NEXT:    v_cmp_o_f16_e32 vcc, v5, v132465; GFX900-NEXT:    v_cndmask_b32_e32 v15, v17, v14, vcc2466; GFX900-NEXT:    v_lshrrev_b32_e32 v14, 16, v142467; GFX900-NEXT:    v_cmp_o_f16_sdwa vcc, v5, v13 src0_sel:WORD_1 src1_sel:WORD_12468; GFX900-NEXT:    v_cndmask_b32_e32 v5, v17, v14, vcc2469; GFX900-NEXT:    v_pk_max_f16 v13, v4, v122470; GFX900-NEXT:    v_cmp_o_f16_e32 vcc, v4, v122471; GFX900-NEXT:    v_cndmask_b32_e32 v14, v17, v13, vcc2472; GFX900-NEXT:    v_lshrrev_b32_e32 v13, 16, v132473; GFX900-NEXT:    v_cmp_o_f16_sdwa vcc, v4, v12 src0_sel:WORD_1 src1_sel:WORD_12474; GFX900-NEXT:    v_cndmask_b32_e32 v4, v17, v13, vcc2475; GFX900-NEXT:    v_pk_max_f16 v12, v3, v112476; GFX900-NEXT:    v_cmp_o_f16_e32 vcc, v3, v112477; GFX900-NEXT:    v_cndmask_b32_e32 v13, v17, v12, vcc2478; GFX900-NEXT:    v_lshrrev_b32_e32 v12, 16, v122479; GFX900-NEXT:    v_cmp_o_f16_sdwa vcc, v3, v11 src0_sel:WORD_1 src1_sel:WORD_12480; GFX900-NEXT:    v_cndmask_b32_e32 v3, v17, v12, vcc2481; GFX900-NEXT:    v_pk_max_f16 v11, v2, v102482; GFX900-NEXT:    v_cmp_o_f16_e32 vcc, v2, v102483; GFX900-NEXT:    v_cndmask_b32_e32 v12, v17, v11, vcc2484; GFX900-NEXT:    v_lshrrev_b32_e32 v11, 16, v112485; GFX900-NEXT:    v_cmp_o_f16_sdwa vcc, v2, v10 src0_sel:WORD_1 src1_sel:WORD_12486; GFX900-NEXT:    v_cndmask_b32_e32 v2, v17, v11, vcc2487; GFX900-NEXT:    v_pk_max_f16 v10, v1, v92488; GFX900-NEXT:    v_cmp_o_f16_e32 vcc, v1, v92489; GFX900-NEXT:    v_cndmask_b32_e32 v11, v17, v10, vcc2490; GFX900-NEXT:    v_lshrrev_b32_e32 v10, 16, v102491; GFX900-NEXT:    v_cmp_o_f16_sdwa vcc, v1, v9 src0_sel:WORD_1 src1_sel:WORD_12492; GFX900-NEXT:    v_cndmask_b32_e32 v1, v17, v10, vcc2493; GFX900-NEXT:    v_pk_max_f16 v9, v0, v82494; GFX900-NEXT:    v_cmp_o_f16_e32 vcc, v0, v82495; GFX900-NEXT:    v_cndmask_b32_e32 v10, v17, v9, vcc2496; GFX900-NEXT:    v_lshrrev_b32_e32 v9, 16, v92497; GFX900-NEXT:    v_cmp_o_f16_sdwa vcc, v0, v8 src0_sel:WORD_1 src1_sel:WORD_12498; GFX900-NEXT:    v_cndmask_b32_e32 v0, v17, v9, vcc2499; GFX900-NEXT:    s_mov_b32 s4, 0x50401002500; GFX900-NEXT:    v_perm_b32 v0, v0, v10, s42501; GFX900-NEXT:    v_perm_b32 v1, v1, v11, s42502; GFX900-NEXT:    v_perm_b32 v2, v2, v12, s42503; GFX900-NEXT:    v_perm_b32 v3, v3, v13, s42504; GFX900-NEXT:    v_perm_b32 v4, v4, v14, s42505; GFX900-NEXT:    v_perm_b32 v5, v5, v15, s42506; GFX900-NEXT:    v_perm_b32 v6, v6, v16, s42507; GFX900-NEXT:    v_perm_b32 v7, v7, v18, s42508; GFX900-NEXT:    s_setpc_b64 s[30:31]2509;2510; GFX950-LABEL: v_maximum_v16f16:2511; GFX950:       ; %bb.0:2512; GFX950-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2513; GFX950-NEXT:    v_pk_maximum3_f16 v0, v0, v8, v82514; GFX950-NEXT:    v_pk_maximum3_f16 v1, v1, v9, v92515; GFX950-NEXT:    v_pk_maximum3_f16 v2, v2, v10, v102516; GFX950-NEXT:    v_pk_maximum3_f16 v3, v3, v11, v112517; GFX950-NEXT:    v_pk_maximum3_f16 v4, v4, v12, v122518; GFX950-NEXT:    v_pk_maximum3_f16 v5, v5, v13, v132519; GFX950-NEXT:    v_pk_maximum3_f16 v6, v6, v14, v142520; GFX950-NEXT:    v_pk_maximum3_f16 v7, v7, v15, v152521; GFX950-NEXT:    s_setpc_b64 s[30:31]2522;2523; GFX10-LABEL: v_maximum_v16f16:2524; GFX10:       ; %bb.0:2525; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2526; GFX10-NEXT:    v_pk_max_f16 v16, v7, v152527; GFX10-NEXT:    v_cmp_o_f16_e32 vcc_lo, v7, v152528; GFX10-NEXT:    v_pk_max_f16 v18, v6, v142529; GFX10-NEXT:    v_pk_max_f16 v19, v3, v112530; GFX10-NEXT:    v_pk_max_f16 v20, v2, v102531; GFX10-NEXT:    v_lshrrev_b32_e32 v17, 16, v162532; GFX10-NEXT:    v_cndmask_b32_e32 v16, 0x7e00, v16, vcc_lo2533; GFX10-NEXT:    v_cmp_o_f16_sdwa vcc_lo, v7, v15 src0_sel:WORD_1 src1_sel:WORD_12534; GFX10-NEXT:    v_lshrrev_b32_e32 v15, 16, v182535; GFX10-NEXT:    v_pk_max_f16 v21, v0, v82536; GFX10-NEXT:    v_cndmask_b32_e32 v7, 0x7e00, v17, vcc_lo2537; GFX10-NEXT:    v_cmp_o_f16_e32 vcc_lo, v6, v142538; GFX10-NEXT:    v_pk_max_f16 v17, v5, v132539; GFX10-NEXT:    v_lshrrev_b32_e32 v23, 16, v212540; GFX10-NEXT:    v_perm_b32 v7, v7, v16, 0x50401002541; GFX10-NEXT:    v_cndmask_b32_e32 v18, 0x7e00, v18, vcc_lo2542; GFX10-NEXT:    v_cmp_o_f16_sdwa vcc_lo, v6, v14 src0_sel:WORD_1 src1_sel:WORD_12543; GFX10-NEXT:    v_lshrrev_b32_e32 v14, 16, v172544; GFX10-NEXT:    v_cndmask_b32_e32 v6, 0x7e00, v15, vcc_lo2545; GFX10-NEXT:    v_cmp_o_f16_e32 vcc_lo, v5, v132546; GFX10-NEXT:    v_perm_b32 v6, v6, v18, 0x50401002547; GFX10-NEXT:    v_cndmask_b32_e32 v15, 0x7e00, v17, vcc_lo2548; GFX10-NEXT:    v_cmp_o_f16_sdwa vcc_lo, v5, v13 src0_sel:WORD_1 src1_sel:WORD_12549; GFX10-NEXT:    v_pk_max_f16 v17, v4, v122550; GFX10-NEXT:    v_cndmask_b32_e32 v5, 0x7e00, v14, vcc_lo2551; GFX10-NEXT:    v_cmp_o_f16_e32 vcc_lo, v4, v122552; GFX10-NEXT:    v_lshrrev_b32_e32 v14, 16, v172553; GFX10-NEXT:    v_perm_b32 v5, v5, v15, 0x50401002554; GFX10-NEXT:    v_cndmask_b32_e32 v13, 0x7e00, v17, vcc_lo2555; GFX10-NEXT:    v_cmp_o_f16_e32 vcc_lo, v3, v112556; GFX10-NEXT:    v_lshrrev_b32_e32 v17, 16, v192557; GFX10-NEXT:    v_cndmask_b32_e32 v19, 0x7e00, v19, vcc_lo2558; GFX10-NEXT:    v_cmp_o_f16_sdwa vcc_lo, v3, v11 src0_sel:WORD_1 src1_sel:WORD_12559; GFX10-NEXT:    v_pk_max_f16 v11, v1, v92560; GFX10-NEXT:    v_cndmask_b32_e32 v3, 0x7e00, v17, vcc_lo2561; GFX10-NEXT:    v_cmp_o_f16_e32 vcc_lo, v2, v102562; GFX10-NEXT:    v_lshrrev_b32_e32 v22, 16, v112563; GFX10-NEXT:    v_perm_b32 v3, v3, v19, 0x50401002564; GFX10-NEXT:    v_cndmask_b32_e32 v17, 0x7e00, v20, vcc_lo2565; GFX10-NEXT:    v_cmp_o_f16_e32 vcc_lo, v1, v92566; GFX10-NEXT:    v_lshrrev_b32_e32 v20, 16, v202567; GFX10-NEXT:    v_cndmask_b32_e32 v11, 0x7e00, v11, vcc_lo2568; GFX10-NEXT:    v_cmp_o_f16_sdwa vcc_lo, v1, v9 src0_sel:WORD_1 src1_sel:WORD_12569; GFX10-NEXT:    v_cndmask_b32_e32 v1, 0x7e00, v22, vcc_lo2570; GFX10-NEXT:    v_cmp_o_f16_e32 vcc_lo, v0, v82571; GFX10-NEXT:    v_perm_b32 v1, v1, v11, 0x50401002572; GFX10-NEXT:    v_cndmask_b32_e32 v9, 0x7e00, v21, vcc_lo2573; GFX10-NEXT:    v_cmp_o_f16_sdwa vcc_lo, v0, v8 src0_sel:WORD_1 src1_sel:WORD_12574; GFX10-NEXT:    v_cndmask_b32_e32 v0, 0x7e00, v23, vcc_lo2575; GFX10-NEXT:    v_cmp_o_f16_sdwa vcc_lo, v2, v10 src0_sel:WORD_1 src1_sel:WORD_12576; GFX10-NEXT:    v_perm_b32 v0, v0, v9, 0x50401002577; GFX10-NEXT:    v_cndmask_b32_e32 v2, 0x7e00, v20, vcc_lo2578; GFX10-NEXT:    v_cmp_o_f16_sdwa vcc_lo, v4, v12 src0_sel:WORD_1 src1_sel:WORD_12579; GFX10-NEXT:    v_perm_b32 v2, v2, v17, 0x50401002580; GFX10-NEXT:    v_cndmask_b32_e32 v4, 0x7e00, v14, vcc_lo2581; GFX10-NEXT:    v_perm_b32 v4, v4, v13, 0x50401002582; GFX10-NEXT:    s_setpc_b64 s[30:31]2583;2584; GFX11-TRUE16-LABEL: v_maximum_v16f16:2585; GFX11-TRUE16:       ; %bb.0:2586; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2587; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v7.l, v15.l2588; GFX11-TRUE16-NEXT:    v_pk_max_f16 v16, v7, v152589; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s0, v6.l, v14.l2590; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s1, v6.h, v14.h2591; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s2, v5.l, v13.l2592; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s3, v5.h, v13.h2593; GFX11-TRUE16-NEXT:    v_cndmask_b16 v7.l, 0x7e00, v16.l, vcc_lo2594; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v7.h, v15.h2595; GFX11-TRUE16-NEXT:    v_pk_max_f16 v15, v6, v142596; GFX11-TRUE16-NEXT:    v_pk_max_f16 v14, v5, v132597; GFX11-TRUE16-NEXT:    v_pk_max_f16 v13, v4, v122598; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s4, v1.h, v9.h2599; GFX11-TRUE16-NEXT:    v_cndmask_b16 v7.h, 0x7e00, v16.h, vcc_lo2600; GFX11-TRUE16-NEXT:    v_cndmask_b16 v6.l, 0x7e00, v15.l, s02601; GFX11-TRUE16-NEXT:    v_cndmask_b16 v6.h, 0x7e00, v15.h, s12602; GFX11-TRUE16-NEXT:    v_cndmask_b16 v5.l, 0x7e00, v14.l, s22603; GFX11-TRUE16-NEXT:    v_cndmask_b16 v5.h, 0x7e00, v14.h, s32604; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v4.l, v12.l2605; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s0, v3.l, v11.l2606; GFX11-TRUE16-NEXT:    v_pk_max_f16 v14, v3, v112607; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s1, v2.l, v10.l2608; GFX11-TRUE16-NEXT:    v_pk_max_f16 v15, v2, v102609; GFX11-TRUE16-NEXT:    v_cndmask_b16 v4.l, 0x7e00, v13.l, vcc_lo2610; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v4.h, v12.h2611; GFX11-TRUE16-NEXT:    v_cndmask_b16 v3.l, 0x7e00, v14.l, s02612; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s0, v3.h, v11.h2613; GFX11-TRUE16-NEXT:    v_cndmask_b16 v2.l, 0x7e00, v15.l, s12614; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s1, v1.l, v9.l2615; GFX11-TRUE16-NEXT:    v_pk_max_f16 v11, v1, v92616; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s2, v0.l, v8.l2617; GFX11-TRUE16-NEXT:    v_pk_max_f16 v12, v0, v82618; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s3, v0.h, v8.h2619; GFX11-TRUE16-NEXT:    v_cmp_o_f16_e64 s5, v2.h, v10.h2620; GFX11-TRUE16-NEXT:    v_cndmask_b16 v1.l, 0x7e00, v11.l, s12621; GFX11-TRUE16-NEXT:    v_cndmask_b16 v1.h, 0x7e00, v11.h, s42622; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0x7e00, v12.l, s22623; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0x7e00, v12.h, s32624; GFX11-TRUE16-NEXT:    v_cndmask_b16 v2.h, 0x7e00, v15.h, s52625; GFX11-TRUE16-NEXT:    v_cndmask_b16 v3.h, 0x7e00, v14.h, s02626; GFX11-TRUE16-NEXT:    v_cndmask_b16 v4.h, 0x7e00, v13.h, vcc_lo2627; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]2628;2629; GFX11-FAKE16-LABEL: v_maximum_v16f16:2630; GFX11-FAKE16:       ; %bb.0:2631; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2632; GFX11-FAKE16-NEXT:    v_pk_max_f16 v16, v7, v152633; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v17, 16, v152634; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v18, 16, v72635; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v7, v152636; GFX11-FAKE16-NEXT:    v_pk_max_f16 v15, v6, v142637; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v19, 16, v162638; GFX11-FAKE16-NEXT:    v_pk_max_f16 v20, v4, v122639; GFX11-FAKE16-NEXT:    v_pk_max_f16 v22, v2, v102640; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v7, 0x7e00, v16, vcc_lo2641; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v18, v172642; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v17, 16, v142643; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v18, 16, v62644; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v23, 16, v82645; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v24, 16, v02646; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v16, 0x7e00, v19, vcc_lo2647; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v6, v142648; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v19, 16, v152649; GFX11-FAKE16-NEXT:    v_pk_max_f16 v14, v5, v132650; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_4)2651; GFX11-FAKE16-NEXT:    v_perm_b32 v7, v16, v7, 0x50401002652; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v6, 0x7e00, v15, vcc_lo2653; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v18, v172654; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v17, 16, v132655; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v18, 16, v52656; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v15, 0x7e00, v19, vcc_lo2657; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v5, v132658; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v19, 16, v142659; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3)2660; GFX11-FAKE16-NEXT:    v_perm_b32 v6, v15, v6, 0x50401002661; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v5, 0x7e00, v14, vcc_lo2662; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v18, v172663; GFX11-FAKE16-NEXT:    v_pk_max_f16 v17, v3, v112664; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v18, 16, v202665; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v13, 0x7e00, v19, vcc_lo2666; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v4, v122667; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v19, 16, v112668; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v21, 16, v172669; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v12, 16, v122670; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v4, 16, v42671; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v14, 0x7e00, v20, vcc_lo2672; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v20, 16, v32673; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v3, v112674; GFX11-FAKE16-NEXT:    v_perm_b32 v5, v13, v5, 0x50401002675; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v3, 0x7e00, v17, vcc_lo2676; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_4)2677; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v20, v192678; GFX11-FAKE16-NEXT:    v_pk_max_f16 v19, v1, v92679; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v20, 16, v222680; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v11, 0x7e00, v21, vcc_lo2681; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v2, v102682; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v10, 16, v102683; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v2, 16, v22684; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_4)2685; GFX11-FAKE16-NEXT:    v_perm_b32 v3, v11, v3, 0x50401002686; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v17, 0x7e00, v22, vcc_lo2687; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v1, v92688; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v9, 16, v92689; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v1, 16, v12690; GFX11-FAKE16-NEXT:    v_pk_max_f16 v22, v0, v82691; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v21, 0x7e00, v19, vcc_lo2692; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v19, 16, v192693; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2694; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v1, v92695; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v25, 16, v222696; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)2697; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0x7e00, v19, vcc_lo2698; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v0, v82699; GFX11-FAKE16-NEXT:    v_perm_b32 v1, v1, v21, 0x50401002700; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0x7e00, v22, vcc_lo2701; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v24, v232702; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v8, 0x7e00, v25, vcc_lo2703; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v2, v102704; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)2705; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v8, v0, 0x50401002706; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v2, 0x7e00, v20, vcc_lo2707; GFX11-FAKE16-NEXT:    v_cmp_o_f16_e32 vcc_lo, v4, v122708; GFX11-FAKE16-NEXT:    v_perm_b32 v2, v2, v17, 0x50401002709; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v4, 0x7e00, v18, vcc_lo2710; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)2711; GFX11-FAKE16-NEXT:    v_perm_b32 v4, v4, v14, 0x50401002712; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]2713;2714; GFX12-LABEL: v_maximum_v16f16:2715; GFX12:       ; %bb.0:2716; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x02717; GFX12-NEXT:    s_wait_expcnt 0x02718; GFX12-NEXT:    s_wait_samplecnt 0x02719; GFX12-NEXT:    s_wait_bvhcnt 0x02720; GFX12-NEXT:    s_wait_kmcnt 0x02721; GFX12-NEXT:    v_pk_maximum_f16 v0, v0, v82722; GFX12-NEXT:    v_pk_maximum_f16 v1, v1, v92723; GFX12-NEXT:    v_pk_maximum_f16 v2, v2, v102724; GFX12-NEXT:    v_pk_maximum_f16 v3, v3, v112725; GFX12-NEXT:    v_pk_maximum_f16 v4, v4, v122726; GFX12-NEXT:    v_pk_maximum_f16 v5, v5, v132727; GFX12-NEXT:    v_pk_maximum_f16 v6, v6, v142728; GFX12-NEXT:    v_pk_maximum_f16 v7, v7, v152729; GFX12-NEXT:    s_setpc_b64 s[30:31]2730  %op = call <16 x half> @llvm.maximum.v16f16(<16 x half> %src0, <16 x half> %src1)2731  ret <16 x half> %op2732}2733;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:2734; GCN: {{.*}}2735