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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; xUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx703 < %s | FileCheck -check-prefixes=GCN,GFX7 %s3; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 < %s | FileCheck -check-prefixes=GCN,GFX8 %s4; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,GFX9 %s5; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,GFX9,GFX900 %s6; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx950 < %s | FileCheck -check-prefixes=GCN,GFX9,GFX950 %s7; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1030 < %s | FileCheck -check-prefixes=GCN,GFX10 %s8; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GCN,GFX11,GFX11-TRUE16 %s9; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GCN,GFX11,GFX11-FAKE16 %s10; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GCN,GFX12,GFX12-TRUE16 %s11; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GCN,GFX12,GFX12-FAKE16 %s12 13define half @v_minimum_f16(half %src0, half %src1) {14; GFX8-LABEL: v_minimum_f16:15; GFX8: ; %bb.0:16; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)17; GFX8-NEXT: v_min_f16_e32 v2, v0, v118; GFX8-NEXT: v_mov_b32_e32 v3, 0x7e0019; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v0, v120; GFX8-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc21; GFX8-NEXT: s_setpc_b64 s[30:31]22;23; GFX900-LABEL: v_minimum_f16:24; GFX900: ; %bb.0:25; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)26; GFX900-NEXT: v_min_f16_e32 v2, v0, v127; GFX900-NEXT: v_mov_b32_e32 v3, 0x7e0028; GFX900-NEXT: v_cmp_o_f16_e32 vcc, v0, v129; GFX900-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc30; GFX900-NEXT: s_setpc_b64 s[30:31]31;32; GFX950-LABEL: v_minimum_f16:33; GFX950: ; %bb.0:34; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)35; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v1, v136; GFX950-NEXT: s_setpc_b64 s[30:31]37;38; GFX10-LABEL: v_minimum_f16:39; GFX10: ; %bb.0:40; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)41; GFX10-NEXT: v_min_f16_e32 v2, v0, v142; GFX10-NEXT: v_cmp_o_f16_e32 vcc_lo, v0, v143; GFX10-NEXT: v_cndmask_b32_e32 v0, 0x7e00, v2, vcc_lo44; GFX10-NEXT: s_setpc_b64 s[30:31]45;46; GFX11-TRUE16-LABEL: v_minimum_f16:47; GFX11-TRUE16: ; %bb.0:48; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)49; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v0.l, v1.l50; GFX11-TRUE16-NEXT: v_min_f16_e32 v0.l, v0.l, v1.l51; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)52; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v0.l, vcc_lo53; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]54;55; GFX11-FAKE16-LABEL: v_minimum_f16:56; GFX11-FAKE16: ; %bb.0:57; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)58; GFX11-FAKE16-NEXT: v_min_f16_e32 v2, v0, v159; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v0, v160; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)61; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x7e00, v2, vcc_lo62; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]63;64; GFX12-TRUE16-LABEL: v_minimum_f16:65; GFX12-TRUE16: ; %bb.0:66; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x067; GFX12-TRUE16-NEXT: s_wait_expcnt 0x068; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x069; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x070; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x071; GFX12-TRUE16-NEXT: v_minimum_f16 v0.l, v0.l, v1.l72; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]73;74; GFX12-FAKE16-LABEL: v_minimum_f16:75; GFX12-FAKE16: ; %bb.0:76; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x077; GFX12-FAKE16-NEXT: s_wait_expcnt 0x078; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x079; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x080; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x081; GFX12-FAKE16-NEXT: v_minimum_f16 v0, v0, v182; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]83 %op = call half @llvm.minimum.f16(half %src0, half %src1)84 ret half %op85}86 87define half @v_minimum_f16__nnan(half %src0, half %src1) {88; GFX8-LABEL: v_minimum_f16__nnan:89; GFX8: ; %bb.0:90; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)91; GFX8-NEXT: v_min_f16_e32 v0, v0, v192; GFX8-NEXT: s_setpc_b64 s[30:31]93;94; GFX9-LABEL: v_minimum_f16__nnan:95; GFX9: ; %bb.0:96; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)97; GFX9-NEXT: v_min_f16_e32 v0, v0, v198; GFX9-NEXT: s_setpc_b64 s[30:31]99;100; GFX10-LABEL: v_minimum_f16__nnan:101; GFX10: ; %bb.0:102; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)103; GFX10-NEXT: v_min_f16_e32 v0, v0, v1104; GFX10-NEXT: s_setpc_b64 s[30:31]105;106; GFX11-TRUE16-LABEL: v_minimum_f16__nnan:107; GFX11-TRUE16: ; %bb.0:108; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)109; GFX11-TRUE16-NEXT: v_min_f16_e32 v0.l, v0.l, v1.l110; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]111;112; GFX11-FAKE16-LABEL: v_minimum_f16__nnan:113; GFX11-FAKE16: ; %bb.0:114; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)115; GFX11-FAKE16-NEXT: v_min_f16_e32 v0, v0, v1116; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]117;118; GFX12-TRUE16-LABEL: v_minimum_f16__nnan:119; GFX12-TRUE16: ; %bb.0:120; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0121; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0122; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0123; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0124; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0125; GFX12-TRUE16-NEXT: v_minimum_f16 v0.l, v0.l, v1.l126; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]127;128; GFX12-FAKE16-LABEL: v_minimum_f16__nnan:129; GFX12-FAKE16: ; %bb.0:130; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0131; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0132; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0133; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0134; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0135; GFX12-FAKE16-NEXT: v_minimum_f16 v0, v0, v1136; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]137 %op = call nnan half @llvm.minimum.f16(half %src0, half %src1)138 ret half %op139}140 141define half @v_minimum_f16__nsz(half %src0, half %src1) {142; GFX8-LABEL: v_minimum_f16__nsz:143; GFX8: ; %bb.0:144; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)145; GFX8-NEXT: v_min_f16_e32 v2, v0, v1146; GFX8-NEXT: v_mov_b32_e32 v3, 0x7e00147; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v0, v1148; GFX8-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc149; GFX8-NEXT: s_setpc_b64 s[30:31]150;151; GFX900-LABEL: v_minimum_f16__nsz:152; GFX900: ; %bb.0:153; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)154; GFX900-NEXT: v_min_f16_e32 v2, v0, v1155; GFX900-NEXT: v_mov_b32_e32 v3, 0x7e00156; GFX900-NEXT: v_cmp_o_f16_e32 vcc, v0, v1157; GFX900-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc158; GFX900-NEXT: s_setpc_b64 s[30:31]159;160; GFX950-LABEL: v_minimum_f16__nsz:161; GFX950: ; %bb.0:162; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)163; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v1, v1164; GFX950-NEXT: s_setpc_b64 s[30:31]165;166; GFX10-LABEL: v_minimum_f16__nsz:167; GFX10: ; %bb.0:168; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)169; GFX10-NEXT: v_min_f16_e32 v2, v0, v1170; GFX10-NEXT: v_cmp_o_f16_e32 vcc_lo, v0, v1171; GFX10-NEXT: v_cndmask_b32_e32 v0, 0x7e00, v2, vcc_lo172; GFX10-NEXT: s_setpc_b64 s[30:31]173;174; GFX11-TRUE16-LABEL: v_minimum_f16__nsz:175; GFX11-TRUE16: ; %bb.0:176; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)177; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v0.l, v1.l178; GFX11-TRUE16-NEXT: v_min_f16_e32 v0.l, v0.l, v1.l179; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)180; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v0.l, vcc_lo181; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]182;183; GFX11-FAKE16-LABEL: v_minimum_f16__nsz:184; GFX11-FAKE16: ; %bb.0:185; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)186; GFX11-FAKE16-NEXT: v_min_f16_e32 v2, v0, v1187; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v0, v1188; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)189; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x7e00, v2, vcc_lo190; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]191;192; GFX12-TRUE16-LABEL: v_minimum_f16__nsz:193; GFX12-TRUE16: ; %bb.0:194; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0195; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0196; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0197; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0198; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0199; GFX12-TRUE16-NEXT: v_minimum_f16 v0.l, v0.l, v1.l200; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]201;202; GFX12-FAKE16-LABEL: v_minimum_f16__nsz:203; GFX12-FAKE16: ; %bb.0:204; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0205; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0206; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0207; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0208; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0209; GFX12-FAKE16-NEXT: v_minimum_f16 v0, v0, v1210; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]211 %op = call nsz half @llvm.minimum.f16(half %src0, half %src1)212 ret half %op213}214 215define half @v_minimum_f16__nnan_nsz(half %src0, half %src1) {216; GFX8-LABEL: v_minimum_f16__nnan_nsz:217; GFX8: ; %bb.0:218; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)219; GFX8-NEXT: v_min_f16_e32 v0, v0, v1220; GFX8-NEXT: s_setpc_b64 s[30:31]221;222; GFX9-LABEL: v_minimum_f16__nnan_nsz:223; GFX9: ; %bb.0:224; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)225; GFX9-NEXT: v_min_f16_e32 v0, v0, v1226; GFX9-NEXT: s_setpc_b64 s[30:31]227;228; GFX10-LABEL: v_minimum_f16__nnan_nsz:229; GFX10: ; %bb.0:230; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)231; GFX10-NEXT: v_min_f16_e32 v0, v0, v1232; GFX10-NEXT: s_setpc_b64 s[30:31]233;234; GFX11-TRUE16-LABEL: v_minimum_f16__nnan_nsz:235; GFX11-TRUE16: ; %bb.0:236; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)237; GFX11-TRUE16-NEXT: v_min_f16_e32 v0.l, v0.l, v1.l238; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]239;240; GFX11-FAKE16-LABEL: v_minimum_f16__nnan_nsz:241; GFX11-FAKE16: ; %bb.0:242; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)243; GFX11-FAKE16-NEXT: v_min_f16_e32 v0, v0, v1244; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]245;246; GFX12-TRUE16-LABEL: v_minimum_f16__nnan_nsz:247; GFX12-TRUE16: ; %bb.0:248; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0249; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0250; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0251; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0252; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0253; GFX12-TRUE16-NEXT: v_minimum_f16 v0.l, v0.l, v1.l254; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]255;256; GFX12-FAKE16-LABEL: v_minimum_f16__nnan_nsz:257; GFX12-FAKE16: ; %bb.0:258; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0259; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0260; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0261; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0262; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0263; GFX12-FAKE16-NEXT: v_minimum_f16 v0, v0, v1264; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]265 %op = call nnan nsz half @llvm.minimum.f16(half %src0, half %src1)266 ret half %op267}268 269define half @v_minimum_f16__nnan_src0(half %arg0, half %src1) {270; GFX8-LABEL: v_minimum_f16__nnan_src0:271; GFX8: ; %bb.0:272; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)273; GFX8-NEXT: v_add_f16_e32 v0, 1.0, v0274; GFX8-NEXT: v_min_f16_e32 v2, v0, v1275; GFX8-NEXT: v_mov_b32_e32 v3, 0x7e00276; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v0, v1277; GFX8-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc278; GFX8-NEXT: s_setpc_b64 s[30:31]279;280; GFX900-LABEL: v_minimum_f16__nnan_src0:281; GFX900: ; %bb.0:282; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)283; GFX900-NEXT: v_add_f16_e32 v0, 1.0, v0284; GFX900-NEXT: v_min_f16_e32 v2, v0, v1285; GFX900-NEXT: v_mov_b32_e32 v3, 0x7e00286; GFX900-NEXT: v_cmp_o_f16_e32 vcc, v0, v1287; GFX900-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc288; GFX900-NEXT: s_setpc_b64 s[30:31]289;290; GFX950-LABEL: v_minimum_f16__nnan_src0:291; GFX950: ; %bb.0:292; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)293; GFX950-NEXT: v_add_f16_e32 v0, 1.0, v0294; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v1, v1295; GFX950-NEXT: s_setpc_b64 s[30:31]296;297; GFX10-LABEL: v_minimum_f16__nnan_src0:298; GFX10: ; %bb.0:299; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)300; GFX10-NEXT: v_add_f16_e32 v0, 1.0, v0301; GFX10-NEXT: v_min_f16_e32 v2, v0, v1302; GFX10-NEXT: v_cmp_o_f16_e32 vcc_lo, v0, v1303; GFX10-NEXT: v_cndmask_b32_e32 v0, 0x7e00, v2, vcc_lo304; GFX10-NEXT: s_setpc_b64 s[30:31]305;306; GFX11-TRUE16-LABEL: v_minimum_f16__nnan_src0:307; GFX11-TRUE16: ; %bb.0:308; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)309; GFX11-TRUE16-NEXT: v_add_f16_e32 v0.l, 1.0, v0.l310; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)311; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v0.l, v1.l312; GFX11-TRUE16-NEXT: v_min_f16_e32 v0.l, v0.l, v1.l313; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v0.l, vcc_lo314; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]315;316; GFX11-FAKE16-LABEL: v_minimum_f16__nnan_src0:317; GFX11-FAKE16: ; %bb.0:318; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)319; GFX11-FAKE16-NEXT: v_add_f16_e32 v0, 1.0, v0320; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)321; GFX11-FAKE16-NEXT: v_min_f16_e32 v2, v0, v1322; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v0, v1323; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x7e00, v2, vcc_lo324; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]325;326; GFX12-TRUE16-LABEL: v_minimum_f16__nnan_src0:327; GFX12-TRUE16: ; %bb.0:328; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0329; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0330; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0331; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0332; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0333; GFX12-TRUE16-NEXT: v_add_f16_e32 v0.l, 1.0, v0.l334; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)335; GFX12-TRUE16-NEXT: v_minimum_f16 v0.l, v0.l, v1.l336; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]337;338; GFX12-FAKE16-LABEL: v_minimum_f16__nnan_src0:339; GFX12-FAKE16: ; %bb.0:340; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0341; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0342; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0343; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0344; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0345; GFX12-FAKE16-NEXT: v_add_f16_e32 v0, 1.0, v0346; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)347; GFX12-FAKE16-NEXT: v_minimum_f16 v0, v0, v1348; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]349 %src0 = fadd nnan half %arg0, 1.0350 %op = call half @llvm.minimum.f16(half %src0, half %src1)351 ret half %op352}353 354define half @v_minimum_f16__nnan_src1(half %src0, half %arg1) {355; GFX8-LABEL: v_minimum_f16__nnan_src1:356; GFX8: ; %bb.0:357; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)358; GFX8-NEXT: v_add_f16_e32 v1, 1.0, v1359; GFX8-NEXT: v_min_f16_e32 v2, v0, v1360; GFX8-NEXT: v_mov_b32_e32 v3, 0x7e00361; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v0, v1362; GFX8-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc363; GFX8-NEXT: s_setpc_b64 s[30:31]364;365; GFX900-LABEL: v_minimum_f16__nnan_src1:366; GFX900: ; %bb.0:367; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)368; GFX900-NEXT: v_add_f16_e32 v1, 1.0, v1369; GFX900-NEXT: v_min_f16_e32 v2, v0, v1370; GFX900-NEXT: v_mov_b32_e32 v3, 0x7e00371; GFX900-NEXT: v_cmp_o_f16_e32 vcc, v0, v1372; GFX900-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc373; GFX900-NEXT: s_setpc_b64 s[30:31]374;375; GFX950-LABEL: v_minimum_f16__nnan_src1:376; GFX950: ; %bb.0:377; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)378; GFX950-NEXT: v_add_f16_e32 v1, 1.0, v1379; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v1, v1380; GFX950-NEXT: s_setpc_b64 s[30:31]381;382; GFX10-LABEL: v_minimum_f16__nnan_src1:383; GFX10: ; %bb.0:384; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)385; GFX10-NEXT: v_add_f16_e32 v1, 1.0, v1386; GFX10-NEXT: v_min_f16_e32 v2, v0, v1387; GFX10-NEXT: v_cmp_o_f16_e32 vcc_lo, v0, v1388; GFX10-NEXT: v_cndmask_b32_e32 v0, 0x7e00, v2, vcc_lo389; GFX10-NEXT: s_setpc_b64 s[30:31]390;391; GFX11-TRUE16-LABEL: v_minimum_f16__nnan_src1:392; GFX11-TRUE16: ; %bb.0:393; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)394; GFX11-TRUE16-NEXT: v_add_f16_e32 v0.h, 1.0, v1.l395; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)396; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v0.l, v0.h397; GFX11-TRUE16-NEXT: v_min_f16_e32 v0.l, v0.l, v0.h398; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v0.l, vcc_lo399; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]400;401; GFX11-FAKE16-LABEL: v_minimum_f16__nnan_src1:402; GFX11-FAKE16: ; %bb.0:403; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)404; GFX11-FAKE16-NEXT: v_add_f16_e32 v1, 1.0, v1405; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)406; GFX11-FAKE16-NEXT: v_min_f16_e32 v2, v0, v1407; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v0, v1408; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x7e00, v2, vcc_lo409; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]410;411; GFX12-TRUE16-LABEL: v_minimum_f16__nnan_src1:412; GFX12-TRUE16: ; %bb.0:413; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0414; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0415; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0416; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0417; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0418; GFX12-TRUE16-NEXT: v_add_f16_e32 v1.l, 1.0, v1.l419; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)420; GFX12-TRUE16-NEXT: v_minimum_f16 v0.l, v0.l, v1.l421; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]422;423; GFX12-FAKE16-LABEL: v_minimum_f16__nnan_src1:424; GFX12-FAKE16: ; %bb.0:425; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0426; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0427; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0428; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0429; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0430; GFX12-FAKE16-NEXT: v_add_f16_e32 v1, 1.0, v1431; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)432; GFX12-FAKE16-NEXT: v_minimum_f16 v0, v0, v1433; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]434 %src1 = fadd nnan half %arg1, 1.0435 %op = call half @llvm.minimum.f16(half %src0, half %src1)436 ret half %op437}438 439define void @s_minimum_f16(half inreg %src0, half inreg %src1) {440; GFX8-LABEL: s_minimum_f16:441; GFX8: ; %bb.0:442; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)443; GFX8-NEXT: v_mov_b32_e32 v0, s17444; GFX8-NEXT: v_min_f16_e32 v1, s16, v0445; GFX8-NEXT: v_mov_b32_e32 v2, 0x7e00446; GFX8-NEXT: v_cmp_o_f16_e32 vcc, s16, v0447; GFX8-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc448; GFX8-NEXT: v_and_b32_e32 v0, 0xffff, v0449; GFX8-NEXT: ;;#ASMSTART450; GFX8-NEXT: ; use v0451; GFX8-NEXT: ;;#ASMEND452; GFX8-NEXT: s_setpc_b64 s[30:31]453;454; GFX900-LABEL: s_minimum_f16:455; GFX900: ; %bb.0:456; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)457; GFX900-NEXT: v_mov_b32_e32 v0, s17458; GFX900-NEXT: v_min_f16_e32 v1, s16, v0459; GFX900-NEXT: v_mov_b32_e32 v2, 0x7e00460; GFX900-NEXT: v_cmp_o_f16_e32 vcc, s16, v0461; GFX900-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc462; GFX900-NEXT: v_and_b32_e32 v0, 0xffff, v0463; GFX900-NEXT: ;;#ASMSTART464; GFX900-NEXT: ; use v0465; GFX900-NEXT: ;;#ASMEND466; GFX900-NEXT: s_setpc_b64 s[30:31]467;468; GFX950-LABEL: s_minimum_f16:469; GFX950: ; %bb.0:470; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)471; GFX950-NEXT: v_mov_b32_e32 v0, s0472; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, s1, s1473; GFX950-NEXT: s_nop 0474; GFX950-NEXT: v_and_b32_e32 v0, 0xffff, v0475; GFX950-NEXT: ;;#ASMSTART476; GFX950-NEXT: ; use v0477; GFX950-NEXT: ;;#ASMEND478; GFX950-NEXT: s_setpc_b64 s[30:31]479;480; GFX10-LABEL: s_minimum_f16:481; GFX10: ; %bb.0:482; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)483; GFX10-NEXT: v_min_f16_e64 v0, s16, s17484; GFX10-NEXT: v_cmp_o_f16_e64 vcc_lo, s16, s17485; GFX10-NEXT: v_cndmask_b32_e32 v0, 0x7e00, v0, vcc_lo486; GFX10-NEXT: v_and_b32_e32 v0, 0xffff, v0487; GFX10-NEXT: ;;#ASMSTART488; GFX10-NEXT: ; use v0489; GFX10-NEXT: ;;#ASMEND490; GFX10-NEXT: s_setpc_b64 s[30:31]491;492; GFX11-TRUE16-LABEL: s_minimum_f16:493; GFX11-TRUE16: ; %bb.0:494; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)495; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s2, s0, s1496; GFX11-TRUE16-NEXT: v_min_f16_e64 v0.l, s0, s1497; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)498; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v0.l, s2499; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v0500; GFX11-TRUE16-NEXT: ;;#ASMSTART501; GFX11-TRUE16-NEXT: ; use v0502; GFX11-TRUE16-NEXT: ;;#ASMEND503; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]504;505; GFX11-FAKE16-LABEL: s_minimum_f16:506; GFX11-FAKE16: ; %bb.0:507; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)508; GFX11-FAKE16-NEXT: v_min_f16_e64 v0, s0, s1509; GFX11-FAKE16-NEXT: v_cmp_o_f16_e64 vcc_lo, s0, s1510; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)511; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x7e00, v0, vcc_lo512; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0513; GFX11-FAKE16-NEXT: ;;#ASMSTART514; GFX11-FAKE16-NEXT: ; use v0515; GFX11-FAKE16-NEXT: ;;#ASMEND516; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]517;518; GFX12-LABEL: s_minimum_f16:519; GFX12: ; %bb.0:520; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0521; GFX12-NEXT: s_wait_expcnt 0x0522; GFX12-NEXT: s_wait_samplecnt 0x0523; GFX12-NEXT: s_wait_bvhcnt 0x0524; GFX12-NEXT: s_wait_kmcnt 0x0525; GFX12-NEXT: s_minimum_f16 s0, s0, s1526; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)527; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_2)528; GFX12-NEXT: s_and_b32 s0, 0xffff, s0529; GFX12-NEXT: ;;#ASMSTART530; GFX12-NEXT: ; use s0531; GFX12-NEXT: ;;#ASMEND532; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)533; GFX12-NEXT: s_setpc_b64 s[30:31]534 %op = call half @llvm.minimum.f16(half %src0, half %src1)535 %cast = bitcast half %op to i16536 %zext = zext i16 %cast to i32537 call void asm sideeffect "; use $0", "s"(i32 %zext)538 ret void539}540 541define <2 x half> @v_minimum_v2f16(<2 x half> %src0, <2 x half> %src1) {542; GFX8-LABEL: v_minimum_v2f16:543; GFX8: ; %bb.0:544; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)545; GFX8-NEXT: v_lshrrev_b32_e32 v2, 16, v1546; GFX8-NEXT: v_lshrrev_b32_e32 v3, 16, v0547; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v3, v2548; GFX8-NEXT: v_min_f16_e32 v2, v3, v2549; GFX8-NEXT: v_mov_b32_e32 v3, 0x7e00550; GFX8-NEXT: v_cndmask_b32_sdwa v2, v3, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD551; GFX8-NEXT: v_min_f16_e32 v4, v0, v1552; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v0, v1553; GFX8-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc554; GFX8-NEXT: v_or_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD555; GFX8-NEXT: s_setpc_b64 s[30:31]556;557; GFX900-LABEL: v_minimum_v2f16:558; GFX900: ; %bb.0:559; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)560; GFX900-NEXT: v_pk_min_f16 v2, v0, v1561; GFX900-NEXT: v_mov_b32_e32 v3, 0x7e00562; GFX900-NEXT: v_cmp_o_f16_e32 vcc, v0, v1563; GFX900-NEXT: v_cndmask_b32_e32 v4, v3, v2, vcc564; GFX900-NEXT: v_cmp_o_f16_sdwa vcc, v0, v1 src0_sel:WORD_1 src1_sel:WORD_1565; GFX900-NEXT: v_cndmask_b32_sdwa v0, v3, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1566; GFX900-NEXT: s_mov_b32 s4, 0x5040100567; GFX900-NEXT: v_perm_b32 v0, v0, v4, s4568; GFX900-NEXT: s_setpc_b64 s[30:31]569;570; GFX950-LABEL: v_minimum_v2f16:571; GFX950: ; %bb.0:572; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)573; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v1, v1574; GFX950-NEXT: s_setpc_b64 s[30:31]575;576; GFX10-LABEL: v_minimum_v2f16:577; GFX10: ; %bb.0:578; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)579; GFX10-NEXT: v_pk_min_f16 v2, v0, v1580; GFX10-NEXT: v_cmp_o_f16_sdwa vcc_lo, v0, v1 src0_sel:WORD_1 src1_sel:WORD_1581; GFX10-NEXT: v_mov_b32_e32 v3, 0x7e00582; GFX10-NEXT: v_cmp_o_f16_e64 s4, v0, v1583; GFX10-NEXT: v_cndmask_b32_sdwa v1, v3, v2, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1584; GFX10-NEXT: v_cndmask_b32_e64 v0, 0x7e00, v2, s4585; GFX10-NEXT: v_perm_b32 v0, v1, v0, 0x5040100586; GFX10-NEXT: s_setpc_b64 s[30:31]587;588; GFX11-TRUE16-LABEL: v_minimum_v2f16:589; GFX11-TRUE16: ; %bb.0:590; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)591; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v0.l, v1.l592; GFX11-TRUE16-NEXT: v_pk_min_f16 v2, v0, v1593; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v0.h, v1.h594; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)595; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v2.l, vcc_lo596; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v2.h, s0597; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]598;599; GFX11-FAKE16-LABEL: v_minimum_v2f16:600; GFX11-FAKE16: ; %bb.0:601; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)602; GFX11-FAKE16-NEXT: v_pk_min_f16 v2, v0, v1603; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1604; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0605; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v0, v1606; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)607; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v2608; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x7e00, v2, vcc_lo609; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v4, v3610; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)611; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x7e00, v5, vcc_lo612; GFX11-FAKE16-NEXT: v_perm_b32 v0, v1, v0, 0x5040100613; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]614;615; GFX12-LABEL: v_minimum_v2f16:616; GFX12: ; %bb.0:617; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0618; GFX12-NEXT: s_wait_expcnt 0x0619; GFX12-NEXT: s_wait_samplecnt 0x0620; GFX12-NEXT: s_wait_bvhcnt 0x0621; GFX12-NEXT: s_wait_kmcnt 0x0622; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v1623; GFX12-NEXT: s_setpc_b64 s[30:31]624 %op = call <2 x half> @llvm.minimum.v2f16(<2 x half> %src0, <2 x half> %src1)625 ret <2 x half> %op626}627 628define <2 x half> @v_minimum_v2f16__nnan(<2 x half> %src0, <2 x half> %src1) {629; GFX8-LABEL: v_minimum_v2f16__nnan:630; GFX8: ; %bb.0:631; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)632; GFX8-NEXT: v_min_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1633; GFX8-NEXT: v_min_f16_e32 v0, v0, v1634; GFX8-NEXT: v_or_b32_e32 v0, v0, v2635; GFX8-NEXT: s_setpc_b64 s[30:31]636;637; GFX9-LABEL: v_minimum_v2f16__nnan:638; GFX9: ; %bb.0:639; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)640; GFX9-NEXT: v_pk_min_f16 v0, v0, v1641; GFX9-NEXT: s_setpc_b64 s[30:31]642;643; GFX10-LABEL: v_minimum_v2f16__nnan:644; GFX10: ; %bb.0:645; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)646; GFX10-NEXT: v_pk_min_f16 v0, v0, v1647; GFX10-NEXT: s_setpc_b64 s[30:31]648;649; GFX11-LABEL: v_minimum_v2f16__nnan:650; GFX11: ; %bb.0:651; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)652; GFX11-NEXT: v_pk_min_f16 v0, v0, v1653; GFX11-NEXT: s_setpc_b64 s[30:31]654;655; GFX12-LABEL: v_minimum_v2f16__nnan:656; GFX12: ; %bb.0:657; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0658; GFX12-NEXT: s_wait_expcnt 0x0659; GFX12-NEXT: s_wait_samplecnt 0x0660; GFX12-NEXT: s_wait_bvhcnt 0x0661; GFX12-NEXT: s_wait_kmcnt 0x0662; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v1663; GFX12-NEXT: s_setpc_b64 s[30:31]664 %op = call nnan <2 x half> @llvm.minimum.v2f16(<2 x half> %src0, <2 x half> %src1)665 ret <2 x half> %op666}667 668define <2 x half> @v_minimum_v2f16__nsz(<2 x half> %src0, <2 x half> %src1) {669; GFX8-LABEL: v_minimum_v2f16__nsz:670; GFX8: ; %bb.0:671; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)672; GFX8-NEXT: v_lshrrev_b32_e32 v2, 16, v1673; GFX8-NEXT: v_lshrrev_b32_e32 v3, 16, v0674; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v3, v2675; GFX8-NEXT: v_min_f16_e32 v2, v3, v2676; GFX8-NEXT: v_mov_b32_e32 v3, 0x7e00677; GFX8-NEXT: v_cndmask_b32_sdwa v2, v3, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD678; GFX8-NEXT: v_min_f16_e32 v4, v0, v1679; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v0, v1680; GFX8-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc681; GFX8-NEXT: v_or_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD682; GFX8-NEXT: s_setpc_b64 s[30:31]683;684; GFX900-LABEL: v_minimum_v2f16__nsz:685; GFX900: ; %bb.0:686; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)687; GFX900-NEXT: v_pk_min_f16 v2, v0, v1688; GFX900-NEXT: v_mov_b32_e32 v3, 0x7e00689; GFX900-NEXT: v_cmp_o_f16_e32 vcc, v0, v1690; GFX900-NEXT: v_cndmask_b32_e32 v4, v3, v2, vcc691; GFX900-NEXT: v_cmp_o_f16_sdwa vcc, v0, v1 src0_sel:WORD_1 src1_sel:WORD_1692; GFX900-NEXT: v_cndmask_b32_sdwa v0, v3, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1693; GFX900-NEXT: s_mov_b32 s4, 0x5040100694; GFX900-NEXT: v_perm_b32 v0, v0, v4, s4695; GFX900-NEXT: s_setpc_b64 s[30:31]696;697; GFX950-LABEL: v_minimum_v2f16__nsz:698; GFX950: ; %bb.0:699; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)700; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v1, v1701; GFX950-NEXT: s_setpc_b64 s[30:31]702;703; GFX10-LABEL: v_minimum_v2f16__nsz:704; GFX10: ; %bb.0:705; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)706; GFX10-NEXT: v_pk_min_f16 v2, v0, v1707; GFX10-NEXT: v_cmp_o_f16_sdwa vcc_lo, v0, v1 src0_sel:WORD_1 src1_sel:WORD_1708; GFX10-NEXT: v_mov_b32_e32 v3, 0x7e00709; GFX10-NEXT: v_cmp_o_f16_e64 s4, v0, v1710; GFX10-NEXT: v_cndmask_b32_sdwa v1, v3, v2, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1711; GFX10-NEXT: v_cndmask_b32_e64 v0, 0x7e00, v2, s4712; GFX10-NEXT: v_perm_b32 v0, v1, v0, 0x5040100713; GFX10-NEXT: s_setpc_b64 s[30:31]714;715; GFX11-TRUE16-LABEL: v_minimum_v2f16__nsz:716; GFX11-TRUE16: ; %bb.0:717; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)718; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v0.l, v1.l719; GFX11-TRUE16-NEXT: v_pk_min_f16 v2, v0, v1720; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v0.h, v1.h721; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)722; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v2.l, vcc_lo723; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v2.h, s0724; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]725;726; GFX11-FAKE16-LABEL: v_minimum_v2f16__nsz:727; GFX11-FAKE16: ; %bb.0:728; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)729; GFX11-FAKE16-NEXT: v_pk_min_f16 v2, v0, v1730; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1731; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0732; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v0, v1733; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)734; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v2735; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x7e00, v2, vcc_lo736; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v4, v3737; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)738; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x7e00, v5, vcc_lo739; GFX11-FAKE16-NEXT: v_perm_b32 v0, v1, v0, 0x5040100740; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]741;742; GFX12-LABEL: v_minimum_v2f16__nsz:743; GFX12: ; %bb.0:744; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0745; GFX12-NEXT: s_wait_expcnt 0x0746; GFX12-NEXT: s_wait_samplecnt 0x0747; GFX12-NEXT: s_wait_bvhcnt 0x0748; GFX12-NEXT: s_wait_kmcnt 0x0749; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v1750; GFX12-NEXT: s_setpc_b64 s[30:31]751 %op = call nsz <2 x half> @llvm.minimum.v2f16(<2 x half> %src0, <2 x half> %src1)752 ret <2 x half> %op753}754 755define <2 x half> @v_minimum_v2f16__nnan_nsz(<2 x half> %src0, <2 x half> %src1) {756; GFX8-LABEL: v_minimum_v2f16__nnan_nsz:757; GFX8: ; %bb.0:758; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)759; GFX8-NEXT: v_min_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1760; GFX8-NEXT: v_min_f16_e32 v0, v0, v1761; GFX8-NEXT: v_or_b32_e32 v0, v0, v2762; GFX8-NEXT: s_setpc_b64 s[30:31]763;764; GFX9-LABEL: v_minimum_v2f16__nnan_nsz:765; GFX9: ; %bb.0:766; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)767; GFX9-NEXT: v_pk_min_f16 v0, v0, v1768; GFX9-NEXT: s_setpc_b64 s[30:31]769;770; GFX10-LABEL: v_minimum_v2f16__nnan_nsz:771; GFX10: ; %bb.0:772; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)773; GFX10-NEXT: v_pk_min_f16 v0, v0, v1774; GFX10-NEXT: s_setpc_b64 s[30:31]775;776; GFX11-LABEL: v_minimum_v2f16__nnan_nsz:777; GFX11: ; %bb.0:778; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)779; GFX11-NEXT: v_pk_min_f16 v0, v0, v1780; GFX11-NEXT: s_setpc_b64 s[30:31]781;782; GFX12-LABEL: v_minimum_v2f16__nnan_nsz:783; GFX12: ; %bb.0:784; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0785; GFX12-NEXT: s_wait_expcnt 0x0786; GFX12-NEXT: s_wait_samplecnt 0x0787; GFX12-NEXT: s_wait_bvhcnt 0x0788; GFX12-NEXT: s_wait_kmcnt 0x0789; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v1790; GFX12-NEXT: s_setpc_b64 s[30:31]791 %op = call nnan nsz <2 x half> @llvm.minimum.v2f16(<2 x half> %src0, <2 x half> %src1)792 ret <2 x half> %op793}794 795define void @s_minimum_v2f16(<2 x half> inreg %src0, <2 x half> inreg %src1) {796; GFX8-LABEL: s_minimum_v2f16:797; GFX8: ; %bb.0:798; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)799; GFX8-NEXT: s_lshr_b32 s4, s17, 16800; GFX8-NEXT: s_lshr_b32 s5, s16, 16801; GFX8-NEXT: v_mov_b32_e32 v0, s4802; GFX8-NEXT: v_cmp_o_f16_e32 vcc, s5, v0803; GFX8-NEXT: v_min_f16_e32 v0, s5, v0804; GFX8-NEXT: v_mov_b32_e32 v1, 0x7e00805; GFX8-NEXT: v_mov_b32_e32 v2, s17806; GFX8-NEXT: v_cndmask_b32_sdwa v0, v1, v0, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD807; GFX8-NEXT: v_min_f16_e32 v3, s16, v2808; GFX8-NEXT: v_cmp_o_f16_e32 vcc, s16, v2809; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc810; GFX8-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD811; GFX8-NEXT: ;;#ASMSTART812; GFX8-NEXT: ; use v0813; GFX8-NEXT: ;;#ASMEND814; GFX8-NEXT: s_setpc_b64 s[30:31]815;816; GFX900-LABEL: s_minimum_v2f16:817; GFX900: ; %bb.0:818; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)819; GFX900-NEXT: v_mov_b32_e32 v0, s17820; GFX900-NEXT: v_mov_b32_e32 v1, s17821; GFX900-NEXT: s_lshr_b32 s4, s17, 16822; GFX900-NEXT: v_pk_min_f16 v1, s16, v1823; GFX900-NEXT: v_mov_b32_e32 v2, 0x7e00824; GFX900-NEXT: v_cmp_o_f16_e32 vcc, s16, v0825; GFX900-NEXT: s_lshr_b32 s5, s16, 16826; GFX900-NEXT: v_mov_b32_e32 v3, s4827; GFX900-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc828; GFX900-NEXT: v_cmp_o_f16_e32 vcc, s5, v3829; GFX900-NEXT: v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1830; GFX900-NEXT: v_and_b32_e32 v0, 0xffff, v0831; GFX900-NEXT: v_lshl_or_b32 v0, v1, 16, v0832; GFX900-NEXT: ;;#ASMSTART833; GFX900-NEXT: ; use v0834; GFX900-NEXT: ;;#ASMEND835; GFX900-NEXT: s_setpc_b64 s[30:31]836;837; GFX950-LABEL: s_minimum_v2f16:838; GFX950: ; %bb.0:839; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)840; GFX950-NEXT: v_mov_b32_e32 v0, s0841; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, s1, s1842; GFX950-NEXT: s_nop 0843; GFX950-NEXT: ;;#ASMSTART844; GFX950-NEXT: ; use v0845; GFX950-NEXT: ;;#ASMEND846; GFX950-NEXT: s_setpc_b64 s[30:31]847;848; GFX10-LABEL: s_minimum_v2f16:849; GFX10: ; %bb.0:850; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)851; GFX10-NEXT: s_lshr_b32 s4, s17, 16852; GFX10-NEXT: s_lshr_b32 s5, s16, 16853; GFX10-NEXT: v_pk_min_f16 v0, s16, s17854; GFX10-NEXT: v_cmp_o_f16_e64 vcc_lo, s5, s4855; GFX10-NEXT: v_cmp_o_f16_e64 s4, s16, s17856; GFX10-NEXT: v_mov_b32_e32 v1, 0x7e00857; GFX10-NEXT: v_cndmask_b32_e64 v2, 0x7e00, v0, s4858; GFX10-NEXT: v_cndmask_b32_sdwa v0, v1, v0, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1859; GFX10-NEXT: v_and_b32_e32 v1, 0xffff, v2860; GFX10-NEXT: v_lshl_or_b32 v0, v0, 16, v1861; GFX10-NEXT: ;;#ASMSTART862; GFX10-NEXT: ; use v0863; GFX10-NEXT: ;;#ASMEND864; GFX10-NEXT: s_setpc_b64 s[30:31]865;866; GFX11-TRUE16-LABEL: s_minimum_v2f16:867; GFX11-TRUE16: ; %bb.0:868; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)869; GFX11-TRUE16-NEXT: v_pk_min_f16 v0, s0, s1870; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s1, 16871; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s0, 16872; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, s0, s1873; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, s3, s2874; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0875; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)876; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v0.l, s0877; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v1.l, s1878; GFX11-TRUE16-NEXT: ;;#ASMSTART879; GFX11-TRUE16-NEXT: ; use v0880; GFX11-TRUE16-NEXT: ;;#ASMEND881; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]882;883; GFX11-FAKE16-LABEL: s_minimum_v2f16:884; GFX11-FAKE16: ; %bb.0:885; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)886; GFX11-FAKE16-NEXT: v_pk_min_f16 v0, s0, s1887; GFX11-FAKE16-NEXT: v_cmp_o_f16_e64 vcc_lo, s0, s1888; GFX11-FAKE16-NEXT: s_lshr_b32 s2, s1, 16889; GFX11-FAKE16-NEXT: s_lshr_b32 s0, s0, 16890; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0891; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x7e00, v0, vcc_lo892; GFX11-FAKE16-NEXT: v_cmp_o_f16_e64 vcc_lo, s0, s2893; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)894; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0895; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x7e00, v1, vcc_lo896; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)897; GFX11-FAKE16-NEXT: v_lshl_or_b32 v0, v1, 16, v0898; GFX11-FAKE16-NEXT: ;;#ASMSTART899; GFX11-FAKE16-NEXT: ; use v0900; GFX11-FAKE16-NEXT: ;;#ASMEND901; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]902;903; GFX12-LABEL: s_minimum_v2f16:904; GFX12: ; %bb.0:905; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0906; GFX12-NEXT: s_wait_expcnt 0x0907; GFX12-NEXT: s_wait_samplecnt 0x0908; GFX12-NEXT: s_wait_bvhcnt 0x0909; GFX12-NEXT: s_wait_kmcnt 0x0910; GFX12-NEXT: v_pk_minimum_f16 v0, s0, s1911; GFX12-NEXT: ;;#ASMSTART912; GFX12-NEXT: ; use v0913; GFX12-NEXT: ;;#ASMEND914; GFX12-NEXT: s_setpc_b64 s[30:31]915 %op = call <2 x half> @llvm.minimum.v2f16(<2 x half> %src0, <2 x half> %src1)916 %cast = bitcast <2 x half> %op to i32917 call void asm sideeffect "; use $0", "s"(i32 %cast)918 ret void919}920 921define <3 x half> @v_minimum_v3f16(<3 x half> %src0, <3 x half> %src1) {922; GFX8-LABEL: v_minimum_v3f16:923; GFX8: ; %bb.0:924; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)925; GFX8-NEXT: v_lshrrev_b32_e32 v4, 16, v2926; GFX8-NEXT: v_lshrrev_b32_e32 v5, 16, v0927; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v5, v4928; GFX8-NEXT: v_min_f16_e32 v4, v5, v4929; GFX8-NEXT: v_mov_b32_e32 v5, 0x7e00930; GFX8-NEXT: v_cndmask_b32_sdwa v4, v5, v4, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD931; GFX8-NEXT: v_min_f16_e32 v6, v1, v3932; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v1, v3933; GFX8-NEXT: v_cndmask_b32_e32 v1, v5, v6, vcc934; GFX8-NEXT: v_min_f16_e32 v3, v0, v2935; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v0, v2936; GFX8-NEXT: v_cndmask_b32_e32 v0, v5, v3, vcc937; GFX8-NEXT: v_or_b32_sdwa v0, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD938; GFX8-NEXT: s_setpc_b64 s[30:31]939;940; GFX900-LABEL: v_minimum_v3f16:941; GFX900: ; %bb.0:942; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)943; GFX900-NEXT: v_pk_min_f16 v4, v1, v3944; GFX900-NEXT: v_mov_b32_e32 v5, 0x7e00945; GFX900-NEXT: v_cmp_o_f16_e32 vcc, v1, v3946; GFX900-NEXT: v_cndmask_b32_e32 v1, v5, v4, vcc947; GFX900-NEXT: v_pk_min_f16 v3, v0, v2948; GFX900-NEXT: v_cmp_o_f16_e32 vcc, v0, v2949; GFX900-NEXT: v_cndmask_b32_e32 v4, v5, v3, vcc950; GFX900-NEXT: v_cmp_o_f16_sdwa vcc, v0, v2 src0_sel:WORD_1 src1_sel:WORD_1951; GFX900-NEXT: v_cndmask_b32_sdwa v0, v5, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1952; GFX900-NEXT: s_mov_b32 s4, 0x5040100953; GFX900-NEXT: v_perm_b32 v0, v0, v4, s4954; GFX900-NEXT: s_setpc_b64 s[30:31]955;956; GFX950-LABEL: v_minimum_v3f16:957; GFX950: ; %bb.0:958; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)959; GFX950-NEXT: v_pk_minimum3_f16 v1, v1, v3, v3960; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v2, v2961; GFX950-NEXT: s_setpc_b64 s[30:31]962;963; GFX10-LABEL: v_minimum_v3f16:964; GFX10: ; %bb.0:965; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)966; GFX10-NEXT: v_pk_min_f16 v4, v0, v2967; GFX10-NEXT: v_cmp_o_f16_sdwa vcc_lo, v0, v2 src0_sel:WORD_1 src1_sel:WORD_1968; GFX10-NEXT: v_mov_b32_e32 v5, 0x7e00969; GFX10-NEXT: v_cmp_o_f16_e64 s4, v0, v2970; GFX10-NEXT: v_cndmask_b32_sdwa v2, v5, v4, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1971; GFX10-NEXT: v_cndmask_b32_e64 v0, 0x7e00, v4, s4972; GFX10-NEXT: v_pk_min_f16 v4, v1, v3973; GFX10-NEXT: v_cmp_o_f16_e32 vcc_lo, v1, v3974; GFX10-NEXT: v_perm_b32 v0, v2, v0, 0x5040100975; GFX10-NEXT: v_cndmask_b32_e32 v1, 0x7e00, v4, vcc_lo976; GFX10-NEXT: s_setpc_b64 s[30:31]977;978; GFX11-TRUE16-LABEL: v_minimum_v3f16:979; GFX11-TRUE16: ; %bb.0:980; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)981; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v1.l, v3.l982; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v0.l, v2.l983; GFX11-TRUE16-NEXT: v_pk_min_f16 v4, v0, v2984; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v0.h, v2.h985; GFX11-TRUE16-NEXT: v_pk_min_f16 v1, v1, v3986; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)987; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v4.l, s0988; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v4.h, s1989; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)990; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v1.l, vcc_lo991; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]992;993; GFX11-FAKE16-LABEL: v_minimum_v3f16:994; GFX11-FAKE16: ; %bb.0:995; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)996; GFX11-FAKE16-NEXT: v_pk_min_f16 v4, v0, v2997; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v2998; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v0999; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v0, v21000; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)1001; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v41002; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x7e00, v4, vcc_lo1003; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v6, v51004; GFX11-FAKE16-NEXT: v_pk_min_f16 v4, v1, v31005; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)1006; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, 0x7e00, v7, vcc_lo1007; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v1, v31008; GFX11-FAKE16-NEXT: v_perm_b32 v0, v2, v0, 0x50401001009; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)1010; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x7e00, v4, vcc_lo1011; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]1012;1013; GFX12-LABEL: v_minimum_v3f16:1014; GFX12: ; %bb.0:1015; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01016; GFX12-NEXT: s_wait_expcnt 0x01017; GFX12-NEXT: s_wait_samplecnt 0x01018; GFX12-NEXT: s_wait_bvhcnt 0x01019; GFX12-NEXT: s_wait_kmcnt 0x01020; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v21021; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v31022; GFX12-NEXT: s_setpc_b64 s[30:31]1023 %op = call <3 x half> @llvm.minimum.v3f16(<3 x half> %src0, <3 x half> %src1)1024 ret <3 x half> %op1025}1026 1027define <3 x half> @v_minimum_v3f16__nnan(<3 x half> %src0, <3 x half> %src1) {1028; GFX8-LABEL: v_minimum_v3f16__nnan:1029; GFX8: ; %bb.0:1030; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1031; GFX8-NEXT: v_min_f16_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11032; GFX8-NEXT: v_min_f16_e32 v0, v0, v21033; GFX8-NEXT: v_min_f16_e32 v1, v1, v31034; GFX8-NEXT: v_or_b32_e32 v0, v0, v41035; GFX8-NEXT: s_setpc_b64 s[30:31]1036;1037; GFX9-LABEL: v_minimum_v3f16__nnan:1038; GFX9: ; %bb.0:1039; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1040; GFX9-NEXT: v_pk_min_f16 v1, v1, v31041; GFX9-NEXT: v_pk_min_f16 v0, v0, v21042; GFX9-NEXT: s_setpc_b64 s[30:31]1043;1044; GFX10-LABEL: v_minimum_v3f16__nnan:1045; GFX10: ; %bb.0:1046; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1047; GFX10-NEXT: v_pk_min_f16 v0, v0, v21048; GFX10-NEXT: v_pk_min_f16 v1, v1, v31049; GFX10-NEXT: s_setpc_b64 s[30:31]1050;1051; GFX11-LABEL: v_minimum_v3f16__nnan:1052; GFX11: ; %bb.0:1053; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1054; GFX11-NEXT: v_pk_min_f16 v0, v0, v21055; GFX11-NEXT: v_pk_min_f16 v1, v1, v31056; GFX11-NEXT: s_setpc_b64 s[30:31]1057;1058; GFX12-LABEL: v_minimum_v3f16__nnan:1059; GFX12: ; %bb.0:1060; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01061; GFX12-NEXT: s_wait_expcnt 0x01062; GFX12-NEXT: s_wait_samplecnt 0x01063; GFX12-NEXT: s_wait_bvhcnt 0x01064; GFX12-NEXT: s_wait_kmcnt 0x01065; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v21066; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v31067; GFX12-NEXT: s_setpc_b64 s[30:31]1068 %op = call nnan <3 x half> @llvm.minimum.v3f16(<3 x half> %src0, <3 x half> %src1)1069 ret <3 x half> %op1070}1071 1072define <3 x half> @v_minimum_v3f16__nsz(<3 x half> %src0, <3 x half> %src1) {1073; GFX8-LABEL: v_minimum_v3f16__nsz:1074; GFX8: ; %bb.0:1075; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1076; GFX8-NEXT: v_lshrrev_b32_e32 v4, 16, v21077; GFX8-NEXT: v_lshrrev_b32_e32 v5, 16, v01078; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v5, v41079; GFX8-NEXT: v_min_f16_e32 v4, v5, v41080; GFX8-NEXT: v_mov_b32_e32 v5, 0x7e001081; GFX8-NEXT: v_cndmask_b32_sdwa v4, v5, v4, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD1082; GFX8-NEXT: v_min_f16_e32 v6, v1, v31083; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v1, v31084; GFX8-NEXT: v_cndmask_b32_e32 v1, v5, v6, vcc1085; GFX8-NEXT: v_min_f16_e32 v3, v0, v21086; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v0, v21087; GFX8-NEXT: v_cndmask_b32_e32 v0, v5, v3, vcc1088; GFX8-NEXT: v_or_b32_sdwa v0, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1089; GFX8-NEXT: s_setpc_b64 s[30:31]1090;1091; GFX900-LABEL: v_minimum_v3f16__nsz:1092; GFX900: ; %bb.0:1093; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1094; GFX900-NEXT: v_pk_min_f16 v4, v1, v31095; GFX900-NEXT: v_mov_b32_e32 v5, 0x7e001096; GFX900-NEXT: v_cmp_o_f16_e32 vcc, v1, v31097; GFX900-NEXT: v_cndmask_b32_e32 v1, v5, v4, vcc1098; GFX900-NEXT: v_pk_min_f16 v3, v0, v21099; GFX900-NEXT: v_cmp_o_f16_e32 vcc, v0, v21100; GFX900-NEXT: v_cndmask_b32_e32 v4, v5, v3, vcc1101; GFX900-NEXT: v_cmp_o_f16_sdwa vcc, v0, v2 src0_sel:WORD_1 src1_sel:WORD_11102; GFX900-NEXT: v_cndmask_b32_sdwa v0, v5, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11103; GFX900-NEXT: s_mov_b32 s4, 0x50401001104; GFX900-NEXT: v_perm_b32 v0, v0, v4, s41105; GFX900-NEXT: s_setpc_b64 s[30:31]1106;1107; GFX950-LABEL: v_minimum_v3f16__nsz:1108; GFX950: ; %bb.0:1109; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1110; GFX950-NEXT: v_pk_minimum3_f16 v1, v1, v3, v31111; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v2, v21112; GFX950-NEXT: s_setpc_b64 s[30:31]1113;1114; GFX10-LABEL: v_minimum_v3f16__nsz:1115; GFX10: ; %bb.0:1116; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1117; GFX10-NEXT: v_pk_min_f16 v4, v0, v21118; GFX10-NEXT: v_cmp_o_f16_sdwa vcc_lo, v0, v2 src0_sel:WORD_1 src1_sel:WORD_11119; GFX10-NEXT: v_mov_b32_e32 v5, 0x7e001120; GFX10-NEXT: v_cmp_o_f16_e64 s4, v0, v21121; GFX10-NEXT: v_cndmask_b32_sdwa v2, v5, v4, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11122; GFX10-NEXT: v_cndmask_b32_e64 v0, 0x7e00, v4, s41123; GFX10-NEXT: v_pk_min_f16 v4, v1, v31124; GFX10-NEXT: v_cmp_o_f16_e32 vcc_lo, v1, v31125; GFX10-NEXT: v_perm_b32 v0, v2, v0, 0x50401001126; GFX10-NEXT: v_cndmask_b32_e32 v1, 0x7e00, v4, vcc_lo1127; GFX10-NEXT: s_setpc_b64 s[30:31]1128;1129; GFX11-TRUE16-LABEL: v_minimum_v3f16__nsz:1130; GFX11-TRUE16: ; %bb.0:1131; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1132; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v1.l, v3.l1133; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v0.l, v2.l1134; GFX11-TRUE16-NEXT: v_pk_min_f16 v4, v0, v21135; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v0.h, v2.h1136; GFX11-TRUE16-NEXT: v_pk_min_f16 v1, v1, v31137; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)1138; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v4.l, s01139; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v4.h, s11140; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)1141; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v1.l, vcc_lo1142; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]1143;1144; GFX11-FAKE16-LABEL: v_minimum_v3f16__nsz:1145; GFX11-FAKE16: ; %bb.0:1146; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1147; GFX11-FAKE16-NEXT: v_pk_min_f16 v4, v0, v21148; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v21149; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v01150; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v0, v21151; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)1152; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v41153; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x7e00, v4, vcc_lo1154; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v6, v51155; GFX11-FAKE16-NEXT: v_pk_min_f16 v4, v1, v31156; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)1157; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, 0x7e00, v7, vcc_lo1158; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v1, v31159; GFX11-FAKE16-NEXT: v_perm_b32 v0, v2, v0, 0x50401001160; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)1161; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x7e00, v4, vcc_lo1162; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]1163;1164; GFX12-LABEL: v_minimum_v3f16__nsz:1165; GFX12: ; %bb.0:1166; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01167; GFX12-NEXT: s_wait_expcnt 0x01168; GFX12-NEXT: s_wait_samplecnt 0x01169; GFX12-NEXT: s_wait_bvhcnt 0x01170; GFX12-NEXT: s_wait_kmcnt 0x01171; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v21172; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v31173; GFX12-NEXT: s_setpc_b64 s[30:31]1174 %op = call nsz <3 x half> @llvm.minimum.v3f16(<3 x half> %src0, <3 x half> %src1)1175 ret <3 x half> %op1176}1177 1178define <3 x half> @v_minimum_v3f16__nnan_nsz(<3 x half> %src0, <3 x half> %src1) {1179; GFX8-LABEL: v_minimum_v3f16__nnan_nsz:1180; GFX8: ; %bb.0:1181; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1182; GFX8-NEXT: v_min_f16_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11183; GFX8-NEXT: v_min_f16_e32 v0, v0, v21184; GFX8-NEXT: v_min_f16_e32 v1, v1, v31185; GFX8-NEXT: v_or_b32_e32 v0, v0, v41186; GFX8-NEXT: s_setpc_b64 s[30:31]1187;1188; GFX9-LABEL: v_minimum_v3f16__nnan_nsz:1189; GFX9: ; %bb.0:1190; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1191; GFX9-NEXT: v_pk_min_f16 v1, v1, v31192; GFX9-NEXT: v_pk_min_f16 v0, v0, v21193; GFX9-NEXT: s_setpc_b64 s[30:31]1194;1195; GFX10-LABEL: v_minimum_v3f16__nnan_nsz:1196; GFX10: ; %bb.0:1197; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1198; GFX10-NEXT: v_pk_min_f16 v0, v0, v21199; GFX10-NEXT: v_pk_min_f16 v1, v1, v31200; GFX10-NEXT: s_setpc_b64 s[30:31]1201;1202; GFX11-LABEL: v_minimum_v3f16__nnan_nsz:1203; GFX11: ; %bb.0:1204; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1205; GFX11-NEXT: v_pk_min_f16 v0, v0, v21206; GFX11-NEXT: v_pk_min_f16 v1, v1, v31207; GFX11-NEXT: s_setpc_b64 s[30:31]1208;1209; GFX12-LABEL: v_minimum_v3f16__nnan_nsz:1210; GFX12: ; %bb.0:1211; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01212; GFX12-NEXT: s_wait_expcnt 0x01213; GFX12-NEXT: s_wait_samplecnt 0x01214; GFX12-NEXT: s_wait_bvhcnt 0x01215; GFX12-NEXT: s_wait_kmcnt 0x01216; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v21217; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v31218; GFX12-NEXT: s_setpc_b64 s[30:31]1219 %op = call nnan nsz <3 x half> @llvm.minimum.v3f16(<3 x half> %src0, <3 x half> %src1)1220 ret <3 x half> %op1221}1222 1223define <4 x half> @v_minimum_v4f16(<4 x half> %src0, <4 x half> %src1) {1224; GFX8-LABEL: v_minimum_v4f16:1225; GFX8: ; %bb.0:1226; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1227; GFX8-NEXT: v_lshrrev_b32_e32 v4, 16, v31228; GFX8-NEXT: v_lshrrev_b32_e32 v5, 16, v11229; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v5, v41230; GFX8-NEXT: v_min_f16_e32 v4, v5, v41231; GFX8-NEXT: v_mov_b32_e32 v5, 0x7e001232; GFX8-NEXT: v_lshrrev_b32_e32 v6, 16, v21233; GFX8-NEXT: v_lshrrev_b32_e32 v7, 16, v01234; GFX8-NEXT: v_cndmask_b32_sdwa v4, v5, v4, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD1235; GFX8-NEXT: v_min_f16_e32 v8, v7, v61236; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v7, v61237; GFX8-NEXT: v_cndmask_b32_e32 v6, v5, v8, vcc1238; GFX8-NEXT: v_min_f16_e32 v7, v1, v31239; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v1, v31240; GFX8-NEXT: v_cndmask_b32_e32 v1, v5, v7, vcc1241; GFX8-NEXT: v_min_f16_e32 v3, v0, v21242; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v0, v21243; GFX8-NEXT: v_cndmask_b32_e32 v0, v5, v3, vcc1244; GFX8-NEXT: v_lshlrev_b32_e32 v2, 16, v61245; GFX8-NEXT: v_or_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1246; GFX8-NEXT: v_or_b32_sdwa v1, v1, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1247; GFX8-NEXT: s_setpc_b64 s[30:31]1248;1249; GFX900-LABEL: v_minimum_v4f16:1250; GFX900: ; %bb.0:1251; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1252; GFX900-NEXT: v_pk_min_f16 v4, v1, v31253; GFX900-NEXT: v_mov_b32_e32 v5, 0x7e001254; GFX900-NEXT: v_cmp_o_f16_e32 vcc, v1, v31255; GFX900-NEXT: v_cndmask_b32_e32 v6, v5, v4, vcc1256; GFX900-NEXT: v_cmp_o_f16_sdwa vcc, v1, v3 src0_sel:WORD_1 src1_sel:WORD_11257; GFX900-NEXT: v_cndmask_b32_sdwa v1, v5, v4, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11258; GFX900-NEXT: v_pk_min_f16 v3, v0, v21259; GFX900-NEXT: v_cmp_o_f16_e32 vcc, v0, v21260; GFX900-NEXT: v_cndmask_b32_e32 v4, v5, v3, vcc1261; GFX900-NEXT: v_cmp_o_f16_sdwa vcc, v0, v2 src0_sel:WORD_1 src1_sel:WORD_11262; GFX900-NEXT: v_cndmask_b32_sdwa v0, v5, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11263; GFX900-NEXT: s_mov_b32 s4, 0x50401001264; GFX900-NEXT: v_perm_b32 v0, v0, v4, s41265; GFX900-NEXT: v_perm_b32 v1, v1, v6, s41266; GFX900-NEXT: s_setpc_b64 s[30:31]1267;1268; GFX950-LABEL: v_minimum_v4f16:1269; GFX950: ; %bb.0:1270; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1271; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v2, v21272; GFX950-NEXT: v_pk_minimum3_f16 v1, v1, v3, v31273; GFX950-NEXT: s_setpc_b64 s[30:31]1274;1275; GFX10-LABEL: v_minimum_v4f16:1276; GFX10: ; %bb.0:1277; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1278; GFX10-NEXT: v_mov_b32_e32 v4, 0x7e001279; GFX10-NEXT: v_cmp_o_f16_sdwa vcc_lo, v1, v3 src0_sel:WORD_1 src1_sel:WORD_11280; GFX10-NEXT: v_pk_min_f16 v6, v1, v31281; GFX10-NEXT: v_cmp_o_f16_sdwa s4, v0, v2 src0_sel:WORD_1 src1_sel:WORD_11282; GFX10-NEXT: v_pk_min_f16 v5, v0, v21283; GFX10-NEXT: v_cmp_o_f16_e64 s5, v0, v21284; GFX10-NEXT: v_cndmask_b32_sdwa v2, v4, v6, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11285; GFX10-NEXT: s_mov_b32 vcc_lo, s41286; GFX10-NEXT: v_cndmask_b32_sdwa v4, v4, v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11287; GFX10-NEXT: v_cmp_o_f16_e32 vcc_lo, v1, v31288; GFX10-NEXT: v_cndmask_b32_e64 v0, 0x7e00, v5, s51289; GFX10-NEXT: v_cndmask_b32_e32 v1, 0x7e00, v6, vcc_lo1290; GFX10-NEXT: v_perm_b32 v0, v4, v0, 0x50401001291; GFX10-NEXT: v_perm_b32 v1, v2, v1, 0x50401001292; GFX10-NEXT: s_setpc_b64 s[30:31]1293;1294; GFX11-TRUE16-LABEL: v_minimum_v4f16:1295; GFX11-TRUE16: ; %bb.0:1296; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1297; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v1.l, v3.l1298; GFX11-TRUE16-NEXT: v_pk_min_f16 v4, v1, v31299; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v0.l, v2.l1300; GFX11-TRUE16-NEXT: v_pk_min_f16 v5, v0, v21301; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v0.h, v2.h1302; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s2, v1.h, v3.h1303; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v4.l, vcc_lo1304; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1305; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v5.l, s01306; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v5.h, s11307; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)1308; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, 0x7e00, v4.h, s21309; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]1310;1311; GFX11-FAKE16-LABEL: v_minimum_v4f16:1312; GFX11-FAKE16: ; %bb.0:1313; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1314; GFX11-FAKE16-NEXT: v_pk_min_f16 v4, v1, v31315; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v1, v31316; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v31317; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v11318; GFX11-FAKE16-NEXT: v_pk_min_f16 v7, v0, v21319; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v21320; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x7e00, v4, vcc_lo1321; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v01322; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v0, v21323; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v71324; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v41325; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x7e00, v7, vcc_lo1326; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v3, v81327; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)1328; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, 0x7e00, v9, vcc_lo1329; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v6, v51330; GFX11-FAKE16-NEXT: v_perm_b32 v0, v2, v0, 0x50401001331; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, 0x7e00, v4, vcc_lo1332; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1333; GFX11-FAKE16-NEXT: v_perm_b32 v1, v3, v1, 0x50401001334; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]1335;1336; GFX12-LABEL: v_minimum_v4f16:1337; GFX12: ; %bb.0:1338; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01339; GFX12-NEXT: s_wait_expcnt 0x01340; GFX12-NEXT: s_wait_samplecnt 0x01341; GFX12-NEXT: s_wait_bvhcnt 0x01342; GFX12-NEXT: s_wait_kmcnt 0x01343; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v21344; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v31345; GFX12-NEXT: s_setpc_b64 s[30:31]1346 %op = call <4 x half> @llvm.minimum.v4f16(<4 x half> %src0, <4 x half> %src1)1347 ret <4 x half> %op1348}1349 1350define <4 x half> @v_minimum_v4f16__nnan(<4 x half> %src0, <4 x half> %src1) {1351; GFX8-LABEL: v_minimum_v4f16__nnan:1352; GFX8: ; %bb.0:1353; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1354; GFX8-NEXT: v_min_f16_sdwa v4, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11355; GFX8-NEXT: v_min_f16_sdwa v5, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11356; GFX8-NEXT: v_min_f16_e32 v1, v1, v31357; GFX8-NEXT: v_min_f16_e32 v0, v0, v21358; GFX8-NEXT: v_or_b32_e32 v0, v0, v51359; GFX8-NEXT: v_or_b32_e32 v1, v1, v41360; GFX8-NEXT: s_setpc_b64 s[30:31]1361;1362; GFX9-LABEL: v_minimum_v4f16__nnan:1363; GFX9: ; %bb.0:1364; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1365; GFX9-NEXT: v_pk_min_f16 v0, v0, v21366; GFX9-NEXT: v_pk_min_f16 v1, v1, v31367; GFX9-NEXT: s_setpc_b64 s[30:31]1368;1369; GFX10-LABEL: v_minimum_v4f16__nnan:1370; GFX10: ; %bb.0:1371; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1372; GFX10-NEXT: v_pk_min_f16 v0, v0, v21373; GFX10-NEXT: v_pk_min_f16 v1, v1, v31374; GFX10-NEXT: s_setpc_b64 s[30:31]1375;1376; GFX11-LABEL: v_minimum_v4f16__nnan:1377; GFX11: ; %bb.0:1378; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1379; GFX11-NEXT: v_pk_min_f16 v0, v0, v21380; GFX11-NEXT: v_pk_min_f16 v1, v1, v31381; GFX11-NEXT: s_setpc_b64 s[30:31]1382;1383; GFX12-LABEL: v_minimum_v4f16__nnan:1384; GFX12: ; %bb.0:1385; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01386; GFX12-NEXT: s_wait_expcnt 0x01387; GFX12-NEXT: s_wait_samplecnt 0x01388; GFX12-NEXT: s_wait_bvhcnt 0x01389; GFX12-NEXT: s_wait_kmcnt 0x01390; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v21391; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v31392; GFX12-NEXT: s_setpc_b64 s[30:31]1393 %op = call nnan <4 x half> @llvm.minimum.v4f16(<4 x half> %src0, <4 x half> %src1)1394 ret <4 x half> %op1395}1396 1397define <4 x half> @v_minimum_v4f16__nsz(<4 x half> %src0, <4 x half> %src1) {1398; GFX8-LABEL: v_minimum_v4f16__nsz:1399; GFX8: ; %bb.0:1400; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1401; GFX8-NEXT: v_lshrrev_b32_e32 v4, 16, v31402; GFX8-NEXT: v_lshrrev_b32_e32 v5, 16, v11403; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v5, v41404; GFX8-NEXT: v_min_f16_e32 v4, v5, v41405; GFX8-NEXT: v_mov_b32_e32 v5, 0x7e001406; GFX8-NEXT: v_lshrrev_b32_e32 v6, 16, v21407; GFX8-NEXT: v_lshrrev_b32_e32 v7, 16, v01408; GFX8-NEXT: v_cndmask_b32_sdwa v4, v5, v4, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD1409; GFX8-NEXT: v_min_f16_e32 v8, v7, v61410; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v7, v61411; GFX8-NEXT: v_cndmask_b32_e32 v6, v5, v8, vcc1412; GFX8-NEXT: v_min_f16_e32 v7, v1, v31413; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v1, v31414; GFX8-NEXT: v_cndmask_b32_e32 v1, v5, v7, vcc1415; GFX8-NEXT: v_min_f16_e32 v3, v0, v21416; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v0, v21417; GFX8-NEXT: v_cndmask_b32_e32 v0, v5, v3, vcc1418; GFX8-NEXT: v_lshlrev_b32_e32 v2, 16, v61419; GFX8-NEXT: v_or_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1420; GFX8-NEXT: v_or_b32_sdwa v1, v1, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1421; GFX8-NEXT: s_setpc_b64 s[30:31]1422;1423; GFX900-LABEL: v_minimum_v4f16__nsz:1424; GFX900: ; %bb.0:1425; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1426; GFX900-NEXT: v_pk_min_f16 v4, v1, v31427; GFX900-NEXT: v_mov_b32_e32 v5, 0x7e001428; GFX900-NEXT: v_cmp_o_f16_e32 vcc, v1, v31429; GFX900-NEXT: v_cndmask_b32_e32 v6, v5, v4, vcc1430; GFX900-NEXT: v_cmp_o_f16_sdwa vcc, v1, v3 src0_sel:WORD_1 src1_sel:WORD_11431; GFX900-NEXT: v_cndmask_b32_sdwa v1, v5, v4, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11432; GFX900-NEXT: v_pk_min_f16 v3, v0, v21433; GFX900-NEXT: v_cmp_o_f16_e32 vcc, v0, v21434; GFX900-NEXT: v_cndmask_b32_e32 v4, v5, v3, vcc1435; GFX900-NEXT: v_cmp_o_f16_sdwa vcc, v0, v2 src0_sel:WORD_1 src1_sel:WORD_11436; GFX900-NEXT: v_cndmask_b32_sdwa v0, v5, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11437; GFX900-NEXT: s_mov_b32 s4, 0x50401001438; GFX900-NEXT: v_perm_b32 v0, v0, v4, s41439; GFX900-NEXT: v_perm_b32 v1, v1, v6, s41440; GFX900-NEXT: s_setpc_b64 s[30:31]1441;1442; GFX950-LABEL: v_minimum_v4f16__nsz:1443; GFX950: ; %bb.0:1444; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1445; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v2, v21446; GFX950-NEXT: v_pk_minimum3_f16 v1, v1, v3, v31447; GFX950-NEXT: s_setpc_b64 s[30:31]1448;1449; GFX10-LABEL: v_minimum_v4f16__nsz:1450; GFX10: ; %bb.0:1451; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1452; GFX10-NEXT: v_mov_b32_e32 v4, 0x7e001453; GFX10-NEXT: v_cmp_o_f16_sdwa vcc_lo, v1, v3 src0_sel:WORD_1 src1_sel:WORD_11454; GFX10-NEXT: v_pk_min_f16 v6, v1, v31455; GFX10-NEXT: v_cmp_o_f16_sdwa s4, v0, v2 src0_sel:WORD_1 src1_sel:WORD_11456; GFX10-NEXT: v_pk_min_f16 v5, v0, v21457; GFX10-NEXT: v_cmp_o_f16_e64 s5, v0, v21458; GFX10-NEXT: v_cndmask_b32_sdwa v2, v4, v6, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11459; GFX10-NEXT: s_mov_b32 vcc_lo, s41460; GFX10-NEXT: v_cndmask_b32_sdwa v4, v4, v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11461; GFX10-NEXT: v_cmp_o_f16_e32 vcc_lo, v1, v31462; GFX10-NEXT: v_cndmask_b32_e64 v0, 0x7e00, v5, s51463; GFX10-NEXT: v_cndmask_b32_e32 v1, 0x7e00, v6, vcc_lo1464; GFX10-NEXT: v_perm_b32 v0, v4, v0, 0x50401001465; GFX10-NEXT: v_perm_b32 v1, v2, v1, 0x50401001466; GFX10-NEXT: s_setpc_b64 s[30:31]1467;1468; GFX11-TRUE16-LABEL: v_minimum_v4f16__nsz:1469; GFX11-TRUE16: ; %bb.0:1470; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1471; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v1.l, v3.l1472; GFX11-TRUE16-NEXT: v_pk_min_f16 v4, v1, v31473; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v0.l, v2.l1474; GFX11-TRUE16-NEXT: v_pk_min_f16 v5, v0, v21475; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v0.h, v2.h1476; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s2, v1.h, v3.h1477; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v4.l, vcc_lo1478; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1479; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v5.l, s01480; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v5.h, s11481; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)1482; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, 0x7e00, v4.h, s21483; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]1484;1485; GFX11-FAKE16-LABEL: v_minimum_v4f16__nsz:1486; GFX11-FAKE16: ; %bb.0:1487; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1488; GFX11-FAKE16-NEXT: v_pk_min_f16 v4, v1, v31489; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v1, v31490; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v31491; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v11492; GFX11-FAKE16-NEXT: v_pk_min_f16 v7, v0, v21493; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v21494; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x7e00, v4, vcc_lo1495; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v01496; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v0, v21497; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v71498; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v41499; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x7e00, v7, vcc_lo1500; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v3, v81501; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)1502; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, 0x7e00, v9, vcc_lo1503; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v6, v51504; GFX11-FAKE16-NEXT: v_perm_b32 v0, v2, v0, 0x50401001505; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, 0x7e00, v4, vcc_lo1506; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1507; GFX11-FAKE16-NEXT: v_perm_b32 v1, v3, v1, 0x50401001508; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]1509;1510; GFX12-LABEL: v_minimum_v4f16__nsz:1511; GFX12: ; %bb.0:1512; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01513; GFX12-NEXT: s_wait_expcnt 0x01514; GFX12-NEXT: s_wait_samplecnt 0x01515; GFX12-NEXT: s_wait_bvhcnt 0x01516; GFX12-NEXT: s_wait_kmcnt 0x01517; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v21518; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v31519; GFX12-NEXT: s_setpc_b64 s[30:31]1520 %op = call nsz <4 x half> @llvm.minimum.v4f16(<4 x half> %src0, <4 x half> %src1)1521 ret <4 x half> %op1522}1523 1524define <4 x half> @v_minimum_v4f16__nnan_nsz(<4 x half> %src0, <4 x half> %src1) {1525; GFX8-LABEL: v_minimum_v4f16__nnan_nsz:1526; GFX8: ; %bb.0:1527; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1528; GFX8-NEXT: v_min_f16_sdwa v4, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11529; GFX8-NEXT: v_min_f16_sdwa v5, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11530; GFX8-NEXT: v_min_f16_e32 v1, v1, v31531; GFX8-NEXT: v_min_f16_e32 v0, v0, v21532; GFX8-NEXT: v_or_b32_e32 v0, v0, v51533; GFX8-NEXT: v_or_b32_e32 v1, v1, v41534; GFX8-NEXT: s_setpc_b64 s[30:31]1535;1536; GFX9-LABEL: v_minimum_v4f16__nnan_nsz:1537; GFX9: ; %bb.0:1538; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1539; GFX9-NEXT: v_pk_min_f16 v0, v0, v21540; GFX9-NEXT: v_pk_min_f16 v1, v1, v31541; GFX9-NEXT: s_setpc_b64 s[30:31]1542;1543; GFX10-LABEL: v_minimum_v4f16__nnan_nsz:1544; GFX10: ; %bb.0:1545; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1546; GFX10-NEXT: v_pk_min_f16 v0, v0, v21547; GFX10-NEXT: v_pk_min_f16 v1, v1, v31548; GFX10-NEXT: s_setpc_b64 s[30:31]1549;1550; GFX11-LABEL: v_minimum_v4f16__nnan_nsz:1551; GFX11: ; %bb.0:1552; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1553; GFX11-NEXT: v_pk_min_f16 v0, v0, v21554; GFX11-NEXT: v_pk_min_f16 v1, v1, v31555; GFX11-NEXT: s_setpc_b64 s[30:31]1556;1557; GFX12-LABEL: v_minimum_v4f16__nnan_nsz:1558; GFX12: ; %bb.0:1559; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01560; GFX12-NEXT: s_wait_expcnt 0x01561; GFX12-NEXT: s_wait_samplecnt 0x01562; GFX12-NEXT: s_wait_bvhcnt 0x01563; GFX12-NEXT: s_wait_kmcnt 0x01564; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v21565; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v31566; GFX12-NEXT: s_setpc_b64 s[30:31]1567 %op = call nnan nsz <4 x half> @llvm.minimum.v4f16(<4 x half> %src0, <4 x half> %src1)1568 ret <4 x half> %op1569}1570 1571define <8 x half> @v_minimum_v8f16(<8 x half> %src0, <8 x half> %src1) {1572; GFX8-LABEL: v_minimum_v8f16:1573; GFX8: ; %bb.0:1574; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1575; GFX8-NEXT: v_lshrrev_b32_e32 v8, 16, v71576; GFX8-NEXT: v_lshrrev_b32_e32 v9, 16, v31577; GFX8-NEXT: v_min_f16_e32 v10, v9, v81578; GFX8-NEXT: v_mov_b32_e32 v11, 0x7e001579; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v9, v81580; GFX8-NEXT: v_cndmask_b32_e32 v8, v11, v10, vcc1581; GFX8-NEXT: v_lshrrev_b32_e32 v9, 16, v61582; GFX8-NEXT: v_lshrrev_b32_e32 v10, 16, v21583; GFX8-NEXT: v_min_f16_e32 v12, v10, v91584; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v10, v91585; GFX8-NEXT: v_cndmask_b32_e32 v9, v11, v12, vcc1586; GFX8-NEXT: v_lshrrev_b32_e32 v10, 16, v51587; GFX8-NEXT: v_lshrrev_b32_e32 v12, 16, v11588; GFX8-NEXT: v_min_f16_e32 v13, v12, v101589; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v12, v101590; GFX8-NEXT: v_cndmask_b32_e32 v10, v11, v13, vcc1591; GFX8-NEXT: v_lshrrev_b32_e32 v12, 16, v41592; GFX8-NEXT: v_lshrrev_b32_e32 v13, 16, v01593; GFX8-NEXT: v_min_f16_e32 v14, v13, v121594; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v13, v121595; GFX8-NEXT: v_cndmask_b32_e32 v12, v11, v14, vcc1596; GFX8-NEXT: v_min_f16_e32 v13, v3, v71597; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v3, v71598; GFX8-NEXT: v_cndmask_b32_e32 v3, v11, v13, vcc1599; GFX8-NEXT: v_min_f16_e32 v7, v2, v61600; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v2, v61601; GFX8-NEXT: v_cndmask_b32_e32 v2, v11, v7, vcc1602; GFX8-NEXT: v_min_f16_e32 v6, v1, v51603; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v1, v51604; GFX8-NEXT: v_cndmask_b32_e32 v1, v11, v6, vcc1605; GFX8-NEXT: v_min_f16_e32 v5, v0, v41606; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v0, v41607; GFX8-NEXT: v_cndmask_b32_e32 v0, v11, v5, vcc1608; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v121609; GFX8-NEXT: v_or_b32_sdwa v0, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1610; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v101611; GFX8-NEXT: v_or_b32_sdwa v1, v1, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1612; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v91613; GFX8-NEXT: v_or_b32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1614; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v81615; GFX8-NEXT: v_or_b32_sdwa v3, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1616; GFX8-NEXT: s_setpc_b64 s[30:31]1617;1618; GFX900-LABEL: v_minimum_v8f16:1619; GFX900: ; %bb.0:1620; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1621; GFX900-NEXT: v_pk_min_f16 v8, v3, v71622; GFX900-NEXT: v_mov_b32_e32 v9, 0x7e001623; GFX900-NEXT: v_cmp_o_f16_e32 vcc, v3, v71624; GFX900-NEXT: v_cndmask_b32_e32 v10, v9, v8, vcc1625; GFX900-NEXT: v_lshrrev_b32_e32 v8, 16, v81626; GFX900-NEXT: v_cmp_o_f16_sdwa vcc, v3, v7 src0_sel:WORD_1 src1_sel:WORD_11627; GFX900-NEXT: v_cndmask_b32_e32 v3, v9, v8, vcc1628; GFX900-NEXT: v_pk_min_f16 v7, v2, v61629; GFX900-NEXT: v_cmp_o_f16_e32 vcc, v2, v61630; GFX900-NEXT: v_cndmask_b32_e32 v8, v9, v7, vcc1631; GFX900-NEXT: v_lshrrev_b32_e32 v7, 16, v71632; GFX900-NEXT: v_cmp_o_f16_sdwa vcc, v2, v6 src0_sel:WORD_1 src1_sel:WORD_11633; GFX900-NEXT: v_cndmask_b32_e32 v2, v9, v7, vcc1634; GFX900-NEXT: v_pk_min_f16 v6, v1, v51635; GFX900-NEXT: v_cmp_o_f16_e32 vcc, v1, v51636; GFX900-NEXT: v_cndmask_b32_e32 v7, v9, v6, vcc1637; GFX900-NEXT: v_lshrrev_b32_e32 v6, 16, v61638; GFX900-NEXT: v_cmp_o_f16_sdwa vcc, v1, v5 src0_sel:WORD_1 src1_sel:WORD_11639; GFX900-NEXT: v_cndmask_b32_e32 v1, v9, v6, vcc1640; GFX900-NEXT: v_pk_min_f16 v5, v0, v41641; GFX900-NEXT: v_cmp_o_f16_e32 vcc, v0, v41642; GFX900-NEXT: v_cndmask_b32_e32 v6, v9, v5, vcc1643; GFX900-NEXT: v_lshrrev_b32_e32 v5, 16, v51644; GFX900-NEXT: v_cmp_o_f16_sdwa vcc, v0, v4 src0_sel:WORD_1 src1_sel:WORD_11645; GFX900-NEXT: v_cndmask_b32_e32 v0, v9, v5, vcc1646; GFX900-NEXT: s_mov_b32 s4, 0x50401001647; GFX900-NEXT: v_perm_b32 v0, v0, v6, s41648; GFX900-NEXT: v_perm_b32 v1, v1, v7, s41649; GFX900-NEXT: v_perm_b32 v2, v2, v8, s41650; GFX900-NEXT: v_perm_b32 v3, v3, v10, s41651; GFX900-NEXT: s_setpc_b64 s[30:31]1652;1653; GFX950-LABEL: v_minimum_v8f16:1654; GFX950: ; %bb.0:1655; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1656; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v4, v41657; GFX950-NEXT: v_pk_minimum3_f16 v1, v1, v5, v51658; GFX950-NEXT: v_pk_minimum3_f16 v2, v2, v6, v61659; GFX950-NEXT: v_pk_minimum3_f16 v3, v3, v7, v71660; GFX950-NEXT: s_setpc_b64 s[30:31]1661;1662; GFX10-LABEL: v_minimum_v8f16:1663; GFX10: ; %bb.0:1664; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1665; GFX10-NEXT: v_cmp_o_f16_sdwa vcc_lo, v3, v7 src0_sel:WORD_1 src1_sel:WORD_11666; GFX10-NEXT: v_pk_min_f16 v8, v3, v71667; GFX10-NEXT: v_mov_b32_e32 v9, 0x7e001668; GFX10-NEXT: v_pk_min_f16 v10, v2, v61669; GFX10-NEXT: v_cmp_o_f16_sdwa s4, v2, v6 src0_sel:WORD_1 src1_sel:WORD_11670; GFX10-NEXT: v_cmp_o_f16_sdwa s5, v1, v5 src0_sel:WORD_1 src1_sel:WORD_11671; GFX10-NEXT: v_pk_min_f16 v12, v0, v41672; GFX10-NEXT: v_cndmask_b32_sdwa v11, v9, v8, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11673; GFX10-NEXT: v_cmp_o_f16_e32 vcc_lo, v2, v61674; GFX10-NEXT: v_cndmask_b32_e32 v2, 0x7e00, v10, vcc_lo1675; GFX10-NEXT: s_mov_b32 vcc_lo, s41676; GFX10-NEXT: v_cmp_o_f16_sdwa s4, v0, v4 src0_sel:WORD_1 src1_sel:WORD_11677; GFX10-NEXT: v_cndmask_b32_sdwa v6, v9, v10, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11678; GFX10-NEXT: v_pk_min_f16 v10, v1, v51679; GFX10-NEXT: s_mov_b32 vcc_lo, s51680; GFX10-NEXT: v_perm_b32 v2, v6, v2, 0x50401001681; GFX10-NEXT: v_cndmask_b32_sdwa v13, v9, v10, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11682; GFX10-NEXT: v_cmp_o_f16_e32 vcc_lo, v0, v41683; GFX10-NEXT: v_cndmask_b32_e32 v0, 0x7e00, v12, vcc_lo1684; GFX10-NEXT: s_mov_b32 vcc_lo, s41685; GFX10-NEXT: v_cndmask_b32_sdwa v4, v9, v12, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11686; GFX10-NEXT: v_cmp_o_f16_e32 vcc_lo, v1, v51687; GFX10-NEXT: v_perm_b32 v0, v4, v0, 0x50401001688; GFX10-NEXT: v_cndmask_b32_e32 v1, 0x7e00, v10, vcc_lo1689; GFX10-NEXT: v_cmp_o_f16_e32 vcc_lo, v3, v71690; GFX10-NEXT: v_perm_b32 v1, v13, v1, 0x50401001691; GFX10-NEXT: v_cndmask_b32_e32 v3, 0x7e00, v8, vcc_lo1692; GFX10-NEXT: v_perm_b32 v3, v11, v3, 0x50401001693; GFX10-NEXT: s_setpc_b64 s[30:31]1694;1695; GFX11-TRUE16-LABEL: v_minimum_v8f16:1696; GFX11-TRUE16: ; %bb.0:1697; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1698; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v3.l, v7.l1699; GFX11-TRUE16-NEXT: v_pk_min_f16 v8, v3, v71700; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v2.l, v6.l1701; GFX11-TRUE16-NEXT: v_pk_min_f16 v9, v2, v61702; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v0.l, v4.l1703; GFX11-TRUE16-NEXT: v_pk_min_f16 v10, v0, v41704; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, 0x7e00, v8.l, vcc_lo1705; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v3.h, v7.h1706; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, 0x7e00, v9.l, s01707; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v1.l, v5.l1708; GFX11-TRUE16-NEXT: v_pk_min_f16 v7, v1, v51709; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s2, v0.h, v4.h1710; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s3, v1.h, v5.h1711; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s4, v2.h, v6.h1712; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v10.l, s11713; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v7.l, s01714; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v10.h, s21715; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, 0x7e00, v7.h, s31716; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, 0x7e00, v9.h, s41717; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.h, 0x7e00, v8.h, vcc_lo1718; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]1719;1720; GFX11-FAKE16-LABEL: v_minimum_v8f16:1721; GFX11-FAKE16: ; %bb.0:1722; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1723; GFX11-FAKE16-NEXT: v_pk_min_f16 v8, v3, v71724; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v3, v71725; GFX11-FAKE16-NEXT: v_pk_min_f16 v10, v2, v61726; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 16, v61727; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v12, 16, v21728; GFX11-FAKE16-NEXT: v_pk_min_f16 v14, v1, v51729; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, 0x7e00, v8, vcc_lo1730; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v2, v61731; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 16, v101732; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v71733; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v31734; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v81735; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, 0x7e00, v10, vcc_lo1736; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v12, v111737; GFX11-FAKE16-NEXT: v_pk_min_f16 v11, v0, v41738; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v12, 16, v41739; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, 0x7e00, v13, vcc_lo1740; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v1, v51741; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 16, v01742; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v51743; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v11744; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 16, v111745; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, 0x7e00, v14, vcc_lo1746; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v0, v41747; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 16, v141748; GFX11-FAKE16-NEXT: v_perm_b32 v2, v6, v2, 0x50401001749; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x7e00, v11, vcc_lo1750; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v13, v121751; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, 0x7e00, v15, vcc_lo1752; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v1, v51753; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)1754; GFX11-FAKE16-NEXT: v_perm_b32 v0, v4, v0, 0x50401001755; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x7e00, v14, vcc_lo1756; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v3, v71757; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v10, 0x50401001758; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, 0x7e00, v8, vcc_lo1759; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1760; GFX11-FAKE16-NEXT: v_perm_b32 v3, v3, v9, 0x50401001761; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]1762;1763; GFX12-LABEL: v_minimum_v8f16:1764; GFX12: ; %bb.0:1765; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01766; GFX12-NEXT: s_wait_expcnt 0x01767; GFX12-NEXT: s_wait_samplecnt 0x01768; GFX12-NEXT: s_wait_bvhcnt 0x01769; GFX12-NEXT: s_wait_kmcnt 0x01770; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v41771; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v51772; GFX12-NEXT: v_pk_minimum_f16 v2, v2, v61773; GFX12-NEXT: v_pk_minimum_f16 v3, v3, v71774; GFX12-NEXT: s_setpc_b64 s[30:31]1775 %op = call <8 x half> @llvm.minimum.v8f16(<8 x half> %src0, <8 x half> %src1)1776 ret <8 x half> %op1777}1778 1779define <16 x half> @v_minimum_v16f16(<16 x half> %src0, <16 x half> %src1) {1780; GFX8-LABEL: v_minimum_v16f16:1781; GFX8: ; %bb.0:1782; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1783; GFX8-NEXT: v_lshrrev_b32_e32 v17, 16, v141784; GFX8-NEXT: v_lshrrev_b32_e32 v18, 16, v61785; GFX8-NEXT: v_min_f16_e32 v16, v18, v171786; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v18, v171787; GFX8-NEXT: v_lshrrev_b32_e32 v17, 16, v131788; GFX8-NEXT: v_lshrrev_b32_e32 v18, 16, v51789; GFX8-NEXT: v_min_f16_e32 v20, v18, v171790; GFX8-NEXT: v_cmp_o_f16_e64 s[4:5], v18, v171791; GFX8-NEXT: v_lshrrev_b32_e32 v17, 16, v121792; GFX8-NEXT: v_lshrrev_b32_e32 v18, 16, v41793; GFX8-NEXT: v_min_f16_e32 v21, v18, v171794; GFX8-NEXT: v_cmp_o_f16_e64 s[6:7], v18, v171795; GFX8-NEXT: v_lshrrev_b32_e32 v17, 16, v111796; GFX8-NEXT: v_lshrrev_b32_e32 v18, 16, v31797; GFX8-NEXT: v_min_f16_e32 v22, v18, v171798; GFX8-NEXT: v_cmp_o_f16_e64 s[8:9], v18, v171799; GFX8-NEXT: v_lshrrev_b32_e32 v17, 16, v101800; GFX8-NEXT: v_lshrrev_b32_e32 v18, 16, v21801; GFX8-NEXT: v_min_f16_e32 v23, v18, v171802; GFX8-NEXT: v_cmp_o_f16_e64 s[10:11], v18, v171803; GFX8-NEXT: v_lshrrev_b32_e32 v17, 16, v91804; GFX8-NEXT: v_lshrrev_b32_e32 v18, 16, v11805; GFX8-NEXT: v_mov_b32_e32 v19, 0x7e001806; GFX8-NEXT: v_min_f16_e32 v24, v18, v171807; GFX8-NEXT: v_cmp_o_f16_e64 s[12:13], v18, v171808; GFX8-NEXT: v_lshrrev_b32_e32 v17, 16, v81809; GFX8-NEXT: v_lshrrev_b32_e32 v18, 16, v01810; GFX8-NEXT: v_min_f16_e32 v25, v18, v171811; GFX8-NEXT: v_cmp_o_f16_e64 s[14:15], v18, v171812; GFX8-NEXT: v_min_f16_e32 v17, v6, v141813; GFX8-NEXT: v_cmp_o_f16_e64 s[16:17], v6, v141814; GFX8-NEXT: v_min_f16_e32 v6, v5, v131815; GFX8-NEXT: v_cmp_o_f16_e64 s[18:19], v5, v131816; GFX8-NEXT: v_min_f16_e32 v5, v4, v121817; GFX8-NEXT: v_cmp_o_f16_e64 s[20:21], v4, v121818; GFX8-NEXT: v_min_f16_e32 v4, v3, v111819; GFX8-NEXT: v_cmp_o_f16_e64 s[22:23], v3, v111820; GFX8-NEXT: v_min_f16_e32 v3, v2, v101821; GFX8-NEXT: v_min_f16_e32 v11, v7, v151822; GFX8-NEXT: v_cmp_o_f16_e64 s[24:25], v7, v151823; GFX8-NEXT: v_lshrrev_b32_e32 v12, 16, v151824; GFX8-NEXT: v_lshrrev_b32_e32 v7, 16, v71825; GFX8-NEXT: v_cndmask_b32_e32 v14, v19, v16, vcc1826; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v2, v101827; GFX8-NEXT: v_min_f16_e32 v13, v7, v121828; GFX8-NEXT: v_cmp_o_f16_e64 s[26:27], v7, v121829; GFX8-NEXT: v_min_f16_e32 v7, v1, v91830; GFX8-NEXT: v_cndmask_b32_e32 v2, v19, v3, vcc1831; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v1, v91832; GFX8-NEXT: v_min_f16_e32 v12, v0, v81833; GFX8-NEXT: v_cndmask_b32_e64 v18, v19, v22, s[8:9]1834; GFX8-NEXT: v_cndmask_b32_e64 v22, v19, v25, s[14:15]1835; GFX8-NEXT: v_cndmask_b32_e32 v1, v19, v7, vcc1836; GFX8-NEXT: v_cmp_o_f16_e32 vcc, v0, v81837; GFX8-NEXT: v_cndmask_b32_e64 v16, v19, v21, s[6:7]1838; GFX8-NEXT: v_cndmask_b32_e64 v21, v19, v24, s[12:13]1839; GFX8-NEXT: v_cndmask_b32_e32 v0, v19, v12, vcc1840; GFX8-NEXT: v_lshlrev_b32_e32 v3, 16, v221841; GFX8-NEXT: v_cndmask_b32_e64 v15, v19, v20, s[4:5]1842; GFX8-NEXT: v_cndmask_b32_e64 v20, v19, v23, s[10:11]1843; GFX8-NEXT: v_or_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1844; GFX8-NEXT: v_lshlrev_b32_e32 v3, 16, v211845; GFX8-NEXT: v_or_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1846; GFX8-NEXT: v_lshlrev_b32_e32 v3, 16, v201847; GFX8-NEXT: v_cndmask_b32_e64 v4, v19, v4, s[22:23]1848; GFX8-NEXT: v_or_b32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1849; GFX8-NEXT: v_lshlrev_b32_e32 v3, 16, v181850; GFX8-NEXT: v_cndmask_b32_e64 v5, v19, v5, s[20:21]1851; GFX8-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1852; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v161853; GFX8-NEXT: v_cndmask_b32_e64 v13, v19, v13, s[26:27]1854; GFX8-NEXT: v_cndmask_b32_e64 v6, v19, v6, s[18:19]1855; GFX8-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1856; GFX8-NEXT: v_lshlrev_b32_e32 v5, 16, v151857; GFX8-NEXT: v_cndmask_b32_e64 v11, v19, v11, s[24:25]1858; GFX8-NEXT: v_cndmask_b32_e64 v17, v19, v17, s[16:17]1859; GFX8-NEXT: v_or_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1860; GFX8-NEXT: v_lshlrev_b32_e32 v6, 16, v141861; GFX8-NEXT: v_lshlrev_b32_e32 v7, 16, v131862; GFX8-NEXT: v_or_b32_sdwa v6, v17, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1863; GFX8-NEXT: v_or_b32_sdwa v7, v11, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1864; GFX8-NEXT: s_setpc_b64 s[30:31]1865;1866; GFX900-LABEL: v_minimum_v16f16:1867; GFX900: ; %bb.0:1868; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1869; GFX900-NEXT: v_pk_min_f16 v16, v7, v151870; GFX900-NEXT: v_mov_b32_e32 v17, 0x7e001871; GFX900-NEXT: v_cmp_o_f16_e32 vcc, v7, v151872; GFX900-NEXT: v_cndmask_b32_e32 v18, v17, v16, vcc1873; GFX900-NEXT: v_lshrrev_b32_e32 v16, 16, v161874; GFX900-NEXT: v_cmp_o_f16_sdwa vcc, v7, v15 src0_sel:WORD_1 src1_sel:WORD_11875; GFX900-NEXT: v_cndmask_b32_e32 v7, v17, v16, vcc1876; GFX900-NEXT: v_pk_min_f16 v15, v6, v141877; GFX900-NEXT: v_cmp_o_f16_e32 vcc, v6, v141878; GFX900-NEXT: v_cndmask_b32_e32 v16, v17, v15, vcc1879; GFX900-NEXT: v_lshrrev_b32_e32 v15, 16, v151880; GFX900-NEXT: v_cmp_o_f16_sdwa vcc, v6, v14 src0_sel:WORD_1 src1_sel:WORD_11881; GFX900-NEXT: v_cndmask_b32_e32 v6, v17, v15, vcc1882; GFX900-NEXT: v_pk_min_f16 v14, v5, v131883; GFX900-NEXT: v_cmp_o_f16_e32 vcc, v5, v131884; GFX900-NEXT: v_cndmask_b32_e32 v15, v17, v14, vcc1885; GFX900-NEXT: v_lshrrev_b32_e32 v14, 16, v141886; GFX900-NEXT: v_cmp_o_f16_sdwa vcc, v5, v13 src0_sel:WORD_1 src1_sel:WORD_11887; GFX900-NEXT: v_cndmask_b32_e32 v5, v17, v14, vcc1888; GFX900-NEXT: v_pk_min_f16 v13, v4, v121889; GFX900-NEXT: v_cmp_o_f16_e32 vcc, v4, v121890; GFX900-NEXT: v_cndmask_b32_e32 v14, v17, v13, vcc1891; GFX900-NEXT: v_lshrrev_b32_e32 v13, 16, v131892; GFX900-NEXT: v_cmp_o_f16_sdwa vcc, v4, v12 src0_sel:WORD_1 src1_sel:WORD_11893; GFX900-NEXT: v_cndmask_b32_e32 v4, v17, v13, vcc1894; GFX900-NEXT: v_pk_min_f16 v12, v3, v111895; GFX900-NEXT: v_cmp_o_f16_e32 vcc, v3, v111896; GFX900-NEXT: v_cndmask_b32_e32 v13, v17, v12, vcc1897; GFX900-NEXT: v_lshrrev_b32_e32 v12, 16, v121898; GFX900-NEXT: v_cmp_o_f16_sdwa vcc, v3, v11 src0_sel:WORD_1 src1_sel:WORD_11899; GFX900-NEXT: v_cndmask_b32_e32 v3, v17, v12, vcc1900; GFX900-NEXT: v_pk_min_f16 v11, v2, v101901; GFX900-NEXT: v_cmp_o_f16_e32 vcc, v2, v101902; GFX900-NEXT: v_cndmask_b32_e32 v12, v17, v11, vcc1903; GFX900-NEXT: v_lshrrev_b32_e32 v11, 16, v111904; GFX900-NEXT: v_cmp_o_f16_sdwa vcc, v2, v10 src0_sel:WORD_1 src1_sel:WORD_11905; GFX900-NEXT: v_cndmask_b32_e32 v2, v17, v11, vcc1906; GFX900-NEXT: v_pk_min_f16 v10, v1, v91907; GFX900-NEXT: v_cmp_o_f16_e32 vcc, v1, v91908; GFX900-NEXT: v_cndmask_b32_e32 v11, v17, v10, vcc1909; GFX900-NEXT: v_lshrrev_b32_e32 v10, 16, v101910; GFX900-NEXT: v_cmp_o_f16_sdwa vcc, v1, v9 src0_sel:WORD_1 src1_sel:WORD_11911; GFX900-NEXT: v_cndmask_b32_e32 v1, v17, v10, vcc1912; GFX900-NEXT: v_pk_min_f16 v9, v0, v81913; GFX900-NEXT: v_cmp_o_f16_e32 vcc, v0, v81914; GFX900-NEXT: v_cndmask_b32_e32 v10, v17, v9, vcc1915; GFX900-NEXT: v_lshrrev_b32_e32 v9, 16, v91916; GFX900-NEXT: v_cmp_o_f16_sdwa vcc, v0, v8 src0_sel:WORD_1 src1_sel:WORD_11917; GFX900-NEXT: v_cndmask_b32_e32 v0, v17, v9, vcc1918; GFX900-NEXT: s_mov_b32 s4, 0x50401001919; GFX900-NEXT: v_perm_b32 v0, v0, v10, s41920; GFX900-NEXT: v_perm_b32 v1, v1, v11, s41921; GFX900-NEXT: v_perm_b32 v2, v2, v12, s41922; GFX900-NEXT: v_perm_b32 v3, v3, v13, s41923; GFX900-NEXT: v_perm_b32 v4, v4, v14, s41924; GFX900-NEXT: v_perm_b32 v5, v5, v15, s41925; GFX900-NEXT: v_perm_b32 v6, v6, v16, s41926; GFX900-NEXT: v_perm_b32 v7, v7, v18, s41927; GFX900-NEXT: s_setpc_b64 s[30:31]1928;1929; GFX950-LABEL: v_minimum_v16f16:1930; GFX950: ; %bb.0:1931; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1932; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v8, v81933; GFX950-NEXT: v_pk_minimum3_f16 v1, v1, v9, v91934; GFX950-NEXT: v_pk_minimum3_f16 v2, v2, v10, v101935; GFX950-NEXT: v_pk_minimum3_f16 v3, v3, v11, v111936; GFX950-NEXT: v_pk_minimum3_f16 v4, v4, v12, v121937; GFX950-NEXT: v_pk_minimum3_f16 v5, v5, v13, v131938; GFX950-NEXT: v_pk_minimum3_f16 v6, v6, v14, v141939; GFX950-NEXT: v_pk_minimum3_f16 v7, v7, v15, v151940; GFX950-NEXT: s_setpc_b64 s[30:31]1941;1942; GFX10-LABEL: v_minimum_v16f16:1943; GFX10: ; %bb.0:1944; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1945; GFX10-NEXT: v_pk_min_f16 v16, v7, v151946; GFX10-NEXT: v_cmp_o_f16_e32 vcc_lo, v7, v151947; GFX10-NEXT: v_pk_min_f16 v18, v6, v141948; GFX10-NEXT: v_pk_min_f16 v19, v3, v111949; GFX10-NEXT: v_pk_min_f16 v20, v2, v101950; GFX10-NEXT: v_lshrrev_b32_e32 v17, 16, v161951; GFX10-NEXT: v_cndmask_b32_e32 v16, 0x7e00, v16, vcc_lo1952; GFX10-NEXT: v_cmp_o_f16_sdwa vcc_lo, v7, v15 src0_sel:WORD_1 src1_sel:WORD_11953; GFX10-NEXT: v_lshrrev_b32_e32 v15, 16, v181954; GFX10-NEXT: v_pk_min_f16 v21, v0, v81955; GFX10-NEXT: v_cndmask_b32_e32 v7, 0x7e00, v17, vcc_lo1956; GFX10-NEXT: v_cmp_o_f16_e32 vcc_lo, v6, v141957; GFX10-NEXT: v_pk_min_f16 v17, v5, v131958; GFX10-NEXT: v_lshrrev_b32_e32 v23, 16, v211959; GFX10-NEXT: v_perm_b32 v7, v7, v16, 0x50401001960; GFX10-NEXT: v_cndmask_b32_e32 v18, 0x7e00, v18, vcc_lo1961; GFX10-NEXT: v_cmp_o_f16_sdwa vcc_lo, v6, v14 src0_sel:WORD_1 src1_sel:WORD_11962; GFX10-NEXT: v_lshrrev_b32_e32 v14, 16, v171963; GFX10-NEXT: v_cndmask_b32_e32 v6, 0x7e00, v15, vcc_lo1964; GFX10-NEXT: v_cmp_o_f16_e32 vcc_lo, v5, v131965; GFX10-NEXT: v_perm_b32 v6, v6, v18, 0x50401001966; GFX10-NEXT: v_cndmask_b32_e32 v15, 0x7e00, v17, vcc_lo1967; GFX10-NEXT: v_cmp_o_f16_sdwa vcc_lo, v5, v13 src0_sel:WORD_1 src1_sel:WORD_11968; GFX10-NEXT: v_pk_min_f16 v17, v4, v121969; GFX10-NEXT: v_cndmask_b32_e32 v5, 0x7e00, v14, vcc_lo1970; GFX10-NEXT: v_cmp_o_f16_e32 vcc_lo, v4, v121971; GFX10-NEXT: v_lshrrev_b32_e32 v14, 16, v171972; GFX10-NEXT: v_perm_b32 v5, v5, v15, 0x50401001973; GFX10-NEXT: v_cndmask_b32_e32 v13, 0x7e00, v17, vcc_lo1974; GFX10-NEXT: v_cmp_o_f16_e32 vcc_lo, v3, v111975; GFX10-NEXT: v_lshrrev_b32_e32 v17, 16, v191976; GFX10-NEXT: v_cndmask_b32_e32 v19, 0x7e00, v19, vcc_lo1977; GFX10-NEXT: v_cmp_o_f16_sdwa vcc_lo, v3, v11 src0_sel:WORD_1 src1_sel:WORD_11978; GFX10-NEXT: v_pk_min_f16 v11, v1, v91979; GFX10-NEXT: v_cndmask_b32_e32 v3, 0x7e00, v17, vcc_lo1980; GFX10-NEXT: v_cmp_o_f16_e32 vcc_lo, v2, v101981; GFX10-NEXT: v_lshrrev_b32_e32 v22, 16, v111982; GFX10-NEXT: v_perm_b32 v3, v3, v19, 0x50401001983; GFX10-NEXT: v_cndmask_b32_e32 v17, 0x7e00, v20, vcc_lo1984; GFX10-NEXT: v_cmp_o_f16_e32 vcc_lo, v1, v91985; GFX10-NEXT: v_lshrrev_b32_e32 v20, 16, v201986; GFX10-NEXT: v_cndmask_b32_e32 v11, 0x7e00, v11, vcc_lo1987; GFX10-NEXT: v_cmp_o_f16_sdwa vcc_lo, v1, v9 src0_sel:WORD_1 src1_sel:WORD_11988; GFX10-NEXT: v_cndmask_b32_e32 v1, 0x7e00, v22, vcc_lo1989; GFX10-NEXT: v_cmp_o_f16_e32 vcc_lo, v0, v81990; GFX10-NEXT: v_perm_b32 v1, v1, v11, 0x50401001991; GFX10-NEXT: v_cndmask_b32_e32 v9, 0x7e00, v21, vcc_lo1992; GFX10-NEXT: v_cmp_o_f16_sdwa vcc_lo, v0, v8 src0_sel:WORD_1 src1_sel:WORD_11993; GFX10-NEXT: v_cndmask_b32_e32 v0, 0x7e00, v23, vcc_lo1994; GFX10-NEXT: v_cmp_o_f16_sdwa vcc_lo, v2, v10 src0_sel:WORD_1 src1_sel:WORD_11995; GFX10-NEXT: v_perm_b32 v0, v0, v9, 0x50401001996; GFX10-NEXT: v_cndmask_b32_e32 v2, 0x7e00, v20, vcc_lo1997; GFX10-NEXT: v_cmp_o_f16_sdwa vcc_lo, v4, v12 src0_sel:WORD_1 src1_sel:WORD_11998; GFX10-NEXT: v_perm_b32 v2, v2, v17, 0x50401001999; GFX10-NEXT: v_cndmask_b32_e32 v4, 0x7e00, v14, vcc_lo2000; GFX10-NEXT: v_perm_b32 v4, v4, v13, 0x50401002001; GFX10-NEXT: s_setpc_b64 s[30:31]2002;2003; GFX11-TRUE16-LABEL: v_minimum_v16f16:2004; GFX11-TRUE16: ; %bb.0:2005; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2006; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v7.l, v15.l2007; GFX11-TRUE16-NEXT: v_pk_min_f16 v16, v7, v152008; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v6.l, v14.l2009; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v6.h, v14.h2010; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s2, v5.l, v13.l2011; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s3, v5.h, v13.h2012; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, 0x7e00, v16.l, vcc_lo2013; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v7.h, v15.h2014; GFX11-TRUE16-NEXT: v_pk_min_f16 v15, v6, v142015; GFX11-TRUE16-NEXT: v_pk_min_f16 v14, v5, v132016; GFX11-TRUE16-NEXT: v_pk_min_f16 v13, v4, v122017; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s4, v1.h, v9.h2018; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.h, 0x7e00, v16.h, vcc_lo2019; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, 0x7e00, v15.l, s02020; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.h, 0x7e00, v15.h, s12021; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, 0x7e00, v14.l, s22022; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.h, 0x7e00, v14.h, s32023; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v4.l, v12.l2024; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v3.l, v11.l2025; GFX11-TRUE16-NEXT: v_pk_min_f16 v14, v3, v112026; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v2.l, v10.l2027; GFX11-TRUE16-NEXT: v_pk_min_f16 v15, v2, v102028; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, 0x7e00, v13.l, vcc_lo2029; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v4.h, v12.h2030; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, 0x7e00, v14.l, s02031; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v3.h, v11.h2032; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, 0x7e00, v15.l, s12033; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v1.l, v9.l2034; GFX11-TRUE16-NEXT: v_pk_min_f16 v11, v1, v92035; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s2, v0.l, v8.l2036; GFX11-TRUE16-NEXT: v_pk_min_f16 v12, v0, v82037; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s3, v0.h, v8.h2038; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s5, v2.h, v10.h2039; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v11.l, s12040; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, 0x7e00, v11.h, s42041; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v12.l, s22042; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v12.h, s32043; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, 0x7e00, v15.h, s52044; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.h, 0x7e00, v14.h, s02045; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.h, 0x7e00, v13.h, vcc_lo2046; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]2047;2048; GFX11-FAKE16-LABEL: v_minimum_v16f16:2049; GFX11-FAKE16: ; %bb.0:2050; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2051; GFX11-FAKE16-NEXT: v_pk_min_f16 v16, v7, v152052; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 16, v152053; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 16, v72054; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v7, v152055; GFX11-FAKE16-NEXT: v_pk_min_f16 v15, v6, v142056; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v19, 16, v162057; GFX11-FAKE16-NEXT: v_pk_min_f16 v20, v4, v122058; GFX11-FAKE16-NEXT: v_pk_min_f16 v22, v2, v102059; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, 0x7e00, v16, vcc_lo2060; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v18, v172061; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 16, v142062; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 16, v62063; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 16, v82064; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v24, 16, v02065; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v16, 0x7e00, v19, vcc_lo2066; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v6, v142067; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v19, 16, v152068; GFX11-FAKE16-NEXT: v_pk_min_f16 v14, v5, v132069; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)2070; GFX11-FAKE16-NEXT: v_perm_b32 v7, v16, v7, 0x50401002071; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, 0x7e00, v15, vcc_lo2072; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v18, v172073; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 16, v132074; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 16, v52075; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, 0x7e00, v19, vcc_lo2076; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v5, v132077; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v19, 16, v142078; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)2079; GFX11-FAKE16-NEXT: v_perm_b32 v6, v15, v6, 0x50401002080; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, 0x7e00, v14, vcc_lo2081; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v18, v172082; GFX11-FAKE16-NEXT: v_pk_min_f16 v17, v3, v112083; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 16, v202084; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, 0x7e00, v19, vcc_lo2085; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v4, v122086; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v19, 16, v112087; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 16, v172088; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v12, 16, v122089; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v42090; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, 0x7e00, v20, vcc_lo2091; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v20, 16, v32092; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v3, v112093; GFX11-FAKE16-NEXT: v_perm_b32 v5, v13, v5, 0x50401002094; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, 0x7e00, v17, vcc_lo2095; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)2096; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v20, v192097; GFX11-FAKE16-NEXT: v_pk_min_f16 v19, v1, v92098; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v20, 16, v222099; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, 0x7e00, v21, vcc_lo2100; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v2, v102101; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v102102; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v22103; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)2104; GFX11-FAKE16-NEXT: v_perm_b32 v3, v11, v3, 0x50401002105; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v17, 0x7e00, v22, vcc_lo2106; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v1, v92107; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v92108; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v12109; GFX11-FAKE16-NEXT: v_pk_min_f16 v22, v0, v82110; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v21, 0x7e00, v19, vcc_lo2111; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v19, 16, v192112; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2113; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v1, v92114; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 16, v222115; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)2116; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x7e00, v19, vcc_lo2117; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v0, v82118; GFX11-FAKE16-NEXT: v_perm_b32 v1, v1, v21, 0x50401002119; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x7e00, v22, vcc_lo2120; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v24, v232121; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, 0x7e00, v25, vcc_lo2122; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v2, v102123; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)2124; GFX11-FAKE16-NEXT: v_perm_b32 v0, v8, v0, 0x50401002125; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, 0x7e00, v20, vcc_lo2126; GFX11-FAKE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v4, v122127; GFX11-FAKE16-NEXT: v_perm_b32 v2, v2, v17, 0x50401002128; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, 0x7e00, v18, vcc_lo2129; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2130; GFX11-FAKE16-NEXT: v_perm_b32 v4, v4, v14, 0x50401002131; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]2132;2133; GFX12-LABEL: v_minimum_v16f16:2134; GFX12: ; %bb.0:2135; GFX12-NEXT: s_wait_loadcnt_dscnt 0x02136; GFX12-NEXT: s_wait_expcnt 0x02137; GFX12-NEXT: s_wait_samplecnt 0x02138; GFX12-NEXT: s_wait_bvhcnt 0x02139; GFX12-NEXT: s_wait_kmcnt 0x02140; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v82141; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v92142; GFX12-NEXT: v_pk_minimum_f16 v2, v2, v102143; GFX12-NEXT: v_pk_minimum_f16 v3, v3, v112144; GFX12-NEXT: v_pk_minimum_f16 v4, v4, v122145; GFX12-NEXT: v_pk_minimum_f16 v5, v5, v132146; GFX12-NEXT: v_pk_minimum_f16 v6, v6, v142147; GFX12-NEXT: v_pk_minimum_f16 v7, v7, v152148; GFX12-NEXT: s_setpc_b64 s[30:31]2149 %op = call <16 x half> @llvm.minimum.v16f16(<16 x half> %src0, <16 x half> %src1)2150 ret <16 x half> %op2151}2152;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:2153; GCN: {{.*}}2154