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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=hawaii < %s | FileCheck -check-prefixes=GFX78,GFX7 %s3; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji < %s | FileCheck -check-prefixes=GFX78,GFX8 %s4; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-TRUE16 %s5; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-FAKE16 %s6 7define i16 @v_powi_f16(i16 %l, i32 %r) {8; GFX78-LABEL: v_powi_f16:9; GFX78: ; %bb.0:10; GFX78-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11; GFX78-NEXT: v_cvt_f32_f16_e32 v0, v012; GFX78-NEXT: v_cvt_f32_i32_e32 v1, v113; GFX78-NEXT: v_log_f32_e32 v0, v014; GFX78-NEXT: v_mul_legacy_f32_e32 v0, v1, v015; GFX78-NEXT: v_exp_f32_e32 v0, v016; GFX78-NEXT: v_cvt_f16_f32_e32 v0, v017; GFX78-NEXT: s_setpc_b64 s[30:31]18;19; GFX11-TRUE16-LABEL: v_powi_f16:20; GFX11-TRUE16: ; %bb.0:21; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)22; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.l23; GFX11-TRUE16-NEXT: v_cvt_f32_i32_e32 v1, v124; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)25; GFX11-TRUE16-NEXT: v_log_f32_e32 v0, v026; GFX11-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)27; GFX11-TRUE16-NEXT: v_mul_dx9_zero_f32_e32 v0, v1, v028; GFX11-TRUE16-NEXT: v_exp_f32_e32 v0, v029; GFX11-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)30; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, v031; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]32;33; GFX11-FAKE16-LABEL: v_powi_f16:34; GFX11-FAKE16: ; %bb.0:35; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)36; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, v037; GFX11-FAKE16-NEXT: v_cvt_f32_i32_e32 v1, v138; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)39; GFX11-FAKE16-NEXT: v_log_f32_e32 v0, v040; GFX11-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)41; GFX11-FAKE16-NEXT: v_mul_dx9_zero_f32_e32 v0, v1, v042; GFX11-FAKE16-NEXT: v_exp_f32_e32 v0, v043; GFX11-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)44; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v045; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]46 %l.cast = bitcast i16 %l to half47 %res = call half @llvm.powi.f16.i32(half %l.cast, i32 %r)48 %res.cast = bitcast half %res to i1649 ret i16 %res.cast50}51 52define float @v_powi_f32(float %l, i32 %r) {53; GFX78-LABEL: v_powi_f32:54; GFX78: ; %bb.0:55; GFX78-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)56; GFX78-NEXT: v_log_f32_e32 v0, v057; GFX78-NEXT: v_cvt_f32_i32_e32 v1, v158; GFX78-NEXT: v_mul_legacy_f32_e32 v0, v1, v059; GFX78-NEXT: v_exp_f32_e32 v0, v060; GFX78-NEXT: s_setpc_b64 s[30:31]61;62; GFX11-LABEL: v_powi_f32:63; GFX11: ; %bb.0:64; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)65; GFX11-NEXT: v_log_f32_e32 v0, v066; GFX11-NEXT: v_cvt_f32_i32_e32 v1, v167; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)68; GFX11-NEXT: v_mul_dx9_zero_f32_e32 v0, v1, v069; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)70; GFX11-NEXT: v_exp_f32_e32 v0, v071; GFX11-NEXT: s_setpc_b64 s[30:31]72 %res = call float @llvm.powi.f32.i32(float %l, i32 %r)73 ret float %res74}75 76define float @v_powi_0_f32(float %l) {77; GFX78-LABEL: v_powi_0_f32:78; GFX78: ; %bb.0:79; GFX78-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)80; GFX78-NEXT: v_mov_b32_e32 v0, 1.081; GFX78-NEXT: s_setpc_b64 s[30:31]82;83; GFX11-LABEL: v_powi_0_f32:84; GFX11: ; %bb.0:85; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)86; GFX11-NEXT: v_mov_b32_e32 v0, 1.087; GFX11-NEXT: s_setpc_b64 s[30:31]88 %res = call float @llvm.powi.f32.i32(float %l, i32 0)89 ret float %res90}91 92define float @v_powi_1_f32(float %l) {93; GFX78-LABEL: v_powi_1_f32:94; GFX78: ; %bb.0:95; GFX78-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)96; GFX78-NEXT: s_setpc_b64 s[30:31]97;98; GFX11-LABEL: v_powi_1_f32:99; GFX11: ; %bb.0:100; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)101; GFX11-NEXT: s_setpc_b64 s[30:31]102 %res = call float @llvm.powi.f32.i32(float %l, i32 1)103 ret float %res104}105 106define float @v_powi_neg1_f32(float %l) {107; GFX7-LABEL: v_powi_neg1_f32:108; GFX7: ; %bb.0:109; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)110; GFX7-NEXT: v_div_scale_f32 v1, s[4:5], v0, v0, 1.0111; GFX7-NEXT: v_rcp_f32_e32 v2, v1112; GFX7-NEXT: v_div_scale_f32 v3, vcc, 1.0, v0, 1.0113; GFX7-NEXT: v_fma_f32 v4, -v1, v2, 1.0114; GFX7-NEXT: v_fma_f32 v2, v4, v2, v2115; GFX7-NEXT: v_mul_f32_e32 v4, v3, v2116; GFX7-NEXT: v_fma_f32 v5, -v1, v4, v3117; GFX7-NEXT: v_fma_f32 v4, v5, v2, v4118; GFX7-NEXT: v_fma_f32 v1, -v1, v4, v3119; GFX7-NEXT: v_div_fmas_f32 v1, v1, v2, v4120; GFX7-NEXT: v_div_fixup_f32 v0, v1, v0, 1.0121; GFX7-NEXT: s_setpc_b64 s[30:31]122;123; GFX8-LABEL: v_powi_neg1_f32:124; GFX8: ; %bb.0:125; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)126; GFX8-NEXT: v_div_scale_f32 v1, s[4:5], v0, v0, 1.0127; GFX8-NEXT: v_div_scale_f32 v2, vcc, 1.0, v0, 1.0128; GFX8-NEXT: v_rcp_f32_e32 v3, v1129; GFX8-NEXT: v_fma_f32 v4, -v1, v3, 1.0130; GFX8-NEXT: v_fma_f32 v3, v4, v3, v3131; GFX8-NEXT: v_mul_f32_e32 v4, v2, v3132; GFX8-NEXT: v_fma_f32 v5, -v1, v4, v2133; GFX8-NEXT: v_fma_f32 v4, v5, v3, v4134; GFX8-NEXT: v_fma_f32 v1, -v1, v4, v2135; GFX8-NEXT: v_div_fmas_f32 v1, v1, v3, v4136; GFX8-NEXT: v_div_fixup_f32 v0, v1, v0, 1.0137; GFX8-NEXT: s_setpc_b64 s[30:31]138;139; GFX11-LABEL: v_powi_neg1_f32:140; GFX11: ; %bb.0:141; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)142; GFX11-NEXT: v_div_scale_f32 v1, null, v0, v0, 1.0143; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)144; GFX11-NEXT: v_rcp_f32_e32 v2, v1145; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)146; GFX11-NEXT: v_fma_f32 v3, -v1, v2, 1.0147; GFX11-NEXT: v_fmac_f32_e32 v2, v3, v2148; GFX11-NEXT: v_div_scale_f32 v3, vcc_lo, 1.0, v0, 1.0149; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)150; GFX11-NEXT: v_mul_f32_e32 v4, v3, v2151; GFX11-NEXT: v_fma_f32 v5, -v1, v4, v3152; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)153; GFX11-NEXT: v_fmac_f32_e32 v4, v5, v2154; GFX11-NEXT: v_fma_f32 v1, -v1, v4, v3155; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)156; GFX11-NEXT: v_div_fmas_f32 v1, v1, v2, v4157; GFX11-NEXT: v_div_fixup_f32 v0, v1, v0, 1.0158; GFX11-NEXT: s_setpc_b64 s[30:31]159 %res = call float @llvm.powi.f32.i32(float %l, i32 -1)160 ret float %res161}162 163define float @v_powi_2_f32(float %l) {164; GFX78-LABEL: v_powi_2_f32:165; GFX78: ; %bb.0:166; GFX78-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)167; GFX78-NEXT: v_mul_f32_e32 v0, v0, v0168; GFX78-NEXT: s_setpc_b64 s[30:31]169;170; GFX11-LABEL: v_powi_2_f32:171; GFX11: ; %bb.0:172; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)173; GFX11-NEXT: v_mul_f32_e32 v0, v0, v0174; GFX11-NEXT: s_setpc_b64 s[30:31]175 %res = call float @llvm.powi.f32.i32(float %l, i32 2)176 ret float %res177}178 179define float @v_powi_neg2_f32(float %l) {180; GFX7-LABEL: v_powi_neg2_f32:181; GFX7: ; %bb.0:182; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)183; GFX7-NEXT: v_mul_f32_e32 v0, v0, v0184; GFX7-NEXT: v_div_scale_f32 v1, s[4:5], v0, v0, 1.0185; GFX7-NEXT: v_rcp_f32_e32 v2, v1186; GFX7-NEXT: v_div_scale_f32 v3, vcc, 1.0, v0, 1.0187; GFX7-NEXT: v_fma_f32 v4, -v1, v2, 1.0188; GFX7-NEXT: v_fma_f32 v2, v4, v2, v2189; GFX7-NEXT: v_mul_f32_e32 v4, v3, v2190; GFX7-NEXT: v_fma_f32 v5, -v1, v4, v3191; GFX7-NEXT: v_fma_f32 v4, v5, v2, v4192; GFX7-NEXT: v_fma_f32 v1, -v1, v4, v3193; GFX7-NEXT: v_div_fmas_f32 v1, v1, v2, v4194; GFX7-NEXT: v_div_fixup_f32 v0, v1, v0, 1.0195; GFX7-NEXT: s_setpc_b64 s[30:31]196;197; GFX8-LABEL: v_powi_neg2_f32:198; GFX8: ; %bb.0:199; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)200; GFX8-NEXT: v_mul_f32_e32 v0, v0, v0201; GFX8-NEXT: v_div_scale_f32 v1, s[4:5], v0, v0, 1.0202; GFX8-NEXT: v_div_scale_f32 v2, vcc, 1.0, v0, 1.0203; GFX8-NEXT: v_rcp_f32_e32 v3, v1204; GFX8-NEXT: v_fma_f32 v4, -v1, v3, 1.0205; GFX8-NEXT: v_fma_f32 v3, v4, v3, v3206; GFX8-NEXT: v_mul_f32_e32 v4, v2, v3207; GFX8-NEXT: v_fma_f32 v5, -v1, v4, v2208; GFX8-NEXT: v_fma_f32 v4, v5, v3, v4209; GFX8-NEXT: v_fma_f32 v1, -v1, v4, v2210; GFX8-NEXT: v_div_fmas_f32 v1, v1, v3, v4211; GFX8-NEXT: v_div_fixup_f32 v0, v1, v0, 1.0212; GFX8-NEXT: s_setpc_b64 s[30:31]213;214; GFX11-LABEL: v_powi_neg2_f32:215; GFX11: ; %bb.0:216; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)217; GFX11-NEXT: v_mul_f32_e32 v0, v0, v0218; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)219; GFX11-NEXT: v_div_scale_f32 v1, null, v0, v0, 1.0220; GFX11-NEXT: v_rcp_f32_e32 v2, v1221; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)222; GFX11-NEXT: v_fma_f32 v3, -v1, v2, 1.0223; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)224; GFX11-NEXT: v_fmac_f32_e32 v2, v3, v2225; GFX11-NEXT: v_div_scale_f32 v3, vcc_lo, 1.0, v0, 1.0226; GFX11-NEXT: v_mul_f32_e32 v4, v3, v2227; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)228; GFX11-NEXT: v_fma_f32 v5, -v1, v4, v3229; GFX11-NEXT: v_fmac_f32_e32 v4, v5, v2230; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)231; GFX11-NEXT: v_fma_f32 v1, -v1, v4, v3232; GFX11-NEXT: v_div_fmas_f32 v1, v1, v2, v4233; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)234; GFX11-NEXT: v_div_fixup_f32 v0, v1, v0, 1.0235; GFX11-NEXT: s_setpc_b64 s[30:31]236 %res = call float @llvm.powi.f32.i32(float %l, i32 -2)237 ret float %res238}239 240define float @v_powi_4_f32(float %l) {241; GFX78-LABEL: v_powi_4_f32:242; GFX78: ; %bb.0:243; GFX78-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)244; GFX78-NEXT: v_mul_f32_e32 v0, v0, v0245; GFX78-NEXT: v_mul_f32_e32 v0, v0, v0246; GFX78-NEXT: s_setpc_b64 s[30:31]247;248; GFX11-LABEL: v_powi_4_f32:249; GFX11: ; %bb.0:250; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)251; GFX11-NEXT: v_mul_f32_e32 v0, v0, v0252; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)253; GFX11-NEXT: v_mul_f32_e32 v0, v0, v0254; GFX11-NEXT: s_setpc_b64 s[30:31]255 %res = call float @llvm.powi.f32.i32(float %l, i32 4)256 ret float %res257}258 259define float @v_powi_8_f32(float %l) {260; GFX78-LABEL: v_powi_8_f32:261; GFX78: ; %bb.0:262; GFX78-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)263; GFX78-NEXT: v_mul_f32_e32 v0, v0, v0264; GFX78-NEXT: v_mul_f32_e32 v0, v0, v0265; GFX78-NEXT: v_mul_f32_e32 v0, v0, v0266; GFX78-NEXT: s_setpc_b64 s[30:31]267;268; GFX11-LABEL: v_powi_8_f32:269; GFX11: ; %bb.0:270; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)271; GFX11-NEXT: v_mul_f32_e32 v0, v0, v0272; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)273; GFX11-NEXT: v_mul_f32_e32 v0, v0, v0274; GFX11-NEXT: v_mul_f32_e32 v0, v0, v0275; GFX11-NEXT: s_setpc_b64 s[30:31]276 %res = call float @llvm.powi.f32.i32(float %l, i32 8)277 ret float %res278}279 280define float @v_powi_16_f32(float %l) {281; GFX78-LABEL: v_powi_16_f32:282; GFX78: ; %bb.0:283; GFX78-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)284; GFX78-NEXT: v_mul_f32_e32 v0, v0, v0285; GFX78-NEXT: v_mul_f32_e32 v0, v0, v0286; GFX78-NEXT: v_mul_f32_e32 v0, v0, v0287; GFX78-NEXT: v_mul_f32_e32 v0, v0, v0288; GFX78-NEXT: s_setpc_b64 s[30:31]289;290; GFX11-LABEL: v_powi_16_f32:291; GFX11: ; %bb.0:292; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)293; GFX11-NEXT: v_mul_f32_e32 v0, v0, v0294; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)295; GFX11-NEXT: v_mul_f32_e32 v0, v0, v0296; GFX11-NEXT: v_mul_f32_e32 v0, v0, v0297; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)298; GFX11-NEXT: v_mul_f32_e32 v0, v0, v0299; GFX11-NEXT: s_setpc_b64 s[30:31]300 %res = call float @llvm.powi.f32.i32(float %l, i32 16)301 ret float %res302}303 304define float @v_powi_128_f32(float %l) {305; GFX78-LABEL: v_powi_128_f32:306; GFX78: ; %bb.0:307; GFX78-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)308; GFX78-NEXT: v_mul_f32_e32 v0, v0, v0309; GFX78-NEXT: v_mul_f32_e32 v0, v0, v0310; GFX78-NEXT: v_mul_f32_e32 v0, v0, v0311; GFX78-NEXT: v_mul_f32_e32 v0, v0, v0312; GFX78-NEXT: v_mul_f32_e32 v0, v0, v0313; GFX78-NEXT: v_mul_f32_e32 v0, v0, v0314; GFX78-NEXT: v_mul_f32_e32 v0, v0, v0315; GFX78-NEXT: s_setpc_b64 s[30:31]316;317; GFX11-LABEL: v_powi_128_f32:318; GFX11: ; %bb.0:319; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)320; GFX11-NEXT: v_mul_f32_e32 v0, v0, v0321; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)322; GFX11-NEXT: v_mul_f32_e32 v0, v0, v0323; GFX11-NEXT: v_mul_f32_e32 v0, v0, v0324; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)325; GFX11-NEXT: v_mul_f32_e32 v0, v0, v0326; GFX11-NEXT: v_mul_f32_e32 v0, v0, v0327; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)328; GFX11-NEXT: v_mul_f32_e32 v0, v0, v0329; GFX11-NEXT: v_mul_f32_e32 v0, v0, v0330; GFX11-NEXT: s_setpc_b64 s[30:31]331 %res = call float @llvm.powi.f32.i32(float %l, i32 128)332 ret float %res333}334 335define float @v_powi_neg128_f32(float %l) {336; GFX7-LABEL: v_powi_neg128_f32:337; GFX7: ; %bb.0:338; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)339; GFX7-NEXT: v_mul_f32_e32 v0, v0, v0340; GFX7-NEXT: v_mul_f32_e32 v0, v0, v0341; GFX7-NEXT: v_mul_f32_e32 v0, v0, v0342; GFX7-NEXT: v_mul_f32_e32 v0, v0, v0343; GFX7-NEXT: v_mul_f32_e32 v0, v0, v0344; GFX7-NEXT: v_mul_f32_e32 v0, v0, v0345; GFX7-NEXT: v_mul_f32_e32 v0, v0, v0346; GFX7-NEXT: v_div_scale_f32 v1, s[4:5], v0, v0, 1.0347; GFX7-NEXT: v_rcp_f32_e32 v2, v1348; GFX7-NEXT: v_div_scale_f32 v3, vcc, 1.0, v0, 1.0349; GFX7-NEXT: v_fma_f32 v4, -v1, v2, 1.0350; GFX7-NEXT: v_fma_f32 v2, v4, v2, v2351; GFX7-NEXT: v_mul_f32_e32 v4, v3, v2352; GFX7-NEXT: v_fma_f32 v5, -v1, v4, v3353; GFX7-NEXT: v_fma_f32 v4, v5, v2, v4354; GFX7-NEXT: v_fma_f32 v1, -v1, v4, v3355; GFX7-NEXT: v_div_fmas_f32 v1, v1, v2, v4356; GFX7-NEXT: v_div_fixup_f32 v0, v1, v0, 1.0357; GFX7-NEXT: s_setpc_b64 s[30:31]358;359; GFX8-LABEL: v_powi_neg128_f32:360; GFX8: ; %bb.0:361; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)362; GFX8-NEXT: v_mul_f32_e32 v0, v0, v0363; GFX8-NEXT: v_mul_f32_e32 v0, v0, v0364; GFX8-NEXT: v_mul_f32_e32 v0, v0, v0365; GFX8-NEXT: v_mul_f32_e32 v0, v0, v0366; GFX8-NEXT: v_mul_f32_e32 v0, v0, v0367; GFX8-NEXT: v_mul_f32_e32 v0, v0, v0368; GFX8-NEXT: v_mul_f32_e32 v0, v0, v0369; GFX8-NEXT: v_div_scale_f32 v1, s[4:5], v0, v0, 1.0370; GFX8-NEXT: v_div_scale_f32 v2, vcc, 1.0, v0, 1.0371; GFX8-NEXT: v_rcp_f32_e32 v3, v1372; GFX8-NEXT: v_fma_f32 v4, -v1, v3, 1.0373; GFX8-NEXT: v_fma_f32 v3, v4, v3, v3374; GFX8-NEXT: v_mul_f32_e32 v4, v2, v3375; GFX8-NEXT: v_fma_f32 v5, -v1, v4, v2376; GFX8-NEXT: v_fma_f32 v4, v5, v3, v4377; GFX8-NEXT: v_fma_f32 v1, -v1, v4, v2378; GFX8-NEXT: v_div_fmas_f32 v1, v1, v3, v4379; GFX8-NEXT: v_div_fixup_f32 v0, v1, v0, 1.0380; GFX8-NEXT: s_setpc_b64 s[30:31]381;382; GFX11-LABEL: v_powi_neg128_f32:383; GFX11: ; %bb.0:384; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)385; GFX11-NEXT: v_mul_f32_e32 v0, v0, v0386; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)387; GFX11-NEXT: v_mul_f32_e32 v0, v0, v0388; GFX11-NEXT: v_mul_f32_e32 v0, v0, v0389; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)390; GFX11-NEXT: v_mul_f32_e32 v0, v0, v0391; GFX11-NEXT: v_mul_f32_e32 v0, v0, v0392; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)393; GFX11-NEXT: v_mul_f32_e32 v0, v0, v0394; GFX11-NEXT: v_mul_f32_e32 v0, v0, v0395; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)396; GFX11-NEXT: v_div_scale_f32 v1, null, v0, v0, 1.0397; GFX11-NEXT: v_rcp_f32_e32 v2, v1398; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)399; GFX11-NEXT: v_fma_f32 v3, -v1, v2, 1.0400; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)401; GFX11-NEXT: v_fmac_f32_e32 v2, v3, v2402; GFX11-NEXT: v_div_scale_f32 v3, vcc_lo, 1.0, v0, 1.0403; GFX11-NEXT: v_mul_f32_e32 v4, v3, v2404; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)405; GFX11-NEXT: v_fma_f32 v5, -v1, v4, v3406; GFX11-NEXT: v_fmac_f32_e32 v4, v5, v2407; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)408; GFX11-NEXT: v_fma_f32 v1, -v1, v4, v3409; GFX11-NEXT: v_div_fmas_f32 v1, v1, v2, v4410; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)411; GFX11-NEXT: v_div_fixup_f32 v0, v1, v0, 1.0412; GFX11-NEXT: s_setpc_b64 s[30:31]413 %res = call float @llvm.powi.f32.i32(float %l, i32 -128)414 ret float %res415}416 417; FIXME: f64 broken418; define double @v_powi_f64(double %l, i32 %r) {419; %res = call double @llvm.powi.f64.i32(double %l, i32 %r)420; ret double %res421; }422 423declare half @llvm.powi.f16.i32(half, i32) #0424declare float @llvm.powi.f32.i32(float, i32) #0425declare double @llvm.powi.f64.i32(double, i32) #0426 427attributes #0 = { nounwind readnone speculatable willreturn }428