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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 %s -o - | FileCheck -check-prefixes=GCN %s3; xUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 %s -o - | FileCheck -check-prefix=GCN %s4 5; FIXME: GlobalISel does not work with bf166 7declare bfloat @llvm.sin.bf16(bfloat) #08 9define amdgpu_kernel void @sin_bf16(ptr addrspace(1) %out, bfloat %src) #1 {10; GCN-LABEL: sin_bf16:11; GCN: ; %bb.0:12; GCN-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 113; GCN-NEXT: s_load_b96 s[0:2], s[4:5], 0x014; GCN-NEXT: s_mov_b32 s3, 0x3e23000015; GCN-NEXT: v_mov_b32_e32 v1, 016; GCN-NEXT: s_wait_kmcnt 0x017; GCN-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 2, 2), 018; GCN-NEXT: v_fma_mixlo_bf16 v0, s2, s3, 0 op_sel_hi:[1,0,0]19; GCN-NEXT: s_delay_alu instid0(VALU_DEP_1)20; GCN-NEXT: v_sin_bf16_e32 v0, v021; GCN-NEXT: global_store_b16 v1, v0, s[0:1]22; GCN-NEXT: s_endpgm23 %sin = call bfloat @llvm.sin.bf16(bfloat %src) #024 store bfloat %sin, ptr addrspace(1) %out, align 225 ret void26}27 28define amdgpu_kernel void @sin_bf16_constant_4(ptr addrspace(1) %out) #1 {29; GCN-LABEL: sin_bf16_constant_4:30; GCN: ; %bb.0:31; GCN-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 132; GCN-NEXT: s_load_b64 s[0:1], s[4:5], 0x033; GCN-NEXT: v_sin_bf16_e32 v0, 0x3f2334; GCN-NEXT: v_mov_b32_e32 v1, 035; GCN-NEXT: s_wait_kmcnt 0x036; GCN-NEXT: global_store_b16 v1, v0, s[0:1]37; GCN-NEXT: s_endpgm38 %sin = call bfloat @llvm.sin.bf16(bfloat 4.0) #039 store bfloat %sin, ptr addrspace(1) %out, align 240 ret void41}42 43define amdgpu_kernel void @sin_bf16_constant_100(ptr addrspace(1) %out) #1 {44; GCN-LABEL: sin_bf16_constant_100:45; GCN: ; %bb.0:46; GCN-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 147; GCN-NEXT: s_load_b64 s[0:1], s[4:5], 0x048; GCN-NEXT: v_sin_bf16_e32 v0, 0x417f49; GCN-NEXT: v_mov_b32_e32 v1, 050; GCN-NEXT: s_wait_kmcnt 0x051; GCN-NEXT: global_store_b16 v1, v0, s[0:1]52; GCN-NEXT: s_endpgm53 %sin = call bfloat @llvm.sin.bf16(bfloat 100.0) #054 store bfloat %sin, ptr addrspace(1) %out, align 255 ret void56}57 58attributes #0 = { nounwind readnone }59attributes #1 = { nounwind }60