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1; RUN: llc -mtriple=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s2; RUN: llc -mtriple=amdgcn -mcpu=kaveri < %s | FileCheck -check-prefixes=GCN,SICIVI,FUNC %s3; RUN: llc -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefixes=GCN,SICIVI,FUNC %s4; RUN: llc -mtriple=amdgcn -mcpu=fiji < %s | FileCheck -check-prefixes=GCN,SICIVI,FUNC %s5; RUN: llc -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,GFX9,FUNC %s6 7; FUNC-LABEL: sin_f328; EG: MULADD_IEEE *9; EG: FRACT *10; EG: ADD *11; EG: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}12; EG-NOT: SIN13 14; GCN: v_mul_f3215; SICIVI: v_fract_f3216; GFX9-NOT: v_fract_f3217; GCN: v_sin_f3218; GCN-NOT: v_sin_f3219define amdgpu_kernel void @sin_f32(ptr addrspace(1) %out, float %x) {20 %sin = call float @llvm.sin.f32(float %x)21 store float %sin, ptr addrspace(1) %out22 ret void23}24 25; FUNC-LABEL: {{^}}safe_sin_3x_f32:26; GCN: v_mul_f3227; GCN: v_mul_f3228; SICIVI: v_fract_f3229; GFX9-NOT: v_fract_f3230; GCN: v_sin_f3231; GCN-NOT: v_sin_f3232define amdgpu_kernel void @safe_sin_3x_f32(ptr addrspace(1) %out, float %x) {33 %y = fmul float 3.0, %x34 %sin = call float @llvm.sin.f32(float %y)35 store float %sin, ptr addrspace(1) %out36 ret void37}38 39; FUNC-LABEL: {{^}}unsafe_sin_3x_f32:40; GCN-NOT: v_add_f3241; GCN: 0x3ef4764442; GCN: v_mul_f3243; SICIVI: v_fract_f3244; GFX9-NOT: v_fract_f3245; GCN: v_sin_f3246; GCN-NOT: v_sin_f3247define amdgpu_kernel void @unsafe_sin_3x_f32(ptr addrspace(1) %out, float %x) {48 %y = fmul reassoc float 3.0, %x49 %sin = call reassoc float @llvm.sin.f32(float %y)50 store float %sin, ptr addrspace(1) %out51 ret void52}53 54; FUNC-LABEL: {{^}}fmf_sin_3x_f32:55; GCN-NOT: v_add_f3256; GCN: 0x3ef4764457; GCN: v_mul_f3258; SICIVI: v_fract_f3259; GFX9-NOT: v_fract_f3260; GCN: v_sin_f3261; GCN-NOT: v_sin_f3262define amdgpu_kernel void @fmf_sin_3x_f32(ptr addrspace(1) %out, float %x) {63 %y = fmul reassoc float 3.0, %x64 %sin = call reassoc float @llvm.sin.f32(float %y)65 store float %sin, ptr addrspace(1) %out66 ret void67}68 69; FUNC-LABEL: {{^}}safe_sin_2x_f32:70; GCN: v_add_f3271; GCN: v_mul_f3272; SICIVI: v_fract_f3273; GFX9-NOT: v_fract_f3274; GCN: v_sin_f3275; GCN-NOT: v_sin_f3276define amdgpu_kernel void @safe_sin_2x_f32(ptr addrspace(1) %out, float %x) {77 %y = fmul float 2.0, %x78 %sin = call float @llvm.sin.f32(float %y)79 store float %sin, ptr addrspace(1) %out80 ret void81}82 83; FUNC-LABEL: {{^}}unsafe_sin_2x_f32:84; GCN-NOT: v_add_f3285; GCN: 0x3ea2f98386; GCN: v_mul_f3287; SICIVI: v_fract_f3288; GFX9-NOT: v_fract_f3289; GCN: v_sin_f3290; GCN-NOT: v_sin_f3291define amdgpu_kernel void @unsafe_sin_2x_f32(ptr addrspace(1) %out, float %x) {92 %y = fmul reassoc float 2.0, %x93 %sin = call reassoc float @llvm.sin.f32(float %y)94 store float %sin, ptr addrspace(1) %out95 ret void96}97 98; FUNC-LABEL: {{^}}fmf_sin_2x_f32:99; GCN-NOT: v_add_f32100; GCN: 0x3ea2f983101; GCN: v_mul_f32102; SICIVI: v_fract_f32103; GFX9-NOT: v_fract_f32104; GCN: v_sin_f32105; GCN-NOT: v_sin_f32106define amdgpu_kernel void @fmf_sin_2x_f32(ptr addrspace(1) %out, float %x) {107 %y = fmul reassoc float 2.0, %x108 %sin = call reassoc float @llvm.sin.f32(float %y)109 store float %sin, ptr addrspace(1) %out110 ret void111}112 113; FUNC-LABEL: {{^}}safe_sin_cancel_f32:114; GCN: v_mul_f32115; GCN: v_mul_f32116; SICIVI: v_fract_f32117; GFX9-NOT: v_fract_f32118; GCN: v_sin_f32119; GCN-NOT: v_sin_f32120define amdgpu_kernel void @safe_sin_cancel_f32(ptr addrspace(1) %out, float %x) {121 %y = fmul float 0x401921FB60000000, %x122 %sin = call float @llvm.sin.f32(float %y)123 store float %sin, ptr addrspace(1) %out124 ret void125}126 127; FUNC-LABEL: {{^}}unsafe_sin_cancel_f32:128; GCN-NOT: v_add_f32129; GCN-NOT: v_mul_f32130; SICIVI: v_fract_f32131; GFX9-NOT: v_fract_f32132; GCN: v_sin_f32133; GCN-NOT: v_sin_f32134define amdgpu_kernel void @unsafe_sin_cancel_f32(ptr addrspace(1) %out, float %x) {135 %y = fmul reassoc float 0x401921FB60000000, %x136 %sin = call reassoc float @llvm.sin.f32(float %y)137 store float %sin, ptr addrspace(1) %out138 ret void139}140 141; FUNC-LABEL: {{^}}fmf_sin_cancel_f32:142; GCN-NOT: v_add_f32143; GCN-NOT: v_mul_f32144; SICIVI: v_fract_f32145; GFX9-NOT: v_fract_f32146; GCN: v_sin_f32147; GCN-NOT: v_sin_f32148define amdgpu_kernel void @fmf_sin_cancel_f32(ptr addrspace(1) %out, float %x) {149 %y = fmul reassoc float 0x401921FB60000000, %x150 %sin = call reassoc float @llvm.sin.f32(float %y)151 store float %sin, ptr addrspace(1) %out152 ret void153}154 155; FUNC-LABEL: {{^}}sin_v4f32:156; EG: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}157; EG: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}158; EG: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}159; EG: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}160; EG-NOT: SIN161 162; GCN: v_sin_f32163; GCN: v_sin_f32164; GCN: v_sin_f32165; GCN: v_sin_f32166; GCN-NOT: v_sin_f32167define amdgpu_kernel void @sin_v4f32(ptr addrspace(1) %out, <4 x float> %vx) {168 %sin = call <4 x float> @llvm.sin.v4f32( <4 x float> %vx)169 store <4 x float> %sin, ptr addrspace(1) %out170 ret void171}172 173declare float @llvm.sin.f32(float) #0174declare <4 x float> @llvm.sin.v4f32(<4 x float>) #0175 176attributes #0 = { nounwind readnone }177