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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 62; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck %s3 4; Check that invariant global loads are treated like constant5; loads. The optnone disables the annotation of of amdgpu.noclobber.6 7define amdgpu_kernel void @load_constant_v3i64(ptr addrspace(1) %dst, ptr addrspace(4) %src) #0 {8; CHECK-LABEL: load_constant_v3i64:9; CHECK: ; %bb.0:10; CHECK-NEXT: v_mov_b32_e32 v4, 011; CHECK-NEXT: s_load_dwordx2 s[4:5], s[8:9], 0x012; CHECK-NEXT: s_load_dwordx2 s[6:7], s[8:9], 0x813; CHECK-NEXT: s_waitcnt lgkmcnt(0)14; CHECK-NEXT: s_load_dwordx4 s[0:3], s[6:7], 0x015; CHECK-NEXT: s_nop 016; CHECK-NEXT: s_load_dwordx2 s[6:7], s[6:7], 0x1017; CHECK-NEXT: s_waitcnt lgkmcnt(0)18; CHECK-NEXT: v_mov_b32_e32 v0, s619; CHECK-NEXT: v_mov_b32_e32 v1, s720; CHECK-NEXT: global_store_dwordx2 v4, v[0:1], s[4:5] offset:1621; CHECK-NEXT: v_mov_b32_e32 v0, s022; CHECK-NEXT: v_mov_b32_e32 v1, s123; CHECK-NEXT: v_mov_b32_e32 v2, s224; CHECK-NEXT: v_mov_b32_e32 v3, s325; CHECK-NEXT: global_store_dwordx4 v4, v[0:3], s[4:5]26; CHECK-NEXT: s_endpgm27 %ld = load <3 x i64>, ptr addrspace(4) %src, align 3228 store <3 x i64> %ld, ptr addrspace(1) %dst, align 3229 ret void30}31 32define amdgpu_kernel void @load_global_v3i64(ptr addrspace(1) %dst, ptr addrspace(1) %src) #0 {33; CHECK-LABEL: load_global_v3i64:34; CHECK: ; %bb.0:35; CHECK-NEXT: v_mov_b32_e32 v6, 036; CHECK-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x037; CHECK-NEXT: s_load_dwordx2 s[2:3], s[8:9], 0x838; CHECK-NEXT: s_waitcnt lgkmcnt(0)39; CHECK-NEXT: global_load_dwordx4 v[0:3], v6, s[2:3]40; CHECK-NEXT: global_load_dwordx2 v[4:5], v6, s[2:3] offset:1641; CHECK-NEXT: s_waitcnt vmcnt(0)42; CHECK-NEXT: global_store_dwordx2 v6, v[4:5], s[0:1] offset:1643; CHECK-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]44; CHECK-NEXT: s_endpgm45 %ld = load <3 x i64>, ptr addrspace(1) %src, align 3246 store <3 x i64> %ld, ptr addrspace(1) %dst, align 3247 ret void48}49 50define amdgpu_kernel void @load_global_v3i64_invariant(ptr addrspace(1) %dst, ptr addrspace(1) %src) #0 {51; CHECK-LABEL: load_global_v3i64_invariant:52; CHECK: ; %bb.0:53; CHECK-NEXT: v_mov_b32_e32 v4, 054; CHECK-NEXT: s_load_dwordx2 s[4:5], s[8:9], 0x055; CHECK-NEXT: s_load_dwordx2 s[6:7], s[8:9], 0x856; CHECK-NEXT: s_waitcnt lgkmcnt(0)57; CHECK-NEXT: s_load_dwordx4 s[0:3], s[6:7], 0x058; CHECK-NEXT: s_nop 059; CHECK-NEXT: s_load_dwordx2 s[6:7], s[6:7], 0x1060; CHECK-NEXT: s_waitcnt lgkmcnt(0)61; CHECK-NEXT: v_mov_b32_e32 v0, s662; CHECK-NEXT: v_mov_b32_e32 v1, s763; CHECK-NEXT: global_store_dwordx2 v4, v[0:1], s[4:5] offset:1664; CHECK-NEXT: v_mov_b32_e32 v0, s065; CHECK-NEXT: v_mov_b32_e32 v1, s166; CHECK-NEXT: v_mov_b32_e32 v2, s267; CHECK-NEXT: v_mov_b32_e32 v3, s368; CHECK-NEXT: global_store_dwordx4 v4, v[0:3], s[4:5]69; CHECK-NEXT: s_endpgm70 %ld = load <3 x i64>, ptr addrspace(1) %src, align 32, !invariant.load !071 store <3 x i64> %ld, ptr addrspace(1) %dst, align 3272 ret void73}74 75attributes #0 = { noinline nounwind optnone }76 77!0 = !{}78