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1; RUN: llc -mtriple=amdgcn < %s | FileCheck -check-prefixes=GCN,SICIVI,FUNC %s2; RUN: llc -mtriple=amdgcn -mcpu=tonga -mattr=-enable-ds128 < %s | FileCheck -check-prefixes=GCN,SICIVI,FUNC %s3; RUN: llc -mtriple=r600 -mcpu=redwood < %s | FileCheck -check-prefixes=EG,FUNC %s4 5; Testing for ds_read/write_1286; RUN: llc -mtriple=amdgcn -mcpu=tahiti -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=SI,FUNC %s7; RUN: llc -mtriple=amdgcn -mcpu=tonga -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s8; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s9 10; FUNC-LABEL: {{^}}load_f32_local:11; SICIVI: s_mov_b32 m012; GFX9-NOT: m013; GCN: ds_read_b3214 15; EG: LDS_READ_RET16define amdgpu_kernel void @load_f32_local(ptr addrspace(1) %out, ptr addrspace(3) %in) #0 {17entry:18 %tmp0 = load float, ptr addrspace(3) %in19 store float %tmp0, ptr addrspace(1) %out20 ret void21}22 23; FUNC-LABEL: {{^}}load_v2f32_local:24; SICIVI: s_mov_b32 m025; GFX9-NOT: m026 27; GCN: ds_read_b6428 29; EG: LDS_READ_RET30; EG: LDS_READ_RET31define amdgpu_kernel void @load_v2f32_local(ptr addrspace(1) %out, ptr addrspace(3) %in) #0 {32entry:33 %tmp0 = load <2 x float>, ptr addrspace(3) %in34 store <2 x float> %tmp0, ptr addrspace(1) %out35 ret void36}37 38; FIXME: should this do a read2_b64?39; FUNC-LABEL: {{^}}local_load_v3f32:40; SICIVI: s_mov_b32 m041; GFX9-NOT: m042 43; SI-DAG: ds_read_b32 v{{[0-9]+}}, v{{[0-9]+}} offset:844; SI-DAG: ds_read_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+$}}45; CIVI-DAG: ds_read_b96 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+$}}46; GCN: s_waitcnt47; SI-DAG: ds_write_b6448; SI-DAG: ds_write_b32 v{{[0-9]+}}, v{{[0-9]+}} offset:8{{$}}49; CIVI-DAG: ds_write_b96 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}50 51; EG: LDS_READ_RET52; EG: LDS_READ_RET53; EG: LDS_READ_RET54define amdgpu_kernel void @local_load_v3f32(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {55entry:56 %tmp0 = load <3 x float>, ptr addrspace(3) %in57 store <3 x float> %tmp0, ptr addrspace(3) %out58 ret void59}60 61; FUNC-LABEL: {{^}}local_load_v4f32:62; SICIVI: s_mov_b32 m063; GFX9-NOT: m064 65; GCN: ds_read2_b6466 67; EG: LDS_READ_RET68; EG: LDS_READ_RET69; EG: LDS_READ_RET70; EG: LDS_READ_RET71define amdgpu_kernel void @local_load_v4f32(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {72entry:73 %tmp0 = load <4 x float>, ptr addrspace(3) %in74 store <4 x float> %tmp0, ptr addrspace(3) %out75 ret void76}77 78; FUNC-LABEL: {{^}}local_load_v8f32:79; SICIVI: s_mov_b32 m080; GFX9-NOT: m081 82; GCN: ds_read2_b6483; GCN: ds_read2_b6484 85; EG: LDS_READ_RET86; EG: LDS_READ_RET87; EG: LDS_READ_RET88; EG: LDS_READ_RET89; EG: LDS_READ_RET90; EG: LDS_READ_RET91; EG: LDS_READ_RET92; EG: LDS_READ_RET93define amdgpu_kernel void @local_load_v8f32(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {94entry:95 %tmp0 = load <8 x float>, ptr addrspace(3) %in96 store <8 x float> %tmp0, ptr addrspace(3) %out97 ret void98}99 100; FUNC-LABEL: {{^}}local_load_v16f32:101; SICIVI: s_mov_b32 m0102; GFX9-NOT: m0103 104; GCN: ds_read2_b64105; GCN: ds_read2_b64106; GCN: ds_read2_b64107; GCN: ds_read2_b64108 109; EG: LDS_READ_RET110; EG: LDS_READ_RET111; EG: LDS_READ_RET112; EG: LDS_READ_RET113; EG: LDS_READ_RET114; EG: LDS_READ_RET115; EG: LDS_READ_RET116; EG: LDS_READ_RET117; EG: LDS_READ_RET118; EG: LDS_READ_RET119; EG: LDS_READ_RET120; EG: LDS_READ_RET121; EG: LDS_READ_RET122; EG: LDS_READ_RET123; EG: LDS_READ_RET124; EG: LDS_READ_RET125define amdgpu_kernel void @local_load_v16f32(ptr addrspace(3) %out, ptr addrspace(3) %in) #0 {126entry:127 %tmp0 = load <16 x float>, ptr addrspace(3) %in128 store <16 x float> %tmp0, ptr addrspace(3) %out129 ret void130}131 132; Tests if ds_read/write_b128 gets generated for the 16 byte aligned load.133; FUNC-LABEL: {{^}}local_v4f32_to_128:134 135; SI-NOT: ds_read_b128136; SI-NOT: ds_write_b128137 138; CIVI: ds_read_b128139; CIVI: ds_write_b128140 141; EG: LDS_READ_RET142; EG: LDS_READ_RET143; EG: LDS_READ_RET144; EG: LDS_READ_RET145define amdgpu_kernel void @local_v4f32_to_128(ptr addrspace(3) %out, ptr addrspace(3) %in) {146 %ld = load <4 x float>, ptr addrspace(3) %in, align 16147 store <4 x float> %ld, ptr addrspace(3) %out, align 16148 ret void149}150 151attributes #0 = { nounwind }152