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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=verde --amdgpu-lower-module-lds-strategy=module < %s | FileCheck %s -check-prefixes=GCN,SI3; RUN: llc -mtriple=amdgcn -mcpu=bonaire --amdgpu-lower-module-lds-strategy=module < %s | FileCheck %s -check-prefixes=GCN,CI4 5@local_memory.local_mem = internal unnamed_addr addrspace(3) global [128 x i32] poison, align 46 7define amdgpu_kernel void @local_memory(ptr addrspace(1) %out) #0 {8; GCN-LABEL: local_memory:9; GCN: ; %bb.0: ; %entry10; GCN-NEXT: v_lshlrev_b32_e32 v1, 2, v011; GCN-NEXT: s_mov_b32 m0, -112; GCN-NEXT: ds_write_b32 v1, v013; GCN-NEXT: v_add_i32_e32 v0, vcc, 1, v014; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 16, v015; GCN-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc16; GCN-NEXT: v_lshlrev_b32_e32 v0, 2, v017; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x918; GCN-NEXT: s_waitcnt lgkmcnt(0)19; GCN-NEXT: s_barrier20; GCN-NEXT: ds_read_b32 v0, v021; GCN-NEXT: s_mov_b32 s2, 022; GCN-NEXT: s_mov_b32 s3, 0xf00023; GCN-NEXT: v_mov_b32_e32 v2, 024; GCN-NEXT: s_waitcnt lgkmcnt(0)25; GCN-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr6426; GCN-NEXT: s_endpgm27entry:28 %y.i = call i32 @llvm.amdgcn.workitem.id.x() #129 %arrayidx = getelementptr inbounds [128 x i32], ptr addrspace(3) @local_memory.local_mem, i32 0, i32 %y.i30 store i32 %y.i, ptr addrspace(3) %arrayidx, align 431 %add = add nsw i32 %y.i, 132 %cmp = icmp eq i32 %add, 1633 %.add = select i1 %cmp, i32 0, i32 %add34 call void @llvm.amdgcn.s.barrier()35 %arrayidx1 = getelementptr inbounds [128 x i32], ptr addrspace(3) @local_memory.local_mem, i32 0, i32 %.add36 %tmp = load i32, ptr addrspace(3) %arrayidx1, align 437 %arrayidx2 = getelementptr inbounds i32, ptr addrspace(1) %out, i32 %y.i38 store i32 %tmp, ptr addrspace(1) %arrayidx2, align 439 ret void40}41 42@local_memory_two_objects.local_mem0 = internal unnamed_addr addrspace(3) global [4 x i32] poison, align 443@local_memory_two_objects.local_mem1 = internal unnamed_addr addrspace(3) global [4 x i32] poison, align 444 45; Check that the LDS size emitted correctly46define amdgpu_kernel void @local_memory_two_objects(ptr addrspace(1) %out) #0 {47; SI-LABEL: local_memory_two_objects:48; SI: ; %bb.0: ; %entry49; SI-NEXT: v_lshlrev_b32_e32 v1, 2, v050; SI-NEXT: v_lshlrev_b32_e32 v2, 1, v051; SI-NEXT: s_mov_b32 m0, -152; SI-NEXT: ds_write2_b32 v1, v0, v2 offset1:453; SI-NEXT: v_sub_i32_e32 v0, vcc, 12, v154; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x955; SI-NEXT: s_waitcnt lgkmcnt(0)56; SI-NEXT: s_barrier57; SI-NEXT: v_sub_i32_e32 v2, vcc, 28, v158; SI-NEXT: ds_read_b32 v0, v059; SI-NEXT: ds_read_b32 v3, v260; SI-NEXT: s_mov_b32 s3, 0xf00061; SI-NEXT: s_mov_b32 s2, 062; SI-NEXT: v_mov_b32_e32 v2, 063; SI-NEXT: s_waitcnt lgkmcnt(1)64; SI-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr6465; SI-NEXT: s_waitcnt lgkmcnt(0)66; SI-NEXT: buffer_store_dword v3, v[1:2], s[0:3], 0 addr64 offset:1667; SI-NEXT: s_endpgm68;69; CI-LABEL: local_memory_two_objects:70; CI: ; %bb.0: ; %entry71; CI-NEXT: v_lshlrev_b32_e32 v1, 2, v072; CI-NEXT: v_lshlrev_b32_e32 v2, 1, v073; CI-NEXT: s_mov_b32 m0, -174; CI-NEXT: ds_write2_b32 v1, v0, v2 offset1:475; CI-NEXT: v_sub_i32_e32 v0, vcc, 0, v176; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x977; CI-NEXT: s_waitcnt lgkmcnt(0)78; CI-NEXT: s_barrier79; CI-NEXT: ds_read2_b32 v[3:4], v0 offset0:3 offset1:780; CI-NEXT: s_mov_b32 s3, 0xf00081; CI-NEXT: s_mov_b32 s2, 082; CI-NEXT: v_mov_b32_e32 v2, 083; CI-NEXT: s_waitcnt lgkmcnt(0)84; CI-NEXT: buffer_store_dword v3, v[1:2], s[0:3], 0 addr6485; CI-NEXT: buffer_store_dword v4, v[1:2], s[0:3], 0 addr64 offset:1686; CI-NEXT: s_endpgm87entry:88 %x.i = call i32 @llvm.amdgcn.workitem.id.x()89 %arrayidx = getelementptr inbounds [4 x i32], ptr addrspace(3) @local_memory_two_objects.local_mem0, i32 0, i32 %x.i90 store i32 %x.i, ptr addrspace(3) %arrayidx, align 491 %mul = shl nsw i32 %x.i, 192 %arrayidx1 = getelementptr inbounds [4 x i32], ptr addrspace(3) @local_memory_two_objects.local_mem1, i32 0, i32 %x.i93 store i32 %mul, ptr addrspace(3) %arrayidx1, align 494 %sub = sub nsw i32 3, %x.i95 call void @llvm.amdgcn.s.barrier()96 %arrayidx2 = getelementptr inbounds [4 x i32], ptr addrspace(3) @local_memory_two_objects.local_mem0, i32 0, i32 %sub97 %tmp = load i32, ptr addrspace(3) %arrayidx2, align 498 %arrayidx3 = getelementptr inbounds i32, ptr addrspace(1) %out, i32 %x.i99 store i32 %tmp, ptr addrspace(1) %arrayidx3, align 4100 %arrayidx4 = getelementptr inbounds [4 x i32], ptr addrspace(3) @local_memory_two_objects.local_mem1, i32 0, i32 %sub101 %tmp1 = load i32, ptr addrspace(3) %arrayidx4, align 4102 %add = add nsw i32 %x.i, 4103 %arrayidx5 = getelementptr inbounds i32, ptr addrspace(1) %out, i32 %add104 store i32 %tmp1, ptr addrspace(1) %arrayidx5, align 4105 ret void106}107 108declare i32 @llvm.amdgcn.workitem.id.x() #1109declare void @llvm.amdgcn.s.barrier() #2110 111attributes #0 = { nounwind }112attributes #1 = { nounwind readnone }113attributes #2 = { convergent nounwind }114