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1; RUN: llc -mtriple=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s2 3@local_memory.local_mem = internal unnamed_addr addrspace(3) global [128 x i32] poison, align 44 5; Check that the LDS size emitted correctly6; EG: .long 1661207; EG-NEXT: .long 1288 9; FUNC-LABEL: {{^}}local_memory:10 11; EG: LDS_WRITE12 13; GROUP_BARRIER must be the last instruction in a clause14; EG: GROUP_BARRIER15; EG-NEXT: ALU clause16 17; EG: LDS_READ_RET18define amdgpu_kernel void @local_memory(ptr addrspace(1) %out) #0 {19entry:20  %y.i = call i32 @llvm.r600.read.tidig.x() #121  %arrayidx = getelementptr inbounds [128 x i32], ptr addrspace(3) @local_memory.local_mem, i32 0, i32 %y.i22  store i32 %y.i, ptr addrspace(3) %arrayidx, align 423  %add = add nsw i32 %y.i, 124  %cmp = icmp eq i32 %add, 1625  %.add = select i1 %cmp, i32 0, i32 %add26  call void @llvm.r600.group.barrier()27  %arrayidx1 = getelementptr inbounds [128 x i32], ptr addrspace(3) @local_memory.local_mem, i32 0, i32 %.add28  %tmp = load i32, ptr addrspace(3) %arrayidx1, align 429  %arrayidx2 = getelementptr inbounds i32, ptr addrspace(1) %out, i32 %y.i30  store i32 %tmp, ptr addrspace(1) %arrayidx2, align 431  ret void32}33 34@local_memory_two_objects.local_mem0 = internal unnamed_addr addrspace(3) global [4 x i32] poison, align 435@local_memory_two_objects.local_mem1 = internal unnamed_addr addrspace(3) global [4 x i32] poison, align 436 37; Check that the LDS size emitted correctly38; EG: .long 16612039; EG-NEXT: .long 840; GCN: .long 4718041; GCN-NEXT: .long 3290042 43; FUNC-LABEL: {{^}}local_memory_two_objects:44 45; We would like to check the lds writes are using different46; addresses, but due to variations in the scheduler, we can't do47; this consistently on evergreen GPUs.48; EG: LDS_WRITE49; EG: LDS_WRITE50 51; GROUP_BARRIER must be the last instruction in a clause52; EG: GROUP_BARRIER53; EG-NEXT: ALU clause54 55; Make sure the lds reads are using different addresses, at different56; constant offsets.57; EG: LDS_READ_RET {{[*]*}} OQAP, {{PV|T}}[[ADDRR:[0-9]*\.[XYZW]]]58; EG-NOT: LDS_READ_RET {{[*]*}} OQAP, T[[ADDRR]]59 60define amdgpu_kernel void @local_memory_two_objects(ptr addrspace(1) %out) #0 {61entry:62  %x.i = call i32 @llvm.r600.read.tidig.x() #163  %arrayidx = getelementptr inbounds [4 x i32], ptr addrspace(3) @local_memory_two_objects.local_mem0, i32 0, i32 %x.i64  store i32 %x.i, ptr addrspace(3) %arrayidx, align 465  %mul = shl nsw i32 %x.i, 166  %arrayidx1 = getelementptr inbounds [4 x i32], ptr addrspace(3) @local_memory_two_objects.local_mem1, i32 0, i32 %x.i67  store i32 %mul, ptr addrspace(3) %arrayidx1, align 468  %sub = sub nsw i32 3, %x.i69  call void @llvm.r600.group.barrier()70  %arrayidx2 = getelementptr inbounds [4 x i32], ptr addrspace(3) @local_memory_two_objects.local_mem0, i32 0, i32 %sub71  %tmp = load i32, ptr addrspace(3) %arrayidx2, align 472  %arrayidx3 = getelementptr inbounds i32, ptr addrspace(1) %out, i32 %x.i73  store i32 %tmp, ptr addrspace(1) %arrayidx3, align 474  %arrayidx4 = getelementptr inbounds [4 x i32], ptr addrspace(3) @local_memory_two_objects.local_mem1, i32 0, i32 %sub75  %tmp1 = load i32, ptr addrspace(3) %arrayidx4, align 476  %add = add nsw i32 %x.i, 477  %arrayidx5 = getelementptr inbounds i32, ptr addrspace(1) %out, i32 %add78  store i32 %tmp1, ptr addrspace(1) %arrayidx5, align 479  ret void80}81 82declare i32 @llvm.r600.read.tidig.x() #183declare void @llvm.r600.group.barrier() #284 85attributes #0 = { nounwind }86attributes #1 = { nounwind readnone }87attributes #2 = { convergent nounwind }88