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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 < %s | FileCheck --check-prefix=MUBUF %s3; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 --mattr=+enable-flat-scratch < %s | FileCheck --check-prefix=FLATSCR %s4 5; Make sure we use the correct frame offset is used with the local6; frame area.7;8; %pin.low is allocated to offset 0.9;10; %local.area is assigned to the local frame offset by the11; LocalStackSlotAllocation pass at offset 4096.12;13; The %load1 access to %gep.large.offset initially used the stack14; pointer register and directly referenced the frame index. After15; LocalStackSlotAllocation, it would no longer refer to a frame index16; so eliminateFrameIndex would not adjust the access to use the17; correct FP offset.18 19define amdgpu_kernel void @local_stack_offset_uses_sp(ptr addrspace(1) %out) {20; MUBUF-LABEL: local_stack_offset_uses_sp:21; MUBUF:       ; %bb.0: ; %entry22; MUBUF-NEXT:    s_add_u32 s0, s0, s1723; MUBUF-NEXT:    v_mov_b32_e32 v1, 0x300024; MUBUF-NEXT:    s_addc_u32 s1, s1, 025; MUBUF-NEXT:    v_add_u32_e32 v0, 64, v126; MUBUF-NEXT:    v_mov_b32_e32 v1, 027; MUBUF-NEXT:    v_mov_b32_e32 v2, 0x200028; MUBUF-NEXT:    s_mov_b32 s4, 029; MUBUF-NEXT:    buffer_store_dword v1, v2, s[0:3], 0 offen30; MUBUF-NEXT:    s_waitcnt vmcnt(0)31; MUBUF-NEXT:  .LBB0_1: ; %loadstoreloop32; MUBUF-NEXT:    ; =>This Inner Loop Header: Depth=133; MUBUF-NEXT:    v_mov_b32_e32 v3, 0x300034; MUBUF-NEXT:    v_add_u32_e32 v2, s4, v335; MUBUF-NEXT:    s_add_i32 s4, s4, 136; MUBUF-NEXT:    s_cmpk_lt_u32 s4, 0x212037; MUBUF-NEXT:    buffer_store_byte v1, v2, s[0:3], 0 offen38; MUBUF-NEXT:    s_waitcnt vmcnt(0)39; MUBUF-NEXT:    s_cbranch_scc1 .LBB0_140; MUBUF-NEXT:  ; %bb.2: ; %split41; MUBUF-NEXT:    v_mov_b32_e32 v1, 0x50d042; MUBUF-NEXT:    buffer_load_dword v2, v1, s[0:3], 0 offen glc43; MUBUF-NEXT:    s_waitcnt vmcnt(0)44; MUBUF-NEXT:    buffer_load_dword v3, v1, s[0:3], 0 offen offset:4 glc45; MUBUF-NEXT:    s_waitcnt vmcnt(0)46; MUBUF-NEXT:    buffer_load_dword v4, v0, s[0:3], 0 offen glc47; MUBUF-NEXT:    s_waitcnt vmcnt(0)48; MUBUF-NEXT:    buffer_load_dword v5, v0, s[0:3], 0 offen offset:4 glc49; MUBUF-NEXT:    s_waitcnt vmcnt(0)50; MUBUF-NEXT:    s_load_dwordx2 s[4:5], s[8:9], 0x051; MUBUF-NEXT:    v_mov_b32_e32 v6, 052; MUBUF-NEXT:    v_add_co_u32_e32 v0, vcc, v2, v453; MUBUF-NEXT:    v_addc_co_u32_e32 v1, vcc, v3, v5, vcc54; MUBUF-NEXT:    s_waitcnt lgkmcnt(0)55; MUBUF-NEXT:    global_store_dwordx2 v6, v[0:1], s[4:5]56; MUBUF-NEXT:    s_waitcnt vmcnt(0)57; MUBUF-NEXT:    s_endpgm58;59; FLATSCR-LABEL: local_stack_offset_uses_sp:60; FLATSCR:       ; %bb.0: ; %entry61; FLATSCR-NEXT:    s_add_u32 flat_scratch_lo, s8, s1362; FLATSCR-NEXT:    s_addc_u32 flat_scratch_hi, s9, 063; FLATSCR-NEXT:    v_mov_b32_e32 v0, 064; FLATSCR-NEXT:    s_movk_i32 s0, 0x200065; FLATSCR-NEXT:    scratch_store_dword off, v0, s066; FLATSCR-NEXT:    s_waitcnt vmcnt(0)67; FLATSCR-NEXT:    s_mov_b32 s0, 068; FLATSCR-NEXT:  .LBB0_1: ; %loadstoreloop69; FLATSCR-NEXT:    ; =>This Inner Loop Header: Depth=170; FLATSCR-NEXT:    s_add_i32 s1, s0, 0x300071; FLATSCR-NEXT:    s_add_i32 s0, s0, 172; FLATSCR-NEXT:    s_cmpk_lt_u32 s0, 0x212073; FLATSCR-NEXT:    scratch_store_byte off, v0, s174; FLATSCR-NEXT:    s_waitcnt vmcnt(0)75; FLATSCR-NEXT:    s_cbranch_scc1 .LBB0_176; FLATSCR-NEXT:  ; %bb.2: ; %split77; FLATSCR-NEXT:    s_movk_i32 s0, 0x200078; FLATSCR-NEXT:    s_addk_i32 s0, 0x300079; FLATSCR-NEXT:    scratch_load_dwordx2 v[0:1], off, s0 offset:208 glc80; FLATSCR-NEXT:    s_waitcnt vmcnt(0)81; FLATSCR-NEXT:    s_movk_i32 s0, 0x300082; FLATSCR-NEXT:    scratch_load_dwordx2 v[2:3], off, s0 offset:64 glc83; FLATSCR-NEXT:    s_waitcnt vmcnt(0)84; FLATSCR-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x085; FLATSCR-NEXT:    v_mov_b32_e32 v4, 086; FLATSCR-NEXT:    v_add_co_u32_e32 v0, vcc, v0, v287; FLATSCR-NEXT:    v_addc_co_u32_e32 v1, vcc, v1, v3, vcc88; FLATSCR-NEXT:    s_waitcnt lgkmcnt(0)89; FLATSCR-NEXT:    global_store_dwordx2 v4, v[0:1], s[0:1]90; FLATSCR-NEXT:    s_waitcnt vmcnt(0)91; FLATSCR-NEXT:    s_endpgm92entry:93  %pin.low = alloca i32, align 8192, addrspace(5)94  %local.area = alloca [1060 x i64], align 4096, addrspace(5)95  store volatile i32 0, ptr addrspace(5) %pin.low96  call void @llvm.memset.p5.i32(ptr addrspace(5) align 4 %local.area, i8 0, i32 8480, i1 true)97  %gep.large.offset = getelementptr inbounds [1060 x i64], ptr addrspace(5) %local.area, i64 0, i64 105098  %gep.small.offset = getelementptr inbounds [1060 x i64], ptr addrspace(5) %local.area, i64 0, i64 899  %load0 = load volatile i64, ptr addrspace(5) %gep.large.offset100  %load1 = load volatile i64, ptr addrspace(5) %gep.small.offset101  %add0 = add i64 %load0, %load1102  store volatile i64 %add0, ptr addrspace(1) %out103  ret void104}105 106define void @func_local_stack_offset_uses_sp(ptr addrspace(1) %out) {107; MUBUF-LABEL: func_local_stack_offset_uses_sp:108; MUBUF:       ; %bb.0: ; %entry109; MUBUF-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)110; MUBUF-NEXT:    s_mov_b32 s5, s33111; MUBUF-NEXT:    s_add_i32 s33, s32, 0x7ffc0112; MUBUF-NEXT:    s_and_b32 s33, s33, 0xfff80000113; MUBUF-NEXT:    v_lshrrev_b32_e64 v3, 6, s33114; MUBUF-NEXT:    v_add_u32_e32 v3, 0x3000, v3115; MUBUF-NEXT:    s_mov_b32 s6, s34116; MUBUF-NEXT:    v_add_u32_e32 v2, 64, v3117; MUBUF-NEXT:    v_mov_b32_e32 v3, 0118; MUBUF-NEXT:    v_mov_b32_e32 v4, 0x2000119; MUBUF-NEXT:    s_mov_b32 s4, 0120; MUBUF-NEXT:    s_mov_b32 s34, s32121; MUBUF-NEXT:    s_add_i32 s32, s32, 0x200000122; MUBUF-NEXT:    buffer_store_dword v3, v4, s[0:3], s33 offen123; MUBUF-NEXT:    s_waitcnt vmcnt(0)124; MUBUF-NEXT:  .LBB1_1: ; %loadstoreloop125; MUBUF-NEXT:    ; =>This Inner Loop Header: Depth=1126; MUBUF-NEXT:    v_lshrrev_b32_e64 v5, 6, s33127; MUBUF-NEXT:    v_add_u32_e32 v4, s4, v5128; MUBUF-NEXT:    v_mov_b32_e32 v5, 0x3000129; MUBUF-NEXT:    s_add_i32 s4, s4, 1130; MUBUF-NEXT:    v_add_u32_e32 v4, v5, v4131; MUBUF-NEXT:    s_cmpk_lt_u32 s4, 0x2120132; MUBUF-NEXT:    buffer_store_byte v3, v4, s[0:3], 0 offen133; MUBUF-NEXT:    s_waitcnt vmcnt(0)134; MUBUF-NEXT:    s_cbranch_scc1 .LBB1_1135; MUBUF-NEXT:  ; %bb.2: ; %split136; MUBUF-NEXT:    v_lshrrev_b32_e64 v4, 6, s33137; MUBUF-NEXT:    v_add_u32_e32 v3, 0x50d0, v4138; MUBUF-NEXT:    buffer_load_dword v4, v3, s[0:3], 0 offen glc139; MUBUF-NEXT:    s_waitcnt vmcnt(0)140; MUBUF-NEXT:    buffer_load_dword v5, v3, s[0:3], 0 offen offset:4 glc141; MUBUF-NEXT:    s_waitcnt vmcnt(0)142; MUBUF-NEXT:    buffer_load_dword v6, v2, s[0:3], 0 offen glc143; MUBUF-NEXT:    s_waitcnt vmcnt(0)144; MUBUF-NEXT:    buffer_load_dword v7, v2, s[0:3], 0 offen offset:4 glc145; MUBUF-NEXT:    s_waitcnt vmcnt(0)146; MUBUF-NEXT:    s_mov_b32 s32, s34147; MUBUF-NEXT:    s_mov_b32 s34, s6148; MUBUF-NEXT:    s_mov_b32 s33, s5149; MUBUF-NEXT:    v_add_co_u32_e32 v2, vcc, v4, v6150; MUBUF-NEXT:    v_addc_co_u32_e32 v3, vcc, v5, v7, vcc151; MUBUF-NEXT:    global_store_dwordx2 v[0:1], v[2:3], off152; MUBUF-NEXT:    s_waitcnt vmcnt(0)153; MUBUF-NEXT:    s_setpc_b64 s[30:31]154;155; FLATSCR-LABEL: func_local_stack_offset_uses_sp:156; FLATSCR:       ; %bb.0: ; %entry157; FLATSCR-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)158; FLATSCR-NEXT:    s_mov_b32 s2, s33159; FLATSCR-NEXT:    s_add_i32 s33, s32, 0x1fff160; FLATSCR-NEXT:    s_and_b32 s33, s33, 0xffffe000161; FLATSCR-NEXT:    s_mov_b32 s3, s34162; FLATSCR-NEXT:    s_mov_b32 s34, s32163; FLATSCR-NEXT:    s_add_i32 s32, s32, 0x8000164; FLATSCR-NEXT:    v_mov_b32_e32 v2, 0165; FLATSCR-NEXT:    s_add_i32 s0, s33, 0x2000166; FLATSCR-NEXT:    scratch_store_dword off, v2, s0167; FLATSCR-NEXT:    s_waitcnt vmcnt(0)168; FLATSCR-NEXT:    s_mov_b32 s0, 0169; FLATSCR-NEXT:  .LBB1_1: ; %loadstoreloop170; FLATSCR-NEXT:    ; =>This Inner Loop Header: Depth=1171; FLATSCR-NEXT:    s_add_i32 s1, s33, s0172; FLATSCR-NEXT:    s_addk_i32 s1, 0x3000173; FLATSCR-NEXT:    s_add_i32 s0, s0, 1174; FLATSCR-NEXT:    s_cmpk_lt_u32 s0, 0x2120175; FLATSCR-NEXT:    scratch_store_byte off, v2, s1176; FLATSCR-NEXT:    s_waitcnt vmcnt(0)177; FLATSCR-NEXT:    s_cbranch_scc1 .LBB1_1178; FLATSCR-NEXT:  ; %bb.2: ; %split179; FLATSCR-NEXT:    s_movk_i32 s0, 0x2000180; FLATSCR-NEXT:    s_add_i32 s1, s33, s0181; FLATSCR-NEXT:    s_add_i32 s0, s1, 0x3000182; FLATSCR-NEXT:    scratch_load_dwordx2 v[2:3], off, s0 offset:208 glc183; FLATSCR-NEXT:    s_waitcnt vmcnt(0)184; FLATSCR-NEXT:    s_add_i32 s0, s33, 0x3000185; FLATSCR-NEXT:    scratch_load_dwordx2 v[4:5], off, s0 offset:64 glc186; FLATSCR-NEXT:    s_waitcnt vmcnt(0)187; FLATSCR-NEXT:    s_mov_b32 s32, s34188; FLATSCR-NEXT:    s_mov_b32 s34, s3189; FLATSCR-NEXT:    s_mov_b32 s33, s2190; FLATSCR-NEXT:    v_add_co_u32_e32 v2, vcc, v2, v4191; FLATSCR-NEXT:    v_addc_co_u32_e32 v3, vcc, v3, v5, vcc192; FLATSCR-NEXT:    global_store_dwordx2 v[0:1], v[2:3], off193; FLATSCR-NEXT:    s_waitcnt vmcnt(0)194; FLATSCR-NEXT:    s_setpc_b64 s[30:31]195entry:196  %pin.low = alloca i32, align 8192, addrspace(5)197  %local.area = alloca [1060 x i64], align 4096, addrspace(5)198  store volatile i32 0, ptr addrspace(5) %pin.low199  call void @llvm.memset.p5.i32(ptr addrspace(5) align 4 %local.area, i8 0, i32 8480, i1 true)200  %gep.large.offset = getelementptr inbounds [1060 x i64], ptr addrspace(5) %local.area, i64 0, i64 1050201  %gep.small.offset = getelementptr inbounds [1060 x i64], ptr addrspace(5) %local.area, i64 0, i64 8202  %load0 = load volatile i64, ptr addrspace(5) %gep.large.offset203  %load1 = load volatile i64, ptr addrspace(5) %gep.small.offset204  %add0 = add i64 %load0, %load1205  store volatile i64 %add0, ptr addrspace(1) %out206  ret void207}208 209define amdgpu_kernel void @local_stack_offset_uses_sp_flat(ptr addrspace(1) %out) {210; MUBUF-LABEL: local_stack_offset_uses_sp_flat:211; MUBUF:       ; %bb.0: ; %entry212; MUBUF-NEXT:    s_add_u32 s0, s0, s17213; MUBUF-NEXT:    s_addc_u32 s1, s1, 0214; MUBUF-NEXT:    v_mov_b32_e32 v0, 0215; MUBUF-NEXT:    v_mov_b32_e32 v1, 0x2000216; MUBUF-NEXT:    s_mov_b32 s4, 0217; MUBUF-NEXT:    buffer_store_dword v0, v1, s[0:3], 0 offen218; MUBUF-NEXT:    s_waitcnt vmcnt(0)219; MUBUF-NEXT:  .LBB2_1: ; %loadstoreloop220; MUBUF-NEXT:    ; =>This Inner Loop Header: Depth=1221; MUBUF-NEXT:    v_mov_b32_e32 v2, 0x4000222; MUBUF-NEXT:    v_add_u32_e32 v1, s4, v2223; MUBUF-NEXT:    s_add_i32 s4, s4, 1224; MUBUF-NEXT:    s_cmpk_lt_u32 s4, 0x2120225; MUBUF-NEXT:    buffer_store_byte v0, v1, s[0:3], 0 offen226; MUBUF-NEXT:    s_waitcnt vmcnt(0)227; MUBUF-NEXT:    s_cbranch_scc1 .LBB2_1228; MUBUF-NEXT:  ; %bb.2: ; %split229; MUBUF-NEXT:    s_movk_i32 s5, 0x12d4230; MUBUF-NEXT:    v_mov_b32_e32 v1, 0x4000231; MUBUF-NEXT:    v_or_b32_e32 v0, s5, v1232; MUBUF-NEXT:    s_movk_i32 s5, 0x12d0233; MUBUF-NEXT:    v_mov_b32_e32 v1, 0x4000234; MUBUF-NEXT:    s_movk_i32 s4, 0x4000235; MUBUF-NEXT:    buffer_load_dword v5, v0, s[0:3], 0 offen glc236; MUBUF-NEXT:    s_waitcnt vmcnt(0)237; MUBUF-NEXT:    v_or_b32_e32 v0, s5, v1238; MUBUF-NEXT:    s_movk_i32 s5, 0x12c4239; MUBUF-NEXT:    v_mov_b32_e32 v1, 0x4000240; MUBUF-NEXT:    s_or_b32 s4, s4, 0x12c0241; MUBUF-NEXT:    buffer_load_dword v4, v0, s[0:3], 0 offen glc242; MUBUF-NEXT:    s_waitcnt vmcnt(0)243; MUBUF-NEXT:    v_or_b32_e32 v0, s5, v1244; MUBUF-NEXT:    buffer_load_dword v1, v0, s[0:3], 0 offen glc245; MUBUF-NEXT:    s_waitcnt vmcnt(0)246; MUBUF-NEXT:    v_mov_b32_e32 v0, s4247; MUBUF-NEXT:    s_movk_i32 s4, 0x12cc248; MUBUF-NEXT:    v_mov_b32_e32 v3, 0x4000249; MUBUF-NEXT:    v_or_b32_e32 v2, s4, v3250; MUBUF-NEXT:    s_movk_i32 s4, 0x12c8251; MUBUF-NEXT:    v_mov_b32_e32 v6, 0x4000252; MUBUF-NEXT:    buffer_load_dword v0, v0, s[0:3], 0 offen glc253; MUBUF-NEXT:    s_waitcnt vmcnt(0)254; MUBUF-NEXT:    v_mov_b32_e32 v7, 0x4000255; MUBUF-NEXT:    buffer_load_dword v3, v2, s[0:3], 0 offen glc256; MUBUF-NEXT:    s_waitcnt vmcnt(0)257; MUBUF-NEXT:    v_or_b32_e32 v2, s4, v6258; MUBUF-NEXT:    v_mov_b32_e32 v8, 0x4000259; MUBUF-NEXT:    v_mov_b32_e32 v9, 0x4000260; MUBUF-NEXT:    buffer_load_dword v2, v2, s[0:3], 0 offen glc261; MUBUF-NEXT:    s_waitcnt vmcnt(0)262; MUBUF-NEXT:    v_mov_b32_e32 v10, 0x4000263; MUBUF-NEXT:    buffer_load_dword v6, v7, s[0:3], 0 offen glc264; MUBUF-NEXT:    s_waitcnt vmcnt(0)265; MUBUF-NEXT:    v_mov_b32_e32 v11, 0x4000266; MUBUF-NEXT:    buffer_load_dword v7, v8, s[0:3], 0 offen offset:4 glc267; MUBUF-NEXT:    s_waitcnt vmcnt(0)268; MUBUF-NEXT:    v_mov_b32_e32 v12, 0x4000269; MUBUF-NEXT:    buffer_load_dword v8, v9, s[0:3], 0 offen offset:8 glc270; MUBUF-NEXT:    s_waitcnt vmcnt(0)271; MUBUF-NEXT:    s_load_dwordx2 s[4:5], s[8:9], 0x0272; MUBUF-NEXT:    buffer_load_dword v9, v10, s[0:3], 0 offen offset:12 glc273; MUBUF-NEXT:    s_waitcnt vmcnt(0)274; MUBUF-NEXT:    v_add_co_u32_e32 v2, vcc, v2, v8275; MUBUF-NEXT:    buffer_load_dword v10, v11, s[0:3], 0 offen offset:16 glc276; MUBUF-NEXT:    s_waitcnt vmcnt(0)277; MUBUF-NEXT:    v_addc_co_u32_e32 v3, vcc, v3, v9, vcc278; MUBUF-NEXT:    buffer_load_dword v11, v12, s[0:3], 0 offen offset:20 glc279; MUBUF-NEXT:    s_waitcnt vmcnt(0)280; MUBUF-NEXT:    v_add_co_u32_e32 v0, vcc, v0, v6281; MUBUF-NEXT:    v_addc_co_u32_e32 v1, vcc, v1, v7, vcc282; MUBUF-NEXT:    v_mov_b32_e32 v12, 0283; MUBUF-NEXT:    v_add_co_u32_e32 v4, vcc, v4, v10284; MUBUF-NEXT:    v_addc_co_u32_e32 v5, vcc, v5, v11, vcc285; MUBUF-NEXT:    s_waitcnt lgkmcnt(0)286; MUBUF-NEXT:    global_store_dwordx2 v12, v[4:5], s[4:5] offset:16287; MUBUF-NEXT:    s_waitcnt vmcnt(0)288; MUBUF-NEXT:    global_store_dwordx4 v12, v[0:3], s[4:5]289; MUBUF-NEXT:    s_waitcnt vmcnt(0)290; MUBUF-NEXT:    s_endpgm291;292; FLATSCR-LABEL: local_stack_offset_uses_sp_flat:293; FLATSCR:       ; %bb.0: ; %entry294; FLATSCR-NEXT:    s_add_u32 flat_scratch_lo, s8, s13295; FLATSCR-NEXT:    s_addc_u32 flat_scratch_hi, s9, 0296; FLATSCR-NEXT:    v_mov_b32_e32 v0, 0297; FLATSCR-NEXT:    s_mov_b32 s0, 0298; FLATSCR-NEXT:    scratch_store_dword off, v0, s0 offset:1024299; FLATSCR-NEXT:    s_waitcnt vmcnt(0)300; FLATSCR-NEXT:  .LBB2_1: ; %loadstoreloop301; FLATSCR-NEXT:    ; =>This Inner Loop Header: Depth=1302; FLATSCR-NEXT:    s_add_i32 s1, s0, 0x2000303; FLATSCR-NEXT:    s_add_i32 s0, s0, 1304; FLATSCR-NEXT:    s_cmpk_lt_u32 s0, 0x2120305; FLATSCR-NEXT:    scratch_store_byte off, v0, s1306; FLATSCR-NEXT:    s_waitcnt vmcnt(0)307; FLATSCR-NEXT:    s_cbranch_scc1 .LBB2_1308; FLATSCR-NEXT:  ; %bb.2: ; %split309; FLATSCR-NEXT:    s_movk_i32 s0, 0x1000310; FLATSCR-NEXT:    s_addk_i32 s0, 0x2000311; FLATSCR-NEXT:    scratch_load_dwordx2 v[8:9], off, s0 offset:720 glc312; FLATSCR-NEXT:    s_waitcnt vmcnt(0)313; FLATSCR-NEXT:    scratch_load_dwordx4 v[0:3], off, s0 offset:704 glc314; FLATSCR-NEXT:    s_waitcnt vmcnt(0)315; FLATSCR-NEXT:    s_movk_i32 s0, 0x2000316; FLATSCR-NEXT:    scratch_load_dwordx2 v[10:11], off, s0 offset:16 glc317; FLATSCR-NEXT:    s_waitcnt vmcnt(0)318; FLATSCR-NEXT:    scratch_load_dwordx4 v[4:7], off, s0 glc319; FLATSCR-NEXT:    s_waitcnt vmcnt(0)320; FLATSCR-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x0321; FLATSCR-NEXT:    v_mov_b32_e32 v12, 0322; FLATSCR-NEXT:    v_add_co_u32_e32 v2, vcc, v2, v6323; FLATSCR-NEXT:    v_addc_co_u32_e32 v3, vcc, v3, v7, vcc324; FLATSCR-NEXT:    v_add_co_u32_e32 v0, vcc, v0, v4325; FLATSCR-NEXT:    v_addc_co_u32_e32 v1, vcc, v1, v5, vcc326; FLATSCR-NEXT:    v_add_co_u32_e32 v4, vcc, v8, v10327; FLATSCR-NEXT:    v_addc_co_u32_e32 v5, vcc, v9, v11, vcc328; FLATSCR-NEXT:    s_waitcnt lgkmcnt(0)329; FLATSCR-NEXT:    global_store_dwordx2 v12, v[4:5], s[0:1] offset:16330; FLATSCR-NEXT:    s_waitcnt vmcnt(0)331; FLATSCR-NEXT:    global_store_dwordx4 v12, v[0:3], s[0:1]332; FLATSCR-NEXT:    s_waitcnt vmcnt(0)333; FLATSCR-NEXT:    s_endpgm334entry:335  %pin.low = alloca i32, align 1024, addrspace(5)336  %local.area = alloca [160 x <3 x i64>], align 8192, addrspace(5)337  store volatile i32 0, ptr addrspace(5) %pin.low338  call void @llvm.memset.p5.i32(ptr addrspace(5) align 4 %local.area, i8 0, i32 8480, i1 true)339  %gep.large.offset = getelementptr inbounds [160 x <3 x i64>], ptr addrspace(5) %local.area, i64 0, i64 150340  %load0 = load volatile <3 x i64>, ptr addrspace(5) %gep.large.offset341  %load1 = load volatile <3 x i64>, ptr addrspace(5) %local.area342  %add0 = add <3 x i64> %load0, %load1343  store volatile <3 x i64> %add0, ptr addrspace(1) %out344  ret void345}346 347declare void @llvm.memset.p5.i32(ptr addrspace(5) nocapture writeonly, i8, i32, i1 immarg) #0348 349attributes #0 = { argmemonly nounwind willreturn writeonly }350