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1;RUN: llc < %s -mtriple=amdgcn -mcpu=verde -mattr=-promote-alloca | FileCheck %s -check-prefix=CHECK2;RUN: llc < %s -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global -mattr=-promote-alloca | FileCheck %s -check-prefix=CHECK3 4; Allocate two stack slots of 2052 bytes each requiring a total of 4104 bytes.5; Extracting the last element of each does not fit into the offset field of6; MUBUF instructions, so a new base register is needed. This used to not7; happen, leading to an assertion.8 9; CHECK-LABEL: {{^}}main:10; CHECK: buffer_store_dword11; CHECK: buffer_store_dword12; CHECK: buffer_load_dword13; CHECK: buffer_load_dword14define amdgpu_gs float @main(float %v1, float %v2, i32 %idx1, i32 %idx2) {15main_body:16 %m1 = alloca [513 x float], addrspace(5)17 %m2 = alloca [513 x float], addrspace(5)18 19 %gep1.store = getelementptr [513 x float], ptr addrspace(5) %m1, i32 0, i32 %idx120 store float %v1, ptr addrspace(5) %gep1.store21 22 %gep2.store = getelementptr [513 x float], ptr addrspace(5) %m2, i32 0, i32 %idx223 store float %v2, ptr addrspace(5) %gep2.store24 25; This used to use a base reg equal to 0.26 %out1 = load float, ptr addrspace(5) %m127 28; This used to attempt to re-use the base reg at 0, generating an out-of-bounds instruction offset.29 %gep2.load = getelementptr [513 x float], ptr addrspace(5) %m2, i32 0, i32 51230 %out2 = load float, ptr addrspace(5) %gep2.load31 32 %r = fadd float %out1, %out233 ret float %r34}35