158 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 32# RUN: llc -run-pass=si-i1-copies -mtriple=amdgcn--amdpal -mcpu=gfx1030 -verify-machineinstrs -o - %s | FileCheck %s3 4# Make sure that kill flag is clear on %23 to %0 copy when %23 is reused.5 6---7name: _amdgpu_cs_main8tracksRegLiveness: true9body: |10 ; CHECK-LABEL: name: _amdgpu_cs_main11 ; CHECK: bb.0:12 ; CHECK-NEXT: successors: %bb.1(0x80000000)13 ; CHECK-NEXT: liveins: $vgpr0, $vgpr114 ; CHECK-NEXT: {{ $}}15 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr116 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr017 ; CHECK-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 018 ; CHECK-NEXT: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_32 = V_CMP_NE_U32_e64 [[COPY1]], [[S_MOV_B32_]], implicit $exec19 ; CHECK-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sgpr_32 = S_MOV_B32 020 ; CHECK-NEXT: [[V_CMP_GT_F32_e64_:%[0-9]+]]:sreg_32 = nofpexcept V_CMP_GT_F32_e64 0, [[COPY]], 0, killed [[S_MOV_B32_1]], 0, implicit $mode, implicit $exec21 ; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 killed [[V_CMP_NE_U32_e64_]], killed [[V_CMP_GT_F32_e64_]], implicit-def dead $scc22 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[S_AND_B32_]]23 ; CHECK-NEXT: [[S_MOV_B32_2:%[0-9]+]]:sreg_32 = S_MOV_B32 -124 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY [[COPY2]]25 ; CHECK-NEXT: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY3]], killed [[S_MOV_B32_2]], implicit-def dead $scc26 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:sreg_32 = COPY [[S_XOR_B32_]]27 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]], implicit $exec28 ; CHECK-NEXT: {{ $}}29 ; CHECK-NEXT: bb.1:30 ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000)31 ; CHECK-NEXT: {{ $}}32 ; CHECK-NEXT: [[PHI:%[0-9]+]]:sreg_32 = PHI [[S_MOV_B32_]], %bb.0, %14, %bb.533 ; CHECK-NEXT: [[PHI1:%[0-9]+]]:sreg_32 = PHI [[S_MOV_B32_]], %bb.0, %16, %bb.534 ; CHECK-NEXT: [[PHI2:%[0-9]+]]:vgpr_32 = PHI [[COPY5]], %bb.0, %18, %bb.535 ; CHECK-NEXT: [[COPY6:%[0-9]+]]:sreg_32 = COPY [[COPY4]]36 ; CHECK-NEXT: [[SI_IF:%[0-9]+]]:sreg_32 = SI_IF [[COPY6]], %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec37 ; CHECK-NEXT: S_BRANCH %bb.238 ; CHECK-NEXT: {{ $}}39 ; CHECK-NEXT: bb.2:40 ; CHECK-NEXT: successors: %bb.3(0x80000000)41 ; CHECK-NEXT: {{ $}}42 ; CHECK-NEXT: [[V_OR_B32_e64_:%[0-9]+]]:vgpr_32 = V_OR_B32_e64 [[PHI1]], [[PHI2]], implicit $exec43 ; CHECK-NEXT: [[S_MOV_B32_3:%[0-9]+]]:sreg_32 = S_MOV_B32 -144 ; CHECK-NEXT: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[S_AND_B32_]], $exec_lo, implicit-def $scc45 ; CHECK-NEXT: {{ $}}46 ; CHECK-NEXT: bb.3:47 ; CHECK-NEXT: successors: %bb.4(0x40000000), %bb.5(0x40000000)48 ; CHECK-NEXT: {{ $}}49 ; CHECK-NEXT: [[PHI3:%[0-9]+]]:sreg_32 = PHI [[S_AND_B32_]], %bb.1, [[S_OR_B32_]], %bb.250 ; CHECK-NEXT: [[PHI4:%[0-9]+]]:vgpr_32 = PHI [[PHI2]], %bb.1, [[V_OR_B32_e64_]], %bb.251 ; CHECK-NEXT: SI_END_CF [[SI_IF]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec52 ; CHECK-NEXT: [[S_MOV_B32_4:%[0-9]+]]:sreg_32 = S_MOV_B32 -153 ; CHECK-NEXT: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF54 ; CHECK-NEXT: [[COPY7:%[0-9]+]]:sreg_32 = COPY [[PHI3]]55 ; CHECK-NEXT: [[COPY8:%[0-9]+]]:vgpr_32 = COPY [[DEF]]56 ; CHECK-NEXT: [[SI_IF1:%[0-9]+]]:sreg_32 = SI_IF [[COPY7]], %bb.5, implicit-def dead $exec, implicit-def dead $scc, implicit $exec57 ; CHECK-NEXT: S_BRANCH %bb.458 ; CHECK-NEXT: {{ $}}59 ; CHECK-NEXT: bb.4:60 ; CHECK-NEXT: successors: %bb.5(0x80000000)61 ; CHECK-NEXT: {{ $}}62 ; CHECK-NEXT: [[S_MOV_B32_5:%[0-9]+]]:sreg_32 = S_MOV_B32 163 ; CHECK-NEXT: [[S_OR_B32_1:%[0-9]+]]:sreg_32 = S_OR_B32 [[PHI1]], killed [[S_MOV_B32_5]], implicit-def dead $scc64 ; CHECK-NEXT: [[S_MOV_B32_6:%[0-9]+]]:sreg_32 = S_MOV_B32 065 ; CHECK-NEXT: [[S_XOR_B32_1:%[0-9]+]]:sreg_32 = S_XOR_B32 $exec_lo, -1, implicit-def $scc66 ; CHECK-NEXT: {{ $}}67 ; CHECK-NEXT: bb.5:68 ; CHECK-NEXT: successors: %bb.6(0x04000000), %bb.1(0x7c000000)69 ; CHECK-NEXT: {{ $}}70 ; CHECK-NEXT: [[PHI5:%[0-9]+]]:sreg_32 = PHI [[S_MOV_B32_4]], %bb.3, [[S_XOR_B32_1]], %bb.471 ; CHECK-NEXT: [[PHI6:%[0-9]+]]:vgpr_32 = PHI [[COPY8]], %bb.3, [[PHI4]], %bb.472 ; CHECK-NEXT: [[PHI7:%[0-9]+]]:sreg_32 = PHI [[DEF]], %bb.3, [[S_OR_B32_1]], %bb.473 ; CHECK-NEXT: SI_END_CF [[SI_IF1]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec74 ; CHECK-NEXT: [[COPY9:%[0-9]+]]:sreg_32 = COPY [[PHI5]]75 ; CHECK-NEXT: [[SI_IF_BREAK:%[0-9]+]]:sreg_32 = SI_IF_BREAK [[COPY9]], [[PHI]], implicit-def dead $scc76 ; CHECK-NEXT: SI_LOOP [[SI_IF_BREAK]], %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec77 ; CHECK-NEXT: S_BRANCH %bb.678 ; CHECK-NEXT: {{ $}}79 ; CHECK-NEXT: bb.6:80 ; CHECK-NEXT: [[PHI8:%[0-9]+]]:sreg_32 = PHI [[SI_IF_BREAK]], %bb.581 ; CHECK-NEXT: SI_END_CF [[PHI8]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec82 ; CHECK-NEXT: S_ENDPGM 083 bb.0:84 successors: %bb.1(0x80000000)85 liveins: $vgpr0, $vgpr186 87 %0:vgpr_32 = COPY $vgpr188 %1:vgpr_32 = COPY $vgpr089 %2:sreg_32 = S_MOV_B32 090 %3:sreg_32 = V_CMP_NE_U32_e64 %1, %2, implicit $exec91 %4:sgpr_32 = S_MOV_B32 092 %5:sreg_32 = nofpexcept V_CMP_GT_F32_e64 0, %0, 0, killed %4, 0, implicit $mode, implicit $exec93 %6:sreg_32 = S_AND_B32 killed %3, killed %5, implicit-def dead $scc94 %7:vreg_1 = COPY killed %695 %8:sreg_32 = S_MOV_B32 -196 %9:sreg_32 = COPY %797 %10:sreg_32 = S_XOR_B32 %9, killed %8, implicit-def dead $scc98 %11:vreg_1 = COPY %1099 %12:vgpr_32 = COPY %2, implicit $exec100 101 bb.1:102 successors: %bb.2(0x40000000), %bb.3(0x40000000)103 104 %13:sreg_32 = PHI %2, %bb.0, %14, %bb.5105 %15:sreg_32 = PHI %2, %bb.0, %16, %bb.5106 %17:vgpr_32 = PHI %12, %bb.0, %18, %bb.5107 %19:sreg_32 = COPY %11108 %20:sreg_32 = SI_IF %19, %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec109 S_BRANCH %bb.2110 111 bb.2:112 successors: %bb.3(0x80000000)113 114 %21:vgpr_32 = V_OR_B32_e64 %15, %17, implicit $exec115 %22:sreg_32 = S_MOV_B32 -1116 %23:vreg_1 = COPY %22, implicit $exec117 118 bb.3:119 successors: %bb.4(0x40000000), %bb.5(0x40000000)120 121 %24:vgpr_32 = PHI %17, %bb.1, %21, %bb.2122 %25:vreg_1 = PHI %7, %bb.1, %23, %bb.2123 SI_END_CF %20, implicit-def dead $exec, implicit-def dead $scc, implicit $exec124 %26:sreg_32 = S_MOV_B32 -1125 %27:sreg_32 = IMPLICIT_DEF126 %28:sreg_32 = COPY %25127 %29:vgpr_32 = COPY %27128 %30:vreg_1 = COPY %26, implicit $exec129 %31:sreg_32 = SI_IF %28, %bb.5, implicit-def dead $exec, implicit-def dead $scc, implicit $exec130 S_BRANCH %bb.4131 132 bb.4:133 successors: %bb.5(0x80000000)134 135 %32:sreg_32 = S_MOV_B32 1136 %33:sreg_32 = S_OR_B32 %15, killed %32, implicit-def dead $scc137 %34:sreg_32 = S_MOV_B32 0138 %35:vreg_1 = COPY %34, implicit $exec139 140 bb.5:141 successors: %bb.6(0x04000000), %bb.1(0x7c000000)142 143 %18:vgpr_32 = PHI %29, %bb.3, %24, %bb.4144 %16:sreg_32 = PHI %27, %bb.3, %33, %bb.4145 %36:vreg_1 = PHI %30, %bb.3, %35, %bb.4146 SI_END_CF %31, implicit-def dead $exec, implicit-def dead $scc, implicit $exec147 %37:sreg_32 = COPY %36148 %14:sreg_32 = SI_IF_BREAK %37, %13, implicit-def dead $scc149 SI_LOOP %14, %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec150 S_BRANCH %bb.6151 152 bb.6:153 %38:sreg_32 = PHI %14, %bb.5154 SI_END_CF %38, implicit-def dead $exec, implicit-def dead $scc, implicit $exec155 S_ENDPGM 0156 157...158