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1; RUN: opt -S -mtriple=amdgcn-- -amdgpu-lower-module-lds --amdgpu-super-align-lds-globals=true --amdgpu-lower-module-lds-strategy=module < %s | FileCheck --check-prefixes=CHECK,SUPER-ALIGN_ON %s2; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-lower-module-lds --amdgpu-super-align-lds-globals=true --amdgpu-lower-module-lds-strategy=module < %s | FileCheck --check-prefixes=CHECK,SUPER-ALIGN_ON %s3; RUN: opt -S -mtriple=amdgcn-- -amdgpu-lower-module-lds --amdgpu-super-align-lds-globals=false --amdgpu-lower-module-lds-strategy=module < %s | FileCheck --check-prefixes=CHECK,SUPER-ALIGN_OFF %s4; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-lower-module-lds --amdgpu-super-align-lds-globals=false --amdgpu-lower-module-lds-strategy=module < %s | FileCheck --check-prefixes=CHECK,SUPER-ALIGN_OFF %s5 6; CHECK: %llvm.amdgcn.kernel.k1.lds.t = type { [32 x i8] }7; CHECK: %llvm.amdgcn.kernel.k2.lds.t = type { i16, [2 x i8], i16 }8; CHECK: %llvm.amdgcn.kernel.k3.lds.t = type { [32 x i64], [32 x i32] }9; CHECK: %llvm.amdgcn.kernel.k4.lds.t = type { [2 x ptr addrspace(3)] }10 11; SUPER-ALIGN_ON: @lds.unused = addrspace(3) global i32 poison, align 412; SUPER-ALIGN_OFF: @lds.unused = addrspace(3) global i32 poison, align 213@lds.unused = addrspace(3) global i32 poison, align 214 15@llvm.used = appending global [1 x ptr] [ptr addrspacecast (ptr addrspace(3) @lds.unused to ptr)], section "llvm.metadata"16 17; CHECK-NOT: @lds.118@lds.1 = internal unnamed_addr addrspace(3) global [32 x i8] poison, align 119 20; SUPER-ALIGN_ON: @llvm.amdgcn.kernel.k1.lds = internal addrspace(3) global %llvm.amdgcn.kernel.k1.lds.t poison, align 1621; SUPER-ALIGN_OFF: @llvm.amdgcn.kernel.k1.lds = internal addrspace(3) global %llvm.amdgcn.kernel.k1.lds.t poison, align 122 23; CHECK: @llvm.amdgcn.kernel.k2.lds = internal addrspace(3) global %llvm.amdgcn.kernel.k2.lds.t poison, align 424; SUPER-ALIGN_ON: @llvm.amdgcn.kernel.k3.lds = internal addrspace(3) global %llvm.amdgcn.kernel.k3.lds.t poison, align 1625; SUPER-ALIGN_OFF: @llvm.amdgcn.kernel.k3.lds = internal addrspace(3) global %llvm.amdgcn.kernel.k3.lds.t poison, align 826 27; SUPER-ALIGN_ON: @llvm.amdgcn.kernel.k4.lds = internal addrspace(3) global %llvm.amdgcn.kernel.k4.lds.t poison, align 828; SUPER-ALIGN_OFF: @llvm.amdgcn.kernel.k4.lds = internal addrspace(3) global %llvm.amdgcn.kernel.k4.lds.t poison, align 429 30; CHECK-LABEL: @k131; CHECK: %1 = addrspacecast ptr addrspace(3) @llvm.amdgcn.kernel.k1.lds to ptr32; CHECK: %ptr = getelementptr inbounds i8, ptr %1, i64 %x33; CHECK: store i8 1, ptr %ptr, align 134define amdgpu_kernel void @k1(i64 %x) {35 %ptr = getelementptr inbounds i8, ptr addrspacecast (ptr addrspace(3) @lds.1 to ptr), i64 %x36 store i8 1, ptr addrspace(0) %ptr, align 137 ret void38}39 40@lds.2 = internal unnamed_addr addrspace(3) global i16 poison, align 441@lds.3 = internal unnamed_addr addrspace(3) global i16 poison, align 442 43; Check that alignment is propagated to uses for scalar variables.44 45; CHECK-LABEL: @k246; CHECK: store i16 1, ptr addrspace(3) @llvm.amdgcn.kernel.k2.lds, align 447; CHECK: store i16 2, ptr addrspace(3) getelementptr inbounds (%llvm.amdgcn.kernel.k2.lds.t, ptr addrspace(3) @llvm.amdgcn.kernel.k2.lds, i32 0, i32 2), align 448define amdgpu_kernel void @k2() {49 store i16 1, ptr addrspace(3) @lds.2, align 250 store i16 2, ptr addrspace(3) @lds.3, align 251 ret void52}53 54@lds.4 = internal unnamed_addr addrspace(3) global [32 x i64] poison, align 855@lds.5 = internal unnamed_addr addrspace(3) global [32 x i32] poison, align 456 57; Check that alignment is propagated to uses for arrays.58 59; CHECK-LABEL: @k360; CHECK: store i32 1, ptr addrspace(3) %ptr1, align 861; CHECK: store i32 2, ptr addrspace(3) %ptr2, align 462; SUPER-ALIGN_ON: store i32 3, ptr addrspace(3) %ptr3, align 1663; SUPER-ALIGN_OFF: store i32 3, ptr addrspace(3) %ptr3, align 864; CHECK: store i32 4, ptr addrspace(3) %ptr4, align 465; CHECK: store i32 5, ptr addrspace(3) %ptr5, align 466; CHECK: %load1 = load i32, ptr addrspace(3) %ptr1, align 867; CHECK: %load2 = load i32, ptr addrspace(3) %ptr2, align 468; SUPER-ALIGN_ON: %load3 = load i32, ptr addrspace(3) %ptr3, align 1669; SUPER-ALIGN_OFF: %load3 = load i32, ptr addrspace(3) %ptr3, align 870; CHECK: %load4 = load i32, ptr addrspace(3) %ptr4, align 471; CHECK: %load5 = load i32, ptr addrspace(3) %ptr5, align 472; CHECK: %val1 = atomicrmw volatile add ptr addrspace(3) %ptr1, i32 1 monotonic, align 873; CHECK: %val2 = cmpxchg volatile ptr addrspace(3) %ptr1, i32 1, i32 2 monotonic monotonic, align 874; CHECK: store i16 11, ptr addrspace(3) %ptr1, align 875; CHECK: store i16 12, ptr addrspace(3) %ptr2, align 476; SUPER-ALIGN_ON: store i16 13, ptr addrspace(3) %ptr3, align 1677; SUPER-ALIGN_OFF: store i16 13, ptr addrspace(3) %ptr3, align 878; CHECK: store i16 14, ptr addrspace(3) %ptr4, align 479; CHECK: %ptr1.ac = addrspacecast ptr addrspace(3) %ptr1 to ptr80; CHECK: %ptr2.ac = addrspacecast ptr addrspace(3) %ptr2 to ptr81; CHECK: %ptr3.ac = addrspacecast ptr addrspace(3) %ptr3 to ptr82; CHECK: %ptr4.ac = addrspacecast ptr addrspace(3) %ptr4 to ptr83; CHECK: store i32 21, ptr %ptr1.ac, align 884; CHECK: store i32 22, ptr %ptr2.ac, align 485; SUPER-ALIGN_ON: store i32 23, ptr %ptr3.ac, align 1686; SUPER-ALIGN_OFF: store i32 23, ptr %ptr3.ac, align 887; CHECK: store i32 24, ptr %ptr4.ac, align 488define amdgpu_kernel void @k3(i64 %x) {89 store i64 0, ptr addrspace(3) @lds.4, align 890 91 %ptr1 = getelementptr inbounds i32, ptr addrspace(3) @lds.5, i64 292 %ptr2 = getelementptr inbounds i32, ptr addrspace(3) @lds.5, i64 393 %ptr3 = getelementptr inbounds i32, ptr addrspace(3) @lds.5, i64 494 %ptr4 = getelementptr inbounds i32, ptr addrspace(3) @lds.5, i64 595 %ptr5 = getelementptr inbounds i32, ptr addrspace(3) @lds.5, i64 %x96 97 store i32 1, ptr addrspace(3) %ptr1, align 498 store i32 2, ptr addrspace(3) %ptr2, align 499 store i32 3, ptr addrspace(3) %ptr3, align 4100 store i32 4, ptr addrspace(3) %ptr4, align 4101 store i32 5, ptr addrspace(3) %ptr5, align 4102 103 %load1 = load i32, ptr addrspace(3) %ptr1, align 4104 %load2 = load i32, ptr addrspace(3) %ptr2, align 4105 %load3 = load i32, ptr addrspace(3) %ptr3, align 4106 %load4 = load i32, ptr addrspace(3) %ptr4, align 4107 %load5 = load i32, ptr addrspace(3) %ptr5, align 4108 109 %val1 = atomicrmw volatile add ptr addrspace(3) %ptr1, i32 1 monotonic, align 4110 %val2 = cmpxchg volatile ptr addrspace(3) %ptr1, i32 1, i32 2 monotonic monotonic, align 4111 112 113 store i16 11, ptr addrspace(3) %ptr1, align 2114 store i16 12, ptr addrspace(3) %ptr2, align 2115 store i16 13, ptr addrspace(3) %ptr3, align 2116 store i16 14, ptr addrspace(3) %ptr4, align 2117 118 %ptr1.ac = addrspacecast ptr addrspace(3) %ptr1 to ptr119 %ptr2.ac = addrspacecast ptr addrspace(3) %ptr2 to ptr120 %ptr3.ac = addrspacecast ptr addrspace(3) %ptr3 to ptr121 %ptr4.ac = addrspacecast ptr addrspace(3) %ptr4 to ptr122 123 store i32 21, ptr %ptr1.ac, align 4124 store i32 22, ptr %ptr2.ac, align 4125 store i32 23, ptr %ptr3.ac, align 4126 store i32 24, ptr %ptr4.ac, align 4127 128 ret void129}130 131@lds.6 = internal unnamed_addr addrspace(3) global [2 x ptr addrspace(3)] poison, align 4132 133; Check that aligment is not propagated if use is not a pointer operand.134 135; CHECK-LABEL: @k4136; CHECK: store i32 poison, ptr addrspace(3) %gep, align 4137; CHECK: store ptr addrspace(3) %gep, ptr poison, align 4138; CHECK: %val1 = cmpxchg volatile ptr addrspace(3) %gep, i32 1, i32 2 monotonic monotonic, align 4139; CHECK: %val2 = cmpxchg volatile ptr poison, ptr addrspace(3) %gep, ptr addrspace(3) poison monotonic monotonic, align 4140define amdgpu_kernel void @k4() {141 %gep = getelementptr inbounds ptr addrspace(3), ptr addrspace(3) @lds.6, i64 1142 store i32 poison, ptr addrspace(3) %gep, align 4143 store ptr addrspace(3) %gep, ptr poison, align 4144 %val1 = cmpxchg volatile ptr addrspace(3) %gep, i32 1, i32 2 monotonic monotonic, align 4145 %val2 = cmpxchg volatile ptr poison, ptr addrspace(3) %gep, ptr addrspace(3) poison monotonic monotonic, align 4146 ret void147}148