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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -S -mtriple=amdgcn-- -pre-isel-intrinsic-lowering -mem-intrinsic-expand-size=8 %s | FileCheck -check-prefix=OPT8 %s3; RUN: opt -S -mtriple=amdgcn-- -pre-isel-intrinsic-lowering -mem-intrinsic-expand-size=4 %s | FileCheck -check-prefix=OPT4 %s4; RUN: opt -S -mtriple=amdgcn-- -pre-isel-intrinsic-lowering -mem-intrinsic-expand-size=0 %s | FileCheck -check-prefix=OPT0 %s5; RUN: opt -S -mtriple=amdgcn-- -pre-isel-intrinsic-lowering -mem-intrinsic-expand-size=-1 %s | FileCheck -check-prefix=OPT_NEG %s6; RUN: opt -S -mtriple=amdgcn-- -passes=pre-isel-intrinsic-lowering -mem-intrinsic-expand-size=8 %s | FileCheck -check-prefix=OPT8 %s7; RUN: opt -S -mtriple=amdgcn-- -passes=pre-isel-intrinsic-lowering -mem-intrinsic-expand-size=4 %s | FileCheck -check-prefix=OPT4 %s8; RUN: opt -S -mtriple=amdgcn-- -passes=pre-isel-intrinsic-lowering -mem-intrinsic-expand-size=0 %s | FileCheck -check-prefix=OPT0 %s9; RUN: opt -S -mtriple=amdgcn-- -passes=pre-isel-intrinsic-lowering -mem-intrinsic-expand-size=-1 %s | FileCheck -check-prefix=OPT_NEG %s10 11; Test the -mem-intrinsic-expand-size flag works.12 13; Make sure we can always eliminate the intrinsic, even at 0.14define amdgpu_kernel void @memset_size_0(ptr addrspace(1) %dst, i8 %val) {15; OPT8-LABEL: @memset_size_0(16; OPT8-NEXT: call void @llvm.memset.p1.i64(ptr addrspace(1) [[DST:%.*]], i8 [[VAL:%.*]], i64 0, i1 false)17; OPT8-NEXT: ret void18;19; OPT4-LABEL: @memset_size_0(20; OPT4-NEXT: call void @llvm.memset.p1.i64(ptr addrspace(1) [[DST:%.*]], i8 [[VAL:%.*]], i64 0, i1 false)21; OPT4-NEXT: ret void22;23; OPT0-LABEL: @memset_size_0(24; OPT0-NEXT: br i1 true, label [[SPLIT:%.*]], label [[LOADSTORELOOP:%.*]]25; OPT0: loadstoreloop:26; OPT0-NEXT: [[TMP1:%.*]] = phi i64 [ 0, [[TMP0:%.*]] ], [ [[TMP3:%.*]], [[LOADSTORELOOP]] ]27; OPT0-NEXT: [[TMP2:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[DST:%.*]], i64 [[TMP1]]28; OPT0-NEXT: store i8 [[VAL:%.*]], ptr addrspace(1) [[TMP2]], align 129; OPT0-NEXT: [[TMP3]] = add i64 [[TMP1]], 130; OPT0-NEXT: [[TMP4:%.*]] = icmp ult i64 [[TMP3]], 031; OPT0-NEXT: br i1 [[TMP4]], label [[LOADSTORELOOP]], label [[SPLIT]]32; OPT0: split:33; OPT0-NEXT: ret void34;35; OPT_NEG-LABEL: @memset_size_0(36; OPT_NEG-NEXT: call void @llvm.memset.p1.i64(ptr addrspace(1) [[DST:%.*]], i8 [[VAL:%.*]], i64 0, i1 false)37; OPT_NEG-NEXT: ret void38;39 call void @llvm.memset.p1.i64(ptr addrspace(1) %dst, i8 %val, i64 0, i1 false)40 ret void41}42 43define amdgpu_kernel void @memset_size_4(ptr addrspace(1) %dst, i8 %val) {44; OPT8-LABEL: @memset_size_4(45; OPT8-NEXT: call void @llvm.memset.p1.i64(ptr addrspace(1) [[DST:%.*]], i8 [[VAL:%.*]], i64 4, i1 false)46; OPT8-NEXT: ret void47;48; OPT4-LABEL: @memset_size_4(49; OPT4-NEXT: call void @llvm.memset.p1.i64(ptr addrspace(1) [[DST:%.*]], i8 [[VAL:%.*]], i64 4, i1 false)50; OPT4-NEXT: ret void51;52; OPT0-LABEL: @memset_size_4(53; OPT0-NEXT: br i1 false, label [[SPLIT:%.*]], label [[LOADSTORELOOP:%.*]]54; OPT0: loadstoreloop:55; OPT0-NEXT: [[TMP1:%.*]] = phi i64 [ 0, [[TMP0:%.*]] ], [ [[TMP3:%.*]], [[LOADSTORELOOP]] ]56; OPT0-NEXT: [[TMP2:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[DST:%.*]], i64 [[TMP1]]57; OPT0-NEXT: store i8 [[VAL:%.*]], ptr addrspace(1) [[TMP2]], align 158; OPT0-NEXT: [[TMP3]] = add i64 [[TMP1]], 159; OPT0-NEXT: [[TMP4:%.*]] = icmp ult i64 [[TMP3]], 460; OPT0-NEXT: br i1 [[TMP4]], label [[LOADSTORELOOP]], label [[SPLIT]]61; OPT0: split:62; OPT0-NEXT: ret void63;64; OPT_NEG-LABEL: @memset_size_4(65; OPT_NEG-NEXT: call void @llvm.memset.p1.i64(ptr addrspace(1) [[DST:%.*]], i8 [[VAL:%.*]], i64 4, i1 false)66; OPT_NEG-NEXT: ret void67;68 call void @llvm.memset.p1.i64(ptr addrspace(1) %dst, i8 %val, i64 4, i1 false)69 ret void70}71 72define amdgpu_kernel void @memset_size_8(ptr addrspace(1) %dst, i8 %val) {73; OPT8-LABEL: @memset_size_8(74; OPT8-NEXT: call void @llvm.memset.p1.i64(ptr addrspace(1) [[DST:%.*]], i8 [[VAL:%.*]], i64 8, i1 false)75; OPT8-NEXT: ret void76;77; OPT4-LABEL: @memset_size_8(78; OPT4-NEXT: br i1 false, label [[SPLIT:%.*]], label [[LOADSTORELOOP:%.*]]79; OPT4: loadstoreloop:80; OPT4-NEXT: [[TMP1:%.*]] = phi i64 [ 0, [[TMP0:%.*]] ], [ [[TMP3:%.*]], [[LOADSTORELOOP]] ]81; OPT4-NEXT: [[TMP2:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[DST:%.*]], i64 [[TMP1]]82; OPT4-NEXT: store i8 [[VAL:%.*]], ptr addrspace(1) [[TMP2]], align 183; OPT4-NEXT: [[TMP3]] = add i64 [[TMP1]], 184; OPT4-NEXT: [[TMP4:%.*]] = icmp ult i64 [[TMP3]], 885; OPT4-NEXT: br i1 [[TMP4]], label [[LOADSTORELOOP]], label [[SPLIT]]86; OPT4: split:87; OPT4-NEXT: ret void88;89; OPT0-LABEL: @memset_size_8(90; OPT0-NEXT: br i1 false, label [[SPLIT:%.*]], label [[LOADSTORELOOP:%.*]]91; OPT0: loadstoreloop:92; OPT0-NEXT: [[TMP1:%.*]] = phi i64 [ 0, [[TMP0:%.*]] ], [ [[TMP3:%.*]], [[LOADSTORELOOP]] ]93; OPT0-NEXT: [[TMP2:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[DST:%.*]], i64 [[TMP1]]94; OPT0-NEXT: store i8 [[VAL:%.*]], ptr addrspace(1) [[TMP2]], align 195; OPT0-NEXT: [[TMP3]] = add i64 [[TMP1]], 196; OPT0-NEXT: [[TMP4:%.*]] = icmp ult i64 [[TMP3]], 897; OPT0-NEXT: br i1 [[TMP4]], label [[LOADSTORELOOP]], label [[SPLIT]]98; OPT0: split:99; OPT0-NEXT: ret void100;101; OPT_NEG-LABEL: @memset_size_8(102; OPT_NEG-NEXT: call void @llvm.memset.p1.i64(ptr addrspace(1) [[DST:%.*]], i8 [[VAL:%.*]], i64 8, i1 false)103; OPT_NEG-NEXT: ret void104;105 call void @llvm.memset.p1.i64(ptr addrspace(1) %dst, i8 %val, i64 8, i1 false)106 ret void107}108 109declare void @llvm.memset.p1.i64(ptr addrspace(1) nocapture writeonly, i8, i64, i1 immarg) #0110 111attributes #0 = { argmemonly nounwind willreturn writeonly }112