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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -S -mtriple=amdgcn--amdhsa -passes=amdgpu-lower-module-lds < %s --amdgpu-lower-module-lds-strategy=hybrid | FileCheck -check-prefix=OPT %s3; RUN: llc -mtriple=amdgcn--amdhsa < %s --amdgpu-lower-module-lds-strategy=hybrid | FileCheck -check-prefix=GCN %s4 5; Opt checks from utils/update_test_checks.py, llc checks from utils/update_llc_test_checks.py6 7; Define four variables and four non-kernel functions which access exactly one variable each8@v0 = addrspace(3) global float poison9@v1 = addrspace(3) global i16 poison, align 1610@v2 = addrspace(3) global i64 poison11@v3 = addrspace(3) global i8 poison12@unused = addrspace(3) global i16 poison13 14; OPT{LITERAL}: @llvm.amdgcn.lds.offset.table = internal addrspace(4) constant [2 x [1 x i32]] [[1 x i32] [i32 ptrtoint (ptr addrspace(3) @llvm.amdgcn.kernel.k123.lds to i32)], [1 x i32] [i32 ptrtoint (ptr addrspace(3) @llvm.amdgcn.kernel.k23.lds to i32)]]15 16define void @f0() {17; OPT-LABEL: @f0(18; OPT-NEXT: [[LD:%.*]] = load float, ptr addrspace(3) @llvm.amdgcn.kernel.k01.lds, align 419; OPT-NEXT: [[MUL:%.*]] = fmul float [[LD]], 2.000000e+0020; OPT-NEXT: store float [[MUL]], ptr addrspace(3) @llvm.amdgcn.kernel.k01.lds, align 421; OPT-NEXT: ret void22;23; GCN-LABEL: f0:24; GCN: ; %bb.0:25; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)26; GCN-NEXT: v_mov_b32_e32 v0, 027; GCN-NEXT: s_mov_b32 m0, -128; GCN-NEXT: ds_read_b32 v1, v0 offset:429; GCN-NEXT: s_waitcnt lgkmcnt(0)30; GCN-NEXT: v_add_f32_e32 v1, v1, v131; GCN-NEXT: ds_write_b32 v0, v1 offset:432; GCN-NEXT: s_waitcnt lgkmcnt(0)33; GCN-NEXT: s_setpc_b64 s[30:31]34 %ld = load float, ptr addrspace(3) @v035 %mul = fmul float %ld, 2.36 store float %mul, ptr addrspace(3) @v037 ret void38}39 40define void @f1() {41; OPT-LABEL: @f1(42; OPT-NEXT: [[LD:%.*]] = load i16, ptr addrspace(3) @llvm.amdgcn.module.lds, align 1643; OPT-NEXT: [[MUL:%.*]] = mul i16 [[LD]], 344; OPT-NEXT: store i16 [[MUL]], ptr addrspace(3) @llvm.amdgcn.module.lds, align 1645; OPT-NEXT: ret void46;47; GCN-LABEL: f1:48; GCN: ; %bb.0:49; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)50; GCN-NEXT: v_mov_b32_e32 v0, 051; GCN-NEXT: s_mov_b32 m0, -152; GCN-NEXT: ds_read_u16 v1, v053; GCN-NEXT: s_waitcnt lgkmcnt(0)54; GCN-NEXT: v_mul_lo_u32 v1, v1, 355; GCN-NEXT: ds_write_b16 v0, v156; GCN-NEXT: s_waitcnt lgkmcnt(0)57; GCN-NEXT: s_setpc_b64 s[30:31]58 %ld = load i16, ptr addrspace(3) @v159 %mul = mul i16 %ld, 360 store i16 %mul, ptr addrspace(3) @v161 ret void62}63 64define void @f2() {65; OPT-LABEL: @f2(66; OPT-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.lds.kernel.id()67; OPT-NEXT: [[V22:%.*]] = getelementptr inbounds [2 x [1 x i32]], ptr addrspace(4) @llvm.amdgcn.lds.offset.table, i32 0, i32 [[TMP1]], i32 068; OPT-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[V22]], align 469; OPT-NEXT: [[V23:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(3)70; OPT-NEXT: [[LD:%.*]] = load i64, ptr addrspace(3) [[V23]], align 871; OPT-NEXT: [[MUL:%.*]] = mul i64 [[LD]], 472; OPT-NEXT: [[V2:%.*]] = getelementptr inbounds [2 x [1 x i32]], ptr addrspace(4) @llvm.amdgcn.lds.offset.table, i32 0, i32 [[TMP1]], i32 073; OPT-NEXT: [[TMP3:%.*]] = load i32, ptr addrspace(4) [[V2]], align 474; OPT-NEXT: [[V21:%.*]] = inttoptr i32 [[TMP3]] to ptr addrspace(3)75; OPT-NEXT: store i64 [[MUL]], ptr addrspace(3) [[V21]], align 876; OPT-NEXT: ret void77;78; GCN-LABEL: f2:79; GCN: ; %bb.0:80; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)81; GCN-NEXT: s_mov_b32 s4, s1582; GCN-NEXT: s_ashr_i32 s5, s15, 3183; GCN-NEXT: s_getpc_b64 s[6:7]84; GCN-NEXT: s_add_u32 s6, s6, llvm.amdgcn.lds.offset.table@rel32@lo+485; GCN-NEXT: s_addc_u32 s7, s7, llvm.amdgcn.lds.offset.table@rel32@hi+1286; GCN-NEXT: s_lshl_b64 s[4:5], s[4:5], 287; GCN-NEXT: s_add_u32 s4, s6, s488; GCN-NEXT: s_addc_u32 s5, s7, s589; GCN-NEXT: s_load_dword s4, s[4:5], 0x090; GCN-NEXT: s_waitcnt lgkmcnt(0)91; GCN-NEXT: v_mov_b32_e32 v2, s492; GCN-NEXT: s_mov_b32 m0, -193; GCN-NEXT: ds_read_b64 v[0:1], v294; GCN-NEXT: s_waitcnt lgkmcnt(0)95; GCN-NEXT: v_lshl_b64 v[0:1], v[0:1], 296; GCN-NEXT: ds_write_b64 v2, v[0:1]97; GCN-NEXT: s_waitcnt lgkmcnt(0)98; GCN-NEXT: s_setpc_b64 s[30:31]99 %ld = load i64, ptr addrspace(3) @v2100 %mul = mul i64 %ld, 4101 store i64 %mul, ptr addrspace(3) @v2102 ret void103}104 105define void @f3() {106; OPT-LABEL: @f3(107; OPT-NEXT: [[LD:%.*]] = load i8, ptr addrspace(3) getelementptr inbounds ([[LLVM_AMDGCN_KERNEL_K23_LDS_T:%.*]], ptr addrspace(3) @llvm.amdgcn.kernel.k23.lds, i32 0, i32 1), align 8108; OPT-NEXT: [[MUL:%.*]] = mul i8 [[LD]], 5109; OPT-NEXT: store i8 [[MUL]], ptr addrspace(3) getelementptr inbounds ([[LLVM_AMDGCN_KERNEL_K23_LDS_T]], ptr addrspace(3) @llvm.amdgcn.kernel.k23.lds, i32 0, i32 1), align 8110; OPT-NEXT: ret void111;112; GCN-LABEL: f3:113; GCN: ; %bb.0:114; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)115; GCN-NEXT: v_mov_b32_e32 v0, 0116; GCN-NEXT: s_mov_b32 m0, -1117; GCN-NEXT: ds_read_u8 v1, v0 offset:8118; GCN-NEXT: s_waitcnt lgkmcnt(0)119; GCN-NEXT: v_mul_lo_u32 v1, v1, 5120; GCN-NEXT: ds_write_b8 v0, v1 offset:8121; GCN-NEXT: s_waitcnt lgkmcnt(0)122; GCN-NEXT: s_setpc_b64 s[30:31]123 %ld = load i8, ptr addrspace(3) @v3124 %mul = mul i8 %ld, 5125 store i8 %mul, ptr addrspace(3) @v3126 ret void127}128 129; Doesn't access any via a function, won't be in the lookup table130define amdgpu_kernel void @kernel_no_table() {131; OPT-LABEL: @kernel_no_table(132; OPT-NEXT: [[LD:%.*]] = load i64, ptr addrspace(3) @llvm.amdgcn.kernel.kernel_no_table.lds, align 8133; OPT-NEXT: [[MUL:%.*]] = mul i64 [[LD]], 8134; OPT-NEXT: store i64 [[MUL]], ptr addrspace(3) @llvm.amdgcn.kernel.kernel_no_table.lds, align 8135; OPT-NEXT: ret void136;137; GCN-LABEL: kernel_no_table:138; GCN: ; %bb.0:139; GCN-NEXT: v_mov_b32_e32 v2, 0140; GCN-NEXT: s_mov_b32 m0, -1141; GCN-NEXT: ds_read_b64 v[0:1], v2142; GCN-NEXT: s_waitcnt lgkmcnt(0)143; GCN-NEXT: v_lshl_b64 v[0:1], v[0:1], 3144; GCN-NEXT: ds_write_b64 v2, v[0:1]145; GCN-NEXT: s_endpgm146 %ld = load i64, ptr addrspace(3) @v2147 %mul = mul i64 %ld, 8148 store i64 %mul, ptr addrspace(3) @v2149 ret void150}151 152; Access two variables, will allocate those two153define amdgpu_kernel void @k01() {154; OPT-LABEL: @k01(155; OPT-NEXT: call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.kernel.k01.lds) ]156; OPT-NEXT: call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.module.lds) ]157; OPT-NEXT: call void @f0()158; OPT-NEXT: call void @f1()159; OPT-NEXT: ret void160;161; GCN-LABEL: k01:162; GCN: ; %bb.0:163; GCN-NEXT: s_mov_b32 s32, 0164; GCN-NEXT: s_mov_b32 flat_scratch_lo, s13165; GCN-NEXT: s_add_i32 s12, s12, s17166; GCN-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8167; GCN-NEXT: s_add_u32 s0, s0, s17168; GCN-NEXT: s_addc_u32 s1, s1, 0169; GCN-NEXT: s_mov_b32 s13, s15170; GCN-NEXT: s_mov_b32 s12, s14171; GCN-NEXT: s_getpc_b64 s[14:15]172; GCN-NEXT: s_add_u32 s14, s14, f0@gotpcrel32@lo+4173; GCN-NEXT: s_addc_u32 s15, s15, f0@gotpcrel32@hi+12174; GCN-NEXT: s_load_dwordx2 s[18:19], s[14:15], 0x0175; GCN-NEXT: v_lshlrev_b32_e32 v2, 20, v2176; GCN-NEXT: v_lshlrev_b32_e32 v1, 10, v1177; GCN-NEXT: v_or_b32_e32 v0, v0, v1178; GCN-NEXT: v_or_b32_e32 v31, v0, v2179; GCN-NEXT: s_mov_b32 s14, s16180; GCN-NEXT: s_waitcnt lgkmcnt(0)181; GCN-NEXT: s_swappc_b64 s[30:31], s[18:19]182; GCN-NEXT: s_getpc_b64 s[14:15]183; GCN-NEXT: s_add_u32 s14, s14, f1@gotpcrel32@lo+4184; GCN-NEXT: s_addc_u32 s15, s15, f1@gotpcrel32@hi+12185; GCN-NEXT: s_load_dwordx2 s[18:19], s[14:15], 0x0186; GCN-NEXT: s_mov_b32 s14, s16187; GCN-NEXT: s_waitcnt lgkmcnt(0)188; GCN-NEXT: s_swappc_b64 s[30:31], s[18:19]189; GCN-NEXT: s_endpgm190 191 call void @f0()192 call void @f1()193 ret void194}195 196define amdgpu_kernel void @k23() {197; OPT-LABEL: @k23(198; OPT-NEXT: call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.kernel.k23.lds) ], !alias.scope [[META5:![0-9]+]], !noalias [[META8:![0-9]+]]199; OPT-NEXT: call void @f2()200; OPT-NEXT: call void @f3()201; OPT-NEXT: ret void202;203; GCN-LABEL: k23:204; GCN: ; %bb.0:205; GCN-NEXT: s_mov_b32 s32, 0206; GCN-NEXT: s_mov_b32 flat_scratch_lo, s13207; GCN-NEXT: s_add_i32 s12, s12, s17208; GCN-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8209; GCN-NEXT: s_add_u32 s0, s0, s17210; GCN-NEXT: s_addc_u32 s1, s1, 0211; GCN-NEXT: s_mov_b32 s20, s16212; GCN-NEXT: s_mov_b32 s13, s15213; GCN-NEXT: s_mov_b32 s12, s14214; GCN-NEXT: s_mov_b64 s[16:17], s[6:7]215; GCN-NEXT: s_mov_b64 s[18:19], s[4:5]216; GCN-NEXT: s_getpc_b64 s[4:5]217; GCN-NEXT: s_add_u32 s4, s4, f2@gotpcrel32@lo+4218; GCN-NEXT: s_addc_u32 s5, s5, f2@gotpcrel32@hi+12219; GCN-NEXT: v_lshlrev_b32_e32 v2, 20, v2220; GCN-NEXT: s_load_dwordx2 s[22:23], s[4:5], 0x0221; GCN-NEXT: v_lshlrev_b32_e32 v1, 10, v1222; GCN-NEXT: v_or_b32_e32 v0, v0, v1223; GCN-NEXT: v_or_b32_e32 v31, v0, v2224; GCN-NEXT: s_mov_b32 s15, 1225; GCN-NEXT: s_mov_b64 s[4:5], s[18:19]226; GCN-NEXT: s_mov_b32 s14, s20227; GCN-NEXT: s_waitcnt lgkmcnt(0)228; GCN-NEXT: s_swappc_b64 s[30:31], s[22:23]229; GCN-NEXT: s_getpc_b64 s[4:5]230; GCN-NEXT: s_add_u32 s4, s4, f3@gotpcrel32@lo+4231; GCN-NEXT: s_addc_u32 s5, s5, f3@gotpcrel32@hi+12232; GCN-NEXT: s_load_dwordx2 s[22:23], s[4:5], 0x0233; GCN-NEXT: s_mov_b64 s[4:5], s[18:19]234; GCN-NEXT: s_mov_b64 s[6:7], s[16:17]235; GCN-NEXT: s_waitcnt lgkmcnt(0)236; GCN-NEXT: s_swappc_b64 s[30:31], s[22:23]237; GCN-NEXT: s_endpgm238 239 240 call void @f2()241 call void @f3()242 ret void243}244 245; Access and allocate three variables246define amdgpu_kernel void @k123() {247; OPT-LABEL: @k123(248; OPT-NEXT: call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.kernel.k123.lds) ], !alias.scope [[META11:![0-9]+]], !noalias [[META14:![0-9]+]]249; OPT-NEXT: call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.module.lds) ]250; OPT-NEXT: call void @f1()251; OPT-NEXT: [[LD:%.*]] = load i8, ptr addrspace(3) getelementptr inbounds ([[LLVM_AMDGCN_KERNEL_K123_LDS_T:%.*]], ptr addrspace(3) @llvm.amdgcn.kernel.k123.lds, i32 0, i32 1), align 8, !alias.scope [[META14]], !noalias [[META11]]252; OPT-NEXT: [[MUL:%.*]] = mul i8 [[LD]], 8253; OPT-NEXT: store i8 [[MUL]], ptr addrspace(3) getelementptr inbounds ([[LLVM_AMDGCN_KERNEL_K123_LDS_T]], ptr addrspace(3) @llvm.amdgcn.kernel.k123.lds, i32 0, i32 1), align 8, !alias.scope [[META14]], !noalias [[META11]]254; OPT-NEXT: call void @f2()255; OPT-NEXT: ret void256;257; GCN-LABEL: k123:258; GCN: ; %bb.0:259; GCN-NEXT: s_mov_b32 s32, 0260; GCN-NEXT: s_mov_b32 flat_scratch_lo, s13261; GCN-NEXT: s_add_i32 s12, s12, s17262; GCN-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8263; GCN-NEXT: s_add_u32 s0, s0, s17264; GCN-NEXT: s_addc_u32 s1, s1, 0265; GCN-NEXT: s_mov_b32 s13, s15266; GCN-NEXT: s_mov_b32 s12, s14267; GCN-NEXT: s_getpc_b64 s[14:15]268; GCN-NEXT: s_add_u32 s14, s14, f1@gotpcrel32@lo+4269; GCN-NEXT: s_addc_u32 s15, s15, f1@gotpcrel32@hi+12270; GCN-NEXT: v_lshlrev_b32_e32 v2, 20, v2271; GCN-NEXT: s_load_dwordx2 s[18:19], s[14:15], 0x0272; GCN-NEXT: v_lshlrev_b32_e32 v1, 10, v1273; GCN-NEXT: v_or_b32_e32 v0, v0, v1274; GCN-NEXT: v_or_b32_e32 v31, v0, v2275; GCN-NEXT: s_mov_b32 s15, 0276; GCN-NEXT: s_mov_b32 s14, s16277; GCN-NEXT: s_waitcnt lgkmcnt(0)278; GCN-NEXT: s_swappc_b64 s[30:31], s[18:19]279; GCN-NEXT: v_mov_b32_e32 v0, 0280; GCN-NEXT: s_mov_b32 m0, -1281; GCN-NEXT: ds_read_u8 v1, v0 offset:16282; GCN-NEXT: s_getpc_b64 s[14:15]283; GCN-NEXT: s_add_u32 s14, s14, f2@gotpcrel32@lo+4284; GCN-NEXT: s_addc_u32 s15, s15, f2@gotpcrel32@hi+12285; GCN-NEXT: s_load_dwordx2 s[18:19], s[14:15], 0x0286; GCN-NEXT: s_waitcnt lgkmcnt(0)287; GCN-NEXT: v_lshlrev_b32_e32 v1, 3, v1288; GCN-NEXT: ds_write_b8 v0, v1 offset:16289; GCN-NEXT: s_mov_b32 s15, 0290; GCN-NEXT: s_mov_b32 s14, s16291; GCN-NEXT: s_swappc_b64 s[30:31], s[18:19]292; GCN-NEXT: s_endpgm293 call void @f1()294 %ld = load i8, ptr addrspace(3) @v3295 %mul = mul i8 %ld, 8296 store i8 %mul, ptr addrspace(3) @v3297 call void @f2()298 ret void299}300 301!0 = !{i32 0}302!1 = !{i32 2}303!2 = !{i32 1}304 305; OPT: attributes #0 = { "amdgpu-lds-size"="8" }306; OPT: attributes #1 = { "amdgpu-lds-size"="16" }307; OPT: attributes #2 = { "amdgpu-lds-size"="24" }308; OPT: attributes #3 = { nocallback nofree nosync nounwind willreturn memory(none) }309; OPT: attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }310 311; OPT: !0 = !{i32 0, i32 1}312; OPT: !1 = !{i32 4, i32 5}313; OPT: !2 = !{i32 8, i32 9}314; OPT: !3 = !{i32 1, !"amdhsa_code_object_version", i32 500}315; OPT: !4 = !{i32 1}316; OPT: !5 = !{!6}317; OPT: !6 = distinct !{!6, !7}318; OPT: !7 = distinct !{!7}319; OPT: !8 = !{!9}320; OPT: !9 = distinct !{!9, !7}321; OPT: !10 = !{i32 0}322; OPT: !11 = !{!12}323; OPT: !12 = distinct !{!12, !13}324; OPT: !13 = distinct !{!13}325; OPT: !14 = !{!15}326; OPT: !15 = distinct !{!15, !13}327 328attributes #0 = { "amdgpu-lds-size"="8" }329attributes #1 = { "amdgpu-lds-size"="16" }330attributes #2 = { "amdgpu-lds-size"="24" }331attributes #3 = { nocallback nofree nosync nounwind willreturn memory(none) }332attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }333 334; Table size length number-kernels * number-variables * sizeof(uint16_t)335; GCN: .type llvm.amdgcn.lds.offset.table,@object336; GCN-NEXT: .section .data.rel.ro,"aw"337; GCN-NEXT: .p2align 2, 0x0338; GCN-NEXT: llvm.amdgcn.lds.offset.table:339; GCN-NEXT: .long 8340; GCN-NEXT: .long 0341; GCN-NEXT: .size llvm.amdgcn.lds.offset.table, 8342 343!llvm.module.flags = !{!3}344!3 = !{i32 1, !"amdhsa_code_object_version", i32 500}345