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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --extra_scrub --version 52 3; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,GFX9,GFX9-SDAG %s4; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,GFX9,GFX9-GISEL %s5; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1010 < %s | FileCheck -check-prefixes=GCN,GFX10,GFX10-SDAG %s6; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1010 < %s | FileCheck -check-prefixes=GCN,GFX10,GFX10-GISEL %s7; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GCN,GFX11,GFX11-SDAG,GFX11-SDAG-TRUE16 %s8; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GCN,GFX11,GFX11-SDAG,GFX11-SDAG-FAKE16 %s9; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GCN,GFX11,GFX11-GISEL,GFX11-GISEL-TRUE16 %s10; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GCN,GFX11,GFX11-GISEL,GFX11-GISEL-FAKE16 %s11 12declare float @llvm.rint.f32(float)13declare i32 @llvm.lrint.i32.f32(float)14declare i32 @llvm.lrint.i32.f64(double)15declare i64 @llvm.lrint.i64.f32(float)16declare i64 @llvm.lrint.i64.f64(double)17declare i64 @llvm.llrint.i64.f32(float)18declare half @llvm.rint.f16(half)19declare i32 @llvm.lrint.i32.f16(half %arg)20declare <2 x float> @llvm.rint.v2f32.v2f32(<2 x float> %arg)21declare <2 x i32> @llvm.lrint.v2i32.v2f32(<2 x float> %arg)22declare <2 x i64> @llvm.lrint.v2i64.v2f32(<2 x float> %arg)23 24define float @intrinsic_frint(float %arg) {25; GCN-LABEL: intrinsic_frint:26; GCN: ; %bb.0: ; %entry27; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)28; GCN-NEXT: v_rndne_f32_e32 v0, v029; GCN-NEXT: s_setpc_b64 s[30:31]30entry:31 %res = tail call float @llvm.rint.f32(float %arg)32 ret float %res33}34 35define i32 @intrinsic_lrint_i32_f32(float %arg) {36; GFX9-LABEL: intrinsic_lrint_i32_f32:37; GFX9: ; %bb.0: ; %entry38; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)39; GFX9-NEXT: v_rndne_f32_e32 v0, v040; GFX9-NEXT: v_cvt_i32_f32_e32 v0, v041; GFX9-NEXT: s_setpc_b64 s[30:31]42;43; GFX10-LABEL: intrinsic_lrint_i32_f32:44; GFX10: ; %bb.0: ; %entry45; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)46; GFX10-NEXT: v_rndne_f32_e32 v0, v047; GFX10-NEXT: v_cvt_i32_f32_e32 v0, v048; GFX10-NEXT: s_setpc_b64 s[30:31]49;50; GFX11-LABEL: intrinsic_lrint_i32_f32:51; GFX11: ; %bb.0: ; %entry52; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)53; GFX11-NEXT: v_rndne_f32_e32 v0, v054; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)55; GFX11-NEXT: v_cvt_i32_f32_e32 v0, v056; GFX11-NEXT: s_setpc_b64 s[30:31]57entry:58 %res = tail call i32 @llvm.lrint.i32.f32(float %arg)59 ret i32 %res60}61 62define i32 @intrinsic_lrint_i32_f64(double %arg) {63; GFX9-LABEL: intrinsic_lrint_i32_f64:64; GFX9: ; %bb.0: ; %entry65; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)66; GFX9-NEXT: v_rndne_f64_e32 v[0:1], v[0:1]67; GFX9-NEXT: v_cvt_i32_f64_e32 v0, v[0:1]68; GFX9-NEXT: s_setpc_b64 s[30:31]69;70; GFX10-LABEL: intrinsic_lrint_i32_f64:71; GFX10: ; %bb.0: ; %entry72; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)73; GFX10-NEXT: v_rndne_f64_e32 v[0:1], v[0:1]74; GFX10-NEXT: v_cvt_i32_f64_e32 v0, v[0:1]75; GFX10-NEXT: s_setpc_b64 s[30:31]76;77; GFX11-LABEL: intrinsic_lrint_i32_f64:78; GFX11: ; %bb.0: ; %entry79; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)80; GFX11-NEXT: v_rndne_f64_e32 v[0:1], v[0:1]81; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)82; GFX11-NEXT: v_cvt_i32_f64_e32 v0, v[0:1]83; GFX11-NEXT: s_setpc_b64 s[30:31]84entry:85 %res = tail call i32 @llvm.lrint.i32.f64(double %arg)86 ret i32 %res87}88 89define i64 @intrinsic_lrint_i64_f32(float %arg) {90; GFX9-SDAG-LABEL: intrinsic_lrint_i64_f32:91; GFX9-SDAG: ; %bb.0: ; %entry92; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)93; GFX9-SDAG-NEXT: v_rndne_f32_e32 v0, v094; GFX9-SDAG-NEXT: s_mov_b32 s4, 0x2f80000095; GFX9-SDAG-NEXT: v_mul_f32_e64 v1, |v0|, s496; GFX9-SDAG-NEXT: v_floor_f32_e32 v1, v197; GFX9-SDAG-NEXT: s_mov_b32 s4, 0xcf80000098; GFX9-SDAG-NEXT: v_cvt_u32_f32_e32 v2, v199; GFX9-SDAG-NEXT: v_fma_f32 v1, v1, s4, |v0|100; GFX9-SDAG-NEXT: v_cvt_u32_f32_e32 v1, v1101; GFX9-SDAG-NEXT: v_ashrrev_i32_e32 v3, 31, v0102; GFX9-SDAG-NEXT: v_xor_b32_e32 v2, v2, v3103; GFX9-SDAG-NEXT: v_xor_b32_e32 v0, v1, v3104; GFX9-SDAG-NEXT: v_sub_co_u32_e32 v0, vcc, v0, v3105; GFX9-SDAG-NEXT: v_subb_co_u32_e32 v1, vcc, v2, v3, vcc106; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]107;108; GFX9-GISEL-LABEL: intrinsic_lrint_i64_f32:109; GFX9-GISEL: ; %bb.0: ; %entry110; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)111; GFX9-GISEL-NEXT: v_rndne_f32_e32 v0, v0112; GFX9-GISEL-NEXT: v_trunc_f32_e32 v1, v0113; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0x2f800000114; GFX9-GISEL-NEXT: v_mul_f32_e64 v2, |v1|, v2115; GFX9-GISEL-NEXT: v_floor_f32_e32 v2, v2116; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0xcf800000117; GFX9-GISEL-NEXT: v_fma_f32 v1, v2, v3, |v1|118; GFX9-GISEL-NEXT: v_cvt_u32_f32_e32 v1, v1119; GFX9-GISEL-NEXT: v_cvt_u32_f32_e32 v2, v2120; GFX9-GISEL-NEXT: v_ashrrev_i32_e32 v3, 31, v0121; GFX9-GISEL-NEXT: v_xor_b32_e32 v0, v1, v3122; GFX9-GISEL-NEXT: v_xor_b32_e32 v1, v2, v3123; GFX9-GISEL-NEXT: v_sub_co_u32_e32 v0, vcc, v0, v3124; GFX9-GISEL-NEXT: v_subb_co_u32_e32 v1, vcc, v1, v3, vcc125; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]126;127; GFX10-SDAG-LABEL: intrinsic_lrint_i64_f32:128; GFX10-SDAG: ; %bb.0: ; %entry129; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)130; GFX10-SDAG-NEXT: v_rndne_f32_e32 v0, v0131; GFX10-SDAG-NEXT: v_mul_f32_e64 v1, 0x2f800000, |v0|132; GFX10-SDAG-NEXT: v_ashrrev_i32_e32 v3, 31, v0133; GFX10-SDAG-NEXT: v_floor_f32_e32 v1, v1134; GFX10-SDAG-NEXT: v_fma_f32 v2, 0xcf800000, v1, |v0|135; GFX10-SDAG-NEXT: v_cvt_u32_f32_e32 v1, v1136; GFX10-SDAG-NEXT: v_cvt_u32_f32_e32 v0, v2137; GFX10-SDAG-NEXT: v_xor_b32_e32 v1, v1, v3138; GFX10-SDAG-NEXT: v_xor_b32_e32 v0, v0, v3139; GFX10-SDAG-NEXT: v_sub_co_u32 v0, vcc_lo, v0, v3140; GFX10-SDAG-NEXT: v_sub_co_ci_u32_e32 v1, vcc_lo, v1, v3, vcc_lo141; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]142;143; GFX10-GISEL-LABEL: intrinsic_lrint_i64_f32:144; GFX10-GISEL: ; %bb.0: ; %entry145; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)146; GFX10-GISEL-NEXT: v_rndne_f32_e32 v0, v0147; GFX10-GISEL-NEXT: v_trunc_f32_e32 v1, v0148; GFX10-GISEL-NEXT: v_ashrrev_i32_e32 v3, 31, v0149; GFX10-GISEL-NEXT: v_mul_f32_e64 v2, 0x2f800000, |v1|150; GFX10-GISEL-NEXT: v_floor_f32_e32 v2, v2151; GFX10-GISEL-NEXT: v_fma_f32 v1, 0xcf800000, v2, |v1|152; GFX10-GISEL-NEXT: v_cvt_u32_f32_e32 v0, v1153; GFX10-GISEL-NEXT: v_cvt_u32_f32_e32 v1, v2154; GFX10-GISEL-NEXT: v_xor_b32_e32 v0, v0, v3155; GFX10-GISEL-NEXT: v_xor_b32_e32 v1, v1, v3156; GFX10-GISEL-NEXT: v_sub_co_u32 v0, vcc_lo, v0, v3157; GFX10-GISEL-NEXT: v_sub_co_ci_u32_e32 v1, vcc_lo, v1, v3, vcc_lo158; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]159;160; GFX11-SDAG-LABEL: intrinsic_lrint_i64_f32:161; GFX11-SDAG: ; %bb.0: ; %entry162; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)163; GFX11-SDAG-NEXT: v_rndne_f32_e32 v0, v0164; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)165; GFX11-SDAG-NEXT: v_mul_f32_e64 v1, 0x2f800000, |v0|166; GFX11-SDAG-NEXT: v_ashrrev_i32_e32 v3, 31, v0167; GFX11-SDAG-NEXT: v_floor_f32_e32 v1, v1168; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)169; GFX11-SDAG-NEXT: v_fma_f32 v2, 0xcf800000, v1, |v0|170; GFX11-SDAG-NEXT: v_cvt_u32_f32_e32 v1, v1171; GFX11-SDAG-NEXT: v_cvt_u32_f32_e32 v0, v2172; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)173; GFX11-SDAG-NEXT: v_xor_b32_e32 v1, v1, v3174; GFX11-SDAG-NEXT: v_xor_b32_e32 v0, v0, v3175; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)176; GFX11-SDAG-NEXT: v_sub_co_u32 v0, vcc_lo, v0, v3177; GFX11-SDAG-NEXT: v_sub_co_ci_u32_e64 v1, null, v1, v3, vcc_lo178; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]179;180; GFX11-GISEL-LABEL: intrinsic_lrint_i64_f32:181; GFX11-GISEL: ; %bb.0: ; %entry182; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)183; GFX11-GISEL-NEXT: v_rndne_f32_e32 v0, v0184; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)185; GFX11-GISEL-NEXT: v_trunc_f32_e32 v1, v0186; GFX11-GISEL-NEXT: v_ashrrev_i32_e32 v3, 31, v0187; GFX11-GISEL-NEXT: v_mul_f32_e64 v2, 0x2f800000, |v1|188; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)189; GFX11-GISEL-NEXT: v_floor_f32_e32 v2, v2190; GFX11-GISEL-NEXT: v_fma_f32 v1, 0xcf800000, v2, |v1|191; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)192; GFX11-GISEL-NEXT: v_cvt_u32_f32_e32 v0, v1193; GFX11-GISEL-NEXT: v_cvt_u32_f32_e32 v1, v2194; GFX11-GISEL-NEXT: v_xor_b32_e32 v0, v0, v3195; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)196; GFX11-GISEL-NEXT: v_xor_b32_e32 v1, v1, v3197; GFX11-GISEL-NEXT: v_sub_co_u32 v0, vcc_lo, v0, v3198; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)199; GFX11-GISEL-NEXT: v_sub_co_ci_u32_e64 v1, null, v1, v3, vcc_lo200; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]201entry:202 %res = tail call i64 @llvm.lrint.i64.f32(float %arg)203 ret i64 %res204}205 206define i64 @intrinsic_lrint_i64_f64(double %arg) {207; GFX9-SDAG-LABEL: intrinsic_lrint_i64_f64:208; GFX9-SDAG: ; %bb.0: ; %entry209; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)210; GFX9-SDAG-NEXT: v_rndne_f64_e32 v[0:1], v[0:1]211; GFX9-SDAG-NEXT: s_movk_i32 s4, 0xffe0212; GFX9-SDAG-NEXT: v_ldexp_f64 v[2:3], v[0:1], s4213; GFX9-SDAG-NEXT: s_mov_b32 s4, 0214; GFX9-SDAG-NEXT: s_mov_b32 s5, 0xc1f00000215; GFX9-SDAG-NEXT: v_floor_f64_e32 v[2:3], v[2:3]216; GFX9-SDAG-NEXT: v_fma_f64 v[0:1], v[2:3], s[4:5], v[0:1]217; GFX9-SDAG-NEXT: v_cvt_u32_f64_e32 v0, v[0:1]218; GFX9-SDAG-NEXT: v_cvt_i32_f64_e32 v1, v[2:3]219; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]220;221; GFX9-GISEL-LABEL: intrinsic_lrint_i64_f64:222; GFX9-GISEL: ; %bb.0: ; %entry223; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)224; GFX9-GISEL-NEXT: v_rndne_f64_e32 v[0:1], v[0:1]225; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0226; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x3df00000227; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0228; GFX9-GISEL-NEXT: v_mov_b32_e32 v5, 0xc1f00000229; GFX9-GISEL-NEXT: v_trunc_f64_e32 v[0:1], v[0:1]230; GFX9-GISEL-NEXT: v_mul_f64 v[2:3], v[0:1], v[2:3]231; GFX9-GISEL-NEXT: v_floor_f64_e32 v[2:3], v[2:3]232; GFX9-GISEL-NEXT: v_fma_f64 v[0:1], v[2:3], v[4:5], v[0:1]233; GFX9-GISEL-NEXT: v_cvt_u32_f64_e32 v0, v[0:1]234; GFX9-GISEL-NEXT: v_cvt_i32_f64_e32 v1, v[2:3]235; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]236;237; GFX10-SDAG-LABEL: intrinsic_lrint_i64_f64:238; GFX10-SDAG: ; %bb.0: ; %entry239; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)240; GFX10-SDAG-NEXT: v_rndne_f64_e32 v[0:1], v[0:1]241; GFX10-SDAG-NEXT: v_ldexp_f64 v[2:3], v[0:1], 0xffffffe0242; GFX10-SDAG-NEXT: v_floor_f64_e32 v[2:3], v[2:3]243; GFX10-SDAG-NEXT: v_fma_f64 v[0:1], 0xc1f00000, v[2:3], v[0:1]244; GFX10-SDAG-NEXT: v_cvt_u32_f64_e32 v0, v[0:1]245; GFX10-SDAG-NEXT: v_cvt_i32_f64_e32 v1, v[2:3]246; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]247;248; GFX10-GISEL-LABEL: intrinsic_lrint_i64_f64:249; GFX10-GISEL: ; %bb.0: ; %entry250; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)251; GFX10-GISEL-NEXT: v_rndne_f64_e32 v[0:1], v[0:1]252; GFX10-GISEL-NEXT: v_trunc_f64_e32 v[0:1], v[0:1]253; GFX10-GISEL-NEXT: v_mul_f64 v[2:3], 0x3df00000, v[0:1]254; GFX10-GISEL-NEXT: v_floor_f64_e32 v[2:3], v[2:3]255; GFX10-GISEL-NEXT: v_fma_f64 v[0:1], 0xc1f00000, v[2:3], v[0:1]256; GFX10-GISEL-NEXT: v_cvt_u32_f64_e32 v0, v[0:1]257; GFX10-GISEL-NEXT: v_cvt_i32_f64_e32 v1, v[2:3]258; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]259;260; GFX11-SDAG-LABEL: intrinsic_lrint_i64_f64:261; GFX11-SDAG: ; %bb.0: ; %entry262; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)263; GFX11-SDAG-NEXT: v_rndne_f64_e32 v[0:1], v[0:1]264; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)265; GFX11-SDAG-NEXT: v_ldexp_f64 v[2:3], v[0:1], 0xffffffe0266; GFX11-SDAG-NEXT: v_floor_f64_e32 v[2:3], v[2:3]267; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)268; GFX11-SDAG-NEXT: v_fma_f64 v[0:1], 0xc1f00000, v[2:3], v[0:1]269; GFX11-SDAG-NEXT: v_cvt_u32_f64_e32 v0, v[0:1]270; GFX11-SDAG-NEXT: v_cvt_i32_f64_e32 v1, v[2:3]271; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]272;273; GFX11-GISEL-LABEL: intrinsic_lrint_i64_f64:274; GFX11-GISEL: ; %bb.0: ; %entry275; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)276; GFX11-GISEL-NEXT: v_rndne_f64_e32 v[0:1], v[0:1]277; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)278; GFX11-GISEL-NEXT: v_trunc_f64_e32 v[0:1], v[0:1]279; GFX11-GISEL-NEXT: v_mul_f64 v[2:3], 0x3df00000, v[0:1]280; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)281; GFX11-GISEL-NEXT: v_floor_f64_e32 v[2:3], v[2:3]282; GFX11-GISEL-NEXT: v_fma_f64 v[0:1], 0xc1f00000, v[2:3], v[0:1]283; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)284; GFX11-GISEL-NEXT: v_cvt_u32_f64_e32 v0, v[0:1]285; GFX11-GISEL-NEXT: v_cvt_i32_f64_e32 v1, v[2:3]286; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]287entry:288 %res = tail call i64 @llvm.lrint.i64.f64(double %arg)289 ret i64 %res290}291 292define i64 @intrinsic_llrint_i64_f32(float %arg) {293; GFX9-SDAG-LABEL: intrinsic_llrint_i64_f32:294; GFX9-SDAG: ; %bb.0: ; %entry295; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)296; GFX9-SDAG-NEXT: v_rndne_f32_e32 v0, v0297; GFX9-SDAG-NEXT: s_mov_b32 s4, 0x2f800000298; GFX9-SDAG-NEXT: v_mul_f32_e64 v1, |v0|, s4299; GFX9-SDAG-NEXT: v_floor_f32_e32 v1, v1300; GFX9-SDAG-NEXT: s_mov_b32 s4, 0xcf800000301; GFX9-SDAG-NEXT: v_cvt_u32_f32_e32 v2, v1302; GFX9-SDAG-NEXT: v_fma_f32 v1, v1, s4, |v0|303; GFX9-SDAG-NEXT: v_cvt_u32_f32_e32 v1, v1304; GFX9-SDAG-NEXT: v_ashrrev_i32_e32 v3, 31, v0305; GFX9-SDAG-NEXT: v_xor_b32_e32 v2, v2, v3306; GFX9-SDAG-NEXT: v_xor_b32_e32 v0, v1, v3307; GFX9-SDAG-NEXT: v_sub_co_u32_e32 v0, vcc, v0, v3308; GFX9-SDAG-NEXT: v_subb_co_u32_e32 v1, vcc, v2, v3, vcc309; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]310;311; GFX9-GISEL-LABEL: intrinsic_llrint_i64_f32:312; GFX9-GISEL: ; %bb.0: ; %entry313; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)314; GFX9-GISEL-NEXT: v_rndne_f32_e32 v0, v0315; GFX9-GISEL-NEXT: v_trunc_f32_e32 v1, v0316; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0x2f800000317; GFX9-GISEL-NEXT: v_mul_f32_e64 v2, |v1|, v2318; GFX9-GISEL-NEXT: v_floor_f32_e32 v2, v2319; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0xcf800000320; GFX9-GISEL-NEXT: v_fma_f32 v1, v2, v3, |v1|321; GFX9-GISEL-NEXT: v_cvt_u32_f32_e32 v1, v1322; GFX9-GISEL-NEXT: v_cvt_u32_f32_e32 v2, v2323; GFX9-GISEL-NEXT: v_ashrrev_i32_e32 v3, 31, v0324; GFX9-GISEL-NEXT: v_xor_b32_e32 v0, v1, v3325; GFX9-GISEL-NEXT: v_xor_b32_e32 v1, v2, v3326; GFX9-GISEL-NEXT: v_sub_co_u32_e32 v0, vcc, v0, v3327; GFX9-GISEL-NEXT: v_subb_co_u32_e32 v1, vcc, v1, v3, vcc328; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]329;330; GFX10-SDAG-LABEL: intrinsic_llrint_i64_f32:331; GFX10-SDAG: ; %bb.0: ; %entry332; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)333; GFX10-SDAG-NEXT: v_rndne_f32_e32 v0, v0334; GFX10-SDAG-NEXT: v_mul_f32_e64 v1, 0x2f800000, |v0|335; GFX10-SDAG-NEXT: v_ashrrev_i32_e32 v3, 31, v0336; GFX10-SDAG-NEXT: v_floor_f32_e32 v1, v1337; GFX10-SDAG-NEXT: v_fma_f32 v2, 0xcf800000, v1, |v0|338; GFX10-SDAG-NEXT: v_cvt_u32_f32_e32 v1, v1339; GFX10-SDAG-NEXT: v_cvt_u32_f32_e32 v0, v2340; GFX10-SDAG-NEXT: v_xor_b32_e32 v1, v1, v3341; GFX10-SDAG-NEXT: v_xor_b32_e32 v0, v0, v3342; GFX10-SDAG-NEXT: v_sub_co_u32 v0, vcc_lo, v0, v3343; GFX10-SDAG-NEXT: v_sub_co_ci_u32_e32 v1, vcc_lo, v1, v3, vcc_lo344; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]345;346; GFX10-GISEL-LABEL: intrinsic_llrint_i64_f32:347; GFX10-GISEL: ; %bb.0: ; %entry348; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)349; GFX10-GISEL-NEXT: v_rndne_f32_e32 v0, v0350; GFX10-GISEL-NEXT: v_trunc_f32_e32 v1, v0351; GFX10-GISEL-NEXT: v_ashrrev_i32_e32 v3, 31, v0352; GFX10-GISEL-NEXT: v_mul_f32_e64 v2, 0x2f800000, |v1|353; GFX10-GISEL-NEXT: v_floor_f32_e32 v2, v2354; GFX10-GISEL-NEXT: v_fma_f32 v1, 0xcf800000, v2, |v1|355; GFX10-GISEL-NEXT: v_cvt_u32_f32_e32 v0, v1356; GFX10-GISEL-NEXT: v_cvt_u32_f32_e32 v1, v2357; GFX10-GISEL-NEXT: v_xor_b32_e32 v0, v0, v3358; GFX10-GISEL-NEXT: v_xor_b32_e32 v1, v1, v3359; GFX10-GISEL-NEXT: v_sub_co_u32 v0, vcc_lo, v0, v3360; GFX10-GISEL-NEXT: v_sub_co_ci_u32_e32 v1, vcc_lo, v1, v3, vcc_lo361; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]362;363; GFX11-SDAG-LABEL: intrinsic_llrint_i64_f32:364; GFX11-SDAG: ; %bb.0: ; %entry365; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)366; GFX11-SDAG-NEXT: v_rndne_f32_e32 v0, v0367; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)368; GFX11-SDAG-NEXT: v_mul_f32_e64 v1, 0x2f800000, |v0|369; GFX11-SDAG-NEXT: v_ashrrev_i32_e32 v3, 31, v0370; GFX11-SDAG-NEXT: v_floor_f32_e32 v1, v1371; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)372; GFX11-SDAG-NEXT: v_fma_f32 v2, 0xcf800000, v1, |v0|373; GFX11-SDAG-NEXT: v_cvt_u32_f32_e32 v1, v1374; GFX11-SDAG-NEXT: v_cvt_u32_f32_e32 v0, v2375; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)376; GFX11-SDAG-NEXT: v_xor_b32_e32 v1, v1, v3377; GFX11-SDAG-NEXT: v_xor_b32_e32 v0, v0, v3378; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)379; GFX11-SDAG-NEXT: v_sub_co_u32 v0, vcc_lo, v0, v3380; GFX11-SDAG-NEXT: v_sub_co_ci_u32_e64 v1, null, v1, v3, vcc_lo381; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]382;383; GFX11-GISEL-LABEL: intrinsic_llrint_i64_f32:384; GFX11-GISEL: ; %bb.0: ; %entry385; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)386; GFX11-GISEL-NEXT: v_rndne_f32_e32 v0, v0387; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)388; GFX11-GISEL-NEXT: v_trunc_f32_e32 v1, v0389; GFX11-GISEL-NEXT: v_ashrrev_i32_e32 v3, 31, v0390; GFX11-GISEL-NEXT: v_mul_f32_e64 v2, 0x2f800000, |v1|391; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)392; GFX11-GISEL-NEXT: v_floor_f32_e32 v2, v2393; GFX11-GISEL-NEXT: v_fma_f32 v1, 0xcf800000, v2, |v1|394; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)395; GFX11-GISEL-NEXT: v_cvt_u32_f32_e32 v0, v1396; GFX11-GISEL-NEXT: v_cvt_u32_f32_e32 v1, v2397; GFX11-GISEL-NEXT: v_xor_b32_e32 v0, v0, v3398; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)399; GFX11-GISEL-NEXT: v_xor_b32_e32 v1, v1, v3400; GFX11-GISEL-NEXT: v_sub_co_u32 v0, vcc_lo, v0, v3401; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)402; GFX11-GISEL-NEXT: v_sub_co_ci_u32_e64 v1, null, v1, v3, vcc_lo403; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]404entry:405 %res = tail call i64 @llvm.llrint.i64.f32(float %arg)406 ret i64 %res407}408 409define i64 @intrinsic_llrint_i64_f64(double %arg) {410; GFX9-SDAG-LABEL: intrinsic_llrint_i64_f64:411; GFX9-SDAG: ; %bb.0: ; %entry412; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)413; GFX9-SDAG-NEXT: v_rndne_f64_e32 v[0:1], v[0:1]414; GFX9-SDAG-NEXT: s_movk_i32 s4, 0xffe0415; GFX9-SDAG-NEXT: v_ldexp_f64 v[2:3], v[0:1], s4416; GFX9-SDAG-NEXT: s_mov_b32 s4, 0417; GFX9-SDAG-NEXT: s_mov_b32 s5, 0xc1f00000418; GFX9-SDAG-NEXT: v_floor_f64_e32 v[2:3], v[2:3]419; GFX9-SDAG-NEXT: v_fma_f64 v[0:1], v[2:3], s[4:5], v[0:1]420; GFX9-SDAG-NEXT: v_cvt_u32_f64_e32 v0, v[0:1]421; GFX9-SDAG-NEXT: v_cvt_i32_f64_e32 v1, v[2:3]422; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]423;424; GFX9-GISEL-LABEL: intrinsic_llrint_i64_f64:425; GFX9-GISEL: ; %bb.0: ; %entry426; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)427; GFX9-GISEL-NEXT: v_rndne_f64_e32 v[0:1], v[0:1]428; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0429; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x3df00000430; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0431; GFX9-GISEL-NEXT: v_mov_b32_e32 v5, 0xc1f00000432; GFX9-GISEL-NEXT: v_trunc_f64_e32 v[0:1], v[0:1]433; GFX9-GISEL-NEXT: v_mul_f64 v[2:3], v[0:1], v[2:3]434; GFX9-GISEL-NEXT: v_floor_f64_e32 v[2:3], v[2:3]435; GFX9-GISEL-NEXT: v_fma_f64 v[0:1], v[2:3], v[4:5], v[0:1]436; GFX9-GISEL-NEXT: v_cvt_u32_f64_e32 v0, v[0:1]437; GFX9-GISEL-NEXT: v_cvt_i32_f64_e32 v1, v[2:3]438; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]439;440; GFX10-SDAG-LABEL: intrinsic_llrint_i64_f64:441; GFX10-SDAG: ; %bb.0: ; %entry442; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)443; GFX10-SDAG-NEXT: v_rndne_f64_e32 v[0:1], v[0:1]444; GFX10-SDAG-NEXT: v_ldexp_f64 v[2:3], v[0:1], 0xffffffe0445; GFX10-SDAG-NEXT: v_floor_f64_e32 v[2:3], v[2:3]446; GFX10-SDAG-NEXT: v_fma_f64 v[0:1], 0xc1f00000, v[2:3], v[0:1]447; GFX10-SDAG-NEXT: v_cvt_u32_f64_e32 v0, v[0:1]448; GFX10-SDAG-NEXT: v_cvt_i32_f64_e32 v1, v[2:3]449; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]450;451; GFX10-GISEL-LABEL: intrinsic_llrint_i64_f64:452; GFX10-GISEL: ; %bb.0: ; %entry453; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)454; GFX10-GISEL-NEXT: v_rndne_f64_e32 v[0:1], v[0:1]455; GFX10-GISEL-NEXT: v_trunc_f64_e32 v[0:1], v[0:1]456; GFX10-GISEL-NEXT: v_mul_f64 v[2:3], 0x3df00000, v[0:1]457; GFX10-GISEL-NEXT: v_floor_f64_e32 v[2:3], v[2:3]458; GFX10-GISEL-NEXT: v_fma_f64 v[0:1], 0xc1f00000, v[2:3], v[0:1]459; GFX10-GISEL-NEXT: v_cvt_u32_f64_e32 v0, v[0:1]460; GFX10-GISEL-NEXT: v_cvt_i32_f64_e32 v1, v[2:3]461; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]462;463; GFX11-SDAG-LABEL: intrinsic_llrint_i64_f64:464; GFX11-SDAG: ; %bb.0: ; %entry465; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)466; GFX11-SDAG-NEXT: v_rndne_f64_e32 v[0:1], v[0:1]467; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)468; GFX11-SDAG-NEXT: v_ldexp_f64 v[2:3], v[0:1], 0xffffffe0469; GFX11-SDAG-NEXT: v_floor_f64_e32 v[2:3], v[2:3]470; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)471; GFX11-SDAG-NEXT: v_fma_f64 v[0:1], 0xc1f00000, v[2:3], v[0:1]472; GFX11-SDAG-NEXT: v_cvt_u32_f64_e32 v0, v[0:1]473; GFX11-SDAG-NEXT: v_cvt_i32_f64_e32 v1, v[2:3]474; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]475;476; GFX11-GISEL-LABEL: intrinsic_llrint_i64_f64:477; GFX11-GISEL: ; %bb.0: ; %entry478; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)479; GFX11-GISEL-NEXT: v_rndne_f64_e32 v[0:1], v[0:1]480; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)481; GFX11-GISEL-NEXT: v_trunc_f64_e32 v[0:1], v[0:1]482; GFX11-GISEL-NEXT: v_mul_f64 v[2:3], 0x3df00000, v[0:1]483; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)484; GFX11-GISEL-NEXT: v_floor_f64_e32 v[2:3], v[2:3]485; GFX11-GISEL-NEXT: v_fma_f64 v[0:1], 0xc1f00000, v[2:3], v[0:1]486; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)487; GFX11-GISEL-NEXT: v_cvt_u32_f64_e32 v0, v[0:1]488; GFX11-GISEL-NEXT: v_cvt_i32_f64_e32 v1, v[2:3]489; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]490entry:491 %res = tail call i64 @llvm.llrint.i64.f64(double %arg)492 ret i64 %res493}494 495define half @intrinsic_frint_half(half %arg) {496; GFX9-LABEL: intrinsic_frint_half:497; GFX9: ; %bb.0: ; %entry498; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)499; GFX9-NEXT: v_rndne_f16_e32 v0, v0500; GFX9-NEXT: s_setpc_b64 s[30:31]501;502; GFX10-LABEL: intrinsic_frint_half:503; GFX10: ; %bb.0: ; %entry504; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)505; GFX10-NEXT: v_rndne_f16_e32 v0, v0506; GFX10-NEXT: s_setpc_b64 s[30:31]507;508; GFX11-SDAG-TRUE16-LABEL: intrinsic_frint_half:509; GFX11-SDAG-TRUE16: ; %bb.0: ; %entry510; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)511; GFX11-SDAG-TRUE16-NEXT: v_rndne_f16_e32 v0.l, v0.l512; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]513;514; GFX11-SDAG-FAKE16-LABEL: intrinsic_frint_half:515; GFX11-SDAG-FAKE16: ; %bb.0: ; %entry516; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)517; GFX11-SDAG-FAKE16-NEXT: v_rndne_f16_e32 v0, v0518; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]519;520; GFX11-GISEL-TRUE16-LABEL: intrinsic_frint_half:521; GFX11-GISEL-TRUE16: ; %bb.0: ; %entry522; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)523; GFX11-GISEL-TRUE16-NEXT: v_rndne_f16_e32 v0.l, v0.l524; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]525;526; GFX11-GISEL-FAKE16-LABEL: intrinsic_frint_half:527; GFX11-GISEL-FAKE16: ; %bb.0: ; %entry528; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)529; GFX11-GISEL-FAKE16-NEXT: v_rndne_f16_e32 v0, v0530; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]531entry:532 %res = tail call half @llvm.rint.f16(half %arg)533 ret half %res534}535 536define i32 @intrinsic_lrint_i32_f16(half %arg) {537; GFX9-LABEL: intrinsic_lrint_i32_f16:538; GFX9: ; %bb.0: ; %entry539; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)540; GFX9-NEXT: v_rndne_f16_e32 v0, v0541; GFX9-NEXT: v_cvt_f32_f16_e32 v0, v0542; GFX9-NEXT: v_cvt_i32_f32_e32 v0, v0543; GFX9-NEXT: s_setpc_b64 s[30:31]544;545; GFX10-LABEL: intrinsic_lrint_i32_f16:546; GFX10: ; %bb.0: ; %entry547; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)548; GFX10-NEXT: v_rndne_f16_e32 v0, v0549; GFX10-NEXT: v_cvt_f32_f16_e32 v0, v0550; GFX10-NEXT: v_cvt_i32_f32_e32 v0, v0551; GFX10-NEXT: s_setpc_b64 s[30:31]552;553; GFX11-SDAG-TRUE16-LABEL: intrinsic_lrint_i32_f16:554; GFX11-SDAG-TRUE16: ; %bb.0: ; %entry555; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)556; GFX11-SDAG-TRUE16-NEXT: v_rndne_f16_e32 v0.l, v0.l557; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)558; GFX11-SDAG-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.l559; GFX11-SDAG-TRUE16-NEXT: v_cvt_i32_f32_e32 v0, v0560; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]561;562; GFX11-SDAG-FAKE16-LABEL: intrinsic_lrint_i32_f16:563; GFX11-SDAG-FAKE16: ; %bb.0: ; %entry564; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)565; GFX11-SDAG-FAKE16-NEXT: v_rndne_f16_e32 v0, v0566; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)567; GFX11-SDAG-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, v0568; GFX11-SDAG-FAKE16-NEXT: v_cvt_i32_f32_e32 v0, v0569; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]570;571; GFX11-GISEL-TRUE16-LABEL: intrinsic_lrint_i32_f16:572; GFX11-GISEL-TRUE16: ; %bb.0: ; %entry573; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)574; GFX11-GISEL-TRUE16-NEXT: v_rndne_f16_e32 v0.l, v0.l575; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)576; GFX11-GISEL-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.l577; GFX11-GISEL-TRUE16-NEXT: v_cvt_i32_f32_e32 v0, v0578; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]579;580; GFX11-GISEL-FAKE16-LABEL: intrinsic_lrint_i32_f16:581; GFX11-GISEL-FAKE16: ; %bb.0: ; %entry582; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)583; GFX11-GISEL-FAKE16-NEXT: v_rndne_f16_e32 v0, v0584; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)585; GFX11-GISEL-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, v0586; GFX11-GISEL-FAKE16-NEXT: v_cvt_i32_f32_e32 v0, v0587; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]588entry:589 %res = tail call i32 @llvm.lrint.i32.f16(half %arg)590 ret i32 %res591}592 593define <2 x float> @intrinsic_frint_v2f32_v2f32(<2 x float> %arg) {594; GCN-LABEL: intrinsic_frint_v2f32_v2f32:595; GCN: ; %bb.0: ; %entry596; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)597; GCN-NEXT: v_rndne_f32_e32 v0, v0598; GCN-NEXT: v_rndne_f32_e32 v1, v1599; GCN-NEXT: s_setpc_b64 s[30:31]600entry:601 %res = tail call <2 x float> @llvm.rint.v2f32.v2f32(<2 x float> %arg)602 ret <2 x float> %res603}604 605define <2 x i32> @intrinsic_lrint_v2i32_v2f32(<2 x float> %arg) {606; GFX9-LABEL: intrinsic_lrint_v2i32_v2f32:607; GFX9: ; %bb.0: ; %entry608; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)609; GFX9-NEXT: v_rndne_f32_e32 v0, v0610; GFX9-NEXT: v_rndne_f32_e32 v1, v1611; GFX9-NEXT: v_cvt_i32_f32_e32 v0, v0612; GFX9-NEXT: v_cvt_i32_f32_e32 v1, v1613; GFX9-NEXT: s_setpc_b64 s[30:31]614;615; GFX10-LABEL: intrinsic_lrint_v2i32_v2f32:616; GFX10: ; %bb.0: ; %entry617; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)618; GFX10-NEXT: v_rndne_f32_e32 v0, v0619; GFX10-NEXT: v_rndne_f32_e32 v1, v1620; GFX10-NEXT: v_cvt_i32_f32_e32 v0, v0621; GFX10-NEXT: v_cvt_i32_f32_e32 v1, v1622; GFX10-NEXT: s_setpc_b64 s[30:31]623;624; GFX11-LABEL: intrinsic_lrint_v2i32_v2f32:625; GFX11: ; %bb.0: ; %entry626; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)627; GFX11-NEXT: v_rndne_f32_e32 v0, v0628; GFX11-NEXT: v_rndne_f32_e32 v1, v1629; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)630; GFX11-NEXT: v_cvt_i32_f32_e32 v0, v0631; GFX11-NEXT: v_cvt_i32_f32_e32 v1, v1632; GFX11-NEXT: s_setpc_b64 s[30:31]633entry:634 %res = tail call <2 x i32> @llvm.lrint.v2i32.v2f32(<2 x float> %arg)635 ret <2 x i32> %res636}637 638define <2 x i64> @intrinsic_lrint_v2i64_v2f32(<2 x float> %arg) {639; GFX9-SDAG-LABEL: intrinsic_lrint_v2i64_v2f32:640; GFX9-SDAG: ; %bb.0: ; %entry641; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)642; GFX9-SDAG-NEXT: v_rndne_f32_e32 v0, v0643; GFX9-SDAG-NEXT: s_mov_b32 s4, 0x2f800000644; GFX9-SDAG-NEXT: v_mul_f32_e64 v2, |v0|, s4645; GFX9-SDAG-NEXT: v_floor_f32_e32 v2, v2646; GFX9-SDAG-NEXT: s_mov_b32 s5, 0xcf800000647; GFX9-SDAG-NEXT: v_cvt_u32_f32_e32 v3, v2648; GFX9-SDAG-NEXT: v_fma_f32 v2, v2, s5, |v0|649; GFX9-SDAG-NEXT: v_cvt_u32_f32_e32 v2, v2650; GFX9-SDAG-NEXT: v_ashrrev_i32_e32 v4, 31, v0651; GFX9-SDAG-NEXT: v_xor_b32_e32 v3, v3, v4652; GFX9-SDAG-NEXT: v_xor_b32_e32 v0, v2, v4653; GFX9-SDAG-NEXT: v_rndne_f32_e32 v2, v1654; GFX9-SDAG-NEXT: v_mul_f32_e64 v1, |v2|, s4655; GFX9-SDAG-NEXT: v_floor_f32_e32 v1, v1656; GFX9-SDAG-NEXT: v_cvt_u32_f32_e32 v5, v1657; GFX9-SDAG-NEXT: v_fma_f32 v1, v1, s5, |v2|658; GFX9-SDAG-NEXT: v_cvt_u32_f32_e32 v6, v1659; GFX9-SDAG-NEXT: v_sub_co_u32_e32 v0, vcc, v0, v4660; GFX9-SDAG-NEXT: v_subb_co_u32_e32 v1, vcc, v3, v4, vcc661; GFX9-SDAG-NEXT: v_ashrrev_i32_e32 v3, 31, v2662; GFX9-SDAG-NEXT: v_xor_b32_e32 v2, v6, v3663; GFX9-SDAG-NEXT: v_xor_b32_e32 v4, v5, v3664; GFX9-SDAG-NEXT: v_sub_co_u32_e32 v2, vcc, v2, v3665; GFX9-SDAG-NEXT: v_subb_co_u32_e32 v3, vcc, v4, v3, vcc666; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]667;668; GFX9-GISEL-LABEL: intrinsic_lrint_v2i64_v2f32:669; GFX9-GISEL: ; %bb.0: ; %entry670; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)671; GFX9-GISEL-NEXT: v_rndne_f32_e32 v0, v0672; GFX9-GISEL-NEXT: v_trunc_f32_e32 v2, v0673; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x2f800000674; GFX9-GISEL-NEXT: v_mul_f32_e64 v4, |v2|, v3675; GFX9-GISEL-NEXT: v_floor_f32_e32 v4, v4676; GFX9-GISEL-NEXT: v_mov_b32_e32 v5, 0xcf800000677; GFX9-GISEL-NEXT: v_fma_f32 v2, v4, v5, |v2|678; GFX9-GISEL-NEXT: v_cvt_u32_f32_e32 v2, v2679; GFX9-GISEL-NEXT: v_cvt_u32_f32_e32 v4, v4680; GFX9-GISEL-NEXT: v_ashrrev_i32_e32 v6, 31, v0681; GFX9-GISEL-NEXT: v_xor_b32_e32 v0, v2, v6682; GFX9-GISEL-NEXT: v_xor_b32_e32 v2, v4, v6683; GFX9-GISEL-NEXT: v_rndne_f32_e32 v4, v1684; GFX9-GISEL-NEXT: v_trunc_f32_e32 v1, v4685; GFX9-GISEL-NEXT: v_mul_f32_e64 v3, |v1|, v3686; GFX9-GISEL-NEXT: v_floor_f32_e32 v3, v3687; GFX9-GISEL-NEXT: v_fma_f32 v1, v3, v5, |v1|688; GFX9-GISEL-NEXT: v_cvt_u32_f32_e32 v5, v1689; GFX9-GISEL-NEXT: v_cvt_u32_f32_e32 v3, v3690; GFX9-GISEL-NEXT: v_sub_co_u32_e32 v0, vcc, v0, v6691; GFX9-GISEL-NEXT: v_ashrrev_i32_e32 v4, 31, v4692; GFX9-GISEL-NEXT: v_subb_co_u32_e32 v1, vcc, v2, v6, vcc693; GFX9-GISEL-NEXT: v_xor_b32_e32 v2, v5, v4694; GFX9-GISEL-NEXT: v_xor_b32_e32 v3, v3, v4695; GFX9-GISEL-NEXT: v_sub_co_u32_e32 v2, vcc, v2, v4696; GFX9-GISEL-NEXT: v_subb_co_u32_e32 v3, vcc, v3, v4, vcc697; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]698;699; GFX10-SDAG-LABEL: intrinsic_lrint_v2i64_v2f32:700; GFX10-SDAG: ; %bb.0: ; %entry701; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)702; GFX10-SDAG-NEXT: v_rndne_f32_e32 v0, v0703; GFX10-SDAG-NEXT: v_rndne_f32_e32 v1, v1704; GFX10-SDAG-NEXT: v_mul_f32_e64 v2, 0x2f800000, |v0|705; GFX10-SDAG-NEXT: v_mul_f32_e64 v3, 0x2f800000, |v1|706; GFX10-SDAG-NEXT: v_ashrrev_i32_e32 v5, 31, v0707; GFX10-SDAG-NEXT: v_ashrrev_i32_e32 v6, 31, v1708; GFX10-SDAG-NEXT: v_floor_f32_e32 v2, v2709; GFX10-SDAG-NEXT: v_floor_f32_e32 v3, v3710; GFX10-SDAG-NEXT: v_fma_f32 v4, 0xcf800000, v2, |v0|711; GFX10-SDAG-NEXT: v_fma_f32 v0, 0xcf800000, v3, |v1|712; GFX10-SDAG-NEXT: v_cvt_u32_f32_e32 v2, v2713; GFX10-SDAG-NEXT: v_cvt_u32_f32_e32 v3, v3714; GFX10-SDAG-NEXT: v_cvt_u32_f32_e32 v1, v4715; GFX10-SDAG-NEXT: v_cvt_u32_f32_e32 v0, v0716; GFX10-SDAG-NEXT: v_xor_b32_e32 v2, v2, v5717; GFX10-SDAG-NEXT: v_xor_b32_e32 v3, v3, v6718; GFX10-SDAG-NEXT: v_xor_b32_e32 v1, v1, v5719; GFX10-SDAG-NEXT: v_xor_b32_e32 v4, v0, v6720; GFX10-SDAG-NEXT: v_sub_co_u32 v0, vcc_lo, v1, v5721; GFX10-SDAG-NEXT: v_sub_co_ci_u32_e32 v1, vcc_lo, v2, v5, vcc_lo722; GFX10-SDAG-NEXT: v_sub_co_u32 v2, vcc_lo, v4, v6723; GFX10-SDAG-NEXT: v_sub_co_ci_u32_e32 v3, vcc_lo, v3, v6, vcc_lo724; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]725;726; GFX10-GISEL-LABEL: intrinsic_lrint_v2i64_v2f32:727; GFX10-GISEL: ; %bb.0: ; %entry728; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)729; GFX10-GISEL-NEXT: v_rndne_f32_e32 v0, v0730; GFX10-GISEL-NEXT: v_rndne_f32_e32 v1, v1731; GFX10-GISEL-NEXT: v_trunc_f32_e32 v2, v0732; GFX10-GISEL-NEXT: v_trunc_f32_e32 v3, v1733; GFX10-GISEL-NEXT: v_ashrrev_i32_e32 v6, 31, v0734; GFX10-GISEL-NEXT: v_mul_f32_e64 v4, 0x2f800000, |v2|735; GFX10-GISEL-NEXT: v_mul_f32_e64 v5, 0x2f800000, |v3|736; GFX10-GISEL-NEXT: v_floor_f32_e32 v4, v4737; GFX10-GISEL-NEXT: v_floor_f32_e32 v5, v5738; GFX10-GISEL-NEXT: v_fma_f32 v2, 0xcf800000, v4, |v2|739; GFX10-GISEL-NEXT: v_fma_f32 v0, 0xcf800000, v5, |v3|740; GFX10-GISEL-NEXT: v_ashrrev_i32_e32 v3, 31, v1741; GFX10-GISEL-NEXT: v_cvt_u32_f32_e32 v1, v2742; GFX10-GISEL-NEXT: v_cvt_u32_f32_e32 v2, v4743; GFX10-GISEL-NEXT: v_cvt_u32_f32_e32 v0, v0744; GFX10-GISEL-NEXT: v_cvt_u32_f32_e32 v4, v5745; GFX10-GISEL-NEXT: v_xor_b32_e32 v1, v1, v6746; GFX10-GISEL-NEXT: v_xor_b32_e32 v2, v2, v6747; GFX10-GISEL-NEXT: v_xor_b32_e32 v5, v0, v3748; GFX10-GISEL-NEXT: v_xor_b32_e32 v4, v4, v3749; GFX10-GISEL-NEXT: v_sub_co_u32 v0, vcc_lo, v1, v6750; GFX10-GISEL-NEXT: v_sub_co_ci_u32_e32 v1, vcc_lo, v2, v6, vcc_lo751; GFX10-GISEL-NEXT: v_sub_co_u32 v2, vcc_lo, v5, v3752; GFX10-GISEL-NEXT: v_sub_co_ci_u32_e32 v3, vcc_lo, v4, v3, vcc_lo753; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]754;755; GFX11-SDAG-LABEL: intrinsic_lrint_v2i64_v2f32:756; GFX11-SDAG: ; %bb.0: ; %entry757; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)758; GFX11-SDAG-NEXT: v_rndne_f32_e32 v0, v0759; GFX11-SDAG-NEXT: v_rndne_f32_e32 v1, v1760; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)761; GFX11-SDAG-NEXT: v_mul_f32_e64 v2, 0x2f800000, |v0|762; GFX11-SDAG-NEXT: v_mul_f32_e64 v3, 0x2f800000, |v1|763; GFX11-SDAG-NEXT: v_ashrrev_i32_e32 v5, 31, v0764; GFX11-SDAG-NEXT: v_ashrrev_i32_e32 v6, 31, v1765; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)766; GFX11-SDAG-NEXT: v_floor_f32_e32 v2, v2767; GFX11-SDAG-NEXT: v_floor_f32_e32 v3, v3768; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)769; GFX11-SDAG-NEXT: v_fma_f32 v4, 0xcf800000, v2, |v0|770; GFX11-SDAG-NEXT: v_fma_f32 v0, 0xcf800000, v3, |v1|771; GFX11-SDAG-NEXT: v_cvt_u32_f32_e32 v2, v2772; GFX11-SDAG-NEXT: v_cvt_u32_f32_e32 v3, v3773; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)774; GFX11-SDAG-NEXT: v_cvt_u32_f32_e32 v1, v4775; GFX11-SDAG-NEXT: v_cvt_u32_f32_e32 v0, v0776; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)777; GFX11-SDAG-NEXT: v_xor_b32_e32 v2, v2, v5778; GFX11-SDAG-NEXT: v_xor_b32_e32 v3, v3, v6779; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)780; GFX11-SDAG-NEXT: v_xor_b32_e32 v1, v1, v5781; GFX11-SDAG-NEXT: v_xor_b32_e32 v4, v0, v6782; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)783; GFX11-SDAG-NEXT: v_sub_co_u32 v0, vcc_lo, v1, v5784; GFX11-SDAG-NEXT: v_sub_co_ci_u32_e64 v1, null, v2, v5, vcc_lo785; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)786; GFX11-SDAG-NEXT: v_sub_co_u32 v2, vcc_lo, v4, v6787; GFX11-SDAG-NEXT: v_sub_co_ci_u32_e64 v3, null, v3, v6, vcc_lo788; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]789;790; GFX11-GISEL-LABEL: intrinsic_lrint_v2i64_v2f32:791; GFX11-GISEL: ; %bb.0: ; %entry792; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)793; GFX11-GISEL-NEXT: v_rndne_f32_e32 v0, v0794; GFX11-GISEL-NEXT: v_rndne_f32_e32 v1, v1795; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)796; GFX11-GISEL-NEXT: v_trunc_f32_e32 v2, v0797; GFX11-GISEL-NEXT: v_trunc_f32_e32 v3, v1798; GFX11-GISEL-NEXT: v_ashrrev_i32_e32 v6, 31, v0799; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)800; GFX11-GISEL-NEXT: v_mul_f32_e64 v4, 0x2f800000, |v2|801; GFX11-GISEL-NEXT: v_mul_f32_e64 v5, 0x2f800000, |v3|802; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)803; GFX11-GISEL-NEXT: v_floor_f32_e32 v4, v4804; GFX11-GISEL-NEXT: v_floor_f32_e32 v5, v5805; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)806; GFX11-GISEL-NEXT: v_fma_f32 v2, 0xcf800000, v4, |v2|807; GFX11-GISEL-NEXT: v_fma_f32 v0, 0xcf800000, v5, |v3|808; GFX11-GISEL-NEXT: v_ashrrev_i32_e32 v3, 31, v1809; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)810; GFX11-GISEL-NEXT: v_cvt_u32_f32_e32 v1, v2811; GFX11-GISEL-NEXT: v_cvt_u32_f32_e32 v2, v4812; GFX11-GISEL-NEXT: v_cvt_u32_f32_e32 v0, v0813; GFX11-GISEL-NEXT: v_cvt_u32_f32_e32 v4, v5814; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)815; GFX11-GISEL-NEXT: v_xor_b32_e32 v1, v1, v6816; GFX11-GISEL-NEXT: v_xor_b32_e32 v2, v2, v6817; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)818; GFX11-GISEL-NEXT: v_xor_b32_e32 v5, v0, v3819; GFX11-GISEL-NEXT: v_xor_b32_e32 v4, v4, v3820; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)821; GFX11-GISEL-NEXT: v_sub_co_u32 v0, vcc_lo, v1, v6822; GFX11-GISEL-NEXT: v_sub_co_ci_u32_e64 v1, null, v2, v6, vcc_lo823; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)824; GFX11-GISEL-NEXT: v_sub_co_u32 v2, vcc_lo, v5, v3825; GFX11-GISEL-NEXT: v_sub_co_ci_u32_e64 v3, null, v4, v3, vcc_lo826; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]827entry:828 %res = tail call <2 x i64> @llvm.lrint.v2i64.v2f32(<2 x float> %arg)829 ret <2 x i64> %res830}831 832