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1; RUN: opt -S -passes=amdgpu-late-codegenprepare \2; RUN: -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a %s | FileCheck %s3 4; Goal: With a loop-header PHI in illegal vector type and a same-BB5; non-lookthrough user (vector add) in the header, LRO should still coerce6; the PHI to i32 because a profitable sink (store) exists across BB.7 8define amdgpu_kernel void @phi_samebb_nonlookthrough_store(9 ptr addrspace(1) %out, <4 x i8> %v, i1 %exit) {10; CHECK-LABEL: @phi_samebb_nonlookthrough_store(11entry:12 br label %loop13 14loop: ; preds = %entry, %loop15 ; Loop-carried PHI in illegal vector type.16 %acc = phi <4 x i8> [ zeroinitializer, %entry ], [ %acc.next, %loop ]17 18 ; Same-BB non-lookthrough use in header.19 %acc.next = add <4 x i8> %acc, %v20 21 ; Make it a real loop: either iterate or exit to the sink block.22 br i1 %exit, label %store, label %loop23 24store: ; preds = %loop25 ; The across-BB sink: storing the PHI coerced to i32.26 %acc.bc = bitcast <4 x i8> %acc to i3227 store i32 %acc.bc, ptr addrspace(1) %out, align 428 ret void29}30 31; After AMDGPULateCodeGenPrepare we expect:32; - PHI is coerced to i3233; - A header bitcast materializes for the add34; This proves the same-BB non-lookthrough user (add) did not get pruned35; when the def is a PHI.36 37; CHECK: loop:38; CHECK: %[[ACC_TC:[^ ]+]] = phi i3239; CHECK: %[[ACC_TC_BC:[^ ]+]] = bitcast i32 %[[ACC_TC]] to <4 x i8>40; CHECK: %[[ACC_NEXT:[^ ]+]] = add <4 x i8> %[[ACC_TC_BC]], %v41; CHECK: br i1 %exit, label %store, label %loop42; CHECK: store:43; CHECK: %[[ACC_TC_BC2:[^ ]+]] = bitcast i32 %[[ACC_TC]] to <4 x i8>44; CHECK: %[[ST_I32:[^ ]+]] = bitcast <4 x i8> %[[ACC_TC_BC2]] to i3245; CHECK: store i32 %[[ST_I32]],46 47