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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 32# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1031 -run-pass=machine-sink -o - %s | FileCheck %s3 4# A VGPR loop variable was incorrectly sunk into a flow block, past5# the si_end_cf reconvergence point.6 7---8name: machinesink_loop_vgpr_out_of_divergent_loop9tracksRegLiveness: true10machineFunctionInfo:11 scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'12 frameOffsetReg: '$sgpr33'13 stackPtrOffsetReg: '$sgpr32'14body: |15 ; CHECK-LABEL: name: machinesink_loop_vgpr_out_of_divergent_loop16 ; CHECK: bb.0:17 ; CHECK-NEXT: successors: %bb.1(0x80000000)18 ; CHECK-NEXT: liveins: $vgpr0, $vgpr1, $sgpr819 ; CHECK-NEXT: {{ $}}20 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr021 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr822 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr123 ; CHECK-NEXT: {{ $}}24 ; CHECK-NEXT: bb.1:25 ; CHECK-NEXT: successors: %bb.6(0x40000000), %bb.2(0x40000000)26 ; CHECK-NEXT: {{ $}}27 ; CHECK-NEXT: [[SI_IF:%[0-9]+]]:sreg_32 = SI_IF [[COPY1]], %bb.6, implicit-def dead $exec, implicit-def dead $scc, implicit $exec28 ; CHECK-NEXT: S_BRANCH %bb.229 ; CHECK-NEXT: {{ $}}30 ; CHECK-NEXT: bb.2:31 ; CHECK-NEXT: successors: %bb.4(0x40000000), %bb.3(0x40000000)32 ; CHECK-NEXT: {{ $}}33 ; CHECK-NEXT: [[SI_IF1:%[0-9]+]]:sreg_32 = SI_IF [[COPY1]], %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec34 ; CHECK-NEXT: S_BRANCH %bb.335 ; CHECK-NEXT: {{ $}}36 ; CHECK-NEXT: bb.3:37 ; CHECK-NEXT: successors: %bb.4(0x80000000)38 ; CHECK-NEXT: {{ $}}39 ; CHECK-NEXT: S_NOP 040 ; CHECK-NEXT: {{ $}}41 ; CHECK-NEXT: bb.4:42 ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.5(0x40000000)43 ; CHECK-NEXT: {{ $}}44 ; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */45 ; CHECK-NEXT: [[SI_IF_BREAK:%[0-9]+]]:sreg_32 = SI_IF_BREAK killed [[SI_IF1]], [[SI_IF]], implicit-def dead $scc46 ; CHECK-NEXT: SI_LOOP [[SI_IF_BREAK]], %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec47 ; CHECK-NEXT: S_BRANCH %bb.548 ; CHECK-NEXT: {{ $}}49 ; CHECK-NEXT: bb.5:50 ; CHECK-NEXT: successors: %bb.2(0x80000000)51 ; CHECK-NEXT: {{ $}}52 ; CHECK-NEXT: [[PHI:%[0-9]+]]:vgpr_32 = PHI [[COPY]], %bb.453 ; CHECK-NEXT: SI_END_CF [[SI_IF_BREAK]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec54 ; CHECK-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec55 ; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_U32_e64_]]56 ; CHECK-NEXT: S_BRANCH %bb.257 ; CHECK-NEXT: {{ $}}58 ; CHECK-NEXT: bb.6:59 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.7(0x40000000)60 ; CHECK-NEXT: {{ $}}61 ; CHECK-NEXT: SI_LOOP [[SI_IF]], %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec62 ; CHECK-NEXT: S_BRANCH %bb.763 ; CHECK-NEXT: {{ $}}64 ; CHECK-NEXT: bb.7:65 ; CHECK-NEXT: successors: %bb.7(0x40000000), %bb.8(0x40000000)66 ; CHECK-NEXT: {{ $}}67 ; CHECK-NEXT: S_CBRANCH_VCCNZ %bb.7, implicit undef $vcc68 ; CHECK-NEXT: S_BRANCH %bb.869 ; CHECK-NEXT: {{ $}}70 ; CHECK-NEXT: bb.8:71 ; CHECK-NEXT: SI_RETURN72 bb.0:73 liveins: $vgpr0, $vgpr1, $sgpr874 75 %0:vgpr_32 = COPY $vgpr076 %1:sreg_32 = COPY $sgpr877 %2:vgpr_32 = COPY $vgpr178 79 bb.1:80 %3:sreg_32 = SI_IF %1, %bb.6, implicit-def dead $exec, implicit-def dead $scc, implicit $exec81 S_BRANCH %bb.282 83 bb.2:84 %4:sreg_32 = SI_IF %1, %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec85 S_BRANCH %bb.386 87 bb.3:88 S_NOP 089 90 bb.4:91 INLINEASM &"", 1 /* sideeffect attdialect */92 %5:vgpr_32 = V_ADD_U32_e64 %0, %1, 0, implicit $exec93 %6:sreg_32 = SI_IF_BREAK killed %4, %3, implicit-def dead $scc94 SI_LOOP %6, %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec95 S_BRANCH %bb.596 97 bb.5:98 %7:vgpr_32 = PHI %0, %bb.499 SI_END_CF %6, implicit-def dead $exec, implicit-def dead $scc, implicit $exec100 INLINEASM &"", 1, implicit %5101 S_BRANCH %bb.2102 103 bb.6:104 SI_LOOP %3, %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec105 S_BRANCH %bb.7106 107 bb.7:108 S_CBRANCH_VCCNZ %bb.7, implicit undef $vcc109 S_BRANCH %bb.8110 111 bb.8:112 SI_RETURN113 114...115 116# The same testcase, except the relevant instruction is scalar and117# could be legally sunk.118---119name: machinesink_loop_sgpr_out_of_divergent_loop120tracksRegLiveness: true121machineFunctionInfo:122 scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'123 frameOffsetReg: '$sgpr33'124 stackPtrOffsetReg: '$sgpr32'125body: |126 ; CHECK-LABEL: name: machinesink_loop_sgpr_out_of_divergent_loop127 ; CHECK: bb.0:128 ; CHECK-NEXT: successors: %bb.1(0x80000000)129 ; CHECK-NEXT: liveins: $sgpr8, $sgpr9, $sgpr10130 ; CHECK-NEXT: {{ $}}131 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr8132 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr9133 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr10134 ; CHECK-NEXT: {{ $}}135 ; CHECK-NEXT: bb.1:136 ; CHECK-NEXT: successors: %bb.6(0x40000000), %bb.2(0x40000000)137 ; CHECK-NEXT: {{ $}}138 ; CHECK-NEXT: [[SI_IF:%[0-9]+]]:sreg_32 = SI_IF [[COPY1]], %bb.6, implicit-def dead $exec, implicit-def dead $scc, implicit $exec139 ; CHECK-NEXT: S_BRANCH %bb.2140 ; CHECK-NEXT: {{ $}}141 ; CHECK-NEXT: bb.2:142 ; CHECK-NEXT: successors: %bb.4(0x40000000), %bb.3(0x40000000)143 ; CHECK-NEXT: {{ $}}144 ; CHECK-NEXT: [[SI_IF1:%[0-9]+]]:sreg_32 = SI_IF [[COPY1]], %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec145 ; CHECK-NEXT: S_BRANCH %bb.3146 ; CHECK-NEXT: {{ $}}147 ; CHECK-NEXT: bb.3:148 ; CHECK-NEXT: successors: %bb.4(0x80000000)149 ; CHECK-NEXT: {{ $}}150 ; CHECK-NEXT: S_NOP 0151 ; CHECK-NEXT: {{ $}}152 ; CHECK-NEXT: bb.4:153 ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.5(0x40000000)154 ; CHECK-NEXT: {{ $}}155 ; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */156 ; CHECK-NEXT: [[SI_IF_BREAK:%[0-9]+]]:sreg_32 = SI_IF_BREAK killed [[SI_IF1]], [[SI_IF]], implicit-def dead $scc157 ; CHECK-NEXT: SI_LOOP [[SI_IF_BREAK]], %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec158 ; CHECK-NEXT: S_BRANCH %bb.5159 ; CHECK-NEXT: {{ $}}160 ; CHECK-NEXT: bb.5:161 ; CHECK-NEXT: successors: %bb.2(0x80000000)162 ; CHECK-NEXT: {{ $}}163 ; CHECK-NEXT: [[PHI:%[0-9]+]]:vgpr_32 = PHI [[COPY]], %bb.4164 ; CHECK-NEXT: SI_END_CF [[SI_IF_BREAK]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec165 ; CHECK-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY]], [[COPY1]], implicit-def dead $scc166 ; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[S_ADD_I32_]]167 ; CHECK-NEXT: S_BRANCH %bb.2168 ; CHECK-NEXT: {{ $}}169 ; CHECK-NEXT: bb.6:170 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.7(0x40000000)171 ; CHECK-NEXT: {{ $}}172 ; CHECK-NEXT: SI_LOOP [[SI_IF]], %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec173 ; CHECK-NEXT: S_BRANCH %bb.7174 ; CHECK-NEXT: {{ $}}175 ; CHECK-NEXT: bb.7:176 ; CHECK-NEXT: successors: %bb.7(0x40000000), %bb.8(0x40000000)177 ; CHECK-NEXT: {{ $}}178 ; CHECK-NEXT: S_CBRANCH_VCCNZ %bb.7, implicit undef $vcc179 ; CHECK-NEXT: S_BRANCH %bb.8180 ; CHECK-NEXT: {{ $}}181 ; CHECK-NEXT: bb.8:182 ; CHECK-NEXT: SI_RETURN183 bb.0:184 liveins: $sgpr8, $sgpr9, $sgpr10185 186 %0:sreg_32 = COPY $sgpr8187 %1:sreg_32 = COPY $sgpr9188 %2:sreg_32 = COPY $sgpr10189 190 bb.1:191 %3:sreg_32 = SI_IF %1, %bb.6, implicit-def dead $exec, implicit-def dead $scc, implicit $exec192 S_BRANCH %bb.2193 194 bb.2:195 %4:sreg_32 = SI_IF %1, %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec196 S_BRANCH %bb.3197 198 bb.3:199 S_NOP 0200 201 bb.4:202 INLINEASM &"", 1 /* sideeffect attdialect */203 %5:sreg_32 = S_ADD_I32 %0, %1, implicit-def dead $scc204 %6:sreg_32 = SI_IF_BREAK killed %4, %3, implicit-def dead $scc205 SI_LOOP %6, %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec206 S_BRANCH %bb.5207 208 bb.5:209 %7:vgpr_32 = PHI %0, %bb.4210 SI_END_CF %6, implicit-def dead $exec, implicit-def dead $scc, implicit $exec211 INLINEASM &"", 1, implicit %5212 S_BRANCH %bb.2213 214 bb.6:215 SI_LOOP %3, %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec216 S_BRANCH %bb.7217 218 bb.7:219 S_CBRANCH_VCCNZ %bb.7, implicit undef $vcc220 S_BRANCH %bb.8221 222 bb.8:223 SI_RETURN224 225...226