131 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 32# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1031 -run-pass=machine-sink -o - %s | FileCheck %s3 4# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1031 -passes="function(machine-function(machine-sink))" -o - %s | FileCheck %s5 6---7name: machine-sink-temporal-divergence8tracksRegLiveness: true9body: |10 ; CHECK-LABEL: name: machine-sink-temporal-divergence11 ; CHECK: bb.0:12 ; CHECK-NEXT: successors: %bb.1(0x80000000)13 ; CHECK-NEXT: liveins: $vgpr0, $vgpr1_vgpr214 ; CHECK-NEXT: {{ $}}15 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr016 ; CHECK-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 -117 ; CHECK-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 018 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr1_vgpr219 ; CHECK-NEXT: [[S_MOV_B32_2:%[0-9]+]]:sreg_32 = S_MOV_B32 120 ; CHECK-NEXT: {{ $}}21 ; CHECK-NEXT: bb.1:22 ; CHECK-NEXT: successors: %bb.2(0x04000000), %bb.1(0x7c000000)23 ; CHECK-NEXT: {{ $}}24 ; CHECK-NEXT: [[PHI:%[0-9]+]]:sreg_32 = PHI [[S_MOV_B32_1]], %bb.0, %6, %bb.125 ; CHECK-NEXT: [[PHI1:%[0-9]+]]:sreg_32 = PHI [[S_MOV_B32_]], %bb.0, %8, %bb.126 ; CHECK-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[PHI1]], [[S_MOV_B32_2]], implicit-def dead $scc27 ; CHECK-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[S_ADD_I32_]], [[S_ADD_I32_]], 0, implicit $exec28 ; CHECK-NEXT: [[V_CVT_F32_U32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_F32_U32_e64 [[S_ADD_I32_]], 0, 0, implicit $mode, implicit $exec29 ; CHECK-NEXT: [[V_CMP_GT_F32_e64_:%[0-9]+]]:sreg_32 = nofpexcept V_CMP_GT_F32_e64 0, killed [[V_CVT_F32_U32_e64_]], 0, [[COPY]], 0, implicit $mode, implicit $exec30 ; CHECK-NEXT: [[SI_IF_BREAK:%[0-9]+]]:sreg_32 = SI_IF_BREAK killed [[V_CMP_GT_F32_e64_]], [[PHI]], implicit-def dead $scc31 ; CHECK-NEXT: SI_LOOP [[SI_IF_BREAK]], %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec32 ; CHECK-NEXT: S_BRANCH %bb.233 ; CHECK-NEXT: {{ $}}34 ; CHECK-NEXT: bb.2:35 ; CHECK-NEXT: SI_END_CF [[SI_IF_BREAK]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec36 ; CHECK-NEXT: FLAT_STORE_DWORD [[COPY1]], [[V_ADD_U32_e64_]], 0, 0, implicit $exec, implicit $flat_scr :: (store (s32))37 ; CHECK-NEXT: SI_RETURN38 bb.0:39 successors: %bb.1(0x80000000)40 liveins: $vgpr0, $vgpr1_vgpr241 42 %0:vgpr_32 = COPY $vgpr043 %1:sreg_32 = S_MOV_B32 -144 %2:sreg_32 = S_MOV_B32 045 %3:vreg_64 = COPY $vgpr1_vgpr246 %4:sreg_32 = S_MOV_B32 147 48 bb.1:49 successors: %bb.2(0x04000000), %bb.1(0x7c000000)50 51 %5:sreg_32 = PHI %2, %bb.0, %6, %bb.152 %7:sreg_32 = PHI %1, %bb.0, %8, %bb.153 %8:sreg_32 = S_ADD_I32 %7, %4, implicit-def dead $scc54 %9:vgpr_32 = V_ADD_U32_e64 %8, %8, 0, implicit $exec55 %10:vgpr_32 = V_CVT_F32_U32_e64 %8, 0, 0, implicit $mode, implicit $exec56 %11:sreg_32 = nofpexcept V_CMP_GT_F32_e64 0, killed %10, 0, %0, 0, implicit $mode, implicit $exec57 %6:sreg_32 = SI_IF_BREAK killed %11, %5, implicit-def dead $scc58 SI_LOOP %6, %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec59 S_BRANCH %bb.260 61 bb.2:62 SI_END_CF %6, implicit-def dead $exec, implicit-def dead $scc, implicit $exec63 FLAT_STORE_DWORD %3, %9, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32))64 SI_RETURN65...66 67---68name: machine-sink-temporal-divergence-multiple-instructions69tracksRegLiveness: true70body: |71 ; CHECK-LABEL: name: machine-sink-temporal-divergence-multiple-instructions72 ; CHECK: bb.0:73 ; CHECK-NEXT: successors: %bb.1(0x80000000)74 ; CHECK-NEXT: liveins: $vgpr0, $vgpr1_vgpr275 ; CHECK-NEXT: {{ $}}76 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr077 ; CHECK-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 -178 ; CHECK-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 079 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr1_vgpr280 ; CHECK-NEXT: [[S_MOV_B32_2:%[0-9]+]]:sreg_32 = S_MOV_B32 181 ; CHECK-NEXT: {{ $}}82 ; CHECK-NEXT: bb.1:83 ; CHECK-NEXT: successors: %bb.2(0x04000000), %bb.1(0x7c000000)84 ; CHECK-NEXT: {{ $}}85 ; CHECK-NEXT: [[PHI:%[0-9]+]]:sreg_32 = PHI [[S_MOV_B32_1]], %bb.0, %6, %bb.186 ; CHECK-NEXT: [[PHI1:%[0-9]+]]:sreg_32 = PHI [[S_MOV_B32_]], %bb.0, %8, %bb.187 ; CHECK-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[PHI1]], [[S_MOV_B32_2]], implicit-def dead $scc88 ; CHECK-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 [[S_ADD_I32_]], [[S_MOV_B32_2]], implicit-def dead $scc89 ; CHECK-NEXT: [[S_ADD_I32_2:%[0-9]+]]:sreg_32 = S_ADD_I32 [[S_ADD_I32_1]], [[S_MOV_B32_2]], implicit-def dead $scc90 ; CHECK-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[S_ADD_I32_2]], [[S_ADD_I32_2]], 0, implicit $exec91 ; CHECK-NEXT: [[V_CVT_F32_U32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_F32_U32_e64 [[S_ADD_I32_]], 0, 0, implicit $mode, implicit $exec92 ; CHECK-NEXT: [[V_CMP_GT_F32_e64_:%[0-9]+]]:sreg_32 = nofpexcept V_CMP_GT_F32_e64 0, killed [[V_CVT_F32_U32_e64_]], 0, [[COPY]], 0, implicit $mode, implicit $exec93 ; CHECK-NEXT: [[SI_IF_BREAK:%[0-9]+]]:sreg_32 = SI_IF_BREAK killed [[V_CMP_GT_F32_e64_]], [[PHI]], implicit-def dead $scc94 ; CHECK-NEXT: SI_LOOP [[SI_IF_BREAK]], %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec95 ; CHECK-NEXT: S_BRANCH %bb.296 ; CHECK-NEXT: {{ $}}97 ; CHECK-NEXT: bb.2:98 ; CHECK-NEXT: SI_END_CF [[SI_IF_BREAK]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec99 ; CHECK-NEXT: FLAT_STORE_DWORD [[COPY1]], [[V_ADD_U32_e64_]], 0, 0, implicit $exec, implicit $flat_scr :: (store (s32))100 ; CHECK-NEXT: SI_RETURN101 bb.0:102 successors: %bb.1(0x80000000)103 liveins: $vgpr0, $vgpr1_vgpr2104 105 %0:vgpr_32 = COPY $vgpr0106 %1:sreg_32 = S_MOV_B32 -1107 %2:sreg_32 = S_MOV_B32 0108 %3:vreg_64 = COPY $vgpr1_vgpr2109 %4:sreg_32 = S_MOV_B32 1110 111 bb.1:112 successors: %bb.2(0x04000000), %bb.1(0x7c000000)113 114 %5:sreg_32 = PHI %2, %bb.0, %6, %bb.1115 %7:sreg_32 = PHI %1, %bb.0, %8, %bb.1116 %8:sreg_32 = S_ADD_I32 %7, %4, implicit-def dead $scc117 %9:sreg_32 = S_ADD_I32 %8, %4, implicit-def dead $scc118 %10:sreg_32 = S_ADD_I32 %9, %4, implicit-def dead $scc119 %11:vgpr_32 = V_ADD_U32_e64 %10, %10, 0, implicit $exec120 %12:vgpr_32 = V_CVT_F32_U32_e64 %8, 0, 0, implicit $mode, implicit $exec121 %13:sreg_32 = nofpexcept V_CMP_GT_F32_e64 0, killed %12, 0, %0, 0, implicit $mode, implicit $exec122 %6:sreg_32 = SI_IF_BREAK killed %13, %5, implicit-def dead $scc123 SI_LOOP %6, %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec124 S_BRANCH %bb.2125 126 bb.2:127 SI_END_CF %6, implicit-def dead $exec, implicit-def dead $scc, implicit $exec128 FLAT_STORE_DWORD %3, %11, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32))129 SI_RETURN130...131