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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; Make sure we still form mad even when unsafe math or fp-contract is allowed instead of fma.3; RUN: llc -mtriple=amdgcn -mcpu=tahiti -denormal-fp-math-f32=preserve-sign < %s | FileCheck -enable-var-scope -check-prefixes=SI,SI-STD %s4; Make sure we don't form mad with denormals5; RUN: llc -mtriple=amdgcn -mcpu=tahiti -denormal-fp-math-f32=ieee < %s | FileCheck -enable-var-scope -check-prefixes=SI,SI-DENORM,SI-DENORM-FASTFMAF %s6; RUN: llc -mtriple=amdgcn -mcpu=verde -denormal-fp-math-f32=ieee < %s | FileCheck -enable-var-scope -check-prefixes=SI,SI-DENORM,SI-DENORM-SLOWFMAF %s7 8declare i32 @llvm.amdgcn.workitem.id.x() #09declare float @llvm.fabs.f32(float) #010declare float @llvm.fma.f32(float, float, float) #011declare float @llvm.fmuladd.f32(float, float, float) #012 13; (fadd (fmul x, y), z) -> (fma x, y, z)14define amdgpu_kernel void @combine_to_mad_f32_0(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) #1 {15; SI-STD-LABEL: combine_to_mad_f32_0:16; SI-STD: ; %bb.0:17; SI-STD-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x918; SI-STD-NEXT: s_mov_b32 s7, 0xf00019; SI-STD-NEXT: s_mov_b32 s6, 020; SI-STD-NEXT: v_lshlrev_b32_e32 v0, 2, v021; SI-STD-NEXT: v_mov_b32_e32 v1, 022; SI-STD-NEXT: s_waitcnt lgkmcnt(0)23; SI-STD-NEXT: s_mov_b64 s[4:5], s[2:3]24; SI-STD-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc25; SI-STD-NEXT: s_waitcnt vmcnt(0)26; SI-STD-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc27; SI-STD-NEXT: s_waitcnt vmcnt(0)28; SI-STD-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc29; SI-STD-NEXT: s_waitcnt vmcnt(0)30; SI-STD-NEXT: s_mov_b64 s[2:3], s[6:7]31; SI-STD-NEXT: v_mac_f32_e32 v4, v2, v332; SI-STD-NEXT: buffer_store_dword v4, v[0:1], s[0:3], 0 addr6433; SI-STD-NEXT: s_endpgm34;35; SI-DENORM-FASTFMAF-LABEL: combine_to_mad_f32_0:36; SI-DENORM-FASTFMAF: ; %bb.0:37; SI-DENORM-FASTFMAF-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x938; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s7, 0xf00039; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s6, 040; SI-DENORM-FASTFMAF-NEXT: v_lshlrev_b32_e32 v0, 2, v041; SI-DENORM-FASTFMAF-NEXT: v_mov_b32_e32 v1, 042; SI-DENORM-FASTFMAF-NEXT: s_waitcnt lgkmcnt(0)43; SI-DENORM-FASTFMAF-NEXT: s_mov_b64 s[4:5], s[2:3]44; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc45; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)46; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc47; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)48; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc49; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)50; SI-DENORM-FASTFMAF-NEXT: s_mov_b64 s[2:3], s[6:7]51; SI-DENORM-FASTFMAF-NEXT: v_fma_f32 v2, v2, v3, v452; SI-DENORM-FASTFMAF-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr6453; SI-DENORM-FASTFMAF-NEXT: s_endpgm54;55; SI-DENORM-SLOWFMAF-LABEL: combine_to_mad_f32_0:56; SI-DENORM-SLOWFMAF: ; %bb.0:57; SI-DENORM-SLOWFMAF-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x958; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s7, 0xf00059; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s6, 060; SI-DENORM-SLOWFMAF-NEXT: v_lshlrev_b32_e32 v0, 2, v061; SI-DENORM-SLOWFMAF-NEXT: v_mov_b32_e32 v1, 062; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt lgkmcnt(0)63; SI-DENORM-SLOWFMAF-NEXT: s_mov_b64 s[4:5], s[2:3]64; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc65; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)66; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc67; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)68; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc69; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)70; SI-DENORM-SLOWFMAF-NEXT: s_mov_b64 s[2:3], s[6:7]71; SI-DENORM-SLOWFMAF-NEXT: v_mul_f32_e32 v2, v2, v372; SI-DENORM-SLOWFMAF-NEXT: v_add_f32_e32 v2, v2, v473; SI-DENORM-SLOWFMAF-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr6474; SI-DENORM-SLOWFMAF-NEXT: s_endpgm75 %tid = tail call i32 @llvm.amdgcn.workitem.id.x() #076 %gep.0 = getelementptr float, ptr addrspace(1) %in, i32 %tid77 %gep.1 = getelementptr float, ptr addrspace(1) %gep.0, i32 178 %gep.2 = getelementptr float, ptr addrspace(1) %gep.0, i32 279 %gep.out = getelementptr float, ptr addrspace(1) %out, i32 %tid80 81 %a = load volatile float, ptr addrspace(1) %gep.082 %b = load volatile float, ptr addrspace(1) %gep.183 %c = load volatile float, ptr addrspace(1) %gep.284 85 86 %mul = fmul contract float %a, %b87 %fma = fadd contract float %mul, %c88 store float %fma, ptr addrspace(1) %gep.out89 ret void90}91 92define amdgpu_kernel void @no_combine_to_mad_f32_0(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) #1 {93; SI-STD-LABEL: no_combine_to_mad_f32_0:94; SI-STD: ; %bb.0:95; SI-STD-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x996; SI-STD-NEXT: s_mov_b32 s7, 0xf00097; SI-STD-NEXT: s_mov_b32 s6, 098; SI-STD-NEXT: v_lshlrev_b32_e32 v0, 2, v099; SI-STD-NEXT: v_mov_b32_e32 v1, 0100; SI-STD-NEXT: s_waitcnt lgkmcnt(0)101; SI-STD-NEXT: s_mov_b64 s[4:5], s[2:3]102; SI-STD-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc103; SI-STD-NEXT: s_waitcnt vmcnt(0)104; SI-STD-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc105; SI-STD-NEXT: s_waitcnt vmcnt(0)106; SI-STD-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc107; SI-STD-NEXT: s_waitcnt vmcnt(0)108; SI-STD-NEXT: s_mov_b64 s[2:3], s[6:7]109; SI-STD-NEXT: v_mac_f32_e32 v4, v2, v3110; SI-STD-NEXT: buffer_store_dword v4, v[0:1], s[0:3], 0 addr64111; SI-STD-NEXT: s_endpgm112;113; SI-DENORM-LABEL: no_combine_to_mad_f32_0:114; SI-DENORM: ; %bb.0:115; SI-DENORM-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9116; SI-DENORM-NEXT: s_mov_b32 s7, 0xf000117; SI-DENORM-NEXT: s_mov_b32 s6, 0118; SI-DENORM-NEXT: v_lshlrev_b32_e32 v0, 2, v0119; SI-DENORM-NEXT: v_mov_b32_e32 v1, 0120; SI-DENORM-NEXT: s_waitcnt lgkmcnt(0)121; SI-DENORM-NEXT: s_mov_b64 s[4:5], s[2:3]122; SI-DENORM-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc123; SI-DENORM-NEXT: s_waitcnt vmcnt(0)124; SI-DENORM-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc125; SI-DENORM-NEXT: s_waitcnt vmcnt(0)126; SI-DENORM-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc127; SI-DENORM-NEXT: s_waitcnt vmcnt(0)128; SI-DENORM-NEXT: s_mov_b64 s[2:3], s[6:7]129; SI-DENORM-NEXT: v_mul_f32_e32 v2, v2, v3130; SI-DENORM-NEXT: v_add_f32_e32 v2, v2, v4131; SI-DENORM-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64132; SI-DENORM-NEXT: s_endpgm133 %tid = tail call i32 @llvm.amdgcn.workitem.id.x() #0134 %gep.0 = getelementptr float, ptr addrspace(1) %in, i32 %tid135 %gep.1 = getelementptr float, ptr addrspace(1) %gep.0, i32 1136 %gep.2 = getelementptr float, ptr addrspace(1) %gep.0, i32 2137 %gep.out = getelementptr float, ptr addrspace(1) %out, i32 %tid138 139 %a = load volatile float, ptr addrspace(1) %gep.0140 %b = load volatile float, ptr addrspace(1) %gep.1141 %c = load volatile float, ptr addrspace(1) %gep.2142 143 %mul = fmul float %a, %b144 %fma = fadd float %mul, %c145 store float %fma, ptr addrspace(1) %gep.out146 ret void147}148 149; (fadd (fmul x, y), z) -> (fma x, y, z)150define amdgpu_kernel void @combine_to_mad_f32_0_2use(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in, i1 %is_fast) #1 {151; SI-STD-LABEL: combine_to_mad_f32_0_2use:152; SI-STD: ; %bb.0:153; SI-STD-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9154; SI-STD-NEXT: s_mov_b32 s7, 0xf000155; SI-STD-NEXT: s_mov_b32 s6, 0156; SI-STD-NEXT: v_lshlrev_b32_e32 v0, 2, v0157; SI-STD-NEXT: v_mov_b32_e32 v1, 0158; SI-STD-NEXT: s_waitcnt lgkmcnt(0)159; SI-STD-NEXT: s_mov_b64 s[4:5], s[2:3]160; SI-STD-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc161; SI-STD-NEXT: s_waitcnt vmcnt(0)162; SI-STD-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc163; SI-STD-NEXT: s_waitcnt vmcnt(0)164; SI-STD-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc165; SI-STD-NEXT: s_waitcnt vmcnt(0)166; SI-STD-NEXT: buffer_load_dword v5, v[0:1], s[4:7], 0 addr64 offset:12 glc167; SI-STD-NEXT: s_waitcnt vmcnt(0)168; SI-STD-NEXT: s_mov_b64 s[2:3], s[6:7]169; SI-STD-NEXT: v_mac_f32_e32 v4, v2, v3170; SI-STD-NEXT: v_mac_f32_e32 v5, v2, v3171; SI-STD-NEXT: buffer_store_dword v4, v[0:1], s[0:3], 0 addr64172; SI-STD-NEXT: s_waitcnt vmcnt(0)173; SI-STD-NEXT: buffer_store_dword v5, v[0:1], s[0:3], 0 addr64 offset:4174; SI-STD-NEXT: s_waitcnt vmcnt(0)175; SI-STD-NEXT: s_endpgm176;177; SI-DENORM-FASTFMAF-LABEL: combine_to_mad_f32_0_2use:178; SI-DENORM-FASTFMAF: ; %bb.0:179; SI-DENORM-FASTFMAF-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9180; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s7, 0xf000181; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s6, 0182; SI-DENORM-FASTFMAF-NEXT: v_lshlrev_b32_e32 v0, 2, v0183; SI-DENORM-FASTFMAF-NEXT: v_mov_b32_e32 v1, 0184; SI-DENORM-FASTFMAF-NEXT: s_waitcnt lgkmcnt(0)185; SI-DENORM-FASTFMAF-NEXT: s_mov_b64 s[4:5], s[2:3]186; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc187; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)188; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc189; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)190; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc191; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)192; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v5, v[0:1], s[4:7], 0 addr64 offset:12 glc193; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)194; SI-DENORM-FASTFMAF-NEXT: s_mov_b64 s[2:3], s[6:7]195; SI-DENORM-FASTFMAF-NEXT: v_fma_f32 v4, v2, v3, v4196; SI-DENORM-FASTFMAF-NEXT: v_fma_f32 v2, v2, v3, v5197; SI-DENORM-FASTFMAF-NEXT: buffer_store_dword v4, v[0:1], s[0:3], 0 addr64198; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)199; SI-DENORM-FASTFMAF-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64 offset:4200; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)201; SI-DENORM-FASTFMAF-NEXT: s_endpgm202;203; SI-DENORM-SLOWFMAF-LABEL: combine_to_mad_f32_0_2use:204; SI-DENORM-SLOWFMAF: ; %bb.0:205; SI-DENORM-SLOWFMAF-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9206; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s7, 0xf000207; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s6, 0208; SI-DENORM-SLOWFMAF-NEXT: v_lshlrev_b32_e32 v0, 2, v0209; SI-DENORM-SLOWFMAF-NEXT: v_mov_b32_e32 v1, 0210; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt lgkmcnt(0)211; SI-DENORM-SLOWFMAF-NEXT: s_mov_b64 s[4:5], s[2:3]212; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc213; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)214; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc215; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)216; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc217; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)218; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v5, v[0:1], s[4:7], 0 addr64 offset:12 glc219; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)220; SI-DENORM-SLOWFMAF-NEXT: s_mov_b64 s[2:3], s[6:7]221; SI-DENORM-SLOWFMAF-NEXT: v_mul_f32_e32 v2, v2, v3222; SI-DENORM-SLOWFMAF-NEXT: v_add_f32_e32 v3, v2, v4223; SI-DENORM-SLOWFMAF-NEXT: v_add_f32_e32 v2, v2, v5224; SI-DENORM-SLOWFMAF-NEXT: buffer_store_dword v3, v[0:1], s[0:3], 0 addr64225; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)226; SI-DENORM-SLOWFMAF-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64 offset:4227; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)228; SI-DENORM-SLOWFMAF-NEXT: s_endpgm229 %tid = tail call i32 @llvm.amdgcn.workitem.id.x() #0230 %gep.0 = getelementptr float, ptr addrspace(1) %in, i32 %tid231 %gep.1 = getelementptr float, ptr addrspace(1) %gep.0, i32 1232 %gep.2 = getelementptr float, ptr addrspace(1) %gep.0, i32 2233 %gep.3 = getelementptr float, ptr addrspace(1) %gep.0, i32 3234 %gep.out.0 = getelementptr float, ptr addrspace(1) %out, i32 %tid235 %gep.out.1 = getelementptr float, ptr addrspace(1) %gep.out.0, i32 1236 237 %a = load volatile float, ptr addrspace(1) %gep.0238 %b = load volatile float, ptr addrspace(1) %gep.1239 %c = load volatile float, ptr addrspace(1) %gep.2240 %d = load volatile float, ptr addrspace(1) %gep.3241 242 %mul = fmul contract fast float %a, %b243 %fma0 = fadd contract fast float %mul, %c244 %fma1 = fadd contract fast float %mul, %d245 store volatile float %fma0, ptr addrspace(1) %gep.out.0246 store volatile float %fma1, ptr addrspace(1) %gep.out.1247 ret void248}249 250define amdgpu_kernel void @no_combine_to_mad_f32_0_2use(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in, i1 %is_fast) #1 {251; SI-STD-LABEL: no_combine_to_mad_f32_0_2use:252; SI-STD: ; %bb.0:253; SI-STD-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9254; SI-STD-NEXT: s_mov_b32 s7, 0xf000255; SI-STD-NEXT: s_mov_b32 s6, 0256; SI-STD-NEXT: v_lshlrev_b32_e32 v0, 2, v0257; SI-STD-NEXT: v_mov_b32_e32 v1, 0258; SI-STD-NEXT: s_waitcnt lgkmcnt(0)259; SI-STD-NEXT: s_mov_b64 s[4:5], s[2:3]260; SI-STD-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc261; SI-STD-NEXT: s_waitcnt vmcnt(0)262; SI-STD-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc263; SI-STD-NEXT: s_waitcnt vmcnt(0)264; SI-STD-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc265; SI-STD-NEXT: s_waitcnt vmcnt(0)266; SI-STD-NEXT: buffer_load_dword v5, v[0:1], s[4:7], 0 addr64 offset:12 glc267; SI-STD-NEXT: s_waitcnt vmcnt(0)268; SI-STD-NEXT: s_mov_b64 s[2:3], s[6:7]269; SI-STD-NEXT: v_mac_f32_e32 v4, v2, v3270; SI-STD-NEXT: v_mac_f32_e32 v5, v2, v3271; SI-STD-NEXT: buffer_store_dword v4, v[0:1], s[0:3], 0 addr64272; SI-STD-NEXT: s_waitcnt vmcnt(0)273; SI-STD-NEXT: buffer_store_dword v5, v[0:1], s[0:3], 0 addr64 offset:4274; SI-STD-NEXT: s_waitcnt vmcnt(0)275; SI-STD-NEXT: s_endpgm276;277; SI-DENORM-LABEL: no_combine_to_mad_f32_0_2use:278; SI-DENORM: ; %bb.0:279; SI-DENORM-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9280; SI-DENORM-NEXT: s_mov_b32 s7, 0xf000281; SI-DENORM-NEXT: s_mov_b32 s6, 0282; SI-DENORM-NEXT: v_lshlrev_b32_e32 v0, 2, v0283; SI-DENORM-NEXT: v_mov_b32_e32 v1, 0284; SI-DENORM-NEXT: s_waitcnt lgkmcnt(0)285; SI-DENORM-NEXT: s_mov_b64 s[4:5], s[2:3]286; SI-DENORM-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc287; SI-DENORM-NEXT: s_waitcnt vmcnt(0)288; SI-DENORM-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc289; SI-DENORM-NEXT: s_waitcnt vmcnt(0)290; SI-DENORM-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc291; SI-DENORM-NEXT: s_waitcnt vmcnt(0)292; SI-DENORM-NEXT: buffer_load_dword v5, v[0:1], s[4:7], 0 addr64 offset:12 glc293; SI-DENORM-NEXT: s_waitcnt vmcnt(0)294; SI-DENORM-NEXT: s_mov_b64 s[2:3], s[6:7]295; SI-DENORM-NEXT: v_mul_f32_e32 v2, v2, v3296; SI-DENORM-NEXT: v_add_f32_e32 v3, v2, v4297; SI-DENORM-NEXT: v_add_f32_e32 v2, v2, v5298; SI-DENORM-NEXT: buffer_store_dword v3, v[0:1], s[0:3], 0 addr64299; SI-DENORM-NEXT: s_waitcnt vmcnt(0)300; SI-DENORM-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64 offset:4301; SI-DENORM-NEXT: s_waitcnt vmcnt(0)302; SI-DENORM-NEXT: s_endpgm303 %tid = tail call i32 @llvm.amdgcn.workitem.id.x() #0304 %gep.0 = getelementptr float, ptr addrspace(1) %in, i32 %tid305 %gep.1 = getelementptr float, ptr addrspace(1) %gep.0, i32 1306 %gep.2 = getelementptr float, ptr addrspace(1) %gep.0, i32 2307 %gep.3 = getelementptr float, ptr addrspace(1) %gep.0, i32 3308 %gep.out.0 = getelementptr float, ptr addrspace(1) %out, i32 %tid309 %gep.out.1 = getelementptr float, ptr addrspace(1) %gep.out.0, i32 1310 311 %a = load volatile float, ptr addrspace(1) %gep.0312 %b = load volatile float, ptr addrspace(1) %gep.1313 %c = load volatile float, ptr addrspace(1) %gep.2314 %d = load volatile float, ptr addrspace(1) %gep.3315 316 %mul = fmul float %a, %b317 %fma0 = fadd float %mul, %c318 %fma1 = fadd float %mul, %d319 store volatile float %fma0, ptr addrspace(1) %gep.out.0320 store volatile float %fma1, ptr addrspace(1) %gep.out.1321 ret void322}323 324; (fadd x, (fmul y, z)) -> (fma y, z, x)325define amdgpu_kernel void @combine_to_mad_f32_1(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) #1 {326; SI-STD-LABEL: combine_to_mad_f32_1:327; SI-STD: ; %bb.0:328; SI-STD-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9329; SI-STD-NEXT: s_mov_b32 s7, 0xf000330; SI-STD-NEXT: s_mov_b32 s6, 0331; SI-STD-NEXT: v_lshlrev_b32_e32 v0, 2, v0332; SI-STD-NEXT: v_mov_b32_e32 v1, 0333; SI-STD-NEXT: s_waitcnt lgkmcnt(0)334; SI-STD-NEXT: s_mov_b64 s[4:5], s[2:3]335; SI-STD-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc336; SI-STD-NEXT: s_waitcnt vmcnt(0)337; SI-STD-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc338; SI-STD-NEXT: s_waitcnt vmcnt(0)339; SI-STD-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc340; SI-STD-NEXT: s_waitcnt vmcnt(0)341; SI-STD-NEXT: s_mov_b64 s[2:3], s[6:7]342; SI-STD-NEXT: v_mac_f32_e32 v4, v2, v3343; SI-STD-NEXT: buffer_store_dword v4, v[0:1], s[0:3], 0 addr64344; SI-STD-NEXT: s_endpgm345;346; SI-DENORM-FASTFMAF-LABEL: combine_to_mad_f32_1:347; SI-DENORM-FASTFMAF: ; %bb.0:348; SI-DENORM-FASTFMAF-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9349; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s7, 0xf000350; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s6, 0351; SI-DENORM-FASTFMAF-NEXT: v_lshlrev_b32_e32 v0, 2, v0352; SI-DENORM-FASTFMAF-NEXT: v_mov_b32_e32 v1, 0353; SI-DENORM-FASTFMAF-NEXT: s_waitcnt lgkmcnt(0)354; SI-DENORM-FASTFMAF-NEXT: s_mov_b64 s[4:5], s[2:3]355; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc356; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)357; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc358; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)359; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc360; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)361; SI-DENORM-FASTFMAF-NEXT: s_mov_b64 s[2:3], s[6:7]362; SI-DENORM-FASTFMAF-NEXT: v_fma_f32 v2, v2, v3, v4363; SI-DENORM-FASTFMAF-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64364; SI-DENORM-FASTFMAF-NEXT: s_endpgm365;366; SI-DENORM-SLOWFMAF-LABEL: combine_to_mad_f32_1:367; SI-DENORM-SLOWFMAF: ; %bb.0:368; SI-DENORM-SLOWFMAF-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9369; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s7, 0xf000370; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s6, 0371; SI-DENORM-SLOWFMAF-NEXT: v_lshlrev_b32_e32 v0, 2, v0372; SI-DENORM-SLOWFMAF-NEXT: v_mov_b32_e32 v1, 0373; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt lgkmcnt(0)374; SI-DENORM-SLOWFMAF-NEXT: s_mov_b64 s[4:5], s[2:3]375; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc376; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)377; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc378; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)379; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc380; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)381; SI-DENORM-SLOWFMAF-NEXT: s_mov_b64 s[2:3], s[6:7]382; SI-DENORM-SLOWFMAF-NEXT: v_mul_f32_e32 v2, v2, v3383; SI-DENORM-SLOWFMAF-NEXT: v_add_f32_e32 v2, v4, v2384; SI-DENORM-SLOWFMAF-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64385; SI-DENORM-SLOWFMAF-NEXT: s_endpgm386 %tid = tail call i32 @llvm.amdgcn.workitem.id.x() #0387 %gep.0 = getelementptr float, ptr addrspace(1) %in, i32 %tid388 %gep.1 = getelementptr float, ptr addrspace(1) %gep.0, i32 1389 %gep.2 = getelementptr float, ptr addrspace(1) %gep.0, i32 2390 %gep.out = getelementptr float, ptr addrspace(1) %out, i32 %tid391 392 %a = load volatile float, ptr addrspace(1) %gep.0393 %b = load volatile float, ptr addrspace(1) %gep.1394 %c = load volatile float, ptr addrspace(1) %gep.2395 396 %mul = fmul contract float %a, %b397 %fma = fadd contract float %c, %mul398 store float %fma, ptr addrspace(1) %gep.out399 ret void400}401 402; (fsub (fmul x, y), z) -> (fma x, y, (fneg z))403define amdgpu_kernel void @combine_to_mad_fsub_0_f32(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) #1 {404; SI-STD-LABEL: combine_to_mad_fsub_0_f32:405; SI-STD: ; %bb.0:406; SI-STD-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9407; SI-STD-NEXT: s_mov_b32 s7, 0xf000408; SI-STD-NEXT: s_mov_b32 s6, 0409; SI-STD-NEXT: v_lshlrev_b32_e32 v0, 2, v0410; SI-STD-NEXT: v_mov_b32_e32 v1, 0411; SI-STD-NEXT: s_waitcnt lgkmcnt(0)412; SI-STD-NEXT: s_mov_b64 s[4:5], s[2:3]413; SI-STD-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc414; SI-STD-NEXT: s_waitcnt vmcnt(0)415; SI-STD-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc416; SI-STD-NEXT: s_waitcnt vmcnt(0)417; SI-STD-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc418; SI-STD-NEXT: s_waitcnt vmcnt(0)419; SI-STD-NEXT: s_mov_b64 s[2:3], s[6:7]420; SI-STD-NEXT: v_mad_f32 v2, v2, v3, -v4421; SI-STD-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64422; SI-STD-NEXT: s_endpgm423;424; SI-DENORM-FASTFMAF-LABEL: combine_to_mad_fsub_0_f32:425; SI-DENORM-FASTFMAF: ; %bb.0:426; SI-DENORM-FASTFMAF-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9427; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s7, 0xf000428; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s6, 0429; SI-DENORM-FASTFMAF-NEXT: v_lshlrev_b32_e32 v0, 2, v0430; SI-DENORM-FASTFMAF-NEXT: v_mov_b32_e32 v1, 0431; SI-DENORM-FASTFMAF-NEXT: s_waitcnt lgkmcnt(0)432; SI-DENORM-FASTFMAF-NEXT: s_mov_b64 s[4:5], s[2:3]433; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc434; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)435; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc436; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)437; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc438; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)439; SI-DENORM-FASTFMAF-NEXT: s_mov_b64 s[2:3], s[6:7]440; SI-DENORM-FASTFMAF-NEXT: v_fma_f32 v2, v2, v3, -v4441; SI-DENORM-FASTFMAF-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64442; SI-DENORM-FASTFMAF-NEXT: s_endpgm443;444; SI-DENORM-SLOWFMAF-LABEL: combine_to_mad_fsub_0_f32:445; SI-DENORM-SLOWFMAF: ; %bb.0:446; SI-DENORM-SLOWFMAF-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9447; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s7, 0xf000448; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s6, 0449; SI-DENORM-SLOWFMAF-NEXT: v_lshlrev_b32_e32 v0, 2, v0450; SI-DENORM-SLOWFMAF-NEXT: v_mov_b32_e32 v1, 0451; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt lgkmcnt(0)452; SI-DENORM-SLOWFMAF-NEXT: s_mov_b64 s[4:5], s[2:3]453; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc454; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)455; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc456; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)457; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc458; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)459; SI-DENORM-SLOWFMAF-NEXT: s_mov_b64 s[2:3], s[6:7]460; SI-DENORM-SLOWFMAF-NEXT: v_mul_f32_e32 v2, v2, v3461; SI-DENORM-SLOWFMAF-NEXT: v_sub_f32_e32 v2, v2, v4462; SI-DENORM-SLOWFMAF-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64463; SI-DENORM-SLOWFMAF-NEXT: s_endpgm464 %tid = tail call i32 @llvm.amdgcn.workitem.id.x() #0465 %gep.0 = getelementptr float, ptr addrspace(1) %in, i32 %tid466 %gep.1 = getelementptr float, ptr addrspace(1) %gep.0, i32 1467 %gep.2 = getelementptr float, ptr addrspace(1) %gep.0, i32 2468 %gep.out = getelementptr float, ptr addrspace(1) %out, i32 %tid469 470 %a = load volatile float, ptr addrspace(1) %gep.0471 %b = load volatile float, ptr addrspace(1) %gep.1472 %c = load volatile float, ptr addrspace(1) %gep.2473 474 %mul = fmul contract float %a, %b475 %fma = fsub contract float %mul, %c476 store float %fma, ptr addrspace(1) %gep.out477 ret void478}479 480; (fsub (fmul x, y), z) -> (fma x, y, (fneg z))481define amdgpu_kernel void @combine_to_mad_fsub_0_f32_2use(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) #1 {482; SI-STD-LABEL: combine_to_mad_fsub_0_f32_2use:483; SI-STD: ; %bb.0:484; SI-STD-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9485; SI-STD-NEXT: s_mov_b32 s7, 0xf000486; SI-STD-NEXT: s_mov_b32 s6, 0487; SI-STD-NEXT: v_lshlrev_b32_e32 v0, 2, v0488; SI-STD-NEXT: v_mov_b32_e32 v1, 0489; SI-STD-NEXT: s_waitcnt lgkmcnt(0)490; SI-STD-NEXT: s_mov_b64 s[4:5], s[2:3]491; SI-STD-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc492; SI-STD-NEXT: s_waitcnt vmcnt(0)493; SI-STD-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc494; SI-STD-NEXT: s_waitcnt vmcnt(0)495; SI-STD-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc496; SI-STD-NEXT: s_waitcnt vmcnt(0)497; SI-STD-NEXT: buffer_load_dword v5, v[0:1], s[4:7], 0 addr64 offset:12 glc498; SI-STD-NEXT: s_waitcnt vmcnt(0)499; SI-STD-NEXT: s_mov_b64 s[2:3], s[6:7]500; SI-STD-NEXT: v_mad_f32 v4, v2, v3, -v4501; SI-STD-NEXT: v_mad_f32 v2, v2, v3, -v5502; SI-STD-NEXT: buffer_store_dword v4, v[0:1], s[0:3], 0 addr64503; SI-STD-NEXT: s_waitcnt vmcnt(0)504; SI-STD-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64 offset:4505; SI-STD-NEXT: s_waitcnt vmcnt(0)506; SI-STD-NEXT: s_endpgm507;508; SI-DENORM-FASTFMAF-LABEL: combine_to_mad_fsub_0_f32_2use:509; SI-DENORM-FASTFMAF: ; %bb.0:510; SI-DENORM-FASTFMAF-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9511; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s7, 0xf000512; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s6, 0513; SI-DENORM-FASTFMAF-NEXT: v_lshlrev_b32_e32 v0, 2, v0514; SI-DENORM-FASTFMAF-NEXT: v_mov_b32_e32 v1, 0515; SI-DENORM-FASTFMAF-NEXT: s_waitcnt lgkmcnt(0)516; SI-DENORM-FASTFMAF-NEXT: s_mov_b64 s[4:5], s[2:3]517; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc518; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)519; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc520; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)521; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc522; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)523; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v5, v[0:1], s[4:7], 0 addr64 offset:12 glc524; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)525; SI-DENORM-FASTFMAF-NEXT: s_mov_b64 s[2:3], s[6:7]526; SI-DENORM-FASTFMAF-NEXT: v_fma_f32 v4, v2, v3, -v4527; SI-DENORM-FASTFMAF-NEXT: v_fma_f32 v2, v2, v3, -v5528; SI-DENORM-FASTFMAF-NEXT: buffer_store_dword v4, v[0:1], s[0:3], 0 addr64529; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)530; SI-DENORM-FASTFMAF-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64 offset:4531; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)532; SI-DENORM-FASTFMAF-NEXT: s_endpgm533;534; SI-DENORM-SLOWFMAF-LABEL: combine_to_mad_fsub_0_f32_2use:535; SI-DENORM-SLOWFMAF: ; %bb.0:536; SI-DENORM-SLOWFMAF-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9537; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s7, 0xf000538; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s6, 0539; SI-DENORM-SLOWFMAF-NEXT: v_lshlrev_b32_e32 v0, 2, v0540; SI-DENORM-SLOWFMAF-NEXT: v_mov_b32_e32 v1, 0541; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt lgkmcnt(0)542; SI-DENORM-SLOWFMAF-NEXT: s_mov_b64 s[4:5], s[2:3]543; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc544; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)545; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc546; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)547; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc548; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)549; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v5, v[0:1], s[4:7], 0 addr64 offset:12 glc550; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)551; SI-DENORM-SLOWFMAF-NEXT: s_mov_b64 s[2:3], s[6:7]552; SI-DENORM-SLOWFMAF-NEXT: v_mul_f32_e32 v2, v2, v3553; SI-DENORM-SLOWFMAF-NEXT: v_sub_f32_e32 v3, v2, v4554; SI-DENORM-SLOWFMAF-NEXT: v_sub_f32_e32 v2, v2, v5555; SI-DENORM-SLOWFMAF-NEXT: buffer_store_dword v3, v[0:1], s[0:3], 0 addr64556; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)557; SI-DENORM-SLOWFMAF-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64 offset:4558; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)559; SI-DENORM-SLOWFMAF-NEXT: s_endpgm560 %tid = tail call i32 @llvm.amdgcn.workitem.id.x() #0561 %gep.0 = getelementptr float, ptr addrspace(1) %in, i32 %tid562 %gep.1 = getelementptr float, ptr addrspace(1) %gep.0, i32 1563 %gep.2 = getelementptr float, ptr addrspace(1) %gep.0, i32 2564 %gep.3 = getelementptr float, ptr addrspace(1) %gep.0, i32 3565 %gep.out.0 = getelementptr float, ptr addrspace(1) %out, i32 %tid566 %gep.out.1 = getelementptr float, ptr addrspace(1) %gep.out.0, i32 1567 568 %a = load volatile float, ptr addrspace(1) %gep.0569 %b = load volatile float, ptr addrspace(1) %gep.1570 %c = load volatile float, ptr addrspace(1) %gep.2571 %d = load volatile float, ptr addrspace(1) %gep.3572 573 %mul = fmul contract float %a, %b574 %fma0 = fsub contract float %mul, %c575 %fma1 = fsub contract float %mul, %d576 store volatile float %fma0, ptr addrspace(1) %gep.out.0577 store volatile float %fma1, ptr addrspace(1) %gep.out.1578 ret void579}580 581; (fsub x, (fmul y, z)) -> (fma (fneg y), z, x)582define amdgpu_kernel void @combine_to_mad_fsub_1_f32(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) #1 {583; SI-STD-LABEL: combine_to_mad_fsub_1_f32:584; SI-STD: ; %bb.0:585; SI-STD-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9586; SI-STD-NEXT: s_mov_b32 s7, 0xf000587; SI-STD-NEXT: s_mov_b32 s6, 0588; SI-STD-NEXT: v_lshlrev_b32_e32 v0, 2, v0589; SI-STD-NEXT: v_mov_b32_e32 v1, 0590; SI-STD-NEXT: s_waitcnt lgkmcnt(0)591; SI-STD-NEXT: s_mov_b64 s[4:5], s[2:3]592; SI-STD-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc593; SI-STD-NEXT: s_waitcnt vmcnt(0)594; SI-STD-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc595; SI-STD-NEXT: s_waitcnt vmcnt(0)596; SI-STD-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc597; SI-STD-NEXT: s_waitcnt vmcnt(0)598; SI-STD-NEXT: s_mov_b64 s[2:3], s[6:7]599; SI-STD-NEXT: v_mad_f32 v2, -v2, v3, v4600; SI-STD-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64601; SI-STD-NEXT: s_endpgm602;603; SI-DENORM-FASTFMAF-LABEL: combine_to_mad_fsub_1_f32:604; SI-DENORM-FASTFMAF: ; %bb.0:605; SI-DENORM-FASTFMAF-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9606; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s7, 0xf000607; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s6, 0608; SI-DENORM-FASTFMAF-NEXT: v_lshlrev_b32_e32 v0, 2, v0609; SI-DENORM-FASTFMAF-NEXT: v_mov_b32_e32 v1, 0610; SI-DENORM-FASTFMAF-NEXT: s_waitcnt lgkmcnt(0)611; SI-DENORM-FASTFMAF-NEXT: s_mov_b64 s[4:5], s[2:3]612; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc613; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)614; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc615; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)616; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc617; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)618; SI-DENORM-FASTFMAF-NEXT: s_mov_b64 s[2:3], s[6:7]619; SI-DENORM-FASTFMAF-NEXT: v_fma_f32 v2, -v2, v3, v4620; SI-DENORM-FASTFMAF-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64621; SI-DENORM-FASTFMAF-NEXT: s_endpgm622;623; SI-DENORM-SLOWFMAF-LABEL: combine_to_mad_fsub_1_f32:624; SI-DENORM-SLOWFMAF: ; %bb.0:625; SI-DENORM-SLOWFMAF-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9626; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s7, 0xf000627; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s6, 0628; SI-DENORM-SLOWFMAF-NEXT: v_lshlrev_b32_e32 v0, 2, v0629; SI-DENORM-SLOWFMAF-NEXT: v_mov_b32_e32 v1, 0630; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt lgkmcnt(0)631; SI-DENORM-SLOWFMAF-NEXT: s_mov_b64 s[4:5], s[2:3]632; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc633; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)634; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc635; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)636; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc637; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)638; SI-DENORM-SLOWFMAF-NEXT: s_mov_b64 s[2:3], s[6:7]639; SI-DENORM-SLOWFMAF-NEXT: v_mul_f32_e32 v2, v2, v3640; SI-DENORM-SLOWFMAF-NEXT: v_sub_f32_e32 v2, v4, v2641; SI-DENORM-SLOWFMAF-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64642; SI-DENORM-SLOWFMAF-NEXT: s_endpgm643 %tid = tail call i32 @llvm.amdgcn.workitem.id.x() #0644 %gep.0 = getelementptr float, ptr addrspace(1) %in, i32 %tid645 %gep.1 = getelementptr float, ptr addrspace(1) %gep.0, i32 1646 %gep.2 = getelementptr float, ptr addrspace(1) %gep.0, i32 2647 %gep.out = getelementptr float, ptr addrspace(1) %out, i32 %tid648 649 %a = load volatile float, ptr addrspace(1) %gep.0650 %b = load volatile float, ptr addrspace(1) %gep.1651 %c = load volatile float, ptr addrspace(1) %gep.2652 653 %mul = fmul contract float %a, %b654 %fma = fsub contract float %c, %mul655 store float %fma, ptr addrspace(1) %gep.out656 ret void657}658 659; (fsub x, (fmul y, z)) -> (fma (fneg y), z, x)660define amdgpu_kernel void @combine_to_mad_fsub_1_f32_2use(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) #1 {661; SI-STD-LABEL: combine_to_mad_fsub_1_f32_2use:662; SI-STD: ; %bb.0:663; SI-STD-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9664; SI-STD-NEXT: s_mov_b32 s7, 0xf000665; SI-STD-NEXT: s_mov_b32 s6, 0666; SI-STD-NEXT: v_lshlrev_b32_e32 v0, 2, v0667; SI-STD-NEXT: v_mov_b32_e32 v1, 0668; SI-STD-NEXT: s_waitcnt lgkmcnt(0)669; SI-STD-NEXT: s_mov_b64 s[4:5], s[2:3]670; SI-STD-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc671; SI-STD-NEXT: s_waitcnt vmcnt(0)672; SI-STD-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc673; SI-STD-NEXT: s_waitcnt vmcnt(0)674; SI-STD-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc675; SI-STD-NEXT: s_waitcnt vmcnt(0)676; SI-STD-NEXT: buffer_load_dword v5, v[0:1], s[4:7], 0 addr64 offset:12 glc677; SI-STD-NEXT: s_waitcnt vmcnt(0)678; SI-STD-NEXT: s_mov_b64 s[2:3], s[6:7]679; SI-STD-NEXT: v_mad_f32 v4, -v2, v3, v4680; SI-STD-NEXT: v_mad_f32 v2, -v2, v3, v5681; SI-STD-NEXT: buffer_store_dword v4, v[0:1], s[0:3], 0 addr64682; SI-STD-NEXT: s_waitcnt vmcnt(0)683; SI-STD-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64 offset:4684; SI-STD-NEXT: s_waitcnt vmcnt(0)685; SI-STD-NEXT: s_endpgm686;687; SI-DENORM-FASTFMAF-LABEL: combine_to_mad_fsub_1_f32_2use:688; SI-DENORM-FASTFMAF: ; %bb.0:689; SI-DENORM-FASTFMAF-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9690; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s7, 0xf000691; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s6, 0692; SI-DENORM-FASTFMAF-NEXT: v_lshlrev_b32_e32 v0, 2, v0693; SI-DENORM-FASTFMAF-NEXT: v_mov_b32_e32 v1, 0694; SI-DENORM-FASTFMAF-NEXT: s_waitcnt lgkmcnt(0)695; SI-DENORM-FASTFMAF-NEXT: s_mov_b64 s[4:5], s[2:3]696; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc697; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)698; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc699; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)700; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc701; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)702; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v5, v[0:1], s[4:7], 0 addr64 offset:12 glc703; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)704; SI-DENORM-FASTFMAF-NEXT: s_mov_b64 s[2:3], s[6:7]705; SI-DENORM-FASTFMAF-NEXT: v_fma_f32 v4, -v2, v3, v4706; SI-DENORM-FASTFMAF-NEXT: v_fma_f32 v2, -v2, v3, v5707; SI-DENORM-FASTFMAF-NEXT: buffer_store_dword v4, v[0:1], s[0:3], 0 addr64708; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)709; SI-DENORM-FASTFMAF-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64 offset:4710; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)711; SI-DENORM-FASTFMAF-NEXT: s_endpgm712;713; SI-DENORM-SLOWFMAF-LABEL: combine_to_mad_fsub_1_f32_2use:714; SI-DENORM-SLOWFMAF: ; %bb.0:715; SI-DENORM-SLOWFMAF-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9716; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s7, 0xf000717; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s6, 0718; SI-DENORM-SLOWFMAF-NEXT: v_lshlrev_b32_e32 v0, 2, v0719; SI-DENORM-SLOWFMAF-NEXT: v_mov_b32_e32 v1, 0720; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt lgkmcnt(0)721; SI-DENORM-SLOWFMAF-NEXT: s_mov_b64 s[4:5], s[2:3]722; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc723; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)724; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc725; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)726; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc727; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)728; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v5, v[0:1], s[4:7], 0 addr64 offset:12 glc729; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)730; SI-DENORM-SLOWFMAF-NEXT: s_mov_b64 s[2:3], s[6:7]731; SI-DENORM-SLOWFMAF-NEXT: v_mul_f32_e32 v2, v2, v3732; SI-DENORM-SLOWFMAF-NEXT: v_sub_f32_e32 v3, v4, v2733; SI-DENORM-SLOWFMAF-NEXT: v_sub_f32_e32 v2, v5, v2734; SI-DENORM-SLOWFMAF-NEXT: buffer_store_dword v3, v[0:1], s[0:3], 0 addr64735; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)736; SI-DENORM-SLOWFMAF-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64 offset:4737; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)738; SI-DENORM-SLOWFMAF-NEXT: s_endpgm739 %tid = tail call i32 @llvm.amdgcn.workitem.id.x() #0740 %gep.0 = getelementptr float, ptr addrspace(1) %in, i32 %tid741 %gep.1 = getelementptr float, ptr addrspace(1) %gep.0, i32 1742 %gep.2 = getelementptr float, ptr addrspace(1) %gep.0, i32 2743 %gep.3 = getelementptr float, ptr addrspace(1) %gep.0, i32 3744 %gep.out.0 = getelementptr float, ptr addrspace(1) %out, i32 %tid745 %gep.out.1 = getelementptr float, ptr addrspace(1) %gep.out.0, i32 1746 747 %a = load volatile float, ptr addrspace(1) %gep.0748 %b = load volatile float, ptr addrspace(1) %gep.1749 %c = load volatile float, ptr addrspace(1) %gep.2750 %d = load volatile float, ptr addrspace(1) %gep.3751 752 %mul = fmul contract float %a, %b753 %fma0 = fsub contract float %c, %mul754 %fma1 = fsub contract float %d, %mul755 store volatile float %fma0, ptr addrspace(1) %gep.out.0756 store volatile float %fma1, ptr addrspace(1) %gep.out.1757 ret void758}759 760; (fsub (fneg (fmul x, y)), z) -> (fma (fneg x), y, (fneg z))761define amdgpu_kernel void @combine_to_mad_fsub_2_f32(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) #1 {762; SI-STD-LABEL: combine_to_mad_fsub_2_f32:763; SI-STD: ; %bb.0:764; SI-STD-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9765; SI-STD-NEXT: s_mov_b32 s7, 0xf000766; SI-STD-NEXT: s_mov_b32 s6, 0767; SI-STD-NEXT: v_lshlrev_b32_e32 v0, 2, v0768; SI-STD-NEXT: v_mov_b32_e32 v1, 0769; SI-STD-NEXT: s_waitcnt lgkmcnt(0)770; SI-STD-NEXT: s_mov_b64 s[4:5], s[2:3]771; SI-STD-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc772; SI-STD-NEXT: s_waitcnt vmcnt(0)773; SI-STD-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc774; SI-STD-NEXT: s_waitcnt vmcnt(0)775; SI-STD-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc776; SI-STD-NEXT: s_waitcnt vmcnt(0)777; SI-STD-NEXT: s_mov_b64 s[2:3], s[6:7]778; SI-STD-NEXT: v_mad_f32 v2, v2, -v3, -v4779; SI-STD-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64780; SI-STD-NEXT: s_endpgm781;782; SI-DENORM-FASTFMAF-LABEL: combine_to_mad_fsub_2_f32:783; SI-DENORM-FASTFMAF: ; %bb.0:784; SI-DENORM-FASTFMAF-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9785; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s7, 0xf000786; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s6, 0787; SI-DENORM-FASTFMAF-NEXT: v_lshlrev_b32_e32 v0, 2, v0788; SI-DENORM-FASTFMAF-NEXT: v_mov_b32_e32 v1, 0789; SI-DENORM-FASTFMAF-NEXT: s_waitcnt lgkmcnt(0)790; SI-DENORM-FASTFMAF-NEXT: s_mov_b64 s[4:5], s[2:3]791; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc792; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)793; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc794; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)795; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc796; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)797; SI-DENORM-FASTFMAF-NEXT: s_mov_b64 s[2:3], s[6:7]798; SI-DENORM-FASTFMAF-NEXT: v_fma_f32 v2, -v2, v3, -v4799; SI-DENORM-FASTFMAF-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64800; SI-DENORM-FASTFMAF-NEXT: s_endpgm801;802; SI-DENORM-SLOWFMAF-LABEL: combine_to_mad_fsub_2_f32:803; SI-DENORM-SLOWFMAF: ; %bb.0:804; SI-DENORM-SLOWFMAF-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9805; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s7, 0xf000806; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s6, 0807; SI-DENORM-SLOWFMAF-NEXT: v_lshlrev_b32_e32 v0, 2, v0808; SI-DENORM-SLOWFMAF-NEXT: v_mov_b32_e32 v1, 0809; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt lgkmcnt(0)810; SI-DENORM-SLOWFMAF-NEXT: s_mov_b64 s[4:5], s[2:3]811; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc812; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)813; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc814; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)815; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc816; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)817; SI-DENORM-SLOWFMAF-NEXT: s_mov_b64 s[2:3], s[6:7]818; SI-DENORM-SLOWFMAF-NEXT: v_mul_f32_e64 v2, v2, -v3819; SI-DENORM-SLOWFMAF-NEXT: v_sub_f32_e32 v2, v2, v4820; SI-DENORM-SLOWFMAF-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64821; SI-DENORM-SLOWFMAF-NEXT: s_endpgm822 %tid = tail call i32 @llvm.amdgcn.workitem.id.x() #0823 %gep.0 = getelementptr float, ptr addrspace(1) %in, i32 %tid824 %gep.1 = getelementptr float, ptr addrspace(1) %gep.0, i32 1825 %gep.2 = getelementptr float, ptr addrspace(1) %gep.0, i32 2826 %gep.out = getelementptr float, ptr addrspace(1) %out, i32 %tid827 828 %a = load volatile float, ptr addrspace(1) %gep.0829 %b = load volatile float, ptr addrspace(1) %gep.1830 %c = load volatile float, ptr addrspace(1) %gep.2831 832 %mul = fmul contract float %a, %b833 %mul.neg = fneg contract float %mul834 %fma = fsub contract float %mul.neg, %c835 836 store float %fma, ptr addrspace(1) %gep.out837 ret void838}839 840; (fsub (fneg (fmul x, y)), z) -> (fma (fneg x), y, (fneg z))841define amdgpu_kernel void @combine_to_mad_fsub_2_f32_2uses_neg(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) #1 {842; SI-STD-LABEL: combine_to_mad_fsub_2_f32_2uses_neg:843; SI-STD: ; %bb.0:844; SI-STD-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9845; SI-STD-NEXT: s_mov_b32 s7, 0xf000846; SI-STD-NEXT: s_mov_b32 s6, 0847; SI-STD-NEXT: v_lshlrev_b32_e32 v0, 2, v0848; SI-STD-NEXT: v_mov_b32_e32 v1, 0849; SI-STD-NEXT: s_waitcnt lgkmcnt(0)850; SI-STD-NEXT: s_mov_b64 s[4:5], s[2:3]851; SI-STD-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc852; SI-STD-NEXT: s_waitcnt vmcnt(0)853; SI-STD-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc854; SI-STD-NEXT: s_waitcnt vmcnt(0)855; SI-STD-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc856; SI-STD-NEXT: s_waitcnt vmcnt(0)857; SI-STD-NEXT: buffer_load_dword v5, v[0:1], s[4:7], 0 addr64 offset:12 glc858; SI-STD-NEXT: s_waitcnt vmcnt(0)859; SI-STD-NEXT: s_mov_b64 s[2:3], s[6:7]860; SI-STD-NEXT: v_mad_f32 v4, v2, -v3, -v4861; SI-STD-NEXT: v_mad_f32 v2, v2, -v3, -v5862; SI-STD-NEXT: buffer_store_dword v4, v[0:1], s[0:3], 0 addr64863; SI-STD-NEXT: s_waitcnt vmcnt(0)864; SI-STD-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64 offset:4865; SI-STD-NEXT: s_waitcnt vmcnt(0)866; SI-STD-NEXT: s_endpgm867;868; SI-DENORM-FASTFMAF-LABEL: combine_to_mad_fsub_2_f32_2uses_neg:869; SI-DENORM-FASTFMAF: ; %bb.0:870; SI-DENORM-FASTFMAF-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9871; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s7, 0xf000872; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s6, 0873; SI-DENORM-FASTFMAF-NEXT: v_lshlrev_b32_e32 v0, 2, v0874; SI-DENORM-FASTFMAF-NEXT: v_mov_b32_e32 v1, 0875; SI-DENORM-FASTFMAF-NEXT: s_waitcnt lgkmcnt(0)876; SI-DENORM-FASTFMAF-NEXT: s_mov_b64 s[4:5], s[2:3]877; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc878; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)879; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc880; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)881; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc882; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)883; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v5, v[0:1], s[4:7], 0 addr64 offset:12 glc884; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)885; SI-DENORM-FASTFMAF-NEXT: s_mov_b64 s[2:3], s[6:7]886; SI-DENORM-FASTFMAF-NEXT: v_fma_f32 v4, -v2, v3, -v4887; SI-DENORM-FASTFMAF-NEXT: v_fma_f32 v2, -v2, v3, -v5888; SI-DENORM-FASTFMAF-NEXT: buffer_store_dword v4, v[0:1], s[0:3], 0 addr64889; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)890; SI-DENORM-FASTFMAF-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64 offset:4891; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)892; SI-DENORM-FASTFMAF-NEXT: s_endpgm893;894; SI-DENORM-SLOWFMAF-LABEL: combine_to_mad_fsub_2_f32_2uses_neg:895; SI-DENORM-SLOWFMAF: ; %bb.0:896; SI-DENORM-SLOWFMAF-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9897; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s7, 0xf000898; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s6, 0899; SI-DENORM-SLOWFMAF-NEXT: v_lshlrev_b32_e32 v0, 2, v0900; SI-DENORM-SLOWFMAF-NEXT: v_mov_b32_e32 v1, 0901; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt lgkmcnt(0)902; SI-DENORM-SLOWFMAF-NEXT: s_mov_b64 s[4:5], s[2:3]903; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc904; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)905; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc906; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)907; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc908; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)909; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v5, v[0:1], s[4:7], 0 addr64 offset:12 glc910; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)911; SI-DENORM-SLOWFMAF-NEXT: s_mov_b64 s[2:3], s[6:7]912; SI-DENORM-SLOWFMAF-NEXT: v_mul_f32_e64 v2, v2, -v3913; SI-DENORM-SLOWFMAF-NEXT: v_sub_f32_e32 v3, v2, v4914; SI-DENORM-SLOWFMAF-NEXT: v_sub_f32_e32 v2, v2, v5915; SI-DENORM-SLOWFMAF-NEXT: buffer_store_dword v3, v[0:1], s[0:3], 0 addr64916; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)917; SI-DENORM-SLOWFMAF-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64 offset:4918; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)919; SI-DENORM-SLOWFMAF-NEXT: s_endpgm920 %tid = tail call i32 @llvm.amdgcn.workitem.id.x() #0921 %gep.0 = getelementptr float, ptr addrspace(1) %in, i32 %tid922 %gep.1 = getelementptr float, ptr addrspace(1) %gep.0, i32 1923 %gep.2 = getelementptr float, ptr addrspace(1) %gep.0, i32 2924 %gep.3 = getelementptr float, ptr addrspace(1) %gep.0, i32 3925 %gep.out.0 = getelementptr float, ptr addrspace(1) %out, i32 %tid926 %gep.out.1 = getelementptr float, ptr addrspace(1) %gep.out.0, i32 1927 928 %a = load volatile float, ptr addrspace(1) %gep.0929 %b = load volatile float, ptr addrspace(1) %gep.1930 %c = load volatile float, ptr addrspace(1) %gep.2931 %d = load volatile float, ptr addrspace(1) %gep.3932 933 %mul = fmul contract float %a, %b934 %mul.neg = fneg contract float %mul935 %fma0 = fsub contract float %mul.neg, %c936 %fma1 = fsub contract float %mul.neg, %d937 938 store volatile float %fma0, ptr addrspace(1) %gep.out.0939 store volatile float %fma1, ptr addrspace(1) %gep.out.1940 ret void941}942 943; (fsub (fneg (fmul x, y)), z) -> (fma (fneg x), y, (fneg z))944define amdgpu_kernel void @combine_to_mad_fsub_2_f32_2uses_mul(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) #1 {945; SI-STD-LABEL: combine_to_mad_fsub_2_f32_2uses_mul:946; SI-STD: ; %bb.0:947; SI-STD-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9948; SI-STD-NEXT: s_mov_b32 s7, 0xf000949; SI-STD-NEXT: s_mov_b32 s6, 0950; SI-STD-NEXT: v_lshlrev_b32_e32 v0, 2, v0951; SI-STD-NEXT: v_mov_b32_e32 v1, 0952; SI-STD-NEXT: s_waitcnt lgkmcnt(0)953; SI-STD-NEXT: s_mov_b64 s[4:5], s[2:3]954; SI-STD-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc955; SI-STD-NEXT: s_waitcnt vmcnt(0)956; SI-STD-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc957; SI-STD-NEXT: s_waitcnt vmcnt(0)958; SI-STD-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc959; SI-STD-NEXT: s_waitcnt vmcnt(0)960; SI-STD-NEXT: buffer_load_dword v5, v[0:1], s[4:7], 0 addr64 offset:12 glc961; SI-STD-NEXT: s_waitcnt vmcnt(0)962; SI-STD-NEXT: s_mov_b64 s[2:3], s[6:7]963; SI-STD-NEXT: v_mad_f32 v4, -v2, v3, -v4964; SI-STD-NEXT: v_mad_f32 v2, v2, v3, -v5965; SI-STD-NEXT: buffer_store_dword v4, v[0:1], s[0:3], 0 addr64966; SI-STD-NEXT: s_waitcnt vmcnt(0)967; SI-STD-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64 offset:4968; SI-STD-NEXT: s_waitcnt vmcnt(0)969; SI-STD-NEXT: s_endpgm970;971; SI-DENORM-FASTFMAF-LABEL: combine_to_mad_fsub_2_f32_2uses_mul:972; SI-DENORM-FASTFMAF: ; %bb.0:973; SI-DENORM-FASTFMAF-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9974; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s7, 0xf000975; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s6, 0976; SI-DENORM-FASTFMAF-NEXT: v_lshlrev_b32_e32 v0, 2, v0977; SI-DENORM-FASTFMAF-NEXT: v_mov_b32_e32 v1, 0978; SI-DENORM-FASTFMAF-NEXT: s_waitcnt lgkmcnt(0)979; SI-DENORM-FASTFMAF-NEXT: s_mov_b64 s[4:5], s[2:3]980; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc981; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)982; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc983; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)984; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc985; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)986; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v5, v[0:1], s[4:7], 0 addr64 offset:12 glc987; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)988; SI-DENORM-FASTFMAF-NEXT: s_mov_b64 s[2:3], s[6:7]989; SI-DENORM-FASTFMAF-NEXT: v_fma_f32 v4, -v2, v3, -v4990; SI-DENORM-FASTFMAF-NEXT: v_fma_f32 v2, v2, v3, -v5991; SI-DENORM-FASTFMAF-NEXT: buffer_store_dword v4, v[0:1], s[0:3], 0 addr64992; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)993; SI-DENORM-FASTFMAF-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64 offset:4994; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)995; SI-DENORM-FASTFMAF-NEXT: s_endpgm996;997; SI-DENORM-SLOWFMAF-LABEL: combine_to_mad_fsub_2_f32_2uses_mul:998; SI-DENORM-SLOWFMAF: ; %bb.0:999; SI-DENORM-SLOWFMAF-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91000; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s7, 0xf0001001; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s6, 01002; SI-DENORM-SLOWFMAF-NEXT: v_lshlrev_b32_e32 v0, 2, v01003; SI-DENORM-SLOWFMAF-NEXT: v_mov_b32_e32 v1, 01004; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt lgkmcnt(0)1005; SI-DENORM-SLOWFMAF-NEXT: s_mov_b64 s[4:5], s[2:3]1006; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc1007; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)1008; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc1009; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)1010; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc1011; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)1012; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v5, v[0:1], s[4:7], 0 addr64 offset:12 glc1013; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)1014; SI-DENORM-SLOWFMAF-NEXT: s_mov_b64 s[2:3], s[6:7]1015; SI-DENORM-SLOWFMAF-NEXT: v_mul_f32_e32 v2, v2, v31016; SI-DENORM-SLOWFMAF-NEXT: v_sub_f32_e64 v3, -v2, v41017; SI-DENORM-SLOWFMAF-NEXT: v_sub_f32_e32 v2, v2, v51018; SI-DENORM-SLOWFMAF-NEXT: buffer_store_dword v3, v[0:1], s[0:3], 0 addr641019; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)1020; SI-DENORM-SLOWFMAF-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64 offset:41021; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)1022; SI-DENORM-SLOWFMAF-NEXT: s_endpgm1023 %tid = tail call i32 @llvm.amdgcn.workitem.id.x() #01024 %gep.0 = getelementptr float, ptr addrspace(1) %in, i32 %tid1025 %gep.1 = getelementptr float, ptr addrspace(1) %gep.0, i32 11026 %gep.2 = getelementptr float, ptr addrspace(1) %gep.0, i32 21027 %gep.3 = getelementptr float, ptr addrspace(1) %gep.0, i32 31028 %gep.out.0 = getelementptr float, ptr addrspace(1) %out, i32 %tid1029 %gep.out.1 = getelementptr float, ptr addrspace(1) %gep.out.0, i32 11030 1031 %a = load volatile float, ptr addrspace(1) %gep.01032 %b = load volatile float, ptr addrspace(1) %gep.11033 %c = load volatile float, ptr addrspace(1) %gep.21034 %d = load volatile float, ptr addrspace(1) %gep.31035 1036 %mul = fmul contract float %a, %b1037 %mul.neg = fneg contract float %mul1038 %fma0 = fsub contract float %mul.neg, %c1039 %fma1 = fsub contract float %mul, %d1040 1041 store volatile float %fma0, ptr addrspace(1) %gep.out.01042 store volatile float %fma1, ptr addrspace(1) %gep.out.11043 ret void1044}1045 1046; fold (fsub (fma x, y, (fmul u, v)), z) -> (fma x, y (fma u, v, (fneg z)))1047define amdgpu_kernel void @aggressive_combine_to_mad_fsub_0_f32(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in, i1 %is_aggressive) #1 {1048; SI-STD-LABEL: aggressive_combine_to_mad_fsub_0_f32:1049; SI-STD: ; %bb.0:1050; SI-STD-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xb1051; SI-STD-NEXT: s_load_dword s6, s[4:5], 0xd1052; SI-STD-NEXT: v_mov_b32_e32 v1, 01053; SI-STD-NEXT: s_mov_b32 s3, 0xf0001054; SI-STD-NEXT: s_mov_b32 s2, 01055; SI-STD-NEXT: v_lshlrev_b32_e32 v0, 2, v01056; SI-STD-NEXT: s_waitcnt lgkmcnt(0)1057; SI-STD-NEXT: buffer_load_dword v2, v[0:1], s[0:3], 0 addr64 glc1058; SI-STD-NEXT: s_waitcnt vmcnt(0)1059; SI-STD-NEXT: buffer_load_dword v3, v[0:1], s[0:3], 0 addr64 offset:4 glc1060; SI-STD-NEXT: s_waitcnt vmcnt(0)1061; SI-STD-NEXT: buffer_load_dword v5, v[0:1], s[0:3], 0 addr64 offset:8 glc1062; SI-STD-NEXT: s_waitcnt vmcnt(0)1063; SI-STD-NEXT: buffer_load_dword v6, v[0:1], s[0:3], 0 addr64 offset:12 glc1064; SI-STD-NEXT: s_waitcnt vmcnt(0)1065; SI-STD-NEXT: buffer_load_dword v1, v[0:1], s[0:3], 0 addr64 offset:16 glc1066; SI-STD-NEXT: s_waitcnt vmcnt(0)1067; SI-STD-NEXT: s_bitcmp1_b32 s6, 01068; SI-STD-NEXT: s_cselect_b64 s[0:1], -1, 01069; SI-STD-NEXT: s_and_b64 vcc, exec, s[0:1]1070; SI-STD-NEXT: s_cbranch_vccnz .LBB12_21071; SI-STD-NEXT: ; %bb.1: ; %normal1072; SI-STD-NEXT: v_mul_f32_e32 v4, v6, v11073; SI-STD-NEXT: v_fma_f32 v4, v2, v3, v41074; SI-STD-NEXT: v_sub_f32_e32 v4, v4, v51075; SI-STD-NEXT: s_mov_b64 s[2:3], 01076; SI-STD-NEXT: s_branch .LBB12_31077; SI-STD-NEXT: .LBB12_2:1078; SI-STD-NEXT: s_mov_b64 s[2:3], -11079; SI-STD-NEXT: ; implicit-def: $vgpr41080; SI-STD-NEXT: .LBB12_3: ; %Flow1081; SI-STD-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91082; SI-STD-NEXT: s_andn2_b64 vcc, exec, s[2:3]1083; SI-STD-NEXT: s_waitcnt lgkmcnt(0)1084; SI-STD-NEXT: s_mov_b64 vcc, vcc1085; SI-STD-NEXT: s_cbranch_vccnz .LBB12_51086; SI-STD-NEXT: ; %bb.4: ; %aggressive1087; SI-STD-NEXT: v_mad_f32 v4, v6, v1, -v51088; SI-STD-NEXT: v_mac_f32_e32 v4, v2, v31089; SI-STD-NEXT: .LBB12_5: ; %exit1090; SI-STD-NEXT: s_mov_b32 s3, 0xf0001091; SI-STD-NEXT: s_mov_b32 s2, 01092; SI-STD-NEXT: v_mov_b32_e32 v1, 01093; SI-STD-NEXT: buffer_store_dword v4, v[0:1], s[0:3], 0 addr641094; SI-STD-NEXT: s_endpgm1095;1096; SI-DENORM-FASTFMAF-LABEL: aggressive_combine_to_mad_fsub_0_f32:1097; SI-DENORM-FASTFMAF: ; %bb.0:1098; SI-DENORM-FASTFMAF-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xb1099; SI-DENORM-FASTFMAF-NEXT: s_load_dword s6, s[4:5], 0xd1100; SI-DENORM-FASTFMAF-NEXT: v_mov_b32_e32 v1, 01101; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s3, 0xf0001102; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s2, 01103; SI-DENORM-FASTFMAF-NEXT: v_lshlrev_b32_e32 v0, 2, v01104; SI-DENORM-FASTFMAF-NEXT: s_waitcnt lgkmcnt(0)1105; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v2, v[0:1], s[0:3], 0 addr64 glc1106; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)1107; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v3, v[0:1], s[0:3], 0 addr64 offset:4 glc1108; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)1109; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v4, v[0:1], s[0:3], 0 addr64 offset:8 glc1110; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)1111; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v5, v[0:1], s[0:3], 0 addr64 offset:12 glc1112; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)1113; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v1, v[0:1], s[0:3], 0 addr64 offset:16 glc1114; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)1115; SI-DENORM-FASTFMAF-NEXT: s_bitcmp1_b32 s6, 01116; SI-DENORM-FASTFMAF-NEXT: s_cselect_b64 s[0:1], -1, 01117; SI-DENORM-FASTFMAF-NEXT: s_and_b64 vcc, exec, s[0:1]1118; SI-DENORM-FASTFMAF-NEXT: s_cbranch_vccnz .LBB12_21119; SI-DENORM-FASTFMAF-NEXT: ; %bb.1: ; %normal1120; SI-DENORM-FASTFMAF-NEXT: v_mul_f32_e32 v6, v5, v11121; SI-DENORM-FASTFMAF-NEXT: v_fma_f32 v6, v2, v3, v61122; SI-DENORM-FASTFMAF-NEXT: v_sub_f32_e32 v6, v6, v41123; SI-DENORM-FASTFMAF-NEXT: s_mov_b64 s[2:3], 01124; SI-DENORM-FASTFMAF-NEXT: s_branch .LBB12_31125; SI-DENORM-FASTFMAF-NEXT: .LBB12_2:1126; SI-DENORM-FASTFMAF-NEXT: s_mov_b64 s[2:3], -11127; SI-DENORM-FASTFMAF-NEXT: ; implicit-def: $vgpr61128; SI-DENORM-FASTFMAF-NEXT: .LBB12_3: ; %Flow1129; SI-DENORM-FASTFMAF-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91130; SI-DENORM-FASTFMAF-NEXT: s_andn2_b64 vcc, exec, s[2:3]1131; SI-DENORM-FASTFMAF-NEXT: s_waitcnt lgkmcnt(0)1132; SI-DENORM-FASTFMAF-NEXT: s_mov_b64 vcc, vcc1133; SI-DENORM-FASTFMAF-NEXT: s_cbranch_vccnz .LBB12_51134; SI-DENORM-FASTFMAF-NEXT: ; %bb.4: ; %aggressive1135; SI-DENORM-FASTFMAF-NEXT: v_fma_f32 v1, v5, v1, -v41136; SI-DENORM-FASTFMAF-NEXT: v_fma_f32 v6, v2, v3, v11137; SI-DENORM-FASTFMAF-NEXT: .LBB12_5: ; %exit1138; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s3, 0xf0001139; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s2, 01140; SI-DENORM-FASTFMAF-NEXT: v_mov_b32_e32 v1, 01141; SI-DENORM-FASTFMAF-NEXT: buffer_store_dword v6, v[0:1], s[0:3], 0 addr641142; SI-DENORM-FASTFMAF-NEXT: s_endpgm1143;1144; SI-DENORM-SLOWFMAF-LABEL: aggressive_combine_to_mad_fsub_0_f32:1145; SI-DENORM-SLOWFMAF: ; %bb.0:1146; SI-DENORM-SLOWFMAF-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xb1147; SI-DENORM-SLOWFMAF-NEXT: s_load_dword s6, s[4:5], 0xd1148; SI-DENORM-SLOWFMAF-NEXT: v_mov_b32_e32 v1, 01149; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s3, 0xf0001150; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s2, 01151; SI-DENORM-SLOWFMAF-NEXT: v_lshlrev_b32_e32 v0, 2, v01152; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt lgkmcnt(0)1153; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v3, v[0:1], s[0:3], 0 addr64 glc1154; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)1155; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v4, v[0:1], s[0:3], 0 addr64 offset:4 glc1156; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)1157; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v2, v[0:1], s[0:3], 0 addr64 offset:8 glc1158; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)1159; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v5, v[0:1], s[0:3], 0 addr64 offset:12 glc1160; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)1161; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v1, v[0:1], s[0:3], 0 addr64 offset:16 glc1162; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)1163; SI-DENORM-SLOWFMAF-NEXT: s_bitcmp1_b32 s6, 01164; SI-DENORM-SLOWFMAF-NEXT: s_cselect_b64 s[0:1], -1, 01165; SI-DENORM-SLOWFMAF-NEXT: s_and_b64 vcc, exec, s[0:1]1166; SI-DENORM-SLOWFMAF-NEXT: v_mul_f32_e32 v1, v5, v11167; SI-DENORM-SLOWFMAF-NEXT: v_fma_f32 v1, v3, v4, v11168; SI-DENORM-SLOWFMAF-NEXT: s_cbranch_vccnz .LBB12_21169; SI-DENORM-SLOWFMAF-NEXT: ; %bb.1: ; %normal1170; SI-DENORM-SLOWFMAF-NEXT: v_sub_f32_e32 v3, v1, v21171; SI-DENORM-SLOWFMAF-NEXT: s_mov_b64 s[2:3], 01172; SI-DENORM-SLOWFMAF-NEXT: s_branch .LBB12_31173; SI-DENORM-SLOWFMAF-NEXT: .LBB12_2:1174; SI-DENORM-SLOWFMAF-NEXT: s_mov_b64 s[2:3], -11175; SI-DENORM-SLOWFMAF-NEXT: ; implicit-def: $vgpr31176; SI-DENORM-SLOWFMAF-NEXT: .LBB12_3: ; %Flow1177; SI-DENORM-SLOWFMAF-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91178; SI-DENORM-SLOWFMAF-NEXT: s_andn2_b64 vcc, exec, s[2:3]1179; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt lgkmcnt(0)1180; SI-DENORM-SLOWFMAF-NEXT: s_mov_b64 vcc, vcc1181; SI-DENORM-SLOWFMAF-NEXT: s_cbranch_vccnz .LBB12_51182; SI-DENORM-SLOWFMAF-NEXT: ; %bb.4: ; %aggressive1183; SI-DENORM-SLOWFMAF-NEXT: v_sub_f32_e32 v3, v1, v21184; SI-DENORM-SLOWFMAF-NEXT: .LBB12_5: ; %exit1185; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s3, 0xf0001186; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s2, 01187; SI-DENORM-SLOWFMAF-NEXT: v_mov_b32_e32 v1, 01188; SI-DENORM-SLOWFMAF-NEXT: buffer_store_dword v3, v[0:1], s[0:3], 0 addr641189; SI-DENORM-SLOWFMAF-NEXT: s_endpgm1190 %tid = tail call i32 @llvm.amdgcn.workitem.id.x() #01191 %gep.0 = getelementptr float, ptr addrspace(1) %in, i32 %tid1192 %gep.1 = getelementptr float, ptr addrspace(1) %gep.0, i32 11193 %gep.2 = getelementptr float, ptr addrspace(1) %gep.0, i32 21194 %gep.3 = getelementptr float, ptr addrspace(1) %gep.0, i32 31195 %gep.4 = getelementptr float, ptr addrspace(1) %gep.0, i32 41196 %gep.out = getelementptr float, ptr addrspace(1) %out, i32 %tid1197 1198 %x = load volatile float, ptr addrspace(1) %gep.01199 %y = load volatile float, ptr addrspace(1) %gep.11200 %z = load volatile float, ptr addrspace(1) %gep.21201 %u = load volatile float, ptr addrspace(1) %gep.31202 %v = load volatile float, ptr addrspace(1) %gep.41203 1204 br i1 %is_aggressive, label %aggressive, label %normal1205 1206normal:1207 %tmp0_normal = fmul float %u, %v1208 %tmp1_normal = call float @llvm.fma.f32(float %x, float %y, float %tmp0_normal) #01209 %tmp2_normal = fsub float %tmp1_normal, %z1210 br label %exit1211 1212aggressive:1213 %tmp0_aggressive = fmul contract reassoc float %u, %v1214 %tmp1_aggressive = call contract reassoc float @llvm.fma.f32(float %x, float %y, float %tmp0_aggressive) #01215 %tmp2_aggressive = fsub contract reassoc float %tmp1_aggressive, %z1216 br label %exit1217 1218exit:1219 %tmp2 = phi float [%tmp2_normal, %normal], [%tmp2_aggressive, %aggressive]1220 store float %tmp2, ptr addrspace(1) %gep.out1221 ret void1222}1223 1224; fold (fsub x, (fma y, z, (fmul u, v)))1225; -> (fma (fneg y), z, (fma (fneg u), v, x))1226define amdgpu_kernel void @aggressive_combine_to_mad_fsub_1_f32(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) #1 {1227; SI-LABEL: aggressive_combine_to_mad_fsub_1_f32:1228; SI: ; %bb.0:1229; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91230; SI-NEXT: s_mov_b32 s7, 0xf0001231; SI-NEXT: s_mov_b32 s6, 01232; SI-NEXT: v_lshlrev_b32_e32 v0, 2, v01233; SI-NEXT: v_mov_b32_e32 v1, 01234; SI-NEXT: s_waitcnt lgkmcnt(0)1235; SI-NEXT: s_mov_b64 s[4:5], s[2:3]1236; SI-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 glc1237; SI-NEXT: s_waitcnt vmcnt(0)1238; SI-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 offset:4 glc1239; SI-NEXT: s_waitcnt vmcnt(0)1240; SI-NEXT: buffer_load_dword v4, v[0:1], s[4:7], 0 addr64 offset:8 glc1241; SI-NEXT: s_waitcnt vmcnt(0)1242; SI-NEXT: buffer_load_dword v5, v[0:1], s[4:7], 0 addr64 offset:12 glc1243; SI-NEXT: s_waitcnt vmcnt(0)1244; SI-NEXT: buffer_load_dword v6, v[0:1], s[4:7], 0 addr64 offset:16 glc1245; SI-NEXT: s_waitcnt vmcnt(0)1246; SI-NEXT: s_mov_b64 s[2:3], s[6:7]1247; SI-NEXT: v_mul_f32_e32 v5, v5, v61248; SI-NEXT: v_fma_f32 v3, v3, v4, v51249; SI-NEXT: v_sub_f32_e32 v2, v2, v31250; SI-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr641251; SI-NEXT: s_endpgm1252 %tid = tail call i32 @llvm.amdgcn.workitem.id.x() #01253 %gep.0 = getelementptr float, ptr addrspace(1) %in, i32 %tid1254 %gep.1 = getelementptr float, ptr addrspace(1) %gep.0, i32 11255 %gep.2 = getelementptr float, ptr addrspace(1) %gep.0, i32 21256 %gep.3 = getelementptr float, ptr addrspace(1) %gep.0, i32 31257 %gep.4 = getelementptr float, ptr addrspace(1) %gep.0, i32 41258 %gep.out = getelementptr float, ptr addrspace(1) %out, i32 %tid1259 1260 %x = load volatile float, ptr addrspace(1) %gep.01261 %y = load volatile float, ptr addrspace(1) %gep.11262 %z = load volatile float, ptr addrspace(1) %gep.21263 %u = load volatile float, ptr addrspace(1) %gep.31264 %v = load volatile float, ptr addrspace(1) %gep.41265 1266 %tmp0 = fmul float %u, %v1267 %tmp1 = call float @llvm.fma.f32(float %y, float %z, float %tmp0) #01268 %tmp2 = fsub float %x, %tmp11269 1270 store float %tmp2, ptr addrspace(1) %gep.out1271 ret void1272}1273 1274; fold (fsub (fma x, y, (fmul u, v)), z) -> (fma x, y (fma u, v, (fneg z)))1275define amdgpu_kernel void @aggressive_combine_to_mad_fsub_2_f32(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in, i1 %is_aggressive) #1 {1276; SI-STD-LABEL: aggressive_combine_to_mad_fsub_2_f32:1277; SI-STD: ; %bb.0:1278; SI-STD-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xb1279; SI-STD-NEXT: s_load_dword s6, s[4:5], 0xd1280; SI-STD-NEXT: v_mov_b32_e32 v1, 01281; SI-STD-NEXT: s_mov_b32 s3, 0xf0001282; SI-STD-NEXT: s_mov_b32 s2, 01283; SI-STD-NEXT: v_lshlrev_b32_e32 v0, 2, v01284; SI-STD-NEXT: s_waitcnt lgkmcnt(0)1285; SI-STD-NEXT: buffer_load_dword v2, v[0:1], s[0:3], 0 addr64 glc1286; SI-STD-NEXT: s_waitcnt vmcnt(0)1287; SI-STD-NEXT: buffer_load_dword v3, v[0:1], s[0:3], 0 addr64 offset:4 glc1288; SI-STD-NEXT: s_waitcnt vmcnt(0)1289; SI-STD-NEXT: buffer_load_dword v4, v[0:1], s[0:3], 0 addr64 offset:8 glc1290; SI-STD-NEXT: s_waitcnt vmcnt(0)1291; SI-STD-NEXT: buffer_load_dword v6, v[0:1], s[0:3], 0 addr64 offset:12 glc1292; SI-STD-NEXT: s_waitcnt vmcnt(0)1293; SI-STD-NEXT: buffer_load_dword v1, v[0:1], s[0:3], 0 addr64 offset:16 glc1294; SI-STD-NEXT: s_waitcnt vmcnt(0)1295; SI-STD-NEXT: s_bitcmp1_b32 s6, 01296; SI-STD-NEXT: s_cselect_b64 s[0:1], -1, 01297; SI-STD-NEXT: s_and_b64 vcc, exec, s[0:1]1298; SI-STD-NEXT: s_cbranch_vccnz .LBB14_21299; SI-STD-NEXT: ; %bb.1: ; %normal1300; SI-STD-NEXT: v_mul_f32_e32 v5, v6, v11301; SI-STD-NEXT: v_mac_f32_e32 v5, v2, v31302; SI-STD-NEXT: v_sub_f32_e32 v5, v5, v41303; SI-STD-NEXT: s_mov_b64 s[2:3], 01304; SI-STD-NEXT: s_branch .LBB14_31305; SI-STD-NEXT: .LBB14_2:1306; SI-STD-NEXT: s_mov_b64 s[2:3], -11307; SI-STD-NEXT: ; implicit-def: $vgpr51308; SI-STD-NEXT: .LBB14_3: ; %Flow1309; SI-STD-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91310; SI-STD-NEXT: s_andn2_b64 vcc, exec, s[2:3]1311; SI-STD-NEXT: s_waitcnt lgkmcnt(0)1312; SI-STD-NEXT: s_mov_b64 vcc, vcc1313; SI-STD-NEXT: s_cbranch_vccnz .LBB14_51314; SI-STD-NEXT: ; %bb.4: ; %aggressive1315; SI-STD-NEXT: v_mad_f32 v5, v6, v1, -v41316; SI-STD-NEXT: v_mac_f32_e32 v5, v2, v31317; SI-STD-NEXT: .LBB14_5: ; %exit1318; SI-STD-NEXT: s_mov_b32 s3, 0xf0001319; SI-STD-NEXT: s_mov_b32 s2, 01320; SI-STD-NEXT: v_mov_b32_e32 v1, 01321; SI-STD-NEXT: buffer_store_dword v5, v[0:1], s[0:3], 0 addr641322; SI-STD-NEXT: s_endpgm1323;1324; SI-DENORM-FASTFMAF-LABEL: aggressive_combine_to_mad_fsub_2_f32:1325; SI-DENORM-FASTFMAF: ; %bb.0:1326; SI-DENORM-FASTFMAF-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xb1327; SI-DENORM-FASTFMAF-NEXT: s_load_dword s6, s[4:5], 0xd1328; SI-DENORM-FASTFMAF-NEXT: v_mov_b32_e32 v1, 01329; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s3, 0xf0001330; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s2, 01331; SI-DENORM-FASTFMAF-NEXT: v_lshlrev_b32_e32 v0, 2, v01332; SI-DENORM-FASTFMAF-NEXT: s_waitcnt lgkmcnt(0)1333; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v2, v[0:1], s[0:3], 0 addr64 glc1334; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)1335; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v3, v[0:1], s[0:3], 0 addr64 offset:4 glc1336; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)1337; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v4, v[0:1], s[0:3], 0 addr64 offset:8 glc1338; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)1339; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v5, v[0:1], s[0:3], 0 addr64 offset:12 glc1340; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)1341; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v1, v[0:1], s[0:3], 0 addr64 offset:16 glc1342; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)1343; SI-DENORM-FASTFMAF-NEXT: s_bitcmp1_b32 s6, 01344; SI-DENORM-FASTFMAF-NEXT: s_cselect_b64 s[0:1], -1, 01345; SI-DENORM-FASTFMAF-NEXT: s_and_b64 vcc, exec, s[0:1]1346; SI-DENORM-FASTFMAF-NEXT: s_cbranch_vccnz .LBB14_21347; SI-DENORM-FASTFMAF-NEXT: ; %bb.1: ; %normal1348; SI-DENORM-FASTFMAF-NEXT: v_mul_f32_e32 v6, v5, v11349; SI-DENORM-FASTFMAF-NEXT: v_fma_f32 v6, v2, v3, v61350; SI-DENORM-FASTFMAF-NEXT: v_sub_f32_e32 v6, v6, v41351; SI-DENORM-FASTFMAF-NEXT: s_mov_b64 s[2:3], 01352; SI-DENORM-FASTFMAF-NEXT: s_branch .LBB14_31353; SI-DENORM-FASTFMAF-NEXT: .LBB14_2:1354; SI-DENORM-FASTFMAF-NEXT: s_mov_b64 s[2:3], -11355; SI-DENORM-FASTFMAF-NEXT: ; implicit-def: $vgpr61356; SI-DENORM-FASTFMAF-NEXT: .LBB14_3: ; %Flow1357; SI-DENORM-FASTFMAF-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91358; SI-DENORM-FASTFMAF-NEXT: s_andn2_b64 vcc, exec, s[2:3]1359; SI-DENORM-FASTFMAF-NEXT: s_waitcnt lgkmcnt(0)1360; SI-DENORM-FASTFMAF-NEXT: s_mov_b64 vcc, vcc1361; SI-DENORM-FASTFMAF-NEXT: s_cbranch_vccnz .LBB14_51362; SI-DENORM-FASTFMAF-NEXT: ; %bb.4: ; %aggressive1363; SI-DENORM-FASTFMAF-NEXT: v_fma_f32 v1, v5, v1, -v41364; SI-DENORM-FASTFMAF-NEXT: v_fma_f32 v6, v2, v3, v11365; SI-DENORM-FASTFMAF-NEXT: .LBB14_5: ; %exit1366; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s3, 0xf0001367; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s2, 01368; SI-DENORM-FASTFMAF-NEXT: v_mov_b32_e32 v1, 01369; SI-DENORM-FASTFMAF-NEXT: buffer_store_dword v6, v[0:1], s[0:3], 0 addr641370; SI-DENORM-FASTFMAF-NEXT: s_endpgm1371;1372; SI-DENORM-SLOWFMAF-LABEL: aggressive_combine_to_mad_fsub_2_f32:1373; SI-DENORM-SLOWFMAF: ; %bb.0:1374; SI-DENORM-SLOWFMAF-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xb1375; SI-DENORM-SLOWFMAF-NEXT: s_load_dword s6, s[4:5], 0xd1376; SI-DENORM-SLOWFMAF-NEXT: v_mov_b32_e32 v1, 01377; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s3, 0xf0001378; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s2, 01379; SI-DENORM-SLOWFMAF-NEXT: v_lshlrev_b32_e32 v0, 2, v01380; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt lgkmcnt(0)1381; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v3, v[0:1], s[0:3], 0 addr64 glc1382; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)1383; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v4, v[0:1], s[0:3], 0 addr64 offset:4 glc1384; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)1385; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v2, v[0:1], s[0:3], 0 addr64 offset:8 glc1386; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)1387; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v5, v[0:1], s[0:3], 0 addr64 offset:12 glc1388; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)1389; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v1, v[0:1], s[0:3], 0 addr64 offset:16 glc1390; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)1391; SI-DENORM-SLOWFMAF-NEXT: s_bitcmp1_b32 s6, 01392; SI-DENORM-SLOWFMAF-NEXT: s_cselect_b64 s[0:1], -1, 01393; SI-DENORM-SLOWFMAF-NEXT: s_and_b64 vcc, exec, s[0:1]1394; SI-DENORM-SLOWFMAF-NEXT: v_mul_f32_e32 v3, v3, v41395; SI-DENORM-SLOWFMAF-NEXT: v_mul_f32_e32 v1, v5, v11396; SI-DENORM-SLOWFMAF-NEXT: v_add_f32_e32 v1, v3, v11397; SI-DENORM-SLOWFMAF-NEXT: s_cbranch_vccnz .LBB14_21398; SI-DENORM-SLOWFMAF-NEXT: ; %bb.1: ; %normal1399; SI-DENORM-SLOWFMAF-NEXT: v_sub_f32_e32 v3, v1, v21400; SI-DENORM-SLOWFMAF-NEXT: s_mov_b64 s[2:3], 01401; SI-DENORM-SLOWFMAF-NEXT: s_branch .LBB14_31402; SI-DENORM-SLOWFMAF-NEXT: .LBB14_2:1403; SI-DENORM-SLOWFMAF-NEXT: s_mov_b64 s[2:3], -11404; SI-DENORM-SLOWFMAF-NEXT: ; implicit-def: $vgpr31405; SI-DENORM-SLOWFMAF-NEXT: .LBB14_3: ; %Flow1406; SI-DENORM-SLOWFMAF-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91407; SI-DENORM-SLOWFMAF-NEXT: s_andn2_b64 vcc, exec, s[2:3]1408; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt lgkmcnt(0)1409; SI-DENORM-SLOWFMAF-NEXT: s_mov_b64 vcc, vcc1410; SI-DENORM-SLOWFMAF-NEXT: s_cbranch_vccnz .LBB14_51411; SI-DENORM-SLOWFMAF-NEXT: ; %bb.4: ; %aggressive1412; SI-DENORM-SLOWFMAF-NEXT: v_sub_f32_e32 v3, v1, v21413; SI-DENORM-SLOWFMAF-NEXT: .LBB14_5: ; %exit1414; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s3, 0xf0001415; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s2, 01416; SI-DENORM-SLOWFMAF-NEXT: v_mov_b32_e32 v1, 01417; SI-DENORM-SLOWFMAF-NEXT: buffer_store_dword v3, v[0:1], s[0:3], 0 addr641418; SI-DENORM-SLOWFMAF-NEXT: s_endpgm1419 %tid = tail call i32 @llvm.amdgcn.workitem.id.x() #01420 %gep.0 = getelementptr float, ptr addrspace(1) %in, i32 %tid1421 %gep.1 = getelementptr float, ptr addrspace(1) %gep.0, i32 11422 %gep.2 = getelementptr float, ptr addrspace(1) %gep.0, i32 21423 %gep.3 = getelementptr float, ptr addrspace(1) %gep.0, i32 31424 %gep.4 = getelementptr float, ptr addrspace(1) %gep.0, i32 41425 %gep.out = getelementptr float, ptr addrspace(1) %out, i32 %tid1426 1427 %x = load volatile float, ptr addrspace(1) %gep.01428 %y = load volatile float, ptr addrspace(1) %gep.11429 %z = load volatile float, ptr addrspace(1) %gep.21430 %u = load volatile float, ptr addrspace(1) %gep.31431 %v = load volatile float, ptr addrspace(1) %gep.41432 1433 br i1 %is_aggressive, label %aggressive, label %normal1434 1435normal:1436 %tmp0_normal = fmul float %u, %v1437 %tmp1_normal = call float @llvm.fmuladd.f32(float %x, float %y, float %tmp0_normal) #01438 %tmp2_normal = fsub float %tmp1_normal, %z1439 br label %exit1440 1441aggressive:1442 %tmp0_aggressive = fmul contract reassoc float %u, %v1443 %tmp1_aggressive = call contract reassoc float @llvm.fmuladd.f32(float %x, float %y, float %tmp0_aggressive) #01444 %tmp2_aggressive = fsub contract reassoc float %tmp1_aggressive, %z1445 br label %exit1446 1447exit:1448 %tmp2 = phi float [%tmp2_normal, %normal], [%tmp2_aggressive, %aggressive]1449 store float %tmp2, ptr addrspace(1) %gep.out1450 ret void1451}1452 1453; fold (fsub x, (fmuladd y, z, (fmul u, v)))1454; -> (fmuladd (fneg y), z, (fmuladd (fneg u), v, x))1455define amdgpu_kernel void @aggressive_combine_to_mad_fsub_3_f32(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in, i1 %is_aggressive) #1 {1456; SI-STD-LABEL: aggressive_combine_to_mad_fsub_3_f32:1457; SI-STD: ; %bb.0:1458; SI-STD-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xb1459; SI-STD-NEXT: s_load_dword s6, s[4:5], 0xd1460; SI-STD-NEXT: v_mov_b32_e32 v1, 01461; SI-STD-NEXT: s_mov_b32 s3, 0xf0001462; SI-STD-NEXT: s_mov_b32 s2, 01463; SI-STD-NEXT: v_lshlrev_b32_e32 v0, 2, v01464; SI-STD-NEXT: s_waitcnt lgkmcnt(0)1465; SI-STD-NEXT: buffer_load_dword v2, v[0:1], s[0:3], 0 addr64 glc1466; SI-STD-NEXT: s_waitcnt vmcnt(0)1467; SI-STD-NEXT: buffer_load_dword v3, v[0:1], s[0:3], 0 addr64 offset:4 glc1468; SI-STD-NEXT: s_waitcnt vmcnt(0)1469; SI-STD-NEXT: buffer_load_dword v4, v[0:1], s[0:3], 0 addr64 offset:8 glc1470; SI-STD-NEXT: s_waitcnt vmcnt(0)1471; SI-STD-NEXT: buffer_load_dword v5, v[0:1], s[0:3], 0 addr64 offset:12 glc1472; SI-STD-NEXT: s_waitcnt vmcnt(0)1473; SI-STD-NEXT: buffer_load_dword v1, v[0:1], s[0:3], 0 addr64 offset:16 glc1474; SI-STD-NEXT: s_waitcnt vmcnt(0)1475; SI-STD-NEXT: s_bitcmp1_b32 s6, 01476; SI-STD-NEXT: s_cselect_b64 s[0:1], -1, 01477; SI-STD-NEXT: s_and_b64 vcc, exec, s[0:1]1478; SI-STD-NEXT: s_cbranch_vccnz .LBB15_21479; SI-STD-NEXT: ; %bb.1: ; %normal1480; SI-STD-NEXT: v_mul_f32_e32 v6, v5, v11481; SI-STD-NEXT: v_mac_f32_e32 v6, v3, v41482; SI-STD-NEXT: v_sub_f32_e32 v6, v2, v61483; SI-STD-NEXT: s_mov_b64 s[2:3], 01484; SI-STD-NEXT: s_branch .LBB15_31485; SI-STD-NEXT: .LBB15_2:1486; SI-STD-NEXT: s_mov_b64 s[2:3], -11487; SI-STD-NEXT: ; implicit-def: $vgpr61488; SI-STD-NEXT: .LBB15_3: ; %Flow1489; SI-STD-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91490; SI-STD-NEXT: s_andn2_b64 vcc, exec, s[2:3]1491; SI-STD-NEXT: s_waitcnt lgkmcnt(0)1492; SI-STD-NEXT: s_mov_b64 vcc, vcc1493; SI-STD-NEXT: s_cbranch_vccnz .LBB15_51494; SI-STD-NEXT: ; %bb.4: ; %aggressive1495; SI-STD-NEXT: v_mad_f32 v1, -v5, v1, v21496; SI-STD-NEXT: v_mad_f32 v6, -v3, v4, v11497; SI-STD-NEXT: .LBB15_5: ; %exit1498; SI-STD-NEXT: s_mov_b32 s3, 0xf0001499; SI-STD-NEXT: s_mov_b32 s2, 01500; SI-STD-NEXT: v_mov_b32_e32 v1, 01501; SI-STD-NEXT: buffer_store_dword v6, v[0:1], s[0:3], 0 addr641502; SI-STD-NEXT: s_endpgm1503;1504; SI-DENORM-FASTFMAF-LABEL: aggressive_combine_to_mad_fsub_3_f32:1505; SI-DENORM-FASTFMAF: ; %bb.0:1506; SI-DENORM-FASTFMAF-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xb1507; SI-DENORM-FASTFMAF-NEXT: s_load_dword s6, s[4:5], 0xd1508; SI-DENORM-FASTFMAF-NEXT: v_mov_b32_e32 v1, 01509; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s3, 0xf0001510; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s2, 01511; SI-DENORM-FASTFMAF-NEXT: v_lshlrev_b32_e32 v0, 2, v01512; SI-DENORM-FASTFMAF-NEXT: s_waitcnt lgkmcnt(0)1513; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v2, v[0:1], s[0:3], 0 addr64 glc1514; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)1515; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v3, v[0:1], s[0:3], 0 addr64 offset:4 glc1516; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)1517; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v4, v[0:1], s[0:3], 0 addr64 offset:8 glc1518; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)1519; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v5, v[0:1], s[0:3], 0 addr64 offset:12 glc1520; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)1521; SI-DENORM-FASTFMAF-NEXT: buffer_load_dword v1, v[0:1], s[0:3], 0 addr64 offset:16 glc1522; SI-DENORM-FASTFMAF-NEXT: s_waitcnt vmcnt(0)1523; SI-DENORM-FASTFMAF-NEXT: s_bitcmp1_b32 s6, 01524; SI-DENORM-FASTFMAF-NEXT: s_cselect_b64 s[0:1], -1, 01525; SI-DENORM-FASTFMAF-NEXT: s_and_b64 vcc, exec, s[0:1]1526; SI-DENORM-FASTFMAF-NEXT: s_cbranch_vccnz .LBB15_21527; SI-DENORM-FASTFMAF-NEXT: ; %bb.1: ; %normal1528; SI-DENORM-FASTFMAF-NEXT: v_mul_f32_e32 v6, v5, v11529; SI-DENORM-FASTFMAF-NEXT: v_fma_f32 v6, v3, v4, v61530; SI-DENORM-FASTFMAF-NEXT: v_sub_f32_e32 v6, v2, v61531; SI-DENORM-FASTFMAF-NEXT: s_mov_b64 s[2:3], 01532; SI-DENORM-FASTFMAF-NEXT: s_branch .LBB15_31533; SI-DENORM-FASTFMAF-NEXT: .LBB15_2:1534; SI-DENORM-FASTFMAF-NEXT: s_mov_b64 s[2:3], -11535; SI-DENORM-FASTFMAF-NEXT: ; implicit-def: $vgpr61536; SI-DENORM-FASTFMAF-NEXT: .LBB15_3: ; %Flow1537; SI-DENORM-FASTFMAF-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91538; SI-DENORM-FASTFMAF-NEXT: s_andn2_b64 vcc, exec, s[2:3]1539; SI-DENORM-FASTFMAF-NEXT: s_waitcnt lgkmcnt(0)1540; SI-DENORM-FASTFMAF-NEXT: s_mov_b64 vcc, vcc1541; SI-DENORM-FASTFMAF-NEXT: s_cbranch_vccnz .LBB15_51542; SI-DENORM-FASTFMAF-NEXT: ; %bb.4: ; %aggressive1543; SI-DENORM-FASTFMAF-NEXT: v_fma_f32 v1, -v5, v1, v21544; SI-DENORM-FASTFMAF-NEXT: v_fma_f32 v6, -v3, v4, v11545; SI-DENORM-FASTFMAF-NEXT: .LBB15_5: ; %exit1546; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s3, 0xf0001547; SI-DENORM-FASTFMAF-NEXT: s_mov_b32 s2, 01548; SI-DENORM-FASTFMAF-NEXT: v_mov_b32_e32 v1, 01549; SI-DENORM-FASTFMAF-NEXT: buffer_store_dword v6, v[0:1], s[0:3], 0 addr641550; SI-DENORM-FASTFMAF-NEXT: s_endpgm1551;1552; SI-DENORM-SLOWFMAF-LABEL: aggressive_combine_to_mad_fsub_3_f32:1553; SI-DENORM-SLOWFMAF: ; %bb.0:1554; SI-DENORM-SLOWFMAF-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xb1555; SI-DENORM-SLOWFMAF-NEXT: s_load_dword s6, s[4:5], 0xd1556; SI-DENORM-SLOWFMAF-NEXT: v_mov_b32_e32 v1, 01557; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s3, 0xf0001558; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s2, 01559; SI-DENORM-SLOWFMAF-NEXT: v_lshlrev_b32_e32 v0, 2, v01560; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt lgkmcnt(0)1561; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v2, v[0:1], s[0:3], 0 addr64 glc1562; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)1563; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v3, v[0:1], s[0:3], 0 addr64 offset:4 glc1564; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)1565; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v4, v[0:1], s[0:3], 0 addr64 offset:8 glc1566; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)1567; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v5, v[0:1], s[0:3], 0 addr64 offset:12 glc1568; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)1569; SI-DENORM-SLOWFMAF-NEXT: buffer_load_dword v1, v[0:1], s[0:3], 0 addr64 offset:16 glc1570; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt vmcnt(0)1571; SI-DENORM-SLOWFMAF-NEXT: s_bitcmp1_b32 s6, 01572; SI-DENORM-SLOWFMAF-NEXT: s_cselect_b64 s[0:1], -1, 01573; SI-DENORM-SLOWFMAF-NEXT: s_and_b64 vcc, exec, s[0:1]1574; SI-DENORM-SLOWFMAF-NEXT: v_mul_f32_e32 v3, v3, v41575; SI-DENORM-SLOWFMAF-NEXT: v_mul_f32_e32 v1, v5, v11576; SI-DENORM-SLOWFMAF-NEXT: v_add_f32_e32 v1, v3, v11577; SI-DENORM-SLOWFMAF-NEXT: s_cbranch_vccnz .LBB15_21578; SI-DENORM-SLOWFMAF-NEXT: ; %bb.1: ; %normal1579; SI-DENORM-SLOWFMAF-NEXT: v_sub_f32_e32 v3, v2, v11580; SI-DENORM-SLOWFMAF-NEXT: s_mov_b64 s[2:3], 01581; SI-DENORM-SLOWFMAF-NEXT: s_branch .LBB15_31582; SI-DENORM-SLOWFMAF-NEXT: .LBB15_2:1583; SI-DENORM-SLOWFMAF-NEXT: s_mov_b64 s[2:3], -11584; SI-DENORM-SLOWFMAF-NEXT: ; implicit-def: $vgpr31585; SI-DENORM-SLOWFMAF-NEXT: .LBB15_3: ; %Flow1586; SI-DENORM-SLOWFMAF-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91587; SI-DENORM-SLOWFMAF-NEXT: s_andn2_b64 vcc, exec, s[2:3]1588; SI-DENORM-SLOWFMAF-NEXT: s_waitcnt lgkmcnt(0)1589; SI-DENORM-SLOWFMAF-NEXT: s_mov_b64 vcc, vcc1590; SI-DENORM-SLOWFMAF-NEXT: s_cbranch_vccnz .LBB15_51591; SI-DENORM-SLOWFMAF-NEXT: ; %bb.4: ; %aggressive1592; SI-DENORM-SLOWFMAF-NEXT: v_sub_f32_e32 v3, v2, v11593; SI-DENORM-SLOWFMAF-NEXT: .LBB15_5: ; %exit1594; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s3, 0xf0001595; SI-DENORM-SLOWFMAF-NEXT: s_mov_b32 s2, 01596; SI-DENORM-SLOWFMAF-NEXT: v_mov_b32_e32 v1, 01597; SI-DENORM-SLOWFMAF-NEXT: buffer_store_dword v3, v[0:1], s[0:3], 0 addr641598; SI-DENORM-SLOWFMAF-NEXT: s_endpgm1599 %tid = tail call i32 @llvm.amdgcn.workitem.id.x() #01600 %gep.0 = getelementptr float, ptr addrspace(1) %in, i32 %tid1601 %gep.1 = getelementptr float, ptr addrspace(1) %gep.0, i32 11602 %gep.2 = getelementptr float, ptr addrspace(1) %gep.0, i32 21603 %gep.3 = getelementptr float, ptr addrspace(1) %gep.0, i32 31604 %gep.4 = getelementptr float, ptr addrspace(1) %gep.0, i32 41605 %gep.out = getelementptr float, ptr addrspace(1) %out, i32 %tid1606 1607 %x = load volatile float, ptr addrspace(1) %gep.01608 %y = load volatile float, ptr addrspace(1) %gep.11609 %z = load volatile float, ptr addrspace(1) %gep.21610 %u = load volatile float, ptr addrspace(1) %gep.31611 %v = load volatile float, ptr addrspace(1) %gep.41612 1613 br i1 %is_aggressive, label %aggressive, label %normal1614 1615normal:1616 ; nsz flag is needed since this combine may change sign of zero1617 %tmp0_normal = fmul nsz float %u, %v1618 %tmp1_normal = call nsz float @llvm.fmuladd.f32(float %y, float %z, float %tmp0_normal) #01619 %tmp2_normal = fsub nsz float %x, %tmp1_normal1620 br label %exit1621 1622aggressive:1623 %tmp0_aggressive = fmul contract reassoc nsz float %u, %v1624 %tmp1_aggressive = call contract reassoc nsz float @llvm.fmuladd.f32(float %y, float %z, float %tmp0_aggressive) #01625 %tmp2_aggressive = fsub contract reassoc nsz float %x, %tmp1_aggressive1626 br label %exit1627 1628exit:1629 %tmp2 = phi float [%tmp2_normal, %normal], [%tmp2_aggressive, %aggressive]1630 store float %tmp2, ptr addrspace(1) %gep.out1631 ret void1632}1633 1634attributes #0 = { nounwind readnone }1635attributes #1 = { nounwind }1636