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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX1100,SDAG-GFX1100-TRUE16 %s3; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX1100,SDAG-GFX1100-FAKE16 %s4; RUN: llc -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefixes=GFX900,SDAG-GFX900 %s5; RUN: llc -mtriple=amdgcn -mcpu=gfx906 < %s | FileCheck -check-prefixes=GFX906,SDAG-GFX906 %s6; RUN: llc -mtriple=amdgcn -mcpu=fiji < %s | FileCheck -check-prefixes=VI,SDAG-VI %s7; RUN: llc -mtriple=amdgcn -mcpu=hawaii < %s | FileCheck -check-prefixes=SDAG-CI %s8 9; FIXME-TRUE16. enable gisel10; XUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX1100,GISEL-GFX1100,GISEL-GFX1100-TRUE16 %s11; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX1100,GISEL-GFX1100,GISEL-GFX1100-FAKE16 %s12; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefixes=GFX900,GISEL-GFX900 %s13; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx906 < %s | FileCheck -check-prefixes=GFX906,GISEL-GFX906 %s14; RUN: llc -global-isel -mtriple=amdgcn -mcpu=fiji < %s | FileCheck -check-prefixes=VI,GISEL-VI %s15; RUN: llc -global-isel -mtriple=amdgcn -mcpu=hawaii < %s | FileCheck -check-prefixes=GISEL-CI %s16 17define half @mixlo_simple(float %src0, float %src1, float %src2) #0 {18; GFX1100-LABEL: mixlo_simple:19; GFX1100:       ; %bb.0:20; GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)21; GFX1100-NEXT:    v_fma_mixlo_f16 v0, v0, v1, v222; GFX1100-NEXT:    s_setpc_b64 s[30:31]23;24; GFX900-LABEL: mixlo_simple:25; GFX900:       ; %bb.0:26; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)27; GFX900-NEXT:    v_mad_mixlo_f16 v0, v0, v1, v228; GFX900-NEXT:    s_setpc_b64 s[30:31]29;30; GFX906-LABEL: mixlo_simple:31; GFX906:       ; %bb.0:32; GFX906-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)33; GFX906-NEXT:    v_fma_mixlo_f16 v0, v0, v1, v234; GFX906-NEXT:    s_setpc_b64 s[30:31]35;36; VI-LABEL: mixlo_simple:37; VI:       ; %bb.0:38; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)39; VI-NEXT:    v_mac_f32_e32 v2, v0, v140; VI-NEXT:    v_cvt_f16_f32_e32 v0, v241; VI-NEXT:    s_setpc_b64 s[30:31]42;43; SDAG-CI-LABEL: mixlo_simple:44; SDAG-CI:       ; %bb.0:45; SDAG-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)46; SDAG-CI-NEXT:    v_mac_f32_e32 v2, v0, v147; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v248; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v0, v049; SDAG-CI-NEXT:    s_setpc_b64 s[30:31]50;51; GISEL-CI-LABEL: mixlo_simple:52; GISEL-CI:       ; %bb.0:53; GISEL-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)54; GISEL-CI-NEXT:    v_mac_f32_e32 v2, v0, v155; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v0, v256; GISEL-CI-NEXT:    s_setpc_b64 s[30:31]57  %result = call float @llvm.fmuladd.f32(float %src0, float %src1, float %src2)58  %cvt.result = fptrunc float %result to half59  ret half %cvt.result60}61 62define half @mixlo_simpl_no_flush(float %src0, float %src1, float %src2) {63; GFX1100-LABEL: mixlo_simpl_no_flush:64; GFX1100:       ; %bb.0:65; GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)66; GFX1100-NEXT:    v_fma_mixlo_f16 v0, v0, v1, v267; GFX1100-NEXT:    s_setpc_b64 s[30:31]68;69; GFX900-LABEL: mixlo_simpl_no_flush:70; GFX900:       ; %bb.0:71; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)72; GFX900-NEXT:    v_fma_f32 v0, v0, v1, v273; GFX900-NEXT:    v_cvt_f16_f32_e32 v0, v074; GFX900-NEXT:    s_setpc_b64 s[30:31]75;76; GFX906-LABEL: mixlo_simpl_no_flush:77; GFX906:       ; %bb.0:78; GFX906-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)79; GFX906-NEXT:    v_fma_mixlo_f16 v0, v0, v1, v280; GFX906-NEXT:    s_setpc_b64 s[30:31]81;82; VI-LABEL: mixlo_simpl_no_flush:83; VI:       ; %bb.0:84; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)85; VI-NEXT:    v_mul_f32_e32 v0, v0, v186; VI-NEXT:    v_add_f32_e32 v0, v0, v287; VI-NEXT:    v_cvt_f16_f32_e32 v0, v088; VI-NEXT:    s_setpc_b64 s[30:31]89;90; SDAG-CI-LABEL: mixlo_simpl_no_flush:91; SDAG-CI:       ; %bb.0:92; SDAG-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)93; SDAG-CI-NEXT:    v_fma_f32 v0, v0, v1, v294; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v095; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v0, v096; SDAG-CI-NEXT:    s_setpc_b64 s[30:31]97;98; GISEL-CI-LABEL: mixlo_simpl_no_flush:99; GISEL-CI:       ; %bb.0:100; GISEL-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)101; GISEL-CI-NEXT:    v_fma_f32 v0, v0, v1, v2102; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v0, v0103; GISEL-CI-NEXT:    s_setpc_b64 s[30:31]104  %result = call float @llvm.fmuladd.f32(float %src0, float %src1, float %src2)105  %cvt.result = fptrunc float %result to half106  ret half %cvt.result107}108 109define half @v_mad_mixlo_f16_f16lo_f16lo_f16lo(half %src0, half %src1, half %src2) #0 {110; GFX1100-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f16lo:111; GFX1100:       ; %bb.0:112; GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)113; GFX1100-NEXT:    v_fma_mixlo_f16 v0, v0, v1, v2 op_sel_hi:[1,1,1]114; GFX1100-NEXT:    s_setpc_b64 s[30:31]115;116; GFX900-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f16lo:117; GFX900:       ; %bb.0:118; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)119; GFX900-NEXT:    v_mad_mixlo_f16 v0, v0, v1, v2 op_sel_hi:[1,1,1]120; GFX900-NEXT:    s_setpc_b64 s[30:31]121;122; GFX906-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f16lo:123; GFX906:       ; %bb.0:124; GFX906-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)125; GFX906-NEXT:    v_fma_mixlo_f16 v0, v0, v1, v2 op_sel_hi:[1,1,1]126; GFX906-NEXT:    s_setpc_b64 s[30:31]127;128; VI-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f16lo:129; VI:       ; %bb.0:130; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)131; VI-NEXT:    v_cvt_f32_f16_e32 v0, v0132; VI-NEXT:    v_cvt_f32_f16_e32 v1, v1133; VI-NEXT:    v_cvt_f32_f16_e32 v2, v2134; VI-NEXT:    v_mac_f32_e32 v2, v0, v1135; VI-NEXT:    v_cvt_f16_f32_e32 v0, v2136; VI-NEXT:    s_setpc_b64 s[30:31]137;138; SDAG-CI-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f16lo:139; SDAG-CI:       ; %bb.0:140; SDAG-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)141; SDAG-CI-NEXT:    v_mac_f32_e32 v2, v0, v1142; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v2143; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v0, v0144; SDAG-CI-NEXT:    s_setpc_b64 s[30:31]145;146; GISEL-CI-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f16lo:147; GISEL-CI:       ; %bb.0:148; GISEL-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)149; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v0, v0150; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v1, v1151; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v2, v2152; GISEL-CI-NEXT:    v_mac_f32_e32 v2, v0, v1153; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v0, v2154; GISEL-CI-NEXT:    s_setpc_b64 s[30:31]155  %src0.ext = fpext half %src0 to float156  %src1.ext = fpext half %src1 to float157  %src2.ext = fpext half %src2 to float158  %result = tail call float @llvm.fmuladd.f32(float %src0.ext, float %src1.ext, float %src2.ext)159  %cvt.result = fptrunc float %result to half160  ret half %cvt.result161}162 163define half @v_mad_mixlo_f16_f16lo_f16lo_f16lo_no_flush(half %src0, half %src1, half %src2) {164; GFX1100-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f16lo_no_flush:165; GFX1100:       ; %bb.0:166; GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)167; GFX1100-NEXT:    v_fma_mixlo_f16 v0, v0, v1, v2 op_sel_hi:[1,1,1]168; GFX1100-NEXT:    s_setpc_b64 s[30:31]169;170; GFX900-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f16lo_no_flush:171; GFX900:       ; %bb.0:172; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)173; GFX900-NEXT:    v_cvt_f32_f16_e32 v0, v0174; GFX900-NEXT:    v_cvt_f32_f16_e32 v1, v1175; GFX900-NEXT:    v_cvt_f32_f16_e32 v2, v2176; GFX900-NEXT:    v_fma_f32 v0, v0, v1, v2177; GFX900-NEXT:    v_cvt_f16_f32_e32 v0, v0178; GFX900-NEXT:    s_setpc_b64 s[30:31]179;180; GFX906-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f16lo_no_flush:181; GFX906:       ; %bb.0:182; GFX906-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)183; GFX906-NEXT:    v_fma_mixlo_f16 v0, v0, v1, v2 op_sel_hi:[1,1,1]184; GFX906-NEXT:    s_setpc_b64 s[30:31]185;186; VI-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f16lo_no_flush:187; VI:       ; %bb.0:188; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)189; VI-NEXT:    v_cvt_f32_f16_e32 v0, v0190; VI-NEXT:    v_cvt_f32_f16_e32 v1, v1191; VI-NEXT:    v_cvt_f32_f16_e32 v2, v2192; VI-NEXT:    v_mul_f32_e32 v0, v0, v1193; VI-NEXT:    v_add_f32_e32 v0, v0, v2194; VI-NEXT:    v_cvt_f16_f32_e32 v0, v0195; VI-NEXT:    s_setpc_b64 s[30:31]196;197; SDAG-CI-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f16lo_no_flush:198; SDAG-CI:       ; %bb.0:199; SDAG-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)200; SDAG-CI-NEXT:    v_fma_f32 v0, v0, v1, v2201; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v0202; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v0, v0203; SDAG-CI-NEXT:    s_setpc_b64 s[30:31]204;205; GISEL-CI-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f16lo_no_flush:206; GISEL-CI:       ; %bb.0:207; GISEL-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)208; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v0, v0209; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v1, v1210; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v2, v2211; GISEL-CI-NEXT:    v_fma_f32 v0, v0, v1, v2212; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v0, v0213; GISEL-CI-NEXT:    s_setpc_b64 s[30:31]214  %src0.ext = fpext half %src0 to float215  %src1.ext = fpext half %src1 to float216  %src2.ext = fpext half %src2 to float217  %result = tail call float @llvm.fmuladd.f32(float %src0.ext, float %src1.ext, float %src2.ext)218  %cvt.result = fptrunc float %result to half219  ret half %cvt.result220}221 222define half @v_mad_mixlo_f16_f16lo_f16lo_f32(half %src0, half %src1, float %src2) #0 {223; GFX1100-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f32:224; GFX1100:       ; %bb.0:225; GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)226; GFX1100-NEXT:    v_fma_mixlo_f16 v0, v0, v1, v2 op_sel_hi:[1,1,0]227; GFX1100-NEXT:    s_setpc_b64 s[30:31]228;229; GFX900-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f32:230; GFX900:       ; %bb.0:231; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)232; GFX900-NEXT:    v_mad_mixlo_f16 v0, v0, v1, v2 op_sel_hi:[1,1,0]233; GFX900-NEXT:    s_setpc_b64 s[30:31]234;235; GFX906-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f32:236; GFX906:       ; %bb.0:237; GFX906-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)238; GFX906-NEXT:    v_fma_mixlo_f16 v0, v0, v1, v2 op_sel_hi:[1,1,0]239; GFX906-NEXT:    s_setpc_b64 s[30:31]240;241; VI-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f32:242; VI:       ; %bb.0:243; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)244; VI-NEXT:    v_cvt_f32_f16_e32 v0, v0245; VI-NEXT:    v_cvt_f32_f16_e32 v1, v1246; VI-NEXT:    v_mac_f32_e32 v2, v0, v1247; VI-NEXT:    v_cvt_f16_f32_e32 v0, v2248; VI-NEXT:    s_setpc_b64 s[30:31]249;250; SDAG-CI-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f32:251; SDAG-CI:       ; %bb.0:252; SDAG-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)253; SDAG-CI-NEXT:    v_mac_f32_e32 v2, v0, v1254; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v2255; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v0, v0256; SDAG-CI-NEXT:    s_setpc_b64 s[30:31]257;258; GISEL-CI-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f32:259; GISEL-CI:       ; %bb.0:260; GISEL-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)261; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v0, v0262; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v1, v1263; GISEL-CI-NEXT:    v_mac_f32_e32 v2, v0, v1264; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v0, v2265; GISEL-CI-NEXT:    s_setpc_b64 s[30:31]266  %src0.ext = fpext half %src0 to float267  %src1.ext = fpext half %src1 to float268  %result = tail call float @llvm.fmuladd.f32(float %src0.ext, float %src1.ext, float %src2)269  %cvt.result = fptrunc float %result to half270  ret half %cvt.result271}272 273define half @v_mad_mixlo_f16_f16lo_f16lo_f32_clamp_post_cvt(half %src0, half %src1, float %src2) #0 {274; GFX1100-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f32_clamp_post_cvt:275; GFX1100:       ; %bb.0:276; GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)277; GFX1100-NEXT:    v_fma_mixlo_f16 v0, v0, v1, v2 op_sel_hi:[1,1,0] clamp278; GFX1100-NEXT:    s_setpc_b64 s[30:31]279;280; GFX900-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f32_clamp_post_cvt:281; GFX900:       ; %bb.0:282; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)283; GFX900-NEXT:    v_mad_mixlo_f16 v0, v0, v1, v2 op_sel_hi:[1,1,0] clamp284; GFX900-NEXT:    s_setpc_b64 s[30:31]285;286; GFX906-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f32_clamp_post_cvt:287; GFX906:       ; %bb.0:288; GFX906-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)289; GFX906-NEXT:    v_fma_mixlo_f16 v0, v0, v1, v2 op_sel_hi:[1,1,0] clamp290; GFX906-NEXT:    s_setpc_b64 s[30:31]291;292; VI-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f32_clamp_post_cvt:293; VI:       ; %bb.0:294; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)295; VI-NEXT:    v_cvt_f32_f16_e32 v0, v0296; VI-NEXT:    v_cvt_f32_f16_e32 v1, v1297; VI-NEXT:    v_mac_f32_e32 v2, v0, v1298; VI-NEXT:    v_cvt_f16_f32_e64 v0, v2 clamp299; VI-NEXT:    s_setpc_b64 s[30:31]300;301; SDAG-CI-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f32_clamp_post_cvt:302; SDAG-CI:       ; %bb.0:303; SDAG-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)304; SDAG-CI-NEXT:    v_mac_f32_e32 v2, v0, v1305; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v2306; SDAG-CI-NEXT:    v_cvt_f32_f16_e64 v0, v0 clamp307; SDAG-CI-NEXT:    s_setpc_b64 s[30:31]308;309; GISEL-CI-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f32_clamp_post_cvt:310; GISEL-CI:       ; %bb.0:311; GISEL-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)312; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v0, v0313; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v1, v1314; GISEL-CI-NEXT:    v_mac_f32_e32 v2, v0, v1315; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v0, v2316; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v0, v0317; GISEL-CI-NEXT:    v_max_f32_e32 v0, 0, v0318; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v0, v0319; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v0, v0320; GISEL-CI-NEXT:    v_min_f32_e32 v0, 1.0, v0321; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v0, v0322; GISEL-CI-NEXT:    s_setpc_b64 s[30:31]323  %src0.ext = fpext half %src0 to float324  %src1.ext = fpext half %src1 to float325  %result = tail call float @llvm.fmuladd.f32(float %src0.ext, float %src1.ext, float %src2)326  %cvt.result = fptrunc float %result to half327  %max = call half @llvm.maxnum.f16(half %cvt.result, half 0.0)328  %clamp = call half @llvm.minnum.f16(half %max, half 1.0)329  ret half %clamp330}331 332define half @v_mad_mixlo_f16_f16lo_f16lo_f32_clamp_pre_cvt(half %src0, half %src1, float %src2) #0 {333; SDAG-GFX1100-TRUE16-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f32_clamp_pre_cvt:334; SDAG-GFX1100-TRUE16:       ; %bb.0:335; SDAG-GFX1100-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)336; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0] clamp337; SDAG-GFX1100-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)338; SDAG-GFX1100-TRUE16-NEXT:    v_cvt_f16_f32_e32 v0.l, v0339; SDAG-GFX1100-TRUE16-NEXT:    s_setpc_b64 s[30:31]340;341; SDAG-GFX1100-FAKE16-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f32_clamp_pre_cvt:342; SDAG-GFX1100-FAKE16:       ; %bb.0:343; SDAG-GFX1100-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)344; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0] clamp345; SDAG-GFX1100-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)346; SDAG-GFX1100-FAKE16-NEXT:    v_cvt_f16_f32_e32 v0, v0347; SDAG-GFX1100-FAKE16-NEXT:    s_setpc_b64 s[30:31]348;349; GFX900-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f32_clamp_pre_cvt:350; GFX900:       ; %bb.0:351; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)352; GFX900-NEXT:    v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0] clamp353; GFX900-NEXT:    v_cvt_f16_f32_e32 v0, v0354; GFX900-NEXT:    s_setpc_b64 s[30:31]355;356; GFX906-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f32_clamp_pre_cvt:357; GFX906:       ; %bb.0:358; GFX906-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)359; GFX906-NEXT:    v_fma_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0] clamp360; GFX906-NEXT:    v_cvt_f16_f32_e32 v0, v0361; GFX906-NEXT:    s_setpc_b64 s[30:31]362;363; VI-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f32_clamp_pre_cvt:364; VI:       ; %bb.0:365; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)366; VI-NEXT:    v_cvt_f32_f16_e32 v0, v0367; VI-NEXT:    v_cvt_f32_f16_e32 v1, v1368; VI-NEXT:    v_mad_f32 v0, v0, v1, v2 clamp369; VI-NEXT:    v_cvt_f16_f32_e32 v0, v0370; VI-NEXT:    s_setpc_b64 s[30:31]371;372; SDAG-CI-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f32_clamp_pre_cvt:373; SDAG-CI:       ; %bb.0:374; SDAG-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)375; SDAG-CI-NEXT:    v_mad_f32 v0, v0, v1, v2 clamp376; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v0377; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v0, v0378; SDAG-CI-NEXT:    s_setpc_b64 s[30:31]379;380; GISEL-GFX1100-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f32_clamp_pre_cvt:381; GISEL-GFX1100:       ; %bb.0:382; GISEL-GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)383; GISEL-GFX1100-NEXT:    v_fma_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0] clamp384; GISEL-GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_1)385; GISEL-GFX1100-NEXT:    v_cvt_f16_f32_e32 v0, v0386; GISEL-GFX1100-NEXT:    s_setpc_b64 s[30:31]387;388; GISEL-CI-LABEL: v_mad_mixlo_f16_f16lo_f16lo_f32_clamp_pre_cvt:389; GISEL-CI:       ; %bb.0:390; GISEL-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)391; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v0, v0392; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v1, v1393; GISEL-CI-NEXT:    v_mad_f32 v0, v0, v1, v2 clamp394; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v0, v0395; GISEL-CI-NEXT:    s_setpc_b64 s[30:31]396  %src0.ext = fpext half %src0 to float397  %src1.ext = fpext half %src1 to float398  %result = tail call float @llvm.fmuladd.f32(float %src0.ext, float %src1.ext, float %src2)399  %max = call float @llvm.maxnum.f32(float %result, float 0.0)400  %clamp = call float @llvm.minnum.f32(float %max, float 1.0)401  %cvt.result = fptrunc float %clamp to half402  ret half %cvt.result403}404 405; FIXME(DAG): Should abe able to avoid extra register because first406; operation only clobbers relevant lane.407 408define <2 x half> @v_mad_mix_v2f32(<2 x half> %src0, <2 x half> %src1, <2 x half> %src2) #0 {409; SDAG-GFX1100-TRUE16-LABEL: v_mad_mix_v2f32:410; SDAG-GFX1100-TRUE16:       ; %bb.0:411; SDAG-GFX1100-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)412; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mixlo_f16 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]413; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mixlo_f16 v0, v0, v1, v2 op_sel_hi:[1,1,1]414; SDAG-GFX1100-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)415; SDAG-GFX1100-TRUE16-NEXT:    v_pack_b32_f16 v0, v0.l, v3.l416; SDAG-GFX1100-TRUE16-NEXT:    s_setpc_b64 s[30:31]417;418; SDAG-GFX1100-FAKE16-LABEL: v_mad_mix_v2f32:419; SDAG-GFX1100-FAKE16:       ; %bb.0:420; SDAG-GFX1100-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)421; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mixlo_f16 v3, v0, v1, v2 op_sel_hi:[1,1,1]422; SDAG-GFX1100-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)423; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mixhi_f16 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]424; SDAG-GFX1100-FAKE16-NEXT:    v_mov_b32_e32 v0, v3425; SDAG-GFX1100-FAKE16-NEXT:    s_setpc_b64 s[30:31]426;427; GFX900-LABEL: v_mad_mix_v2f32:428; GFX900:       ; %bb.0:429; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)430; GFX900-NEXT:    v_mad_mixlo_f16 v3, v0, v1, v2 op_sel_hi:[1,1,1]431; GFX900-NEXT:    v_mad_mixhi_f16 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]432; GFX900-NEXT:    v_mov_b32_e32 v0, v3433; GFX900-NEXT:    s_setpc_b64 s[30:31]434;435; GFX906-LABEL: v_mad_mix_v2f32:436; GFX906:       ; %bb.0:437; GFX906-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)438; GFX906-NEXT:    v_fma_mixlo_f16 v3, v0, v1, v2 op_sel_hi:[1,1,1]439; GFX906-NEXT:    v_fma_mixhi_f16 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]440; GFX906-NEXT:    v_mov_b32_e32 v0, v3441; GFX906-NEXT:    s_setpc_b64 s[30:31]442;443; SDAG-VI-LABEL: v_mad_mix_v2f32:444; SDAG-VI:       ; %bb.0:445; SDAG-VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)446; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1447; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v0, v0448; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1449; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v1, v1450; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1451; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v2, v2452; SDAG-VI-NEXT:    v_mac_f32_e32 v5, v3, v4453; SDAG-VI-NEXT:    v_mac_f32_e32 v2, v0, v1454; SDAG-VI-NEXT:    v_cvt_f16_f32_sdwa v0, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD455; SDAG-VI-NEXT:    v_cvt_f16_f32_e32 v1, v2456; SDAG-VI-NEXT:    v_or_b32_e32 v0, v1, v0457; SDAG-VI-NEXT:    s_setpc_b64 s[30:31]458;459; SDAG-CI-LABEL: v_mad_mix_v2f32:460; SDAG-CI:       ; %bb.0:461; SDAG-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)462; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v4, v4463; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v2, v2464; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v5, v5465; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v3, v3466; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v1, v1467; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v0468; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v4, v4469; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v2, v2470; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v5, v5471; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v3, v3472; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v1, v1473; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v0, v0474; SDAG-CI-NEXT:    v_mac_f32_e32 v5, v1, v3475; SDAG-CI-NEXT:    v_mac_f32_e32 v4, v0, v2476; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v4477; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v1, v5478; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v0, v0479; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v1, v1480; SDAG-CI-NEXT:    s_setpc_b64 s[30:31]481;482; GISEL-GFX1100-LABEL: v_mad_mix_v2f32:483; GISEL-GFX1100:       ; %bb.0:484; GISEL-GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)485; GISEL-GFX1100-NEXT:    v_fma_mixlo_f16 v3, v0, v1, v2 op_sel_hi:[1,1,1]486; GISEL-GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)487; GISEL-GFX1100-NEXT:    v_fma_mixhi_f16 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]488; GISEL-GFX1100-NEXT:    v_mov_b32_e32 v0, v3489; GISEL-GFX1100-NEXT:    s_setpc_b64 s[30:31]490;491; GISEL-VI-LABEL: v_mad_mix_v2f32:492; GISEL-VI:       ; %bb.0:493; GISEL-VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)494; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v3, v0495; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1496; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v4, v1497; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1498; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v5, v2499; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1500; GISEL-VI-NEXT:    v_mac_f32_e32 v5, v3, v4501; GISEL-VI-NEXT:    v_mac_f32_e32 v2, v0, v1502; GISEL-VI-NEXT:    v_cvt_f16_f32_e32 v0, v5503; GISEL-VI-NEXT:    v_cvt_f16_f32_sdwa v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD504; GISEL-VI-NEXT:    v_or_b32_e32 v0, v0, v1505; GISEL-VI-NEXT:    s_setpc_b64 s[30:31]506;507; GISEL-CI-LABEL: v_mad_mix_v2f32:508; GISEL-CI:       ; %bb.0:509; GISEL-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)510; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v0, v0511; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v1, v1512; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v2, v2513; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v3, v3514; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v4, v4515; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v5, v5516; GISEL-CI-NEXT:    v_mac_f32_e32 v4, v0, v2517; GISEL-CI-NEXT:    v_mac_f32_e32 v5, v1, v3518; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v0, v4519; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v1, v5520; GISEL-CI-NEXT:    s_setpc_b64 s[30:31]521  %src0.ext = fpext <2 x half> %src0 to <2 x float>522  %src1.ext = fpext <2 x half> %src1 to <2 x float>523  %src2.ext = fpext <2 x half> %src2 to <2 x float>524  %result = tail call <2 x float> @llvm.fmuladd.v2f32(<2 x float> %src0.ext, <2 x float> %src1.ext, <2 x float> %src2.ext)525  %cvt.result = fptrunc <2 x float> %result to <2 x half>526  ret <2 x half> %cvt.result527}528 529define <3 x half> @v_mad_mix_v3f32(<3 x half> %src0, <3 x half> %src1, <3 x half> %src2) #0 {530; SDAG-GFX1100-TRUE16-LABEL: v_mad_mix_v3f32:531; SDAG-GFX1100-TRUE16:       ; %bb.0:532; SDAG-GFX1100-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)533; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mixlo_f16 v6, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1]534; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mixlo_f16 v0, v0, v2, v4 op_sel_hi:[1,1,1]535; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mixlo_f16 v1, v1, v3, v5 op_sel_hi:[1,1,1]536; SDAG-GFX1100-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2)537; SDAG-GFX1100-TRUE16-NEXT:    v_pack_b32_f16 v0, v0.l, v6.l538; SDAG-GFX1100-TRUE16-NEXT:    s_setpc_b64 s[30:31]539;540; SDAG-GFX1100-FAKE16-LABEL: v_mad_mix_v3f32:541; SDAG-GFX1100-FAKE16:       ; %bb.0:542; SDAG-GFX1100-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)543; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mixlo_f16 v6, v0, v2, v4 op_sel_hi:[1,1,1]544; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mixlo_f16 v1, v1, v3, v5 op_sel_hi:[1,1,1]545; SDAG-GFX1100-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)546; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mixhi_f16 v6, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1]547; SDAG-GFX1100-FAKE16-NEXT:    v_mov_b32_e32 v0, v6548; SDAG-GFX1100-FAKE16-NEXT:    s_setpc_b64 s[30:31]549;550; SDAG-GFX900-LABEL: v_mad_mix_v3f32:551; SDAG-GFX900:       ; %bb.0:552; SDAG-GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)553; SDAG-GFX900-NEXT:    v_mad_mixlo_f16 v1, v1, v3, v5 op_sel_hi:[1,1,1]554; SDAG-GFX900-NEXT:    v_mad_mixlo_f16 v3, v0, v2, v4 op_sel_hi:[1,1,1]555; SDAG-GFX900-NEXT:    v_mad_mixhi_f16 v3, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1]556; SDAG-GFX900-NEXT:    v_mov_b32_e32 v0, v3557; SDAG-GFX900-NEXT:    s_setpc_b64 s[30:31]558;559; SDAG-GFX906-LABEL: v_mad_mix_v3f32:560; SDAG-GFX906:       ; %bb.0:561; SDAG-GFX906-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)562; SDAG-GFX906-NEXT:    v_fma_mixlo_f16 v1, v1, v3, v5 op_sel_hi:[1,1,1]563; SDAG-GFX906-NEXT:    v_fma_mixlo_f16 v3, v0, v2, v4 op_sel_hi:[1,1,1]564; SDAG-GFX906-NEXT:    v_fma_mixhi_f16 v3, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1]565; SDAG-GFX906-NEXT:    v_mov_b32_e32 v0, v3566; SDAG-GFX906-NEXT:    s_setpc_b64 s[30:31]567;568; SDAG-VI-LABEL: v_mad_mix_v3f32:569; SDAG-VI:       ; %bb.0:570; SDAG-VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)571; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v6, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1572; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v0, v0573; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v7, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1574; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v2, v2575; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v8, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1576; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v4, v4577; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v1, v1578; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v3, v3579; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v5, v5580; SDAG-VI-NEXT:    v_mac_f32_e32 v8, v6, v7581; SDAG-VI-NEXT:    v_mac_f32_e32 v4, v0, v2582; SDAG-VI-NEXT:    v_cvt_f16_f32_sdwa v0, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD583; SDAG-VI-NEXT:    v_cvt_f16_f32_e32 v2, v4584; SDAG-VI-NEXT:    v_mac_f32_e32 v5, v1, v3585; SDAG-VI-NEXT:    v_cvt_f16_f32_e32 v1, v5586; SDAG-VI-NEXT:    v_or_b32_e32 v0, v2, v0587; SDAG-VI-NEXT:    s_setpc_b64 s[30:31]588;589; SDAG-CI-LABEL: v_mad_mix_v3f32:590; SDAG-CI:       ; %bb.0:591; SDAG-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)592; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v6, v6593; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v3, v3594; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v7, v7595; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v4, v4596; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v0597; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v8, v8598; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v5, v5599; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v2, v2600; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v1, v1601; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v6, v6602; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v3, v3603; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v7, v7604; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v4, v4605; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v8, v8606; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v5, v5607; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v2, v2608; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v1, v1609; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v0, v0610; SDAG-CI-NEXT:    v_mac_f32_e32 v8, v2, v5611; SDAG-CI-NEXT:    v_mac_f32_e32 v7, v1, v4612; SDAG-CI-NEXT:    v_mac_f32_e32 v6, v0, v3613; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v6614; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v1, v7615; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v2, v8616; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v0, v0617; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v1, v1618; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v2, v2619; SDAG-CI-NEXT:    s_setpc_b64 s[30:31]620;621; GISEL-GFX1100-LABEL: v_mad_mix_v3f32:622; GISEL-GFX1100:       ; %bb.0:623; GISEL-GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)624; GISEL-GFX1100-NEXT:    v_fma_mixlo_f16 v6, v0, v2, v4 op_sel_hi:[1,1,1]625; GISEL-GFX1100-NEXT:    v_fma_mixlo_f16 v1, v1, v3, v5 op_sel_hi:[1,1,1]626; GISEL-GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)627; GISEL-GFX1100-NEXT:    v_fma_mixhi_f16 v6, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1]628; GISEL-GFX1100-NEXT:    v_mov_b32_e32 v0, v6629; GISEL-GFX1100-NEXT:    s_setpc_b64 s[30:31]630;631; GISEL-GFX900-LABEL: v_mad_mix_v3f32:632; GISEL-GFX900:       ; %bb.0:633; GISEL-GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)634; GISEL-GFX900-NEXT:    v_mad_mixlo_f16 v6, v0, v2, v4 op_sel_hi:[1,1,1]635; GISEL-GFX900-NEXT:    v_mad_mixhi_f16 v6, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1]636; GISEL-GFX900-NEXT:    v_mad_mixlo_f16 v1, v1, v3, v5 op_sel_hi:[1,1,1]637; GISEL-GFX900-NEXT:    v_mov_b32_e32 v0, v6638; GISEL-GFX900-NEXT:    s_setpc_b64 s[30:31]639;640; GISEL-GFX906-LABEL: v_mad_mix_v3f32:641; GISEL-GFX906:       ; %bb.0:642; GISEL-GFX906-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)643; GISEL-GFX906-NEXT:    v_fma_mixlo_f16 v6, v0, v2, v4 op_sel_hi:[1,1,1]644; GISEL-GFX906-NEXT:    v_fma_mixhi_f16 v6, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1]645; GISEL-GFX906-NEXT:    v_fma_mixlo_f16 v1, v1, v3, v5 op_sel_hi:[1,1,1]646; GISEL-GFX906-NEXT:    v_mov_b32_e32 v0, v6647; GISEL-GFX906-NEXT:    s_setpc_b64 s[30:31]648;649; GISEL-VI-LABEL: v_mad_mix_v3f32:650; GISEL-VI:       ; %bb.0:651; GISEL-VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)652; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v6, v0653; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1654; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v7, v2655; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1656; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v8, v4657; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1658; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v1, v1659; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v3, v3660; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v5, v5661; GISEL-VI-NEXT:    v_mac_f32_e32 v8, v6, v7662; GISEL-VI-NEXT:    v_mac_f32_e32 v4, v0, v2663; GISEL-VI-NEXT:    v_cvt_f16_f32_e32 v0, v8664; GISEL-VI-NEXT:    v_cvt_f16_f32_sdwa v2, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD665; GISEL-VI-NEXT:    v_mac_f32_e32 v5, v1, v3666; GISEL-VI-NEXT:    v_cvt_f16_f32_e32 v1, v5667; GISEL-VI-NEXT:    v_or_b32_e32 v0, v0, v2668; GISEL-VI-NEXT:    s_setpc_b64 s[30:31]669;670; GISEL-CI-LABEL: v_mad_mix_v3f32:671; GISEL-CI:       ; %bb.0:672; GISEL-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)673; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v0, v0674; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v1, v1675; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v2, v2676; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v3, v3677; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v4, v4678; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v5, v5679; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v6, v6680; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v7, v7681; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v8, v8682; GISEL-CI-NEXT:    v_mac_f32_e32 v6, v0, v3683; GISEL-CI-NEXT:    v_mac_f32_e32 v7, v1, v4684; GISEL-CI-NEXT:    v_mac_f32_e32 v8, v2, v5685; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v0, v6686; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v1, v7687; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v2, v8688; GISEL-CI-NEXT:    s_setpc_b64 s[30:31]689  %src0.ext = fpext <3 x half> %src0 to <3 x float>690  %src1.ext = fpext <3 x half> %src1 to <3 x float>691  %src2.ext = fpext <3 x half> %src2 to <3 x float>692  %result = tail call <3 x float> @llvm.fmuladd.v3f32(<3 x float> %src0.ext, <3 x float> %src1.ext, <3 x float> %src2.ext)693  %cvt.result = fptrunc <3 x float> %result to <3 x half>694  ret <3 x half> %cvt.result695}696 697define <4 x half> @v_mad_mix_v4f32(<4 x half> %src0, <4 x half> %src1, <4 x half> %src2) #0 {698; SDAG-GFX1100-TRUE16-LABEL: v_mad_mix_v4f32:699; SDAG-GFX1100-TRUE16:       ; %bb.0:700; SDAG-GFX1100-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)701; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mixlo_f16 v6, v1, v3, v5 op_sel:[1,1,1] op_sel_hi:[1,1,1]702; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mixhi_f16 v6, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1]703; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mixlo_f16 v0, v0, v2, v4 op_sel_hi:[1,1,1]704; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mixlo_f16 v1, v1, v3, v5 op_sel_hi:[1,1,1]705; SDAG-GFX1100-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)706; SDAG-GFX1100-TRUE16-NEXT:    v_pack_b32_f16 v0, v0.l, v6.h707; SDAG-GFX1100-TRUE16-NEXT:    v_pack_b32_f16 v1, v1.l, v6.l708; SDAG-GFX1100-TRUE16-NEXT:    s_setpc_b64 s[30:31]709;710; SDAG-GFX1100-FAKE16-LABEL: v_mad_mix_v4f32:711; SDAG-GFX1100-FAKE16:       ; %bb.0:712; SDAG-GFX1100-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)713; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mixlo_f16 v6, v0, v2, v4 op_sel_hi:[1,1,1]714; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mixlo_f16 v7, v1, v3, v5 op_sel_hi:[1,1,1]715; SDAG-GFX1100-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)716; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mixhi_f16 v6, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1]717; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mixhi_f16 v7, v1, v3, v5 op_sel:[1,1,1] op_sel_hi:[1,1,1]718; SDAG-GFX1100-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)719; SDAG-GFX1100-FAKE16-NEXT:    v_dual_mov_b32 v0, v6 :: v_dual_mov_b32 v1, v7720; SDAG-GFX1100-FAKE16-NEXT:    s_setpc_b64 s[30:31]721;722; SDAG-GFX900-LABEL: v_mad_mix_v4f32:723; SDAG-GFX900:       ; %bb.0:724; SDAG-GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)725; SDAG-GFX900-NEXT:    v_mad_mixlo_f16 v6, v1, v3, v5 op_sel_hi:[1,1,1]726; SDAG-GFX900-NEXT:    v_mad_mixlo_f16 v7, v0, v2, v4 op_sel_hi:[1,1,1]727; SDAG-GFX900-NEXT:    v_mad_mixhi_f16 v7, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1]728; SDAG-GFX900-NEXT:    v_mad_mixhi_f16 v6, v1, v3, v5 op_sel:[1,1,1] op_sel_hi:[1,1,1]729; SDAG-GFX900-NEXT:    v_mov_b32_e32 v0, v7730; SDAG-GFX900-NEXT:    v_mov_b32_e32 v1, v6731; SDAG-GFX900-NEXT:    s_setpc_b64 s[30:31]732;733; SDAG-GFX906-LABEL: v_mad_mix_v4f32:734; SDAG-GFX906:       ; %bb.0:735; SDAG-GFX906-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)736; SDAG-GFX906-NEXT:    v_fma_mixlo_f16 v6, v1, v3, v5 op_sel_hi:[1,1,1]737; SDAG-GFX906-NEXT:    v_fma_mixlo_f16 v7, v0, v2, v4 op_sel_hi:[1,1,1]738; SDAG-GFX906-NEXT:    v_fma_mixhi_f16 v7, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1]739; SDAG-GFX906-NEXT:    v_fma_mixhi_f16 v6, v1, v3, v5 op_sel:[1,1,1] op_sel_hi:[1,1,1]740; SDAG-GFX906-NEXT:    v_mov_b32_e32 v0, v7741; SDAG-GFX906-NEXT:    v_mov_b32_e32 v1, v6742; SDAG-GFX906-NEXT:    s_setpc_b64 s[30:31]743;744; SDAG-VI-LABEL: v_mad_mix_v4f32:745; SDAG-VI:       ; %bb.0:746; SDAG-VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)747; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v6, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1748; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v7, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1749; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v1, v1750; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v0, v0751; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v8, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1752; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v9, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1753; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v3, v3754; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v2, v2755; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v10, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1756; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v11, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1757; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v4, v4758; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v5, v5759; SDAG-VI-NEXT:    v_mac_f32_e32 v10, v7, v9760; SDAG-VI-NEXT:    v_mac_f32_e32 v11, v6, v8761; SDAG-VI-NEXT:    v_mac_f32_e32 v4, v0, v2762; SDAG-VI-NEXT:    v_mac_f32_e32 v5, v1, v3763; SDAG-VI-NEXT:    v_cvt_f16_f32_sdwa v1, v11 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD764; SDAG-VI-NEXT:    v_cvt_f16_f32_sdwa v0, v10 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD765; SDAG-VI-NEXT:    v_cvt_f16_f32_e32 v2, v4766; SDAG-VI-NEXT:    v_cvt_f16_f32_e32 v3, v5767; SDAG-VI-NEXT:    v_or_b32_e32 v0, v2, v0768; SDAG-VI-NEXT:    v_or_b32_e32 v1, v3, v1769; SDAG-VI-NEXT:    s_setpc_b64 s[30:31]770;771; SDAG-CI-LABEL: v_mad_mix_v4f32:772; SDAG-CI:       ; %bb.0:773; SDAG-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)774; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v8, v8775; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v4, v4776; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v9, v9777; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v0778; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v5, v5779; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v10, v10780; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v6, v6781; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v1, v1782; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v11, v11783; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v7, v7784; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v3, v3785; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v2, v2786; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v8, v8787; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v4, v4788; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v9, v9789; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v5, v5790; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v10, v10791; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v6, v6792; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v11, v11793; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v7, v7794; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v3, v3795; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v2, v2796; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v1, v1797; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v0, v0798; SDAG-CI-NEXT:    v_mac_f32_e32 v11, v3, v7799; SDAG-CI-NEXT:    v_mac_f32_e32 v10, v2, v6800; SDAG-CI-NEXT:    v_mac_f32_e32 v9, v1, v5801; SDAG-CI-NEXT:    v_mac_f32_e32 v8, v0, v4802; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v8803; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v1, v9804; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v2, v10805; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v3, v11806; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v0, v0807; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v1, v1808; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v2, v2809; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v3, v3810; SDAG-CI-NEXT:    s_setpc_b64 s[30:31]811;812; GISEL-GFX1100-LABEL: v_mad_mix_v4f32:813; GISEL-GFX1100:       ; %bb.0:814; GISEL-GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)815; GISEL-GFX1100-NEXT:    v_fma_mixlo_f16 v6, v0, v2, v4 op_sel_hi:[1,1,1]816; GISEL-GFX1100-NEXT:    v_fma_mixlo_f16 v7, v1, v3, v5 op_sel_hi:[1,1,1]817; GISEL-GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)818; GISEL-GFX1100-NEXT:    v_fma_mixhi_f16 v6, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1]819; GISEL-GFX1100-NEXT:    v_fma_mixhi_f16 v7, v1, v3, v5 op_sel:[1,1,1] op_sel_hi:[1,1,1]820; GISEL-GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_1)821; GISEL-GFX1100-NEXT:    v_dual_mov_b32 v0, v6 :: v_dual_mov_b32 v1, v7822; GISEL-GFX1100-NEXT:    s_setpc_b64 s[30:31]823;824; GISEL-GFX900-LABEL: v_mad_mix_v4f32:825; GISEL-GFX900:       ; %bb.0:826; GISEL-GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)827; GISEL-GFX900-NEXT:    v_mad_mixlo_f16 v6, v0, v2, v4 op_sel_hi:[1,1,1]828; GISEL-GFX900-NEXT:    v_mad_mixlo_f16 v7, v1, v3, v5 op_sel_hi:[1,1,1]829; GISEL-GFX900-NEXT:    v_mad_mixhi_f16 v6, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1]830; GISEL-GFX900-NEXT:    v_mad_mixhi_f16 v7, v1, v3, v5 op_sel:[1,1,1] op_sel_hi:[1,1,1]831; GISEL-GFX900-NEXT:    v_mov_b32_e32 v0, v6832; GISEL-GFX900-NEXT:    v_mov_b32_e32 v1, v7833; GISEL-GFX900-NEXT:    s_setpc_b64 s[30:31]834;835; GISEL-GFX906-LABEL: v_mad_mix_v4f32:836; GISEL-GFX906:       ; %bb.0:837; GISEL-GFX906-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)838; GISEL-GFX906-NEXT:    v_fma_mixlo_f16 v6, v0, v2, v4 op_sel_hi:[1,1,1]839; GISEL-GFX906-NEXT:    v_fma_mixlo_f16 v7, v1, v3, v5 op_sel_hi:[1,1,1]840; GISEL-GFX906-NEXT:    v_fma_mixhi_f16 v6, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1]841; GISEL-GFX906-NEXT:    v_fma_mixhi_f16 v7, v1, v3, v5 op_sel:[1,1,1] op_sel_hi:[1,1,1]842; GISEL-GFX906-NEXT:    v_mov_b32_e32 v0, v6843; GISEL-GFX906-NEXT:    v_mov_b32_e32 v1, v7844; GISEL-GFX906-NEXT:    s_setpc_b64 s[30:31]845;846; GISEL-VI-LABEL: v_mad_mix_v4f32:847; GISEL-VI:       ; %bb.0:848; GISEL-VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)849; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v6, v0850; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1851; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v7, v1852; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1853; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v8, v2854; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1855; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v9, v3856; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1857; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v10, v4858; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1859; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v11, v5860; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1861; GISEL-VI-NEXT:    v_mac_f32_e32 v10, v6, v8862; GISEL-VI-NEXT:    v_mac_f32_e32 v4, v0, v2863; GISEL-VI-NEXT:    v_mac_f32_e32 v11, v7, v9864; GISEL-VI-NEXT:    v_mac_f32_e32 v5, v1, v3865; GISEL-VI-NEXT:    v_cvt_f16_f32_e32 v0, v10866; GISEL-VI-NEXT:    v_cvt_f16_f32_sdwa v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD867; GISEL-VI-NEXT:    v_cvt_f16_f32_e32 v2, v11868; GISEL-VI-NEXT:    v_cvt_f16_f32_sdwa v3, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD869; GISEL-VI-NEXT:    v_or_b32_e32 v0, v0, v1870; GISEL-VI-NEXT:    v_or_b32_e32 v1, v2, v3871; GISEL-VI-NEXT:    s_setpc_b64 s[30:31]872;873; GISEL-CI-LABEL: v_mad_mix_v4f32:874; GISEL-CI:       ; %bb.0:875; GISEL-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)876; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v0, v0877; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v1, v1878; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v2, v2879; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v3, v3880; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v4, v4881; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v5, v5882; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v6, v6883; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v7, v7884; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v8, v8885; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v9, v9886; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v10, v10887; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v11, v11888; GISEL-CI-NEXT:    v_mac_f32_e32 v8, v0, v4889; GISEL-CI-NEXT:    v_mac_f32_e32 v9, v1, v5890; GISEL-CI-NEXT:    v_mac_f32_e32 v10, v2, v6891; GISEL-CI-NEXT:    v_mac_f32_e32 v11, v3, v7892; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v0, v8893; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v1, v9894; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v2, v10895; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v3, v11896; GISEL-CI-NEXT:    s_setpc_b64 s[30:31]897  %src0.ext = fpext <4 x half> %src0 to <4 x float>898  %src1.ext = fpext <4 x half> %src1 to <4 x float>899  %src2.ext = fpext <4 x half> %src2 to <4 x float>900  %result = tail call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %src0.ext, <4 x float> %src1.ext, <4 x float> %src2.ext)901  %cvt.result = fptrunc <4 x float> %result to <4 x half>902  ret <4 x half> %cvt.result903}904 905; FIXME (DAG): Fold clamp906 907define <2 x half> @v_mad_mix_v2f32_clamp_postcvt(<2 x half> %src0, <2 x half> %src1, <2 x half> %src2) #0 {908; SDAG-GFX1100-TRUE16-LABEL: v_mad_mix_v2f32_clamp_postcvt:909; SDAG-GFX1100-TRUE16:       ; %bb.0:910; SDAG-GFX1100-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)911; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mixhi_f16 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp912; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mixlo_f16 v3, v0, v1, v2 op_sel_hi:[1,1,1] clamp913; SDAG-GFX1100-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)914; SDAG-GFX1100-TRUE16-NEXT:    v_mov_b32_e32 v0, v3915; SDAG-GFX1100-TRUE16-NEXT:    s_setpc_b64 s[30:31]916;917; SDAG-GFX1100-FAKE16-LABEL: v_mad_mix_v2f32_clamp_postcvt:918; SDAG-GFX1100-FAKE16:       ; %bb.0:919; SDAG-GFX1100-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)920; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mixlo_f16 v3, v0, v1, v2 op_sel_hi:[1,1,1] clamp921; SDAG-GFX1100-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)922; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mixhi_f16 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp923; SDAG-GFX1100-FAKE16-NEXT:    v_mov_b32_e32 v0, v3924; SDAG-GFX1100-FAKE16-NEXT:    s_setpc_b64 s[30:31]925;926; GFX900-LABEL: v_mad_mix_v2f32_clamp_postcvt:927; GFX900:       ; %bb.0:928; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)929; GFX900-NEXT:    v_mad_mixlo_f16 v3, v0, v1, v2 op_sel_hi:[1,1,1] clamp930; GFX900-NEXT:    v_mad_mixhi_f16 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp931; GFX900-NEXT:    v_mov_b32_e32 v0, v3932; GFX900-NEXT:    s_setpc_b64 s[30:31]933;934; GFX906-LABEL: v_mad_mix_v2f32_clamp_postcvt:935; GFX906:       ; %bb.0:936; GFX906-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)937; GFX906-NEXT:    v_fma_mixlo_f16 v3, v0, v1, v2 op_sel_hi:[1,1,1] clamp938; GFX906-NEXT:    v_fma_mixhi_f16 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp939; GFX906-NEXT:    v_mov_b32_e32 v0, v3940; GFX906-NEXT:    s_setpc_b64 s[30:31]941;942; SDAG-VI-LABEL: v_mad_mix_v2f32_clamp_postcvt:943; SDAG-VI:       ; %bb.0:944; SDAG-VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)945; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1946; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v0, v0947; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1948; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v1, v1949; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1950; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v2, v2951; SDAG-VI-NEXT:    v_mac_f32_e32 v5, v3, v4952; SDAG-VI-NEXT:    v_mac_f32_e32 v2, v0, v1953; SDAG-VI-NEXT:    v_cvt_f16_f32_sdwa v0, v5 clamp dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD954; SDAG-VI-NEXT:    v_cvt_f16_f32_e64 v1, v2 clamp955; SDAG-VI-NEXT:    v_or_b32_e32 v0, v1, v0956; SDAG-VI-NEXT:    s_setpc_b64 s[30:31]957;958; SDAG-CI-LABEL: v_mad_mix_v2f32_clamp_postcvt:959; SDAG-CI:       ; %bb.0:960; SDAG-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)961; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v5, v5962; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v3, v3963; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v4, v4964; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v2, v2965; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v0966; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v1, v1967; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v5, v5968; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v3, v3969; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v4, v4970; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v2, v2971; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v0, v0972; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v1, v1973; SDAG-CI-NEXT:    v_mac_f32_e32 v4, v0, v2974; SDAG-CI-NEXT:    v_mac_f32_e32 v5, v1, v3975; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v4976; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v1, v5977; SDAG-CI-NEXT:    v_cvt_f32_f16_e64 v0, v0 clamp978; SDAG-CI-NEXT:    v_cvt_f32_f16_e64 v1, v1 clamp979; SDAG-CI-NEXT:    s_setpc_b64 s[30:31]980;981; GISEL-GFX1100-LABEL: v_mad_mix_v2f32_clamp_postcvt:982; GISEL-GFX1100:       ; %bb.0:983; GISEL-GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)984; GISEL-GFX1100-NEXT:    v_fma_mixlo_f16 v3, v0, v1, v2 op_sel_hi:[1,1,1] clamp985; GISEL-GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)986; GISEL-GFX1100-NEXT:    v_fma_mixhi_f16 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp987; GISEL-GFX1100-NEXT:    v_mov_b32_e32 v0, v3988; GISEL-GFX1100-NEXT:    s_setpc_b64 s[30:31]989;990; GISEL-VI-LABEL: v_mad_mix_v2f32_clamp_postcvt:991; GISEL-VI:       ; %bb.0:992; GISEL-VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)993; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v3, v0994; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1995; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v4, v1996; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1997; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v5, v2998; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1999; GISEL-VI-NEXT:    v_mac_f32_e32 v5, v3, v41000; GISEL-VI-NEXT:    v_mac_f32_e32 v2, v0, v11001; GISEL-VI-NEXT:    v_cvt_f16_f32_e64 v0, v5 clamp1002; GISEL-VI-NEXT:    v_cvt_f16_f32_sdwa v1, v2 clamp dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD1003; GISEL-VI-NEXT:    v_or_b32_e32 v0, v0, v11004; GISEL-VI-NEXT:    s_setpc_b64 s[30:31]1005;1006; GISEL-CI-LABEL: v_mad_mix_v2f32_clamp_postcvt:1007; GISEL-CI:       ; %bb.0:1008; GISEL-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1009; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v0, v01010; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v1, v11011; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v2, v21012; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v4, v41013; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v3, v31014; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v5, v51015; GISEL-CI-NEXT:    v_mac_f32_e32 v4, v0, v21016; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v0, v41017; GISEL-CI-NEXT:    v_mac_f32_e32 v5, v1, v31018; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v1, v51019; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v0, v01020; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v1, v11021; GISEL-CI-NEXT:    v_max_f32_e32 v0, 0, v01022; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v0, v01023; GISEL-CI-NEXT:    v_max_f32_e32 v1, 0, v11024; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v1, v11025; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v0, v01026; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v1, v11027; GISEL-CI-NEXT:    v_min_f32_e32 v0, 1.0, v01028; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v0, v01029; GISEL-CI-NEXT:    v_min_f32_e32 v1, 1.0, v11030; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v1, v11031; GISEL-CI-NEXT:    s_setpc_b64 s[30:31]1032  %src0.ext = fpext <2 x half> %src0 to <2 x float>1033  %src1.ext = fpext <2 x half> %src1 to <2 x float>1034  %src2.ext = fpext <2 x half> %src2 to <2 x float>1035  %result = tail call <2 x float> @llvm.fmuladd.v2f32(<2 x float> %src0.ext, <2 x float> %src1.ext, <2 x float> %src2.ext)1036  %cvt.result = fptrunc <2 x float> %result to <2 x half>1037  %max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %cvt.result, <2 x half> zeroinitializer)1038  %clamp = call <2 x half> @llvm.minnum.v2f16(<2 x half> %max, <2 x half> <half 1.0, half 1.0>)1039  ret <2 x half> %clamp1040}1041 1042; FIXME (DAG): Should be packed into 2 registers per argument?1043; FIXME (GIsel): V_PK_MAX clamp could be folded into mixlo1044 1045define <3 x half> @v_mad_mix_v3f32_clamp_postcvt(<3 x half> %src0, <3 x half> %src1, <3 x half> %src2) #0 {1046; SDAG-GFX1100-TRUE16-LABEL: v_mad_mix_v3f32_clamp_postcvt:1047; SDAG-GFX1100-TRUE16:       ; %bb.0:1048; SDAG-GFX1100-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1049; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mixlo_f16 v1, v1, v3, v5 op_sel_hi:[1,1,1]1050; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mixhi_f16 v3, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1051; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mixlo_f16 v3, v0, v2, v4 op_sel_hi:[1,1,1] clamp1052; SDAG-GFX1100-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)1053; SDAG-GFX1100-TRUE16-NEXT:    v_pack_b32_f16 v1, v1.l, 01054; SDAG-GFX1100-TRUE16-NEXT:    v_mov_b32_e32 v0, v31055; SDAG-GFX1100-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2)1056; SDAG-GFX1100-TRUE16-NEXT:    v_pk_max_f16 v1, v1, v1 clamp1057; SDAG-GFX1100-TRUE16-NEXT:    s_setpc_b64 s[30:31]1058;1059; SDAG-GFX1100-FAKE16-LABEL: v_mad_mix_v3f32_clamp_postcvt:1060; SDAG-GFX1100-FAKE16:       ; %bb.0:1061; SDAG-GFX1100-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1062; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mixlo_f16 v1, v1, v3, v5 op_sel_hi:[1,1,1]1063; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mixlo_f16 v3, v0, v2, v4 op_sel_hi:[1,1,1] clamp1064; SDAG-GFX1100-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1065; SDAG-GFX1100-FAKE16-NEXT:    v_pack_b32_f16 v1, v1, 01066; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mixhi_f16 v3, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1067; SDAG-GFX1100-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1068; SDAG-GFX1100-FAKE16-NEXT:    v_pk_max_f16 v1, v1, v1 clamp1069; SDAG-GFX1100-FAKE16-NEXT:    v_mov_b32_e32 v0, v31070; SDAG-GFX1100-FAKE16-NEXT:    s_setpc_b64 s[30:31]1071;1072; SDAG-GFX900-LABEL: v_mad_mix_v3f32_clamp_postcvt:1073; SDAG-GFX900:       ; %bb.0:1074; SDAG-GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1075; SDAG-GFX900-NEXT:    v_mad_mixlo_f16 v1, v1, v3, v5 op_sel_hi:[1,1,1]1076; SDAG-GFX900-NEXT:    v_mad_mixlo_f16 v3, v0, v2, v4 op_sel_hi:[1,1,1] clamp1077; SDAG-GFX900-NEXT:    v_pack_b32_f16 v1, v1, 01078; SDAG-GFX900-NEXT:    v_mad_mixhi_f16 v3, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1079; SDAG-GFX900-NEXT:    v_pk_max_f16 v1, v1, v1 clamp1080; SDAG-GFX900-NEXT:    v_mov_b32_e32 v0, v31081; SDAG-GFX900-NEXT:    s_setpc_b64 s[30:31]1082;1083; SDAG-GFX906-LABEL: v_mad_mix_v3f32_clamp_postcvt:1084; SDAG-GFX906:       ; %bb.0:1085; SDAG-GFX906-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1086; SDAG-GFX906-NEXT:    v_fma_mixlo_f16 v1, v1, v3, v5 op_sel_hi:[1,1,1]1087; SDAG-GFX906-NEXT:    v_fma_mixlo_f16 v3, v0, v2, v4 op_sel_hi:[1,1,1] clamp1088; SDAG-GFX906-NEXT:    v_pack_b32_f16 v1, v1, 01089; SDAG-GFX906-NEXT:    v_fma_mixhi_f16 v3, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1090; SDAG-GFX906-NEXT:    v_pk_max_f16 v1, v1, v1 clamp1091; SDAG-GFX906-NEXT:    v_mov_b32_e32 v0, v31092; SDAG-GFX906-NEXT:    s_setpc_b64 s[30:31]1093;1094; SDAG-VI-LABEL: v_mad_mix_v3f32_clamp_postcvt:1095; SDAG-VI:       ; %bb.0:1096; SDAG-VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1097; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v6, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11098; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v1, v11099; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v0, v01100; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v7, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11101; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v3, v31102; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v2, v21103; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v8, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11104; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v4, v41105; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v5, v51106; SDAG-VI-NEXT:    v_mac_f32_e32 v8, v6, v71107; SDAG-VI-NEXT:    v_mac_f32_e32 v4, v0, v21108; SDAG-VI-NEXT:    v_mac_f32_e32 v5, v1, v31109; SDAG-VI-NEXT:    v_cvt_f16_f32_e32 v0, v81110; SDAG-VI-NEXT:    v_cvt_f16_f32_e32 v1, v41111; SDAG-VI-NEXT:    v_cvt_f16_f32_e32 v2, v51112; SDAG-VI-NEXT:    v_max_f16_e32 v0, 0, v01113; SDAG-VI-NEXT:    v_max_f16_e32 v3, 0, v11114; SDAG-VI-NEXT:    v_max_f16_e32 v1, 0, v21115; SDAG-VI-NEXT:    v_mov_b32_e32 v2, 0x3c001116; SDAG-VI-NEXT:    v_min_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD1117; SDAG-VI-NEXT:    v_min_f16_e32 v2, 1.0, v31118; SDAG-VI-NEXT:    v_min_f16_e32 v1, 1.0, v11119; SDAG-VI-NEXT:    v_or_b32_e32 v0, v2, v01120; SDAG-VI-NEXT:    s_setpc_b64 s[30:31]1121;1122; SDAG-CI-LABEL: v_mad_mix_v3f32_clamp_postcvt:1123; SDAG-CI:       ; %bb.0:1124; SDAG-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1125; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v8, v81126; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v5, v51127; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v7, v71128; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v4, v41129; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v2, v21130; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v6, v61131; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v3, v31132; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v01133; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v1, v11134; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v8, v81135; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v5, v51136; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v7, v71137; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v4, v41138; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v6, v61139; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v3, v31140; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v0, v01141; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v1, v11142; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v2, v21143; SDAG-CI-NEXT:    v_mac_f32_e32 v6, v0, v31144; SDAG-CI-NEXT:    v_mac_f32_e32 v7, v1, v41145; SDAG-CI-NEXT:    v_mac_f32_e32 v8, v2, v51146; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v61147; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v1, v71148; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v2, v81149; SDAG-CI-NEXT:    v_cvt_f32_f16_e64 v0, v0 clamp1150; SDAG-CI-NEXT:    v_cvt_f32_f16_e64 v1, v1 clamp1151; SDAG-CI-NEXT:    v_cvt_f32_f16_e64 v2, v2 clamp1152; SDAG-CI-NEXT:    s_setpc_b64 s[30:31]1153;1154; GISEL-GFX1100-LABEL: v_mad_mix_v3f32_clamp_postcvt:1155; GISEL-GFX1100:       ; %bb.0:1156; GISEL-GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1157; GISEL-GFX1100-NEXT:    v_fma_mixlo_f16 v6, v0, v2, v4 op_sel_hi:[1,1,1] clamp1158; GISEL-GFX1100-NEXT:    v_fma_mixlo_f16 v1, v1, v3, v5 op_sel_hi:[1,1,1]1159; GISEL-GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1160; GISEL-GFX1100-NEXT:    v_fma_mixhi_f16 v6, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1161; GISEL-GFX1100-NEXT:    v_pk_max_f16 v1, v1, v1 clamp1162; GISEL-GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_2)1163; GISEL-GFX1100-NEXT:    v_mov_b32_e32 v0, v61164; GISEL-GFX1100-NEXT:    s_setpc_b64 s[30:31]1165;1166; GISEL-GFX900-LABEL: v_mad_mix_v3f32_clamp_postcvt:1167; GISEL-GFX900:       ; %bb.0:1168; GISEL-GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1169; GISEL-GFX900-NEXT:    v_mad_mixlo_f16 v1, v1, v3, v5 op_sel_hi:[1,1,1]1170; GISEL-GFX900-NEXT:    v_mad_mixlo_f16 v3, v0, v2, v4 op_sel_hi:[1,1,1] clamp1171; GISEL-GFX900-NEXT:    v_mad_mixhi_f16 v3, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1172; GISEL-GFX900-NEXT:    v_pk_max_f16 v1, v1, v1 clamp1173; GISEL-GFX900-NEXT:    v_mov_b32_e32 v0, v31174; GISEL-GFX900-NEXT:    s_setpc_b64 s[30:31]1175;1176; GISEL-GFX906-LABEL: v_mad_mix_v3f32_clamp_postcvt:1177; GISEL-GFX906:       ; %bb.0:1178; GISEL-GFX906-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1179; GISEL-GFX906-NEXT:    v_fma_mixlo_f16 v1, v1, v3, v5 op_sel_hi:[1,1,1]1180; GISEL-GFX906-NEXT:    v_fma_mixlo_f16 v3, v0, v2, v4 op_sel_hi:[1,1,1] clamp1181; GISEL-GFX906-NEXT:    v_fma_mixhi_f16 v3, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1182; GISEL-GFX906-NEXT:    v_pk_max_f16 v1, v1, v1 clamp1183; GISEL-GFX906-NEXT:    v_mov_b32_e32 v0, v31184; GISEL-GFX906-NEXT:    s_setpc_b64 s[30:31]1185;1186; GISEL-VI-LABEL: v_mad_mix_v3f32_clamp_postcvt:1187; GISEL-VI:       ; %bb.0:1188; GISEL-VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1189; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v6, v01190; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11191; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v7, v21192; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11193; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v8, v41194; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11195; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v1, v11196; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v3, v31197; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v5, v51198; GISEL-VI-NEXT:    v_mac_f32_e32 v8, v6, v71199; GISEL-VI-NEXT:    v_mac_f32_e32 v4, v0, v21200; GISEL-VI-NEXT:    v_cvt_f16_f32_e64 v0, v8 clamp1201; GISEL-VI-NEXT:    v_cvt_f16_f32_sdwa v2, v4 clamp dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD1202; GISEL-VI-NEXT:    v_mac_f32_e32 v5, v1, v31203; GISEL-VI-NEXT:    v_cvt_f16_f32_e64 v1, v5 clamp1204; GISEL-VI-NEXT:    v_or_b32_e32 v0, v0, v21205; GISEL-VI-NEXT:    s_setpc_b64 s[30:31]1206;1207; GISEL-CI-LABEL: v_mad_mix_v3f32_clamp_postcvt:1208; GISEL-CI:       ; %bb.0:1209; GISEL-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1210; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v0, v01211; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v1, v11212; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v2, v21213; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v3, v31214; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v4, v41215; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v6, v61216; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v5, v51217; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v7, v71218; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v8, v81219; GISEL-CI-NEXT:    v_mac_f32_e32 v6, v0, v31220; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v0, v61221; GISEL-CI-NEXT:    v_mac_f32_e32 v7, v1, v41222; GISEL-CI-NEXT:    v_mac_f32_e32 v8, v2, v51223; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v1, v71224; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v2, v81225; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v0, v01226; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v1, v11227; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v2, v21228; GISEL-CI-NEXT:    v_max_f32_e32 v0, 0, v01229; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v0, v01230; GISEL-CI-NEXT:    v_max_f32_e32 v1, 0, v11231; GISEL-CI-NEXT:    v_max_f32_e32 v2, 0, v21232; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v1, v11233; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v2, v21234; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v0, v01235; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v1, v11236; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v2, v21237; GISEL-CI-NEXT:    v_min_f32_e32 v0, 1.0, v01238; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v0, v01239; GISEL-CI-NEXT:    v_min_f32_e32 v1, 1.0, v11240; GISEL-CI-NEXT:    v_min_f32_e32 v2, 1.0, v21241; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v1, v11242; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v2, v21243; GISEL-CI-NEXT:    s_setpc_b64 s[30:31]1244  %src0.ext = fpext <3 x half> %src0 to <3 x float>1245  %src1.ext = fpext <3 x half> %src1 to <3 x float>1246  %src2.ext = fpext <3 x half> %src2 to <3 x float>1247  %result = tail call <3 x float> @llvm.fmuladd.v3f32(<3 x float> %src0.ext, <3 x float> %src1.ext, <3 x float> %src2.ext)1248  %cvt.result = fptrunc <3 x float> %result to <3 x half>1249  %max = call <3 x half> @llvm.maxnum.v3f16(<3 x half> %cvt.result, <3 x half> zeroinitializer)1250  %clamp = call <3 x half> @llvm.minnum.v3f16(<3 x half> %max, <3 x half> <half 1.0, half 1.0, half 1.0>)1251  ret <3 x half> %clamp1252}1253 1254define <4 x half> @v_mad_mix_v4f32_clamp_postcvt(<4 x half> %src0, <4 x half> %src1, <4 x half> %src2) #0 {1255; SDAG-GFX1100-TRUE16-LABEL: v_mad_mix_v4f32_clamp_postcvt:1256; SDAG-GFX1100-TRUE16:       ; %bb.0:1257; SDAG-GFX1100-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1258; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mixhi_f16 v6, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1259; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mixlo_f16 v6, v0, v2, v4 op_sel_hi:[1,1,1] clamp1260; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mixhi_f16 v2, v1, v3, v5 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1261; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mixlo_f16 v2, v1, v3, v5 op_sel_hi:[1,1,1] clamp1262; SDAG-GFX1100-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)1263; SDAG-GFX1100-TRUE16-NEXT:    v_mov_b32_e32 v0, v61264; SDAG-GFX1100-TRUE16-NEXT:    v_mov_b32_e32 v1, v21265; SDAG-GFX1100-TRUE16-NEXT:    s_setpc_b64 s[30:31]1266;1267; SDAG-GFX1100-FAKE16-LABEL: v_mad_mix_v4f32_clamp_postcvt:1268; SDAG-GFX1100-FAKE16:       ; %bb.0:1269; SDAG-GFX1100-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1270; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mixlo_f16 v6, v0, v2, v4 op_sel_hi:[1,1,1] clamp1271; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mixlo_f16 v7, v1, v3, v5 op_sel_hi:[1,1,1] clamp1272; SDAG-GFX1100-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1273; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mixhi_f16 v6, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1274; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mixhi_f16 v7, v1, v3, v5 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1275; SDAG-GFX1100-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)1276; SDAG-GFX1100-FAKE16-NEXT:    v_dual_mov_b32 v0, v6 :: v_dual_mov_b32 v1, v71277; SDAG-GFX1100-FAKE16-NEXT:    s_setpc_b64 s[30:31]1278;1279; GFX900-LABEL: v_mad_mix_v4f32_clamp_postcvt:1280; GFX900:       ; %bb.0:1281; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1282; GFX900-NEXT:    v_mad_mixlo_f16 v6, v0, v2, v4 op_sel_hi:[1,1,1] clamp1283; GFX900-NEXT:    v_mad_mixhi_f16 v6, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1284; GFX900-NEXT:    v_mad_mixlo_f16 v2, v1, v3, v5 op_sel_hi:[1,1,1] clamp1285; GFX900-NEXT:    v_mad_mixhi_f16 v2, v1, v3, v5 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1286; GFX900-NEXT:    v_mov_b32_e32 v0, v61287; GFX900-NEXT:    v_mov_b32_e32 v1, v21288; GFX900-NEXT:    s_setpc_b64 s[30:31]1289;1290; GFX906-LABEL: v_mad_mix_v4f32_clamp_postcvt:1291; GFX906:       ; %bb.0:1292; GFX906-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1293; GFX906-NEXT:    v_fma_mixlo_f16 v6, v0, v2, v4 op_sel_hi:[1,1,1] clamp1294; GFX906-NEXT:    v_fma_mixhi_f16 v6, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1295; GFX906-NEXT:    v_fma_mixlo_f16 v2, v1, v3, v5 op_sel_hi:[1,1,1] clamp1296; GFX906-NEXT:    v_fma_mixhi_f16 v2, v1, v3, v5 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1297; GFX906-NEXT:    v_mov_b32_e32 v0, v61298; GFX906-NEXT:    v_mov_b32_e32 v1, v21299; GFX906-NEXT:    s_setpc_b64 s[30:31]1300;1301; SDAG-VI-LABEL: v_mad_mix_v4f32_clamp_postcvt:1302; SDAG-VI:       ; %bb.0:1303; SDAG-VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1304; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v6, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11305; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v7, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11306; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v1, v11307; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v0, v01308; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v8, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11309; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v9, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11310; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v3, v31311; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v2, v21312; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v10, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11313; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v11, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11314; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v4, v41315; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v5, v51316; SDAG-VI-NEXT:    v_mac_f32_e32 v10, v7, v91317; SDAG-VI-NEXT:    v_mac_f32_e32 v11, v6, v81318; SDAG-VI-NEXT:    v_mac_f32_e32 v4, v0, v21319; SDAG-VI-NEXT:    v_mac_f32_e32 v5, v1, v31320; SDAG-VI-NEXT:    v_cvt_f16_f32_e32 v0, v101321; SDAG-VI-NEXT:    v_cvt_f16_f32_e32 v1, v111322; SDAG-VI-NEXT:    v_cvt_f16_f32_e32 v2, v41323; SDAG-VI-NEXT:    v_cvt_f16_f32_e32 v3, v51324; SDAG-VI-NEXT:    v_max_f16_e32 v0, 0, v01325; SDAG-VI-NEXT:    v_max_f16_e32 v1, 0, v11326; SDAG-VI-NEXT:    v_max_f16_e32 v2, 0, v21327; SDAG-VI-NEXT:    v_max_f16_e32 v3, 0, v31328; SDAG-VI-NEXT:    v_mov_b32_e32 v4, 0x3c001329; SDAG-VI-NEXT:    v_min_f16_sdwa v1, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD1330; SDAG-VI-NEXT:    v_min_f16_sdwa v0, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD1331; SDAG-VI-NEXT:    v_min_f16_e32 v3, 1.0, v31332; SDAG-VI-NEXT:    v_min_f16_e32 v2, 1.0, v21333; SDAG-VI-NEXT:    v_or_b32_e32 v0, v2, v01334; SDAG-VI-NEXT:    v_or_b32_e32 v1, v3, v11335; SDAG-VI-NEXT:    s_setpc_b64 s[30:31]1336;1337; SDAG-CI-LABEL: v_mad_mix_v4f32_clamp_postcvt:1338; SDAG-CI:       ; %bb.0:1339; SDAG-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1340; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v11, v111341; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v7, v71342; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v10, v101343; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v3, v31344; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v6, v61345; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v9, v91346; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v5, v51347; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v2, v21348; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v8, v81349; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v4, v41350; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v01351; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v1, v11352; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v11, v111353; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v7, v71354; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v10, v101355; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v6, v61356; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v9, v91357; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v5, v51358; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v8, v81359; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v4, v41360; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v0, v01361; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v1, v11362; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v2, v21363; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v3, v31364; SDAG-CI-NEXT:    v_mac_f32_e32 v8, v0, v41365; SDAG-CI-NEXT:    v_mac_f32_e32 v9, v1, v51366; SDAG-CI-NEXT:    v_mac_f32_e32 v10, v2, v61367; SDAG-CI-NEXT:    v_mac_f32_e32 v11, v3, v71368; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v81369; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v1, v91370; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v2, v101371; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v3, v111372; SDAG-CI-NEXT:    v_cvt_f32_f16_e64 v0, v0 clamp1373; SDAG-CI-NEXT:    v_cvt_f32_f16_e64 v1, v1 clamp1374; SDAG-CI-NEXT:    v_cvt_f32_f16_e64 v2, v2 clamp1375; SDAG-CI-NEXT:    v_cvt_f32_f16_e64 v3, v3 clamp1376; SDAG-CI-NEXT:    s_setpc_b64 s[30:31]1377;1378; GISEL-GFX1100-LABEL: v_mad_mix_v4f32_clamp_postcvt:1379; GISEL-GFX1100:       ; %bb.0:1380; GISEL-GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1381; GISEL-GFX1100-NEXT:    v_fma_mixlo_f16 v6, v0, v2, v4 op_sel_hi:[1,1,1] clamp1382; GISEL-GFX1100-NEXT:    v_fma_mixlo_f16 v7, v1, v3, v5 op_sel_hi:[1,1,1] clamp1383; GISEL-GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1384; GISEL-GFX1100-NEXT:    v_fma_mixhi_f16 v6, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1385; GISEL-GFX1100-NEXT:    v_fma_mixhi_f16 v7, v1, v3, v5 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1386; GISEL-GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_1)1387; GISEL-GFX1100-NEXT:    v_dual_mov_b32 v0, v6 :: v_dual_mov_b32 v1, v71388; GISEL-GFX1100-NEXT:    s_setpc_b64 s[30:31]1389;1390; GISEL-VI-LABEL: v_mad_mix_v4f32_clamp_postcvt:1391; GISEL-VI:       ; %bb.0:1392; GISEL-VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1393; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v6, v01394; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11395; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v7, v11396; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11397; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v8, v21398; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11399; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v9, v31400; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11401; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v10, v41402; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11403; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v11, v51404; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11405; GISEL-VI-NEXT:    v_mac_f32_e32 v10, v6, v81406; GISEL-VI-NEXT:    v_mac_f32_e32 v4, v0, v21407; GISEL-VI-NEXT:    v_mac_f32_e32 v11, v7, v91408; GISEL-VI-NEXT:    v_mac_f32_e32 v5, v1, v31409; GISEL-VI-NEXT:    v_cvt_f16_f32_e64 v0, v10 clamp1410; GISEL-VI-NEXT:    v_cvt_f16_f32_sdwa v1, v4 clamp dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD1411; GISEL-VI-NEXT:    v_cvt_f16_f32_e64 v2, v11 clamp1412; GISEL-VI-NEXT:    v_cvt_f16_f32_sdwa v3, v5 clamp dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD1413; GISEL-VI-NEXT:    v_or_b32_e32 v0, v0, v11414; GISEL-VI-NEXT:    v_or_b32_e32 v1, v2, v31415; GISEL-VI-NEXT:    s_setpc_b64 s[30:31]1416;1417; GISEL-CI-LABEL: v_mad_mix_v4f32_clamp_postcvt:1418; GISEL-CI:       ; %bb.0:1419; GISEL-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1420; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v0, v01421; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v1, v11422; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v2, v21423; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v3, v31424; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v4, v41425; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v5, v51426; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v6, v61427; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v7, v71428; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v8, v81429; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v9, v91430; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v10, v101431; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v11, v111432; GISEL-CI-NEXT:    v_mac_f32_e32 v8, v0, v41433; GISEL-CI-NEXT:    v_mac_f32_e32 v9, v1, v51434; GISEL-CI-NEXT:    v_mac_f32_e32 v10, v2, v61435; GISEL-CI-NEXT:    v_mac_f32_e32 v11, v3, v71436; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v0, v81437; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v1, v91438; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v2, v101439; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v3, v111440; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v0, v01441; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v1, v11442; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v2, v21443; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v3, v31444; GISEL-CI-NEXT:    v_max_f32_e32 v0, 0, v01445; GISEL-CI-NEXT:    v_max_f32_e32 v1, 0, v11446; GISEL-CI-NEXT:    v_max_f32_e32 v2, 0, v21447; GISEL-CI-NEXT:    v_max_f32_e32 v3, 0, v31448; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v0, v01449; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v1, v11450; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v2, v21451; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v3, v31452; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v0, v01453; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v1, v11454; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v2, v21455; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v3, v31456; GISEL-CI-NEXT:    v_min_f32_e32 v0, 1.0, v01457; GISEL-CI-NEXT:    v_min_f32_e32 v1, 1.0, v11458; GISEL-CI-NEXT:    v_min_f32_e32 v2, 1.0, v21459; GISEL-CI-NEXT:    v_min_f32_e32 v3, 1.0, v31460; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v0, v01461; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v1, v11462; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v2, v21463; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v3, v31464; GISEL-CI-NEXT:    s_setpc_b64 s[30:31]1465  %src0.ext = fpext <4 x half> %src0 to <4 x float>1466  %src1.ext = fpext <4 x half> %src1 to <4 x float>1467  %src2.ext = fpext <4 x half> %src2 to <4 x float>1468  %result = tail call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %src0.ext, <4 x float> %src1.ext, <4 x float> %src2.ext)1469  %cvt.result = fptrunc <4 x float> %result to <4 x half>1470  %max = call <4 x half> @llvm.maxnum.v4f16(<4 x half> %cvt.result, <4 x half> zeroinitializer)1471  %clamp = call <4 x half> @llvm.minnum.v4f16(<4 x half> %max, <4 x half> <half 1.0, half 1.0, half 1.0, half 1.0>)1472  ret <4 x half> %clamp1473}1474 1475; FIXME (GISel): Packed Vectors handling isn't great for now, so we don't end up with1476;  a build_vector to select the mixhi. Issue is more specifically with how insert_vector_elt is being1477;  legalized (bitwise ops instead of shuffle/build_vector for instance).1478define <2 x half> @v_mad_mix_v2f32_clamp_postcvt_lo(<2 x half> %src0, <2 x half> %src1, <2 x half> %src2) #0 {1479; SDAG-GFX1100-TRUE16-LABEL: v_mad_mix_v2f32_clamp_postcvt_lo:1480; SDAG-GFX1100-TRUE16:       ; %bb.0:1481; SDAG-GFX1100-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1482; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mixlo_f16 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]1483; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mixlo_f16 v0, v0, v1, v2 op_sel_hi:[1,1,1] clamp1484; SDAG-GFX1100-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)1485; SDAG-GFX1100-TRUE16-NEXT:    v_pack_b32_f16 v0, v0.l, v3.l1486; SDAG-GFX1100-TRUE16-NEXT:    s_setpc_b64 s[30:31]1487;1488; SDAG-GFX1100-FAKE16-LABEL: v_mad_mix_v2f32_clamp_postcvt_lo:1489; SDAG-GFX1100-FAKE16:       ; %bb.0:1490; SDAG-GFX1100-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1491; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mixlo_f16 v3, v0, v1, v2 op_sel_hi:[1,1,1] clamp1492; SDAG-GFX1100-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1493; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mixhi_f16 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]1494; SDAG-GFX1100-FAKE16-NEXT:    v_mov_b32_e32 v0, v31495; SDAG-GFX1100-FAKE16-NEXT:    s_setpc_b64 s[30:31]1496;1497; SDAG-GFX900-LABEL: v_mad_mix_v2f32_clamp_postcvt_lo:1498; SDAG-GFX900:       ; %bb.0:1499; SDAG-GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1500; SDAG-GFX900-NEXT:    v_mad_mixlo_f16 v3, v0, v1, v2 op_sel_hi:[1,1,1] clamp1501; SDAG-GFX900-NEXT:    v_mad_mixhi_f16 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]1502; SDAG-GFX900-NEXT:    v_mov_b32_e32 v0, v31503; SDAG-GFX900-NEXT:    s_setpc_b64 s[30:31]1504;1505; SDAG-GFX906-LABEL: v_mad_mix_v2f32_clamp_postcvt_lo:1506; SDAG-GFX906:       ; %bb.0:1507; SDAG-GFX906-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1508; SDAG-GFX906-NEXT:    v_fma_mixlo_f16 v3, v0, v1, v2 op_sel_hi:[1,1,1] clamp1509; SDAG-GFX906-NEXT:    v_fma_mixhi_f16 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]1510; SDAG-GFX906-NEXT:    v_mov_b32_e32 v0, v31511; SDAG-GFX906-NEXT:    s_setpc_b64 s[30:31]1512;1513; SDAG-VI-LABEL: v_mad_mix_v2f32_clamp_postcvt_lo:1514; SDAG-VI:       ; %bb.0:1515; SDAG-VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1516; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11517; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v0, v01518; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11519; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v1, v11520; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11521; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v2, v21522; SDAG-VI-NEXT:    v_mac_f32_e32 v5, v3, v41523; SDAG-VI-NEXT:    v_mac_f32_e32 v2, v0, v11524; SDAG-VI-NEXT:    v_cvt_f16_f32_sdwa v0, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD1525; SDAG-VI-NEXT:    v_cvt_f16_f32_e64 v1, v2 clamp1526; SDAG-VI-NEXT:    v_or_b32_e32 v0, v1, v01527; SDAG-VI-NEXT:    s_setpc_b64 s[30:31]1528;1529; SDAG-CI-LABEL: v_mad_mix_v2f32_clamp_postcvt_lo:1530; SDAG-CI:       ; %bb.0:1531; SDAG-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1532; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v5, v51533; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v3, v31534; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v4, v41535; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v2, v21536; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v01537; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v1, v11538; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v5, v51539; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v3, v31540; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v4, v41541; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v2, v21542; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v0, v01543; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v1, v11544; SDAG-CI-NEXT:    v_mac_f32_e32 v4, v0, v21545; SDAG-CI-NEXT:    v_mac_f32_e32 v5, v1, v31546; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v41547; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v1, v51548; SDAG-CI-NEXT:    v_cvt_f32_f16_e64 v0, v0 clamp1549; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v1, v11550; SDAG-CI-NEXT:    s_setpc_b64 s[30:31]1551;1552; GISEL-GFX1100-LABEL: v_mad_mix_v2f32_clamp_postcvt_lo:1553; GISEL-GFX1100:       ; %bb.0:1554; GISEL-GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1555; GISEL-GFX1100-NEXT:    v_fma_mixlo_f16 v3, v0, v1, v2 op_sel_hi:[1,1,1]1556; GISEL-GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1557; GISEL-GFX1100-NEXT:    v_mov_b32_e32 v4, v31558; GISEL-GFX1100-NEXT:    v_max_f16_e64 v3, v3, v3 clamp1559; GISEL-GFX1100-NEXT:    v_fma_mixhi_f16 v4, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]1560; GISEL-GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1561; GISEL-GFX1100-NEXT:    v_and_b32_e32 v0, 0xffff, v31562; GISEL-GFX1100-NEXT:    v_and_or_b32 v0, 0xffff0000, v4, v01563; GISEL-GFX1100-NEXT:    s_setpc_b64 s[30:31]1564;1565; GISEL-GFX900-LABEL: v_mad_mix_v2f32_clamp_postcvt_lo:1566; GISEL-GFX900:       ; %bb.0:1567; GISEL-GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1568; GISEL-GFX900-NEXT:    v_mad_mixlo_f16 v3, v0, v1, v2 op_sel_hi:[1,1,1]1569; GISEL-GFX900-NEXT:    v_max_f16_e64 v4, v3, v3 clamp1570; GISEL-GFX900-NEXT:    v_mad_mixhi_f16 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]1571; GISEL-GFX900-NEXT:    v_mov_b32_e32 v0, 0xffff00001572; GISEL-GFX900-NEXT:    v_and_or_b32 v0, v3, v0, v41573; GISEL-GFX900-NEXT:    s_setpc_b64 s[30:31]1574;1575; GISEL-GFX906-LABEL: v_mad_mix_v2f32_clamp_postcvt_lo:1576; GISEL-GFX906:       ; %bb.0:1577; GISEL-GFX906-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1578; GISEL-GFX906-NEXT:    v_fma_mixlo_f16 v3, v0, v1, v2 op_sel_hi:[1,1,1]1579; GISEL-GFX906-NEXT:    v_max_f16_e64 v4, v3, v3 clamp1580; GISEL-GFX906-NEXT:    v_fma_mixhi_f16 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]1581; GISEL-GFX906-NEXT:    v_mov_b32_e32 v0, 0xffff00001582; GISEL-GFX906-NEXT:    v_and_or_b32 v0, v3, v0, v41583; GISEL-GFX906-NEXT:    s_setpc_b64 s[30:31]1584;1585; GISEL-VI-LABEL: v_mad_mix_v2f32_clamp_postcvt_lo:1586; GISEL-VI:       ; %bb.0:1587; GISEL-VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1588; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v3, v01589; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11590; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v4, v11591; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11592; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v5, v21593; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11594; GISEL-VI-NEXT:    v_mac_f32_e32 v5, v3, v41595; GISEL-VI-NEXT:    v_mac_f32_e32 v2, v0, v11596; GISEL-VI-NEXT:    v_cvt_f16_f32_e32 v0, v51597; GISEL-VI-NEXT:    v_cvt_f16_f32_sdwa v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD1598; GISEL-VI-NEXT:    v_or_b32_e32 v0, v0, v11599; GISEL-VI-NEXT:    v_max_f16_e64 v1, v0, v0 clamp1600; GISEL-VI-NEXT:    v_and_b32_e32 v0, 0xffff0000, v01601; GISEL-VI-NEXT:    v_or_b32_e32 v0, v0, v11602; GISEL-VI-NEXT:    s_setpc_b64 s[30:31]1603;1604; GISEL-CI-LABEL: v_mad_mix_v2f32_clamp_postcvt_lo:1605; GISEL-CI:       ; %bb.0:1606; GISEL-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1607; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v1, v11608; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v3, v31609; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v5, v51610; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v0, v01611; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v2, v21612; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v4, v41613; GISEL-CI-NEXT:    v_mac_f32_e32 v5, v1, v31614; GISEL-CI-NEXT:    v_mac_f32_e32 v4, v0, v21615; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v0, v51616; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v1, v41617; GISEL-CI-NEXT:    v_lshlrev_b32_e32 v0, 16, v01618; GISEL-CI-NEXT:    v_or_b32_e32 v0, v1, v01619; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v1, v01620; GISEL-CI-NEXT:    v_and_b32_e32 v0, 0xffff0000, v01621; GISEL-CI-NEXT:    v_max_f32_e32 v1, 0, v11622; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v1, v11623; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v1, v11624; GISEL-CI-NEXT:    v_min_f32_e32 v1, 1.0, v11625; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v1, v11626; GISEL-CI-NEXT:    v_or_b32_e32 v0, v0, v11627; GISEL-CI-NEXT:    v_lshrrev_b32_e32 v1, 16, v01628; GISEL-CI-NEXT:    s_setpc_b64 s[30:31]1629  %src0.ext = fpext <2 x half> %src0 to <2 x float>1630  %src1.ext = fpext <2 x half> %src1 to <2 x float>1631  %src2.ext = fpext <2 x half> %src2 to <2 x float>1632  %result = tail call <2 x float> @llvm.fmuladd.v2f32(<2 x float> %src0.ext, <2 x float> %src1.ext, <2 x float> %src2.ext)1633  %cvt.result = fptrunc <2 x float> %result to <2 x half>1634  %cvt.lo = extractelement <2 x half> %cvt.result, i32 01635  %max.lo = call half @llvm.maxnum.f16(half %cvt.lo, half 0.0)1636  %clamp.lo = call half @llvm.minnum.f16(half %max.lo, half 1.0)1637  %insert = insertelement <2 x half> %cvt.result, half %clamp.lo, i32 01638  ret <2 x half> %insert1639}1640 1641define <2 x half> @v_mad_mix_v2f32_clamp_postcvt_hi(<2 x half> %src0, <2 x half> %src1, <2 x half> %src2) #0 {1642; SDAG-GFX1100-TRUE16-LABEL: v_mad_mix_v2f32_clamp_postcvt_hi:1643; SDAG-GFX1100-TRUE16:       ; %bb.0:1644; SDAG-GFX1100-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1645; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mixlo_f16 v3, v0, v1, v2 op_sel_hi:[1,1,1]1646; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mixlo_f16 v0, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1647; SDAG-GFX1100-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)1648; SDAG-GFX1100-TRUE16-NEXT:    v_pack_b32_f16 v0, v3.l, v0.l1649; SDAG-GFX1100-TRUE16-NEXT:    s_setpc_b64 s[30:31]1650;1651; SDAG-GFX1100-FAKE16-LABEL: v_mad_mix_v2f32_clamp_postcvt_hi:1652; SDAG-GFX1100-FAKE16:       ; %bb.0:1653; SDAG-GFX1100-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1654; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mixlo_f16 v3, v0, v1, v2 op_sel_hi:[1,1,1]1655; SDAG-GFX1100-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1656; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mixhi_f16 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1657; SDAG-GFX1100-FAKE16-NEXT:    v_mov_b32_e32 v0, v31658; SDAG-GFX1100-FAKE16-NEXT:    s_setpc_b64 s[30:31]1659;1660; SDAG-GFX900-LABEL: v_mad_mix_v2f32_clamp_postcvt_hi:1661; SDAG-GFX900:       ; %bb.0:1662; SDAG-GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1663; SDAG-GFX900-NEXT:    v_mad_mixlo_f16 v3, v0, v1, v2 op_sel_hi:[1,1,1]1664; SDAG-GFX900-NEXT:    v_mad_mixhi_f16 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1665; SDAG-GFX900-NEXT:    v_mov_b32_e32 v0, v31666; SDAG-GFX900-NEXT:    s_setpc_b64 s[30:31]1667;1668; SDAG-GFX906-LABEL: v_mad_mix_v2f32_clamp_postcvt_hi:1669; SDAG-GFX906:       ; %bb.0:1670; SDAG-GFX906-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1671; SDAG-GFX906-NEXT:    v_fma_mixlo_f16 v3, v0, v1, v2 op_sel_hi:[1,1,1]1672; SDAG-GFX906-NEXT:    v_fma_mixhi_f16 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1673; SDAG-GFX906-NEXT:    v_mov_b32_e32 v0, v31674; SDAG-GFX906-NEXT:    s_setpc_b64 s[30:31]1675;1676; SDAG-VI-LABEL: v_mad_mix_v2f32_clamp_postcvt_hi:1677; SDAG-VI:       ; %bb.0:1678; SDAG-VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1679; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11680; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v0, v01681; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11682; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v1, v11683; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11684; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v2, v21685; SDAG-VI-NEXT:    v_mac_f32_e32 v5, v3, v41686; SDAG-VI-NEXT:    v_mac_f32_e32 v2, v0, v11687; SDAG-VI-NEXT:    v_cvt_f16_f32_sdwa v0, v5 clamp dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD1688; SDAG-VI-NEXT:    v_cvt_f16_f32_e32 v1, v21689; SDAG-VI-NEXT:    v_or_b32_e32 v0, v1, v01690; SDAG-VI-NEXT:    s_setpc_b64 s[30:31]1691;1692; SDAG-CI-LABEL: v_mad_mix_v2f32_clamp_postcvt_hi:1693; SDAG-CI:       ; %bb.0:1694; SDAG-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1695; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v4, v41696; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v2, v21697; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v5, v51698; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v3, v31699; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v1, v11700; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v01701; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v4, v41702; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v2, v21703; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v5, v51704; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v3, v31705; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v1, v11706; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v0, v01707; SDAG-CI-NEXT:    v_mac_f32_e32 v5, v1, v31708; SDAG-CI-NEXT:    v_mac_f32_e32 v4, v0, v21709; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v41710; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v1, v51711; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v0, v01712; SDAG-CI-NEXT:    v_cvt_f32_f16_e64 v1, v1 clamp1713; SDAG-CI-NEXT:    s_setpc_b64 s[30:31]1714;1715; GISEL-GFX1100-LABEL: v_mad_mix_v2f32_clamp_postcvt_hi:1716; GISEL-GFX1100:       ; %bb.0:1717; GISEL-GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1718; GISEL-GFX1100-NEXT:    v_fma_mixlo_f16 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1719; GISEL-GFX1100-NEXT:    v_fma_mixlo_f16 v4, v0, v1, v2 op_sel_hi:[1,1,1]1720; GISEL-GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1721; GISEL-GFX1100-NEXT:    v_and_b32_e32 v3, 0xffff, v31722; GISEL-GFX1100-NEXT:    v_fma_mixhi_f16 v4, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]1723; GISEL-GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1724; GISEL-GFX1100-NEXT:    v_lshlrev_b32_e32 v0, 16, v31725; GISEL-GFX1100-NEXT:    v_and_or_b32 v0, 0xffff, v4, v01726; GISEL-GFX1100-NEXT:    s_setpc_b64 s[30:31]1727;1728; GISEL-GFX900-LABEL: v_mad_mix_v2f32_clamp_postcvt_hi:1729; GISEL-GFX900:       ; %bb.0:1730; GISEL-GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1731; GISEL-GFX900-NEXT:    v_mad_mixlo_f16 v3, v0, v1, v2 op_sel_hi:[1,1,1]1732; GISEL-GFX900-NEXT:    v_mad_mixlo_f16 v4, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1733; GISEL-GFX900-NEXT:    v_mad_mixhi_f16 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]1734; GISEL-GFX900-NEXT:    v_and_b32_e32 v0, 0xffff, v41735; GISEL-GFX900-NEXT:    v_lshlrev_b32_e32 v0, 16, v01736; GISEL-GFX900-NEXT:    v_mov_b32_e32 v1, 0xffff1737; GISEL-GFX900-NEXT:    v_and_or_b32 v0, v3, v1, v01738; GISEL-GFX900-NEXT:    s_setpc_b64 s[30:31]1739;1740; GISEL-GFX906-LABEL: v_mad_mix_v2f32_clamp_postcvt_hi:1741; GISEL-GFX906:       ; %bb.0:1742; GISEL-GFX906-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1743; GISEL-GFX906-NEXT:    v_fma_mixlo_f16 v3, v0, v1, v2 op_sel_hi:[1,1,1]1744; GISEL-GFX906-NEXT:    v_fma_mixlo_f16 v4, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1745; GISEL-GFX906-NEXT:    v_fma_mixhi_f16 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]1746; GISEL-GFX906-NEXT:    v_and_b32_e32 v0, 0xffff, v41747; GISEL-GFX906-NEXT:    v_lshlrev_b32_e32 v0, 16, v01748; GISEL-GFX906-NEXT:    v_mov_b32_e32 v1, 0xffff1749; GISEL-GFX906-NEXT:    v_and_or_b32 v0, v3, v1, v01750; GISEL-GFX906-NEXT:    s_setpc_b64 s[30:31]1751;1752; GISEL-VI-LABEL: v_mad_mix_v2f32_clamp_postcvt_hi:1753; GISEL-VI:       ; %bb.0:1754; GISEL-VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1755; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v3, v01756; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11757; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v4, v11758; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11759; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v5, v21760; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11761; GISEL-VI-NEXT:    v_mac_f32_e32 v5, v3, v41762; GISEL-VI-NEXT:    v_mac_f32_e32 v2, v0, v11763; GISEL-VI-NEXT:    v_cvt_f16_f32_e32 v0, v51764; GISEL-VI-NEXT:    v_cvt_f16_f32_sdwa v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD1765; GISEL-VI-NEXT:    v_or_b32_e32 v0, v0, v11766; GISEL-VI-NEXT:    v_max_f16_sdwa v1, v0, v0 clamp dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11767; GISEL-VI-NEXT:    v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1768; GISEL-VI-NEXT:    s_setpc_b64 s[30:31]1769;1770; GISEL-CI-LABEL: v_mad_mix_v2f32_clamp_postcvt_hi:1771; GISEL-CI:       ; %bb.0:1772; GISEL-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1773; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v1, v11774; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v3, v31775; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v5, v51776; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v0, v01777; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v2, v21778; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v4, v41779; GISEL-CI-NEXT:    v_mac_f32_e32 v5, v1, v31780; GISEL-CI-NEXT:    v_mac_f32_e32 v4, v0, v21781; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v0, v51782; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v1, v41783; GISEL-CI-NEXT:    v_lshlrev_b32_e32 v0, 16, v01784; GISEL-CI-NEXT:    v_or_b32_e32 v0, v1, v01785; GISEL-CI-NEXT:    v_lshrrev_b32_e32 v1, 16, v01786; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v1, v11787; GISEL-CI-NEXT:    v_and_b32_e32 v0, 0xffff, v01788; GISEL-CI-NEXT:    v_max_f32_e32 v1, 0, v11789; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v1, v11790; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v1, v11791; GISEL-CI-NEXT:    v_min_f32_e32 v1, 1.0, v11792; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v1, v11793; GISEL-CI-NEXT:    v_lshlrev_b32_e32 v1, 16, v11794; GISEL-CI-NEXT:    v_or_b32_e32 v0, v0, v11795; GISEL-CI-NEXT:    v_lshrrev_b32_e32 v1, 16, v01796; GISEL-CI-NEXT:    s_setpc_b64 s[30:31]1797  %src0.ext = fpext <2 x half> %src0 to <2 x float>1798  %src1.ext = fpext <2 x half> %src1 to <2 x float>1799  %src2.ext = fpext <2 x half> %src2 to <2 x float>1800  %result = tail call <2 x float> @llvm.fmuladd.v2f32(<2 x float> %src0.ext, <2 x float> %src1.ext, <2 x float> %src2.ext)1801  %cvt.result = fptrunc <2 x float> %result to <2 x half>1802  %cvt.hi = extractelement <2 x half> %cvt.result, i32 11803  %max.hi = call half @llvm.maxnum.f16(half %cvt.hi, half 0.0)1804  %clamp.hi = call half @llvm.minnum.f16(half %max.hi, half 1.0)1805  %insert = insertelement <2 x half> %cvt.result, half %clamp.hi, i32 11806  ret <2 x half> %insert1807}1808 1809; FIXME (DAG): Should be able to use mixlo/mixhi1810 1811define <2 x half> @v_mad_mix_v2f32_clamp_precvt(<2 x half> %src0, <2 x half> %src1, <2 x half> %src2) #0 {1812; SDAG-GFX1100-TRUE16-LABEL: v_mad_mix_v2f32_clamp_precvt:1813; SDAG-GFX1100-TRUE16:       ; %bb.0:1814; SDAG-GFX1100-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1815; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mix_f32 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1816; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mix_f32 v1, v0, v1, v2 op_sel_hi:[1,1,1] clamp1817; SDAG-GFX1100-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1818; SDAG-GFX1100-TRUE16-NEXT:    v_cvt_f16_f32_e32 v0.l, v31819; SDAG-GFX1100-TRUE16-NEXT:    v_cvt_f16_f32_e32 v0.h, v11820; SDAG-GFX1100-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)1821; SDAG-GFX1100-TRUE16-NEXT:    v_pack_b32_f16 v0, v0.h, v0.l1822; SDAG-GFX1100-TRUE16-NEXT:    s_setpc_b64 s[30:31]1823;1824; SDAG-GFX1100-FAKE16-LABEL: v_mad_mix_v2f32_clamp_precvt:1825; SDAG-GFX1100-FAKE16:       ; %bb.0:1826; SDAG-GFX1100-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1827; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mix_f32 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1828; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,1] clamp1829; SDAG-GFX1100-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1830; SDAG-GFX1100-FAKE16-NEXT:    v_cvt_f16_f32_e32 v1, v31831; SDAG-GFX1100-FAKE16-NEXT:    v_cvt_f16_f32_e32 v0, v01832; SDAG-GFX1100-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)1833; SDAG-GFX1100-FAKE16-NEXT:    v_pack_b32_f16 v0, v0, v11834; SDAG-GFX1100-FAKE16-NEXT:    s_setpc_b64 s[30:31]1835;1836; SDAG-GFX900-LABEL: v_mad_mix_v2f32_clamp_precvt:1837; SDAG-GFX900:       ; %bb.0:1838; SDAG-GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1839; SDAG-GFX900-NEXT:    v_mad_mix_f32 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1840; SDAG-GFX900-NEXT:    v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,1] clamp1841; SDAG-GFX900-NEXT:    v_cvt_f16_f32_e32 v1, v31842; SDAG-GFX900-NEXT:    v_cvt_f16_f32_e32 v0, v01843; SDAG-GFX900-NEXT:    v_pack_b32_f16 v0, v0, v11844; SDAG-GFX900-NEXT:    s_setpc_b64 s[30:31]1845;1846; SDAG-GFX906-LABEL: v_mad_mix_v2f32_clamp_precvt:1847; SDAG-GFX906:       ; %bb.0:1848; SDAG-GFX906-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1849; SDAG-GFX906-NEXT:    v_fma_mix_f32 v3, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1850; SDAG-GFX906-NEXT:    v_fma_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,1] clamp1851; SDAG-GFX906-NEXT:    v_cvt_f16_f32_e32 v1, v31852; SDAG-GFX906-NEXT:    v_cvt_f16_f32_e32 v0, v01853; SDAG-GFX906-NEXT:    v_pack_b32_f16 v0, v0, v11854; SDAG-GFX906-NEXT:    s_setpc_b64 s[30:31]1855;1856; SDAG-VI-LABEL: v_mad_mix_v2f32_clamp_precvt:1857; SDAG-VI:       ; %bb.0:1858; SDAG-VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1859; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11860; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v0, v01861; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11862; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v1, v11863; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11864; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v2, v21865; SDAG-VI-NEXT:    v_mad_f32 v3, v3, v4, v5 clamp1866; SDAG-VI-NEXT:    v_mad_f32 v0, v0, v1, v2 clamp1867; SDAG-VI-NEXT:    v_cvt_f16_f32_sdwa v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD1868; SDAG-VI-NEXT:    v_cvt_f16_f32_e32 v0, v01869; SDAG-VI-NEXT:    v_or_b32_e32 v0, v0, v11870; SDAG-VI-NEXT:    s_setpc_b64 s[30:31]1871;1872; SDAG-CI-LABEL: v_mad_mix_v2f32_clamp_precvt:1873; SDAG-CI:       ; %bb.0:1874; SDAG-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1875; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v5, v51876; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v3, v31877; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v4, v41878; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v2, v21879; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v01880; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v1, v11881; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v5, v51882; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v3, v31883; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v4, v41884; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v2, v21885; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v0, v01886; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v1, v11887; SDAG-CI-NEXT:    v_mad_f32 v0, v0, v2, v4 clamp1888; SDAG-CI-NEXT:    v_mad_f32 v1, v1, v3, v5 clamp1889; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v01890; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v1, v11891; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v0, v01892; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v1, v11893; SDAG-CI-NEXT:    s_setpc_b64 s[30:31]1894;1895; GISEL-GFX1100-LABEL: v_mad_mix_v2f32_clamp_precvt:1896; GISEL-GFX1100:       ; %bb.0:1897; GISEL-GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1898; GISEL-GFX1100-NEXT:    v_fma_mix_f32 v3, v0, v1, v2 op_sel_hi:[1,1,1] clamp1899; GISEL-GFX1100-NEXT:    v_fma_mix_f32 v0, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1900; GISEL-GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1901; GISEL-GFX1100-NEXT:    v_cvt_f16_f32_e32 v1, v31902; GISEL-GFX1100-NEXT:    v_cvt_f16_f32_e32 v0, v01903; GISEL-GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_1)1904; GISEL-GFX1100-NEXT:    v_pack_b32_f16 v0, v1, v01905; GISEL-GFX1100-NEXT:    s_setpc_b64 s[30:31]1906;1907; GISEL-GFX900-LABEL: v_mad_mix_v2f32_clamp_precvt:1908; GISEL-GFX900:       ; %bb.0:1909; GISEL-GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1910; GISEL-GFX900-NEXT:    v_mad_mix_f32 v3, v0, v1, v2 op_sel_hi:[1,1,1] clamp1911; GISEL-GFX900-NEXT:    v_mad_mix_f32 v0, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1912; GISEL-GFX900-NEXT:    v_cvt_f16_f32_e32 v1, v31913; GISEL-GFX900-NEXT:    v_cvt_f16_f32_e32 v0, v01914; GISEL-GFX900-NEXT:    v_pack_b32_f16 v0, v1, v01915; GISEL-GFX900-NEXT:    s_setpc_b64 s[30:31]1916;1917; GISEL-GFX906-LABEL: v_mad_mix_v2f32_clamp_precvt:1918; GISEL-GFX906:       ; %bb.0:1919; GISEL-GFX906-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1920; GISEL-GFX906-NEXT:    v_fma_mix_f32 v3, v0, v1, v2 op_sel_hi:[1,1,1] clamp1921; GISEL-GFX906-NEXT:    v_fma_mix_f32 v0, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1922; GISEL-GFX906-NEXT:    v_cvt_f16_f32_e32 v1, v31923; GISEL-GFX906-NEXT:    v_cvt_f16_f32_e32 v0, v01924; GISEL-GFX906-NEXT:    v_pack_b32_f16 v0, v1, v01925; GISEL-GFX906-NEXT:    s_setpc_b64 s[30:31]1926;1927; GISEL-VI-LABEL: v_mad_mix_v2f32_clamp_precvt:1928; GISEL-VI:       ; %bb.0:1929; GISEL-VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1930; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v3, v01931; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11932; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v4, v11933; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11934; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v5, v21935; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11936; GISEL-VI-NEXT:    v_mad_f32 v3, v3, v4, v5 clamp1937; GISEL-VI-NEXT:    v_mad_f32 v0, v0, v1, v2 clamp1938; GISEL-VI-NEXT:    v_cvt_f16_f32_e32 v1, v31939; GISEL-VI-NEXT:    v_cvt_f16_f32_sdwa v0, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD1940; GISEL-VI-NEXT:    v_or_b32_e32 v0, v1, v01941; GISEL-VI-NEXT:    s_setpc_b64 s[30:31]1942;1943; GISEL-CI-LABEL: v_mad_mix_v2f32_clamp_precvt:1944; GISEL-CI:       ; %bb.0:1945; GISEL-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1946; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v0, v01947; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v1, v11948; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v2, v21949; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v3, v31950; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v4, v41951; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v5, v51952; GISEL-CI-NEXT:    v_mad_f32 v0, v0, v2, v4 clamp1953; GISEL-CI-NEXT:    v_mad_f32 v1, v1, v3, v5 clamp1954; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v0, v01955; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v1, v11956; GISEL-CI-NEXT:    s_setpc_b64 s[30:31]1957  %src0.ext = fpext <2 x half> %src0 to <2 x float>1958  %src1.ext = fpext <2 x half> %src1 to <2 x float>1959  %src2.ext = fpext <2 x half> %src2 to <2 x float>1960  %result = tail call <2 x float> @llvm.fmuladd.v2f32(<2 x float> %src0.ext, <2 x float> %src1.ext, <2 x float> %src2.ext)1961  %max = call <2 x float> @llvm.maxnum.v2f32(<2 x float> %result, <2 x float> zeroinitializer)1962  %clamp = call <2 x float> @llvm.minnum.v2f32(<2 x float> %max, <2 x float> <float 1.0, float 1.0>)1963  %cvt.result = fptrunc <2 x float> %clamp to <2 x half>1964  ret <2 x half> %cvt.result1965}1966 1967; FIXME (DAG): Handling undef 4th component1968 1969define <3 x half> @v_mad_mix_v3f32_clamp_precvt(<3 x half> %src0, <3 x half> %src1, <3 x half> %src2) #0 {1970; SDAG-GFX1100-TRUE16-LABEL: v_mad_mix_v3f32_clamp_precvt:1971; SDAG-GFX1100-TRUE16:       ; %bb.0:1972; SDAG-GFX1100-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1973; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mix_f32 v6, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1974; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mix_f32 v2, v0, v2, v4 op_sel_hi:[1,1,1] clamp1975; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mix_f32 v1, v1, v3, v5 op_sel_hi:[1,1,1] clamp1976; SDAG-GFX1100-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)1977; SDAG-GFX1100-TRUE16-NEXT:    v_cvt_f16_f32_e32 v0.l, v61978; SDAG-GFX1100-TRUE16-NEXT:    v_cvt_f16_f32_e32 v0.h, v21979; SDAG-GFX1100-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)1980; SDAG-GFX1100-TRUE16-NEXT:    v_cvt_f16_f32_e32 v1.l, v11981; SDAG-GFX1100-TRUE16-NEXT:    v_pack_b32_f16 v0, v0.h, v0.l1982; SDAG-GFX1100-TRUE16-NEXT:    s_setpc_b64 s[30:31]1983;1984; SDAG-GFX1100-FAKE16-LABEL: v_mad_mix_v3f32_clamp_precvt:1985; SDAG-GFX1100-FAKE16:       ; %bb.0:1986; SDAG-GFX1100-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1987; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mix_f32 v6, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1988; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mix_f32 v0, v0, v2, v4 op_sel_hi:[1,1,1] clamp1989; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mix_f32 v1, v1, v3, v5 op_sel_hi:[1,1,1] clamp1990; SDAG-GFX1100-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)1991; SDAG-GFX1100-FAKE16-NEXT:    v_cvt_f16_f32_e32 v2, v61992; SDAG-GFX1100-FAKE16-NEXT:    v_cvt_f16_f32_e32 v0, v01993; SDAG-GFX1100-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)1994; SDAG-GFX1100-FAKE16-NEXT:    v_cvt_f16_f32_e32 v1, v11995; SDAG-GFX1100-FAKE16-NEXT:    v_pack_b32_f16 v0, v0, v21996; SDAG-GFX1100-FAKE16-NEXT:    s_setpc_b64 s[30:31]1997;1998; SDAG-GFX900-LABEL: v_mad_mix_v3f32_clamp_precvt:1999; SDAG-GFX900:       ; %bb.0:2000; SDAG-GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2001; SDAG-GFX900-NEXT:    v_mad_mix_f32 v6, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp2002; SDAG-GFX900-NEXT:    v_mad_mix_f32 v0, v0, v2, v4 op_sel_hi:[1,1,1] clamp2003; SDAG-GFX900-NEXT:    v_cvt_f16_f32_e32 v2, v62004; SDAG-GFX900-NEXT:    v_cvt_f16_f32_e32 v0, v02005; SDAG-GFX900-NEXT:    v_mad_mix_f32 v1, v1, v3, v5 op_sel_hi:[1,1,1] clamp2006; SDAG-GFX900-NEXT:    v_cvt_f16_f32_e32 v1, v12007; SDAG-GFX900-NEXT:    v_pack_b32_f16 v0, v0, v22008; SDAG-GFX900-NEXT:    s_setpc_b64 s[30:31]2009;2010; SDAG-GFX906-LABEL: v_mad_mix_v3f32_clamp_precvt:2011; SDAG-GFX906:       ; %bb.0:2012; SDAG-GFX906-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2013; SDAG-GFX906-NEXT:    v_fma_mix_f32 v6, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp2014; SDAG-GFX906-NEXT:    v_fma_mix_f32 v0, v0, v2, v4 op_sel_hi:[1,1,1] clamp2015; SDAG-GFX906-NEXT:    v_cvt_f16_f32_e32 v2, v62016; SDAG-GFX906-NEXT:    v_cvt_f16_f32_e32 v0, v02017; SDAG-GFX906-NEXT:    v_fma_mix_f32 v1, v1, v3, v5 op_sel_hi:[1,1,1] clamp2018; SDAG-GFX906-NEXT:    v_cvt_f16_f32_e32 v1, v12019; SDAG-GFX906-NEXT:    v_pack_b32_f16 v0, v0, v22020; SDAG-GFX906-NEXT:    s_setpc_b64 s[30:31]2021;2022; SDAG-VI-LABEL: v_mad_mix_v3f32_clamp_precvt:2023; SDAG-VI:       ; %bb.0:2024; SDAG-VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2025; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v6, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12026; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v0, v02027; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v7, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12028; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v2, v22029; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v8, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12030; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v4, v42031; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v1, v12032; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v3, v32033; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v5, v52034; SDAG-VI-NEXT:    v_mad_f32 v6, v6, v7, v8 clamp2035; SDAG-VI-NEXT:    v_mad_f32 v0, v0, v2, v4 clamp2036; SDAG-VI-NEXT:    v_cvt_f16_f32_sdwa v2, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD2037; SDAG-VI-NEXT:    v_cvt_f16_f32_e32 v0, v02038; SDAG-VI-NEXT:    v_mad_f32 v1, v1, v3, v5 clamp2039; SDAG-VI-NEXT:    v_cvt_f16_f32_e32 v1, v12040; SDAG-VI-NEXT:    v_or_b32_e32 v0, v0, v22041; SDAG-VI-NEXT:    s_setpc_b64 s[30:31]2042;2043; SDAG-CI-LABEL: v_mad_mix_v3f32_clamp_precvt:2044; SDAG-CI:       ; %bb.0:2045; SDAG-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2046; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v8, v82047; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v5, v52048; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v7, v72049; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v4, v42050; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v2, v22051; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v6, v62052; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v3, v32053; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v02054; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v1, v12055; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v8, v82056; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v5, v52057; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v7, v72058; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v4, v42059; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v6, v62060; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v3, v32061; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v0, v02062; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v1, v12063; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v2, v22064; SDAG-CI-NEXT:    v_mad_f32 v0, v0, v3, v6 clamp2065; SDAG-CI-NEXT:    v_mad_f32 v1, v1, v4, v7 clamp2066; SDAG-CI-NEXT:    v_mad_f32 v2, v2, v5, v8 clamp2067; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v02068; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v1, v12069; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v2, v22070; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v0, v02071; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v1, v12072; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v2, v22073; SDAG-CI-NEXT:    s_setpc_b64 s[30:31]2074;2075; GISEL-GFX1100-LABEL: v_mad_mix_v3f32_clamp_precvt:2076; GISEL-GFX1100:       ; %bb.0:2077; GISEL-GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2078; GISEL-GFX1100-NEXT:    v_fma_mix_f32 v6, v0, v2, v4 op_sel_hi:[1,1,1] clamp2079; GISEL-GFX1100-NEXT:    v_fma_mix_f32 v0, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp2080; GISEL-GFX1100-NEXT:    v_fma_mix_f32 v1, v1, v3, v5 op_sel_hi:[1,1,1] clamp2081; GISEL-GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)2082; GISEL-GFX1100-NEXT:    v_cvt_f16_f32_e32 v2, v62083; GISEL-GFX1100-NEXT:    v_cvt_f16_f32_e32 v0, v02084; GISEL-GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)2085; GISEL-GFX1100-NEXT:    v_cvt_f16_f32_e32 v1, v12086; GISEL-GFX1100-NEXT:    v_pack_b32_f16 v0, v2, v02087; GISEL-GFX1100-NEXT:    s_setpc_b64 s[30:31]2088;2089; GISEL-GFX900-LABEL: v_mad_mix_v3f32_clamp_precvt:2090; GISEL-GFX900:       ; %bb.0:2091; GISEL-GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2092; GISEL-GFX900-NEXT:    v_mad_mix_f32 v6, v0, v2, v4 op_sel_hi:[1,1,1] clamp2093; GISEL-GFX900-NEXT:    v_mad_mix_f32 v0, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp2094; GISEL-GFX900-NEXT:    v_cvt_f16_f32_e32 v2, v62095; GISEL-GFX900-NEXT:    v_cvt_f16_f32_e32 v0, v02096; GISEL-GFX900-NEXT:    v_mad_mix_f32 v1, v1, v3, v5 op_sel_hi:[1,1,1] clamp2097; GISEL-GFX900-NEXT:    v_cvt_f16_f32_e32 v1, v12098; GISEL-GFX900-NEXT:    v_pack_b32_f16 v0, v2, v02099; GISEL-GFX900-NEXT:    s_setpc_b64 s[30:31]2100;2101; GISEL-GFX906-LABEL: v_mad_mix_v3f32_clamp_precvt:2102; GISEL-GFX906:       ; %bb.0:2103; GISEL-GFX906-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2104; GISEL-GFX906-NEXT:    v_fma_mix_f32 v6, v0, v2, v4 op_sel_hi:[1,1,1] clamp2105; GISEL-GFX906-NEXT:    v_fma_mix_f32 v0, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp2106; GISEL-GFX906-NEXT:    v_cvt_f16_f32_e32 v2, v62107; GISEL-GFX906-NEXT:    v_cvt_f16_f32_e32 v0, v02108; GISEL-GFX906-NEXT:    v_fma_mix_f32 v1, v1, v3, v5 op_sel_hi:[1,1,1] clamp2109; GISEL-GFX906-NEXT:    v_cvt_f16_f32_e32 v1, v12110; GISEL-GFX906-NEXT:    v_pack_b32_f16 v0, v2, v02111; GISEL-GFX906-NEXT:    s_setpc_b64 s[30:31]2112;2113; GISEL-VI-LABEL: v_mad_mix_v3f32_clamp_precvt:2114; GISEL-VI:       ; %bb.0:2115; GISEL-VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2116; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v6, v02117; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12118; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v7, v22119; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12120; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v8, v42121; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12122; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v1, v12123; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v3, v32124; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v5, v52125; GISEL-VI-NEXT:    v_mad_f32 v6, v6, v7, v8 clamp2126; GISEL-VI-NEXT:    v_mad_f32 v0, v0, v2, v4 clamp2127; GISEL-VI-NEXT:    v_cvt_f16_f32_e32 v2, v62128; GISEL-VI-NEXT:    v_cvt_f16_f32_sdwa v0, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD2129; GISEL-VI-NEXT:    v_mad_f32 v1, v1, v3, v5 clamp2130; GISEL-VI-NEXT:    v_cvt_f16_f32_e32 v1, v12131; GISEL-VI-NEXT:    v_or_b32_e32 v0, v2, v02132; GISEL-VI-NEXT:    s_setpc_b64 s[30:31]2133;2134; GISEL-CI-LABEL: v_mad_mix_v3f32_clamp_precvt:2135; GISEL-CI:       ; %bb.0:2136; GISEL-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2137; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v0, v02138; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v1, v12139; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v2, v22140; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v3, v32141; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v4, v42142; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v5, v52143; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v6, v62144; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v7, v72145; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v8, v82146; GISEL-CI-NEXT:    v_mad_f32 v0, v0, v3, v6 clamp2147; GISEL-CI-NEXT:    v_mad_f32 v1, v1, v4, v7 clamp2148; GISEL-CI-NEXT:    v_mad_f32 v2, v2, v5, v8 clamp2149; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v0, v02150; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v1, v12151; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v2, v22152; GISEL-CI-NEXT:    s_setpc_b64 s[30:31]2153  %src0.ext = fpext <3 x half> %src0 to <3 x float>2154  %src1.ext = fpext <3 x half> %src1 to <3 x float>2155  %src2.ext = fpext <3 x half> %src2 to <3 x float>2156  %result = tail call <3 x float> @llvm.fmuladd.v3f32(<3 x float> %src0.ext, <3 x float> %src1.ext, <3 x float> %src2.ext)2157  %max = call <3 x float> @llvm.maxnum.v3f32(<3 x float> %result, <3 x float> zeroinitializer)2158  %clamp = call <3 x float> @llvm.minnum.v3f32(<3 x float> %max, <3 x float> <float 1.0, float 1.0, float 1.0>)2159  %cvt.result = fptrunc <3 x float> %clamp to <3 x half>2160  ret <3 x half> %cvt.result2161}2162 2163define <4 x half> @v_mad_mix_v4f32_clamp_precvt(<4 x half> %src0, <4 x half> %src1, <4 x half> %src2) #0 {2164; SDAG-GFX1100-TRUE16-LABEL: v_mad_mix_v4f32_clamp_precvt:2165; SDAG-GFX1100-TRUE16:       ; %bb.0:2166; SDAG-GFX1100-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2167; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mix_f32 v6, v1, v3, v5 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp2168; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mix_f32 v7, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp2169; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mix_f32 v2, v0, v2, v4 op_sel_hi:[1,1,1] clamp2170; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mix_f32 v3, v1, v3, v5 op_sel_hi:[1,1,1] clamp2171; SDAG-GFX1100-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2172; SDAG-GFX1100-TRUE16-NEXT:    v_cvt_f16_f32_e32 v1.l, v62173; SDAG-GFX1100-TRUE16-NEXT:    v_cvt_f16_f32_e32 v0.l, v72174; SDAG-GFX1100-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2175; SDAG-GFX1100-TRUE16-NEXT:    v_cvt_f16_f32_e32 v0.h, v22176; SDAG-GFX1100-TRUE16-NEXT:    v_cvt_f16_f32_e32 v1.h, v32177; SDAG-GFX1100-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2178; SDAG-GFX1100-TRUE16-NEXT:    v_pack_b32_f16 v0, v0.h, v0.l2179; SDAG-GFX1100-TRUE16-NEXT:    v_pack_b32_f16 v1, v1.h, v1.l2180; SDAG-GFX1100-TRUE16-NEXT:    s_setpc_b64 s[30:31]2181;2182; SDAG-GFX1100-FAKE16-LABEL: v_mad_mix_v4f32_clamp_precvt:2183; SDAG-GFX1100-FAKE16:       ; %bb.0:2184; SDAG-GFX1100-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2185; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mix_f32 v6, v1, v3, v5 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp2186; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mix_f32 v7, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp2187; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mix_f32 v0, v0, v2, v4 op_sel_hi:[1,1,1] clamp2188; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mix_f32 v1, v1, v3, v5 op_sel_hi:[1,1,1] clamp2189; SDAG-GFX1100-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2190; SDAG-GFX1100-FAKE16-NEXT:    v_cvt_f16_f32_e32 v2, v62191; SDAG-GFX1100-FAKE16-NEXT:    v_cvt_f16_f32_e32 v3, v72192; SDAG-GFX1100-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2193; SDAG-GFX1100-FAKE16-NEXT:    v_cvt_f16_f32_e32 v0, v02194; SDAG-GFX1100-FAKE16-NEXT:    v_cvt_f16_f32_e32 v1, v12195; SDAG-GFX1100-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2196; SDAG-GFX1100-FAKE16-NEXT:    v_pack_b32_f16 v0, v0, v32197; SDAG-GFX1100-FAKE16-NEXT:    v_pack_b32_f16 v1, v1, v22198; SDAG-GFX1100-FAKE16-NEXT:    s_setpc_b64 s[30:31]2199;2200; SDAG-GFX900-LABEL: v_mad_mix_v4f32_clamp_precvt:2201; SDAG-GFX900:       ; %bb.0:2202; SDAG-GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2203; SDAG-GFX900-NEXT:    v_mad_mix_f32 v6, v1, v3, v5 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp2204; SDAG-GFX900-NEXT:    v_mad_mix_f32 v1, v1, v3, v5 op_sel_hi:[1,1,1] clamp2205; SDAG-GFX900-NEXT:    v_mad_mix_f32 v3, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp2206; SDAG-GFX900-NEXT:    v_mad_mix_f32 v0, v0, v2, v4 op_sel_hi:[1,1,1] clamp2207; SDAG-GFX900-NEXT:    v_cvt_f16_f32_e32 v2, v62208; SDAG-GFX900-NEXT:    v_cvt_f16_f32_e32 v3, v32209; SDAG-GFX900-NEXT:    v_cvt_f16_f32_e32 v0, v02210; SDAG-GFX900-NEXT:    v_cvt_f16_f32_e32 v1, v12211; SDAG-GFX900-NEXT:    v_pack_b32_f16 v0, v0, v32212; SDAG-GFX900-NEXT:    v_pack_b32_f16 v1, v1, v22213; SDAG-GFX900-NEXT:    s_setpc_b64 s[30:31]2214;2215; SDAG-GFX906-LABEL: v_mad_mix_v4f32_clamp_precvt:2216; SDAG-GFX906:       ; %bb.0:2217; SDAG-GFX906-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2218; SDAG-GFX906-NEXT:    v_fma_mix_f32 v6, v1, v3, v5 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp2219; SDAG-GFX906-NEXT:    v_fma_mix_f32 v1, v1, v3, v5 op_sel_hi:[1,1,1] clamp2220; SDAG-GFX906-NEXT:    v_fma_mix_f32 v3, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp2221; SDAG-GFX906-NEXT:    v_fma_mix_f32 v0, v0, v2, v4 op_sel_hi:[1,1,1] clamp2222; SDAG-GFX906-NEXT:    v_cvt_f16_f32_e32 v2, v62223; SDAG-GFX906-NEXT:    v_cvt_f16_f32_e32 v3, v32224; SDAG-GFX906-NEXT:    v_cvt_f16_f32_e32 v0, v02225; SDAG-GFX906-NEXT:    v_cvt_f16_f32_e32 v1, v12226; SDAG-GFX906-NEXT:    v_pack_b32_f16 v0, v0, v32227; SDAG-GFX906-NEXT:    v_pack_b32_f16 v1, v1, v22228; SDAG-GFX906-NEXT:    s_setpc_b64 s[30:31]2229;2230; SDAG-VI-LABEL: v_mad_mix_v4f32_clamp_precvt:2231; SDAG-VI:       ; %bb.0:2232; SDAG-VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2233; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v6, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12234; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v7, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12235; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v0, v02236; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v1, v12237; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v8, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12238; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v9, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12239; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v2, v22240; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v3, v32241; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v10, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12242; SDAG-VI-NEXT:    v_cvt_f32_f16_sdwa v11, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12243; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v5, v52244; SDAG-VI-NEXT:    v_cvt_f32_f16_e32 v4, v42245; SDAG-VI-NEXT:    v_mad_f32 v7, v7, v9, v10 clamp2246; SDAG-VI-NEXT:    v_mad_f32 v6, v6, v8, v11 clamp2247; SDAG-VI-NEXT:    v_mad_f32 v1, v1, v3, v5 clamp2248; SDAG-VI-NEXT:    v_mad_f32 v0, v0, v2, v4 clamp2249; SDAG-VI-NEXT:    v_cvt_f16_f32_sdwa v2, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD2250; SDAG-VI-NEXT:    v_cvt_f16_f32_sdwa v3, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD2251; SDAG-VI-NEXT:    v_cvt_f16_f32_e32 v0, v02252; SDAG-VI-NEXT:    v_cvt_f16_f32_e32 v1, v12253; SDAG-VI-NEXT:    v_or_b32_e32 v0, v0, v32254; SDAG-VI-NEXT:    v_or_b32_e32 v1, v1, v22255; SDAG-VI-NEXT:    s_setpc_b64 s[30:31]2256;2257; SDAG-CI-LABEL: v_mad_mix_v4f32_clamp_precvt:2258; SDAG-CI:       ; %bb.0:2259; SDAG-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2260; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v11, v112261; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v7, v72262; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v10, v102263; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v3, v32264; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v6, v62265; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v9, v92266; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v5, v52267; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v2, v22268; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v8, v82269; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v4, v42270; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v02271; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v1, v12272; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v11, v112273; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v7, v72274; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v10, v102275; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v6, v62276; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v9, v92277; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v5, v52278; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v8, v82279; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v4, v42280; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v0, v02281; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v1, v12282; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v2, v22283; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v3, v32284; SDAG-CI-NEXT:    v_mad_f32 v0, v0, v4, v8 clamp2285; SDAG-CI-NEXT:    v_mad_f32 v1, v1, v5, v9 clamp2286; SDAG-CI-NEXT:    v_mad_f32 v2, v2, v6, v10 clamp2287; SDAG-CI-NEXT:    v_mad_f32 v3, v3, v7, v11 clamp2288; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v02289; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v1, v12290; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v2, v22291; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v3, v32292; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v0, v02293; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v1, v12294; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v2, v22295; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v3, v32296; SDAG-CI-NEXT:    s_setpc_b64 s[30:31]2297;2298; GISEL-GFX1100-LABEL: v_mad_mix_v4f32_clamp_precvt:2299; GISEL-GFX1100:       ; %bb.0:2300; GISEL-GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2301; GISEL-GFX1100-NEXT:    v_fma_mix_f32 v6, v0, v2, v4 op_sel_hi:[1,1,1] clamp2302; GISEL-GFX1100-NEXT:    v_fma_mix_f32 v0, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp2303; GISEL-GFX1100-NEXT:    v_fma_mix_f32 v2, v1, v3, v5 op_sel_hi:[1,1,1] clamp2304; GISEL-GFX1100-NEXT:    v_fma_mix_f32 v1, v1, v3, v5 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp2305; GISEL-GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2306; GISEL-GFX1100-NEXT:    v_cvt_f16_f32_e32 v3, v62307; GISEL-GFX1100-NEXT:    v_cvt_f16_f32_e32 v0, v02308; GISEL-GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2309; GISEL-GFX1100-NEXT:    v_cvt_f16_f32_e32 v2, v22310; GISEL-GFX1100-NEXT:    v_cvt_f16_f32_e32 v1, v12311; GISEL-GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)2312; GISEL-GFX1100-NEXT:    v_pack_b32_f16 v0, v3, v02313; GISEL-GFX1100-NEXT:    v_pack_b32_f16 v1, v2, v12314; GISEL-GFX1100-NEXT:    s_setpc_b64 s[30:31]2315;2316; GISEL-GFX900-LABEL: v_mad_mix_v4f32_clamp_precvt:2317; GISEL-GFX900:       ; %bb.0:2318; GISEL-GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2319; GISEL-GFX900-NEXT:    v_mad_mix_f32 v6, v0, v2, v4 op_sel_hi:[1,1,1] clamp2320; GISEL-GFX900-NEXT:    v_mad_mix_f32 v0, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp2321; GISEL-GFX900-NEXT:    v_mad_mix_f32 v2, v1, v3, v5 op_sel_hi:[1,1,1] clamp2322; GISEL-GFX900-NEXT:    v_mad_mix_f32 v1, v1, v3, v5 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp2323; GISEL-GFX900-NEXT:    v_cvt_f16_f32_e32 v3, v62324; GISEL-GFX900-NEXT:    v_cvt_f16_f32_e32 v0, v02325; GISEL-GFX900-NEXT:    v_cvt_f16_f32_e32 v2, v22326; GISEL-GFX900-NEXT:    v_cvt_f16_f32_e32 v1, v12327; GISEL-GFX900-NEXT:    v_pack_b32_f16 v0, v3, v02328; GISEL-GFX900-NEXT:    v_pack_b32_f16 v1, v2, v12329; GISEL-GFX900-NEXT:    s_setpc_b64 s[30:31]2330;2331; GISEL-GFX906-LABEL: v_mad_mix_v4f32_clamp_precvt:2332; GISEL-GFX906:       ; %bb.0:2333; GISEL-GFX906-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2334; GISEL-GFX906-NEXT:    v_fma_mix_f32 v6, v0, v2, v4 op_sel_hi:[1,1,1] clamp2335; GISEL-GFX906-NEXT:    v_fma_mix_f32 v0, v0, v2, v4 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp2336; GISEL-GFX906-NEXT:    v_fma_mix_f32 v2, v1, v3, v5 op_sel_hi:[1,1,1] clamp2337; GISEL-GFX906-NEXT:    v_fma_mix_f32 v1, v1, v3, v5 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp2338; GISEL-GFX906-NEXT:    v_cvt_f16_f32_e32 v3, v62339; GISEL-GFX906-NEXT:    v_cvt_f16_f32_e32 v0, v02340; GISEL-GFX906-NEXT:    v_cvt_f16_f32_e32 v2, v22341; GISEL-GFX906-NEXT:    v_cvt_f16_f32_e32 v1, v12342; GISEL-GFX906-NEXT:    v_pack_b32_f16 v0, v3, v02343; GISEL-GFX906-NEXT:    v_pack_b32_f16 v1, v2, v12344; GISEL-GFX906-NEXT:    s_setpc_b64 s[30:31]2345;2346; GISEL-VI-LABEL: v_mad_mix_v4f32_clamp_precvt:2347; GISEL-VI:       ; %bb.0:2348; GISEL-VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2349; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v6, v02350; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12351; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v7, v12352; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12353; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v8, v22354; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12355; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v9, v32356; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12357; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v10, v42358; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12359; GISEL-VI-NEXT:    v_cvt_f32_f16_e32 v11, v52360; GISEL-VI-NEXT:    v_cvt_f32_f16_sdwa v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12361; GISEL-VI-NEXT:    v_mad_f32 v6, v6, v8, v10 clamp2362; GISEL-VI-NEXT:    v_mad_f32 v0, v0, v2, v4 clamp2363; GISEL-VI-NEXT:    v_mad_f32 v2, v7, v9, v11 clamp2364; GISEL-VI-NEXT:    v_mad_f32 v1, v1, v3, v5 clamp2365; GISEL-VI-NEXT:    v_cvt_f16_f32_e32 v3, v62366; GISEL-VI-NEXT:    v_cvt_f16_f32_sdwa v0, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD2367; GISEL-VI-NEXT:    v_cvt_f16_f32_e32 v2, v22368; GISEL-VI-NEXT:    v_cvt_f16_f32_sdwa v1, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD2369; GISEL-VI-NEXT:    v_or_b32_e32 v0, v3, v02370; GISEL-VI-NEXT:    v_or_b32_e32 v1, v2, v12371; GISEL-VI-NEXT:    s_setpc_b64 s[30:31]2372;2373; GISEL-CI-LABEL: v_mad_mix_v4f32_clamp_precvt:2374; GISEL-CI:       ; %bb.0:2375; GISEL-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2376; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v0, v02377; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v1, v12378; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v2, v22379; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v3, v32380; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v4, v42381; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v5, v52382; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v6, v62383; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v7, v72384; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v8, v82385; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v9, v92386; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v10, v102387; GISEL-CI-NEXT:    v_cvt_f32_f16_e32 v11, v112388; GISEL-CI-NEXT:    v_mad_f32 v0, v0, v4, v8 clamp2389; GISEL-CI-NEXT:    v_mad_f32 v1, v1, v5, v9 clamp2390; GISEL-CI-NEXT:    v_mad_f32 v2, v2, v6, v10 clamp2391; GISEL-CI-NEXT:    v_mad_f32 v3, v3, v7, v11 clamp2392; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v0, v02393; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v1, v12394; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v2, v22395; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v3, v32396; GISEL-CI-NEXT:    s_setpc_b64 s[30:31]2397  %src0.ext = fpext <4 x half> %src0 to <4 x float>2398  %src1.ext = fpext <4 x half> %src1 to <4 x float>2399  %src2.ext = fpext <4 x half> %src2 to <4 x float>2400  %result = tail call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %src0.ext, <4 x float> %src1.ext, <4 x float> %src2.ext)2401  %max = call <4 x float> @llvm.maxnum.v4f32(<4 x float> %result, <4 x float> zeroinitializer)2402  %clamp = call <4 x float> @llvm.minnum.v4f32(<4 x float> %max, <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>)2403  %cvt.result = fptrunc <4 x float> %clamp to <4 x half>2404  ret <4 x half> %cvt.result2405}2406 2407define i32 @mixlo_zext(float %src0, float %src1, float %src2) #0 {2408; SDAG-GFX1100-TRUE16-LABEL: mixlo_zext:2409; SDAG-GFX1100-TRUE16:       ; %bb.0:2410; SDAG-GFX1100-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2411; SDAG-GFX1100-TRUE16-NEXT:    v_fma_mixlo_f16 v0, v0, v1, v22412; SDAG-GFX1100-TRUE16-NEXT:    v_mov_b16_e32 v0.h, 02413; SDAG-GFX1100-TRUE16-NEXT:    s_setpc_b64 s[30:31]2414;2415; SDAG-GFX1100-FAKE16-LABEL: mixlo_zext:2416; SDAG-GFX1100-FAKE16:       ; %bb.0:2417; SDAG-GFX1100-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2418; SDAG-GFX1100-FAKE16-NEXT:    v_fma_mixlo_f16 v0, v0, v1, v22419; SDAG-GFX1100-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)2420; SDAG-GFX1100-FAKE16-NEXT:    v_and_b32_e32 v0, 0xffff, v02421; SDAG-GFX1100-FAKE16-NEXT:    s_setpc_b64 s[30:31]2422;2423; GFX900-LABEL: mixlo_zext:2424; GFX900:       ; %bb.0:2425; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2426; GFX900-NEXT:    v_mad_mixlo_f16 v0, v0, v1, v22427; GFX900-NEXT:    v_and_b32_e32 v0, 0xffff, v02428; GFX900-NEXT:    s_setpc_b64 s[30:31]2429;2430; GFX906-LABEL: mixlo_zext:2431; GFX906:       ; %bb.0:2432; GFX906-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2433; GFX906-NEXT:    v_fma_mixlo_f16 v0, v0, v1, v22434; GFX906-NEXT:    v_and_b32_e32 v0, 0xffff, v02435; GFX906-NEXT:    s_setpc_b64 s[30:31]2436;2437; VI-LABEL: mixlo_zext:2438; VI:       ; %bb.0:2439; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2440; VI-NEXT:    v_mac_f32_e32 v2, v0, v12441; VI-NEXT:    v_cvt_f16_f32_e32 v0, v22442; VI-NEXT:    s_setpc_b64 s[30:31]2443;2444; SDAG-CI-LABEL: mixlo_zext:2445; SDAG-CI:       ; %bb.0:2446; SDAG-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2447; SDAG-CI-NEXT:    v_mac_f32_e32 v2, v0, v12448; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v22449; SDAG-CI-NEXT:    s_setpc_b64 s[30:31]2450;2451; GISEL-GFX1100-LABEL: mixlo_zext:2452; GISEL-GFX1100:       ; %bb.0:2453; GISEL-GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2454; GISEL-GFX1100-NEXT:    v_fma_mixlo_f16 v0, v0, v1, v22455; GISEL-GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_1)2456; GISEL-GFX1100-NEXT:    v_and_b32_e32 v0, 0xffff, v02457; GISEL-GFX1100-NEXT:    s_setpc_b64 s[30:31]2458;2459; GISEL-CI-LABEL: mixlo_zext:2460; GISEL-CI:       ; %bb.0:2461; GISEL-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2462; GISEL-CI-NEXT:    v_mac_f32_e32 v2, v0, v12463; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v0, v22464; GISEL-CI-NEXT:    s_setpc_b64 s[30:31]2465  %result = call float @llvm.fmuladd.f32(float %src0, float %src1, float %src2)2466  %cvt.result = fptrunc float %result to half2467  %cvt.result.i16 = bitcast half %cvt.result to i162468  %cvt.result.i32 = zext i16 %cvt.result.i16 to i322469  ret i32 %cvt.result.i322470}2471 2472define half @mixlo_fptrunc(float %a, float %b) #0 {2473; GFX1100-LABEL: mixlo_fptrunc:2474; GFX1100:       ; %bb.0: ; %.entry2475; GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2476; GFX1100-NEXT:    v_fma_mixlo_f16 v0, v0, v1, 02477; GFX1100-NEXT:    s_setpc_b64 s[30:31]2478;2479; GFX900-LABEL: mixlo_fptrunc:2480; GFX900:       ; %bb.0: ; %.entry2481; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2482; GFX900-NEXT:    v_mad_mixlo_f16 v0, v0, v1, 02483; GFX900-NEXT:    s_setpc_b64 s[30:31]2484;2485; GFX906-LABEL: mixlo_fptrunc:2486; GFX906:       ; %bb.0: ; %.entry2487; GFX906-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2488; GFX906-NEXT:    v_fma_mixlo_f16 v0, v0, v1, 02489; GFX906-NEXT:    s_setpc_b64 s[30:31]2490;2491; VI-LABEL: mixlo_fptrunc:2492; VI:       ; %bb.0: ; %.entry2493; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2494; VI-NEXT:    v_mul_f32_e32 v0, v0, v12495; VI-NEXT:    v_cvt_f16_f32_e32 v0, v02496; VI-NEXT:    s_setpc_b64 s[30:31]2497;2498; SDAG-CI-LABEL: mixlo_fptrunc:2499; SDAG-CI:       ; %bb.0: ; %.entry2500; SDAG-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2501; SDAG-CI-NEXT:    v_mul_f32_e32 v0, v0, v12502; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v02503; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v0, v02504; SDAG-CI-NEXT:    s_setpc_b64 s[30:31]2505;2506; GISEL-CI-LABEL: mixlo_fptrunc:2507; GISEL-CI:       ; %bb.0: ; %.entry2508; GISEL-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2509; GISEL-CI-NEXT:    v_mul_f32_e32 v0, v0, v12510; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v0, v02511; GISEL-CI-NEXT:    s_setpc_b64 s[30:31]2512.entry:2513  %mul = fmul float %a, %b2514  %trunc = fptrunc float %mul to half2515  ret half %trunc2516}2517 2518define half @mixlo_fptrunc_no_flush(float %a, float %b) {2519; GFX1100-LABEL: mixlo_fptrunc_no_flush:2520; GFX1100:       ; %bb.0: ; %.entry2521; GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2522; GFX1100-NEXT:    v_fma_mixlo_f16 v0, v0, v1, 02523; GFX1100-NEXT:    s_setpc_b64 s[30:31]2524;2525; GFX900-LABEL: mixlo_fptrunc_no_flush:2526; GFX900:       ; %bb.0: ; %.entry2527; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2528; GFX900-NEXT:    v_mul_f32_e32 v0, v0, v12529; GFX900-NEXT:    v_cvt_f16_f32_e32 v0, v02530; GFX900-NEXT:    s_setpc_b64 s[30:31]2531;2532; GFX906-LABEL: mixlo_fptrunc_no_flush:2533; GFX906:       ; %bb.0: ; %.entry2534; GFX906-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2535; GFX906-NEXT:    v_fma_mixlo_f16 v0, v0, v1, 02536; GFX906-NEXT:    s_setpc_b64 s[30:31]2537;2538; VI-LABEL: mixlo_fptrunc_no_flush:2539; VI:       ; %bb.0: ; %.entry2540; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2541; VI-NEXT:    v_mul_f32_e32 v0, v0, v12542; VI-NEXT:    v_cvt_f16_f32_e32 v0, v02543; VI-NEXT:    s_setpc_b64 s[30:31]2544;2545; SDAG-CI-LABEL: mixlo_fptrunc_no_flush:2546; SDAG-CI:       ; %bb.0: ; %.entry2547; SDAG-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2548; SDAG-CI-NEXT:    v_mul_f32_e32 v0, v0, v12549; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v02550; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v0, v02551; SDAG-CI-NEXT:    s_setpc_b64 s[30:31]2552;2553; GISEL-CI-LABEL: mixlo_fptrunc_no_flush:2554; GISEL-CI:       ; %bb.0: ; %.entry2555; GISEL-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2556; GISEL-CI-NEXT:    v_mul_f32_e32 v0, v0, v12557; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v0, v02558; GISEL-CI-NEXT:    s_setpc_b64 s[30:31]2559.entry:2560  %mul = fmul float %a, %b2561  %trunc = fptrunc float %mul to half2562  ret half %trunc2563}2564 2565define half @mixlo_fptrunc_abs_src_mod(float %a, float %b) #0 {2566; GFX1100-LABEL: mixlo_fptrunc_abs_src_mod:2567; GFX1100:       ; %bb.0: ; %.entry2568; GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2569; GFX1100-NEXT:    v_fma_mixlo_f16 v0, |v0|, v1, 02570; GFX1100-NEXT:    s_setpc_b64 s[30:31]2571;2572; GFX900-LABEL: mixlo_fptrunc_abs_src_mod:2573; GFX900:       ; %bb.0: ; %.entry2574; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2575; GFX900-NEXT:    v_mad_mixlo_f16 v0, |v0|, v1, 02576; GFX900-NEXT:    s_setpc_b64 s[30:31]2577;2578; GFX906-LABEL: mixlo_fptrunc_abs_src_mod:2579; GFX906:       ; %bb.0: ; %.entry2580; GFX906-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2581; GFX906-NEXT:    v_fma_mixlo_f16 v0, |v0|, v1, 02582; GFX906-NEXT:    s_setpc_b64 s[30:31]2583;2584; VI-LABEL: mixlo_fptrunc_abs_src_mod:2585; VI:       ; %bb.0: ; %.entry2586; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2587; VI-NEXT:    v_mul_f32_e64 v0, |v0|, v12588; VI-NEXT:    v_cvt_f16_f32_e32 v0, v02589; VI-NEXT:    s_setpc_b64 s[30:31]2590;2591; SDAG-CI-LABEL: mixlo_fptrunc_abs_src_mod:2592; SDAG-CI:       ; %bb.0: ; %.entry2593; SDAG-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2594; SDAG-CI-NEXT:    v_mul_f32_e64 v0, |v0|, v12595; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v02596; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v0, v02597; SDAG-CI-NEXT:    s_setpc_b64 s[30:31]2598;2599; GISEL-CI-LABEL: mixlo_fptrunc_abs_src_mod:2600; GISEL-CI:       ; %bb.0: ; %.entry2601; GISEL-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2602; GISEL-CI-NEXT:    v_mul_f32_e64 v0, |v0|, v12603; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v0, v02604; GISEL-CI-NEXT:    s_setpc_b64 s[30:31]2605.entry:2606  %a.fabs = call float @llvm.fabs.f32(float %a)2607  %mul = fmul float %a.fabs, %b2608  %trunc = fptrunc float %mul to half2609  ret half %trunc2610}2611 2612define half @mixlo_fptrunc_neg_src_mod(float %a, float %b) #0 {2613; GFX1100-LABEL: mixlo_fptrunc_neg_src_mod:2614; GFX1100:       ; %bb.0: ; %.entry2615; GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2616; GFX1100-NEXT:    v_fma_mixlo_f16 v0, -v0, v1, 02617; GFX1100-NEXT:    s_setpc_b64 s[30:31]2618;2619; GFX900-LABEL: mixlo_fptrunc_neg_src_mod:2620; GFX900:       ; %bb.0: ; %.entry2621; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2622; GFX900-NEXT:    v_mad_mixlo_f16 v0, -v0, v1, 02623; GFX900-NEXT:    s_setpc_b64 s[30:31]2624;2625; GFX906-LABEL: mixlo_fptrunc_neg_src_mod:2626; GFX906:       ; %bb.0: ; %.entry2627; GFX906-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2628; GFX906-NEXT:    v_fma_mixlo_f16 v0, -v0, v1, 02629; GFX906-NEXT:    s_setpc_b64 s[30:31]2630;2631; VI-LABEL: mixlo_fptrunc_neg_src_mod:2632; VI:       ; %bb.0: ; %.entry2633; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2634; VI-NEXT:    v_mul_f32_e64 v0, -v0, v12635; VI-NEXT:    v_cvt_f16_f32_e32 v0, v02636; VI-NEXT:    s_setpc_b64 s[30:31]2637;2638; SDAG-CI-LABEL: mixlo_fptrunc_neg_src_mod:2639; SDAG-CI:       ; %bb.0: ; %.entry2640; SDAG-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2641; SDAG-CI-NEXT:    v_mul_f32_e64 v0, -v0, v12642; SDAG-CI-NEXT:    v_cvt_f16_f32_e32 v0, v02643; SDAG-CI-NEXT:    v_cvt_f32_f16_e32 v0, v02644; SDAG-CI-NEXT:    s_setpc_b64 s[30:31]2645;2646; GISEL-CI-LABEL: mixlo_fptrunc_neg_src_mod:2647; GISEL-CI:       ; %bb.0: ; %.entry2648; GISEL-CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2649; GISEL-CI-NEXT:    v_mul_f32_e64 v0, -v0, v12650; GISEL-CI-NEXT:    v_cvt_f16_f32_e32 v0, v02651; GISEL-CI-NEXT:    s_setpc_b64 s[30:31]2652.entry:2653  %a.fneg = fneg float %a2654  %mul = fmul float %a.fneg, %b2655  %trunc = fptrunc float %mul to half2656  ret half %trunc2657}2658 2659declare float @llvm.fabs.f32(float) #12660 2661declare half @llvm.minnum.f16(half, half) #12662declare <2 x half> @llvm.minnum.v2f16(<2 x half>, <2 x half>) #12663declare <3 x half> @llvm.minnum.v3f16(<3 x half>, <3 x half>) #12664declare <4 x half> @llvm.minnum.v4f16(<4 x half>, <4 x half>) #12665 2666declare half @llvm.maxnum.f16(half, half) #12667declare <2 x half> @llvm.maxnum.v2f16(<2 x half>, <2 x half>) #12668declare <3 x half> @llvm.maxnum.v3f16(<3 x half>, <3 x half>) #12669declare <4 x half> @llvm.maxnum.v4f16(<4 x half>, <4 x half>) #12670 2671declare float @llvm.minnum.f32(float, float) #12672declare <2 x float> @llvm.minnum.v2f32(<2 x float>, <2 x float>) #12673declare <3 x float> @llvm.minnum.v3f32(<3 x float>, <3 x float>) #12674declare <4 x float> @llvm.minnum.v4f32(<4 x float>, <4 x float>) #12675 2676declare float @llvm.maxnum.f32(float, float) #12677declare <2 x float> @llvm.maxnum.v2f32(<2 x float>, <2 x float>) #12678declare <3 x float> @llvm.maxnum.v3f32(<3 x float>, <3 x float>) #12679declare <4 x float> @llvm.maxnum.v4f32(<4 x float>, <4 x float>) #12680 2681declare float @llvm.fmuladd.f32(float, float, float) #12682declare <2 x float> @llvm.fmuladd.v2f32(<2 x float>, <2 x float>, <2 x float>) #12683declare <3 x float> @llvm.fmuladd.v3f32(<3 x float>, <3 x float>, <3 x float>) #12684declare <4 x float> @llvm.fmuladd.v4f32(<4 x float>, <4 x float>, <4 x float>) #12685 2686attributes #0 = { nounwind "denormal-fp-math-f32"="preserve-sign,preserve-sign" }2687attributes #1 = { nounwind readnone speculatable }2688;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:2689; GISEL-GFX1100-FAKE16: {{.*}}2690