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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX1100,SDAG-GFX1100,SDAG-GFX1100-TRUE16 %s3; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX1100,SDAG-GFX1100,SDAG-GFX1100-FAKE16 %s4; RUN: llc -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefixes=GFX900,SDAG-GFX900 %s5; RUN: llc -mtriple=amdgcn -mcpu=gfx906 < %s | FileCheck -check-prefixes=GFX906,SDAG-GFX906 %s6; RUN: llc -mtriple=amdgcn -mcpu=gfx9-generic --amdhsa-code-object-version=6 < %s | FileCheck -check-prefixes=GFX9GEN,SDAG-GFX9GEN %s7; RUN: llc -mtriple=amdgcn -mcpu=fiji < %s | FileCheck -check-prefixes=VI,SDAG-VI %s8; RUN: llc -mtriple=amdgcn -mcpu=hawaii < %s | FileCheck -check-prefixes=CI,SDAG-CI %s9 10; FIXME-TRUE16. enable gisel11; XUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX1100,GISEL-GFX1100,GISEL-GFX1100-TRUE16 %s12; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX1100,GISEL-GFX1100,GISEL-GFX1100-FAKE16 %s13; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefixes=GFX900,GISEL-GFX900 %s14; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx906 < %s | FileCheck -check-prefixes=GFX906,GISEL-GFX906 %s15; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx9-generic --amdhsa-code-object-version=6 < %s | FileCheck -check-prefixes=GFX9GEN,GISEL-GFX9GEN %s16; RUN: llc -global-isel -mtriple=amdgcn -mcpu=fiji < %s | FileCheck -check-prefixes=VI,GISEL-VI %s17; RUN: llc -global-isel -mtriple=amdgcn -mcpu=hawaii < %s | FileCheck -check-prefixes=CI,GISEL-CI %s18 19define float @v_mad_mix_f32_f16lo_f16lo_f16lo(half %src0, half %src1, half %src2) #0 {20; GFX1100-LABEL: v_mad_mix_f32_f16lo_f16lo_f16lo:21; GFX1100: ; %bb.0:22; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)23; GFX1100-NEXT: v_fma_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,1]24; GFX1100-NEXT: s_setpc_b64 s[30:31]25;26; GFX900-LABEL: v_mad_mix_f32_f16lo_f16lo_f16lo:27; GFX900: ; %bb.0:28; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)29; GFX900-NEXT: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,1]30; GFX900-NEXT: s_setpc_b64 s[30:31]31;32; GFX906-LABEL: v_mad_mix_f32_f16lo_f16lo_f16lo:33; GFX906: ; %bb.0:34; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)35; GFX906-NEXT: v_fma_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,1]36; GFX906-NEXT: s_setpc_b64 s[30:31]37;38; GFX9GEN-LABEL: v_mad_mix_f32_f16lo_f16lo_f16lo:39; GFX9GEN: ; %bb.0:40; GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)41; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v3, v042; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v1, v143; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v244; GFX9GEN-NEXT: v_mac_f32_e32 v0, v3, v145; GFX9GEN-NEXT: s_setpc_b64 s[30:31]46;47; VI-LABEL: v_mad_mix_f32_f16lo_f16lo_f16lo:48; VI: ; %bb.0:49; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)50; VI-NEXT: v_cvt_f32_f16_e32 v3, v051; VI-NEXT: v_cvt_f32_f16_e32 v1, v152; VI-NEXT: v_cvt_f32_f16_e32 v0, v253; VI-NEXT: v_mac_f32_e32 v0, v3, v154; VI-NEXT: s_setpc_b64 s[30:31]55;56; SDAG-CI-LABEL: v_mad_mix_f32_f16lo_f16lo_f16lo:57; SDAG-CI: ; %bb.0:58; SDAG-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)59; SDAG-CI-NEXT: v_mad_f32 v0, v0, v1, v260; SDAG-CI-NEXT: s_setpc_b64 s[30:31]61;62; GISEL-CI-LABEL: v_mad_mix_f32_f16lo_f16lo_f16lo:63; GISEL-CI: ; %bb.0:64; GISEL-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)65; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v3, v066; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v1, v167; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v0, v268; GISEL-CI-NEXT: v_mac_f32_e32 v0, v3, v169; GISEL-CI-NEXT: s_setpc_b64 s[30:31]70 %src0.ext = fpext half %src0 to float71 %src1.ext = fpext half %src1 to float72 %src2.ext = fpext half %src2 to float73 %result = tail call float @llvm.fmuladd.f32(float %src0.ext, float %src1.ext, float %src2.ext)74 ret float %result75}76 77define float @v_mad_mix_f32_f16hi_f16hi_f16hi_int(i32 %src0, i32 %src1, i32 %src2) #0 {78; GFX1100-LABEL: v_mad_mix_f32_f16hi_f16hi_f16hi_int:79; GFX1100: ; %bb.0:80; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)81; GFX1100-NEXT: v_fma_mix_f32 v0, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]82; GFX1100-NEXT: s_setpc_b64 s[30:31]83;84; GFX900-LABEL: v_mad_mix_f32_f16hi_f16hi_f16hi_int:85; GFX900: ; %bb.0:86; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)87; GFX900-NEXT: v_mad_mix_f32 v0, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]88; GFX900-NEXT: s_setpc_b64 s[30:31]89;90; GFX906-LABEL: v_mad_mix_f32_f16hi_f16hi_f16hi_int:91; GFX906: ; %bb.0:92; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)93; GFX906-NEXT: v_fma_mix_f32 v0, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]94; GFX906-NEXT: s_setpc_b64 s[30:31]95;96; GFX9GEN-LABEL: v_mad_mix_f32_f16hi_f16hi_f16hi_int:97; GFX9GEN: ; %bb.0:98; GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)99; GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1100; GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1101; GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1102; GFX9GEN-NEXT: v_mac_f32_e32 v0, v3, v1103; GFX9GEN-NEXT: s_setpc_b64 s[30:31]104;105; VI-LABEL: v_mad_mix_f32_f16hi_f16hi_f16hi_int:106; VI: ; %bb.0:107; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)108; VI-NEXT: v_cvt_f32_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1109; VI-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1110; VI-NEXT: v_cvt_f32_f16_sdwa v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1111; VI-NEXT: v_mac_f32_e32 v0, v3, v1112; VI-NEXT: s_setpc_b64 s[30:31]113;114; CI-LABEL: v_mad_mix_f32_f16hi_f16hi_f16hi_int:115; CI: ; %bb.0:116; CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)117; CI-NEXT: v_lshrrev_b32_e32 v0, 16, v0118; CI-NEXT: v_lshrrev_b32_e32 v1, 16, v1119; CI-NEXT: v_lshrrev_b32_e32 v2, 16, v2120; CI-NEXT: v_cvt_f32_f16_e32 v3, v0121; CI-NEXT: v_cvt_f32_f16_e32 v1, v1122; CI-NEXT: v_cvt_f32_f16_e32 v0, v2123; CI-NEXT: v_mac_f32_e32 v0, v3, v1124; CI-NEXT: s_setpc_b64 s[30:31]125 %src0.hi = lshr i32 %src0, 16126 %src1.hi = lshr i32 %src1, 16127 %src2.hi = lshr i32 %src2, 16128 %src0.i16 = trunc i32 %src0.hi to i16129 %src1.i16 = trunc i32 %src1.hi to i16130 %src2.i16 = trunc i32 %src2.hi to i16131 %src0.fp16 = bitcast i16 %src0.i16 to half132 %src1.fp16 = bitcast i16 %src1.i16 to half133 %src2.fp16 = bitcast i16 %src2.i16 to half134 %src0.ext = fpext half %src0.fp16 to float135 %src1.ext = fpext half %src1.fp16 to float136 %src2.ext = fpext half %src2.fp16 to float137 %result = tail call float @llvm.fmuladd.f32(float %src0.ext, float %src1.ext, float %src2.ext)138 ret float %result139}140 141define float @v_mad_mix_f32_f16hi_f16hi_f16hi_elt(<2 x half> %src0, <2 x half> %src1, <2 x half> %src2) #0 {142; GFX1100-LABEL: v_mad_mix_f32_f16hi_f16hi_f16hi_elt:143; GFX1100: ; %bb.0:144; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)145; GFX1100-NEXT: v_fma_mix_f32 v0, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]146; GFX1100-NEXT: s_setpc_b64 s[30:31]147;148; GFX900-LABEL: v_mad_mix_f32_f16hi_f16hi_f16hi_elt:149; GFX900: ; %bb.0:150; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)151; GFX900-NEXT: v_mad_mix_f32 v0, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]152; GFX900-NEXT: s_setpc_b64 s[30:31]153;154; GFX906-LABEL: v_mad_mix_f32_f16hi_f16hi_f16hi_elt:155; GFX906: ; %bb.0:156; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)157; GFX906-NEXT: v_fma_mix_f32 v0, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]158; GFX906-NEXT: s_setpc_b64 s[30:31]159;160; GFX9GEN-LABEL: v_mad_mix_f32_f16hi_f16hi_f16hi_elt:161; GFX9GEN: ; %bb.0:162; GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)163; GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1164; GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1165; GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1166; GFX9GEN-NEXT: v_mac_f32_e32 v0, v3, v1167; GFX9GEN-NEXT: s_setpc_b64 s[30:31]168;169; VI-LABEL: v_mad_mix_f32_f16hi_f16hi_f16hi_elt:170; VI: ; %bb.0:171; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)172; VI-NEXT: v_cvt_f32_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1173; VI-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1174; VI-NEXT: v_cvt_f32_f16_sdwa v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1175; VI-NEXT: v_mac_f32_e32 v0, v3, v1176; VI-NEXT: s_setpc_b64 s[30:31]177;178; SDAG-CI-LABEL: v_mad_mix_f32_f16hi_f16hi_f16hi_elt:179; SDAG-CI: ; %bb.0:180; SDAG-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)181; SDAG-CI-NEXT: v_mad_f32 v0, v1, v3, v5182; SDAG-CI-NEXT: s_setpc_b64 s[30:31]183;184; GISEL-CI-LABEL: v_mad_mix_f32_f16hi_f16hi_f16hi_elt:185; GISEL-CI: ; %bb.0:186; GISEL-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)187; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v1, v1188; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v2, v3189; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v0, v5190; GISEL-CI-NEXT: v_mac_f32_e32 v0, v1, v2191; GISEL-CI-NEXT: s_setpc_b64 s[30:31]192 %src0.hi = extractelement <2 x half> %src0, i32 1193 %src1.hi = extractelement <2 x half> %src1, i32 1194 %src2.hi = extractelement <2 x half> %src2, i32 1195 %src0.ext = fpext half %src0.hi to float196 %src1.ext = fpext half %src1.hi to float197 %src2.ext = fpext half %src2.hi to float198 %result = tail call float @llvm.fmuladd.f32(float %src0.ext, float %src1.ext, float %src2.ext)199 ret float %result200}201 202define <2 x float> @v_mad_mix_v2f32(<2 x half> %src0, <2 x half> %src1, <2 x half> %src2) #0 {203; GFX1100-LABEL: v_mad_mix_v2f32:204; GFX1100: ; %bb.0:205; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)206; GFX1100-NEXT: v_fma_mix_f32 v3, v0, v1, v2 op_sel_hi:[1,1,1]207; GFX1100-NEXT: v_fma_mix_f32 v1, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]208; GFX1100-NEXT: s_delay_alu instid0(VALU_DEP_2)209; GFX1100-NEXT: v_mov_b32_e32 v0, v3210; GFX1100-NEXT: s_setpc_b64 s[30:31]211;212; GFX900-LABEL: v_mad_mix_v2f32:213; GFX900: ; %bb.0:214; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)215; GFX900-NEXT: v_mad_mix_f32 v3, v0, v1, v2 op_sel_hi:[1,1,1]216; GFX900-NEXT: v_mad_mix_f32 v1, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]217; GFX900-NEXT: v_mov_b32_e32 v0, v3218; GFX900-NEXT: s_setpc_b64 s[30:31]219;220; GFX906-LABEL: v_mad_mix_v2f32:221; GFX906: ; %bb.0:222; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)223; GFX906-NEXT: v_fma_mix_f32 v3, v0, v1, v2 op_sel_hi:[1,1,1]224; GFX906-NEXT: v_fma_mix_f32 v1, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1]225; GFX906-NEXT: v_mov_b32_e32 v0, v3226; GFX906-NEXT: s_setpc_b64 s[30:31]227;228; SDAG-GFX9GEN-LABEL: v_mad_mix_v2f32:229; SDAG-GFX9GEN: ; %bb.0:230; SDAG-GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)231; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1232; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v4, v0233; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1234; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v6, v1235; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1236; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v2237; SDAG-GFX9GEN-NEXT: v_mac_f32_e32 v1, v3, v5238; SDAG-GFX9GEN-NEXT: v_mac_f32_e32 v0, v4, v6239; SDAG-GFX9GEN-NEXT: s_setpc_b64 s[30:31]240;241; SDAG-VI-LABEL: v_mad_mix_v2f32:242; SDAG-VI: ; %bb.0:243; SDAG-VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)244; SDAG-VI-NEXT: v_cvt_f32_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1245; SDAG-VI-NEXT: v_cvt_f32_f16_e32 v4, v0246; SDAG-VI-NEXT: v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1247; SDAG-VI-NEXT: v_cvt_f32_f16_e32 v6, v1248; SDAG-VI-NEXT: v_cvt_f32_f16_sdwa v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1249; SDAG-VI-NEXT: v_cvt_f32_f16_e32 v0, v2250; SDAG-VI-NEXT: v_mac_f32_e32 v1, v3, v5251; SDAG-VI-NEXT: v_mac_f32_e32 v0, v4, v6252; SDAG-VI-NEXT: s_setpc_b64 s[30:31]253;254; SDAG-CI-LABEL: v_mad_mix_v2f32:255; SDAG-CI: ; %bb.0:256; SDAG-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)257; SDAG-CI-NEXT: v_cvt_f16_f32_e32 v5, v5258; SDAG-CI-NEXT: v_cvt_f16_f32_e32 v6, v3259; SDAG-CI-NEXT: v_cvt_f16_f32_e32 v1, v1260; SDAG-CI-NEXT: v_cvt_f16_f32_e32 v4, v4261; SDAG-CI-NEXT: v_cvt_f32_f16_e32 v3, v5262; SDAG-CI-NEXT: v_cvt_f32_f16_e32 v5, v6263; SDAG-CI-NEXT: v_cvt_f16_f32_e32 v2, v2264; SDAG-CI-NEXT: v_cvt_f16_f32_e32 v6, v0265; SDAG-CI-NEXT: v_cvt_f32_f16_e32 v1, v1266; SDAG-CI-NEXT: v_cvt_f32_f16_e32 v0, v4267; SDAG-CI-NEXT: v_cvt_f32_f16_e32 v2, v2268; SDAG-CI-NEXT: v_cvt_f32_f16_e32 v4, v6269; SDAG-CI-NEXT: v_mac_f32_e32 v3, v1, v5270; SDAG-CI-NEXT: v_mov_b32_e32 v1, v3271; SDAG-CI-NEXT: v_mac_f32_e32 v0, v4, v2272; SDAG-CI-NEXT: s_setpc_b64 s[30:31]273;274; GISEL-GFX9GEN-LABEL: v_mad_mix_v2f32:275; GISEL-GFX9GEN: ; %bb.0:276; GISEL-GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)277; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v3, v0278; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1279; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v5, v1280; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v6, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1281; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v2282; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1283; GISEL-GFX9GEN-NEXT: v_mac_f32_e32 v0, v3, v5284; GISEL-GFX9GEN-NEXT: v_mac_f32_e32 v1, v4, v6285; GISEL-GFX9GEN-NEXT: s_setpc_b64 s[30:31]286;287; GISEL-VI-LABEL: v_mad_mix_v2f32:288; GISEL-VI: ; %bb.0:289; GISEL-VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)290; GISEL-VI-NEXT: v_cvt_f32_f16_e32 v3, v0291; GISEL-VI-NEXT: v_cvt_f32_f16_sdwa v4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1292; GISEL-VI-NEXT: v_cvt_f32_f16_e32 v5, v1293; GISEL-VI-NEXT: v_cvt_f32_f16_sdwa v6, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1294; GISEL-VI-NEXT: v_cvt_f32_f16_e32 v0, v2295; GISEL-VI-NEXT: v_cvt_f32_f16_sdwa v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1296; GISEL-VI-NEXT: v_mac_f32_e32 v0, v3, v5297; GISEL-VI-NEXT: v_mac_f32_e32 v1, v4, v6298; GISEL-VI-NEXT: s_setpc_b64 s[30:31]299;300; GISEL-CI-LABEL: v_mad_mix_v2f32:301; GISEL-CI: ; %bb.0:302; GISEL-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)303; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v6, v0304; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v7, v1305; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v2, v2306; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v3, v3307; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v0, v4308; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v1, v5309; GISEL-CI-NEXT: v_mac_f32_e32 v0, v6, v2310; GISEL-CI-NEXT: v_mac_f32_e32 v1, v7, v3311; GISEL-CI-NEXT: s_setpc_b64 s[30:31]312 %src0.ext = fpext <2 x half> %src0 to <2 x float>313 %src1.ext = fpext <2 x half> %src1 to <2 x float>314 %src2.ext = fpext <2 x half> %src2 to <2 x float>315 %result = tail call <2 x float> @llvm.fmuladd.v2f32(<2 x float> %src0.ext, <2 x float> %src1.ext, <2 x float> %src2.ext)316 ret <2 x float> %result317}318 319define <2 x float> @v_mad_mix_v2f32_shuffle(<2 x half> %src0, <2 x half> %src1, <2 x half> %src2) #0 {320; GFX1100-LABEL: v_mad_mix_v2f32_shuffle:321; GFX1100: ; %bb.0:322; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)323; GFX1100-NEXT: v_fma_mix_f32 v3, v0, v1, v2 op_sel:[1,0,1] op_sel_hi:[1,1,1]324; GFX1100-NEXT: v_fma_mix_f32 v1, v0, v1, v2 op_sel:[0,1,1] op_sel_hi:[1,1,1]325; GFX1100-NEXT: s_delay_alu instid0(VALU_DEP_2)326; GFX1100-NEXT: v_mov_b32_e32 v0, v3327; GFX1100-NEXT: s_setpc_b64 s[30:31]328;329; GFX900-LABEL: v_mad_mix_v2f32_shuffle:330; GFX900: ; %bb.0:331; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)332; GFX900-NEXT: v_mad_mix_f32 v3, v0, v1, v2 op_sel:[1,0,1] op_sel_hi:[1,1,1]333; GFX900-NEXT: v_mad_mix_f32 v1, v0, v1, v2 op_sel:[0,1,1] op_sel_hi:[1,1,1]334; GFX900-NEXT: v_mov_b32_e32 v0, v3335; GFX900-NEXT: s_setpc_b64 s[30:31]336;337; GFX906-LABEL: v_mad_mix_v2f32_shuffle:338; GFX906: ; %bb.0:339; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)340; GFX906-NEXT: v_fma_mix_f32 v3, v0, v1, v2 op_sel:[1,0,1] op_sel_hi:[1,1,1]341; GFX906-NEXT: v_fma_mix_f32 v1, v0, v1, v2 op_sel:[0,1,1] op_sel_hi:[1,1,1]342; GFX906-NEXT: v_mov_b32_e32 v0, v3343; GFX906-NEXT: s_setpc_b64 s[30:31]344;345; GFX9GEN-LABEL: v_mad_mix_v2f32_shuffle:346; GFX9GEN: ; %bb.0:347; GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)348; GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1349; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v4, v0350; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v1351; GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1352; GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1353; GFX9GEN-NEXT: v_mad_f32 v0, v3, v0, v2354; GFX9GEN-NEXT: v_mac_f32_e32 v2, v4, v1355; GFX9GEN-NEXT: v_mov_b32_e32 v1, v2356; GFX9GEN-NEXT: s_setpc_b64 s[30:31]357;358; VI-LABEL: v_mad_mix_v2f32_shuffle:359; VI: ; %bb.0:360; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)361; VI-NEXT: v_cvt_f32_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1362; VI-NEXT: v_cvt_f32_f16_e32 v4, v0363; VI-NEXT: v_cvt_f32_f16_e32 v0, v1364; VI-NEXT: v_cvt_f32_f16_sdwa v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1365; VI-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1366; VI-NEXT: v_mad_f32 v0, v3, v0, v2367; VI-NEXT: v_mac_f32_e32 v2, v4, v1368; VI-NEXT: v_mov_b32_e32 v1, v2369; VI-NEXT: s_setpc_b64 s[30:31]370;371; SDAG-CI-LABEL: v_mad_mix_v2f32_shuffle:372; SDAG-CI: ; %bb.0:373; SDAG-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)374; SDAG-CI-NEXT: v_cvt_f16_f32_e32 v3, v3375; SDAG-CI-NEXT: v_cvt_f16_f32_e32 v2, v2376; SDAG-CI-NEXT: v_cvt_f16_f32_e32 v1, v1377; SDAG-CI-NEXT: v_cvt_f16_f32_e32 v0, v0378; SDAG-CI-NEXT: v_cvt_f32_f16_e32 v3, v3379; SDAG-CI-NEXT: v_cvt_f32_f16_e32 v2, v2380; SDAG-CI-NEXT: v_cvt_f32_f16_e32 v1, v1381; SDAG-CI-NEXT: v_cvt_f32_f16_e32 v4, v0382; SDAG-CI-NEXT: v_mad_f32 v0, v1, v2, v5383; SDAG-CI-NEXT: v_mad_f32 v1, v4, v3, v5384; SDAG-CI-NEXT: s_setpc_b64 s[30:31]385;386; GISEL-CI-LABEL: v_mad_mix_v2f32_shuffle:387; GISEL-CI: ; %bb.0:388; GISEL-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)389; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v4, v1390; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v6, v0391; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v0, v2392; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v1, v5393; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v2, v3394; GISEL-CI-NEXT: v_mad_f32 v0, v4, v0, v1395; GISEL-CI-NEXT: v_mac_f32_e32 v1, v6, v2396; GISEL-CI-NEXT: s_setpc_b64 s[30:31]397 %src0.shuf = shufflevector <2 x half> %src0, <2 x half> poison, <2 x i32> <i32 1, i32 0>398 %src1.shuf = shufflevector <2 x half> %src1, <2 x half> poison, <2 x i32> <i32 0, i32 1>399 %src2.shuf = shufflevector <2 x half> %src2, <2 x half> poison, <2 x i32> <i32 1, i32 1>400 %src0.ext = fpext <2 x half> %src0.shuf to <2 x float>401 %src1.ext = fpext <2 x half> %src1.shuf to <2 x float>402 %src2.ext = fpext <2 x half> %src2.shuf to <2 x float>403 %result = tail call <2 x float> @llvm.fmuladd.v2f32(<2 x float> %src0.ext, <2 x float> %src1.ext, <2 x float> %src2.ext)404 ret <2 x float> %result405}406 407define float @v_mad_mix_f32_negf16lo_f16lo_f16lo(half %src0, half %src1, half %src2) #0 {408; GFX1100-LABEL: v_mad_mix_f32_negf16lo_f16lo_f16lo:409; GFX1100: ; %bb.0:410; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)411; GFX1100-NEXT: v_fma_mix_f32 v0, -v0, v1, v2 op_sel_hi:[1,1,1]412; GFX1100-NEXT: s_setpc_b64 s[30:31]413;414; GFX900-LABEL: v_mad_mix_f32_negf16lo_f16lo_f16lo:415; GFX900: ; %bb.0:416; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)417; GFX900-NEXT: v_mad_mix_f32 v0, -v0, v1, v2 op_sel_hi:[1,1,1]418; GFX900-NEXT: s_setpc_b64 s[30:31]419;420; GFX906-LABEL: v_mad_mix_f32_negf16lo_f16lo_f16lo:421; GFX906: ; %bb.0:422; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)423; GFX906-NEXT: v_fma_mix_f32 v0, -v0, v1, v2 op_sel_hi:[1,1,1]424; GFX906-NEXT: s_setpc_b64 s[30:31]425;426; SDAG-GFX9GEN-LABEL: v_mad_mix_f32_negf16lo_f16lo_f16lo:427; SDAG-GFX9GEN: ; %bb.0:428; SDAG-GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)429; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v0430; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v1, v1431; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v2, v2432; SDAG-GFX9GEN-NEXT: v_mad_f32 v0, -v0, v1, v2433; SDAG-GFX9GEN-NEXT: s_setpc_b64 s[30:31]434;435; SDAG-VI-LABEL: v_mad_mix_f32_negf16lo_f16lo_f16lo:436; SDAG-VI: ; %bb.0:437; SDAG-VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)438; SDAG-VI-NEXT: v_cvt_f32_f16_e32 v0, v0439; SDAG-VI-NEXT: v_cvt_f32_f16_e32 v1, v1440; SDAG-VI-NEXT: v_cvt_f32_f16_e32 v2, v2441; SDAG-VI-NEXT: v_mad_f32 v0, -v0, v1, v2442; SDAG-VI-NEXT: s_setpc_b64 s[30:31]443;444; SDAG-CI-LABEL: v_mad_mix_f32_negf16lo_f16lo_f16lo:445; SDAG-CI: ; %bb.0:446; SDAG-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)447; SDAG-CI-NEXT: v_mad_f32 v0, -v0, v1, v2448; SDAG-CI-NEXT: s_setpc_b64 s[30:31]449;450; GISEL-GFX9GEN-LABEL: v_mad_mix_f32_negf16lo_f16lo_f16lo:451; GISEL-GFX9GEN: ; %bb.0:452; GISEL-GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)453; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_e64 v3, -v0454; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v1, v1455; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v2456; GISEL-GFX9GEN-NEXT: v_mac_f32_e32 v0, v3, v1457; GISEL-GFX9GEN-NEXT: s_setpc_b64 s[30:31]458;459; GISEL-VI-LABEL: v_mad_mix_f32_negf16lo_f16lo_f16lo:460; GISEL-VI: ; %bb.0:461; GISEL-VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)462; GISEL-VI-NEXT: v_cvt_f32_f16_e64 v3, -v0463; GISEL-VI-NEXT: v_cvt_f32_f16_e32 v1, v1464; GISEL-VI-NEXT: v_cvt_f32_f16_e32 v0, v2465; GISEL-VI-NEXT: v_mac_f32_e32 v0, v3, v1466; GISEL-VI-NEXT: s_setpc_b64 s[30:31]467;468; GISEL-CI-LABEL: v_mad_mix_f32_negf16lo_f16lo_f16lo:469; GISEL-CI: ; %bb.0:470; GISEL-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)471; GISEL-CI-NEXT: v_cvt_f32_f16_e64 v3, -v0472; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v1, v1473; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v0, v2474; GISEL-CI-NEXT: v_mac_f32_e32 v0, v3, v1475; GISEL-CI-NEXT: s_setpc_b64 s[30:31]476 %src0.ext = fpext half %src0 to float477 %src1.ext = fpext half %src1 to float478 %src2.ext = fpext half %src2 to float479 %src0.ext.neg = fneg float %src0.ext480 %result = tail call float @llvm.fmuladd.f32(float %src0.ext.neg, float %src1.ext, float %src2.ext)481 ret float %result482}483 484define float @v_mad_mix_f32_absf16lo_f16lo_f16lo(half %src0, half %src1, half %src2) #0 {485; GFX1100-LABEL: v_mad_mix_f32_absf16lo_f16lo_f16lo:486; GFX1100: ; %bb.0:487; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)488; GFX1100-NEXT: v_fma_mix_f32 v0, |v0|, v1, v2 op_sel_hi:[1,1,1]489; GFX1100-NEXT: s_setpc_b64 s[30:31]490;491; GFX900-LABEL: v_mad_mix_f32_absf16lo_f16lo_f16lo:492; GFX900: ; %bb.0:493; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)494; GFX900-NEXT: v_mad_mix_f32 v0, |v0|, v1, v2 op_sel_hi:[1,1,1]495; GFX900-NEXT: s_setpc_b64 s[30:31]496;497; GFX906-LABEL: v_mad_mix_f32_absf16lo_f16lo_f16lo:498; GFX906: ; %bb.0:499; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)500; GFX906-NEXT: v_fma_mix_f32 v0, |v0|, v1, v2 op_sel_hi:[1,1,1]501; GFX906-NEXT: s_setpc_b64 s[30:31]502;503; GFX9GEN-LABEL: v_mad_mix_f32_absf16lo_f16lo_f16lo:504; GFX9GEN: ; %bb.0:505; GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)506; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v0507; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v1, v1508; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v2, v2509; GFX9GEN-NEXT: v_mad_f32 v0, |v0|, v1, v2510; GFX9GEN-NEXT: s_setpc_b64 s[30:31]511;512; VI-LABEL: v_mad_mix_f32_absf16lo_f16lo_f16lo:513; VI: ; %bb.0:514; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)515; VI-NEXT: v_cvt_f32_f16_e32 v0, v0516; VI-NEXT: v_cvt_f32_f16_e32 v1, v1517; VI-NEXT: v_cvt_f32_f16_e32 v2, v2518; VI-NEXT: v_mad_f32 v0, |v0|, v1, v2519; VI-NEXT: s_setpc_b64 s[30:31]520;521; SDAG-CI-LABEL: v_mad_mix_f32_absf16lo_f16lo_f16lo:522; SDAG-CI: ; %bb.0:523; SDAG-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)524; SDAG-CI-NEXT: v_mad_f32 v0, |v0|, v1, v2525; SDAG-CI-NEXT: s_setpc_b64 s[30:31]526;527; GISEL-CI-LABEL: v_mad_mix_f32_absf16lo_f16lo_f16lo:528; GISEL-CI: ; %bb.0:529; GISEL-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)530; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v0, v0531; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v1, v1532; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v2, v2533; GISEL-CI-NEXT: v_mad_f32 v0, |v0|, v1, v2534; GISEL-CI-NEXT: s_setpc_b64 s[30:31]535 %src0.ext = fpext half %src0 to float536 %src1.ext = fpext half %src1 to float537 %src2.ext = fpext half %src2 to float538 %src0.ext.abs = call float @llvm.fabs.f32(float %src0.ext)539 %result = tail call float @llvm.fmuladd.f32(float %src0.ext.abs, float %src1.ext, float %src2.ext)540 ret float %result541}542 543define float @v_mad_mix_f32_negabsf16lo_f16lo_f16lo(half %src0, half %src1, half %src2) #0 {544; GFX1100-LABEL: v_mad_mix_f32_negabsf16lo_f16lo_f16lo:545; GFX1100: ; %bb.0:546; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)547; GFX1100-NEXT: v_fma_mix_f32 v0, -|v0|, v1, v2 op_sel_hi:[1,1,1]548; GFX1100-NEXT: s_setpc_b64 s[30:31]549;550; GFX900-LABEL: v_mad_mix_f32_negabsf16lo_f16lo_f16lo:551; GFX900: ; %bb.0:552; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)553; GFX900-NEXT: v_mad_mix_f32 v0, -|v0|, v1, v2 op_sel_hi:[1,1,1]554; GFX900-NEXT: s_setpc_b64 s[30:31]555;556; GFX906-LABEL: v_mad_mix_f32_negabsf16lo_f16lo_f16lo:557; GFX906: ; %bb.0:558; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)559; GFX906-NEXT: v_fma_mix_f32 v0, -|v0|, v1, v2 op_sel_hi:[1,1,1]560; GFX906-NEXT: s_setpc_b64 s[30:31]561;562; GFX9GEN-LABEL: v_mad_mix_f32_negabsf16lo_f16lo_f16lo:563; GFX9GEN: ; %bb.0:564; GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)565; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v0566; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v1, v1567; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v2, v2568; GFX9GEN-NEXT: v_mad_f32 v0, -|v0|, v1, v2569; GFX9GEN-NEXT: s_setpc_b64 s[30:31]570;571; VI-LABEL: v_mad_mix_f32_negabsf16lo_f16lo_f16lo:572; VI: ; %bb.0:573; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)574; VI-NEXT: v_cvt_f32_f16_e32 v0, v0575; VI-NEXT: v_cvt_f32_f16_e32 v1, v1576; VI-NEXT: v_cvt_f32_f16_e32 v2, v2577; VI-NEXT: v_mad_f32 v0, -|v0|, v1, v2578; VI-NEXT: s_setpc_b64 s[30:31]579;580; SDAG-CI-LABEL: v_mad_mix_f32_negabsf16lo_f16lo_f16lo:581; SDAG-CI: ; %bb.0:582; SDAG-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)583; SDAG-CI-NEXT: v_mad_f32 v0, -|v0|, v1, v2584; SDAG-CI-NEXT: s_setpc_b64 s[30:31]585;586; GISEL-CI-LABEL: v_mad_mix_f32_negabsf16lo_f16lo_f16lo:587; GISEL-CI: ; %bb.0:588; GISEL-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)589; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v0, v0590; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v1, v1591; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v2, v2592; GISEL-CI-NEXT: v_mad_f32 v0, -|v0|, v1, v2593; GISEL-CI-NEXT: s_setpc_b64 s[30:31]594 %src0.ext = fpext half %src0 to float595 %src1.ext = fpext half %src1 to float596 %src2.ext = fpext half %src2 to float597 %src0.ext.abs = call float @llvm.fabs.f32(float %src0.ext)598 %src0.ext.neg.abs = fneg float %src0.ext.abs599 %result = tail call float @llvm.fmuladd.f32(float %src0.ext.neg.abs, float %src1.ext, float %src2.ext)600 ret float %result601}602 603define float @v_mad_mix_f32_f16lo_f16lo_f32(half %src0, half %src1, float %src2) #0 {604; GFX1100-LABEL: v_mad_mix_f32_f16lo_f16lo_f32:605; GFX1100: ; %bb.0:606; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)607; GFX1100-NEXT: v_fma_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0]608; GFX1100-NEXT: s_setpc_b64 s[30:31]609;610; GFX900-LABEL: v_mad_mix_f32_f16lo_f16lo_f32:611; GFX900: ; %bb.0:612; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)613; GFX900-NEXT: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0]614; GFX900-NEXT: s_setpc_b64 s[30:31]615;616; GFX906-LABEL: v_mad_mix_f32_f16lo_f16lo_f32:617; GFX906: ; %bb.0:618; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)619; GFX906-NEXT: v_fma_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0]620; GFX906-NEXT: s_setpc_b64 s[30:31]621;622; GFX9GEN-LABEL: v_mad_mix_f32_f16lo_f16lo_f32:623; GFX9GEN: ; %bb.0:624; GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)625; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v0626; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v1, v1627; GFX9GEN-NEXT: v_mad_f32 v0, v0, v1, v2628; GFX9GEN-NEXT: s_setpc_b64 s[30:31]629;630; VI-LABEL: v_mad_mix_f32_f16lo_f16lo_f32:631; VI: ; %bb.0:632; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)633; VI-NEXT: v_cvt_f32_f16_e32 v0, v0634; VI-NEXT: v_cvt_f32_f16_e32 v1, v1635; VI-NEXT: v_mad_f32 v0, v0, v1, v2636; VI-NEXT: s_setpc_b64 s[30:31]637;638; SDAG-CI-LABEL: v_mad_mix_f32_f16lo_f16lo_f32:639; SDAG-CI: ; %bb.0:640; SDAG-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)641; SDAG-CI-NEXT: v_mad_f32 v0, v0, v1, v2642; SDAG-CI-NEXT: s_setpc_b64 s[30:31]643;644; GISEL-CI-LABEL: v_mad_mix_f32_f16lo_f16lo_f32:645; GISEL-CI: ; %bb.0:646; GISEL-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)647; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v0, v0648; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v1, v1649; GISEL-CI-NEXT: v_mad_f32 v0, v0, v1, v2650; GISEL-CI-NEXT: s_setpc_b64 s[30:31]651 %src0.ext = fpext half %src0 to float652 %src1.ext = fpext half %src1 to float653 %result = tail call float @llvm.fmuladd.f32(float %src0.ext, float %src1.ext, float %src2)654 ret float %result655}656 657define float @v_mad_mix_f32_f16lo_f16lo_negf32(half %src0, half %src1, float %src2) #0 {658; GFX1100-LABEL: v_mad_mix_f32_f16lo_f16lo_negf32:659; GFX1100: ; %bb.0:660; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)661; GFX1100-NEXT: v_fma_mix_f32 v0, v0, v1, -v2 op_sel_hi:[1,1,0]662; GFX1100-NEXT: s_setpc_b64 s[30:31]663;664; GFX900-LABEL: v_mad_mix_f32_f16lo_f16lo_negf32:665; GFX900: ; %bb.0:666; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)667; GFX900-NEXT: v_mad_mix_f32 v0, v0, v1, -v2 op_sel_hi:[1,1,0]668; GFX900-NEXT: s_setpc_b64 s[30:31]669;670; GFX906-LABEL: v_mad_mix_f32_f16lo_f16lo_negf32:671; GFX906: ; %bb.0:672; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)673; GFX906-NEXT: v_fma_mix_f32 v0, v0, v1, -v2 op_sel_hi:[1,1,0]674; GFX906-NEXT: s_setpc_b64 s[30:31]675;676; GFX9GEN-LABEL: v_mad_mix_f32_f16lo_f16lo_negf32:677; GFX9GEN: ; %bb.0:678; GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)679; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v0680; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v1, v1681; GFX9GEN-NEXT: v_mad_f32 v0, v0, v1, -v2682; GFX9GEN-NEXT: s_setpc_b64 s[30:31]683;684; VI-LABEL: v_mad_mix_f32_f16lo_f16lo_negf32:685; VI: ; %bb.0:686; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)687; VI-NEXT: v_cvt_f32_f16_e32 v0, v0688; VI-NEXT: v_cvt_f32_f16_e32 v1, v1689; VI-NEXT: v_mad_f32 v0, v0, v1, -v2690; VI-NEXT: s_setpc_b64 s[30:31]691;692; SDAG-CI-LABEL: v_mad_mix_f32_f16lo_f16lo_negf32:693; SDAG-CI: ; %bb.0:694; SDAG-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)695; SDAG-CI-NEXT: v_mad_f32 v0, v0, v1, -v2696; SDAG-CI-NEXT: s_setpc_b64 s[30:31]697;698; GISEL-CI-LABEL: v_mad_mix_f32_f16lo_f16lo_negf32:699; GISEL-CI: ; %bb.0:700; GISEL-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)701; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v0, v0702; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v1, v1703; GISEL-CI-NEXT: v_mad_f32 v0, v0, v1, -v2704; GISEL-CI-NEXT: s_setpc_b64 s[30:31]705 %src0.ext = fpext half %src0 to float706 %src1.ext = fpext half %src1 to float707 %src2.neg = fneg float %src2708 %result = tail call float @llvm.fmuladd.f32(float %src0.ext, float %src1.ext, float %src2.neg)709 ret float %result710}711 712define float @v_mad_mix_f32_f16lo_f16lo_absf32(half %src0, half %src1, float %src2) #0 {713; GFX1100-LABEL: v_mad_mix_f32_f16lo_f16lo_absf32:714; GFX1100: ; %bb.0:715; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)716; GFX1100-NEXT: v_fma_mix_f32 v0, v0, v1, |v2| op_sel_hi:[1,1,0]717; GFX1100-NEXT: s_setpc_b64 s[30:31]718;719; GFX900-LABEL: v_mad_mix_f32_f16lo_f16lo_absf32:720; GFX900: ; %bb.0:721; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)722; GFX900-NEXT: v_mad_mix_f32 v0, v0, v1, |v2| op_sel_hi:[1,1,0]723; GFX900-NEXT: s_setpc_b64 s[30:31]724;725; GFX906-LABEL: v_mad_mix_f32_f16lo_f16lo_absf32:726; GFX906: ; %bb.0:727; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)728; GFX906-NEXT: v_fma_mix_f32 v0, v0, v1, |v2| op_sel_hi:[1,1,0]729; GFX906-NEXT: s_setpc_b64 s[30:31]730;731; GFX9GEN-LABEL: v_mad_mix_f32_f16lo_f16lo_absf32:732; GFX9GEN: ; %bb.0:733; GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)734; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v0735; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v1, v1736; GFX9GEN-NEXT: v_mad_f32 v0, v0, v1, |v2|737; GFX9GEN-NEXT: s_setpc_b64 s[30:31]738;739; VI-LABEL: v_mad_mix_f32_f16lo_f16lo_absf32:740; VI: ; %bb.0:741; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)742; VI-NEXT: v_cvt_f32_f16_e32 v0, v0743; VI-NEXT: v_cvt_f32_f16_e32 v1, v1744; VI-NEXT: v_mad_f32 v0, v0, v1, |v2|745; VI-NEXT: s_setpc_b64 s[30:31]746;747; SDAG-CI-LABEL: v_mad_mix_f32_f16lo_f16lo_absf32:748; SDAG-CI: ; %bb.0:749; SDAG-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)750; SDAG-CI-NEXT: v_mad_f32 v0, v0, v1, |v2|751; SDAG-CI-NEXT: s_setpc_b64 s[30:31]752;753; GISEL-CI-LABEL: v_mad_mix_f32_f16lo_f16lo_absf32:754; GISEL-CI: ; %bb.0:755; GISEL-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)756; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v0, v0757; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v1, v1758; GISEL-CI-NEXT: v_mad_f32 v0, v0, v1, |v2|759; GISEL-CI-NEXT: s_setpc_b64 s[30:31]760 %src0.ext = fpext half %src0 to float761 %src1.ext = fpext half %src1 to float762 %src2.abs = call float @llvm.fabs.f32(float %src2)763 %result = tail call float @llvm.fmuladd.f32(float %src0.ext, float %src1.ext, float %src2.abs)764 ret float %result765}766 767define float @v_mad_mix_f32_f16lo_f16lo_negabsf32(half %src0, half %src1, float %src2) #0 {768; GFX1100-LABEL: v_mad_mix_f32_f16lo_f16lo_negabsf32:769; GFX1100: ; %bb.0:770; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)771; GFX1100-NEXT: v_fma_mix_f32 v0, v0, v1, -|v2| op_sel_hi:[1,1,0]772; GFX1100-NEXT: s_setpc_b64 s[30:31]773;774; GFX900-LABEL: v_mad_mix_f32_f16lo_f16lo_negabsf32:775; GFX900: ; %bb.0:776; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)777; GFX900-NEXT: v_mad_mix_f32 v0, v0, v1, -|v2| op_sel_hi:[1,1,0]778; GFX900-NEXT: s_setpc_b64 s[30:31]779;780; GFX906-LABEL: v_mad_mix_f32_f16lo_f16lo_negabsf32:781; GFX906: ; %bb.0:782; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)783; GFX906-NEXT: v_fma_mix_f32 v0, v0, v1, -|v2| op_sel_hi:[1,1,0]784; GFX906-NEXT: s_setpc_b64 s[30:31]785;786; GFX9GEN-LABEL: v_mad_mix_f32_f16lo_f16lo_negabsf32:787; GFX9GEN: ; %bb.0:788; GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)789; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v0790; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v1, v1791; GFX9GEN-NEXT: v_mad_f32 v0, v0, v1, -|v2|792; GFX9GEN-NEXT: s_setpc_b64 s[30:31]793;794; VI-LABEL: v_mad_mix_f32_f16lo_f16lo_negabsf32:795; VI: ; %bb.0:796; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)797; VI-NEXT: v_cvt_f32_f16_e32 v0, v0798; VI-NEXT: v_cvt_f32_f16_e32 v1, v1799; VI-NEXT: v_mad_f32 v0, v0, v1, -|v2|800; VI-NEXT: s_setpc_b64 s[30:31]801;802; SDAG-CI-LABEL: v_mad_mix_f32_f16lo_f16lo_negabsf32:803; SDAG-CI: ; %bb.0:804; SDAG-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)805; SDAG-CI-NEXT: v_mad_f32 v0, v0, v1, -|v2|806; SDAG-CI-NEXT: s_setpc_b64 s[30:31]807;808; GISEL-CI-LABEL: v_mad_mix_f32_f16lo_f16lo_negabsf32:809; GISEL-CI: ; %bb.0:810; GISEL-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)811; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v0, v0812; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v1, v1813; GISEL-CI-NEXT: v_mad_f32 v0, v0, v1, -|v2|814; GISEL-CI-NEXT: s_setpc_b64 s[30:31]815 %src0.ext = fpext half %src0 to float816 %src1.ext = fpext half %src1 to float817 %src2.abs = call float @llvm.fabs.f32(float %src2)818 %src2.neg.abs = fneg float %src2.abs819 %result = tail call float @llvm.fmuladd.f32(float %src0.ext, float %src1.ext, float %src2.neg.abs)820 ret float %result821}822 823; TODO: Fold inline immediates. Need to be careful because it is an824; f16 inline immediate that may be converted to f32, not an actual f32825; inline immediate.826 827define float @v_mad_mix_f32_f16lo_f16lo_f32imm1(half %src0, half %src1) #0 {828; SDAG-GFX1100-LABEL: v_mad_mix_f32_f16lo_f16lo_f32imm1:829; SDAG-GFX1100: ; %bb.0:830; SDAG-GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)831; SDAG-GFX1100-NEXT: s_mov_b32 s0, 1.0832; SDAG-GFX1100-NEXT: s_delay_alu instid0(SALU_CYCLE_1)833; SDAG-GFX1100-NEXT: v_fma_mix_f32 v0, v0, v1, s0 op_sel_hi:[1,1,0]834; SDAG-GFX1100-NEXT: s_setpc_b64 s[30:31]835;836; SDAG-GFX900-LABEL: v_mad_mix_f32_f16lo_f16lo_f32imm1:837; SDAG-GFX900: ; %bb.0:838; SDAG-GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)839; SDAG-GFX900-NEXT: s_mov_b32 s4, 1.0840; SDAG-GFX900-NEXT: v_mad_mix_f32 v0, v0, v1, s4 op_sel_hi:[1,1,0]841; SDAG-GFX900-NEXT: s_setpc_b64 s[30:31]842;843; SDAG-GFX906-LABEL: v_mad_mix_f32_f16lo_f16lo_f32imm1:844; SDAG-GFX906: ; %bb.0:845; SDAG-GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)846; SDAG-GFX906-NEXT: s_mov_b32 s4, 1.0847; SDAG-GFX906-NEXT: v_fma_mix_f32 v0, v0, v1, s4 op_sel_hi:[1,1,0]848; SDAG-GFX906-NEXT: s_setpc_b64 s[30:31]849;850; GFX9GEN-LABEL: v_mad_mix_f32_f16lo_f16lo_f32imm1:851; GFX9GEN: ; %bb.0:852; GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)853; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v0854; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v1, v1855; GFX9GEN-NEXT: v_mad_f32 v0, v0, v1, 1.0856; GFX9GEN-NEXT: s_setpc_b64 s[30:31]857;858; VI-LABEL: v_mad_mix_f32_f16lo_f16lo_f32imm1:859; VI: ; %bb.0:860; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)861; VI-NEXT: v_cvt_f32_f16_e32 v0, v0862; VI-NEXT: v_cvt_f32_f16_e32 v1, v1863; VI-NEXT: v_mad_f32 v0, v0, v1, 1.0864; VI-NEXT: s_setpc_b64 s[30:31]865;866; SDAG-CI-LABEL: v_mad_mix_f32_f16lo_f16lo_f32imm1:867; SDAG-CI: ; %bb.0:868; SDAG-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)869; SDAG-CI-NEXT: v_mad_f32 v0, v0, v1, 1.0870; SDAG-CI-NEXT: s_setpc_b64 s[30:31]871;872; GISEL-GFX1100-LABEL: v_mad_mix_f32_f16lo_f16lo_f32imm1:873; GISEL-GFX1100: ; %bb.0:874; GISEL-GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)875; GISEL-GFX1100-NEXT: v_mov_b32_e32 v2, 1.0876; GISEL-GFX1100-NEXT: s_delay_alu instid0(VALU_DEP_1)877; GISEL-GFX1100-NEXT: v_fma_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0]878; GISEL-GFX1100-NEXT: s_setpc_b64 s[30:31]879;880; GISEL-GFX900-LABEL: v_mad_mix_f32_f16lo_f16lo_f32imm1:881; GISEL-GFX900: ; %bb.0:882; GISEL-GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)883; GISEL-GFX900-NEXT: v_mov_b32_e32 v2, 1.0884; GISEL-GFX900-NEXT: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0]885; GISEL-GFX900-NEXT: s_setpc_b64 s[30:31]886;887; GISEL-GFX906-LABEL: v_mad_mix_f32_f16lo_f16lo_f32imm1:888; GISEL-GFX906: ; %bb.0:889; GISEL-GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)890; GISEL-GFX906-NEXT: v_mov_b32_e32 v2, 1.0891; GISEL-GFX906-NEXT: v_fma_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0]892; GISEL-GFX906-NEXT: s_setpc_b64 s[30:31]893;894; GISEL-CI-LABEL: v_mad_mix_f32_f16lo_f16lo_f32imm1:895; GISEL-CI: ; %bb.0:896; GISEL-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)897; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v0, v0898; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v1, v1899; GISEL-CI-NEXT: v_mad_f32 v0, v0, v1, 1.0900; GISEL-CI-NEXT: s_setpc_b64 s[30:31]901 %src0.ext = fpext half %src0 to float902 %src1.ext = fpext half %src1 to float903 %result = tail call float @llvm.fmuladd.f32(float %src0.ext, float %src1.ext, float 1.0)904 ret float %result905}906 907define float @v_mad_mix_f32_f16lo_f16lo_f32imminv2pi(half %src0, half %src1) #0 {908; SDAG-GFX1100-LABEL: v_mad_mix_f32_f16lo_f16lo_f32imminv2pi:909; SDAG-GFX1100: ; %bb.0:910; SDAG-GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)911; SDAG-GFX1100-NEXT: s_mov_b32 s0, 0.15915494912; SDAG-GFX1100-NEXT: s_delay_alu instid0(SALU_CYCLE_1)913; SDAG-GFX1100-NEXT: v_fma_mix_f32 v0, v0, v1, s0 op_sel_hi:[1,1,0]914; SDAG-GFX1100-NEXT: s_setpc_b64 s[30:31]915;916; SDAG-GFX900-LABEL: v_mad_mix_f32_f16lo_f16lo_f32imminv2pi:917; SDAG-GFX900: ; %bb.0:918; SDAG-GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)919; SDAG-GFX900-NEXT: s_mov_b32 s4, 0.15915494920; SDAG-GFX900-NEXT: v_mad_mix_f32 v0, v0, v1, s4 op_sel_hi:[1,1,0]921; SDAG-GFX900-NEXT: s_setpc_b64 s[30:31]922;923; SDAG-GFX906-LABEL: v_mad_mix_f32_f16lo_f16lo_f32imminv2pi:924; SDAG-GFX906: ; %bb.0:925; SDAG-GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)926; SDAG-GFX906-NEXT: s_mov_b32 s4, 0.15915494927; SDAG-GFX906-NEXT: v_fma_mix_f32 v0, v0, v1, s4 op_sel_hi:[1,1,0]928; SDAG-GFX906-NEXT: s_setpc_b64 s[30:31]929;930; GFX9GEN-LABEL: v_mad_mix_f32_f16lo_f16lo_f32imminv2pi:931; GFX9GEN: ; %bb.0:932; GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)933; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v0934; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v1, v1935; GFX9GEN-NEXT: v_mad_f32 v0, v0, v1, 0.15915494936; GFX9GEN-NEXT: s_setpc_b64 s[30:31]937;938; VI-LABEL: v_mad_mix_f32_f16lo_f16lo_f32imminv2pi:939; VI: ; %bb.0:940; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)941; VI-NEXT: v_cvt_f32_f16_e32 v0, v0942; VI-NEXT: v_cvt_f32_f16_e32 v1, v1943; VI-NEXT: v_mad_f32 v0, v0, v1, 0.15915494944; VI-NEXT: s_setpc_b64 s[30:31]945;946; SDAG-CI-LABEL: v_mad_mix_f32_f16lo_f16lo_f32imminv2pi:947; SDAG-CI: ; %bb.0:948; SDAG-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)949; SDAG-CI-NEXT: v_madak_f32 v0, v0, v1, 0x3e22f983950; SDAG-CI-NEXT: s_setpc_b64 s[30:31]951;952; GISEL-GFX1100-LABEL: v_mad_mix_f32_f16lo_f16lo_f32imminv2pi:953; GISEL-GFX1100: ; %bb.0:954; GISEL-GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)955; GISEL-GFX1100-NEXT: v_mov_b32_e32 v2, 0.15915494956; GISEL-GFX1100-NEXT: s_delay_alu instid0(VALU_DEP_1)957; GISEL-GFX1100-NEXT: v_fma_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0]958; GISEL-GFX1100-NEXT: s_setpc_b64 s[30:31]959;960; GISEL-GFX900-LABEL: v_mad_mix_f32_f16lo_f16lo_f32imminv2pi:961; GISEL-GFX900: ; %bb.0:962; GISEL-GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)963; GISEL-GFX900-NEXT: v_mov_b32_e32 v2, 0.15915494964; GISEL-GFX900-NEXT: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0]965; GISEL-GFX900-NEXT: s_setpc_b64 s[30:31]966;967; GISEL-GFX906-LABEL: v_mad_mix_f32_f16lo_f16lo_f32imminv2pi:968; GISEL-GFX906: ; %bb.0:969; GISEL-GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)970; GISEL-GFX906-NEXT: v_mov_b32_e32 v2, 0.15915494971; GISEL-GFX906-NEXT: v_fma_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0]972; GISEL-GFX906-NEXT: s_setpc_b64 s[30:31]973;974; GISEL-CI-LABEL: v_mad_mix_f32_f16lo_f16lo_f32imminv2pi:975; GISEL-CI: ; %bb.0:976; GISEL-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)977; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v2, v0978; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v1, v1979; GISEL-CI-NEXT: v_mov_b32_e32 v0, 0x3e22f983980; GISEL-CI-NEXT: v_mac_f32_e32 v0, v2, v1981; GISEL-CI-NEXT: s_setpc_b64 s[30:31]982 %src0.ext = fpext half %src0 to float983 %src1.ext = fpext half %src1 to float984 %result = tail call float @llvm.fmuladd.f32(float %src0.ext, float %src1.ext, float 0x3FC45F3060000000)985 ret float %result986}987 988; Attempt to break inline immediate folding. If the operand is989; interpreted as f32, the inline immediate is really the f16 inline990; imm value converted to f32.991; fpext f16 1/2pi = 0x3e230000992; f32 1/2pi = 0x3e22f983993 994define float @v_mad_mix_f32_f16lo_f16lo_cvtf16imminv2pi(half %src0, half %src1) #0 {995; SDAG-GFX1100-LABEL: v_mad_mix_f32_f16lo_f16lo_cvtf16imminv2pi:996; SDAG-GFX1100: ; %bb.0:997; SDAG-GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)998; SDAG-GFX1100-NEXT: s_mov_b32 s0, 0x3e230000999; SDAG-GFX1100-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1000; SDAG-GFX1100-NEXT: v_fma_mix_f32 v0, v0, v1, s0 op_sel_hi:[1,1,0]1001; SDAG-GFX1100-NEXT: s_setpc_b64 s[30:31]1002;1003; SDAG-GFX900-LABEL: v_mad_mix_f32_f16lo_f16lo_cvtf16imminv2pi:1004; SDAG-GFX900: ; %bb.0:1005; SDAG-GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1006; SDAG-GFX900-NEXT: s_mov_b32 s4, 0x3e2300001007; SDAG-GFX900-NEXT: v_mad_mix_f32 v0, v0, v1, s4 op_sel_hi:[1,1,0]1008; SDAG-GFX900-NEXT: s_setpc_b64 s[30:31]1009;1010; SDAG-GFX906-LABEL: v_mad_mix_f32_f16lo_f16lo_cvtf16imminv2pi:1011; SDAG-GFX906: ; %bb.0:1012; SDAG-GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1013; SDAG-GFX906-NEXT: s_mov_b32 s4, 0x3e2300001014; SDAG-GFX906-NEXT: v_fma_mix_f32 v0, v0, v1, s4 op_sel_hi:[1,1,0]1015; SDAG-GFX906-NEXT: s_setpc_b64 s[30:31]1016;1017; SDAG-GFX9GEN-LABEL: v_mad_mix_f32_f16lo_f16lo_cvtf16imminv2pi:1018; SDAG-GFX9GEN: ; %bb.0:1019; SDAG-GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1020; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v01021; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v1, v11022; SDAG-GFX9GEN-NEXT: v_madak_f32 v0, v0, v1, 0x3e2300001023; SDAG-GFX9GEN-NEXT: s_setpc_b64 s[30:31]1024;1025; SDAG-VI-LABEL: v_mad_mix_f32_f16lo_f16lo_cvtf16imminv2pi:1026; SDAG-VI: ; %bb.0:1027; SDAG-VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1028; SDAG-VI-NEXT: v_cvt_f32_f16_e32 v0, v01029; SDAG-VI-NEXT: v_cvt_f32_f16_e32 v1, v11030; SDAG-VI-NEXT: v_madak_f32 v0, v0, v1, 0x3e2300001031; SDAG-VI-NEXT: s_setpc_b64 s[30:31]1032;1033; SDAG-CI-LABEL: v_mad_mix_f32_f16lo_f16lo_cvtf16imminv2pi:1034; SDAG-CI: ; %bb.0:1035; SDAG-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1036; SDAG-CI-NEXT: v_madak_f32 v0, v0, v1, 0x3e2300001037; SDAG-CI-NEXT: s_setpc_b64 s[30:31]1038;1039; GISEL-GFX1100-LABEL: v_mad_mix_f32_f16lo_f16lo_cvtf16imminv2pi:1040; GISEL-GFX1100: ; %bb.0:1041; GISEL-GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1042; GISEL-GFX1100-NEXT: v_mov_b32_e32 v2, 0x3e2300001043; GISEL-GFX1100-NEXT: s_delay_alu instid0(VALU_DEP_1)1044; GISEL-GFX1100-NEXT: v_fma_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0]1045; GISEL-GFX1100-NEXT: s_setpc_b64 s[30:31]1046;1047; GISEL-GFX900-LABEL: v_mad_mix_f32_f16lo_f16lo_cvtf16imminv2pi:1048; GISEL-GFX900: ; %bb.0:1049; GISEL-GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1050; GISEL-GFX900-NEXT: v_mov_b32_e32 v2, 0x3e2300001051; GISEL-GFX900-NEXT: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0]1052; GISEL-GFX900-NEXT: s_setpc_b64 s[30:31]1053;1054; GISEL-GFX906-LABEL: v_mad_mix_f32_f16lo_f16lo_cvtf16imminv2pi:1055; GISEL-GFX906: ; %bb.0:1056; GISEL-GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1057; GISEL-GFX906-NEXT: v_mov_b32_e32 v2, 0x3e2300001058; GISEL-GFX906-NEXT: v_fma_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0]1059; GISEL-GFX906-NEXT: s_setpc_b64 s[30:31]1060;1061; GISEL-GFX9GEN-LABEL: v_mad_mix_f32_f16lo_f16lo_cvtf16imminv2pi:1062; GISEL-GFX9GEN: ; %bb.0:1063; GISEL-GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1064; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v2, v01065; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v1, v11066; GISEL-GFX9GEN-NEXT: v_mov_b32_e32 v0, 0x3e2300001067; GISEL-GFX9GEN-NEXT: v_mac_f32_e32 v0, v2, v11068; GISEL-GFX9GEN-NEXT: s_setpc_b64 s[30:31]1069;1070; GISEL-VI-LABEL: v_mad_mix_f32_f16lo_f16lo_cvtf16imminv2pi:1071; GISEL-VI: ; %bb.0:1072; GISEL-VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1073; GISEL-VI-NEXT: v_cvt_f32_f16_e32 v2, v01074; GISEL-VI-NEXT: v_cvt_f32_f16_e32 v1, v11075; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x3e2300001076; GISEL-VI-NEXT: v_mac_f32_e32 v0, v2, v11077; GISEL-VI-NEXT: s_setpc_b64 s[30:31]1078;1079; GISEL-CI-LABEL: v_mad_mix_f32_f16lo_f16lo_cvtf16imminv2pi:1080; GISEL-CI: ; %bb.0:1081; GISEL-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1082; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v2, v01083; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v1, v11084; GISEL-CI-NEXT: v_mov_b32_e32 v0, 0x3e2300001085; GISEL-CI-NEXT: v_mac_f32_e32 v0, v2, v11086; GISEL-CI-NEXT: s_setpc_b64 s[30:31]1087 %src0.ext = fpext half %src0 to float1088 %src1.ext = fpext half %src1 to float1089 %src2 = fpext half 0xH3118 to float1090 %result = tail call float @llvm.fmuladd.f32(float %src0.ext, float %src1.ext, float %src2)1091 ret float %result1092}1093 1094 1095define float @v_mad_mix_f32_f16lo_f16lo_cvtf16imm63(half %src0, half %src1) #0 {1096; SDAG-GFX1100-LABEL: v_mad_mix_f32_f16lo_f16lo_cvtf16imm63:1097; SDAG-GFX1100: ; %bb.0:1098; SDAG-GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1099; SDAG-GFX1100-NEXT: s_mov_b32 s0, 0x367c00001100; SDAG-GFX1100-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1101; SDAG-GFX1100-NEXT: v_fma_mix_f32 v0, v0, v1, s0 op_sel_hi:[1,1,0]1102; SDAG-GFX1100-NEXT: s_setpc_b64 s[30:31]1103;1104; SDAG-GFX900-LABEL: v_mad_mix_f32_f16lo_f16lo_cvtf16imm63:1105; SDAG-GFX900: ; %bb.0:1106; SDAG-GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1107; SDAG-GFX900-NEXT: s_mov_b32 s4, 0x367c00001108; SDAG-GFX900-NEXT: v_mad_mix_f32 v0, v0, v1, s4 op_sel_hi:[1,1,0]1109; SDAG-GFX900-NEXT: s_setpc_b64 s[30:31]1110;1111; SDAG-GFX906-LABEL: v_mad_mix_f32_f16lo_f16lo_cvtf16imm63:1112; SDAG-GFX906: ; %bb.0:1113; SDAG-GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1114; SDAG-GFX906-NEXT: s_mov_b32 s4, 0x367c00001115; SDAG-GFX906-NEXT: v_fma_mix_f32 v0, v0, v1, s4 op_sel_hi:[1,1,0]1116; SDAG-GFX906-NEXT: s_setpc_b64 s[30:31]1117;1118; SDAG-GFX9GEN-LABEL: v_mad_mix_f32_f16lo_f16lo_cvtf16imm63:1119; SDAG-GFX9GEN: ; %bb.0:1120; SDAG-GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1121; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v01122; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v1, v11123; SDAG-GFX9GEN-NEXT: v_madak_f32 v0, v0, v1, 0x367c00001124; SDAG-GFX9GEN-NEXT: s_setpc_b64 s[30:31]1125;1126; SDAG-VI-LABEL: v_mad_mix_f32_f16lo_f16lo_cvtf16imm63:1127; SDAG-VI: ; %bb.0:1128; SDAG-VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1129; SDAG-VI-NEXT: v_cvt_f32_f16_e32 v0, v01130; SDAG-VI-NEXT: v_cvt_f32_f16_e32 v1, v11131; SDAG-VI-NEXT: v_madak_f32 v0, v0, v1, 0x367c00001132; SDAG-VI-NEXT: s_setpc_b64 s[30:31]1133;1134; SDAG-CI-LABEL: v_mad_mix_f32_f16lo_f16lo_cvtf16imm63:1135; SDAG-CI: ; %bb.0:1136; SDAG-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1137; SDAG-CI-NEXT: v_madak_f32 v0, v0, v1, 0x367c00001138; SDAG-CI-NEXT: s_setpc_b64 s[30:31]1139;1140; GISEL-GFX1100-LABEL: v_mad_mix_f32_f16lo_f16lo_cvtf16imm63:1141; GISEL-GFX1100: ; %bb.0:1142; GISEL-GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1143; GISEL-GFX1100-NEXT: v_mov_b32_e32 v2, 0x367c00001144; GISEL-GFX1100-NEXT: s_delay_alu instid0(VALU_DEP_1)1145; GISEL-GFX1100-NEXT: v_fma_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0]1146; GISEL-GFX1100-NEXT: s_setpc_b64 s[30:31]1147;1148; GISEL-GFX900-LABEL: v_mad_mix_f32_f16lo_f16lo_cvtf16imm63:1149; GISEL-GFX900: ; %bb.0:1150; GISEL-GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1151; GISEL-GFX900-NEXT: v_mov_b32_e32 v2, 0x367c00001152; GISEL-GFX900-NEXT: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0]1153; GISEL-GFX900-NEXT: s_setpc_b64 s[30:31]1154;1155; GISEL-GFX906-LABEL: v_mad_mix_f32_f16lo_f16lo_cvtf16imm63:1156; GISEL-GFX906: ; %bb.0:1157; GISEL-GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1158; GISEL-GFX906-NEXT: v_mov_b32_e32 v2, 0x367c00001159; GISEL-GFX906-NEXT: v_fma_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0]1160; GISEL-GFX906-NEXT: s_setpc_b64 s[30:31]1161;1162; GISEL-GFX9GEN-LABEL: v_mad_mix_f32_f16lo_f16lo_cvtf16imm63:1163; GISEL-GFX9GEN: ; %bb.0:1164; GISEL-GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1165; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v2, v01166; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v1, v11167; GISEL-GFX9GEN-NEXT: v_mov_b32_e32 v0, 0x367c00001168; GISEL-GFX9GEN-NEXT: v_mac_f32_e32 v0, v2, v11169; GISEL-GFX9GEN-NEXT: s_setpc_b64 s[30:31]1170;1171; GISEL-VI-LABEL: v_mad_mix_f32_f16lo_f16lo_cvtf16imm63:1172; GISEL-VI: ; %bb.0:1173; GISEL-VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1174; GISEL-VI-NEXT: v_cvt_f32_f16_e32 v2, v01175; GISEL-VI-NEXT: v_cvt_f32_f16_e32 v1, v11176; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x367c00001177; GISEL-VI-NEXT: v_mac_f32_e32 v0, v2, v11178; GISEL-VI-NEXT: s_setpc_b64 s[30:31]1179;1180; GISEL-CI-LABEL: v_mad_mix_f32_f16lo_f16lo_cvtf16imm63:1181; GISEL-CI: ; %bb.0:1182; GISEL-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1183; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v2, v01184; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v1, v11185; GISEL-CI-NEXT: v_mov_b32_e32 v0, 0x367c00001186; GISEL-CI-NEXT: v_mac_f32_e32 v0, v2, v11187; GISEL-CI-NEXT: s_setpc_b64 s[30:31]1188 %src0.ext = fpext half %src0 to float1189 %src1.ext = fpext half %src1 to float1190 %src2 = fpext half 0xH003F to float1191 %result = tail call float @llvm.fmuladd.f32(float %src0.ext, float %src1.ext, float %src2)1192 ret float %result1193}1194 1195define <2 x float> @v_mad_mix_v2f32_f32imm1(<2 x half> %src0, <2 x half> %src1) #0 {1196; SDAG-GFX1100-LABEL: v_mad_mix_v2f32_f32imm1:1197; SDAG-GFX1100: ; %bb.0:1198; SDAG-GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1199; SDAG-GFX1100-NEXT: s_mov_b32 s0, 1.01200; SDAG-GFX1100-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1201; SDAG-GFX1100-NEXT: v_fma_mix_f32 v2, v0, v1, s0 op_sel_hi:[1,1,0]1202; SDAG-GFX1100-NEXT: v_fma_mix_f32 v1, v0, v1, s0 op_sel:[1,1,0] op_sel_hi:[1,1,0]1203; SDAG-GFX1100-NEXT: v_mov_b32_e32 v0, v21204; SDAG-GFX1100-NEXT: s_setpc_b64 s[30:31]1205;1206; SDAG-GFX900-LABEL: v_mad_mix_v2f32_f32imm1:1207; SDAG-GFX900: ; %bb.0:1208; SDAG-GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1209; SDAG-GFX900-NEXT: s_mov_b32 s4, 1.01210; SDAG-GFX900-NEXT: v_mad_mix_f32 v2, v0, v1, s4 op_sel_hi:[1,1,0]1211; SDAG-GFX900-NEXT: v_mad_mix_f32 v1, v0, v1, s4 op_sel:[1,1,0] op_sel_hi:[1,1,0]1212; SDAG-GFX900-NEXT: v_mov_b32_e32 v0, v21213; SDAG-GFX900-NEXT: s_setpc_b64 s[30:31]1214;1215; SDAG-GFX906-LABEL: v_mad_mix_v2f32_f32imm1:1216; SDAG-GFX906: ; %bb.0:1217; SDAG-GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1218; SDAG-GFX906-NEXT: s_mov_b32 s4, 1.01219; SDAG-GFX906-NEXT: v_fma_mix_f32 v2, v0, v1, s4 op_sel_hi:[1,1,0]1220; SDAG-GFX906-NEXT: v_fma_mix_f32 v1, v0, v1, s4 op_sel:[1,1,0] op_sel_hi:[1,1,0]1221; SDAG-GFX906-NEXT: v_mov_b32_e32 v0, v21222; SDAG-GFX906-NEXT: s_setpc_b64 s[30:31]1223;1224; SDAG-GFX9GEN-LABEL: v_mad_mix_v2f32_f32imm1:1225; SDAG-GFX9GEN: ; %bb.0:1226; SDAG-GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1227; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11228; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v01229; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v3, v11230; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11231; SDAG-GFX9GEN-NEXT: v_mad_f32 v0, v0, v3, 1.01232; SDAG-GFX9GEN-NEXT: v_mad_f32 v1, v2, v1, 1.01233; SDAG-GFX9GEN-NEXT: s_setpc_b64 s[30:31]1234;1235; SDAG-VI-LABEL: v_mad_mix_v2f32_f32imm1:1236; SDAG-VI: ; %bb.0:1237; SDAG-VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1238; SDAG-VI-NEXT: v_cvt_f32_f16_sdwa v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11239; SDAG-VI-NEXT: v_cvt_f32_f16_e32 v0, v01240; SDAG-VI-NEXT: v_cvt_f32_f16_e32 v3, v11241; SDAG-VI-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11242; SDAG-VI-NEXT: v_mad_f32 v0, v0, v3, 1.01243; SDAG-VI-NEXT: v_mad_f32 v1, v2, v1, 1.01244; SDAG-VI-NEXT: s_setpc_b64 s[30:31]1245;1246; SDAG-CI-LABEL: v_mad_mix_v2f32_f32imm1:1247; SDAG-CI: ; %bb.0:1248; SDAG-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1249; SDAG-CI-NEXT: v_cvt_f16_f32_e32 v3, v31250; SDAG-CI-NEXT: v_cvt_f16_f32_e32 v2, v21251; SDAG-CI-NEXT: v_cvt_f16_f32_e32 v0, v01252; SDAG-CI-NEXT: v_cvt_f16_f32_e32 v1, v11253; SDAG-CI-NEXT: v_cvt_f32_f16_e32 v3, v31254; SDAG-CI-NEXT: v_cvt_f32_f16_e32 v2, v21255; SDAG-CI-NEXT: v_cvt_f32_f16_e32 v0, v01256; SDAG-CI-NEXT: v_cvt_f32_f16_e32 v1, v11257; SDAG-CI-NEXT: v_mad_f32 v0, v0, v2, 1.01258; SDAG-CI-NEXT: v_mad_f32 v1, v1, v3, 1.01259; SDAG-CI-NEXT: s_setpc_b64 s[30:31]1260;1261; GISEL-GFX1100-LABEL: v_mad_mix_v2f32_f32imm1:1262; GISEL-GFX1100: ; %bb.0:1263; GISEL-GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1264; GISEL-GFX1100-NEXT: v_mov_b32_e32 v3, 1.01265; GISEL-GFX1100-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1266; GISEL-GFX1100-NEXT: v_fma_mix_f32 v2, v0, v1, v3 op_sel_hi:[1,1,0]1267; GISEL-GFX1100-NEXT: v_fma_mix_f32 v1, v0, v1, v3 op_sel:[1,1,0] op_sel_hi:[1,1,0]1268; GISEL-GFX1100-NEXT: v_mov_b32_e32 v0, v21269; GISEL-GFX1100-NEXT: s_setpc_b64 s[30:31]1270;1271; GISEL-GFX900-LABEL: v_mad_mix_v2f32_f32imm1:1272; GISEL-GFX900: ; %bb.0:1273; GISEL-GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1274; GISEL-GFX900-NEXT: v_mov_b32_e32 v3, 1.01275; GISEL-GFX900-NEXT: v_mad_mix_f32 v2, v0, v1, v3 op_sel_hi:[1,1,0]1276; GISEL-GFX900-NEXT: v_mad_mix_f32 v1, v0, v1, v3 op_sel:[1,1,0] op_sel_hi:[1,1,0]1277; GISEL-GFX900-NEXT: v_mov_b32_e32 v0, v21278; GISEL-GFX900-NEXT: s_setpc_b64 s[30:31]1279;1280; GISEL-GFX906-LABEL: v_mad_mix_v2f32_f32imm1:1281; GISEL-GFX906: ; %bb.0:1282; GISEL-GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1283; GISEL-GFX906-NEXT: v_mov_b32_e32 v3, 1.01284; GISEL-GFX906-NEXT: v_fma_mix_f32 v2, v0, v1, v3 op_sel_hi:[1,1,0]1285; GISEL-GFX906-NEXT: v_fma_mix_f32 v1, v0, v1, v3 op_sel:[1,1,0] op_sel_hi:[1,1,0]1286; GISEL-GFX906-NEXT: v_mov_b32_e32 v0, v21287; GISEL-GFX906-NEXT: s_setpc_b64 s[30:31]1288;1289; GISEL-GFX9GEN-LABEL: v_mad_mix_v2f32_f32imm1:1290; GISEL-GFX9GEN: ; %bb.0:1291; GISEL-GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1292; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v2, v01293; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11294; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v11295; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11296; GISEL-GFX9GEN-NEXT: v_mad_f32 v0, v2, v0, 1.01297; GISEL-GFX9GEN-NEXT: v_mad_f32 v1, v3, v1, 1.01298; GISEL-GFX9GEN-NEXT: s_setpc_b64 s[30:31]1299;1300; GISEL-VI-LABEL: v_mad_mix_v2f32_f32imm1:1301; GISEL-VI: ; %bb.0:1302; GISEL-VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1303; GISEL-VI-NEXT: v_cvt_f32_f16_e32 v2, v01304; GISEL-VI-NEXT: v_cvt_f32_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11305; GISEL-VI-NEXT: v_cvt_f32_f16_e32 v0, v11306; GISEL-VI-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11307; GISEL-VI-NEXT: v_mad_f32 v0, v2, v0, 1.01308; GISEL-VI-NEXT: v_mad_f32 v1, v3, v1, 1.01309; GISEL-VI-NEXT: s_setpc_b64 s[30:31]1310;1311; GISEL-CI-LABEL: v_mad_mix_v2f32_f32imm1:1312; GISEL-CI: ; %bb.0:1313; GISEL-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1314; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v0, v01315; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v1, v11316; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v2, v21317; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v3, v31318; GISEL-CI-NEXT: v_mad_f32 v0, v0, v2, 1.01319; GISEL-CI-NEXT: v_mad_f32 v1, v1, v3, 1.01320; GISEL-CI-NEXT: s_setpc_b64 s[30:31]1321 %src0.ext = fpext <2 x half> %src0 to <2 x float>1322 %src1.ext = fpext <2 x half> %src1 to <2 x float>1323 %result = tail call <2 x float> @llvm.fmuladd.v2f32(<2 x float> %src0.ext, <2 x float> %src1.ext, <2 x float> <float 1.0, float 1.0>)1324 ret <2 x float> %result1325}1326 1327define <2 x float> @v_mad_mix_v2f32_cvtf16imminv2pi(<2 x half> %src0, <2 x half> %src1) #0 {1328; SDAG-GFX1100-LABEL: v_mad_mix_v2f32_cvtf16imminv2pi:1329; SDAG-GFX1100: ; %bb.0:1330; SDAG-GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1331; SDAG-GFX1100-NEXT: s_mov_b32 s0, 0x3e2300001332; SDAG-GFX1100-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1333; SDAG-GFX1100-NEXT: v_fma_mix_f32 v2, v0, v1, s0 op_sel_hi:[1,1,0]1334; SDAG-GFX1100-NEXT: v_fma_mix_f32 v1, v0, v1, s0 op_sel:[1,1,0] op_sel_hi:[1,1,0]1335; SDAG-GFX1100-NEXT: v_mov_b32_e32 v0, v21336; SDAG-GFX1100-NEXT: s_setpc_b64 s[30:31]1337;1338; SDAG-GFX900-LABEL: v_mad_mix_v2f32_cvtf16imminv2pi:1339; SDAG-GFX900: ; %bb.0:1340; SDAG-GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1341; SDAG-GFX900-NEXT: s_mov_b32 s4, 0x3e2300001342; SDAG-GFX900-NEXT: v_mad_mix_f32 v2, v0, v1, s4 op_sel_hi:[1,1,0]1343; SDAG-GFX900-NEXT: v_mad_mix_f32 v1, v0, v1, s4 op_sel:[1,1,0] op_sel_hi:[1,1,0]1344; SDAG-GFX900-NEXT: v_mov_b32_e32 v0, v21345; SDAG-GFX900-NEXT: s_setpc_b64 s[30:31]1346;1347; SDAG-GFX906-LABEL: v_mad_mix_v2f32_cvtf16imminv2pi:1348; SDAG-GFX906: ; %bb.0:1349; SDAG-GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1350; SDAG-GFX906-NEXT: s_mov_b32 s4, 0x3e2300001351; SDAG-GFX906-NEXT: v_fma_mix_f32 v2, v0, v1, s4 op_sel_hi:[1,1,0]1352; SDAG-GFX906-NEXT: v_fma_mix_f32 v1, v0, v1, s4 op_sel:[1,1,0] op_sel_hi:[1,1,0]1353; SDAG-GFX906-NEXT: v_mov_b32_e32 v0, v21354; SDAG-GFX906-NEXT: s_setpc_b64 s[30:31]1355;1356; SDAG-GFX9GEN-LABEL: v_mad_mix_v2f32_cvtf16imminv2pi:1357; SDAG-GFX9GEN: ; %bb.0:1358; SDAG-GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1359; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11360; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v01361; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v3, v11362; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11363; SDAG-GFX9GEN-NEXT: v_mov_b32_e32 v1, 0x3e2300001364; SDAG-GFX9GEN-NEXT: v_madak_f32 v0, v0, v3, 0x3e2300001365; SDAG-GFX9GEN-NEXT: v_mac_f32_e32 v1, v2, v41366; SDAG-GFX9GEN-NEXT: s_setpc_b64 s[30:31]1367;1368; SDAG-VI-LABEL: v_mad_mix_v2f32_cvtf16imminv2pi:1369; SDAG-VI: ; %bb.0:1370; SDAG-VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1371; SDAG-VI-NEXT: v_cvt_f32_f16_sdwa v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11372; SDAG-VI-NEXT: v_cvt_f32_f16_e32 v0, v01373; SDAG-VI-NEXT: v_cvt_f32_f16_e32 v3, v11374; SDAG-VI-NEXT: v_cvt_f32_f16_sdwa v4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11375; SDAG-VI-NEXT: v_mov_b32_e32 v1, 0x3e2300001376; SDAG-VI-NEXT: v_madak_f32 v0, v0, v3, 0x3e2300001377; SDAG-VI-NEXT: v_mac_f32_e32 v1, v2, v41378; SDAG-VI-NEXT: s_setpc_b64 s[30:31]1379;1380; SDAG-CI-LABEL: v_mad_mix_v2f32_cvtf16imminv2pi:1381; SDAG-CI: ; %bb.0:1382; SDAG-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1383; SDAG-CI-NEXT: v_cvt_f16_f32_e32 v3, v31384; SDAG-CI-NEXT: v_cvt_f16_f32_e32 v2, v21385; SDAG-CI-NEXT: v_cvt_f16_f32_e32 v0, v01386; SDAG-CI-NEXT: v_cvt_f16_f32_e32 v1, v11387; SDAG-CI-NEXT: v_cvt_f32_f16_e32 v3, v31388; SDAG-CI-NEXT: v_cvt_f32_f16_e32 v2, v21389; SDAG-CI-NEXT: v_cvt_f32_f16_e32 v0, v01390; SDAG-CI-NEXT: v_cvt_f32_f16_e32 v4, v11391; SDAG-CI-NEXT: v_mov_b32_e32 v1, 0x3e2300001392; SDAG-CI-NEXT: v_madak_f32 v0, v0, v2, 0x3e2300001393; SDAG-CI-NEXT: v_mac_f32_e32 v1, v4, v31394; SDAG-CI-NEXT: s_setpc_b64 s[30:31]1395;1396; GISEL-GFX1100-LABEL: v_mad_mix_v2f32_cvtf16imminv2pi:1397; GISEL-GFX1100: ; %bb.0:1398; GISEL-GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1399; GISEL-GFX1100-NEXT: v_mov_b32_e32 v3, 0x3e2300001400; GISEL-GFX1100-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1401; GISEL-GFX1100-NEXT: v_fma_mix_f32 v2, v0, v1, v3 op_sel_hi:[1,1,0]1402; GISEL-GFX1100-NEXT: v_fma_mix_f32 v1, v0, v1, v3 op_sel:[1,1,0] op_sel_hi:[1,1,0]1403; GISEL-GFX1100-NEXT: v_mov_b32_e32 v0, v21404; GISEL-GFX1100-NEXT: s_setpc_b64 s[30:31]1405;1406; GISEL-GFX900-LABEL: v_mad_mix_v2f32_cvtf16imminv2pi:1407; GISEL-GFX900: ; %bb.0:1408; GISEL-GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1409; GISEL-GFX900-NEXT: v_mov_b32_e32 v3, 0x3e2300001410; GISEL-GFX900-NEXT: v_mad_mix_f32 v2, v0, v1, v3 op_sel_hi:[1,1,0]1411; GISEL-GFX900-NEXT: v_mad_mix_f32 v1, v0, v1, v3 op_sel:[1,1,0] op_sel_hi:[1,1,0]1412; GISEL-GFX900-NEXT: v_mov_b32_e32 v0, v21413; GISEL-GFX900-NEXT: s_setpc_b64 s[30:31]1414;1415; GISEL-GFX906-LABEL: v_mad_mix_v2f32_cvtf16imminv2pi:1416; GISEL-GFX906: ; %bb.0:1417; GISEL-GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1418; GISEL-GFX906-NEXT: v_mov_b32_e32 v3, 0x3e2300001419; GISEL-GFX906-NEXT: v_fma_mix_f32 v2, v0, v1, v3 op_sel_hi:[1,1,0]1420; GISEL-GFX906-NEXT: v_fma_mix_f32 v1, v0, v1, v3 op_sel:[1,1,0] op_sel_hi:[1,1,0]1421; GISEL-GFX906-NEXT: v_mov_b32_e32 v0, v21422; GISEL-GFX906-NEXT: s_setpc_b64 s[30:31]1423;1424; GISEL-GFX9GEN-LABEL: v_mad_mix_v2f32_cvtf16imminv2pi:1425; GISEL-GFX9GEN: ; %bb.0:1426; GISEL-GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1427; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v2, v01428; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11429; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v11430; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11431; GISEL-GFX9GEN-NEXT: v_mov_b32_e32 v1, 0x3e2300001432; GISEL-GFX9GEN-NEXT: v_madak_f32 v0, v2, v0, 0x3e2300001433; GISEL-GFX9GEN-NEXT: v_mac_f32_e32 v1, v3, v41434; GISEL-GFX9GEN-NEXT: s_setpc_b64 s[30:31]1435;1436; GISEL-VI-LABEL: v_mad_mix_v2f32_cvtf16imminv2pi:1437; GISEL-VI: ; %bb.0:1438; GISEL-VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1439; GISEL-VI-NEXT: v_cvt_f32_f16_e32 v2, v01440; GISEL-VI-NEXT: v_cvt_f32_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11441; GISEL-VI-NEXT: v_cvt_f32_f16_e32 v0, v11442; GISEL-VI-NEXT: v_cvt_f32_f16_sdwa v4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11443; GISEL-VI-NEXT: v_mov_b32_e32 v1, 0x3e2300001444; GISEL-VI-NEXT: v_madak_f32 v0, v2, v0, 0x3e2300001445; GISEL-VI-NEXT: v_mac_f32_e32 v1, v3, v41446; GISEL-VI-NEXT: s_setpc_b64 s[30:31]1447;1448; GISEL-CI-LABEL: v_mad_mix_v2f32_cvtf16imminv2pi:1449; GISEL-CI: ; %bb.0:1450; GISEL-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1451; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v0, v01452; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v4, v11453; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v2, v21454; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v3, v31455; GISEL-CI-NEXT: v_mov_b32_e32 v1, 0x3e2300001456; GISEL-CI-NEXT: v_madak_f32 v0, v0, v2, 0x3e2300001457; GISEL-CI-NEXT: v_mac_f32_e32 v1, v4, v31458; GISEL-CI-NEXT: s_setpc_b64 s[30:31]1459 %src0.ext = fpext <2 x half> %src0 to <2 x float>1460 %src1.ext = fpext <2 x half> %src1 to <2 x float>1461 %src2 = fpext <2 x half> <half 0xH3118, half 0xH3118> to <2 x float>1462 %result = tail call <2 x float> @llvm.fmuladd.v2f32(<2 x float> %src0.ext, <2 x float> %src1.ext, <2 x float> %src2)1463 ret <2 x float> %result1464}1465 1466define <2 x float> @v_mad_mix_v2f32_f32imminv2pi(<2 x half> %src0, <2 x half> %src1) #0 {1467; SDAG-GFX1100-LABEL: v_mad_mix_v2f32_f32imminv2pi:1468; SDAG-GFX1100: ; %bb.0:1469; SDAG-GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1470; SDAG-GFX1100-NEXT: s_mov_b32 s0, 0.159154941471; SDAG-GFX1100-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1472; SDAG-GFX1100-NEXT: v_fma_mix_f32 v2, v0, v1, s0 op_sel_hi:[1,1,0]1473; SDAG-GFX1100-NEXT: v_fma_mix_f32 v1, v0, v1, s0 op_sel:[1,1,0] op_sel_hi:[1,1,0]1474; SDAG-GFX1100-NEXT: v_mov_b32_e32 v0, v21475; SDAG-GFX1100-NEXT: s_setpc_b64 s[30:31]1476;1477; SDAG-GFX900-LABEL: v_mad_mix_v2f32_f32imminv2pi:1478; SDAG-GFX900: ; %bb.0:1479; SDAG-GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1480; SDAG-GFX900-NEXT: s_mov_b32 s4, 0.159154941481; SDAG-GFX900-NEXT: v_mad_mix_f32 v2, v0, v1, s4 op_sel_hi:[1,1,0]1482; SDAG-GFX900-NEXT: v_mad_mix_f32 v1, v0, v1, s4 op_sel:[1,1,0] op_sel_hi:[1,1,0]1483; SDAG-GFX900-NEXT: v_mov_b32_e32 v0, v21484; SDAG-GFX900-NEXT: s_setpc_b64 s[30:31]1485;1486; SDAG-GFX906-LABEL: v_mad_mix_v2f32_f32imminv2pi:1487; SDAG-GFX906: ; %bb.0:1488; SDAG-GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1489; SDAG-GFX906-NEXT: s_mov_b32 s4, 0.159154941490; SDAG-GFX906-NEXT: v_fma_mix_f32 v2, v0, v1, s4 op_sel_hi:[1,1,0]1491; SDAG-GFX906-NEXT: v_fma_mix_f32 v1, v0, v1, s4 op_sel:[1,1,0] op_sel_hi:[1,1,0]1492; SDAG-GFX906-NEXT: v_mov_b32_e32 v0, v21493; SDAG-GFX906-NEXT: s_setpc_b64 s[30:31]1494;1495; SDAG-GFX9GEN-LABEL: v_mad_mix_v2f32_f32imminv2pi:1496; SDAG-GFX9GEN: ; %bb.0:1497; SDAG-GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1498; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11499; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v01500; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v3, v11501; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11502; SDAG-GFX9GEN-NEXT: v_mad_f32 v0, v0, v3, 0.159154941503; SDAG-GFX9GEN-NEXT: v_mad_f32 v1, v2, v1, 0.159154941504; SDAG-GFX9GEN-NEXT: s_setpc_b64 s[30:31]1505;1506; SDAG-VI-LABEL: v_mad_mix_v2f32_f32imminv2pi:1507; SDAG-VI: ; %bb.0:1508; SDAG-VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1509; SDAG-VI-NEXT: v_cvt_f32_f16_sdwa v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11510; SDAG-VI-NEXT: v_cvt_f32_f16_e32 v0, v01511; SDAG-VI-NEXT: v_cvt_f32_f16_e32 v3, v11512; SDAG-VI-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11513; SDAG-VI-NEXT: v_mad_f32 v0, v0, v3, 0.159154941514; SDAG-VI-NEXT: v_mad_f32 v1, v2, v1, 0.159154941515; SDAG-VI-NEXT: s_setpc_b64 s[30:31]1516;1517; SDAG-CI-LABEL: v_mad_mix_v2f32_f32imminv2pi:1518; SDAG-CI: ; %bb.0:1519; SDAG-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1520; SDAG-CI-NEXT: v_cvt_f16_f32_e32 v3, v31521; SDAG-CI-NEXT: v_cvt_f16_f32_e32 v2, v21522; SDAG-CI-NEXT: v_cvt_f16_f32_e32 v0, v01523; SDAG-CI-NEXT: v_cvt_f16_f32_e32 v1, v11524; SDAG-CI-NEXT: v_cvt_f32_f16_e32 v3, v31525; SDAG-CI-NEXT: v_cvt_f32_f16_e32 v2, v21526; SDAG-CI-NEXT: v_cvt_f32_f16_e32 v0, v01527; SDAG-CI-NEXT: v_cvt_f32_f16_e32 v4, v11528; SDAG-CI-NEXT: v_mov_b32_e32 v1, 0x3e22f9831529; SDAG-CI-NEXT: v_madak_f32 v0, v0, v2, 0x3e22f9831530; SDAG-CI-NEXT: v_mac_f32_e32 v1, v4, v31531; SDAG-CI-NEXT: s_setpc_b64 s[30:31]1532;1533; GISEL-GFX1100-LABEL: v_mad_mix_v2f32_f32imminv2pi:1534; GISEL-GFX1100: ; %bb.0:1535; GISEL-GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1536; GISEL-GFX1100-NEXT: v_mov_b32_e32 v3, 0.159154941537; GISEL-GFX1100-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1538; GISEL-GFX1100-NEXT: v_fma_mix_f32 v2, v0, v1, v3 op_sel_hi:[1,1,0]1539; GISEL-GFX1100-NEXT: v_fma_mix_f32 v1, v0, v1, v3 op_sel:[1,1,0] op_sel_hi:[1,1,0]1540; GISEL-GFX1100-NEXT: v_mov_b32_e32 v0, v21541; GISEL-GFX1100-NEXT: s_setpc_b64 s[30:31]1542;1543; GISEL-GFX900-LABEL: v_mad_mix_v2f32_f32imminv2pi:1544; GISEL-GFX900: ; %bb.0:1545; GISEL-GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1546; GISEL-GFX900-NEXT: v_mov_b32_e32 v3, 0.159154941547; GISEL-GFX900-NEXT: v_mad_mix_f32 v2, v0, v1, v3 op_sel_hi:[1,1,0]1548; GISEL-GFX900-NEXT: v_mad_mix_f32 v1, v0, v1, v3 op_sel:[1,1,0] op_sel_hi:[1,1,0]1549; GISEL-GFX900-NEXT: v_mov_b32_e32 v0, v21550; GISEL-GFX900-NEXT: s_setpc_b64 s[30:31]1551;1552; GISEL-GFX906-LABEL: v_mad_mix_v2f32_f32imminv2pi:1553; GISEL-GFX906: ; %bb.0:1554; GISEL-GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1555; GISEL-GFX906-NEXT: v_mov_b32_e32 v3, 0.159154941556; GISEL-GFX906-NEXT: v_fma_mix_f32 v2, v0, v1, v3 op_sel_hi:[1,1,0]1557; GISEL-GFX906-NEXT: v_fma_mix_f32 v1, v0, v1, v3 op_sel:[1,1,0] op_sel_hi:[1,1,0]1558; GISEL-GFX906-NEXT: v_mov_b32_e32 v0, v21559; GISEL-GFX906-NEXT: s_setpc_b64 s[30:31]1560;1561; GISEL-GFX9GEN-LABEL: v_mad_mix_v2f32_f32imminv2pi:1562; GISEL-GFX9GEN: ; %bb.0:1563; GISEL-GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1564; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v2, v01565; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11566; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v11567; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11568; GISEL-GFX9GEN-NEXT: v_mad_f32 v0, v2, v0, 0.159154941569; GISEL-GFX9GEN-NEXT: v_mad_f32 v1, v3, v1, 0.159154941570; GISEL-GFX9GEN-NEXT: s_setpc_b64 s[30:31]1571;1572; GISEL-VI-LABEL: v_mad_mix_v2f32_f32imminv2pi:1573; GISEL-VI: ; %bb.0:1574; GISEL-VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1575; GISEL-VI-NEXT: v_cvt_f32_f16_e32 v2, v01576; GISEL-VI-NEXT: v_cvt_f32_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11577; GISEL-VI-NEXT: v_cvt_f32_f16_e32 v0, v11578; GISEL-VI-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11579; GISEL-VI-NEXT: v_mad_f32 v0, v2, v0, 0.159154941580; GISEL-VI-NEXT: v_mad_f32 v1, v3, v1, 0.159154941581; GISEL-VI-NEXT: s_setpc_b64 s[30:31]1582;1583; GISEL-CI-LABEL: v_mad_mix_v2f32_f32imminv2pi:1584; GISEL-CI: ; %bb.0:1585; GISEL-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1586; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v0, v01587; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v4, v11588; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v2, v21589; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v3, v31590; GISEL-CI-NEXT: v_mov_b32_e32 v1, 0x3e22f9831591; GISEL-CI-NEXT: v_madak_f32 v0, v0, v2, 0x3e22f9831592; GISEL-CI-NEXT: v_mac_f32_e32 v1, v4, v31593; GISEL-CI-NEXT: s_setpc_b64 s[30:31]1594 %src0.ext = fpext <2 x half> %src0 to <2 x float>1595 %src1.ext = fpext <2 x half> %src1 to <2 x float>1596 %src2 = fpext <2 x half> <half 0xH3118, half 0xH3118> to <2 x float>1597 %result = tail call <2 x float> @llvm.fmuladd.v2f32(<2 x float> %src0.ext, <2 x float> %src1.ext, <2 x float> <float 0x3FC45F3060000000, float 0x3FC45F3060000000>)1598 ret <2 x float> %result1599}1600 1601define float @v_mad_mix_clamp_f32_f16hi_f16hi_f16hi_elt(<2 x half> %src0, <2 x half> %src1, <2 x half> %src2) #0 {1602; GFX1100-LABEL: v_mad_mix_clamp_f32_f16hi_f16hi_f16hi_elt:1603; GFX1100: ; %bb.0:1604; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1605; GFX1100-NEXT: v_fma_mix_f32 v0, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1606; GFX1100-NEXT: s_setpc_b64 s[30:31]1607;1608; GFX900-LABEL: v_mad_mix_clamp_f32_f16hi_f16hi_f16hi_elt:1609; GFX900: ; %bb.0:1610; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1611; GFX900-NEXT: v_mad_mix_f32 v0, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1612; GFX900-NEXT: s_setpc_b64 s[30:31]1613;1614; GFX906-LABEL: v_mad_mix_clamp_f32_f16hi_f16hi_f16hi_elt:1615; GFX906: ; %bb.0:1616; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1617; GFX906-NEXT: v_fma_mix_f32 v0, v0, v1, v2 op_sel:[1,1,1] op_sel_hi:[1,1,1] clamp1618; GFX906-NEXT: s_setpc_b64 s[30:31]1619;1620; GFX9GEN-LABEL: v_mad_mix_clamp_f32_f16hi_f16hi_f16hi_elt:1621; GFX9GEN: ; %bb.0:1622; GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1623; GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11624; GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11625; GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11626; GFX9GEN-NEXT: v_mad_f32 v0, v0, v1, v2 clamp1627; GFX9GEN-NEXT: s_setpc_b64 s[30:31]1628;1629; VI-LABEL: v_mad_mix_clamp_f32_f16hi_f16hi_f16hi_elt:1630; VI: ; %bb.0:1631; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1632; VI-NEXT: v_cvt_f32_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11633; VI-NEXT: v_cvt_f32_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11634; VI-NEXT: v_cvt_f32_f16_sdwa v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11635; VI-NEXT: v_mad_f32 v0, v0, v1, v2 clamp1636; VI-NEXT: s_setpc_b64 s[30:31]1637;1638; SDAG-CI-LABEL: v_mad_mix_clamp_f32_f16hi_f16hi_f16hi_elt:1639; SDAG-CI: ; %bb.0:1640; SDAG-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1641; SDAG-CI-NEXT: v_mad_f32 v0, v1, v3, v5 clamp1642; SDAG-CI-NEXT: s_setpc_b64 s[30:31]1643;1644; GISEL-CI-LABEL: v_mad_mix_clamp_f32_f16hi_f16hi_f16hi_elt:1645; GISEL-CI: ; %bb.0:1646; GISEL-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1647; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v0, v11648; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v1, v31649; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v2, v51650; GISEL-CI-NEXT: v_mad_f32 v0, v0, v1, v2 clamp1651; GISEL-CI-NEXT: s_setpc_b64 s[30:31]1652 %src0.hi = extractelement <2 x half> %src0, i32 11653 %src1.hi = extractelement <2 x half> %src1, i32 11654 %src2.hi = extractelement <2 x half> %src2, i32 11655 %src0.ext = fpext half %src0.hi to float1656 %src1.ext = fpext half %src1.hi to float1657 %src2.ext = fpext half %src2.hi to float1658 %result = tail call float @llvm.fmuladd.f32(float %src0.ext, float %src1.ext, float %src2.ext)1659 %max = call float @llvm.maxnum.f32(float %result, float 0.0)1660 %clamp = call float @llvm.minnum.f32(float %max, float 1.0)1661 ret float %clamp1662}1663 1664define float @no_mix_simple(float %src0, float %src1, float %src2) #0 {1665; GFX1100-LABEL: no_mix_simple:1666; GFX1100: ; %bb.0:1667; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1668; GFX1100-NEXT: v_fma_f32 v0, v0, v1, v21669; GFX1100-NEXT: s_setpc_b64 s[30:31]1670;1671; GFX900-LABEL: no_mix_simple:1672; GFX900: ; %bb.0:1673; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1674; GFX900-NEXT: v_mad_f32 v0, v0, v1, v21675; GFX900-NEXT: s_setpc_b64 s[30:31]1676;1677; GFX906-LABEL: no_mix_simple:1678; GFX906: ; %bb.0:1679; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1680; GFX906-NEXT: v_fma_f32 v0, v0, v1, v21681; GFX906-NEXT: s_setpc_b64 s[30:31]1682;1683; GFX9GEN-LABEL: no_mix_simple:1684; GFX9GEN: ; %bb.0:1685; GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1686; GFX9GEN-NEXT: v_mad_f32 v0, v0, v1, v21687; GFX9GEN-NEXT: s_setpc_b64 s[30:31]1688;1689; VI-LABEL: no_mix_simple:1690; VI: ; %bb.0:1691; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1692; VI-NEXT: v_mad_f32 v0, v0, v1, v21693; VI-NEXT: s_setpc_b64 s[30:31]1694;1695; CI-LABEL: no_mix_simple:1696; CI: ; %bb.0:1697; CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1698; CI-NEXT: v_mad_f32 v0, v0, v1, v21699; CI-NEXT: s_setpc_b64 s[30:31]1700 %result = call float @llvm.fmuladd.f32(float %src0, float %src1, float %src2)1701 ret float %result1702}1703 1704define float @no_mix_simple_fabs(float %src0, float %src1, float %src2) #0 {1705; GFX1100-LABEL: no_mix_simple_fabs:1706; GFX1100: ; %bb.0:1707; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1708; GFX1100-NEXT: v_fma_f32 v0, |v0|, v1, v21709; GFX1100-NEXT: s_setpc_b64 s[30:31]1710;1711; GFX900-LABEL: no_mix_simple_fabs:1712; GFX900: ; %bb.0:1713; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1714; GFX900-NEXT: v_mad_f32 v0, |v0|, v1, v21715; GFX900-NEXT: s_setpc_b64 s[30:31]1716;1717; GFX906-LABEL: no_mix_simple_fabs:1718; GFX906: ; %bb.0:1719; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1720; GFX906-NEXT: v_fma_f32 v0, |v0|, v1, v21721; GFX906-NEXT: s_setpc_b64 s[30:31]1722;1723; GFX9GEN-LABEL: no_mix_simple_fabs:1724; GFX9GEN: ; %bb.0:1725; GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1726; GFX9GEN-NEXT: v_mad_f32 v0, |v0|, v1, v21727; GFX9GEN-NEXT: s_setpc_b64 s[30:31]1728;1729; VI-LABEL: no_mix_simple_fabs:1730; VI: ; %bb.0:1731; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1732; VI-NEXT: v_mad_f32 v0, |v0|, v1, v21733; VI-NEXT: s_setpc_b64 s[30:31]1734;1735; CI-LABEL: no_mix_simple_fabs:1736; CI: ; %bb.0:1737; CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1738; CI-NEXT: v_mad_f32 v0, |v0|, v1, v21739; CI-NEXT: s_setpc_b64 s[30:31]1740 %src0.fabs = call float @llvm.fabs.f32(float %src0)1741 %result = call float @llvm.fmuladd.f32(float %src0.fabs, float %src1, float %src2)1742 ret float %result1743}1744 1745; FIXME(DAG): Should abe able to select in this case.1746; All sources are converted from f16, so it doesn't matter1747; v_mad_mix_f32 flushes.1748 1749define float @v_mad_mix_f32_f16lo_f16lo_f16lo_f32_denormals(half %src0, half %src1, half %src2) #1 {1750; GFX1100-LABEL: v_mad_mix_f32_f16lo_f16lo_f16lo_f32_denormals:1751; GFX1100: ; %bb.0:1752; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1753; GFX1100-NEXT: v_fma_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,1]1754; GFX1100-NEXT: s_setpc_b64 s[30:31]1755;1756; GFX900-LABEL: v_mad_mix_f32_f16lo_f16lo_f16lo_f32_denormals:1757; GFX900: ; %bb.0:1758; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1759; GFX900-NEXT: v_cvt_f32_f16_e32 v0, v01760; GFX900-NEXT: v_cvt_f32_f16_e32 v1, v11761; GFX900-NEXT: v_cvt_f32_f16_e32 v2, v21762; GFX900-NEXT: v_fma_f32 v0, v0, v1, v21763; GFX900-NEXT: s_setpc_b64 s[30:31]1764;1765; GFX906-LABEL: v_mad_mix_f32_f16lo_f16lo_f16lo_f32_denormals:1766; GFX906: ; %bb.0:1767; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1768; GFX906-NEXT: v_fma_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,1]1769; GFX906-NEXT: s_setpc_b64 s[30:31]1770;1771; GFX9GEN-LABEL: v_mad_mix_f32_f16lo_f16lo_f16lo_f32_denormals:1772; GFX9GEN: ; %bb.0:1773; GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1774; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v01775; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v1, v11776; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v2, v21777; GFX9GEN-NEXT: v_fma_f32 v0, v0, v1, v21778; GFX9GEN-NEXT: s_setpc_b64 s[30:31]1779;1780; VI-LABEL: v_mad_mix_f32_f16lo_f16lo_f16lo_f32_denormals:1781; VI: ; %bb.0:1782; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1783; VI-NEXT: v_cvt_f32_f16_e32 v0, v01784; VI-NEXT: v_cvt_f32_f16_e32 v1, v11785; VI-NEXT: v_cvt_f32_f16_e32 v2, v21786; VI-NEXT: v_mul_f32_e32 v0, v0, v11787; VI-NEXT: v_add_f32_e32 v0, v0, v21788; VI-NEXT: s_setpc_b64 s[30:31]1789;1790; SDAG-CI-LABEL: v_mad_mix_f32_f16lo_f16lo_f16lo_f32_denormals:1791; SDAG-CI: ; %bb.0:1792; SDAG-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1793; SDAG-CI-NEXT: v_fma_f32 v0, v0, v1, v21794; SDAG-CI-NEXT: s_setpc_b64 s[30:31]1795;1796; GISEL-CI-LABEL: v_mad_mix_f32_f16lo_f16lo_f16lo_f32_denormals:1797; GISEL-CI: ; %bb.0:1798; GISEL-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1799; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v0, v01800; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v1, v11801; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v2, v21802; GISEL-CI-NEXT: v_fma_f32 v0, v0, v1, v21803; GISEL-CI-NEXT: s_setpc_b64 s[30:31]1804 %src0.ext = fpext half %src0 to float1805 %src1.ext = fpext half %src1 to float1806 %src2.ext = fpext half %src2 to float1807 %result = tail call float @llvm.fmuladd.f32(float %src0.ext, float %src1.ext, float %src2.ext)1808 ret float %result1809}1810 1811define float @v_mad_mix_f32_f16lo_f16lo_f32_denormals(half %src0, half %src1, float %src2) #1 {1812; GFX1100-LABEL: v_mad_mix_f32_f16lo_f16lo_f32_denormals:1813; GFX1100: ; %bb.0:1814; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1815; GFX1100-NEXT: v_fma_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0]1816; GFX1100-NEXT: s_setpc_b64 s[30:31]1817;1818; GFX900-LABEL: v_mad_mix_f32_f16lo_f16lo_f32_denormals:1819; GFX900: ; %bb.0:1820; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1821; GFX900-NEXT: v_cvt_f32_f16_e32 v0, v01822; GFX900-NEXT: v_cvt_f32_f16_e32 v1, v11823; GFX900-NEXT: v_fma_f32 v0, v0, v1, v21824; GFX900-NEXT: s_setpc_b64 s[30:31]1825;1826; GFX906-LABEL: v_mad_mix_f32_f16lo_f16lo_f32_denormals:1827; GFX906: ; %bb.0:1828; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1829; GFX906-NEXT: v_fma_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0]1830; GFX906-NEXT: s_setpc_b64 s[30:31]1831;1832; GFX9GEN-LABEL: v_mad_mix_f32_f16lo_f16lo_f32_denormals:1833; GFX9GEN: ; %bb.0:1834; GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1835; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v01836; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v1, v11837; GFX9GEN-NEXT: v_fma_f32 v0, v0, v1, v21838; GFX9GEN-NEXT: s_setpc_b64 s[30:31]1839;1840; VI-LABEL: v_mad_mix_f32_f16lo_f16lo_f32_denormals:1841; VI: ; %bb.0:1842; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1843; VI-NEXT: v_cvt_f32_f16_e32 v0, v01844; VI-NEXT: v_cvt_f32_f16_e32 v1, v11845; VI-NEXT: v_mul_f32_e32 v0, v0, v11846; VI-NEXT: v_add_f32_e32 v0, v0, v21847; VI-NEXT: s_setpc_b64 s[30:31]1848;1849; SDAG-CI-LABEL: v_mad_mix_f32_f16lo_f16lo_f32_denormals:1850; SDAG-CI: ; %bb.0:1851; SDAG-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1852; SDAG-CI-NEXT: v_fma_f32 v0, v0, v1, v21853; SDAG-CI-NEXT: s_setpc_b64 s[30:31]1854;1855; GISEL-CI-LABEL: v_mad_mix_f32_f16lo_f16lo_f32_denormals:1856; GISEL-CI: ; %bb.0:1857; GISEL-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1858; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v0, v01859; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v1, v11860; GISEL-CI-NEXT: v_fma_f32 v0, v0, v1, v21861; GISEL-CI-NEXT: s_setpc_b64 s[30:31]1862 %src0.ext = fpext half %src0 to float1863 %src1.ext = fpext half %src1 to float1864 %result = tail call float @llvm.fmuladd.f32(float %src0.ext, float %src1.ext, float %src2)1865 ret float %result1866}1867 1868define float @v_mad_mix_f32_f16lo_f16lo_f16lo_f32_denormals_fmulfadd(half %src0, half %src1, half %src2) #1 {1869; SDAG-GFX1100-TRUE16-LABEL: v_mad_mix_f32_f16lo_f16lo_f16lo_f32_denormals_fmulfadd:1870; SDAG-GFX1100-TRUE16: ; %bb.0:1871; SDAG-GFX1100-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1872; SDAG-GFX1100-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.l1873; SDAG-GFX1100-TRUE16-NEXT: v_cvt_f32_f16_e32 v1, v1.l1874; SDAG-GFX1100-TRUE16-NEXT: v_cvt_f32_f16_e32 v2, v2.l1875; SDAG-GFX1100-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1876; SDAG-GFX1100-TRUE16-NEXT: v_mul_f32_e32 v0, v0, v11877; SDAG-GFX1100-TRUE16-NEXT: v_add_f32_e32 v0, v0, v21878; SDAG-GFX1100-TRUE16-NEXT: s_setpc_b64 s[30:31]1879;1880; SDAG-GFX1100-FAKE16-LABEL: v_mad_mix_f32_f16lo_f16lo_f16lo_f32_denormals_fmulfadd:1881; SDAG-GFX1100-FAKE16: ; %bb.0:1882; SDAG-GFX1100-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1883; SDAG-GFX1100-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, v01884; SDAG-GFX1100-FAKE16-NEXT: v_cvt_f32_f16_e32 v1, v11885; SDAG-GFX1100-FAKE16-NEXT: v_cvt_f32_f16_e32 v2, v21886; SDAG-GFX1100-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1887; SDAG-GFX1100-FAKE16-NEXT: v_mul_f32_e32 v0, v0, v11888; SDAG-GFX1100-FAKE16-NEXT: v_add_f32_e32 v0, v0, v21889; SDAG-GFX1100-FAKE16-NEXT: s_setpc_b64 s[30:31]1890;1891; GFX900-LABEL: v_mad_mix_f32_f16lo_f16lo_f16lo_f32_denormals_fmulfadd:1892; GFX900: ; %bb.0:1893; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1894; GFX900-NEXT: v_cvt_f32_f16_e32 v0, v01895; GFX900-NEXT: v_cvt_f32_f16_e32 v1, v11896; GFX900-NEXT: v_cvt_f32_f16_e32 v2, v21897; GFX900-NEXT: v_mul_f32_e32 v0, v0, v11898; GFX900-NEXT: v_add_f32_e32 v0, v0, v21899; GFX900-NEXT: s_setpc_b64 s[30:31]1900;1901; GFX906-LABEL: v_mad_mix_f32_f16lo_f16lo_f16lo_f32_denormals_fmulfadd:1902; GFX906: ; %bb.0:1903; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1904; GFX906-NEXT: v_cvt_f32_f16_e32 v0, v01905; GFX906-NEXT: v_cvt_f32_f16_e32 v1, v11906; GFX906-NEXT: v_cvt_f32_f16_e32 v2, v21907; GFX906-NEXT: v_mul_f32_e32 v0, v0, v11908; GFX906-NEXT: v_add_f32_e32 v0, v0, v21909; GFX906-NEXT: s_setpc_b64 s[30:31]1910;1911; GFX9GEN-LABEL: v_mad_mix_f32_f16lo_f16lo_f16lo_f32_denormals_fmulfadd:1912; GFX9GEN: ; %bb.0:1913; GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1914; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v01915; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v1, v11916; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v2, v21917; GFX9GEN-NEXT: v_mul_f32_e32 v0, v0, v11918; GFX9GEN-NEXT: v_add_f32_e32 v0, v0, v21919; GFX9GEN-NEXT: s_setpc_b64 s[30:31]1920;1921; VI-LABEL: v_mad_mix_f32_f16lo_f16lo_f16lo_f32_denormals_fmulfadd:1922; VI: ; %bb.0:1923; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1924; VI-NEXT: v_cvt_f32_f16_e32 v0, v01925; VI-NEXT: v_cvt_f32_f16_e32 v1, v11926; VI-NEXT: v_cvt_f32_f16_e32 v2, v21927; VI-NEXT: v_mul_f32_e32 v0, v0, v11928; VI-NEXT: v_add_f32_e32 v0, v0, v21929; VI-NEXT: s_setpc_b64 s[30:31]1930;1931; SDAG-CI-LABEL: v_mad_mix_f32_f16lo_f16lo_f16lo_f32_denormals_fmulfadd:1932; SDAG-CI: ; %bb.0:1933; SDAG-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1934; SDAG-CI-NEXT: v_mul_f32_e32 v0, v0, v11935; SDAG-CI-NEXT: v_add_f32_e32 v0, v0, v21936; SDAG-CI-NEXT: s_setpc_b64 s[30:31]1937;1938; GISEL-GFX1100-LABEL: v_mad_mix_f32_f16lo_f16lo_f16lo_f32_denormals_fmulfadd:1939; GISEL-GFX1100: ; %bb.0:1940; GISEL-GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1941; GISEL-GFX1100-NEXT: v_cvt_f32_f16_e32 v0, v01942; GISEL-GFX1100-NEXT: v_cvt_f32_f16_e32 v1, v11943; GISEL-GFX1100-NEXT: v_cvt_f32_f16_e32 v2, v21944; GISEL-GFX1100-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1945; GISEL-GFX1100-NEXT: v_mul_f32_e32 v0, v0, v11946; GISEL-GFX1100-NEXT: v_add_f32_e32 v0, v0, v21947; GISEL-GFX1100-NEXT: s_setpc_b64 s[30:31]1948;1949; GISEL-CI-LABEL: v_mad_mix_f32_f16lo_f16lo_f16lo_f32_denormals_fmulfadd:1950; GISEL-CI: ; %bb.0:1951; GISEL-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1952; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v0, v01953; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v1, v11954; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v2, v21955; GISEL-CI-NEXT: v_mul_f32_e32 v0, v0, v11956; GISEL-CI-NEXT: v_add_f32_e32 v0, v0, v21957; GISEL-CI-NEXT: s_setpc_b64 s[30:31]1958 %src0.ext = fpext half %src0 to float1959 %src1.ext = fpext half %src1 to float1960 %src2.ext = fpext half %src2 to float1961 %mul = fmul float %src0.ext, %src1.ext1962 %result = fadd float %mul, %src2.ext1963 ret float %result1964}1965 1966define float @v_mad_mix_f32_f16lo_f16lo_f32_denormals_fmulfadd(half %src0, half %src1, float %src2) #1 {1967; SDAG-GFX1100-TRUE16-LABEL: v_mad_mix_f32_f16lo_f16lo_f32_denormals_fmulfadd:1968; SDAG-GFX1100-TRUE16: ; %bb.0:1969; SDAG-GFX1100-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1970; SDAG-GFX1100-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.l1971; SDAG-GFX1100-TRUE16-NEXT: v_cvt_f32_f16_e32 v1, v1.l1972; SDAG-GFX1100-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1973; SDAG-GFX1100-TRUE16-NEXT: v_mul_f32_e32 v0, v0, v11974; SDAG-GFX1100-TRUE16-NEXT: v_add_f32_e32 v0, v0, v21975; SDAG-GFX1100-TRUE16-NEXT: s_setpc_b64 s[30:31]1976;1977; SDAG-GFX1100-FAKE16-LABEL: v_mad_mix_f32_f16lo_f16lo_f32_denormals_fmulfadd:1978; SDAG-GFX1100-FAKE16: ; %bb.0:1979; SDAG-GFX1100-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1980; SDAG-GFX1100-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, v01981; SDAG-GFX1100-FAKE16-NEXT: v_cvt_f32_f16_e32 v1, v11982; SDAG-GFX1100-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1983; SDAG-GFX1100-FAKE16-NEXT: v_mul_f32_e32 v0, v0, v11984; SDAG-GFX1100-FAKE16-NEXT: v_add_f32_e32 v0, v0, v21985; SDAG-GFX1100-FAKE16-NEXT: s_setpc_b64 s[30:31]1986;1987; GFX900-LABEL: v_mad_mix_f32_f16lo_f16lo_f32_denormals_fmulfadd:1988; GFX900: ; %bb.0:1989; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1990; GFX900-NEXT: v_cvt_f32_f16_e32 v0, v01991; GFX900-NEXT: v_cvt_f32_f16_e32 v1, v11992; GFX900-NEXT: v_mul_f32_e32 v0, v0, v11993; GFX900-NEXT: v_add_f32_e32 v0, v0, v21994; GFX900-NEXT: s_setpc_b64 s[30:31]1995;1996; GFX906-LABEL: v_mad_mix_f32_f16lo_f16lo_f32_denormals_fmulfadd:1997; GFX906: ; %bb.0:1998; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1999; GFX906-NEXT: v_cvt_f32_f16_e32 v0, v02000; GFX906-NEXT: v_cvt_f32_f16_e32 v1, v12001; GFX906-NEXT: v_mul_f32_e32 v0, v0, v12002; GFX906-NEXT: v_add_f32_e32 v0, v0, v22003; GFX906-NEXT: s_setpc_b64 s[30:31]2004;2005; GFX9GEN-LABEL: v_mad_mix_f32_f16lo_f16lo_f32_denormals_fmulfadd:2006; GFX9GEN: ; %bb.0:2007; GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2008; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v02009; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v1, v12010; GFX9GEN-NEXT: v_mul_f32_e32 v0, v0, v12011; GFX9GEN-NEXT: v_add_f32_e32 v0, v0, v22012; GFX9GEN-NEXT: s_setpc_b64 s[30:31]2013;2014; VI-LABEL: v_mad_mix_f32_f16lo_f16lo_f32_denormals_fmulfadd:2015; VI: ; %bb.0:2016; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2017; VI-NEXT: v_cvt_f32_f16_e32 v0, v02018; VI-NEXT: v_cvt_f32_f16_e32 v1, v12019; VI-NEXT: v_mul_f32_e32 v0, v0, v12020; VI-NEXT: v_add_f32_e32 v0, v0, v22021; VI-NEXT: s_setpc_b64 s[30:31]2022;2023; SDAG-CI-LABEL: v_mad_mix_f32_f16lo_f16lo_f32_denormals_fmulfadd:2024; SDAG-CI: ; %bb.0:2025; SDAG-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2026; SDAG-CI-NEXT: v_mul_f32_e32 v0, v0, v12027; SDAG-CI-NEXT: v_add_f32_e32 v0, v0, v22028; SDAG-CI-NEXT: s_setpc_b64 s[30:31]2029;2030; GISEL-GFX1100-LABEL: v_mad_mix_f32_f16lo_f16lo_f32_denormals_fmulfadd:2031; GISEL-GFX1100: ; %bb.0:2032; GISEL-GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2033; GISEL-GFX1100-NEXT: v_cvt_f32_f16_e32 v0, v02034; GISEL-GFX1100-NEXT: v_cvt_f32_f16_e32 v1, v12035; GISEL-GFX1100-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2036; GISEL-GFX1100-NEXT: v_mul_f32_e32 v0, v0, v12037; GISEL-GFX1100-NEXT: v_add_f32_e32 v0, v0, v22038; GISEL-GFX1100-NEXT: s_setpc_b64 s[30:31]2039;2040; GISEL-CI-LABEL: v_mad_mix_f32_f16lo_f16lo_f32_denormals_fmulfadd:2041; GISEL-CI: ; %bb.0:2042; GISEL-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2043; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v0, v02044; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v1, v12045; GISEL-CI-NEXT: v_mul_f32_e32 v0, v0, v12046; GISEL-CI-NEXT: v_add_f32_e32 v0, v0, v22047; GISEL-CI-NEXT: s_setpc_b64 s[30:31]2048 %src0.ext = fpext half %src0 to float2049 %src1.ext = fpext half %src1 to float2050 %mul = fmul float %src0.ext, %src1.ext2051 %result = fadd float %mul, %src22052 ret float %result2053}2054 2055define float @v_mad_mix_f32_f16lo_f16lo_f16lo_f32_flush_fmulfadd(half %src0, half %src1, half %src2) #0 {2056; GFX1100-LABEL: v_mad_mix_f32_f16lo_f16lo_f16lo_f32_flush_fmulfadd:2057; GFX1100: ; %bb.0:2058; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2059; GFX1100-NEXT: v_fma_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,1]2060; GFX1100-NEXT: s_setpc_b64 s[30:31]2061;2062; GFX900-LABEL: v_mad_mix_f32_f16lo_f16lo_f16lo_f32_flush_fmulfadd:2063; GFX900: ; %bb.0:2064; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2065; GFX900-NEXT: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,1]2066; GFX900-NEXT: s_setpc_b64 s[30:31]2067;2068; GFX906-LABEL: v_mad_mix_f32_f16lo_f16lo_f16lo_f32_flush_fmulfadd:2069; GFX906: ; %bb.0:2070; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2071; GFX906-NEXT: v_fma_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,1]2072; GFX906-NEXT: s_setpc_b64 s[30:31]2073;2074; GFX9GEN-LABEL: v_mad_mix_f32_f16lo_f16lo_f16lo_f32_flush_fmulfadd:2075; GFX9GEN: ; %bb.0:2076; GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2077; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v3, v02078; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v1, v12079; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v22080; GFX9GEN-NEXT: v_mac_f32_e32 v0, v3, v12081; GFX9GEN-NEXT: s_setpc_b64 s[30:31]2082;2083; VI-LABEL: v_mad_mix_f32_f16lo_f16lo_f16lo_f32_flush_fmulfadd:2084; VI: ; %bb.0:2085; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2086; VI-NEXT: v_cvt_f32_f16_e32 v3, v02087; VI-NEXT: v_cvt_f32_f16_e32 v1, v12088; VI-NEXT: v_cvt_f32_f16_e32 v0, v22089; VI-NEXT: v_mac_f32_e32 v0, v3, v12090; VI-NEXT: s_setpc_b64 s[30:31]2091;2092; SDAG-CI-LABEL: v_mad_mix_f32_f16lo_f16lo_f16lo_f32_flush_fmulfadd:2093; SDAG-CI: ; %bb.0:2094; SDAG-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2095; SDAG-CI-NEXT: v_mad_f32 v0, v0, v1, v22096; SDAG-CI-NEXT: s_setpc_b64 s[30:31]2097;2098; GISEL-CI-LABEL: v_mad_mix_f32_f16lo_f16lo_f16lo_f32_flush_fmulfadd:2099; GISEL-CI: ; %bb.0:2100; GISEL-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2101; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v3, v02102; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v1, v12103; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v0, v22104; GISEL-CI-NEXT: v_mac_f32_e32 v0, v3, v12105; GISEL-CI-NEXT: s_setpc_b64 s[30:31]2106 %src0.ext = fpext half %src0 to float2107 %src1.ext = fpext half %src1 to float2108 %src2.ext = fpext half %src2 to float2109 %mul = fmul contract float %src0.ext, %src1.ext2110 %result = fadd contract float %mul, %src2.ext2111 ret float %result2112}2113 2114define float @v_mad_mix_f32_f16lo_f16lo_f32_flush_fmulfadd(half %src0, half %src1, float %src2) #0 {2115; GFX1100-LABEL: v_mad_mix_f32_f16lo_f16lo_f32_flush_fmulfadd:2116; GFX1100: ; %bb.0:2117; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2118; GFX1100-NEXT: v_fma_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0]2119; GFX1100-NEXT: s_setpc_b64 s[30:31]2120;2121; GFX900-LABEL: v_mad_mix_f32_f16lo_f16lo_f32_flush_fmulfadd:2122; GFX900: ; %bb.0:2123; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2124; GFX900-NEXT: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0]2125; GFX900-NEXT: s_setpc_b64 s[30:31]2126;2127; GFX906-LABEL: v_mad_mix_f32_f16lo_f16lo_f32_flush_fmulfadd:2128; GFX906: ; %bb.0:2129; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2130; GFX906-NEXT: v_fma_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0]2131; GFX906-NEXT: s_setpc_b64 s[30:31]2132;2133; GFX9GEN-LABEL: v_mad_mix_f32_f16lo_f16lo_f32_flush_fmulfadd:2134; GFX9GEN: ; %bb.0:2135; GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2136; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v02137; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v1, v12138; GFX9GEN-NEXT: v_mad_f32 v0, v0, v1, v22139; GFX9GEN-NEXT: s_setpc_b64 s[30:31]2140;2141; VI-LABEL: v_mad_mix_f32_f16lo_f16lo_f32_flush_fmulfadd:2142; VI: ; %bb.0:2143; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2144; VI-NEXT: v_cvt_f32_f16_e32 v0, v02145; VI-NEXT: v_cvt_f32_f16_e32 v1, v12146; VI-NEXT: v_mad_f32 v0, v0, v1, v22147; VI-NEXT: s_setpc_b64 s[30:31]2148;2149; SDAG-CI-LABEL: v_mad_mix_f32_f16lo_f16lo_f32_flush_fmulfadd:2150; SDAG-CI: ; %bb.0:2151; SDAG-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2152; SDAG-CI-NEXT: v_mad_f32 v0, v0, v1, v22153; SDAG-CI-NEXT: s_setpc_b64 s[30:31]2154;2155; GISEL-CI-LABEL: v_mad_mix_f32_f16lo_f16lo_f32_flush_fmulfadd:2156; GISEL-CI: ; %bb.0:2157; GISEL-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2158; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v0, v02159; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v1, v12160; GISEL-CI-NEXT: v_mad_f32 v0, v0, v1, v22161; GISEL-CI-NEXT: s_setpc_b64 s[30:31]2162 %src0.ext = fpext half %src0 to float2163 %src1.ext = fpext half %src1 to float2164 %mul = fmul contract float %src0.ext, %src1.ext2165 %result = fadd contract float %mul, %src22166 ret float %result2167}2168 2169define float @v_mad_mix_f32_negprecvtf16lo_f16lo_f16lo(i32 %src0.arg, half %src1, half %src2) #0 {2170; GFX1100-LABEL: v_mad_mix_f32_negprecvtf16lo_f16lo_f16lo:2171; GFX1100: ; %bb.0:2172; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2173; GFX1100-NEXT: v_fma_mix_f32 v0, -v0, v1, v2 op_sel_hi:[1,1,1]2174; GFX1100-NEXT: s_setpc_b64 s[30:31]2175;2176; GFX900-LABEL: v_mad_mix_f32_negprecvtf16lo_f16lo_f16lo:2177; GFX900: ; %bb.0:2178; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2179; GFX900-NEXT: v_mad_mix_f32 v0, -v0, v1, v2 op_sel_hi:[1,1,1]2180; GFX900-NEXT: s_setpc_b64 s[30:31]2181;2182; GFX906-LABEL: v_mad_mix_f32_negprecvtf16lo_f16lo_f16lo:2183; GFX906: ; %bb.0:2184; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2185; GFX906-NEXT: v_fma_mix_f32 v0, -v0, v1, v2 op_sel_hi:[1,1,1]2186; GFX906-NEXT: s_setpc_b64 s[30:31]2187;2188; SDAG-GFX9GEN-LABEL: v_mad_mix_f32_negprecvtf16lo_f16lo_f16lo:2189; SDAG-GFX9GEN: ; %bb.0:2190; SDAG-GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2191; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v02192; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v1, v12193; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v2, v22194; SDAG-GFX9GEN-NEXT: v_mad_f32 v0, -v0, v1, v22195; SDAG-GFX9GEN-NEXT: s_setpc_b64 s[30:31]2196;2197; SDAG-VI-LABEL: v_mad_mix_f32_negprecvtf16lo_f16lo_f16lo:2198; SDAG-VI: ; %bb.0:2199; SDAG-VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2200; SDAG-VI-NEXT: v_cvt_f32_f16_e32 v0, v02201; SDAG-VI-NEXT: v_cvt_f32_f16_e32 v1, v12202; SDAG-VI-NEXT: v_cvt_f32_f16_e32 v2, v22203; SDAG-VI-NEXT: v_mad_f32 v0, -v0, v1, v22204; SDAG-VI-NEXT: s_setpc_b64 s[30:31]2205;2206; SDAG-CI-LABEL: v_mad_mix_f32_negprecvtf16lo_f16lo_f16lo:2207; SDAG-CI: ; %bb.0:2208; SDAG-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2209; SDAG-CI-NEXT: v_cvt_f32_f16_e32 v0, v02210; SDAG-CI-NEXT: v_mad_f32 v0, -v0, v1, v22211; SDAG-CI-NEXT: s_setpc_b64 s[30:31]2212;2213; GISEL-GFX9GEN-LABEL: v_mad_mix_f32_negprecvtf16lo_f16lo_f16lo:2214; GISEL-GFX9GEN: ; %bb.0:2215; GISEL-GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2216; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_e64 v3, -v02217; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v1, v12218; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v22219; GISEL-GFX9GEN-NEXT: v_mac_f32_e32 v0, v3, v12220; GISEL-GFX9GEN-NEXT: s_setpc_b64 s[30:31]2221;2222; GISEL-VI-LABEL: v_mad_mix_f32_negprecvtf16lo_f16lo_f16lo:2223; GISEL-VI: ; %bb.0:2224; GISEL-VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2225; GISEL-VI-NEXT: v_cvt_f32_f16_e64 v3, -v02226; GISEL-VI-NEXT: v_cvt_f32_f16_e32 v1, v12227; GISEL-VI-NEXT: v_cvt_f32_f16_e32 v0, v22228; GISEL-VI-NEXT: v_mac_f32_e32 v0, v3, v12229; GISEL-VI-NEXT: s_setpc_b64 s[30:31]2230;2231; GISEL-CI-LABEL: v_mad_mix_f32_negprecvtf16lo_f16lo_f16lo:2232; GISEL-CI: ; %bb.0:2233; GISEL-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2234; GISEL-CI-NEXT: v_cvt_f32_f16_e64 v3, -v02235; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v1, v12236; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v0, v22237; GISEL-CI-NEXT: v_mac_f32_e32 v0, v3, v12238; GISEL-CI-NEXT: s_setpc_b64 s[30:31]2239 %src0.arg.bc = bitcast i32 %src0.arg to <2 x half>2240 %src0 = extractelement <2 x half> %src0.arg.bc, i32 02241 %src0.neg = fneg half %src02242 %src0.ext = fpext half %src0.neg to float2243 %src1.ext = fpext half %src1 to float2244 %src2.ext = fpext half %src2 to float2245; %src0.ext.neg = fneg float %src0.ext2246 %result = tail call float @llvm.fmuladd.f32(float %src0.ext, float %src1.ext, float %src2.ext)2247 ret float %result2248}2249 2250; Make sure we don't fold pre-cvt fneg if we already have a fabs2251 2252define float @v_mad_mix_f32_precvtnegf16hi_abs_f16lo_f16lo(i32 %src0.arg, half %src1, half %src2) #0 {2253; SDAG-GFX1100-TRUE16-LABEL: v_mad_mix_f32_precvtnegf16hi_abs_f16lo_f16lo:2254; SDAG-GFX1100-TRUE16: ; %bb.0:2255; SDAG-GFX1100-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2256; SDAG-GFX1100-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l2257; SDAG-GFX1100-TRUE16-NEXT: v_xor_b16 v2.l, 0x8000, v0.h2258; SDAG-GFX1100-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2259; SDAG-GFX1100-TRUE16-NEXT: v_fma_mix_f32 v0, |v2|, v1, v0 op_sel_hi:[1,1,1]2260; SDAG-GFX1100-TRUE16-NEXT: s_setpc_b64 s[30:31]2261;2262; SDAG-GFX1100-FAKE16-LABEL: v_mad_mix_f32_precvtnegf16hi_abs_f16lo_f16lo:2263; SDAG-GFX1100-FAKE16: ; %bb.0:2264; SDAG-GFX1100-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2265; SDAG-GFX1100-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v02266; SDAG-GFX1100-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2267; SDAG-GFX1100-FAKE16-NEXT: v_xor_b32_e32 v0, 0x8000, v02268; SDAG-GFX1100-FAKE16-NEXT: v_fma_mix_f32 v0, |v0|, v1, v2 op_sel_hi:[1,1,1]2269; SDAG-GFX1100-FAKE16-NEXT: s_setpc_b64 s[30:31]2270;2271; GFX900-LABEL: v_mad_mix_f32_precvtnegf16hi_abs_f16lo_f16lo:2272; GFX900: ; %bb.0:2273; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2274; GFX900-NEXT: s_mov_b32 s4, 0x80002275; GFX900-NEXT: v_xor_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12276; GFX900-NEXT: v_mad_mix_f32 v0, |v0|, v1, v2 op_sel_hi:[1,1,1]2277; GFX900-NEXT: s_setpc_b64 s[30:31]2278;2279; GFX906-LABEL: v_mad_mix_f32_precvtnegf16hi_abs_f16lo_f16lo:2280; GFX906: ; %bb.0:2281; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2282; GFX906-NEXT: s_mov_b32 s4, 0x80002283; GFX906-NEXT: v_xor_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12284; GFX906-NEXT: v_fma_mix_f32 v0, |v0|, v1, v2 op_sel_hi:[1,1,1]2285; GFX906-NEXT: s_setpc_b64 s[30:31]2286;2287; GFX9GEN-LABEL: v_mad_mix_f32_precvtnegf16hi_abs_f16lo_f16lo:2288; GFX9GEN: ; %bb.0:2289; GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2290; GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v0, -v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12291; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v1, v12292; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v2, v22293; GFX9GEN-NEXT: v_mad_f32 v0, |v0|, v1, v22294; GFX9GEN-NEXT: s_setpc_b64 s[30:31]2295;2296; VI-LABEL: v_mad_mix_f32_precvtnegf16hi_abs_f16lo_f16lo:2297; VI: ; %bb.0:2298; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2299; VI-NEXT: v_cvt_f32_f16_sdwa v0, -v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12300; VI-NEXT: v_cvt_f32_f16_e32 v1, v12301; VI-NEXT: v_cvt_f32_f16_e32 v2, v22302; VI-NEXT: v_mad_f32 v0, |v0|, v1, v22303; VI-NEXT: s_setpc_b64 s[30:31]2304;2305; SDAG-CI-LABEL: v_mad_mix_f32_precvtnegf16hi_abs_f16lo_f16lo:2306; SDAG-CI: ; %bb.0:2307; SDAG-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2308; SDAG-CI-NEXT: v_lshrrev_b32_e32 v0, 16, v02309; SDAG-CI-NEXT: v_cvt_f32_f16_e64 v0, |v0|2310; SDAG-CI-NEXT: v_mad_f32 v0, v0, v1, v22311; SDAG-CI-NEXT: s_setpc_b64 s[30:31]2312;2313; GISEL-GFX1100-LABEL: v_mad_mix_f32_precvtnegf16hi_abs_f16lo_f16lo:2314; GISEL-GFX1100: ; %bb.0:2315; GISEL-GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2316; GISEL-GFX1100-NEXT: v_lshrrev_b32_e32 v0, 16, v02317; GISEL-GFX1100-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2318; GISEL-GFX1100-NEXT: v_xor_b32_e32 v0, 0x8000, v02319; GISEL-GFX1100-NEXT: v_fma_mix_f32 v0, |v0|, v1, v2 op_sel_hi:[1,1,1]2320; GISEL-GFX1100-NEXT: s_setpc_b64 s[30:31]2321;2322; GISEL-CI-LABEL: v_mad_mix_f32_precvtnegf16hi_abs_f16lo_f16lo:2323; GISEL-CI: ; %bb.0:2324; GISEL-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2325; GISEL-CI-NEXT: v_lshrrev_b32_e32 v0, 16, v02326; GISEL-CI-NEXT: v_cvt_f32_f16_e64 v0, -v02327; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v1, v12328; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v2, v22329; GISEL-CI-NEXT: v_mad_f32 v0, |v0|, v1, v22330; GISEL-CI-NEXT: s_setpc_b64 s[30:31]2331 %src0.arg.bc = bitcast i32 %src0.arg to <2 x half>2332 %src0 = extractelement <2 x half> %src0.arg.bc, i32 12333 %src0.neg = fneg half %src02334 %src0.ext = fpext half %src0.neg to float2335 %src0.ext.abs = call float @llvm.fabs.f32(float %src0.ext)2336 %src1.ext = fpext half %src1 to float2337 %src2.ext = fpext half %src2 to float2338 %result = tail call float @llvm.fmuladd.f32(float %src0.ext.abs, float %src1.ext, float %src2.ext)2339 ret float %result2340}2341 2342define float @v_mad_mix_f32_precvtabsf16hi_f16lo_f16lo(i32 %src0.arg, half %src1, half %src2) #0 {2343; GFX1100-LABEL: v_mad_mix_f32_precvtabsf16hi_f16lo_f16lo:2344; GFX1100: ; %bb.0:2345; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2346; GFX1100-NEXT: v_fma_mix_f32 v0, |v0|, v1, v2 op_sel:[1,0,0] op_sel_hi:[1,1,1]2347; GFX1100-NEXT: s_setpc_b64 s[30:31]2348;2349; GFX900-LABEL: v_mad_mix_f32_precvtabsf16hi_f16lo_f16lo:2350; GFX900: ; %bb.0:2351; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2352; GFX900-NEXT: v_mad_mix_f32 v0, |v0|, v1, v2 op_sel:[1,0,0] op_sel_hi:[1,1,1]2353; GFX900-NEXT: s_setpc_b64 s[30:31]2354;2355; GFX906-LABEL: v_mad_mix_f32_precvtabsf16hi_f16lo_f16lo:2356; GFX906: ; %bb.0:2357; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2358; GFX906-NEXT: v_fma_mix_f32 v0, |v0|, v1, v2 op_sel:[1,0,0] op_sel_hi:[1,1,1]2359; GFX906-NEXT: s_setpc_b64 s[30:31]2360;2361; GFX9GEN-LABEL: v_mad_mix_f32_precvtabsf16hi_f16lo_f16lo:2362; GFX9GEN: ; %bb.0:2363; GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2364; GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v3, |v0| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12365; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v1, v12366; GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v22367; GFX9GEN-NEXT: v_mac_f32_e32 v0, v3, v12368; GFX9GEN-NEXT: s_setpc_b64 s[30:31]2369;2370; VI-LABEL: v_mad_mix_f32_precvtabsf16hi_f16lo_f16lo:2371; VI: ; %bb.0:2372; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2373; VI-NEXT: v_cvt_f32_f16_sdwa v3, |v0| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12374; VI-NEXT: v_cvt_f32_f16_e32 v1, v12375; VI-NEXT: v_cvt_f32_f16_e32 v0, v22376; VI-NEXT: v_mac_f32_e32 v0, v3, v12377; VI-NEXT: s_setpc_b64 s[30:31]2378;2379; SDAG-CI-LABEL: v_mad_mix_f32_precvtabsf16hi_f16lo_f16lo:2380; SDAG-CI: ; %bb.0:2381; SDAG-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2382; SDAG-CI-NEXT: v_lshrrev_b32_e32 v0, 16, v02383; SDAG-CI-NEXT: v_cvt_f32_f16_e64 v0, |v0|2384; SDAG-CI-NEXT: v_mad_f32 v0, v0, v1, v22385; SDAG-CI-NEXT: s_setpc_b64 s[30:31]2386;2387; GISEL-CI-LABEL: v_mad_mix_f32_precvtabsf16hi_f16lo_f16lo:2388; GISEL-CI: ; %bb.0:2389; GISEL-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2390; GISEL-CI-NEXT: v_lshrrev_b32_e32 v0, 16, v02391; GISEL-CI-NEXT: v_cvt_f32_f16_e64 v3, |v0|2392; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v1, v12393; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v0, v22394; GISEL-CI-NEXT: v_mac_f32_e32 v0, v3, v12395; GISEL-CI-NEXT: s_setpc_b64 s[30:31]2396 %src0.arg.bc = bitcast i32 %src0.arg to <2 x half>2397 %src0 = extractelement <2 x half> %src0.arg.bc, i32 12398 %src0.abs = call half @llvm.fabs.f16(half %src0)2399 %src0.ext = fpext half %src0.abs to float2400 %src1.ext = fpext half %src1 to float2401 %src2.ext = fpext half %src2 to float2402 %result = tail call float @llvm.fmuladd.f32(float %src0.ext, float %src1.ext, float %src2.ext)2403 ret float %result2404}2405 2406define float @v_mad_mix_f32_preextractfneg_f16hi_f16lo_f16lo(i32 %src0.arg, half %src1, half %src2) #0 {2407; GFX1100-LABEL: v_mad_mix_f32_preextractfneg_f16hi_f16lo_f16lo:2408; GFX1100: ; %bb.0:2409; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2410; GFX1100-NEXT: v_fma_mix_f32 v0, -v0, v1, v2 op_sel:[1,0,0] op_sel_hi:[1,1,1]2411; GFX1100-NEXT: s_setpc_b64 s[30:31]2412;2413; GFX900-LABEL: v_mad_mix_f32_preextractfneg_f16hi_f16lo_f16lo:2414; GFX900: ; %bb.0:2415; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2416; GFX900-NEXT: v_mad_mix_f32 v0, -v0, v1, v2 op_sel:[1,0,0] op_sel_hi:[1,1,1]2417; GFX900-NEXT: s_setpc_b64 s[30:31]2418;2419; GFX906-LABEL: v_mad_mix_f32_preextractfneg_f16hi_f16lo_f16lo:2420; GFX906: ; %bb.0:2421; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2422; GFX906-NEXT: v_fma_mix_f32 v0, -v0, v1, v2 op_sel:[1,0,0] op_sel_hi:[1,1,1]2423; GFX906-NEXT: s_setpc_b64 s[30:31]2424;2425; SDAG-GFX9GEN-LABEL: v_mad_mix_f32_preextractfneg_f16hi_f16lo_f16lo:2426; SDAG-GFX9GEN: ; %bb.0:2427; SDAG-GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2428; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12429; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v1, v12430; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v2, v22431; SDAG-GFX9GEN-NEXT: v_mad_f32 v0, -v0, v1, v22432; SDAG-GFX9GEN-NEXT: s_setpc_b64 s[30:31]2433;2434; SDAG-VI-LABEL: v_mad_mix_f32_preextractfneg_f16hi_f16lo_f16lo:2435; SDAG-VI: ; %bb.0:2436; SDAG-VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2437; SDAG-VI-NEXT: v_cvt_f32_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12438; SDAG-VI-NEXT: v_cvt_f32_f16_e32 v1, v12439; SDAG-VI-NEXT: v_cvt_f32_f16_e32 v2, v22440; SDAG-VI-NEXT: v_mad_f32 v0, -v0, v1, v22441; SDAG-VI-NEXT: s_setpc_b64 s[30:31]2442;2443; SDAG-CI-LABEL: v_mad_mix_f32_preextractfneg_f16hi_f16lo_f16lo:2444; SDAG-CI: ; %bb.0:2445; SDAG-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2446; SDAG-CI-NEXT: v_lshrrev_b32_e32 v0, 16, v02447; SDAG-CI-NEXT: v_cvt_f32_f16_e64 v0, -v02448; SDAG-CI-NEXT: v_mad_f32 v0, v0, v1, v22449; SDAG-CI-NEXT: s_setpc_b64 s[30:31]2450;2451; GISEL-GFX9GEN-LABEL: v_mad_mix_f32_preextractfneg_f16hi_f16lo_f16lo:2452; GISEL-GFX9GEN: ; %bb.0:2453; GISEL-GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2454; GISEL-GFX9GEN-NEXT: v_xor_b32_e32 v0, 0x80008000, v02455; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12456; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v1, v12457; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v22458; GISEL-GFX9GEN-NEXT: v_mac_f32_e32 v0, v3, v12459; GISEL-GFX9GEN-NEXT: s_setpc_b64 s[30:31]2460;2461; GISEL-VI-LABEL: v_mad_mix_f32_preextractfneg_f16hi_f16lo_f16lo:2462; GISEL-VI: ; %bb.0:2463; GISEL-VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2464; GISEL-VI-NEXT: v_xor_b32_e32 v0, 0x80008000, v02465; GISEL-VI-NEXT: v_cvt_f32_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12466; GISEL-VI-NEXT: v_cvt_f32_f16_e32 v1, v12467; GISEL-VI-NEXT: v_cvt_f32_f16_e32 v0, v22468; GISEL-VI-NEXT: v_mac_f32_e32 v0, v3, v12469; GISEL-VI-NEXT: s_setpc_b64 s[30:31]2470;2471; GISEL-CI-LABEL: v_mad_mix_f32_preextractfneg_f16hi_f16lo_f16lo:2472; GISEL-CI: ; %bb.0:2473; GISEL-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2474; GISEL-CI-NEXT: v_xor_b32_e32 v0, 0x80008000, v02475; GISEL-CI-NEXT: v_lshrrev_b32_e32 v0, 16, v02476; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v3, v02477; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v1, v12478; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v0, v22479; GISEL-CI-NEXT: v_mac_f32_e32 v0, v3, v12480; GISEL-CI-NEXT: s_setpc_b64 s[30:31]2481 %src0.arg.bc = bitcast i32 %src0.arg to <2 x half>2482 %fneg = fneg <2 x half> %src0.arg.bc2483 %src0 = extractelement <2 x half> %fneg, i32 12484 %src0.ext = fpext half %src0 to float2485 %src1.ext = fpext half %src1 to float2486 %src2.ext = fpext half %src2 to float2487 %result = tail call float @llvm.fmuladd.f32(float %src0.ext, float %src1.ext, float %src2.ext)2488 ret float %result2489}2490 2491define float @v_mad_mix_f32_preextractfabs_f16hi_f16lo_f16lo(i32 %src0.arg, half %src1, half %src2) #0 {2492; GFX1100-LABEL: v_mad_mix_f32_preextractfabs_f16hi_f16lo_f16lo:2493; GFX1100: ; %bb.0:2494; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2495; GFX1100-NEXT: v_fma_mix_f32 v0, |v0|, v1, v2 op_sel:[1,0,0] op_sel_hi:[1,1,1]2496; GFX1100-NEXT: s_setpc_b64 s[30:31]2497;2498; GFX900-LABEL: v_mad_mix_f32_preextractfabs_f16hi_f16lo_f16lo:2499; GFX900: ; %bb.0:2500; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2501; GFX900-NEXT: v_mad_mix_f32 v0, |v0|, v1, v2 op_sel:[1,0,0] op_sel_hi:[1,1,1]2502; GFX900-NEXT: s_setpc_b64 s[30:31]2503;2504; GFX906-LABEL: v_mad_mix_f32_preextractfabs_f16hi_f16lo_f16lo:2505; GFX906: ; %bb.0:2506; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2507; GFX906-NEXT: v_fma_mix_f32 v0, |v0|, v1, v2 op_sel:[1,0,0] op_sel_hi:[1,1,1]2508; GFX906-NEXT: s_setpc_b64 s[30:31]2509;2510; SDAG-GFX9GEN-LABEL: v_mad_mix_f32_preextractfabs_f16hi_f16lo_f16lo:2511; SDAG-GFX9GEN: ; %bb.0:2512; SDAG-GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2513; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v3, |v0| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12514; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v1, v12515; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v22516; SDAG-GFX9GEN-NEXT: v_mac_f32_e32 v0, v3, v12517; SDAG-GFX9GEN-NEXT: s_setpc_b64 s[30:31]2518;2519; SDAG-VI-LABEL: v_mad_mix_f32_preextractfabs_f16hi_f16lo_f16lo:2520; SDAG-VI: ; %bb.0:2521; SDAG-VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2522; SDAG-VI-NEXT: v_cvt_f32_f16_sdwa v3, |v0| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12523; SDAG-VI-NEXT: v_cvt_f32_f16_e32 v1, v12524; SDAG-VI-NEXT: v_cvt_f32_f16_e32 v0, v22525; SDAG-VI-NEXT: v_mac_f32_e32 v0, v3, v12526; SDAG-VI-NEXT: s_setpc_b64 s[30:31]2527;2528; SDAG-CI-LABEL: v_mad_mix_f32_preextractfabs_f16hi_f16lo_f16lo:2529; SDAG-CI: ; %bb.0:2530; SDAG-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2531; SDAG-CI-NEXT: v_lshrrev_b32_e32 v0, 16, v02532; SDAG-CI-NEXT: v_cvt_f32_f16_e64 v0, |v0|2533; SDAG-CI-NEXT: v_mad_f32 v0, v0, v1, v22534; SDAG-CI-NEXT: s_setpc_b64 s[30:31]2535;2536; GISEL-GFX9GEN-LABEL: v_mad_mix_f32_preextractfabs_f16hi_f16lo_f16lo:2537; GISEL-GFX9GEN: ; %bb.0:2538; GISEL-GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2539; GISEL-GFX9GEN-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v02540; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12541; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v1, v12542; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v22543; GISEL-GFX9GEN-NEXT: v_mac_f32_e32 v0, v3, v12544; GISEL-GFX9GEN-NEXT: s_setpc_b64 s[30:31]2545;2546; GISEL-VI-LABEL: v_mad_mix_f32_preextractfabs_f16hi_f16lo_f16lo:2547; GISEL-VI: ; %bb.0:2548; GISEL-VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2549; GISEL-VI-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v02550; GISEL-VI-NEXT: v_cvt_f32_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12551; GISEL-VI-NEXT: v_cvt_f32_f16_e32 v1, v12552; GISEL-VI-NEXT: v_cvt_f32_f16_e32 v0, v22553; GISEL-VI-NEXT: v_mac_f32_e32 v0, v3, v12554; GISEL-VI-NEXT: s_setpc_b64 s[30:31]2555;2556; GISEL-CI-LABEL: v_mad_mix_f32_preextractfabs_f16hi_f16lo_f16lo:2557; GISEL-CI: ; %bb.0:2558; GISEL-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2559; GISEL-CI-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v02560; GISEL-CI-NEXT: v_lshrrev_b32_e32 v0, 16, v02561; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v3, v02562; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v1, v12563; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v0, v22564; GISEL-CI-NEXT: v_mac_f32_e32 v0, v3, v12565; GISEL-CI-NEXT: s_setpc_b64 s[30:31]2566 %src0.arg.bc = bitcast i32 %src0.arg to <2 x half>2567 %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %src0.arg.bc)2568 %src0 = extractelement <2 x half> %fabs, i32 12569 %src0.ext = fpext half %src0 to float2570 %src1.ext = fpext half %src1 to float2571 %src2.ext = fpext half %src2 to float2572 %result = tail call float @llvm.fmuladd.f32(float %src0.ext, float %src1.ext, float %src2.ext)2573 ret float %result2574}2575 2576define float @v_mad_mix_f32_preextractfabsfneg_f16hi_f16lo_f16lo(i32 %src0.arg, half %src1, half %src2) #0 {2577; GFX1100-LABEL: v_mad_mix_f32_preextractfabsfneg_f16hi_f16lo_f16lo:2578; GFX1100: ; %bb.0:2579; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2580; GFX1100-NEXT: v_fma_mix_f32 v0, -|v0|, v1, v2 op_sel:[1,0,0] op_sel_hi:[1,1,1]2581; GFX1100-NEXT: s_setpc_b64 s[30:31]2582;2583; GFX900-LABEL: v_mad_mix_f32_preextractfabsfneg_f16hi_f16lo_f16lo:2584; GFX900: ; %bb.0:2585; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2586; GFX900-NEXT: v_mad_mix_f32 v0, -|v0|, v1, v2 op_sel:[1,0,0] op_sel_hi:[1,1,1]2587; GFX900-NEXT: s_setpc_b64 s[30:31]2588;2589; GFX906-LABEL: v_mad_mix_f32_preextractfabsfneg_f16hi_f16lo_f16lo:2590; GFX906: ; %bb.0:2591; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2592; GFX906-NEXT: v_fma_mix_f32 v0, -|v0|, v1, v2 op_sel:[1,0,0] op_sel_hi:[1,1,1]2593; GFX906-NEXT: s_setpc_b64 s[30:31]2594;2595; SDAG-GFX9GEN-LABEL: v_mad_mix_f32_preextractfabsfneg_f16hi_f16lo_f16lo:2596; SDAG-GFX9GEN: ; %bb.0:2597; SDAG-GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2598; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v0, |v0| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12599; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v1, v12600; SDAG-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v2, v22601; SDAG-GFX9GEN-NEXT: v_mad_f32 v0, -v0, v1, v22602; SDAG-GFX9GEN-NEXT: s_setpc_b64 s[30:31]2603;2604; SDAG-VI-LABEL: v_mad_mix_f32_preextractfabsfneg_f16hi_f16lo_f16lo:2605; SDAG-VI: ; %bb.0:2606; SDAG-VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2607; SDAG-VI-NEXT: v_cvt_f32_f16_sdwa v0, |v0| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12608; SDAG-VI-NEXT: v_cvt_f32_f16_e32 v1, v12609; SDAG-VI-NEXT: v_cvt_f32_f16_e32 v2, v22610; SDAG-VI-NEXT: v_mad_f32 v0, -v0, v1, v22611; SDAG-VI-NEXT: s_setpc_b64 s[30:31]2612;2613; SDAG-CI-LABEL: v_mad_mix_f32_preextractfabsfneg_f16hi_f16lo_f16lo:2614; SDAG-CI: ; %bb.0:2615; SDAG-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2616; SDAG-CI-NEXT: v_lshrrev_b32_e32 v0, 16, v02617; SDAG-CI-NEXT: v_cvt_f32_f16_e64 v0, -|v0|2618; SDAG-CI-NEXT: v_mad_f32 v0, v0, v1, v22619; SDAG-CI-NEXT: s_setpc_b64 s[30:31]2620;2621; GISEL-GFX9GEN-LABEL: v_mad_mix_f32_preextractfabsfneg_f16hi_f16lo_f16lo:2622; GISEL-GFX9GEN: ; %bb.0:2623; GISEL-GFX9GEN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2624; GISEL-GFX9GEN-NEXT: v_or_b32_e32 v0, 0x80008000, v02625; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12626; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v1, v12627; GISEL-GFX9GEN-NEXT: v_cvt_f32_f16_e32 v0, v22628; GISEL-GFX9GEN-NEXT: v_mac_f32_e32 v0, v3, v12629; GISEL-GFX9GEN-NEXT: s_setpc_b64 s[30:31]2630;2631; GISEL-VI-LABEL: v_mad_mix_f32_preextractfabsfneg_f16hi_f16lo_f16lo:2632; GISEL-VI: ; %bb.0:2633; GISEL-VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2634; GISEL-VI-NEXT: v_or_b32_e32 v0, 0x80008000, v02635; GISEL-VI-NEXT: v_cvt_f32_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_12636; GISEL-VI-NEXT: v_cvt_f32_f16_e32 v1, v12637; GISEL-VI-NEXT: v_cvt_f32_f16_e32 v0, v22638; GISEL-VI-NEXT: v_mac_f32_e32 v0, v3, v12639; GISEL-VI-NEXT: s_setpc_b64 s[30:31]2640;2641; GISEL-CI-LABEL: v_mad_mix_f32_preextractfabsfneg_f16hi_f16lo_f16lo:2642; GISEL-CI: ; %bb.0:2643; GISEL-CI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2644; GISEL-CI-NEXT: v_or_b32_e32 v0, 0x80008000, v02645; GISEL-CI-NEXT: v_lshrrev_b32_e32 v0, 16, v02646; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v3, v02647; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v1, v12648; GISEL-CI-NEXT: v_cvt_f32_f16_e32 v0, v22649; GISEL-CI-NEXT: v_mac_f32_e32 v0, v3, v12650; GISEL-CI-NEXT: s_setpc_b64 s[30:31]2651 %src0.arg.bc = bitcast i32 %src0.arg to <2 x half>2652 %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %src0.arg.bc)2653 %fneg.fabs = fneg <2 x half> %fabs2654 %src0 = extractelement <2 x half> %fneg.fabs, i32 12655 %src0.ext = fpext half %src0 to float2656 %src1.ext = fpext half %src1 to float2657 %src2.ext = fpext half %src2 to float2658 %result = tail call float @llvm.fmuladd.f32(float %src0.ext, float %src1.ext, float %src2.ext)2659 ret float %result2660}2661 2662declare half @llvm.fabs.f16(half) #22663declare <2 x half> @llvm.fabs.v2f16(<2 x half>) #22664declare float @llvm.fabs.f32(float) #22665declare float @llvm.minnum.f32(float, float) #22666declare float @llvm.maxnum.f32(float, float) #22667declare float @llvm.fmuladd.f32(float, float, float) #22668declare <2 x float> @llvm.fmuladd.v2f32(<2 x float>, <2 x float>, <2 x float>) #22669 2670attributes #0 = { nounwind "denormal-fp-math-f32"="preserve-sign,preserve-sign" }2671attributes #1 = { nounwind "denormal-fp-math-f32"="ieee,ieee" }2672attributes #2 = { nounwind readnone speculatable }2673;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:2674; GISEL-GFX1100-FAKE16: {{.*}}2675