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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc -mtriple=amdgcn -mcpu=gfx803 < %s | FileCheck -check-prefix=GCN -check-prefix=GFX8 %s3; RUN: llc -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefix=GCN -check-prefix=GFX9 %s4; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 < %s | FileCheck -check-prefix=GCN -check-prefix=GFX10 %s5; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefix=GCN -check-prefixes=GFX11,GFX11-TRUE16 %s6; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefix=GCN -check-prefixes=GFX11,GFX11-FAKE16 %s7 8; FIXME: GFX9 should be producing v_mad_u16 instead of v_mad_legacy_u16.9 10define amdgpu_kernel void @mad_u16(11; GFX8-LABEL: mad_u16:12; GFX8: ; %bb.0: ; %entry13; GFX8-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x2414; GFX8-NEXT: v_lshlrev_b32_e32 v4, 1, v015; GFX8-NEXT: s_waitcnt lgkmcnt(0)16; GFX8-NEXT: v_mov_b32_e32 v1, s317; GFX8-NEXT: v_add_u32_e32 v0, vcc, s2, v418; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc19; GFX8-NEXT: v_mov_b32_e32 v3, s520; GFX8-NEXT: v_add_u32_e32 v2, vcc, s4, v421; GFX8-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc22; GFX8-NEXT: v_mov_b32_e32 v5, s723; GFX8-NEXT: v_add_u32_e32 v4, vcc, s6, v424; GFX8-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc25; GFX8-NEXT: flat_load_ushort v6, v[0:1] glc26; GFX8-NEXT: s_waitcnt vmcnt(0)27; GFX8-NEXT: flat_load_ushort v2, v[2:3] glc28; GFX8-NEXT: s_waitcnt vmcnt(0)29; GFX8-NEXT: flat_load_ushort v3, v[4:5] glc30; GFX8-NEXT: s_waitcnt vmcnt(0)31; GFX8-NEXT: v_mov_b32_e32 v0, s032; GFX8-NEXT: v_mov_b32_e32 v1, s133; GFX8-NEXT: v_mad_u16 v2, v6, v2, v334; GFX8-NEXT: flat_store_short v[0:1], v235; GFX8-NEXT: s_endpgm36;37; GFX9-LABEL: mad_u16:38; GFX9: ; %bb.0: ; %entry39; GFX9-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x2440; GFX9-NEXT: v_lshlrev_b32_e32 v0, 1, v041; GFX9-NEXT: s_waitcnt lgkmcnt(0)42; GFX9-NEXT: global_load_ushort v1, v0, s[10:11] glc43; GFX9-NEXT: s_waitcnt vmcnt(0)44; GFX9-NEXT: global_load_ushort v2, v0, s[12:13] glc45; GFX9-NEXT: s_waitcnt vmcnt(0)46; GFX9-NEXT: global_load_ushort v3, v0, s[14:15] glc47; GFX9-NEXT: s_waitcnt vmcnt(0)48; GFX9-NEXT: v_mov_b32_e32 v0, 049; GFX9-NEXT: v_mad_legacy_u16 v1, v1, v2, v350; GFX9-NEXT: global_store_short v0, v1, s[8:9]51; GFX9-NEXT: s_endpgm52;53; GFX10-LABEL: mad_u16:54; GFX10: ; %bb.0: ; %entry55; GFX10-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x2456; GFX10-NEXT: v_lshlrev_b32_e32 v0, 1, v057; GFX10-NEXT: s_waitcnt lgkmcnt(0)58; GFX10-NEXT: global_load_ushort v1, v0, s[10:11] glc dlc59; GFX10-NEXT: s_waitcnt vmcnt(0)60; GFX10-NEXT: global_load_ushort v2, v0, s[12:13] glc dlc61; GFX10-NEXT: s_waitcnt vmcnt(0)62; GFX10-NEXT: global_load_ushort v3, v0, s[14:15] glc dlc63; GFX10-NEXT: s_waitcnt vmcnt(0)64; GFX10-NEXT: v_mov_b32_e32 v0, 065; GFX10-NEXT: v_mad_u16 v1, v1, v2, v366; GFX10-NEXT: global_store_short v0, v1, s[8:9]67; GFX10-NEXT: s_endpgm68;69; GFX11-TRUE16-LABEL: mad_u16:70; GFX11-TRUE16: ; %bb.0: ; %entry71; GFX11-TRUE16-NEXT: s_load_b256 s[0:7], s[4:5], 0x2472; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v073; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)74; GFX11-TRUE16-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 1, v075; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)76; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v1, s[2:3] glc dlc77; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)78; GFX11-TRUE16-NEXT: global_load_d16_hi_b16 v0, v1, s[4:5] glc dlc79; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)80; GFX11-TRUE16-NEXT: global_load_d16_b16 v1, v1, s[6:7] glc dlc81; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)82; GFX11-TRUE16-NEXT: v_mad_u16 v0.l, v0.l, v0.h, v1.l83; GFX11-TRUE16-NEXT: global_store_b16 v2, v0, s[0:1]84; GFX11-TRUE16-NEXT: s_endpgm85;86; GFX11-FAKE16-LABEL: mad_u16:87; GFX11-FAKE16: ; %bb.0: ; %entry88; GFX11-FAKE16-NEXT: s_load_b256 s[0:7], s[4:5], 0x2489; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, 0 :: v_dual_and_b32 v0, 0x3ff, v090; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)91; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 1, v092; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)93; GFX11-FAKE16-NEXT: global_load_u16 v1, v0, s[2:3] glc dlc94; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)95; GFX11-FAKE16-NEXT: global_load_u16 v2, v0, s[4:5] glc dlc96; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)97; GFX11-FAKE16-NEXT: global_load_u16 v0, v0, s[6:7] glc dlc98; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)99; GFX11-FAKE16-NEXT: v_mad_u16 v0, v1, v2, v0100; GFX11-FAKE16-NEXT: global_store_b16 v3, v0, s[0:1]101; GFX11-FAKE16-NEXT: s_endpgm102 ptr addrspace(1) %r,103 ptr addrspace(1) %a,104 ptr addrspace(1) %b,105 ptr addrspace(1) %c) {106entry:107 %tid = call i32 @llvm.amdgcn.workitem.id.x()108 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a, i32 %tid109 %b.gep = getelementptr inbounds i16, ptr addrspace(1) %b, i32 %tid110 %c.gep = getelementptr inbounds i16, ptr addrspace(1) %c, i32 %tid111 112 %a.val = load volatile i16, ptr addrspace(1) %a.gep113 %b.val = load volatile i16, ptr addrspace(1) %b.gep114 %c.val = load volatile i16, ptr addrspace(1) %c.gep115 116 %m.val = mul i16 %a.val, %b.val117 %r.val = add i16 %m.val, %c.val118 119 store i16 %r.val, ptr addrspace(1) %r120 ret void121}122 123define i16 @v_mad_u16(i16 %arg0, i16 %arg1, i16 %arg2) {124; GFX8-LABEL: v_mad_u16:125; GFX8: ; %bb.0:126; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)127; GFX8-NEXT: v_mad_u16 v0, v0, v1, v2128; GFX8-NEXT: s_setpc_b64 s[30:31]129;130; GFX9-LABEL: v_mad_u16:131; GFX9: ; %bb.0:132; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)133; GFX9-NEXT: v_mad_legacy_u16 v0, v0, v1, v2134; GFX9-NEXT: s_setpc_b64 s[30:31]135;136; GFX10-LABEL: v_mad_u16:137; GFX10: ; %bb.0:138; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)139; GFX10-NEXT: v_mad_u16 v0, v0, v1, v2140; GFX10-NEXT: s_setpc_b64 s[30:31]141;142; GFX11-TRUE16-LABEL: v_mad_u16:143; GFX11-TRUE16: ; %bb.0:144; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)145; GFX11-TRUE16-NEXT: v_mad_u16 v0.l, v0.l, v1.l, v2.l146; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]147;148; GFX11-FAKE16-LABEL: v_mad_u16:149; GFX11-FAKE16: ; %bb.0:150; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)151; GFX11-FAKE16-NEXT: v_mad_u16 v0, v0, v1, v2152; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]153 %mul = mul i16 %arg0, %arg1154 %add = add i16 %mul, %arg2155 ret i16 %add156}157 158define i32 @v_mad_u16_zext(i16 %arg0, i16 %arg1, i16 %arg2) {159; GFX8-LABEL: v_mad_u16_zext:160; GFX8: ; %bb.0:161; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)162; GFX8-NEXT: v_mad_u16 v0, v0, v1, v2163; GFX8-NEXT: s_setpc_b64 s[30:31]164;165; GFX9-LABEL: v_mad_u16_zext:166; GFX9: ; %bb.0:167; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)168; GFX9-NEXT: v_mad_legacy_u16 v0, v0, v1, v2169; GFX9-NEXT: s_setpc_b64 s[30:31]170;171; GFX10-LABEL: v_mad_u16_zext:172; GFX10: ; %bb.0:173; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)174; GFX10-NEXT: v_mad_u16 v0, v0, v1, v2175; GFX10-NEXT: v_and_b32_e32 v0, 0xffff, v0176; GFX10-NEXT: s_setpc_b64 s[30:31]177;178; GFX11-TRUE16-LABEL: v_mad_u16_zext:179; GFX11-TRUE16: ; %bb.0:180; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)181; GFX11-TRUE16-NEXT: v_mad_u16 v0.l, v0.l, v1.l, v2.l182; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, 0183; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]184;185; GFX11-FAKE16-LABEL: v_mad_u16_zext:186; GFX11-FAKE16: ; %bb.0:187; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)188; GFX11-FAKE16-NEXT: v_mad_u16 v0, v0, v1, v2189; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)190; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0191; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]192 %mul = mul i16 %arg0, %arg1193 %add = add i16 %mul, %arg2194 %zext = zext i16 %add to i32195 ret i32 %zext196}197 198define i64 @v_mad_u16_zext64(i16 %arg0, i16 %arg1, i16 %arg2) {199; GFX8-LABEL: v_mad_u16_zext64:200; GFX8: ; %bb.0:201; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)202; GFX8-NEXT: v_mad_u16 v0, v0, v1, v2203; GFX8-NEXT: v_mov_b32_e32 v1, 0204; GFX8-NEXT: s_setpc_b64 s[30:31]205;206; GFX9-LABEL: v_mad_u16_zext64:207; GFX9: ; %bb.0:208; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)209; GFX9-NEXT: v_mad_legacy_u16 v0, v0, v1, v2210; GFX9-NEXT: v_mov_b32_e32 v1, 0211; GFX9-NEXT: s_setpc_b64 s[30:31]212;213; GFX10-LABEL: v_mad_u16_zext64:214; GFX10: ; %bb.0:215; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)216; GFX10-NEXT: v_mad_u16 v0, v0, v1, v2217; GFX10-NEXT: v_mov_b32_e32 v1, 0218; GFX10-NEXT: v_and_b32_e32 v0, 0xffff, v0219; GFX10-NEXT: s_setpc_b64 s[30:31]220;221; GFX11-TRUE16-LABEL: v_mad_u16_zext64:222; GFX11-TRUE16: ; %bb.0:223; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)224; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, 0225; GFX11-TRUE16-NEXT: v_mad_u16 v0.l, v0.l, v1.l, v2.l226; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0227; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]228;229; GFX11-FAKE16-LABEL: v_mad_u16_zext64:230; GFX11-FAKE16: ; %bb.0:231; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)232; GFX11-FAKE16-NEXT: v_mad_u16 v0, v0, v1, v2233; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)234; GFX11-FAKE16-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0xffff, v0235; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]236 %mul = mul i16 %arg0, %arg1237 %add = add i16 %mul, %arg2238 %zext = zext i16 %add to i64239 ret i64 %zext240}241 242define amdgpu_ps i16 @s_mad_u16(i16 inreg %arg0, i16 inreg %arg1, i16 inreg %arg2) {243; GFX8-LABEL: s_mad_u16:244; GFX8: ; %bb.0:245; GFX8-NEXT: s_mul_i32 s0, s0, s1246; GFX8-NEXT: s_add_i32 s0, s0, s2247; GFX8-NEXT: ; return to shader part epilog248;249; GFX9-LABEL: s_mad_u16:250; GFX9: ; %bb.0:251; GFX9-NEXT: s_mul_i32 s0, s0, s1252; GFX9-NEXT: s_add_i32 s0, s0, s2253; GFX9-NEXT: ; return to shader part epilog254;255; GFX10-LABEL: s_mad_u16:256; GFX10: ; %bb.0:257; GFX10-NEXT: s_mul_i32 s0, s0, s1258; GFX10-NEXT: s_add_i32 s0, s0, s2259; GFX10-NEXT: ; return to shader part epilog260;261; GFX11-LABEL: s_mad_u16:262; GFX11: ; %bb.0:263; GFX11-NEXT: s_mul_i32 s0, s0, s1264; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)265; GFX11-NEXT: s_add_i32 s0, s0, s2266; GFX11-NEXT: ; return to shader part epilog267 %mul = mul i16 %arg0, %arg1268 %add = add i16 %mul, %arg2269 ret i16 %add270}271 272define amdgpu_ps i32 @s_mad_u16_zext(i16 inreg %arg0, i16 inreg %arg1, i16 inreg %arg2) {273; GFX8-LABEL: s_mad_u16_zext:274; GFX8: ; %bb.0:275; GFX8-NEXT: s_mul_i32 s0, s0, s1276; GFX8-NEXT: s_add_i32 s0, s0, s2277; GFX8-NEXT: s_and_b32 s0, s0, 0xffff278; GFX8-NEXT: ; return to shader part epilog279;280; GFX9-LABEL: s_mad_u16_zext:281; GFX9: ; %bb.0:282; GFX9-NEXT: s_mul_i32 s0, s0, s1283; GFX9-NEXT: s_add_i32 s0, s0, s2284; GFX9-NEXT: s_and_b32 s0, s0, 0xffff285; GFX9-NEXT: ; return to shader part epilog286;287; GFX10-LABEL: s_mad_u16_zext:288; GFX10: ; %bb.0:289; GFX10-NEXT: s_mul_i32 s0, s0, s1290; GFX10-NEXT: s_add_i32 s0, s0, s2291; GFX10-NEXT: s_and_b32 s0, s0, 0xffff292; GFX10-NEXT: ; return to shader part epilog293;294; GFX11-LABEL: s_mad_u16_zext:295; GFX11: ; %bb.0:296; GFX11-NEXT: s_mul_i32 s0, s0, s1297; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)298; GFX11-NEXT: s_add_i32 s0, s0, s2299; GFX11-NEXT: s_and_b32 s0, s0, 0xffff300; GFX11-NEXT: ; return to shader part epilog301 %mul = mul i16 %arg0, %arg1302 %add = add i16 %mul, %arg2303 %zext = zext i16 %add to i32304 ret i32 %zext305}306 307define amdgpu_ps i64 @s_mad_u16_zext64(i16 inreg %arg0, i16 inreg %arg1, i16 inreg %arg2) {308; GFX8-LABEL: s_mad_u16_zext64:309; GFX8: ; %bb.0:310; GFX8-NEXT: s_mul_i32 s0, s0, s1311; GFX8-NEXT: s_add_i32 s0, s0, s2312; GFX8-NEXT: s_and_b32 s0, s0, 0xffff313; GFX8-NEXT: s_mov_b32 s1, 0314; GFX8-NEXT: ; return to shader part epilog315;316; GFX9-LABEL: s_mad_u16_zext64:317; GFX9: ; %bb.0:318; GFX9-NEXT: s_mul_i32 s0, s0, s1319; GFX9-NEXT: s_add_i32 s0, s0, s2320; GFX9-NEXT: s_and_b32 s0, s0, 0xffff321; GFX9-NEXT: s_mov_b32 s1, 0322; GFX9-NEXT: ; return to shader part epilog323;324; GFX10-LABEL: s_mad_u16_zext64:325; GFX10: ; %bb.0:326; GFX10-NEXT: s_mul_i32 s0, s0, s1327; GFX10-NEXT: s_mov_b32 s1, 0328; GFX10-NEXT: s_add_i32 s0, s0, s2329; GFX10-NEXT: s_and_b32 s0, s0, 0xffff330; GFX10-NEXT: ; return to shader part epilog331;332; GFX11-LABEL: s_mad_u16_zext64:333; GFX11: ; %bb.0:334; GFX11-NEXT: s_mul_i32 s0, s0, s1335; GFX11-NEXT: s_mov_b32 s1, 0336; GFX11-NEXT: s_add_i32 s0, s0, s2337; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)338; GFX11-NEXT: s_and_b32 s0, s0, 0xffff339; GFX11-NEXT: ; return to shader part epilog340 %mul = mul i16 %arg0, %arg1341 %add = add i16 %mul, %arg2342 %zext = zext i16 %add to i64343 ret i64 %zext344}345 346define amdgpu_ps i32 @s_mad_u16_sext(i16 inreg %arg0, i16 inreg %arg1, i16 inreg %arg2) {347; GFX8-LABEL: s_mad_u16_sext:348; GFX8: ; %bb.0:349; GFX8-NEXT: s_mul_i32 s0, s0, s1350; GFX8-NEXT: s_add_i32 s0, s0, s2351; GFX8-NEXT: s_sext_i32_i16 s0, s0352; GFX8-NEXT: ; return to shader part epilog353;354; GFX9-LABEL: s_mad_u16_sext:355; GFX9: ; %bb.0:356; GFX9-NEXT: s_mul_i32 s0, s0, s1357; GFX9-NEXT: s_add_i32 s0, s0, s2358; GFX9-NEXT: s_sext_i32_i16 s0, s0359; GFX9-NEXT: ; return to shader part epilog360;361; GFX10-LABEL: s_mad_u16_sext:362; GFX10: ; %bb.0:363; GFX10-NEXT: s_mul_i32 s0, s0, s1364; GFX10-NEXT: s_add_i32 s0, s0, s2365; GFX10-NEXT: s_sext_i32_i16 s0, s0366; GFX10-NEXT: ; return to shader part epilog367;368; GFX11-LABEL: s_mad_u16_sext:369; GFX11: ; %bb.0:370; GFX11-NEXT: s_mul_i32 s0, s0, s1371; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)372; GFX11-NEXT: s_add_i32 s0, s0, s2373; GFX11-NEXT: s_sext_i32_i16 s0, s0374; GFX11-NEXT: ; return to shader part epilog375 %mul = mul i16 %arg0, %arg1376 %add = add i16 %mul, %arg2377 %sext = sext i16 %add to i32378 ret i32 %sext379}380 381declare i32 @llvm.amdgcn.workitem.id.x()382;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:383; GCN: {{.*}}384