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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn-- -mcpu=fiji -mattr=-flat-for-global < %s | FileCheck %s --check-prefix=VI3; RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 -mattr=-flat-for-global < %s | FileCheck %s --check-prefix=GFX94 5; FIXME: Need to handle non-uniform case for function below (load without gep).6define amdgpu_kernel void @v_test_imax_sge_i16(ptr addrspace(1) %out, ptr addrspace(1) %aptr, ptr addrspace(1) %bptr) nounwind {7; VI-LABEL: v_test_imax_sge_i16:8; VI: ; %bb.0:9; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2410; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x3411; VI-NEXT: v_lshlrev_b32_e32 v4, 1, v012; VI-NEXT: s_waitcnt lgkmcnt(0)13; VI-NEXT: v_mov_b32_e32 v1, s314; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v415; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc16; VI-NEXT: v_mov_b32_e32 v3, s517; VI-NEXT: v_add_u32_e32 v2, vcc, s4, v418; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc19; VI-NEXT: flat_load_ushort v5, v[0:1]20; VI-NEXT: flat_load_ushort v2, v[2:3]21; VI-NEXT: v_mov_b32_e32 v1, s122; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v423; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc24; VI-NEXT: s_waitcnt vmcnt(0)25; VI-NEXT: v_max_i16_e32 v2, v5, v226; VI-NEXT: flat_store_short v[0:1], v227; VI-NEXT: s_endpgm28;29; GFX9-LABEL: v_test_imax_sge_i16:30; GFX9: ; %bb.0:31; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2432; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x3433; GFX9-NEXT: v_lshlrev_b32_e32 v0, 1, v034; GFX9-NEXT: s_waitcnt lgkmcnt(0)35; GFX9-NEXT: global_load_ushort v1, v0, s[2:3]36; GFX9-NEXT: global_load_ushort v2, v0, s[6:7]37; GFX9-NEXT: s_waitcnt vmcnt(0)38; GFX9-NEXT: v_max_i16_e32 v1, v1, v239; GFX9-NEXT: global_store_short v0, v1, s[0:1]40; GFX9-NEXT: s_endpgm41 %tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone42 %gep0 = getelementptr i16, ptr addrspace(1) %aptr, i32 %tid43 %gep1 = getelementptr i16, ptr addrspace(1) %bptr, i32 %tid44 %outgep = getelementptr i16, ptr addrspace(1) %out, i32 %tid45 %a = load i16, ptr addrspace(1) %gep0, align 446 %b = load i16, ptr addrspace(1) %gep1, align 447 %cmp = icmp sge i16 %a, %b48 %val = select i1 %cmp, i16 %a, i16 %b49 store i16 %val, ptr addrspace(1) %outgep, align 450 ret void51}52 53; FIXME: Need to handle non-uniform case for function below (load without gep).54define amdgpu_kernel void @v_test_imax_sge_v2i16(ptr addrspace(1) %out, ptr addrspace(1) %aptr, ptr addrspace(1) %bptr) nounwind {55; VI-LABEL: v_test_imax_sge_v2i16:56; VI: ; %bb.0:57; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2458; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x3459; VI-NEXT: v_lshlrev_b32_e32 v4, 2, v060; VI-NEXT: s_waitcnt lgkmcnt(0)61; VI-NEXT: v_mov_b32_e32 v1, s362; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v463; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc64; VI-NEXT: v_mov_b32_e32 v3, s565; VI-NEXT: v_add_u32_e32 v2, vcc, s4, v466; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc67; VI-NEXT: flat_load_dword v5, v[0:1]68; VI-NEXT: flat_load_dword v2, v[2:3]69; VI-NEXT: v_mov_b32_e32 v1, s170; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v471; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc72; VI-NEXT: s_waitcnt vmcnt(0)73; VI-NEXT: v_max_i16_e32 v3, v5, v274; VI-NEXT: v_max_i16_sdwa v2, v5, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_175; VI-NEXT: v_or_b32_e32 v2, v3, v276; VI-NEXT: flat_store_dword v[0:1], v277; VI-NEXT: s_endpgm78;79; GFX9-LABEL: v_test_imax_sge_v2i16:80; GFX9: ; %bb.0:81; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2482; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x3483; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v084; GFX9-NEXT: s_waitcnt lgkmcnt(0)85; GFX9-NEXT: global_load_dword v1, v0, s[2:3]86; GFX9-NEXT: global_load_dword v2, v0, s[6:7]87; GFX9-NEXT: s_waitcnt vmcnt(0)88; GFX9-NEXT: v_pk_max_i16 v1, v1, v289; GFX9-NEXT: global_store_dword v0, v1, s[0:1]90; GFX9-NEXT: s_endpgm91 %tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone92 %gep0 = getelementptr <2 x i16>, ptr addrspace(1) %aptr, i32 %tid93 %gep1 = getelementptr <2 x i16>, ptr addrspace(1) %bptr, i32 %tid94 %outgep = getelementptr <2 x i16>, ptr addrspace(1) %out, i32 %tid95 %a = load <2 x i16>, ptr addrspace(1) %gep0, align 496 %b = load <2 x i16>, ptr addrspace(1) %gep1, align 497 %cmp = icmp sge <2 x i16> %a, %b98 %val = select <2 x i1> %cmp, <2 x i16> %a, <2 x i16> %b99 store <2 x i16> %val, ptr addrspace(1) %outgep, align 4100 ret void101}102 103; FIXME: Need to handle non-uniform case for function below (load without gep).104define amdgpu_kernel void @v_test_imax_sge_v3i16(ptr addrspace(1) %out, ptr addrspace(1) %aptr, ptr addrspace(1) %bptr) nounwind {105; VI-LABEL: v_test_imax_sge_v3i16:106; VI: ; %bb.0:107; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24108; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34109; VI-NEXT: v_lshlrev_b32_e32 v6, 3, v0110; VI-NEXT: s_waitcnt lgkmcnt(0)111; VI-NEXT: v_mov_b32_e32 v1, s3112; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v6113; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc114; VI-NEXT: v_mov_b32_e32 v3, s5115; VI-NEXT: v_add_u32_e32 v2, vcc, s4, v6116; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc117; VI-NEXT: v_add_u32_e32 v4, vcc, 4, v0118; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v1, vcc119; VI-NEXT: flat_load_ushort v4, v[4:5]120; VI-NEXT: flat_load_dword v5, v[0:1]121; VI-NEXT: flat_load_dword v7, v[2:3]122; VI-NEXT: v_add_u32_e32 v0, vcc, 4, v2123; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v3, vcc124; VI-NEXT: flat_load_ushort v8, v[0:1]125; VI-NEXT: v_mov_b32_e32 v1, s1126; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v6127; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc128; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0129; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v1, vcc130; VI-NEXT: s_waitcnt vmcnt(1)131; VI-NEXT: v_max_i16_e32 v6, v5, v7132; VI-NEXT: v_max_i16_sdwa v5, v5, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1133; VI-NEXT: v_or_b32_e32 v5, v6, v5134; VI-NEXT: s_waitcnt vmcnt(0)135; VI-NEXT: v_max_i16_e32 v4, v4, v8136; VI-NEXT: flat_store_short v[2:3], v4137; VI-NEXT: flat_store_dword v[0:1], v5138; VI-NEXT: s_endpgm139;140; GFX9-LABEL: v_test_imax_sge_v3i16:141; GFX9: ; %bb.0:142; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24143; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34144; GFX9-NEXT: v_lshlrev_b32_e32 v0, 3, v0145; GFX9-NEXT: v_mov_b32_e32 v1, 0146; GFX9-NEXT: v_mov_b32_e32 v2, 0147; GFX9-NEXT: s_waitcnt lgkmcnt(0)148; GFX9-NEXT: global_load_short_d16 v2, v0, s[2:3] offset:4149; GFX9-NEXT: s_nop 0150; GFX9-NEXT: global_load_dword v3, v0, s[6:7]151; GFX9-NEXT: global_load_dword v4, v0, s[2:3]152; GFX9-NEXT: ; kill: killed $sgpr2_sgpr3153; GFX9-NEXT: s_nop 0154; GFX9-NEXT: global_load_short_d16 v1, v0, s[6:7] offset:4155; GFX9-NEXT: s_waitcnt vmcnt(1)156; GFX9-NEXT: v_pk_max_i16 v3, v4, v3157; GFX9-NEXT: s_waitcnt vmcnt(0)158; GFX9-NEXT: v_pk_max_i16 v1, v2, v1159; GFX9-NEXT: global_store_short v0, v1, s[0:1] offset:4160; GFX9-NEXT: global_store_dword v0, v3, s[0:1]161; GFX9-NEXT: s_endpgm162 %tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone163 %gep0 = getelementptr <3 x i16>, ptr addrspace(1) %aptr, i32 %tid164 %gep1 = getelementptr <3 x i16>, ptr addrspace(1) %bptr, i32 %tid165 %outgep = getelementptr <3 x i16>, ptr addrspace(1) %out, i32 %tid166 %a = load <3 x i16>, ptr addrspace(1) %gep0, align 4167 %b = load <3 x i16>, ptr addrspace(1) %gep1, align 4168 %cmp = icmp sge <3 x i16> %a, %b169 %val = select <3 x i1> %cmp, <3 x i16> %a, <3 x i16> %b170 store <3 x i16> %val, ptr addrspace(1) %outgep, align 4171 ret void172}173 174; FIXME: Need to handle non-uniform case for function below (load without gep).175define amdgpu_kernel void @v_test_imax_sge_v4i16(ptr addrspace(1) %out, ptr addrspace(1) %aptr, ptr addrspace(1) %bptr) nounwind {176; VI-LABEL: v_test_imax_sge_v4i16:177; VI: ; %bb.0:178; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24179; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34180; VI-NEXT: v_lshlrev_b32_e32 v4, 3, v0181; VI-NEXT: s_waitcnt lgkmcnt(0)182; VI-NEXT: v_mov_b32_e32 v1, s3183; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v4184; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc185; VI-NEXT: v_mov_b32_e32 v3, s5186; VI-NEXT: v_add_u32_e32 v2, vcc, s4, v4187; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc188; VI-NEXT: flat_load_dwordx2 v[0:1], v[0:1]189; VI-NEXT: flat_load_dwordx2 v[2:3], v[2:3]190; VI-NEXT: v_mov_b32_e32 v5, s1191; VI-NEXT: v_add_u32_e32 v4, vcc, s0, v4192; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc193; VI-NEXT: s_waitcnt vmcnt(0)194; VI-NEXT: v_max_i16_e32 v6, v1, v3195; VI-NEXT: v_max_i16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1196; VI-NEXT: v_max_i16_e32 v3, v0, v2197; VI-NEXT: v_max_i16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1198; VI-NEXT: v_or_b32_e32 v1, v6, v1199; VI-NEXT: v_or_b32_e32 v0, v3, v0200; VI-NEXT: flat_store_dwordx2 v[4:5], v[0:1]201; VI-NEXT: s_endpgm202;203; GFX9-LABEL: v_test_imax_sge_v4i16:204; GFX9: ; %bb.0:205; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24206; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34207; GFX9-NEXT: v_lshlrev_b32_e32 v4, 3, v0208; GFX9-NEXT: s_waitcnt lgkmcnt(0)209; GFX9-NEXT: global_load_dwordx2 v[0:1], v4, s[2:3]210; GFX9-NEXT: global_load_dwordx2 v[2:3], v4, s[6:7]211; GFX9-NEXT: s_waitcnt vmcnt(0)212; GFX9-NEXT: v_pk_max_i16 v1, v1, v3213; GFX9-NEXT: v_pk_max_i16 v0, v0, v2214; GFX9-NEXT: global_store_dwordx2 v4, v[0:1], s[0:1]215; GFX9-NEXT: s_endpgm216 %tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone217 %gep0 = getelementptr <4 x i16>, ptr addrspace(1) %aptr, i32 %tid218 %gep1 = getelementptr <4 x i16>, ptr addrspace(1) %bptr, i32 %tid219 %outgep = getelementptr <4 x i16>, ptr addrspace(1) %out, i32 %tid220 %a = load <4 x i16>, ptr addrspace(1) %gep0, align 4221 %b = load <4 x i16>, ptr addrspace(1) %gep1, align 4222 %cmp = icmp sge <4 x i16> %a, %b223 %val = select <4 x i1> %cmp, <4 x i16> %a, <4 x i16> %b224 store <4 x i16> %val, ptr addrspace(1) %outgep, align 4225 ret void226}227 228; FIXME: Need to handle non-uniform case for function below (load without gep).229define amdgpu_kernel void @v_test_imax_sgt_i16(ptr addrspace(1) %out, ptr addrspace(1) %aptr, ptr addrspace(1) %bptr) nounwind {230; VI-LABEL: v_test_imax_sgt_i16:231; VI: ; %bb.0:232; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24233; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34234; VI-NEXT: v_lshlrev_b32_e32 v4, 1, v0235; VI-NEXT: s_waitcnt lgkmcnt(0)236; VI-NEXT: v_mov_b32_e32 v1, s3237; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v4238; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc239; VI-NEXT: v_mov_b32_e32 v3, s5240; VI-NEXT: v_add_u32_e32 v2, vcc, s4, v4241; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc242; VI-NEXT: flat_load_ushort v5, v[0:1]243; VI-NEXT: flat_load_ushort v2, v[2:3]244; VI-NEXT: v_mov_b32_e32 v1, s1245; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v4246; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc247; VI-NEXT: s_waitcnt vmcnt(0)248; VI-NEXT: v_max_i16_e32 v2, v5, v2249; VI-NEXT: flat_store_short v[0:1], v2250; VI-NEXT: s_endpgm251;252; GFX9-LABEL: v_test_imax_sgt_i16:253; GFX9: ; %bb.0:254; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24255; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34256; GFX9-NEXT: v_lshlrev_b32_e32 v0, 1, v0257; GFX9-NEXT: s_waitcnt lgkmcnt(0)258; GFX9-NEXT: global_load_ushort v1, v0, s[2:3]259; GFX9-NEXT: global_load_ushort v2, v0, s[6:7]260; GFX9-NEXT: s_waitcnt vmcnt(0)261; GFX9-NEXT: v_max_i16_e32 v1, v1, v2262; GFX9-NEXT: global_store_short v0, v1, s[0:1]263; GFX9-NEXT: s_endpgm264 %tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone265 %gep0 = getelementptr i16, ptr addrspace(1) %aptr, i32 %tid266 %gep1 = getelementptr i16, ptr addrspace(1) %bptr, i32 %tid267 %outgep = getelementptr i16, ptr addrspace(1) %out, i32 %tid268 %a = load i16, ptr addrspace(1) %gep0, align 4269 %b = load i16, ptr addrspace(1) %gep1, align 4270 %cmp = icmp sgt i16 %a, %b271 %val = select i1 %cmp, i16 %a, i16 %b272 store i16 %val, ptr addrspace(1) %outgep, align 4273 ret void274}275 276; FIXME: Need to handle non-uniform case for function below (load without gep).277define amdgpu_kernel void @v_test_umax_uge_i16(ptr addrspace(1) %out, ptr addrspace(1) %aptr, ptr addrspace(1) %bptr) nounwind {278; VI-LABEL: v_test_umax_uge_i16:279; VI: ; %bb.0:280; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24281; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34282; VI-NEXT: v_lshlrev_b32_e32 v4, 1, v0283; VI-NEXT: s_waitcnt lgkmcnt(0)284; VI-NEXT: v_mov_b32_e32 v1, s3285; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v4286; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc287; VI-NEXT: v_mov_b32_e32 v3, s5288; VI-NEXT: v_add_u32_e32 v2, vcc, s4, v4289; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc290; VI-NEXT: flat_load_ushort v5, v[0:1]291; VI-NEXT: flat_load_ushort v2, v[2:3]292; VI-NEXT: v_mov_b32_e32 v1, s1293; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v4294; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc295; VI-NEXT: s_waitcnt vmcnt(0)296; VI-NEXT: v_max_u16_e32 v2, v5, v2297; VI-NEXT: flat_store_short v[0:1], v2298; VI-NEXT: s_endpgm299;300; GFX9-LABEL: v_test_umax_uge_i16:301; GFX9: ; %bb.0:302; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24303; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34304; GFX9-NEXT: v_lshlrev_b32_e32 v0, 1, v0305; GFX9-NEXT: s_waitcnt lgkmcnt(0)306; GFX9-NEXT: global_load_ushort v1, v0, s[2:3]307; GFX9-NEXT: global_load_ushort v2, v0, s[6:7]308; GFX9-NEXT: s_waitcnt vmcnt(0)309; GFX9-NEXT: v_max_u16_e32 v1, v1, v2310; GFX9-NEXT: global_store_short v0, v1, s[0:1]311; GFX9-NEXT: s_endpgm312 %tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone313 %gep0 = getelementptr i16, ptr addrspace(1) %aptr, i32 %tid314 %gep1 = getelementptr i16, ptr addrspace(1) %bptr, i32 %tid315 %outgep = getelementptr i16, ptr addrspace(1) %out, i32 %tid316 %a = load i16, ptr addrspace(1) %gep0, align 4317 %b = load i16, ptr addrspace(1) %gep1, align 4318 %cmp = icmp uge i16 %a, %b319 %val = select i1 %cmp, i16 %a, i16 %b320 store i16 %val, ptr addrspace(1) %outgep, align 4321 ret void322}323 324; FIXME: Need to handle non-uniform case for function below (load without gep).325define amdgpu_kernel void @v_test_umax_ugt_i16(ptr addrspace(1) %out, ptr addrspace(1) %aptr, ptr addrspace(1) %bptr) nounwind {326; VI-LABEL: v_test_umax_ugt_i16:327; VI: ; %bb.0:328; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24329; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34330; VI-NEXT: v_lshlrev_b32_e32 v4, 1, v0331; VI-NEXT: s_waitcnt lgkmcnt(0)332; VI-NEXT: v_mov_b32_e32 v1, s3333; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v4334; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc335; VI-NEXT: v_mov_b32_e32 v3, s5336; VI-NEXT: v_add_u32_e32 v2, vcc, s4, v4337; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc338; VI-NEXT: flat_load_ushort v5, v[0:1]339; VI-NEXT: flat_load_ushort v2, v[2:3]340; VI-NEXT: v_mov_b32_e32 v1, s1341; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v4342; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc343; VI-NEXT: s_waitcnt vmcnt(0)344; VI-NEXT: v_max_u16_e32 v2, v5, v2345; VI-NEXT: flat_store_short v[0:1], v2346; VI-NEXT: s_endpgm347;348; GFX9-LABEL: v_test_umax_ugt_i16:349; GFX9: ; %bb.0:350; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24351; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34352; GFX9-NEXT: v_lshlrev_b32_e32 v0, 1, v0353; GFX9-NEXT: s_waitcnt lgkmcnt(0)354; GFX9-NEXT: global_load_ushort v1, v0, s[2:3]355; GFX9-NEXT: global_load_ushort v2, v0, s[6:7]356; GFX9-NEXT: s_waitcnt vmcnt(0)357; GFX9-NEXT: v_max_u16_e32 v1, v1, v2358; GFX9-NEXT: global_store_short v0, v1, s[0:1]359; GFX9-NEXT: s_endpgm360 %tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone361 %gep0 = getelementptr i16, ptr addrspace(1) %aptr, i32 %tid362 %gep1 = getelementptr i16, ptr addrspace(1) %bptr, i32 %tid363 %outgep = getelementptr i16, ptr addrspace(1) %out, i32 %tid364 %a = load i16, ptr addrspace(1) %gep0, align 4365 %b = load i16, ptr addrspace(1) %gep1, align 4366 %cmp = icmp ugt i16 %a, %b367 %val = select i1 %cmp, i16 %a, i16 %b368 store i16 %val, ptr addrspace(1) %outgep, align 4369 ret void370}371 372define amdgpu_kernel void @v_test_umax_ugt_v2i16(ptr addrspace(1) %out, ptr addrspace(1) %aptr, ptr addrspace(1) %bptr) nounwind {373; VI-LABEL: v_test_umax_ugt_v2i16:374; VI: ; %bb.0:375; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24376; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34377; VI-NEXT: v_lshlrev_b32_e32 v4, 2, v0378; VI-NEXT: s_waitcnt lgkmcnt(0)379; VI-NEXT: v_mov_b32_e32 v1, s3380; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v4381; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc382; VI-NEXT: v_mov_b32_e32 v3, s5383; VI-NEXT: v_add_u32_e32 v2, vcc, s4, v4384; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc385; VI-NEXT: flat_load_dword v5, v[0:1]386; VI-NEXT: flat_load_dword v2, v[2:3]387; VI-NEXT: v_mov_b32_e32 v1, s1388; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v4389; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc390; VI-NEXT: s_waitcnt vmcnt(0)391; VI-NEXT: v_max_u16_e32 v3, v5, v2392; VI-NEXT: v_max_u16_sdwa v2, v5, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1393; VI-NEXT: v_or_b32_e32 v2, v3, v2394; VI-NEXT: flat_store_dword v[0:1], v2395; VI-NEXT: s_endpgm396;397; GFX9-LABEL: v_test_umax_ugt_v2i16:398; GFX9: ; %bb.0:399; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24400; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34401; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0402; GFX9-NEXT: s_waitcnt lgkmcnt(0)403; GFX9-NEXT: global_load_dword v1, v0, s[2:3]404; GFX9-NEXT: global_load_dword v2, v0, s[6:7]405; GFX9-NEXT: s_waitcnt vmcnt(0)406; GFX9-NEXT: v_pk_max_u16 v1, v1, v2407; GFX9-NEXT: global_store_dword v0, v1, s[0:1]408; GFX9-NEXT: s_endpgm409 %tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone410 %gep0 = getelementptr <2 x i16>, ptr addrspace(1) %aptr, i32 %tid411 %gep1 = getelementptr <2 x i16>, ptr addrspace(1) %bptr, i32 %tid412 %outgep = getelementptr <2 x i16>, ptr addrspace(1) %out, i32 %tid413 %a = load <2 x i16>, ptr addrspace(1) %gep0, align 4414 %b = load <2 x i16>, ptr addrspace(1) %gep1, align 4415 %cmp = icmp ugt <2 x i16> %a, %b416 %val = select <2 x i1> %cmp, <2 x i16> %a, <2 x i16> %b417 store <2 x i16> %val, ptr addrspace(1) %outgep, align 4418 ret void419}420 421declare i32 @llvm.amdgcn.workitem.id.x() nounwind readnone422