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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck %s -check-prefix=MUBUF3; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -mattr=+enable-flat-scratch < %s | FileCheck %s -check-prefix=FLATSCR4 5; Make sure there's no assertion from passing a 0 alignment value6define void @memcpy_fixed_align(ptr addrspace(5) %dst, ptr addrspace(1) %src) {7; MUBUF-LABEL: memcpy_fixed_align:8; MUBUF: ; %bb.0:9; MUBUF-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10; MUBUF-NEXT: global_load_dwordx4 v[3:6], v[1:2], off11; MUBUF-NEXT: global_load_dwordx4 v[7:10], v[1:2], off offset:1612; MUBUF-NEXT: global_load_dwordx4 v[11:14], v[1:2], off offset:2413; MUBUF-NEXT: s_lshr_b32 s4, s32, 614; MUBUF-NEXT: s_waitcnt vmcnt(2)15; MUBUF-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:1216; MUBUF-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:817; MUBUF-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:418; MUBUF-NEXT: buffer_store_dword v3, off, s[0:3], s3219; MUBUF-NEXT: s_waitcnt vmcnt(5)20; MUBUF-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:2821; MUBUF-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:2422; MUBUF-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:2023; MUBUF-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:1624; MUBUF-NEXT: s_waitcnt vmcnt(8)25; MUBUF-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:3626; MUBUF-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:3227; MUBUF-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:2828; MUBUF-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:2429; MUBUF-NEXT: ;;#ASMSTART30; MUBUF-NEXT: ; use s431; MUBUF-NEXT: ;;#ASMEND32; MUBUF-NEXT: s_waitcnt vmcnt(0)33; MUBUF-NEXT: s_setpc_b64 s[30:31]34;35; FLATSCR-LABEL: memcpy_fixed_align:36; FLATSCR: ; %bb.0:37; FLATSCR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)38; FLATSCR-NEXT: global_load_dwordx4 v[3:6], v[1:2], off39; FLATSCR-NEXT: global_load_dwordx4 v[7:10], v[1:2], off offset:1640; FLATSCR-NEXT: global_load_dwordx4 v[11:14], v[1:2], off offset:2441; FLATSCR-NEXT: s_mov_b32 s0, s3242; FLATSCR-NEXT: s_waitcnt vmcnt(2)43; FLATSCR-NEXT: scratch_store_dwordx4 off, v[3:6], s3244; FLATSCR-NEXT: s_waitcnt vmcnt(2)45; FLATSCR-NEXT: scratch_store_dwordx4 off, v[7:10], s32 offset:1646; FLATSCR-NEXT: s_waitcnt vmcnt(2)47; FLATSCR-NEXT: scratch_store_dwordx4 off, v[11:14], s32 offset:2448; FLATSCR-NEXT: ;;#ASMSTART49; FLATSCR-NEXT: ; use s050; FLATSCR-NEXT: ;;#ASMEND51; FLATSCR-NEXT: s_waitcnt vmcnt(0)52; FLATSCR-NEXT: s_setpc_b64 s[30:31]53 %alloca = alloca [40 x i8], addrspace(5)54 call void @llvm.memcpy.p5.p1.i64(ptr addrspace(5) align 4 dereferenceable(40) %alloca, ptr addrspace(1) align 4 dereferenceable(40) %src, i64 40, i1 false)55 call void asm sideeffect "; use $0", "s"(ptr addrspace(5) %alloca) #056 ret void57}58 59declare void @llvm.memcpy.p5.p1.i64(ptr addrspace(5) noalias nocapture writeonly, ptr addrspace(1) noalias nocapture readonly, i64, i1 immarg) #060 61attributes #0 = { argmemonly nounwind willreturn }62