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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52 3; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1030 %s -o - | FileCheck %s4 5; Testing codegen for memmove with scalar reads.6 7 8define void @memmove_p1_p4_sz16_align_4_4(ptr addrspace(1) align 4 %dst, ptr addrspace(4) align 4 readonly inreg %src) {9; CHECK-LABEL: memmove_p1_p4_sz16_align_4_4:10; CHECK: ; %bb.0: ; %entry11; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12; CHECK-NEXT: s_load_dwordx4 s[4:7], s[16:17], 0x013; CHECK-NEXT: s_waitcnt lgkmcnt(0)14; CHECK-NEXT: v_mov_b32_e32 v2, s415; CHECK-NEXT: v_mov_b32_e32 v3, s516; CHECK-NEXT: v_mov_b32_e32 v4, s617; CHECK-NEXT: v_mov_b32_e32 v5, s718; CHECK-NEXT: global_store_dwordx4 v[0:1], v[2:5], off19; CHECK-NEXT: s_setpc_b64 s[30:31]20entry:21 tail call void @llvm.memmove.p1.p4.i64(ptr addrspace(1) noundef nonnull align 4 %dst, ptr addrspace(4) noundef nonnull align 4 %src, i64 16, i1 false)22 ret void23}24 25define void @memmove_p1_p4_sz31_align_4_4(ptr addrspace(1) align 4 %dst, ptr addrspace(4) align 4 readonly inreg %src) {26; CHECK-LABEL: memmove_p1_p4_sz31_align_4_4:27; CHECK: ; %bb.0: ; %entry28; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)29; CHECK-NEXT: v_mov_b32_e32 v2, 030; CHECK-NEXT: s_load_dwordx8 s[4:11], s[16:17], 0x031; CHECK-NEXT: global_load_ubyte v9, v2, s[16:17] offset:3032; CHECK-NEXT: s_waitcnt lgkmcnt(0)33; CHECK-NEXT: v_mov_b32_e32 v2, s434; CHECK-NEXT: v_mov_b32_e32 v3, s535; CHECK-NEXT: v_mov_b32_e32 v4, s636; CHECK-NEXT: v_mov_b32_e32 v5, s737; CHECK-NEXT: v_mov_b32_e32 v10, s1138; CHECK-NEXT: v_mov_b32_e32 v6, s839; CHECK-NEXT: v_mov_b32_e32 v7, s940; CHECK-NEXT: v_mov_b32_e32 v8, s1041; CHECK-NEXT: global_store_dwordx4 v[0:1], v[2:5], off42; CHECK-NEXT: global_store_short v[0:1], v10, off offset:2843; CHECK-NEXT: s_waitcnt vmcnt(0)44; CHECK-NEXT: global_store_byte v[0:1], v9, off offset:3045; CHECK-NEXT: global_store_dwordx3 v[0:1], v[6:8], off offset:1646; CHECK-NEXT: s_setpc_b64 s[30:31]47entry:48 tail call void @llvm.memmove.p1.p4.i64(ptr addrspace(1) noundef nonnull align 4 %dst, ptr addrspace(4) noundef nonnull align 4 %src, i64 31, i1 false)49 ret void50}51 52define void @memmove_p1_p4_sz32_align_4_4(ptr addrspace(1) align 4 %dst, ptr addrspace(4) align 4 readonly inreg %src) {53; CHECK-LABEL: memmove_p1_p4_sz32_align_4_4:54; CHECK: ; %bb.0: ; %entry55; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)56; CHECK-NEXT: s_load_dwordx8 s[4:11], s[16:17], 0x057; CHECK-NEXT: s_waitcnt lgkmcnt(0)58; CHECK-NEXT: v_mov_b32_e32 v2, s859; CHECK-NEXT: v_mov_b32_e32 v3, s960; CHECK-NEXT: v_mov_b32_e32 v4, s1061; CHECK-NEXT: v_mov_b32_e32 v5, s1162; CHECK-NEXT: v_mov_b32_e32 v9, s763; CHECK-NEXT: v_mov_b32_e32 v8, s664; CHECK-NEXT: v_mov_b32_e32 v7, s565; CHECK-NEXT: v_mov_b32_e32 v6, s466; CHECK-NEXT: global_store_dwordx4 v[0:1], v[2:5], off offset:1667; CHECK-NEXT: global_store_dwordx4 v[0:1], v[6:9], off68; CHECK-NEXT: s_setpc_b64 s[30:31]69entry:70 tail call void @llvm.memmove.p1.p4.i64(ptr addrspace(1) noundef nonnull align 4 %dst, ptr addrspace(4) noundef nonnull align 4 %src, i64 32, i1 false)71 ret void72}73 74declare void @llvm.memmove.p1.p4.i64(ptr addrspace(1) nocapture writeonly, ptr addrspace(4) nocapture readonly, i64, i1 immarg) #275 76attributes #0 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }77 78