163 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1200 < %s | FileCheck --check-prefix=GFX12 %s3; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1200 -mattr=+cumode < %s | FileCheck --check-prefix=GFX12 %s4; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1250 < %s | FileCheck --check-prefixes=GFX1250 %s5 6define amdgpu_kernel void @flat_last_use_load_0(ptr %in, ptr %out) {7; GFX12-LABEL: flat_last_use_load_0:8; GFX12: ; %bb.0: ; %entry9; GFX12-NEXT: s_load_b64 s[2:3], s[4:5], 0x010; GFX12-NEXT: s_load_b64 s[0:1], s[4:5], 0x811; GFX12-NEXT: s_wait_kmcnt 0x012; GFX12-NEXT: v_mov_b32_e32 v0, s213; GFX12-NEXT: v_mov_b32_e32 v1, s314; GFX12-NEXT: flat_load_b32 v2, v[0:1] th:TH_LOAD_LU15; GFX12-NEXT: v_mov_b32_e32 v0, s016; GFX12-NEXT: v_mov_b32_e32 v1, s117; GFX12-NEXT: s_wait_loadcnt_dscnt 0x018; GFX12-NEXT: flat_store_b32 v[0:1], v219; GFX12-NEXT: s_endpgm20;21; GFX1250-LABEL: flat_last_use_load_0:22; GFX1250: ; %bb.0: ; %entry23; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 124; GFX1250-NEXT: v_mov_b32_e32 v0, 025; GFX1250-NEXT: s_load_b64 s[2:3], s[4:5], 0x026; GFX1250-NEXT: s_load_b64 s[0:1], s[4:5], 0x827; GFX1250-NEXT: s_wait_kmcnt 0x028; GFX1250-NEXT: flat_load_b32 v1, v0, s[2:3] th:TH_LOAD_LU29; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x030; GFX1250-NEXT: flat_store_b32 v0, v1, s[0:1]31; GFX1250-NEXT: s_endpgm32entry:33 %val = load i32, ptr %in, align 4, !amdgpu.last.use !{}34 store i32 %val, ptr %out35 ret void36}37 38define amdgpu_kernel void @flat_last_use_load_1(ptr %in, ptr %out) {39; GFX12-LABEL: flat_last_use_load_1:40; GFX12: ; %bb.0: ; %entry41; GFX12-NEXT: s_mov_b64 s[0:1], s[4:5]42; GFX12-NEXT: s_load_b64 s[4:5], s[0:1], 0x043; GFX12-NEXT: s_load_b64 s[0:1], s[0:1], 0x844; GFX12-NEXT: s_mov_b32 s2, 0x3ff45; GFX12-NEXT: v_and_b32_e64 v0, v0, s246; GFX12-NEXT: s_mov_b32 s2, 247; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)48; GFX12-NEXT: v_lshlrev_b32_e64 v1, s2, v049; GFX12-NEXT: v_mov_b32_e32 v0, 050; GFX12-NEXT: ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec51; GFX12-NEXT: v_mov_b32_e32 v2, v052; GFX12-NEXT: s_wait_kmcnt 0x053; GFX12-NEXT: s_mov_b32 s3, s454; GFX12-NEXT: v_mov_b32_e32 v0, v155; GFX12-NEXT: s_mov_b32 s2, s556; GFX12-NEXT: v_mov_b32_e32 v1, v257; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)58; GFX12-NEXT: v_add_co_u32 v0, s3, s3, v059; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)60; GFX12-NEXT: v_add_co_ci_u32_e64 v2, s2, s2, v1, s361; GFX12-NEXT: ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec62; GFX12-NEXT: v_mov_b32_e32 v1, v263; GFX12-NEXT: flat_load_b32 v2, v[0:1] th:TH_LOAD_LU64; GFX12-NEXT: v_mov_b32_e32 v0, s065; GFX12-NEXT: v_mov_b32_e32 v1, s166; GFX12-NEXT: s_wait_loadcnt_dscnt 0x067; GFX12-NEXT: flat_store_b32 v[0:1], v268; GFX12-NEXT: s_endpgm69;70; GFX1250-LABEL: flat_last_use_load_1:71; GFX1250: ; %bb.0: ; %entry72; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 173; GFX1250-NEXT: v_mov_b32_e32 v1, v074; GFX1250-NEXT: s_load_b64 s[2:3], s[4:5], 0x075; GFX1250-NEXT: s_load_b64 s[0:1], s[4:5], 0x876; GFX1250-NEXT: v_mov_b32_e32 v0, 077; GFX1250-NEXT: s_wait_xcnt 0x078; GFX1250-NEXT: s_mov_b32 s4, 0x3ff79; GFX1250-NEXT: v_and_b32_e64 v1, v1, s480; GFX1250-NEXT: s_wait_kmcnt 0x081; GFX1250-NEXT: flat_load_b32 v1, v1, s[2:3] scale_offset th:TH_LOAD_LU82; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x083; GFX1250-NEXT: flat_store_b32 v0, v1, s[0:1]84; GFX1250-NEXT: s_endpgm85entry:86 %tid = call i32 @llvm.amdgcn.workitem.id.x()87 %val.gep = getelementptr inbounds i32, ptr %in, i32 %tid88 %val = load i32, ptr %val.gep, align 4, !amdgpu.last.use !{}89 store i32 %val, ptr %out90 ret void91}92 93define amdgpu_kernel void @flat_last_use_and_volatile_load(ptr %in, ptr %out) {94; GFX12-LABEL: flat_last_use_and_volatile_load:95; GFX12: ; %bb.0: ; %entry96; GFX12-NEXT: s_load_b64 s[2:3], s[4:5], 0x097; GFX12-NEXT: s_load_b64 s[0:1], s[4:5], 0x898; GFX12-NEXT: s_wait_kmcnt 0x099; GFX12-NEXT: v_mov_b32_e32 v0, s2100; GFX12-NEXT: v_mov_b32_e32 v1, s3101; GFX12-NEXT: flat_load_b32 v2, v[0:1] th:TH_LOAD_BYPASS scope:SCOPE_SYS102; GFX12-NEXT: s_wait_bvhcnt 0x0103; GFX12-NEXT: s_wait_samplecnt 0x0104; GFX12-NEXT: s_wait_loadcnt 0x0105; GFX12-NEXT: v_mov_b32_e32 v0, s0106; GFX12-NEXT: v_mov_b32_e32 v1, s1107; GFX12-NEXT: s_wait_dscnt 0x0108; GFX12-NEXT: flat_store_b32 v[0:1], v2109; GFX12-NEXT: s_endpgm110;111; GFX1250-LABEL: flat_last_use_and_volatile_load:112; GFX1250: ; %bb.0: ; %entry113; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1114; GFX1250-NEXT: v_mov_b32_e32 v0, 0115; GFX1250-NEXT: s_load_b64 s[2:3], s[4:5], 0x0116; GFX1250-NEXT: s_load_b64 s[0:1], s[4:5], 0x8117; GFX1250-NEXT: s_wait_xcnt 0x0118; GFX1250-NEXT: s_wait_kmcnt 0x0119; GFX1250-NEXT: flat_load_b32 v1, v0, s[2:3] th:TH_LOAD_BYPASS scope:SCOPE_SYS120; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0121; GFX1250-NEXT: flat_store_b32 v0, v1, s[0:1]122; GFX1250-NEXT: s_endpgm123entry:124 %val = load volatile i32, ptr %in, align 4, !amdgpu.last.use !{}125 store i32 %val, ptr %out126 ret void127}128 129define amdgpu_kernel void @flat_last_use_and_nontemporal_load(ptr %in, ptr %out) {130; GFX12-LABEL: flat_last_use_and_nontemporal_load:131; GFX12: ; %bb.0: ; %entry132; GFX12-NEXT: s_load_b64 s[2:3], s[4:5], 0x0133; GFX12-NEXT: s_load_b64 s[0:1], s[4:5], 0x8134; GFX12-NEXT: s_wait_kmcnt 0x0135; GFX12-NEXT: v_mov_b32_e32 v0, s2136; GFX12-NEXT: v_mov_b32_e32 v1, s3137; GFX12-NEXT: flat_load_b32 v2, v[0:1] th:TH_LOAD_LU138; GFX12-NEXT: v_mov_b32_e32 v0, s0139; GFX12-NEXT: v_mov_b32_e32 v1, s1140; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0141; GFX12-NEXT: flat_store_b32 v[0:1], v2142; GFX12-NEXT: s_endpgm143;144; GFX1250-LABEL: flat_last_use_and_nontemporal_load:145; GFX1250: ; %bb.0: ; %entry146; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1147; GFX1250-NEXT: v_mov_b32_e32 v0, 0148; GFX1250-NEXT: s_load_b64 s[2:3], s[4:5], 0x0149; GFX1250-NEXT: s_load_b64 s[0:1], s[4:5], 0x8150; GFX1250-NEXT: s_wait_kmcnt 0x0151; GFX1250-NEXT: flat_load_b32 v1, v0, s[2:3] th:TH_LOAD_LU152; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0153; GFX1250-NEXT: flat_store_b32 v0, v1, s[0:1]154; GFX1250-NEXT: s_endpgm155entry:156 %val = load i32, ptr %in, align 4, !amdgpu.last.use !{}, !nontemporal !0157 store i32 %val, ptr %out158 ret void159}160 161!0 = !{i32 1}162declare i32 @llvm.amdgcn.workitem.id.x()163