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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tahiti -amdgpu-load-store-vectorizer=0 < %s | FileCheck -check-prefixes=GCN,SI %s3; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=bonaire -amdgpu-load-store-vectorizer=0 < %s | FileCheck -check-prefixes=GCN,CI %s4 5; This test is mostly to test DAG store merging, so disable the vectorizer.6; Run with devices with different unaligned load restrictions.7 8; TODO: Vector element tests9; TODO: Non-zero base offset for load and store combinations10; TODO: Same base addrspacecasted11 12define amdgpu_kernel void @merge_global_store_2_constants_i8(ptr addrspace(1) %out) #0 {13; GCN-LABEL: merge_global_store_2_constants_i8:14; GCN: ; %bb.0:15; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x916; GCN-NEXT: s_mov_b32 s3, 0xf00017; GCN-NEXT: s_mov_b32 s2, -118; GCN-NEXT: v_mov_b32_e32 v0, 0x7bc819; GCN-NEXT: s_waitcnt lgkmcnt(0)20; GCN-NEXT: buffer_store_short v0, off, s[0:3], 021; GCN-NEXT: s_endpgm22 %out.gep.1 = getelementptr i8, ptr addrspace(1) %out, i32 123 24 store i8 123, ptr addrspace(1) %out.gep.125 store i8 456, ptr addrspace(1) %out, align 226 ret void27}28 29define amdgpu_kernel void @merge_global_store_2_constants_i8_natural_align(ptr addrspace(1) %out) #0 {30; GCN-LABEL: merge_global_store_2_constants_i8_natural_align:31; GCN: ; %bb.0:32; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x933; GCN-NEXT: s_mov_b32 s3, 0xf00034; GCN-NEXT: s_mov_b32 s2, -135; GCN-NEXT: v_mov_b32_e32 v0, 0x7b36; GCN-NEXT: v_mov_b32_e32 v1, 0xc837; GCN-NEXT: s_waitcnt lgkmcnt(0)38; GCN-NEXT: buffer_store_byte v0, off, s[0:3], 0 offset:139; GCN-NEXT: buffer_store_byte v1, off, s[0:3], 040; GCN-NEXT: s_endpgm41 %out.gep.1 = getelementptr i8, ptr addrspace(1) %out, i32 142 43 store i8 123, ptr addrspace(1) %out.gep.144 store i8 456, ptr addrspace(1) %out45 ret void46}47 48define amdgpu_kernel void @merge_global_store_2_constants_i16(ptr addrspace(1) %out) #0 {49; GCN-LABEL: merge_global_store_2_constants_i16:50; GCN: ; %bb.0:51; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x952; GCN-NEXT: s_mov_b32 s3, 0xf00053; GCN-NEXT: s_mov_b32 s2, -154; GCN-NEXT: v_mov_b32_e32 v0, 0x7b01c855; GCN-NEXT: s_waitcnt lgkmcnt(0)56; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 057; GCN-NEXT: s_endpgm58 %out.gep.1 = getelementptr i16, ptr addrspace(1) %out, i32 159 60 store i16 123, ptr addrspace(1) %out.gep.161 store i16 456, ptr addrspace(1) %out, align 462 ret void63}64 65define amdgpu_kernel void @merge_global_store_2_constants_0_i16(ptr addrspace(1) %out) #0 {66; GCN-LABEL: merge_global_store_2_constants_0_i16:67; GCN: ; %bb.0:68; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x969; GCN-NEXT: s_mov_b32 s3, 0xf00070; GCN-NEXT: s_mov_b32 s2, -171; GCN-NEXT: v_mov_b32_e32 v0, 072; GCN-NEXT: s_waitcnt lgkmcnt(0)73; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 074; GCN-NEXT: s_endpgm75 %out.gep.1 = getelementptr i16, ptr addrspace(1) %out, i32 176 77 store i16 0, ptr addrspace(1) %out.gep.178 store i16 0, ptr addrspace(1) %out, align 479 ret void80}81 82define amdgpu_kernel void @merge_global_store_2_constants_i16_natural_align(ptr addrspace(1) %out) #0 {83; GCN-LABEL: merge_global_store_2_constants_i16_natural_align:84; GCN: ; %bb.0:85; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x986; GCN-NEXT: s_mov_b32 s3, 0xf00087; GCN-NEXT: s_mov_b32 s2, -188; GCN-NEXT: v_mov_b32_e32 v0, 0x7b89; GCN-NEXT: v_mov_b32_e32 v1, 0x1c890; GCN-NEXT: s_waitcnt lgkmcnt(0)91; GCN-NEXT: buffer_store_short v0, off, s[0:3], 0 offset:292; GCN-NEXT: buffer_store_short v1, off, s[0:3], 093; GCN-NEXT: s_endpgm94 %out.gep.1 = getelementptr i16, ptr addrspace(1) %out, i32 195 96 store i16 123, ptr addrspace(1) %out.gep.197 store i16 456, ptr addrspace(1) %out98 ret void99}100 101define amdgpu_kernel void @merge_global_store_2_constants_i32(ptr addrspace(1) %out) #0 {102; GCN-LABEL: merge_global_store_2_constants_i32:103; GCN: ; %bb.0:104; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9105; GCN-NEXT: s_mov_b32 s3, 0xf000106; GCN-NEXT: s_mov_b32 s2, -1107; GCN-NEXT: v_mov_b32_e32 v0, 0x1c8108; GCN-NEXT: v_mov_b32_e32 v1, 0x7b109; GCN-NEXT: s_waitcnt lgkmcnt(0)110; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0111; GCN-NEXT: s_endpgm112 %out.gep.1 = getelementptr i32, ptr addrspace(1) %out, i32 1113 114 store i32 123, ptr addrspace(1) %out.gep.1115 store i32 456, ptr addrspace(1) %out116 ret void117}118 119define amdgpu_kernel void @merge_global_store_2_constants_i32_f32(ptr addrspace(1) %out) #0 {120; GCN-LABEL: merge_global_store_2_constants_i32_f32:121; GCN: ; %bb.0:122; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9123; GCN-NEXT: s_mov_b32 s3, 0xf000124; GCN-NEXT: s_mov_b32 s2, -1125; GCN-NEXT: v_mov_b32_e32 v0, 0x1c8126; GCN-NEXT: v_mov_b32_e32 v1, 1.0127; GCN-NEXT: s_waitcnt lgkmcnt(0)128; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0129; GCN-NEXT: s_endpgm130 %out.gep.1 = getelementptr i32, ptr addrspace(1) %out, i32 1131 store float 1.0, ptr addrspace(1) %out.gep.1132 store i32 456, ptr addrspace(1) %out133 ret void134}135 136define amdgpu_kernel void @merge_global_store_2_constants_f32_i32(ptr addrspace(1) %out) #0 {137; GCN-LABEL: merge_global_store_2_constants_f32_i32:138; GCN: ; %bb.0:139; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9140; GCN-NEXT: s_mov_b32 s3, 0xf000141; GCN-NEXT: s_mov_b32 s2, -1142; GCN-NEXT: v_mov_b32_e32 v0, 4.0143; GCN-NEXT: v_mov_b32_e32 v1, 0x7b144; GCN-NEXT: s_waitcnt lgkmcnt(0)145; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0146; GCN-NEXT: s_endpgm147 %out.gep.1 = getelementptr float, ptr addrspace(1) %out, i32 1148 store i32 123, ptr addrspace(1) %out.gep.1149 store float 4.0, ptr addrspace(1) %out150 ret void151}152 153define amdgpu_kernel void @merge_global_store_4_constants_i32(ptr addrspace(1) %out) #0 {154; GCN-LABEL: merge_global_store_4_constants_i32:155; GCN: ; %bb.0:156; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9157; GCN-NEXT: s_mov_b32 s3, 0xf000158; GCN-NEXT: s_mov_b32 s2, -1159; GCN-NEXT: v_mov_b32_e32 v0, 0x4d2160; GCN-NEXT: v_mov_b32_e32 v1, 0x7b161; GCN-NEXT: v_mov_b32_e32 v2, 0x1c8162; GCN-NEXT: v_mov_b32_e32 v3, 0x14d163; GCN-NEXT: s_waitcnt lgkmcnt(0)164; GCN-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0165; GCN-NEXT: s_endpgm166 %out.gep.1 = getelementptr i32, ptr addrspace(1) %out, i32 1167 %out.gep.2 = getelementptr i32, ptr addrspace(1) %out, i32 2168 %out.gep.3 = getelementptr i32, ptr addrspace(1) %out, i32 3169 170 store i32 123, ptr addrspace(1) %out.gep.1171 store i32 456, ptr addrspace(1) %out.gep.2172 store i32 333, ptr addrspace(1) %out.gep.3173 store i32 1234, ptr addrspace(1) %out174 ret void175}176 177define amdgpu_kernel void @merge_global_store_4_constants_f32_order(ptr addrspace(1) %out) #0 {178; GCN-LABEL: merge_global_store_4_constants_f32_order:179; GCN: ; %bb.0:180; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9181; GCN-NEXT: s_mov_b32 s3, 0xf000182; GCN-NEXT: s_mov_b32 s2, -1183; GCN-NEXT: v_mov_b32_e32 v0, 0x41000000184; GCN-NEXT: v_mov_b32_e32 v1, 1.0185; GCN-NEXT: v_mov_b32_e32 v2, 2.0186; GCN-NEXT: v_mov_b32_e32 v3, 4.0187; GCN-NEXT: s_waitcnt lgkmcnt(0)188; GCN-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0189; GCN-NEXT: s_endpgm190 %out.gep.1 = getelementptr float, ptr addrspace(1) %out, i32 1191 %out.gep.2 = getelementptr float, ptr addrspace(1) %out, i32 2192 %out.gep.3 = getelementptr float, ptr addrspace(1) %out, i32 3193 194 store float 8.0, ptr addrspace(1) %out195 store float 1.0, ptr addrspace(1) %out.gep.1196 store float 2.0, ptr addrspace(1) %out.gep.2197 store float 4.0, ptr addrspace(1) %out.gep.3198 ret void199}200 201; First store is out of order.202define amdgpu_kernel void @merge_global_store_4_constants_f32(ptr addrspace(1) %out) #0 {203; GCN-LABEL: merge_global_store_4_constants_f32:204; GCN: ; %bb.0:205; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9206; GCN-NEXT: s_mov_b32 s3, 0xf000207; GCN-NEXT: s_mov_b32 s2, -1208; GCN-NEXT: v_mov_b32_e32 v0, 0x41000000209; GCN-NEXT: v_mov_b32_e32 v1, 1.0210; GCN-NEXT: v_mov_b32_e32 v2, 2.0211; GCN-NEXT: v_mov_b32_e32 v3, 4.0212; GCN-NEXT: s_waitcnt lgkmcnt(0)213; GCN-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0214; GCN-NEXT: s_endpgm215 %out.gep.1 = getelementptr float, ptr addrspace(1) %out, i32 1216 %out.gep.2 = getelementptr float, ptr addrspace(1) %out, i32 2217 %out.gep.3 = getelementptr float, ptr addrspace(1) %out, i32 3218 219 store float 1.0, ptr addrspace(1) %out.gep.1220 store float 2.0, ptr addrspace(1) %out.gep.2221 store float 4.0, ptr addrspace(1) %out.gep.3222 store float 8.0, ptr addrspace(1) %out223 ret void224}225 226define amdgpu_kernel void @merge_global_store_4_constants_mixed_i32_f32(ptr addrspace(1) %out) #0 {227; GCN-LABEL: merge_global_store_4_constants_mixed_i32_f32:228; GCN: ; %bb.0:229; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9230; GCN-NEXT: s_mov_b32 s3, 0xf000231; GCN-NEXT: s_mov_b32 s2, -1232; GCN-NEXT: v_mov_b32_e32 v0, 0x41000000233; GCN-NEXT: v_mov_b32_e32 v1, 11234; GCN-NEXT: v_mov_b32_e32 v2, 2.0235; GCN-NEXT: v_mov_b32_e32 v3, 17236; GCN-NEXT: s_waitcnt lgkmcnt(0)237; GCN-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0238; GCN-NEXT: s_endpgm239 %out.gep.1 = getelementptr float, ptr addrspace(1) %out, i32 1240 %out.gep.2 = getelementptr float, ptr addrspace(1) %out, i32 2241 %out.gep.3 = getelementptr float, ptr addrspace(1) %out, i32 3242 243 244 store i32 11, ptr addrspace(1) %out.gep.1245 store float 2.0, ptr addrspace(1) %out.gep.2246 store i32 17, ptr addrspace(1) %out.gep.3247 store float 8.0, ptr addrspace(1) %out248 ret void249}250 251define amdgpu_kernel void @merge_global_store_3_constants_i32(ptr addrspace(1) %out) #0 {252; SI-LABEL: merge_global_store_3_constants_i32:253; SI: ; %bb.0:254; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9255; SI-NEXT: s_mov_b32 s3, 0xf000256; SI-NEXT: s_mov_b32 s2, -1257; SI-NEXT: v_mov_b32_e32 v1, 0x1c8258; SI-NEXT: v_mov_b32_e32 v0, 0x4d2259; SI-NEXT: s_waitcnt lgkmcnt(0)260; SI-NEXT: buffer_store_dword v1, off, s[0:3], 0 offset:8261; SI-NEXT: s_waitcnt expcnt(0)262; SI-NEXT: v_mov_b32_e32 v1, 0x7b263; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0264; SI-NEXT: s_endpgm265;266; CI-LABEL: merge_global_store_3_constants_i32:267; CI: ; %bb.0:268; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9269; CI-NEXT: s_mov_b32 s3, 0xf000270; CI-NEXT: s_mov_b32 s2, -1271; CI-NEXT: v_mov_b32_e32 v2, 0x1c8272; CI-NEXT: v_mov_b32_e32 v0, 0x4d2273; CI-NEXT: v_mov_b32_e32 v1, 0x7b274; CI-NEXT: s_waitcnt lgkmcnt(0)275; CI-NEXT: buffer_store_dwordx3 v[0:2], off, s[0:3], 0276; CI-NEXT: s_endpgm277 %out.gep.1 = getelementptr i32, ptr addrspace(1) %out, i32 1278 %out.gep.2 = getelementptr i32, ptr addrspace(1) %out, i32 2279 280 store i32 123, ptr addrspace(1) %out.gep.1281 store i32 456, ptr addrspace(1) %out.gep.2282 store i32 1234, ptr addrspace(1) %out283 ret void284}285 286define amdgpu_kernel void @merge_global_store_2_constants_i64(ptr addrspace(1) %out) #0 {287; GCN-LABEL: merge_global_store_2_constants_i64:288; GCN: ; %bb.0:289; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9290; GCN-NEXT: v_mov_b32_e32 v1, 0291; GCN-NEXT: s_mov_b32 s3, 0xf000292; GCN-NEXT: s_mov_b32 s2, -1293; GCN-NEXT: v_mov_b32_e32 v0, 0x1c8294; GCN-NEXT: v_mov_b32_e32 v2, 0x7b295; GCN-NEXT: v_mov_b32_e32 v3, v1296; GCN-NEXT: s_waitcnt lgkmcnt(0)297; GCN-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0298; GCN-NEXT: s_endpgm299 %out.gep.1 = getelementptr i64, ptr addrspace(1) %out, i64 1300 301 store i64 123, ptr addrspace(1) %out.gep.1302 store i64 456, ptr addrspace(1) %out303 ret void304}305 306define amdgpu_kernel void @merge_global_store_4_constants_i64(ptr addrspace(1) %out) #0 {307; SI-LABEL: merge_global_store_4_constants_i64:308; SI: ; %bb.0:309; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9310; SI-NEXT: v_mov_b32_e32 v1, 0311; SI-NEXT: s_mov_b32 s3, 0xf000312; SI-NEXT: s_mov_b32 s2, -1313; SI-NEXT: v_mov_b32_e32 v0, 0x1c8314; SI-NEXT: v_mov_b32_e32 v2, 0x14d315; SI-NEXT: v_mov_b32_e32 v3, v1316; SI-NEXT: s_waitcnt lgkmcnt(0)317; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16318; SI-NEXT: s_waitcnt expcnt(0)319; SI-NEXT: v_mov_b32_e32 v0, 0x4d2320; SI-NEXT: v_mov_b32_e32 v2, 0x7b321; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0322; SI-NEXT: s_endpgm323;324; CI-LABEL: merge_global_store_4_constants_i64:325; CI: ; %bb.0:326; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9327; CI-NEXT: v_mov_b32_e32 v1, 0328; CI-NEXT: s_mov_b32 s3, 0xf000329; CI-NEXT: s_mov_b32 s2, -1330; CI-NEXT: v_mov_b32_e32 v0, 0x1c8331; CI-NEXT: v_mov_b32_e32 v2, 0x14d332; CI-NEXT: v_mov_b32_e32 v3, v1333; CI-NEXT: s_waitcnt lgkmcnt(0)334; CI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16335; CI-NEXT: s_nop 0336; CI-NEXT: v_mov_b32_e32 v0, 0x4d2337; CI-NEXT: v_mov_b32_e32 v2, 0x7b338; CI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0339; CI-NEXT: s_endpgm340 %out.gep.1 = getelementptr i64, ptr addrspace(1) %out, i64 1341 %out.gep.2 = getelementptr i64, ptr addrspace(1) %out, i64 2342 %out.gep.3 = getelementptr i64, ptr addrspace(1) %out, i64 3343 344 store i64 123, ptr addrspace(1) %out.gep.1345 store i64 456, ptr addrspace(1) %out.gep.2346 store i64 333, ptr addrspace(1) %out.gep.3347 store i64 1234, ptr addrspace(1) %out348 ret void349}350 351define amdgpu_kernel void @merge_global_store_2_adjacent_loads_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {352; GCN-LABEL: merge_global_store_2_adjacent_loads_i32:353; GCN: ; %bb.0:354; GCN-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9355; GCN-NEXT: s_mov_b32 s7, 0xf000356; GCN-NEXT: s_mov_b32 s6, -1357; GCN-NEXT: s_mov_b32 s10, s6358; GCN-NEXT: s_mov_b32 s11, s7359; GCN-NEXT: s_waitcnt lgkmcnt(0)360; GCN-NEXT: s_mov_b32 s8, s2361; GCN-NEXT: s_mov_b32 s9, s3362; GCN-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0363; GCN-NEXT: s_mov_b32 s4, s0364; GCN-NEXT: s_mov_b32 s5, s1365; GCN-NEXT: s_waitcnt vmcnt(0)366; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0367; GCN-NEXT: s_endpgm368 %out.gep.1 = getelementptr i32, ptr addrspace(1) %out, i32 1369 %in.gep.1 = getelementptr i32, ptr addrspace(1) %in, i32 1370 371 %lo = load i32, ptr addrspace(1) %in372 %hi = load i32, ptr addrspace(1) %in.gep.1373 374 store i32 %lo, ptr addrspace(1) %out375 store i32 %hi, ptr addrspace(1) %out.gep.1376 ret void377}378 379define amdgpu_kernel void @merge_global_store_2_adjacent_loads_i32_nonzero_base(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {380; GCN-LABEL: merge_global_store_2_adjacent_loads_i32_nonzero_base:381; GCN: ; %bb.0:382; GCN-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9383; GCN-NEXT: s_mov_b32 s7, 0xf000384; GCN-NEXT: s_mov_b32 s6, -1385; GCN-NEXT: s_waitcnt lgkmcnt(0)386; GCN-NEXT: s_mov_b32 s4, s2387; GCN-NEXT: s_mov_b32 s5, s3388; GCN-NEXT: buffer_load_dwordx2 v[0:1], off, s[4:7], 0 offset:8389; GCN-NEXT: s_mov_b32 s2, s6390; GCN-NEXT: s_mov_b32 s3, s7391; GCN-NEXT: s_waitcnt vmcnt(0)392; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0 offset:8393; GCN-NEXT: s_endpgm394 %in.gep.0 = getelementptr i32, ptr addrspace(1) %in, i32 2395 %in.gep.1 = getelementptr i32, ptr addrspace(1) %in, i32 3396 397 %out.gep.0 = getelementptr i32, ptr addrspace(1) %out, i32 2398 %out.gep.1 = getelementptr i32, ptr addrspace(1) %out, i32 3399 %lo = load i32, ptr addrspace(1) %in.gep.0400 %hi = load i32, ptr addrspace(1) %in.gep.1401 402 store i32 %lo, ptr addrspace(1) %out.gep.0403 store i32 %hi, ptr addrspace(1) %out.gep.1404 ret void405}406 407define amdgpu_kernel void @merge_global_store_2_adjacent_loads_shuffle_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {408; GCN-LABEL: merge_global_store_2_adjacent_loads_shuffle_i32:409; GCN: ; %bb.0:410; GCN-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9411; GCN-NEXT: s_mov_b32 s7, 0xf000412; GCN-NEXT: s_mov_b32 s6, -1413; GCN-NEXT: s_mov_b32 s10, s6414; GCN-NEXT: s_mov_b32 s11, s7415; GCN-NEXT: s_waitcnt lgkmcnt(0)416; GCN-NEXT: s_mov_b32 s8, s2417; GCN-NEXT: s_mov_b32 s9, s3418; GCN-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0419; GCN-NEXT: s_mov_b32 s4, s0420; GCN-NEXT: s_mov_b32 s5, s1421; GCN-NEXT: s_waitcnt vmcnt(0)422; GCN-NEXT: v_mov_b32_e32 v2, v0423; GCN-NEXT: buffer_store_dwordx2 v[1:2], off, s[4:7], 0424; GCN-NEXT: s_endpgm425 %out.gep.1 = getelementptr i32, ptr addrspace(1) %out, i32 1426 %in.gep.1 = getelementptr i32, ptr addrspace(1) %in, i32 1427 428 %lo = load i32, ptr addrspace(1) %in429 %hi = load i32, ptr addrspace(1) %in.gep.1430 431 store i32 %hi, ptr addrspace(1) %out432 store i32 %lo, ptr addrspace(1) %out.gep.1433 ret void434}435 436define amdgpu_kernel void @merge_global_store_4_adjacent_loads_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {437; GCN-LABEL: merge_global_store_4_adjacent_loads_i32:438; GCN: ; %bb.0:439; GCN-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9440; GCN-NEXT: s_mov_b32 s7, 0xf000441; GCN-NEXT: s_mov_b32 s6, -1442; GCN-NEXT: s_mov_b32 s10, s6443; GCN-NEXT: s_mov_b32 s11, s7444; GCN-NEXT: s_waitcnt lgkmcnt(0)445; GCN-NEXT: s_mov_b32 s8, s2446; GCN-NEXT: s_mov_b32 s9, s3447; GCN-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0448; GCN-NEXT: s_mov_b32 s4, s0449; GCN-NEXT: s_mov_b32 s5, s1450; GCN-NEXT: s_waitcnt vmcnt(0)451; GCN-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0452; GCN-NEXT: s_endpgm453 %out.gep.1 = getelementptr i32, ptr addrspace(1) %out, i32 1454 %out.gep.2 = getelementptr i32, ptr addrspace(1) %out, i32 2455 %out.gep.3 = getelementptr i32, ptr addrspace(1) %out, i32 3456 %in.gep.1 = getelementptr i32, ptr addrspace(1) %in, i32 1457 %in.gep.2 = getelementptr i32, ptr addrspace(1) %in, i32 2458 %in.gep.3 = getelementptr i32, ptr addrspace(1) %in, i32 3459 460 %x = load i32, ptr addrspace(1) %in461 %y = load i32, ptr addrspace(1) %in.gep.1462 %z = load i32, ptr addrspace(1) %in.gep.2463 %w = load i32, ptr addrspace(1) %in.gep.3464 465 store i32 %x, ptr addrspace(1) %out466 store i32 %y, ptr addrspace(1) %out.gep.1467 store i32 %z, ptr addrspace(1) %out.gep.2468 store i32 %w, ptr addrspace(1) %out.gep.3469 ret void470}471 472define amdgpu_kernel void @merge_global_store_3_adjacent_loads_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {473; SI-LABEL: merge_global_store_3_adjacent_loads_i32:474; SI: ; %bb.0:475; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9476; SI-NEXT: s_mov_b32 s7, 0xf000477; SI-NEXT: s_mov_b32 s6, -1478; SI-NEXT: s_mov_b32 s10, s6479; SI-NEXT: s_mov_b32 s11, s7480; SI-NEXT: s_waitcnt lgkmcnt(0)481; SI-NEXT: s_mov_b32 s8, s2482; SI-NEXT: s_mov_b32 s9, s3483; SI-NEXT: buffer_load_dword v2, off, s[8:11], 0 offset:8484; SI-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0485; SI-NEXT: s_mov_b32 s4, s0486; SI-NEXT: s_mov_b32 s5, s1487; SI-NEXT: s_waitcnt vmcnt(1)488; SI-NEXT: buffer_store_dword v2, off, s[4:7], 0 offset:8489; SI-NEXT: s_waitcnt vmcnt(1)490; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0491; SI-NEXT: s_endpgm492;493; CI-LABEL: merge_global_store_3_adjacent_loads_i32:494; CI: ; %bb.0:495; CI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9496; CI-NEXT: s_mov_b32 s7, 0xf000497; CI-NEXT: s_mov_b32 s6, -1498; CI-NEXT: s_mov_b32 s10, s6499; CI-NEXT: s_mov_b32 s11, s7500; CI-NEXT: s_waitcnt lgkmcnt(0)501; CI-NEXT: s_mov_b32 s8, s2502; CI-NEXT: s_mov_b32 s9, s3503; CI-NEXT: buffer_load_dwordx3 v[0:2], off, s[8:11], 0504; CI-NEXT: s_mov_b32 s4, s0505; CI-NEXT: s_mov_b32 s5, s1506; CI-NEXT: s_waitcnt vmcnt(0)507; CI-NEXT: buffer_store_dwordx3 v[0:2], off, s[4:7], 0508; CI-NEXT: s_endpgm509 %out.gep.1 = getelementptr i32, ptr addrspace(1) %out, i32 1510 %out.gep.2 = getelementptr i32, ptr addrspace(1) %out, i32 2511 %in.gep.1 = getelementptr i32, ptr addrspace(1) %in, i32 1512 %in.gep.2 = getelementptr i32, ptr addrspace(1) %in, i32 2513 514 %x = load i32, ptr addrspace(1) %in515 %y = load i32, ptr addrspace(1) %in.gep.1516 %z = load i32, ptr addrspace(1) %in.gep.2517 518 store i32 %x, ptr addrspace(1) %out519 store i32 %y, ptr addrspace(1) %out.gep.1520 store i32 %z, ptr addrspace(1) %out.gep.2521 ret void522}523 524define amdgpu_kernel void @merge_global_store_4_adjacent_loads_f32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {525; GCN-LABEL: merge_global_store_4_adjacent_loads_f32:526; GCN: ; %bb.0:527; GCN-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9528; GCN-NEXT: s_mov_b32 s7, 0xf000529; GCN-NEXT: s_mov_b32 s6, -1530; GCN-NEXT: s_mov_b32 s10, s6531; GCN-NEXT: s_mov_b32 s11, s7532; GCN-NEXT: s_waitcnt lgkmcnt(0)533; GCN-NEXT: s_mov_b32 s8, s2534; GCN-NEXT: s_mov_b32 s9, s3535; GCN-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0536; GCN-NEXT: s_mov_b32 s4, s0537; GCN-NEXT: s_mov_b32 s5, s1538; GCN-NEXT: s_waitcnt vmcnt(0)539; GCN-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0540; GCN-NEXT: s_endpgm541 %out.gep.1 = getelementptr float, ptr addrspace(1) %out, i32 1542 %out.gep.2 = getelementptr float, ptr addrspace(1) %out, i32 2543 %out.gep.3 = getelementptr float, ptr addrspace(1) %out, i32 3544 %in.gep.1 = getelementptr float, ptr addrspace(1) %in, i32 1545 %in.gep.2 = getelementptr float, ptr addrspace(1) %in, i32 2546 %in.gep.3 = getelementptr float, ptr addrspace(1) %in, i32 3547 548 %x = load float, ptr addrspace(1) %in549 %y = load float, ptr addrspace(1) %in.gep.1550 %z = load float, ptr addrspace(1) %in.gep.2551 %w = load float, ptr addrspace(1) %in.gep.3552 553 store float %x, ptr addrspace(1) %out554 store float %y, ptr addrspace(1) %out.gep.1555 store float %z, ptr addrspace(1) %out.gep.2556 store float %w, ptr addrspace(1) %out.gep.3557 ret void558}559 560define amdgpu_kernel void @merge_global_store_4_adjacent_loads_i32_nonzero_base(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {561; GCN-LABEL: merge_global_store_4_adjacent_loads_i32_nonzero_base:562; GCN: ; %bb.0:563; GCN-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9564; GCN-NEXT: s_mov_b32 s7, 0xf000565; GCN-NEXT: s_mov_b32 s6, -1566; GCN-NEXT: s_waitcnt lgkmcnt(0)567; GCN-NEXT: s_mov_b32 s4, s2568; GCN-NEXT: s_mov_b32 s5, s3569; GCN-NEXT: buffer_load_dwordx4 v[0:3], off, s[4:7], 0 offset:44570; GCN-NEXT: s_mov_b32 s2, s6571; GCN-NEXT: s_mov_b32 s3, s7572; GCN-NEXT: s_waitcnt vmcnt(0)573; GCN-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:28574; GCN-NEXT: s_endpgm575 %in.gep.0 = getelementptr i32, ptr addrspace(1) %in, i32 11576 %in.gep.1 = getelementptr i32, ptr addrspace(1) %in, i32 12577 %in.gep.2 = getelementptr i32, ptr addrspace(1) %in, i32 13578 %in.gep.3 = getelementptr i32, ptr addrspace(1) %in, i32 14579 %out.gep.0 = getelementptr i32, ptr addrspace(1) %out, i32 7580 %out.gep.1 = getelementptr i32, ptr addrspace(1) %out, i32 8581 %out.gep.2 = getelementptr i32, ptr addrspace(1) %out, i32 9582 %out.gep.3 = getelementptr i32, ptr addrspace(1) %out, i32 10583 584 %x = load i32, ptr addrspace(1) %in.gep.0585 %y = load i32, ptr addrspace(1) %in.gep.1586 %z = load i32, ptr addrspace(1) %in.gep.2587 %w = load i32, ptr addrspace(1) %in.gep.3588 589 store i32 %x, ptr addrspace(1) %out.gep.0590 store i32 %y, ptr addrspace(1) %out.gep.1591 store i32 %z, ptr addrspace(1) %out.gep.2592 store i32 %w, ptr addrspace(1) %out.gep.3593 ret void594}595 596define amdgpu_kernel void @merge_global_store_4_adjacent_loads_inverse_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {597; GCN-LABEL: merge_global_store_4_adjacent_loads_inverse_i32:598; GCN: ; %bb.0:599; GCN-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9600; GCN-NEXT: s_mov_b32 s7, 0xf000601; GCN-NEXT: s_mov_b32 s6, -1602; GCN-NEXT: s_mov_b32 s10, s6603; GCN-NEXT: s_mov_b32 s11, s7604; GCN-NEXT: s_waitcnt lgkmcnt(0)605; GCN-NEXT: s_mov_b32 s8, s2606; GCN-NEXT: s_mov_b32 s9, s3607; GCN-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0608; GCN-NEXT: s_mov_b32 s4, s0609; GCN-NEXT: s_mov_b32 s5, s1610; GCN-NEXT: s_waitcnt vmcnt(0)611; GCN-NEXT: s_barrier612; GCN-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0613; GCN-NEXT: s_endpgm614 %out.gep.1 = getelementptr i32, ptr addrspace(1) %out, i32 1615 %out.gep.2 = getelementptr i32, ptr addrspace(1) %out, i32 2616 %out.gep.3 = getelementptr i32, ptr addrspace(1) %out, i32 3617 %in.gep.1 = getelementptr i32, ptr addrspace(1) %in, i32 1618 %in.gep.2 = getelementptr i32, ptr addrspace(1) %in, i32 2619 %in.gep.3 = getelementptr i32, ptr addrspace(1) %in, i32 3620 621 %x = load i32, ptr addrspace(1) %in622 %y = load i32, ptr addrspace(1) %in.gep.1623 %z = load i32, ptr addrspace(1) %in.gep.2624 %w = load i32, ptr addrspace(1) %in.gep.3625 626 ; Make sure the barrier doesn't stop this627 tail call void @llvm.amdgcn.s.barrier() #1628 629 store i32 %w, ptr addrspace(1) %out.gep.3630 store i32 %z, ptr addrspace(1) %out.gep.2631 store i32 %y, ptr addrspace(1) %out.gep.1632 store i32 %x, ptr addrspace(1) %out633 634 ret void635}636 637; TODO: Re-packing of loaded register required. Maybe an IR pass638; should catch this?639define amdgpu_kernel void @merge_global_store_4_adjacent_loads_shuffle_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {640; SI-LABEL: merge_global_store_4_adjacent_loads_shuffle_i32:641; SI: ; %bb.0:642; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9643; SI-NEXT: s_mov_b32 s7, 0xf000644; SI-NEXT: s_mov_b32 s6, -1645; SI-NEXT: s_mov_b32 s10, s6646; SI-NEXT: s_mov_b32 s11, s7647; SI-NEXT: s_waitcnt lgkmcnt(0)648; SI-NEXT: s_mov_b32 s8, s2649; SI-NEXT: s_mov_b32 s9, s3650; SI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0651; SI-NEXT: s_mov_b32 s4, s0652; SI-NEXT: s_mov_b32 s5, s1653; SI-NEXT: s_waitcnt vmcnt(0)654; SI-NEXT: s_barrier655; SI-NEXT: v_mov_b32_e32 v4, v2656; SI-NEXT: v_mov_b32_e32 v2, v0657; SI-NEXT: v_mov_b32_e32 v6, v2658; SI-NEXT: v_mov_b32_e32 v5, v1659; SI-NEXT: buffer_store_dwordx4 v[3:6], off, s[4:7], 0660; SI-NEXT: s_endpgm661;662; CI-LABEL: merge_global_store_4_adjacent_loads_shuffle_i32:663; CI: ; %bb.0:664; CI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9665; CI-NEXT: s_mov_b32 s7, 0xf000666; CI-NEXT: s_mov_b32 s6, -1667; CI-NEXT: s_mov_b32 s10, s6668; CI-NEXT: s_mov_b32 s11, s7669; CI-NEXT: s_waitcnt lgkmcnt(0)670; CI-NEXT: s_mov_b32 s8, s2671; CI-NEXT: s_mov_b32 s9, s3672; CI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0673; CI-NEXT: s_mov_b32 s4, s0674; CI-NEXT: s_mov_b32 s5, s1675; CI-NEXT: s_waitcnt vmcnt(0)676; CI-NEXT: s_barrier677; CI-NEXT: v_mov_b32_e32 v4, v2678; CI-NEXT: v_mov_b32_e32 v5, v1679; CI-NEXT: v_mov_b32_e32 v6, v0680; CI-NEXT: buffer_store_dwordx4 v[3:6], off, s[4:7], 0681; CI-NEXT: s_endpgm682 %out.gep.1 = getelementptr i32, ptr addrspace(1) %out, i32 1683 %out.gep.2 = getelementptr i32, ptr addrspace(1) %out, i32 2684 %out.gep.3 = getelementptr i32, ptr addrspace(1) %out, i32 3685 %in.gep.1 = getelementptr i32, ptr addrspace(1) %in, i32 1686 %in.gep.2 = getelementptr i32, ptr addrspace(1) %in, i32 2687 %in.gep.3 = getelementptr i32, ptr addrspace(1) %in, i32 3688 689 %x = load i32, ptr addrspace(1) %in690 %y = load i32, ptr addrspace(1) %in.gep.1691 %z = load i32, ptr addrspace(1) %in.gep.2692 %w = load i32, ptr addrspace(1) %in.gep.3693 694 ; Make sure the barrier doesn't stop this695 tail call void @llvm.amdgcn.s.barrier() #1696 697 store i32 %w, ptr addrspace(1) %out698 store i32 %z, ptr addrspace(1) %out.gep.1699 store i32 %y, ptr addrspace(1) %out.gep.2700 store i32 %x, ptr addrspace(1) %out.gep.3701 702 ret void703}704 705define amdgpu_kernel void @merge_global_store_4_adjacent_loads_i8(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {706; GCN-LABEL: merge_global_store_4_adjacent_loads_i8:707; GCN: ; %bb.0:708; GCN-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9709; GCN-NEXT: s_mov_b32 s7, 0xf000710; GCN-NEXT: s_mov_b32 s6, -1711; GCN-NEXT: s_mov_b32 s10, s6712; GCN-NEXT: s_mov_b32 s11, s7713; GCN-NEXT: s_waitcnt lgkmcnt(0)714; GCN-NEXT: s_mov_b32 s8, s2715; GCN-NEXT: s_mov_b32 s9, s3716; GCN-NEXT: buffer_load_dword v0, off, s[8:11], 0717; GCN-NEXT: s_mov_b32 s4, s0718; GCN-NEXT: s_mov_b32 s5, s1719; GCN-NEXT: s_waitcnt vmcnt(0)720; GCN-NEXT: buffer_store_dword v0, off, s[4:7], 0721; GCN-NEXT: s_endpgm722 %out.gep.1 = getelementptr i8, ptr addrspace(1) %out, i8 1723 %out.gep.2 = getelementptr i8, ptr addrspace(1) %out, i8 2724 %out.gep.3 = getelementptr i8, ptr addrspace(1) %out, i8 3725 %in.gep.1 = getelementptr i8, ptr addrspace(1) %in, i8 1726 %in.gep.2 = getelementptr i8, ptr addrspace(1) %in, i8 2727 %in.gep.3 = getelementptr i8, ptr addrspace(1) %in, i8 3728 729 %x = load i8, ptr addrspace(1) %in, align 4730 %y = load i8, ptr addrspace(1) %in.gep.1731 %z = load i8, ptr addrspace(1) %in.gep.2732 %w = load i8, ptr addrspace(1) %in.gep.3733 734 store i8 %x, ptr addrspace(1) %out, align 4735 store i8 %y, ptr addrspace(1) %out.gep.1736 store i8 %z, ptr addrspace(1) %out.gep.2737 store i8 %w, ptr addrspace(1) %out.gep.3738 ret void739}740 741define amdgpu_kernel void @merge_global_store_4_adjacent_loads_i8_natural_align(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {742; GCN-LABEL: merge_global_store_4_adjacent_loads_i8_natural_align:743; GCN: ; %bb.0:744; GCN-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9745; GCN-NEXT: s_mov_b32 s7, 0xf000746; GCN-NEXT: s_mov_b32 s6, -1747; GCN-NEXT: s_mov_b32 s10, s6748; GCN-NEXT: s_mov_b32 s11, s7749; GCN-NEXT: s_waitcnt lgkmcnt(0)750; GCN-NEXT: s_mov_b32 s8, s2751; GCN-NEXT: s_mov_b32 s9, s3752; GCN-NEXT: buffer_load_ubyte v0, off, s[8:11], 0753; GCN-NEXT: buffer_load_ubyte v1, off, s[8:11], 0 offset:1754; GCN-NEXT: buffer_load_ubyte v2, off, s[8:11], 0 offset:2755; GCN-NEXT: buffer_load_ubyte v3, off, s[8:11], 0 offset:3756; GCN-NEXT: s_mov_b32 s4, s0757; GCN-NEXT: s_mov_b32 s5, s1758; GCN-NEXT: s_waitcnt vmcnt(3)759; GCN-NEXT: buffer_store_byte v0, off, s[4:7], 0760; GCN-NEXT: s_waitcnt vmcnt(3)761; GCN-NEXT: buffer_store_byte v1, off, s[4:7], 0 offset:1762; GCN-NEXT: s_waitcnt vmcnt(3)763; GCN-NEXT: buffer_store_byte v2, off, s[4:7], 0 offset:2764; GCN-NEXT: s_waitcnt vmcnt(3)765; GCN-NEXT: buffer_store_byte v3, off, s[4:7], 0 offset:3766; GCN-NEXT: s_endpgm767 %out.gep.1 = getelementptr i8, ptr addrspace(1) %out, i8 1768 %out.gep.2 = getelementptr i8, ptr addrspace(1) %out, i8 2769 %out.gep.3 = getelementptr i8, ptr addrspace(1) %out, i8 3770 %in.gep.1 = getelementptr i8, ptr addrspace(1) %in, i8 1771 %in.gep.2 = getelementptr i8, ptr addrspace(1) %in, i8 2772 %in.gep.3 = getelementptr i8, ptr addrspace(1) %in, i8 3773 774 %x = load i8, ptr addrspace(1) %in775 %y = load i8, ptr addrspace(1) %in.gep.1776 %z = load i8, ptr addrspace(1) %in.gep.2777 %w = load i8, ptr addrspace(1) %in.gep.3778 779 store i8 %x, ptr addrspace(1) %out780 store i8 %y, ptr addrspace(1) %out.gep.1781 store i8 %z, ptr addrspace(1) %out.gep.2782 store i8 %w, ptr addrspace(1) %out.gep.3783 ret void784}785 786define amdgpu_kernel void @merge_global_store_4_vector_elts_loads_v4i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {787; GCN-LABEL: merge_global_store_4_vector_elts_loads_v4i32:788; GCN: ; %bb.0:789; GCN-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9790; GCN-NEXT: s_mov_b32 s7, 0xf000791; GCN-NEXT: s_mov_b32 s6, -1792; GCN-NEXT: s_mov_b32 s10, s6793; GCN-NEXT: s_mov_b32 s11, s7794; GCN-NEXT: s_waitcnt lgkmcnt(0)795; GCN-NEXT: s_mov_b32 s8, s2796; GCN-NEXT: s_mov_b32 s9, s3797; GCN-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0798; GCN-NEXT: s_mov_b32 s4, s0799; GCN-NEXT: s_mov_b32 s5, s1800; GCN-NEXT: s_waitcnt vmcnt(0)801; GCN-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0802; GCN-NEXT: s_endpgm803 %out.gep.1 = getelementptr i32, ptr addrspace(1) %out, i32 1804 %out.gep.2 = getelementptr i32, ptr addrspace(1) %out, i32 2805 %out.gep.3 = getelementptr i32, ptr addrspace(1) %out, i32 3806 %vec = load <4 x i32>, ptr addrspace(1) %in807 808 %x = extractelement <4 x i32> %vec, i32 0809 %y = extractelement <4 x i32> %vec, i32 1810 %z = extractelement <4 x i32> %vec, i32 2811 %w = extractelement <4 x i32> %vec, i32 3812 813 store i32 %x, ptr addrspace(1) %out814 store i32 %y, ptr addrspace(1) %out.gep.1815 store i32 %z, ptr addrspace(1) %out.gep.2816 store i32 %w, ptr addrspace(1) %out.gep.3817 ret void818}819 820define amdgpu_kernel void @merge_local_store_2_constants_i8(ptr addrspace(3) %out) #0 {821; GCN-LABEL: merge_local_store_2_constants_i8:822; GCN: ; %bb.0:823; GCN-NEXT: s_load_dword s0, s[4:5], 0x9824; GCN-NEXT: v_mov_b32_e32 v0, 0x7bc8825; GCN-NEXT: s_mov_b32 m0, -1826; GCN-NEXT: s_waitcnt lgkmcnt(0)827; GCN-NEXT: v_mov_b32_e32 v1, s0828; GCN-NEXT: ds_write_b16 v1, v0829; GCN-NEXT: s_endpgm830 %out.gep.1 = getelementptr i8, ptr addrspace(3) %out, i32 1831 832 store i8 123, ptr addrspace(3) %out.gep.1833 store i8 456, ptr addrspace(3) %out, align 2834 ret void835}836 837define amdgpu_kernel void @merge_local_store_2_constants_i32(ptr addrspace(3) %out) #0 {838; SI-LABEL: merge_local_store_2_constants_i32:839; SI: ; %bb.0:840; SI-NEXT: s_load_dword s0, s[4:5], 0x9841; SI-NEXT: v_mov_b32_e32 v0, 0x7b842; SI-NEXT: v_mov_b32_e32 v1, 0x1c8843; SI-NEXT: s_mov_b32 m0, -1844; SI-NEXT: s_waitcnt lgkmcnt(0)845; SI-NEXT: v_mov_b32_e32 v2, s0846; SI-NEXT: ds_write2_b32 v2, v1, v0 offset1:1847; SI-NEXT: s_endpgm848;849; CI-LABEL: merge_local_store_2_constants_i32:850; CI: ; %bb.0:851; CI-NEXT: s_load_dword s0, s[4:5], 0x9852; CI-NEXT: v_mov_b32_e32 v0, 0x1c8853; CI-NEXT: v_mov_b32_e32 v1, 0x7b854; CI-NEXT: s_mov_b32 m0, -1855; CI-NEXT: s_waitcnt lgkmcnt(0)856; CI-NEXT: v_mov_b32_e32 v2, s0857; CI-NEXT: ds_write2_b32 v2, v0, v1 offset1:1858; CI-NEXT: s_endpgm859 %out.gep.1 = getelementptr i32, ptr addrspace(3) %out, i32 1860 861 store i32 123, ptr addrspace(3) %out.gep.1862 store i32 456, ptr addrspace(3) %out863 ret void864}865 866define amdgpu_kernel void @merge_local_store_4_constants_i32(ptr addrspace(3) %out) #0 {867; SI-LABEL: merge_local_store_4_constants_i32:868; SI: ; %bb.0:869; SI-NEXT: s_load_dword s0, s[4:5], 0x9870; SI-NEXT: v_mov_b32_e32 v1, 0x1c8871; SI-NEXT: v_mov_b32_e32 v2, 0x14d872; SI-NEXT: s_mov_b32 m0, -1873; SI-NEXT: v_mov_b32_e32 v0, 0x7b874; SI-NEXT: s_waitcnt lgkmcnt(0)875; SI-NEXT: v_mov_b32_e32 v3, s0876; SI-NEXT: ds_write2_b32 v3, v1, v2 offset0:2 offset1:3877; SI-NEXT: v_mov_b32_e32 v1, 0x4d2878; SI-NEXT: ds_write2_b32 v3, v1, v0 offset1:1879; SI-NEXT: s_endpgm880;881; CI-LABEL: merge_local_store_4_constants_i32:882; CI: ; %bb.0:883; CI-NEXT: s_load_dword s0, s[4:5], 0x9884; CI-NEXT: v_mov_b32_e32 v0, 0x1c8885; CI-NEXT: v_mov_b32_e32 v1, 0x14d886; CI-NEXT: s_mov_b32 m0, -1887; CI-NEXT: v_mov_b32_e32 v2, 0x4d2888; CI-NEXT: s_waitcnt lgkmcnt(0)889; CI-NEXT: v_mov_b32_e32 v3, s0890; CI-NEXT: ds_write2_b32 v3, v0, v1 offset0:2 offset1:3891; CI-NEXT: v_mov_b32_e32 v0, 0x7b892; CI-NEXT: ds_write2_b32 v3, v2, v0 offset1:1893; CI-NEXT: s_endpgm894 %out.gep.1 = getelementptr i32, ptr addrspace(3) %out, i32 1895 %out.gep.2 = getelementptr i32, ptr addrspace(3) %out, i32 2896 %out.gep.3 = getelementptr i32, ptr addrspace(3) %out, i32 3897 898 store i32 123, ptr addrspace(3) %out.gep.1899 store i32 456, ptr addrspace(3) %out.gep.2900 store i32 333, ptr addrspace(3) %out.gep.3901 store i32 1234, ptr addrspace(3) %out902 ret void903}904 905define amdgpu_kernel void @merge_global_store_5_constants_i32(ptr addrspace(1) %out) {906; SI-LABEL: merge_global_store_5_constants_i32:907; SI: ; %bb.0:908; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9909; SI-NEXT: s_mov_b32 s3, 0xf000910; SI-NEXT: s_mov_b32 s2, -1911; SI-NEXT: v_mov_b32_e32 v0, 9912; SI-NEXT: v_mov_b32_e32 v1, 12913; SI-NEXT: v_mov_b32_e32 v2, 16914; SI-NEXT: v_mov_b32_e32 v3, -12915; SI-NEXT: s_waitcnt lgkmcnt(0)916; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0917; SI-NEXT: s_waitcnt expcnt(0)918; SI-NEXT: v_mov_b32_e32 v0, 11919; SI-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:16920; SI-NEXT: s_endpgm921;922; CI-LABEL: merge_global_store_5_constants_i32:923; CI: ; %bb.0:924; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9925; CI-NEXT: s_mov_b32 s3, 0xf000926; CI-NEXT: s_mov_b32 s2, -1927; CI-NEXT: v_mov_b32_e32 v0, 9928; CI-NEXT: v_mov_b32_e32 v1, 12929; CI-NEXT: v_mov_b32_e32 v2, 16930; CI-NEXT: v_mov_b32_e32 v3, -12931; CI-NEXT: s_waitcnt lgkmcnt(0)932; CI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0933; CI-NEXT: s_nop 0934; CI-NEXT: v_mov_b32_e32 v0, 11935; CI-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:16936; CI-NEXT: s_endpgm937 store i32 9, ptr addrspace(1) %out, align 4938 %idx1 = getelementptr inbounds i32, ptr addrspace(1) %out, i64 1939 store i32 12, ptr addrspace(1) %idx1, align 4940 %idx2 = getelementptr inbounds i32, ptr addrspace(1) %out, i64 2941 store i32 16, ptr addrspace(1) %idx2, align 4942 %idx3 = getelementptr inbounds i32, ptr addrspace(1) %out, i64 3943 store i32 -12, ptr addrspace(1) %idx3, align 4944 %idx4 = getelementptr inbounds i32, ptr addrspace(1) %out, i64 4945 store i32 11, ptr addrspace(1) %idx4, align 4946 ret void947}948 949define amdgpu_kernel void @merge_global_store_6_constants_i32(ptr addrspace(1) %out) {950; SI-LABEL: merge_global_store_6_constants_i32:951; SI: ; %bb.0:952; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9953; SI-NEXT: s_mov_b32 s3, 0xf000954; SI-NEXT: s_mov_b32 s2, -1955; SI-NEXT: v_mov_b32_e32 v0, 13956; SI-NEXT: v_mov_b32_e32 v1, 15957; SI-NEXT: v_mov_b32_e32 v2, 62958; SI-NEXT: v_mov_b32_e32 v3, 63959; SI-NEXT: s_waitcnt lgkmcnt(0)960; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0961; SI-NEXT: s_waitcnt expcnt(0)962; SI-NEXT: v_mov_b32_e32 v0, 11963; SI-NEXT: v_mov_b32_e32 v1, 0x7b964; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0 offset:16965; SI-NEXT: s_endpgm966;967; CI-LABEL: merge_global_store_6_constants_i32:968; CI: ; %bb.0:969; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9970; CI-NEXT: s_mov_b32 s3, 0xf000971; CI-NEXT: s_mov_b32 s2, -1972; CI-NEXT: v_mov_b32_e32 v0, 13973; CI-NEXT: v_mov_b32_e32 v1, 15974; CI-NEXT: v_mov_b32_e32 v2, 62975; CI-NEXT: v_mov_b32_e32 v3, 63976; CI-NEXT: s_waitcnt lgkmcnt(0)977; CI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0978; CI-NEXT: s_nop 0979; CI-NEXT: v_mov_b32_e32 v0, 11980; CI-NEXT: v_mov_b32_e32 v1, 0x7b981; CI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0 offset:16982; CI-NEXT: s_endpgm983 store i32 13, ptr addrspace(1) %out, align 4984 %idx1 = getelementptr inbounds i32, ptr addrspace(1) %out, i64 1985 store i32 15, ptr addrspace(1) %idx1, align 4986 %idx2 = getelementptr inbounds i32, ptr addrspace(1) %out, i64 2987 store i32 62, ptr addrspace(1) %idx2, align 4988 %idx3 = getelementptr inbounds i32, ptr addrspace(1) %out, i64 3989 store i32 63, ptr addrspace(1) %idx3, align 4990 %idx4 = getelementptr inbounds i32, ptr addrspace(1) %out, i64 4991 store i32 11, ptr addrspace(1) %idx4, align 4992 %idx5 = getelementptr inbounds i32, ptr addrspace(1) %out, i64 5993 store i32 123, ptr addrspace(1) %idx5, align 4994 ret void995}996 997define amdgpu_kernel void @merge_global_store_7_constants_i32(ptr addrspace(1) %out) {998; SI-LABEL: merge_global_store_7_constants_i32:999; SI: ; %bb.0:1000; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91001; SI-NEXT: s_mov_b32 s3, 0xf0001002; SI-NEXT: s_mov_b32 s2, -11003; SI-NEXT: v_mov_b32_e32 v0, 341004; SI-NEXT: v_mov_b32_e32 v1, 0x3e71005; SI-NEXT: v_mov_b32_e32 v2, 0x411006; SI-NEXT: v_mov_b32_e32 v3, 331007; SI-NEXT: s_waitcnt lgkmcnt(0)1008; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 01009; SI-NEXT: s_waitcnt expcnt(0)1010; SI-NEXT: v_mov_b32_e32 v0, 0xd41011; SI-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:241012; SI-NEXT: s_waitcnt expcnt(0)1013; SI-NEXT: v_mov_b32_e32 v0, 0x621014; SI-NEXT: v_mov_b32_e32 v1, 0x5b1015; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0 offset:161016; SI-NEXT: s_endpgm1017;1018; CI-LABEL: merge_global_store_7_constants_i32:1019; CI: ; %bb.0:1020; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91021; CI-NEXT: s_mov_b32 s3, 0xf0001022; CI-NEXT: s_mov_b32 s2, -11023; CI-NEXT: v_mov_b32_e32 v0, 341024; CI-NEXT: v_mov_b32_e32 v1, 0x3e71025; CI-NEXT: v_mov_b32_e32 v2, 0x411026; CI-NEXT: v_mov_b32_e32 v3, 331027; CI-NEXT: s_waitcnt lgkmcnt(0)1028; CI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 01029; CI-NEXT: s_nop 01030; CI-NEXT: v_mov_b32_e32 v0, 0x621031; CI-NEXT: v_mov_b32_e32 v1, 0x5b1032; CI-NEXT: v_mov_b32_e32 v2, 0xd41033; CI-NEXT: buffer_store_dwordx3 v[0:2], off, s[0:3], 0 offset:161034; CI-NEXT: s_endpgm1035 store i32 34, ptr addrspace(1) %out, align 41036 %idx1 = getelementptr inbounds i32, ptr addrspace(1) %out, i64 11037 store i32 999, ptr addrspace(1) %idx1, align 41038 %idx2 = getelementptr inbounds i32, ptr addrspace(1) %out, i64 21039 store i32 65, ptr addrspace(1) %idx2, align 41040 %idx3 = getelementptr inbounds i32, ptr addrspace(1) %out, i64 31041 store i32 33, ptr addrspace(1) %idx3, align 41042 %idx4 = getelementptr inbounds i32, ptr addrspace(1) %out, i64 41043 store i32 98, ptr addrspace(1) %idx4, align 41044 %idx5 = getelementptr inbounds i32, ptr addrspace(1) %out, i64 51045 store i32 91, ptr addrspace(1) %idx5, align 41046 %idx6 = getelementptr inbounds i32, ptr addrspace(1) %out, i64 61047 store i32 212, ptr addrspace(1) %idx6, align 41048 ret void1049}1050 1051define amdgpu_kernel void @merge_global_store_8_constants_i32(ptr addrspace(1) %out) {1052; SI-LABEL: merge_global_store_8_constants_i32:1053; SI: ; %bb.0:1054; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91055; SI-NEXT: s_mov_b32 s3, 0xf0001056; SI-NEXT: s_mov_b32 s2, -11057; SI-NEXT: v_mov_b32_e32 v2, 341058; SI-NEXT: v_mov_b32_e32 v3, 0x3e71059; SI-NEXT: v_mov_b32_e32 v4, 0x411060; SI-NEXT: v_mov_b32_e32 v5, 331061; SI-NEXT: s_waitcnt lgkmcnt(0)1062; SI-NEXT: buffer_store_dwordx4 v[2:5], off, s[0:3], 01063; SI-NEXT: v_mov_b32_e32 v0, 0x621064; SI-NEXT: v_mov_b32_e32 v1, 0x5b1065; SI-NEXT: s_waitcnt expcnt(0)1066; SI-NEXT: v_mov_b32_e32 v2, 0xd41067; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:161068; SI-NEXT: s_endpgm1069;1070; CI-LABEL: merge_global_store_8_constants_i32:1071; CI: ; %bb.0:1072; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91073; CI-NEXT: s_mov_b32 s3, 0xf0001074; CI-NEXT: s_mov_b32 s2, -11075; CI-NEXT: v_mov_b32_e32 v2, 341076; CI-NEXT: v_mov_b32_e32 v3, 0x3e71077; CI-NEXT: v_mov_b32_e32 v4, 0x411078; CI-NEXT: v_mov_b32_e32 v5, 331079; CI-NEXT: s_waitcnt lgkmcnt(0)1080; CI-NEXT: buffer_store_dwordx4 v[2:5], off, s[0:3], 01081; CI-NEXT: v_mov_b32_e32 v0, 0x621082; CI-NEXT: v_mov_b32_e32 v1, 0x5b1083; CI-NEXT: v_mov_b32_e32 v2, 0xd41084; CI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:161085; CI-NEXT: s_endpgm1086 store i32 34, ptr addrspace(1) %out, align 41087 %idx1 = getelementptr inbounds i32, ptr addrspace(1) %out, i64 11088 store i32 999, ptr addrspace(1) %idx1, align 41089 %idx2 = getelementptr inbounds i32, ptr addrspace(1) %out, i64 21090 store i32 65, ptr addrspace(1) %idx2, align 41091 %idx3 = getelementptr inbounds i32, ptr addrspace(1) %out, i64 31092 store i32 33, ptr addrspace(1) %idx3, align 41093 %idx4 = getelementptr inbounds i32, ptr addrspace(1) %out, i64 41094 store i32 98, ptr addrspace(1) %idx4, align 41095 %idx5 = getelementptr inbounds i32, ptr addrspace(1) %out, i64 51096 store i32 91, ptr addrspace(1) %idx5, align 41097 %idx6 = getelementptr inbounds i32, ptr addrspace(1) %out, i64 61098 store i32 212, ptr addrspace(1) %idx6, align 41099 %idx7 = getelementptr inbounds i32, ptr addrspace(1) %out, i64 71100 store i32 999, ptr addrspace(1) %idx7, align 41101 ret void1102}1103 1104; This requires handling of scalar_to_vector for v2i64 to avoid1105; scratch usage.1106; FIXME: Should do single load and store1107define amdgpu_kernel void @copy_v3i32_align4(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) #0 {1108; SI-LABEL: copy_v3i32_align4:1109; SI: ; %bb.0:1110; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91111; SI-NEXT: s_mov_b32 s7, 0xf0001112; SI-NEXT: s_mov_b32 s6, -11113; SI-NEXT: s_mov_b32 s10, s61114; SI-NEXT: s_mov_b32 s11, s71115; SI-NEXT: s_waitcnt lgkmcnt(0)1116; SI-NEXT: s_mov_b32 s8, s21117; SI-NEXT: s_mov_b32 s9, s31118; SI-NEXT: buffer_load_dword v2, off, s[8:11], 0 offset:81119; SI-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 01120; SI-NEXT: s_mov_b32 s4, s01121; SI-NEXT: s_mov_b32 s5, s11122; SI-NEXT: s_waitcnt vmcnt(1)1123; SI-NEXT: buffer_store_dword v2, off, s[4:7], 0 offset:81124; SI-NEXT: s_waitcnt vmcnt(1)1125; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 01126; SI-NEXT: s_endpgm1127;1128; CI-LABEL: copy_v3i32_align4:1129; CI: ; %bb.0:1130; CI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91131; CI-NEXT: s_mov_b32 s7, 0xf0001132; CI-NEXT: s_mov_b32 s6, -11133; CI-NEXT: s_mov_b32 s10, s61134; CI-NEXT: s_mov_b32 s11, s71135; CI-NEXT: s_waitcnt lgkmcnt(0)1136; CI-NEXT: s_mov_b32 s8, s21137; CI-NEXT: s_mov_b32 s9, s31138; CI-NEXT: buffer_load_dwordx3 v[0:2], off, s[8:11], 01139; CI-NEXT: s_mov_b32 s4, s01140; CI-NEXT: s_mov_b32 s5, s11141; CI-NEXT: s_waitcnt vmcnt(0)1142; CI-NEXT: buffer_store_dwordx3 v[0:2], off, s[4:7], 01143; CI-NEXT: s_endpgm1144 %vec = load <3 x i32>, ptr addrspace(1) %in, align 41145 store <3 x i32> %vec, ptr addrspace(1) %out1146 ret void1147}1148; GCN: ScratchSize: 0{{$}}1149 1150define amdgpu_kernel void @copy_v3i64_align4(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) #0 {1151; GCN-LABEL: copy_v3i64_align4:1152; GCN: ; %bb.0:1153; GCN-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91154; GCN-NEXT: s_mov_b32 s7, 0xf0001155; GCN-NEXT: s_mov_b32 s6, -11156; GCN-NEXT: s_mov_b32 s10, s61157; GCN-NEXT: s_mov_b32 s11, s71158; GCN-NEXT: s_waitcnt lgkmcnt(0)1159; GCN-NEXT: s_mov_b32 s8, s21160; GCN-NEXT: s_mov_b32 s9, s31161; GCN-NEXT: buffer_load_dwordx2 v[4:5], off, s[8:11], 0 offset:161162; GCN-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 01163; GCN-NEXT: s_mov_b32 s4, s01164; GCN-NEXT: s_mov_b32 s5, s11165; GCN-NEXT: s_waitcnt vmcnt(1)1166; GCN-NEXT: buffer_store_dwordx2 v[4:5], off, s[4:7], 0 offset:161167; GCN-NEXT: s_waitcnt vmcnt(1)1168; GCN-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 01169; GCN-NEXT: s_endpgm1170 %vec = load <3 x i64>, ptr addrspace(1) %in, align 41171 store <3 x i64> %vec, ptr addrspace(1) %out1172 ret void1173}1174; GCN: ScratchSize: 0{{$}}1175 1176define amdgpu_kernel void @copy_v3f32_align4(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) #0 {1177; SI-LABEL: copy_v3f32_align4:1178; SI: ; %bb.0:1179; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91180; SI-NEXT: s_mov_b32 s7, 0xf0001181; SI-NEXT: s_mov_b32 s6, -11182; SI-NEXT: s_mov_b32 s10, s61183; SI-NEXT: s_mov_b32 s11, s71184; SI-NEXT: s_waitcnt lgkmcnt(0)1185; SI-NEXT: s_mov_b32 s8, s21186; SI-NEXT: s_mov_b32 s9, s31187; SI-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 01188; SI-NEXT: buffer_load_dword v2, off, s[8:11], 0 offset:81189; SI-NEXT: s_mov_b32 s4, s01190; SI-NEXT: s_mov_b32 s5, s11191; SI-NEXT: s_waitcnt vmcnt(1)1192; SI-NEXT: v_add_f32_e32 v1, 2.0, v11193; SI-NEXT: s_waitcnt vmcnt(0)1194; SI-NEXT: v_add_f32_e32 v2, 4.0, v21195; SI-NEXT: v_add_f32_e32 v0, 1.0, v01196; SI-NEXT: buffer_store_dword v2, off, s[4:7], 0 offset:81197; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 01198; SI-NEXT: s_endpgm1199;1200; CI-LABEL: copy_v3f32_align4:1201; CI: ; %bb.0:1202; CI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91203; CI-NEXT: s_mov_b32 s7, 0xf0001204; CI-NEXT: s_mov_b32 s6, -11205; CI-NEXT: s_mov_b32 s10, s61206; CI-NEXT: s_mov_b32 s11, s71207; CI-NEXT: s_waitcnt lgkmcnt(0)1208; CI-NEXT: s_mov_b32 s8, s21209; CI-NEXT: s_mov_b32 s9, s31210; CI-NEXT: buffer_load_dwordx3 v[0:2], off, s[8:11], 01211; CI-NEXT: s_mov_b32 s4, s01212; CI-NEXT: s_mov_b32 s5, s11213; CI-NEXT: s_waitcnt vmcnt(0)1214; CI-NEXT: v_add_f32_e32 v2, 4.0, v21215; CI-NEXT: v_add_f32_e32 v1, 2.0, v11216; CI-NEXT: v_add_f32_e32 v0, 1.0, v01217; CI-NEXT: buffer_store_dwordx3 v[0:2], off, s[4:7], 01218; CI-NEXT: s_endpgm1219 %vec = load <3 x float>, ptr addrspace(1) %in, align 41220 %fadd = fadd <3 x float> %vec, <float 1.0, float 2.0, float 4.0>1221 store <3 x float> %fadd, ptr addrspace(1) %out1222 ret void1223}1224; GCN: ScratchSize: 0{{$}}1225 1226define amdgpu_kernel void @copy_v3f64_align4(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) #0 {1227; GCN-LABEL: copy_v3f64_align4:1228; GCN: ; %bb.0:1229; GCN-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91230; GCN-NEXT: s_mov_b32 s7, 0xf0001231; GCN-NEXT: s_mov_b32 s6, -11232; GCN-NEXT: s_mov_b32 s10, s61233; GCN-NEXT: s_mov_b32 s11, s71234; GCN-NEXT: s_waitcnt lgkmcnt(0)1235; GCN-NEXT: s_mov_b32 s8, s21236; GCN-NEXT: s_mov_b32 s9, s31237; GCN-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 01238; GCN-NEXT: buffer_load_dwordx2 v[4:5], off, s[8:11], 0 offset:161239; GCN-NEXT: s_mov_b32 s4, s01240; GCN-NEXT: s_mov_b32 s5, s11241; GCN-NEXT: s_waitcnt vmcnt(1)1242; GCN-NEXT: v_add_f64 v[2:3], v[2:3], 2.01243; GCN-NEXT: s_waitcnt vmcnt(0)1244; GCN-NEXT: v_add_f64 v[4:5], v[4:5], 4.01245; GCN-NEXT: v_add_f64 v[0:1], v[0:1], 1.01246; GCN-NEXT: buffer_store_dwordx2 v[4:5], off, s[4:7], 0 offset:161247; GCN-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 01248; GCN-NEXT: s_endpgm1249 %vec = load <3 x double>, ptr addrspace(1) %in, align 41250 %fadd = fadd <3 x double> %vec, <double 1.0, double 2.0, double 4.0>1251 store <3 x double> %fadd, ptr addrspace(1) %out1252 ret void1253}1254; GCN: ScratchSize: 0{{$}}1255 1256declare void @llvm.amdgcn.s.barrier() #11257 1258attributes #0 = { nounwind }1259attributes #1 = { convergent nounwind }1260