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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -verify-machineinstrs -mtriple=amdgcn -mcpu=gfx908 < %s | FileCheck -enable-var-scope -check-prefixes=GFX908 %s3; RUN: llc -verify-machineinstrs -mtriple=amdgcn -mcpu=gfx90a < %s | FileCheck -enable-var-scope -check-prefixes=GFX90A %s4; RUN: llc -verify-machineinstrs -mtriple=amdgcn -mcpu=gfx942 < %s | FileCheck -enable-var-scope -check-prefixes=GFX942 %s5 6 7; Check that we do not copy agprs to vgprs and back inside the loop.8; Final result should be read only once after the loop.9 10define amdgpu_kernel void @test_mfma_loop_zeroinit(ptr addrspace(1) %arg) #0 {11; GFX908-LABEL: test_mfma_loop_zeroinit:12; GFX908: ; %bb.0: ; %entry13; GFX908-NEXT: v_accvgpr_write_b32 a31, 014; GFX908-NEXT: v_accvgpr_write_b32 a30, 015; GFX908-NEXT: v_accvgpr_write_b32 a29, 016; GFX908-NEXT: v_accvgpr_write_b32 a28, 017; GFX908-NEXT: v_accvgpr_write_b32 a27, 018; GFX908-NEXT: v_accvgpr_write_b32 a26, 019; GFX908-NEXT: v_accvgpr_write_b32 a25, 020; GFX908-NEXT: v_accvgpr_write_b32 a24, 021; GFX908-NEXT: v_accvgpr_write_b32 a23, 022; GFX908-NEXT: v_accvgpr_write_b32 a22, 023; GFX908-NEXT: v_accvgpr_write_b32 a21, 024; GFX908-NEXT: v_accvgpr_write_b32 a20, 025; GFX908-NEXT: v_accvgpr_write_b32 a19, 026; GFX908-NEXT: v_accvgpr_write_b32 a18, 027; GFX908-NEXT: v_accvgpr_write_b32 a17, 028; GFX908-NEXT: v_accvgpr_write_b32 a16, 029; GFX908-NEXT: v_accvgpr_write_b32 a15, 030; GFX908-NEXT: v_accvgpr_write_b32 a14, 031; GFX908-NEXT: v_accvgpr_write_b32 a13, 032; GFX908-NEXT: v_accvgpr_write_b32 a12, 033; GFX908-NEXT: v_accvgpr_write_b32 a11, 034; GFX908-NEXT: v_accvgpr_write_b32 a10, 035; GFX908-NEXT: v_accvgpr_write_b32 a9, 036; GFX908-NEXT: v_accvgpr_write_b32 a8, 037; GFX908-NEXT: v_accvgpr_write_b32 a7, 038; GFX908-NEXT: v_accvgpr_write_b32 a6, 039; GFX908-NEXT: v_accvgpr_write_b32 a5, 040; GFX908-NEXT: v_accvgpr_write_b32 a4, 041; GFX908-NEXT: v_accvgpr_write_b32 a3, 042; GFX908-NEXT: v_accvgpr_write_b32 a2, 043; GFX908-NEXT: v_accvgpr_write_b32 a1, 044; GFX908-NEXT: v_accvgpr_write_b32 a0, 045; GFX908-NEXT: s_mov_b32 s0, 1646; GFX908-NEXT: v_mov_b32_e32 v0, 2.047; GFX908-NEXT: v_mov_b32_e32 v1, 1.048; GFX908-NEXT: .LBB0_1: ; %for.cond.preheader49; GFX908-NEXT: ; =>This Inner Loop Header: Depth=150; GFX908-NEXT: s_nop 151; GFX908-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v1, v0, a[0:31]52; GFX908-NEXT: s_add_i32 s0, s0, -153; GFX908-NEXT: s_cmp_lg_u32 s0, 054; GFX908-NEXT: s_cbranch_scc1 .LBB0_155; GFX908-NEXT: ; %bb.2: ; %exit56; GFX908-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2457; GFX908-NEXT: s_nop 1358; GFX908-NEXT: v_accvgpr_read_b32 v0, a059; GFX908-NEXT: v_accvgpr_read_b32 v28, a2860; GFX908-NEXT: v_accvgpr_read_b32 v29, a2961; GFX908-NEXT: v_accvgpr_read_b32 v30, a3062; GFX908-NEXT: v_accvgpr_read_b32 v31, a3163; GFX908-NEXT: v_mov_b32_e32 v32, 064; GFX908-NEXT: v_accvgpr_read_b32 v1, a165; GFX908-NEXT: v_accvgpr_read_b32 v2, a266; GFX908-NEXT: v_accvgpr_read_b32 v3, a367; GFX908-NEXT: v_accvgpr_read_b32 v4, a468; GFX908-NEXT: v_accvgpr_read_b32 v5, a569; GFX908-NEXT: v_accvgpr_read_b32 v6, a670; GFX908-NEXT: v_accvgpr_read_b32 v7, a771; GFX908-NEXT: v_accvgpr_read_b32 v8, a872; GFX908-NEXT: v_accvgpr_read_b32 v9, a973; GFX908-NEXT: v_accvgpr_read_b32 v10, a1074; GFX908-NEXT: v_accvgpr_read_b32 v11, a1175; GFX908-NEXT: v_accvgpr_read_b32 v12, a1276; GFX908-NEXT: v_accvgpr_read_b32 v13, a1377; GFX908-NEXT: v_accvgpr_read_b32 v14, a1478; GFX908-NEXT: v_accvgpr_read_b32 v15, a1579; GFX908-NEXT: v_accvgpr_read_b32 v16, a1680; GFX908-NEXT: v_accvgpr_read_b32 v17, a1781; GFX908-NEXT: v_accvgpr_read_b32 v18, a1882; GFX908-NEXT: v_accvgpr_read_b32 v19, a1983; GFX908-NEXT: v_accvgpr_read_b32 v20, a2084; GFX908-NEXT: v_accvgpr_read_b32 v21, a2185; GFX908-NEXT: v_accvgpr_read_b32 v22, a2286; GFX908-NEXT: v_accvgpr_read_b32 v23, a2387; GFX908-NEXT: v_accvgpr_read_b32 v24, a2488; GFX908-NEXT: v_accvgpr_read_b32 v25, a2589; GFX908-NEXT: v_accvgpr_read_b32 v26, a2690; GFX908-NEXT: v_accvgpr_read_b32 v27, a2791; GFX908-NEXT: s_waitcnt lgkmcnt(0)92; GFX908-NEXT: global_store_dwordx4 v32, v[28:31], s[0:1] offset:11293; GFX908-NEXT: global_store_dwordx4 v32, v[24:27], s[0:1] offset:9694; GFX908-NEXT: global_store_dwordx4 v32, v[20:23], s[0:1] offset:8095; GFX908-NEXT: global_store_dwordx4 v32, v[16:19], s[0:1] offset:6496; GFX908-NEXT: global_store_dwordx4 v32, v[12:15], s[0:1] offset:4897; GFX908-NEXT: global_store_dwordx4 v32, v[8:11], s[0:1] offset:3298; GFX908-NEXT: global_store_dwordx4 v32, v[4:7], s[0:1] offset:1699; GFX908-NEXT: global_store_dwordx4 v32, v[0:3], s[0:1]100; GFX908-NEXT: s_endpgm101;102; GFX90A-LABEL: test_mfma_loop_zeroinit:103; GFX90A: ; %bb.0: ; %entry104; GFX90A-NEXT: s_mov_b32 s0, 16105; GFX90A-NEXT: v_mov_b32_e32 v0, 0106; GFX90A-NEXT: v_mov_b32_e32 v1, 0107; GFX90A-NEXT: v_mov_b32_e32 v2, 0108; GFX90A-NEXT: v_mov_b32_e32 v3, 0109; GFX90A-NEXT: v_mov_b32_e32 v4, 0110; GFX90A-NEXT: v_mov_b32_e32 v5, 0111; GFX90A-NEXT: v_mov_b32_e32 v6, 0112; GFX90A-NEXT: v_mov_b32_e32 v7, 0113; GFX90A-NEXT: v_mov_b32_e32 v8, 0114; GFX90A-NEXT: v_mov_b32_e32 v9, 0115; GFX90A-NEXT: v_mov_b32_e32 v10, 0116; GFX90A-NEXT: v_mov_b32_e32 v11, 0117; GFX90A-NEXT: v_mov_b32_e32 v12, 0118; GFX90A-NEXT: v_mov_b32_e32 v13, 0119; GFX90A-NEXT: v_mov_b32_e32 v14, 0120; GFX90A-NEXT: v_mov_b32_e32 v15, 0121; GFX90A-NEXT: v_mov_b32_e32 v16, 0122; GFX90A-NEXT: v_mov_b32_e32 v17, 0123; GFX90A-NEXT: v_mov_b32_e32 v18, 0124; GFX90A-NEXT: v_mov_b32_e32 v19, 0125; GFX90A-NEXT: v_mov_b32_e32 v20, 0126; GFX90A-NEXT: v_mov_b32_e32 v21, 0127; GFX90A-NEXT: v_mov_b32_e32 v22, 0128; GFX90A-NEXT: v_mov_b32_e32 v23, 0129; GFX90A-NEXT: v_mov_b32_e32 v24, 0130; GFX90A-NEXT: v_mov_b32_e32 v25, 0131; GFX90A-NEXT: v_mov_b32_e32 v26, 0132; GFX90A-NEXT: v_mov_b32_e32 v27, 0133; GFX90A-NEXT: v_mov_b32_e32 v28, 0134; GFX90A-NEXT: v_mov_b32_e32 v29, 0135; GFX90A-NEXT: v_mov_b32_e32 v30, 0136; GFX90A-NEXT: v_mov_b32_e32 v31, 0137; GFX90A-NEXT: v_mov_b32_e32 v32, 1.0138; GFX90A-NEXT: .LBB0_1: ; %for.cond.preheader139; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1140; GFX90A-NEXT: v_accvgpr_write_b32 a0, v0141; GFX90A-NEXT: v_accvgpr_write_b32 a1, v1142; GFX90A-NEXT: v_accvgpr_write_b32 a2, v2143; GFX90A-NEXT: v_accvgpr_write_b32 a3, v3144; GFX90A-NEXT: v_accvgpr_write_b32 a4, v4145; GFX90A-NEXT: v_accvgpr_write_b32 a5, v5146; GFX90A-NEXT: v_accvgpr_write_b32 a6, v6147; GFX90A-NEXT: v_accvgpr_write_b32 a7, v7148; GFX90A-NEXT: v_accvgpr_write_b32 a8, v8149; GFX90A-NEXT: v_accvgpr_write_b32 a9, v9150; GFX90A-NEXT: v_accvgpr_write_b32 a10, v10151; GFX90A-NEXT: v_accvgpr_write_b32 a11, v11152; GFX90A-NEXT: v_accvgpr_write_b32 a12, v12153; GFX90A-NEXT: v_accvgpr_write_b32 a13, v13154; GFX90A-NEXT: v_accvgpr_write_b32 a14, v14155; GFX90A-NEXT: v_accvgpr_write_b32 a15, v15156; GFX90A-NEXT: v_accvgpr_write_b32 a16, v16157; GFX90A-NEXT: v_accvgpr_write_b32 a17, v17158; GFX90A-NEXT: v_accvgpr_write_b32 a18, v18159; GFX90A-NEXT: v_accvgpr_write_b32 a19, v19160; GFX90A-NEXT: v_accvgpr_write_b32 a20, v20161; GFX90A-NEXT: v_accvgpr_write_b32 a21, v21162; GFX90A-NEXT: v_accvgpr_write_b32 a22, v22163; GFX90A-NEXT: v_accvgpr_write_b32 a23, v23164; GFX90A-NEXT: v_accvgpr_write_b32 a24, v24165; GFX90A-NEXT: v_accvgpr_write_b32 a25, v25166; GFX90A-NEXT: v_accvgpr_write_b32 a26, v26167; GFX90A-NEXT: v_accvgpr_write_b32 a27, v27168; GFX90A-NEXT: v_accvgpr_write_b32 a28, v28169; GFX90A-NEXT: v_accvgpr_write_b32 a29, v29170; GFX90A-NEXT: v_accvgpr_write_b32 a30, v30171; GFX90A-NEXT: v_accvgpr_write_b32 a31, v31172; GFX90A-NEXT: v_mov_b32_e32 v0, 2.0173; GFX90A-NEXT: s_add_i32 s0, s0, -1174; GFX90A-NEXT: s_cmp_lg_u32 s0, 0175; GFX90A-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v32, v0, a[0:31]176; GFX90A-NEXT: s_nop 15177; GFX90A-NEXT: s_nop 2178; GFX90A-NEXT: v_accvgpr_read_b32 v0, a0179; GFX90A-NEXT: v_accvgpr_read_b32 v1, a1180; GFX90A-NEXT: v_accvgpr_read_b32 v2, a2181; GFX90A-NEXT: v_accvgpr_read_b32 v3, a3182; GFX90A-NEXT: v_accvgpr_read_b32 v4, a4183; GFX90A-NEXT: v_accvgpr_read_b32 v5, a5184; GFX90A-NEXT: v_accvgpr_read_b32 v6, a6185; GFX90A-NEXT: v_accvgpr_read_b32 v7, a7186; GFX90A-NEXT: v_accvgpr_read_b32 v8, a8187; GFX90A-NEXT: v_accvgpr_read_b32 v9, a9188; GFX90A-NEXT: v_accvgpr_read_b32 v10, a10189; GFX90A-NEXT: v_accvgpr_read_b32 v11, a11190; GFX90A-NEXT: v_accvgpr_read_b32 v12, a12191; GFX90A-NEXT: v_accvgpr_read_b32 v13, a13192; GFX90A-NEXT: v_accvgpr_read_b32 v14, a14193; GFX90A-NEXT: v_accvgpr_read_b32 v15, a15194; GFX90A-NEXT: v_accvgpr_read_b32 v16, a16195; GFX90A-NEXT: v_accvgpr_read_b32 v17, a17196; GFX90A-NEXT: v_accvgpr_read_b32 v18, a18197; GFX90A-NEXT: v_accvgpr_read_b32 v19, a19198; GFX90A-NEXT: v_accvgpr_read_b32 v20, a20199; GFX90A-NEXT: v_accvgpr_read_b32 v21, a21200; GFX90A-NEXT: v_accvgpr_read_b32 v22, a22201; GFX90A-NEXT: v_accvgpr_read_b32 v23, a23202; GFX90A-NEXT: v_accvgpr_read_b32 v24, a24203; GFX90A-NEXT: v_accvgpr_read_b32 v25, a25204; GFX90A-NEXT: v_accvgpr_read_b32 v26, a26205; GFX90A-NEXT: v_accvgpr_read_b32 v27, a27206; GFX90A-NEXT: v_accvgpr_read_b32 v28, a28207; GFX90A-NEXT: v_accvgpr_read_b32 v29, a29208; GFX90A-NEXT: v_accvgpr_read_b32 v30, a30209; GFX90A-NEXT: v_accvgpr_read_b32 v31, a31210; GFX90A-NEXT: s_cbranch_scc1 .LBB0_1211; GFX90A-NEXT: ; %bb.2: ; %exit212; GFX90A-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24213; GFX90A-NEXT: v_mov_b32_e32 v0, 0214; GFX90A-NEXT: s_waitcnt lgkmcnt(0)215; GFX90A-NEXT: global_store_dwordx4 v0, a[28:31], s[0:1] offset:112216; GFX90A-NEXT: global_store_dwordx4 v0, a[24:27], s[0:1] offset:96217; GFX90A-NEXT: global_store_dwordx4 v0, a[20:23], s[0:1] offset:80218; GFX90A-NEXT: global_store_dwordx4 v0, a[16:19], s[0:1] offset:64219; GFX90A-NEXT: global_store_dwordx4 v0, a[12:15], s[0:1] offset:48220; GFX90A-NEXT: global_store_dwordx4 v0, a[8:11], s[0:1] offset:32221; GFX90A-NEXT: global_store_dwordx4 v0, a[4:7], s[0:1] offset:16222; GFX90A-NEXT: global_store_dwordx4 v0, a[0:3], s[0:1]223; GFX90A-NEXT: s_endpgm224;225; GFX942-LABEL: test_mfma_loop_zeroinit:226; GFX942: ; %bb.0: ; %entry227; GFX942-NEXT: s_mov_b32 s0, 16228; GFX942-NEXT: v_mov_b32_e32 v0, 0229; GFX942-NEXT: v_mov_b32_e32 v1, 0230; GFX942-NEXT: v_mov_b32_e32 v2, 0231; GFX942-NEXT: v_mov_b32_e32 v3, 0232; GFX942-NEXT: v_mov_b32_e32 v4, 0233; GFX942-NEXT: v_mov_b32_e32 v5, 0234; GFX942-NEXT: v_mov_b32_e32 v6, 0235; GFX942-NEXT: v_mov_b32_e32 v7, 0236; GFX942-NEXT: v_mov_b32_e32 v8, 0237; GFX942-NEXT: v_mov_b32_e32 v9, 0238; GFX942-NEXT: v_mov_b32_e32 v10, 0239; GFX942-NEXT: v_mov_b32_e32 v11, 0240; GFX942-NEXT: v_mov_b32_e32 v12, 0241; GFX942-NEXT: v_mov_b32_e32 v13, 0242; GFX942-NEXT: v_mov_b32_e32 v14, 0243; GFX942-NEXT: v_mov_b32_e32 v15, 0244; GFX942-NEXT: v_mov_b32_e32 v16, 0245; GFX942-NEXT: v_mov_b32_e32 v17, 0246; GFX942-NEXT: v_mov_b32_e32 v18, 0247; GFX942-NEXT: v_mov_b32_e32 v19, 0248; GFX942-NEXT: v_mov_b32_e32 v20, 0249; GFX942-NEXT: v_mov_b32_e32 v21, 0250; GFX942-NEXT: v_mov_b32_e32 v22, 0251; GFX942-NEXT: v_mov_b32_e32 v23, 0252; GFX942-NEXT: v_mov_b32_e32 v24, 0253; GFX942-NEXT: v_mov_b32_e32 v25, 0254; GFX942-NEXT: v_mov_b32_e32 v26, 0255; GFX942-NEXT: v_mov_b32_e32 v27, 0256; GFX942-NEXT: v_mov_b32_e32 v28, 0257; GFX942-NEXT: v_mov_b32_e32 v29, 0258; GFX942-NEXT: v_mov_b32_e32 v30, 0259; GFX942-NEXT: v_mov_b32_e32 v31, 0260; GFX942-NEXT: v_mov_b32_e32 v32, 1.0261; GFX942-NEXT: .LBB0_1: ; %for.cond.preheader262; GFX942-NEXT: ; =>This Inner Loop Header: Depth=1263; GFX942-NEXT: v_accvgpr_write_b32 a0, v0264; GFX942-NEXT: v_accvgpr_write_b32 a1, v1265; GFX942-NEXT: v_accvgpr_write_b32 a2, v2266; GFX942-NEXT: v_accvgpr_write_b32 a3, v3267; GFX942-NEXT: v_accvgpr_write_b32 a4, v4268; GFX942-NEXT: v_accvgpr_write_b32 a5, v5269; GFX942-NEXT: v_accvgpr_write_b32 a6, v6270; GFX942-NEXT: v_accvgpr_write_b32 a7, v7271; GFX942-NEXT: v_accvgpr_write_b32 a8, v8272; GFX942-NEXT: v_accvgpr_write_b32 a9, v9273; GFX942-NEXT: v_accvgpr_write_b32 a10, v10274; GFX942-NEXT: v_accvgpr_write_b32 a11, v11275; GFX942-NEXT: v_accvgpr_write_b32 a12, v12276; GFX942-NEXT: v_accvgpr_write_b32 a13, v13277; GFX942-NEXT: v_accvgpr_write_b32 a14, v14278; GFX942-NEXT: v_accvgpr_write_b32 a15, v15279; GFX942-NEXT: v_accvgpr_write_b32 a16, v16280; GFX942-NEXT: v_accvgpr_write_b32 a17, v17281; GFX942-NEXT: v_accvgpr_write_b32 a18, v18282; GFX942-NEXT: v_accvgpr_write_b32 a19, v19283; GFX942-NEXT: v_accvgpr_write_b32 a20, v20284; GFX942-NEXT: v_accvgpr_write_b32 a21, v21285; GFX942-NEXT: v_accvgpr_write_b32 a22, v22286; GFX942-NEXT: v_accvgpr_write_b32 a23, v23287; GFX942-NEXT: v_accvgpr_write_b32 a24, v24288; GFX942-NEXT: v_accvgpr_write_b32 a25, v25289; GFX942-NEXT: v_accvgpr_write_b32 a26, v26290; GFX942-NEXT: v_accvgpr_write_b32 a27, v27291; GFX942-NEXT: v_accvgpr_write_b32 a28, v28292; GFX942-NEXT: v_accvgpr_write_b32 a29, v29293; GFX942-NEXT: v_accvgpr_write_b32 a30, v30294; GFX942-NEXT: v_accvgpr_write_b32 a31, v31295; GFX942-NEXT: v_mov_b32_e32 v0, 2.0296; GFX942-NEXT: s_add_i32 s0, s0, -1297; GFX942-NEXT: s_cmp_lg_u32 s0, 0298; GFX942-NEXT: v_mfma_f32_32x32x1_2b_f32 a[0:31], v32, v0, a[0:31]299; GFX942-NEXT: s_nop 15300; GFX942-NEXT: s_nop 1301; GFX942-NEXT: v_accvgpr_read_b32 v0, a0302; GFX942-NEXT: v_accvgpr_read_b32 v1, a1303; GFX942-NEXT: v_accvgpr_read_b32 v2, a2304; GFX942-NEXT: v_accvgpr_read_b32 v3, a3305; GFX942-NEXT: v_accvgpr_read_b32 v4, a4306; GFX942-NEXT: v_accvgpr_read_b32 v5, a5307; GFX942-NEXT: v_accvgpr_read_b32 v6, a6308; GFX942-NEXT: v_accvgpr_read_b32 v7, a7309; GFX942-NEXT: v_accvgpr_read_b32 v8, a8310; GFX942-NEXT: v_accvgpr_read_b32 v9, a9311; GFX942-NEXT: v_accvgpr_read_b32 v10, a10312; GFX942-NEXT: v_accvgpr_read_b32 v11, a11313; GFX942-NEXT: v_accvgpr_read_b32 v12, a12314; GFX942-NEXT: v_accvgpr_read_b32 v13, a13315; GFX942-NEXT: v_accvgpr_read_b32 v14, a14316; GFX942-NEXT: v_accvgpr_read_b32 v15, a15317; GFX942-NEXT: v_accvgpr_read_b32 v16, a16318; GFX942-NEXT: v_accvgpr_read_b32 v17, a17319; GFX942-NEXT: v_accvgpr_read_b32 v18, a18320; GFX942-NEXT: v_accvgpr_read_b32 v19, a19321; GFX942-NEXT: v_accvgpr_read_b32 v20, a20322; GFX942-NEXT: v_accvgpr_read_b32 v21, a21323; GFX942-NEXT: v_accvgpr_read_b32 v22, a22324; GFX942-NEXT: v_accvgpr_read_b32 v23, a23325; GFX942-NEXT: v_accvgpr_read_b32 v24, a24326; GFX942-NEXT: v_accvgpr_read_b32 v25, a25327; GFX942-NEXT: v_accvgpr_read_b32 v26, a26328; GFX942-NEXT: v_accvgpr_read_b32 v27, a27329; GFX942-NEXT: v_accvgpr_read_b32 v28, a28330; GFX942-NEXT: v_accvgpr_read_b32 v29, a29331; GFX942-NEXT: v_accvgpr_read_b32 v30, a30332; GFX942-NEXT: v_accvgpr_read_b32 v31, a31333; GFX942-NEXT: s_cbranch_scc1 .LBB0_1334; GFX942-NEXT: ; %bb.2: ; %exit335; GFX942-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24336; GFX942-NEXT: v_mov_b32_e32 v0, 0337; GFX942-NEXT: s_waitcnt lgkmcnt(0)338; GFX942-NEXT: global_store_dwordx4 v0, a[28:31], s[0:1] offset:112339; GFX942-NEXT: global_store_dwordx4 v0, a[24:27], s[0:1] offset:96340; GFX942-NEXT: global_store_dwordx4 v0, a[20:23], s[0:1] offset:80341; GFX942-NEXT: global_store_dwordx4 v0, a[16:19], s[0:1] offset:64342; GFX942-NEXT: global_store_dwordx4 v0, a[12:15], s[0:1] offset:48343; GFX942-NEXT: global_store_dwordx4 v0, a[8:11], s[0:1] offset:32344; GFX942-NEXT: global_store_dwordx4 v0, a[4:7], s[0:1] offset:16345; GFX942-NEXT: global_store_dwordx4 v0, a[0:3], s[0:1]346; GFX942-NEXT: s_endpgm347entry:348 br label %for.cond.preheader349 350for.cond.preheader:351 %phi = phi <32 x float> [ zeroinitializer, %entry ], [ %mai.1, %for.cond.preheader ]352 %c = phi i32 [ 0, %entry ], [ %inc, %for.cond.preheader ]353 %mai.1 = tail call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float 1.0, float 2.0, <32 x float> %phi, i32 0, i32 0, i32 0)354 %inc = add nuw nsw i32 %c, 1355 %cc = icmp eq i32 %inc, 16356 br i1 %cc, label %exit, label %for.cond.preheader357 358exit:359 store <32 x float> %mai.1, ptr addrspace(1) %arg360 ret void361}362 363 364; Check that we do not use 32 temp vgprs, but rotate 3 vgprs only.365; 3 vgprs are needed to avoid wait states between writes.366; Check that we do not use 32 temp sgprs as well.367 368define amdgpu_kernel void @test_mfma_loop_unfoldable_splat(ptr addrspace(1) %arg) #0 {369; GFX908-LABEL: test_mfma_loop_unfoldable_splat:370; GFX908: ; %bb.0: ; %entry371; GFX908-NEXT: v_mov_b32_e32 v0, 0x42f60000372; GFX908-NEXT: s_mov_b32 s0, 16373; GFX908-NEXT: v_mov_b32_e32 v1, 1.0374; GFX908-NEXT: v_accvgpr_write_b32 a31, v0375; GFX908-NEXT: v_accvgpr_write_b32 a30, v0376; GFX908-NEXT: v_accvgpr_write_b32 a29, v0377; GFX908-NEXT: v_accvgpr_write_b32 a28, v0378; GFX908-NEXT: v_accvgpr_write_b32 a27, v0379; GFX908-NEXT: v_accvgpr_write_b32 a26, v0380; GFX908-NEXT: v_accvgpr_write_b32 a25, v0381; GFX908-NEXT: v_accvgpr_write_b32 a24, v0382; GFX908-NEXT: v_accvgpr_write_b32 a23, v0383; GFX908-NEXT: v_accvgpr_write_b32 a22, v0384; GFX908-NEXT: v_accvgpr_write_b32 a21, v0385; GFX908-NEXT: v_accvgpr_write_b32 a20, v0386; GFX908-NEXT: v_accvgpr_write_b32 a19, v0387; GFX908-NEXT: v_accvgpr_write_b32 a18, v0388; GFX908-NEXT: v_accvgpr_write_b32 a17, v0389; GFX908-NEXT: v_accvgpr_write_b32 a16, v0390; GFX908-NEXT: v_accvgpr_write_b32 a15, v0391; GFX908-NEXT: v_accvgpr_write_b32 a14, v0392; GFX908-NEXT: v_accvgpr_write_b32 a13, v0393; GFX908-NEXT: v_accvgpr_write_b32 a12, v0394; GFX908-NEXT: v_accvgpr_write_b32 a11, v0395; GFX908-NEXT: v_accvgpr_write_b32 a10, v0396; GFX908-NEXT: v_accvgpr_write_b32 a9, v0397; GFX908-NEXT: v_accvgpr_write_b32 a8, v0398; GFX908-NEXT: v_accvgpr_write_b32 a7, v0399; GFX908-NEXT: v_accvgpr_write_b32 a6, v0400; GFX908-NEXT: v_accvgpr_write_b32 a5, v0401; GFX908-NEXT: v_accvgpr_write_b32 a4, v0402; GFX908-NEXT: v_accvgpr_write_b32 a3, v0403; GFX908-NEXT: v_accvgpr_write_b32 a2, v0404; GFX908-NEXT: v_accvgpr_write_b32 a1, v0405; GFX908-NEXT: v_accvgpr_write_b32 a0, v0406; GFX908-NEXT: v_mov_b32_e32 v0, 2.0407; GFX908-NEXT: .LBB1_1: ; %for.cond.preheader408; GFX908-NEXT: ; =>This Inner Loop Header: Depth=1409; GFX908-NEXT: s_nop 1410; GFX908-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v1, v0, a[0:31]411; GFX908-NEXT: s_add_i32 s0, s0, -1412; GFX908-NEXT: s_cmp_lg_u32 s0, 0413; GFX908-NEXT: s_cbranch_scc1 .LBB1_1414; GFX908-NEXT: ; %bb.2: ; %exit415; GFX908-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24416; GFX908-NEXT: s_nop 13417; GFX908-NEXT: v_accvgpr_read_b32 v0, a0418; GFX908-NEXT: v_accvgpr_read_b32 v28, a28419; GFX908-NEXT: v_accvgpr_read_b32 v29, a29420; GFX908-NEXT: v_accvgpr_read_b32 v30, a30421; GFX908-NEXT: v_accvgpr_read_b32 v31, a31422; GFX908-NEXT: v_mov_b32_e32 v32, 0423; GFX908-NEXT: v_accvgpr_read_b32 v1, a1424; GFX908-NEXT: v_accvgpr_read_b32 v2, a2425; GFX908-NEXT: v_accvgpr_read_b32 v3, a3426; GFX908-NEXT: v_accvgpr_read_b32 v4, a4427; GFX908-NEXT: v_accvgpr_read_b32 v5, a5428; GFX908-NEXT: v_accvgpr_read_b32 v6, a6429; GFX908-NEXT: v_accvgpr_read_b32 v7, a7430; GFX908-NEXT: v_accvgpr_read_b32 v8, a8431; GFX908-NEXT: v_accvgpr_read_b32 v9, a9432; GFX908-NEXT: v_accvgpr_read_b32 v10, a10433; GFX908-NEXT: v_accvgpr_read_b32 v11, a11434; GFX908-NEXT: v_accvgpr_read_b32 v12, a12435; GFX908-NEXT: v_accvgpr_read_b32 v13, a13436; GFX908-NEXT: v_accvgpr_read_b32 v14, a14437; GFX908-NEXT: v_accvgpr_read_b32 v15, a15438; GFX908-NEXT: v_accvgpr_read_b32 v16, a16439; GFX908-NEXT: v_accvgpr_read_b32 v17, a17440; GFX908-NEXT: v_accvgpr_read_b32 v18, a18441; GFX908-NEXT: v_accvgpr_read_b32 v19, a19442; GFX908-NEXT: v_accvgpr_read_b32 v20, a20443; GFX908-NEXT: v_accvgpr_read_b32 v21, a21444; GFX908-NEXT: v_accvgpr_read_b32 v22, a22445; GFX908-NEXT: v_accvgpr_read_b32 v23, a23446; GFX908-NEXT: v_accvgpr_read_b32 v24, a24447; GFX908-NEXT: v_accvgpr_read_b32 v25, a25448; GFX908-NEXT: v_accvgpr_read_b32 v26, a26449; GFX908-NEXT: v_accvgpr_read_b32 v27, a27450; GFX908-NEXT: s_waitcnt lgkmcnt(0)451; GFX908-NEXT: global_store_dwordx4 v32, v[28:31], s[0:1] offset:112452; GFX908-NEXT: global_store_dwordx4 v32, v[24:27], s[0:1] offset:96453; GFX908-NEXT: global_store_dwordx4 v32, v[20:23], s[0:1] offset:80454; GFX908-NEXT: global_store_dwordx4 v32, v[16:19], s[0:1] offset:64455; GFX908-NEXT: global_store_dwordx4 v32, v[12:15], s[0:1] offset:48456; GFX908-NEXT: global_store_dwordx4 v32, v[8:11], s[0:1] offset:32457; GFX908-NEXT: global_store_dwordx4 v32, v[4:7], s[0:1] offset:16458; GFX908-NEXT: global_store_dwordx4 v32, v[0:3], s[0:1]459; GFX908-NEXT: s_endpgm460;461; GFX90A-LABEL: test_mfma_loop_unfoldable_splat:462; GFX90A: ; %bb.0: ; %entry463; GFX90A-NEXT: v_mov_b32_e32 v31, 0x42f60000464; GFX90A-NEXT: s_mov_b32 s0, 16465; GFX90A-NEXT: v_mov_b32_e32 v0, v31466; GFX90A-NEXT: v_mov_b32_e32 v1, v31467; GFX90A-NEXT: v_mov_b32_e32 v2, v31468; GFX90A-NEXT: v_mov_b32_e32 v3, v31469; GFX90A-NEXT: v_mov_b32_e32 v4, v31470; GFX90A-NEXT: v_mov_b32_e32 v5, v31471; GFX90A-NEXT: v_mov_b32_e32 v6, v31472; GFX90A-NEXT: v_mov_b32_e32 v7, v31473; GFX90A-NEXT: v_mov_b32_e32 v8, v31474; GFX90A-NEXT: v_mov_b32_e32 v9, v31475; GFX90A-NEXT: v_mov_b32_e32 v10, v31476; GFX90A-NEXT: v_mov_b32_e32 v11, v31477; GFX90A-NEXT: v_mov_b32_e32 v12, v31478; GFX90A-NEXT: v_mov_b32_e32 v13, v31479; GFX90A-NEXT: v_mov_b32_e32 v14, v31480; GFX90A-NEXT: v_mov_b32_e32 v15, v31481; GFX90A-NEXT: v_mov_b32_e32 v16, v31482; GFX90A-NEXT: v_mov_b32_e32 v17, v31483; GFX90A-NEXT: v_mov_b32_e32 v18, v31484; GFX90A-NEXT: v_mov_b32_e32 v19, v31485; GFX90A-NEXT: v_mov_b32_e32 v20, v31486; GFX90A-NEXT: v_mov_b32_e32 v21, v31487; GFX90A-NEXT: v_mov_b32_e32 v22, v31488; GFX90A-NEXT: v_mov_b32_e32 v23, v31489; GFX90A-NEXT: v_mov_b32_e32 v24, v31490; GFX90A-NEXT: v_mov_b32_e32 v25, v31491; GFX90A-NEXT: v_mov_b32_e32 v26, v31492; GFX90A-NEXT: v_mov_b32_e32 v27, v31493; GFX90A-NEXT: v_mov_b32_e32 v28, v31494; GFX90A-NEXT: v_mov_b32_e32 v29, v31495; GFX90A-NEXT: v_mov_b32_e32 v30, v31496; GFX90A-NEXT: v_mov_b32_e32 v32, 1.0497; GFX90A-NEXT: .LBB1_1: ; %for.cond.preheader498; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1499; GFX90A-NEXT: v_accvgpr_write_b32 a0, v0500; GFX90A-NEXT: v_accvgpr_write_b32 a1, v1501; GFX90A-NEXT: v_accvgpr_write_b32 a2, v2502; GFX90A-NEXT: v_accvgpr_write_b32 a3, v3503; GFX90A-NEXT: v_accvgpr_write_b32 a4, v4504; GFX90A-NEXT: v_accvgpr_write_b32 a5, v5505; GFX90A-NEXT: v_accvgpr_write_b32 a6, v6506; GFX90A-NEXT: v_accvgpr_write_b32 a7, v7507; GFX90A-NEXT: v_accvgpr_write_b32 a8, v8508; GFX90A-NEXT: v_accvgpr_write_b32 a9, v9509; GFX90A-NEXT: v_accvgpr_write_b32 a10, v10510; GFX90A-NEXT: v_accvgpr_write_b32 a11, v11511; GFX90A-NEXT: v_accvgpr_write_b32 a12, v12512; GFX90A-NEXT: v_accvgpr_write_b32 a13, v13513; GFX90A-NEXT: v_accvgpr_write_b32 a14, v14514; GFX90A-NEXT: v_accvgpr_write_b32 a15, v15515; GFX90A-NEXT: v_accvgpr_write_b32 a16, v16516; GFX90A-NEXT: v_accvgpr_write_b32 a17, v17517; GFX90A-NEXT: v_accvgpr_write_b32 a18, v18518; GFX90A-NEXT: v_accvgpr_write_b32 a19, v19519; GFX90A-NEXT: v_accvgpr_write_b32 a20, v20520; GFX90A-NEXT: v_accvgpr_write_b32 a21, v21521; GFX90A-NEXT: v_accvgpr_write_b32 a22, v22522; GFX90A-NEXT: v_accvgpr_write_b32 a23, v23523; GFX90A-NEXT: v_accvgpr_write_b32 a24, v24524; GFX90A-NEXT: v_accvgpr_write_b32 a25, v25525; GFX90A-NEXT: v_accvgpr_write_b32 a26, v26526; GFX90A-NEXT: v_accvgpr_write_b32 a27, v27527; GFX90A-NEXT: v_accvgpr_write_b32 a28, v28528; GFX90A-NEXT: v_accvgpr_write_b32 a29, v29529; GFX90A-NEXT: v_accvgpr_write_b32 a30, v30530; GFX90A-NEXT: v_accvgpr_write_b32 a31, v31531; GFX90A-NEXT: v_mov_b32_e32 v0, 2.0532; GFX90A-NEXT: s_add_i32 s0, s0, -1533; GFX90A-NEXT: s_cmp_lg_u32 s0, 0534; GFX90A-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v32, v0, a[0:31]535; GFX90A-NEXT: s_nop 15536; GFX90A-NEXT: s_nop 2537; GFX90A-NEXT: v_accvgpr_read_b32 v0, a0538; GFX90A-NEXT: v_accvgpr_read_b32 v1, a1539; GFX90A-NEXT: v_accvgpr_read_b32 v2, a2540; GFX90A-NEXT: v_accvgpr_read_b32 v3, a3541; GFX90A-NEXT: v_accvgpr_read_b32 v4, a4542; GFX90A-NEXT: v_accvgpr_read_b32 v5, a5543; GFX90A-NEXT: v_accvgpr_read_b32 v6, a6544; GFX90A-NEXT: v_accvgpr_read_b32 v7, a7545; GFX90A-NEXT: v_accvgpr_read_b32 v8, a8546; GFX90A-NEXT: v_accvgpr_read_b32 v9, a9547; GFX90A-NEXT: v_accvgpr_read_b32 v10, a10548; GFX90A-NEXT: v_accvgpr_read_b32 v11, a11549; GFX90A-NEXT: v_accvgpr_read_b32 v12, a12550; GFX90A-NEXT: v_accvgpr_read_b32 v13, a13551; GFX90A-NEXT: v_accvgpr_read_b32 v14, a14552; GFX90A-NEXT: v_accvgpr_read_b32 v15, a15553; GFX90A-NEXT: v_accvgpr_read_b32 v16, a16554; GFX90A-NEXT: v_accvgpr_read_b32 v17, a17555; GFX90A-NEXT: v_accvgpr_read_b32 v18, a18556; GFX90A-NEXT: v_accvgpr_read_b32 v19, a19557; GFX90A-NEXT: v_accvgpr_read_b32 v20, a20558; GFX90A-NEXT: v_accvgpr_read_b32 v21, a21559; GFX90A-NEXT: v_accvgpr_read_b32 v22, a22560; GFX90A-NEXT: v_accvgpr_read_b32 v23, a23561; GFX90A-NEXT: v_accvgpr_read_b32 v24, a24562; GFX90A-NEXT: v_accvgpr_read_b32 v25, a25563; GFX90A-NEXT: v_accvgpr_read_b32 v26, a26564; GFX90A-NEXT: v_accvgpr_read_b32 v27, a27565; GFX90A-NEXT: v_accvgpr_read_b32 v28, a28566; GFX90A-NEXT: v_accvgpr_read_b32 v29, a29567; GFX90A-NEXT: v_accvgpr_read_b32 v30, a30568; GFX90A-NEXT: v_accvgpr_read_b32 v31, a31569; GFX90A-NEXT: s_cbranch_scc1 .LBB1_1570; GFX90A-NEXT: ; %bb.2: ; %exit571; GFX90A-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24572; GFX90A-NEXT: v_mov_b32_e32 v0, 0573; GFX90A-NEXT: s_waitcnt lgkmcnt(0)574; GFX90A-NEXT: global_store_dwordx4 v0, a[28:31], s[0:1] offset:112575; GFX90A-NEXT: global_store_dwordx4 v0, a[24:27], s[0:1] offset:96576; GFX90A-NEXT: global_store_dwordx4 v0, a[20:23], s[0:1] offset:80577; GFX90A-NEXT: global_store_dwordx4 v0, a[16:19], s[0:1] offset:64578; GFX90A-NEXT: global_store_dwordx4 v0, a[12:15], s[0:1] offset:48579; GFX90A-NEXT: global_store_dwordx4 v0, a[8:11], s[0:1] offset:32580; GFX90A-NEXT: global_store_dwordx4 v0, a[4:7], s[0:1] offset:16581; GFX90A-NEXT: global_store_dwordx4 v0, a[0:3], s[0:1]582; GFX90A-NEXT: s_endpgm583;584; GFX942-LABEL: test_mfma_loop_unfoldable_splat:585; GFX942: ; %bb.0: ; %entry586; GFX942-NEXT: v_mov_b32_e32 v31, 0x42f60000587; GFX942-NEXT: s_mov_b32 s0, 16588; GFX942-NEXT: v_mov_b32_e32 v0, v31589; GFX942-NEXT: v_mov_b32_e32 v1, v31590; GFX942-NEXT: v_mov_b32_e32 v2, v31591; GFX942-NEXT: v_mov_b32_e32 v3, v31592; GFX942-NEXT: v_mov_b32_e32 v4, v31593; GFX942-NEXT: v_mov_b32_e32 v5, v31594; GFX942-NEXT: v_mov_b32_e32 v6, v31595; GFX942-NEXT: v_mov_b32_e32 v7, v31596; GFX942-NEXT: v_mov_b32_e32 v8, v31597; GFX942-NEXT: v_mov_b32_e32 v9, v31598; GFX942-NEXT: v_mov_b32_e32 v10, v31599; GFX942-NEXT: v_mov_b32_e32 v11, v31600; GFX942-NEXT: v_mov_b32_e32 v12, v31601; GFX942-NEXT: v_mov_b32_e32 v13, v31602; GFX942-NEXT: v_mov_b32_e32 v14, v31603; GFX942-NEXT: v_mov_b32_e32 v15, v31604; GFX942-NEXT: v_mov_b32_e32 v16, v31605; GFX942-NEXT: v_mov_b32_e32 v17, v31606; GFX942-NEXT: v_mov_b32_e32 v18, v31607; GFX942-NEXT: v_mov_b32_e32 v19, v31608; GFX942-NEXT: v_mov_b32_e32 v20, v31609; GFX942-NEXT: v_mov_b32_e32 v21, v31610; GFX942-NEXT: v_mov_b32_e32 v22, v31611; GFX942-NEXT: v_mov_b32_e32 v23, v31612; GFX942-NEXT: v_mov_b32_e32 v24, v31613; GFX942-NEXT: v_mov_b32_e32 v25, v31614; GFX942-NEXT: v_mov_b32_e32 v26, v31615; GFX942-NEXT: v_mov_b32_e32 v27, v31616; GFX942-NEXT: v_mov_b32_e32 v28, v31617; GFX942-NEXT: v_mov_b32_e32 v29, v31618; GFX942-NEXT: v_mov_b32_e32 v30, v31619; GFX942-NEXT: v_mov_b32_e32 v32, 1.0620; GFX942-NEXT: .LBB1_1: ; %for.cond.preheader621; GFX942-NEXT: ; =>This Inner Loop Header: Depth=1622; GFX942-NEXT: v_accvgpr_write_b32 a0, v0623; GFX942-NEXT: v_accvgpr_write_b32 a1, v1624; GFX942-NEXT: v_accvgpr_write_b32 a2, v2625; GFX942-NEXT: v_accvgpr_write_b32 a3, v3626; GFX942-NEXT: v_accvgpr_write_b32 a4, v4627; GFX942-NEXT: v_accvgpr_write_b32 a5, v5628; GFX942-NEXT: v_accvgpr_write_b32 a6, v6629; GFX942-NEXT: v_accvgpr_write_b32 a7, v7630; GFX942-NEXT: v_accvgpr_write_b32 a8, v8631; GFX942-NEXT: v_accvgpr_write_b32 a9, v9632; GFX942-NEXT: v_accvgpr_write_b32 a10, v10633; GFX942-NEXT: v_accvgpr_write_b32 a11, v11634; GFX942-NEXT: v_accvgpr_write_b32 a12, v12635; GFX942-NEXT: v_accvgpr_write_b32 a13, v13636; GFX942-NEXT: v_accvgpr_write_b32 a14, v14637; GFX942-NEXT: v_accvgpr_write_b32 a15, v15638; GFX942-NEXT: v_accvgpr_write_b32 a16, v16639; GFX942-NEXT: v_accvgpr_write_b32 a17, v17640; GFX942-NEXT: v_accvgpr_write_b32 a18, v18641; GFX942-NEXT: v_accvgpr_write_b32 a19, v19642; GFX942-NEXT: v_accvgpr_write_b32 a20, v20643; GFX942-NEXT: v_accvgpr_write_b32 a21, v21644; GFX942-NEXT: v_accvgpr_write_b32 a22, v22645; GFX942-NEXT: v_accvgpr_write_b32 a23, v23646; GFX942-NEXT: v_accvgpr_write_b32 a24, v24647; GFX942-NEXT: v_accvgpr_write_b32 a25, v25648; GFX942-NEXT: v_accvgpr_write_b32 a26, v26649; GFX942-NEXT: v_accvgpr_write_b32 a27, v27650; GFX942-NEXT: v_accvgpr_write_b32 a28, v28651; GFX942-NEXT: v_accvgpr_write_b32 a29, v29652; GFX942-NEXT: v_accvgpr_write_b32 a30, v30653; GFX942-NEXT: v_accvgpr_write_b32 a31, v31654; GFX942-NEXT: v_mov_b32_e32 v0, 2.0655; GFX942-NEXT: s_add_i32 s0, s0, -1656; GFX942-NEXT: s_cmp_lg_u32 s0, 0657; GFX942-NEXT: v_mfma_f32_32x32x1_2b_f32 a[0:31], v32, v0, a[0:31]658; GFX942-NEXT: s_nop 15659; GFX942-NEXT: s_nop 1660; GFX942-NEXT: v_accvgpr_read_b32 v0, a0661; GFX942-NEXT: v_accvgpr_read_b32 v1, a1662; GFX942-NEXT: v_accvgpr_read_b32 v2, a2663; GFX942-NEXT: v_accvgpr_read_b32 v3, a3664; GFX942-NEXT: v_accvgpr_read_b32 v4, a4665; GFX942-NEXT: v_accvgpr_read_b32 v5, a5666; GFX942-NEXT: v_accvgpr_read_b32 v6, a6667; GFX942-NEXT: v_accvgpr_read_b32 v7, a7668; GFX942-NEXT: v_accvgpr_read_b32 v8, a8669; GFX942-NEXT: v_accvgpr_read_b32 v9, a9670; GFX942-NEXT: v_accvgpr_read_b32 v10, a10671; GFX942-NEXT: v_accvgpr_read_b32 v11, a11672; GFX942-NEXT: v_accvgpr_read_b32 v12, a12673; GFX942-NEXT: v_accvgpr_read_b32 v13, a13674; GFX942-NEXT: v_accvgpr_read_b32 v14, a14675; GFX942-NEXT: v_accvgpr_read_b32 v15, a15676; GFX942-NEXT: v_accvgpr_read_b32 v16, a16677; GFX942-NEXT: v_accvgpr_read_b32 v17, a17678; GFX942-NEXT: v_accvgpr_read_b32 v18, a18679; GFX942-NEXT: v_accvgpr_read_b32 v19, a19680; GFX942-NEXT: v_accvgpr_read_b32 v20, a20681; GFX942-NEXT: v_accvgpr_read_b32 v21, a21682; GFX942-NEXT: v_accvgpr_read_b32 v22, a22683; GFX942-NEXT: v_accvgpr_read_b32 v23, a23684; GFX942-NEXT: v_accvgpr_read_b32 v24, a24685; GFX942-NEXT: v_accvgpr_read_b32 v25, a25686; GFX942-NEXT: v_accvgpr_read_b32 v26, a26687; GFX942-NEXT: v_accvgpr_read_b32 v27, a27688; GFX942-NEXT: v_accvgpr_read_b32 v28, a28689; GFX942-NEXT: v_accvgpr_read_b32 v29, a29690; GFX942-NEXT: v_accvgpr_read_b32 v30, a30691; GFX942-NEXT: v_accvgpr_read_b32 v31, a31692; GFX942-NEXT: s_cbranch_scc1 .LBB1_1693; GFX942-NEXT: ; %bb.2: ; %exit694; GFX942-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24695; GFX942-NEXT: v_mov_b32_e32 v0, 0696; GFX942-NEXT: s_waitcnt lgkmcnt(0)697; GFX942-NEXT: global_store_dwordx4 v0, a[28:31], s[0:1] offset:112698; GFX942-NEXT: global_store_dwordx4 v0, a[24:27], s[0:1] offset:96699; GFX942-NEXT: global_store_dwordx4 v0, a[20:23], s[0:1] offset:80700; GFX942-NEXT: global_store_dwordx4 v0, a[16:19], s[0:1] offset:64701; GFX942-NEXT: global_store_dwordx4 v0, a[12:15], s[0:1] offset:48702; GFX942-NEXT: global_store_dwordx4 v0, a[8:11], s[0:1] offset:32703; GFX942-NEXT: global_store_dwordx4 v0, a[4:7], s[0:1] offset:16704; GFX942-NEXT: global_store_dwordx4 v0, a[0:3], s[0:1]705; GFX942-NEXT: s_endpgm706entry:707 br label %for.cond.preheader708 709for.cond.preheader:710 %phi = phi <32 x float> [ <float 123.0, float 123.0, float 123.0, float 123.0, float 123.0, float 123.0, float 123.0, float 123.0, float 123.0, float 123.0, float 123.0, float 123.0, float 123.0, float 123.0, float 123.0, float 123.0, float 123.0, float 123.0, float 123.0, float 123.0, float 123.0, float 123.0, float 123.0, float 123.0, float 123.0, float 123.0, float 123.0, float 123.0, float 123.0, float 123.0, float 123.0, float 123.0>, %entry ], [ %mai.1, %for.cond.preheader ]711 %c = phi i32 [ 0, %entry ], [ %inc, %for.cond.preheader ]712 %mai.1 = tail call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float 1.0, float 2.0, <32 x float> %phi, i32 0, i32 0, i32 0)713 %inc = add nuw nsw i32 %c, 1714 %cc = icmp eq i32 %inc, 16715 br i1 %cc, label %exit, label %for.cond.preheader716 717exit:718 store <32 x float> %mai.1, ptr addrspace(1) %arg719 ret void720}721 722define amdgpu_kernel void @test_mfma_loop_non_splat(ptr addrspace(1) %arg) #0 {723; GFX908-LABEL: test_mfma_loop_non_splat:724; GFX908: ; %bb.0: ; %entry725; GFX908-NEXT: v_accvgpr_write_b32 a1, 1.0726; GFX908-NEXT: v_accvgpr_write_b32 a31, 0727; GFX908-NEXT: v_accvgpr_write_b32 a30, 0728; GFX908-NEXT: v_accvgpr_write_b32 a29, 0729; GFX908-NEXT: v_accvgpr_write_b32 a28, 0730; GFX908-NEXT: v_accvgpr_write_b32 a27, 0731; GFX908-NEXT: v_accvgpr_write_b32 a26, 0732; GFX908-NEXT: v_accvgpr_write_b32 a25, 0733; GFX908-NEXT: v_accvgpr_write_b32 a24, 0734; GFX908-NEXT: v_accvgpr_write_b32 a23, 0735; GFX908-NEXT: v_accvgpr_write_b32 a22, 0736; GFX908-NEXT: v_accvgpr_write_b32 a21, 0737; GFX908-NEXT: v_accvgpr_write_b32 a20, 0738; GFX908-NEXT: v_accvgpr_write_b32 a19, 0739; GFX908-NEXT: v_accvgpr_write_b32 a18, 0740; GFX908-NEXT: v_accvgpr_write_b32 a17, 0741; GFX908-NEXT: v_accvgpr_write_b32 a16, 0742; GFX908-NEXT: v_accvgpr_write_b32 a15, 0743; GFX908-NEXT: v_accvgpr_write_b32 a14, 0744; GFX908-NEXT: v_accvgpr_write_b32 a13, 0745; GFX908-NEXT: v_accvgpr_write_b32 a12, 0746; GFX908-NEXT: v_accvgpr_write_b32 a11, 0747; GFX908-NEXT: v_accvgpr_write_b32 a10, 0748; GFX908-NEXT: v_accvgpr_write_b32 a9, 0749; GFX908-NEXT: v_accvgpr_write_b32 a8, 0750; GFX908-NEXT: v_accvgpr_write_b32 a7, 0751; GFX908-NEXT: v_accvgpr_write_b32 a6, 0752; GFX908-NEXT: v_accvgpr_write_b32 a5, 0753; GFX908-NEXT: v_accvgpr_write_b32 a4, 0754; GFX908-NEXT: v_accvgpr_write_b32 a3, 0755; GFX908-NEXT: v_accvgpr_write_b32 a2, 0756; GFX908-NEXT: v_accvgpr_write_b32 a0, 0757; GFX908-NEXT: v_mov_b32_e32 v0, 1.0758; GFX908-NEXT: s_mov_b32 s0, 16759; GFX908-NEXT: v_mov_b32_e32 v1, 2.0760; GFX908-NEXT: .LBB2_1: ; %for.cond.preheader761; GFX908-NEXT: ; =>This Inner Loop Header: Depth=1762; GFX908-NEXT: s_nop 1763; GFX908-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v0, v1, a[0:31]764; GFX908-NEXT: s_add_i32 s0, s0, -1765; GFX908-NEXT: s_cmp_lg_u32 s0, 0766; GFX908-NEXT: s_cbranch_scc1 .LBB2_1767; GFX908-NEXT: ; %bb.2: ; %exit768; GFX908-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24769; GFX908-NEXT: s_nop 13770; GFX908-NEXT: v_accvgpr_read_b32 v0, a0771; GFX908-NEXT: v_accvgpr_read_b32 v28, a28772; GFX908-NEXT: v_accvgpr_read_b32 v29, a29773; GFX908-NEXT: v_accvgpr_read_b32 v30, a30774; GFX908-NEXT: v_accvgpr_read_b32 v31, a31775; GFX908-NEXT: v_mov_b32_e32 v32, 0776; GFX908-NEXT: v_accvgpr_read_b32 v1, a1777; GFX908-NEXT: v_accvgpr_read_b32 v2, a2778; GFX908-NEXT: v_accvgpr_read_b32 v3, a3779; GFX908-NEXT: v_accvgpr_read_b32 v4, a4780; GFX908-NEXT: v_accvgpr_read_b32 v5, a5781; GFX908-NEXT: v_accvgpr_read_b32 v6, a6782; GFX908-NEXT: v_accvgpr_read_b32 v7, a7783; GFX908-NEXT: v_accvgpr_read_b32 v8, a8784; GFX908-NEXT: v_accvgpr_read_b32 v9, a9785; GFX908-NEXT: v_accvgpr_read_b32 v10, a10786; GFX908-NEXT: v_accvgpr_read_b32 v11, a11787; GFX908-NEXT: v_accvgpr_read_b32 v12, a12788; GFX908-NEXT: v_accvgpr_read_b32 v13, a13789; GFX908-NEXT: v_accvgpr_read_b32 v14, a14790; GFX908-NEXT: v_accvgpr_read_b32 v15, a15791; GFX908-NEXT: v_accvgpr_read_b32 v16, a16792; GFX908-NEXT: v_accvgpr_read_b32 v17, a17793; GFX908-NEXT: v_accvgpr_read_b32 v18, a18794; GFX908-NEXT: v_accvgpr_read_b32 v19, a19795; GFX908-NEXT: v_accvgpr_read_b32 v20, a20796; GFX908-NEXT: v_accvgpr_read_b32 v21, a21797; GFX908-NEXT: v_accvgpr_read_b32 v22, a22798; GFX908-NEXT: v_accvgpr_read_b32 v23, a23799; GFX908-NEXT: v_accvgpr_read_b32 v24, a24800; GFX908-NEXT: v_accvgpr_read_b32 v25, a25801; GFX908-NEXT: v_accvgpr_read_b32 v26, a26802; GFX908-NEXT: v_accvgpr_read_b32 v27, a27803; GFX908-NEXT: s_waitcnt lgkmcnt(0)804; GFX908-NEXT: global_store_dwordx4 v32, v[28:31], s[0:1] offset:112805; GFX908-NEXT: global_store_dwordx4 v32, v[24:27], s[0:1] offset:96806; GFX908-NEXT: global_store_dwordx4 v32, v[20:23], s[0:1] offset:80807; GFX908-NEXT: global_store_dwordx4 v32, v[16:19], s[0:1] offset:64808; GFX908-NEXT: global_store_dwordx4 v32, v[12:15], s[0:1] offset:48809; GFX908-NEXT: global_store_dwordx4 v32, v[8:11], s[0:1] offset:32810; GFX908-NEXT: global_store_dwordx4 v32, v[4:7], s[0:1] offset:16811; GFX908-NEXT: global_store_dwordx4 v32, v[0:3], s[0:1]812; GFX908-NEXT: s_endpgm813;814; GFX90A-LABEL: test_mfma_loop_non_splat:815; GFX90A: ; %bb.0: ; %entry816; GFX90A-NEXT: s_mov_b32 s0, 16817; GFX90A-NEXT: v_mov_b32_e32 v0, 0818; GFX90A-NEXT: v_mov_b32_e32 v1, 1.0819; GFX90A-NEXT: v_mov_b32_e32 v2, 0820; GFX90A-NEXT: v_mov_b32_e32 v3, 0821; GFX90A-NEXT: v_mov_b32_e32 v4, 0822; GFX90A-NEXT: v_mov_b32_e32 v5, 0823; GFX90A-NEXT: v_mov_b32_e32 v6, 0824; GFX90A-NEXT: v_mov_b32_e32 v7, 0825; GFX90A-NEXT: v_mov_b32_e32 v8, 0826; GFX90A-NEXT: v_mov_b32_e32 v9, 0827; GFX90A-NEXT: v_mov_b32_e32 v10, 0828; GFX90A-NEXT: v_mov_b32_e32 v11, 0829; GFX90A-NEXT: v_mov_b32_e32 v12, 0830; GFX90A-NEXT: v_mov_b32_e32 v13, 0831; GFX90A-NEXT: v_mov_b32_e32 v14, 0832; GFX90A-NEXT: v_mov_b32_e32 v15, 0833; GFX90A-NEXT: v_mov_b32_e32 v16, 0834; GFX90A-NEXT: v_mov_b32_e32 v17, 0835; GFX90A-NEXT: v_mov_b32_e32 v18, 0836; GFX90A-NEXT: v_mov_b32_e32 v19, 0837; GFX90A-NEXT: v_mov_b32_e32 v20, 0838; GFX90A-NEXT: v_mov_b32_e32 v21, 0839; GFX90A-NEXT: v_mov_b32_e32 v22, 0840; GFX90A-NEXT: v_mov_b32_e32 v23, 0841; GFX90A-NEXT: v_mov_b32_e32 v24, 0842; GFX90A-NEXT: v_mov_b32_e32 v25, 0843; GFX90A-NEXT: v_mov_b32_e32 v26, 0844; GFX90A-NEXT: v_mov_b32_e32 v27, 0845; GFX90A-NEXT: v_mov_b32_e32 v28, 0846; GFX90A-NEXT: v_mov_b32_e32 v29, 0847; GFX90A-NEXT: v_mov_b32_e32 v30, 0848; GFX90A-NEXT: v_mov_b32_e32 v31, 0849; GFX90A-NEXT: v_mov_b32_e32 v32, 1.0850; GFX90A-NEXT: .LBB2_1: ; %for.cond.preheader851; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1852; GFX90A-NEXT: v_accvgpr_write_b32 a0, v0853; GFX90A-NEXT: v_accvgpr_write_b32 a1, v1854; GFX90A-NEXT: v_accvgpr_write_b32 a2, v2855; GFX90A-NEXT: v_accvgpr_write_b32 a3, v3856; GFX90A-NEXT: v_accvgpr_write_b32 a4, v4857; GFX90A-NEXT: v_accvgpr_write_b32 a5, v5858; GFX90A-NEXT: v_accvgpr_write_b32 a6, v6859; GFX90A-NEXT: v_accvgpr_write_b32 a7, v7860; GFX90A-NEXT: v_accvgpr_write_b32 a8, v8861; GFX90A-NEXT: v_accvgpr_write_b32 a9, v9862; GFX90A-NEXT: v_accvgpr_write_b32 a10, v10863; GFX90A-NEXT: v_accvgpr_write_b32 a11, v11864; GFX90A-NEXT: v_accvgpr_write_b32 a12, v12865; GFX90A-NEXT: v_accvgpr_write_b32 a13, v13866; GFX90A-NEXT: v_accvgpr_write_b32 a14, v14867; GFX90A-NEXT: v_accvgpr_write_b32 a15, v15868; GFX90A-NEXT: v_accvgpr_write_b32 a16, v16869; GFX90A-NEXT: v_accvgpr_write_b32 a17, v17870; GFX90A-NEXT: v_accvgpr_write_b32 a18, v18871; GFX90A-NEXT: v_accvgpr_write_b32 a19, v19872; GFX90A-NEXT: v_accvgpr_write_b32 a20, v20873; GFX90A-NEXT: v_accvgpr_write_b32 a21, v21874; GFX90A-NEXT: v_accvgpr_write_b32 a22, v22875; GFX90A-NEXT: v_accvgpr_write_b32 a23, v23876; GFX90A-NEXT: v_accvgpr_write_b32 a24, v24877; GFX90A-NEXT: v_accvgpr_write_b32 a25, v25878; GFX90A-NEXT: v_accvgpr_write_b32 a26, v26879; GFX90A-NEXT: v_accvgpr_write_b32 a27, v27880; GFX90A-NEXT: v_accvgpr_write_b32 a28, v28881; GFX90A-NEXT: v_accvgpr_write_b32 a29, v29882; GFX90A-NEXT: v_accvgpr_write_b32 a30, v30883; GFX90A-NEXT: v_accvgpr_write_b32 a31, v31884; GFX90A-NEXT: v_mov_b32_e32 v0, 2.0885; GFX90A-NEXT: s_add_i32 s0, s0, -1886; GFX90A-NEXT: s_cmp_lg_u32 s0, 0887; GFX90A-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v32, v0, a[0:31]888; GFX90A-NEXT: s_nop 15889; GFX90A-NEXT: s_nop 2890; GFX90A-NEXT: v_accvgpr_read_b32 v0, a0891; GFX90A-NEXT: v_accvgpr_read_b32 v1, a1892; GFX90A-NEXT: v_accvgpr_read_b32 v2, a2893; GFX90A-NEXT: v_accvgpr_read_b32 v3, a3894; GFX90A-NEXT: v_accvgpr_read_b32 v4, a4895; GFX90A-NEXT: v_accvgpr_read_b32 v5, a5896; GFX90A-NEXT: v_accvgpr_read_b32 v6, a6897; GFX90A-NEXT: v_accvgpr_read_b32 v7, a7898; GFX90A-NEXT: v_accvgpr_read_b32 v8, a8899; GFX90A-NEXT: v_accvgpr_read_b32 v9, a9900; GFX90A-NEXT: v_accvgpr_read_b32 v10, a10901; GFX90A-NEXT: v_accvgpr_read_b32 v11, a11902; GFX90A-NEXT: v_accvgpr_read_b32 v12, a12903; GFX90A-NEXT: v_accvgpr_read_b32 v13, a13904; GFX90A-NEXT: v_accvgpr_read_b32 v14, a14905; GFX90A-NEXT: v_accvgpr_read_b32 v15, a15906; GFX90A-NEXT: v_accvgpr_read_b32 v16, a16907; GFX90A-NEXT: v_accvgpr_read_b32 v17, a17908; GFX90A-NEXT: v_accvgpr_read_b32 v18, a18909; GFX90A-NEXT: v_accvgpr_read_b32 v19, a19910; GFX90A-NEXT: v_accvgpr_read_b32 v20, a20911; GFX90A-NEXT: v_accvgpr_read_b32 v21, a21912; GFX90A-NEXT: v_accvgpr_read_b32 v22, a22913; GFX90A-NEXT: v_accvgpr_read_b32 v23, a23914; GFX90A-NEXT: v_accvgpr_read_b32 v24, a24915; GFX90A-NEXT: v_accvgpr_read_b32 v25, a25916; GFX90A-NEXT: v_accvgpr_read_b32 v26, a26917; GFX90A-NEXT: v_accvgpr_read_b32 v27, a27918; GFX90A-NEXT: v_accvgpr_read_b32 v28, a28919; GFX90A-NEXT: v_accvgpr_read_b32 v29, a29920; GFX90A-NEXT: v_accvgpr_read_b32 v30, a30921; GFX90A-NEXT: v_accvgpr_read_b32 v31, a31922; GFX90A-NEXT: s_cbranch_scc1 .LBB2_1923; GFX90A-NEXT: ; %bb.2: ; %exit924; GFX90A-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24925; GFX90A-NEXT: v_mov_b32_e32 v0, 0926; GFX90A-NEXT: s_waitcnt lgkmcnt(0)927; GFX90A-NEXT: global_store_dwordx4 v0, a[28:31], s[0:1] offset:112928; GFX90A-NEXT: global_store_dwordx4 v0, a[24:27], s[0:1] offset:96929; GFX90A-NEXT: global_store_dwordx4 v0, a[20:23], s[0:1] offset:80930; GFX90A-NEXT: global_store_dwordx4 v0, a[16:19], s[0:1] offset:64931; GFX90A-NEXT: global_store_dwordx4 v0, a[12:15], s[0:1] offset:48932; GFX90A-NEXT: global_store_dwordx4 v0, a[8:11], s[0:1] offset:32933; GFX90A-NEXT: global_store_dwordx4 v0, a[4:7], s[0:1] offset:16934; GFX90A-NEXT: global_store_dwordx4 v0, a[0:3], s[0:1]935; GFX90A-NEXT: s_endpgm936;937; GFX942-LABEL: test_mfma_loop_non_splat:938; GFX942: ; %bb.0: ; %entry939; GFX942-NEXT: s_mov_b32 s0, 16940; GFX942-NEXT: v_mov_b32_e32 v0, 0941; GFX942-NEXT: v_mov_b32_e32 v1, 1.0942; GFX942-NEXT: v_mov_b32_e32 v2, 0943; GFX942-NEXT: v_mov_b32_e32 v3, 0944; GFX942-NEXT: v_mov_b32_e32 v4, 0945; GFX942-NEXT: v_mov_b32_e32 v5, 0946; GFX942-NEXT: v_mov_b32_e32 v6, 0947; GFX942-NEXT: v_mov_b32_e32 v7, 0948; GFX942-NEXT: v_mov_b32_e32 v8, 0949; GFX942-NEXT: v_mov_b32_e32 v9, 0950; GFX942-NEXT: v_mov_b32_e32 v10, 0951; GFX942-NEXT: v_mov_b32_e32 v11, 0952; GFX942-NEXT: v_mov_b32_e32 v12, 0953; GFX942-NEXT: v_mov_b32_e32 v13, 0954; GFX942-NEXT: v_mov_b32_e32 v14, 0955; GFX942-NEXT: v_mov_b32_e32 v15, 0956; GFX942-NEXT: v_mov_b32_e32 v16, 0957; GFX942-NEXT: v_mov_b32_e32 v17, 0958; GFX942-NEXT: v_mov_b32_e32 v18, 0959; GFX942-NEXT: v_mov_b32_e32 v19, 0960; GFX942-NEXT: v_mov_b32_e32 v20, 0961; GFX942-NEXT: v_mov_b32_e32 v21, 0962; GFX942-NEXT: v_mov_b32_e32 v22, 0963; GFX942-NEXT: v_mov_b32_e32 v23, 0964; GFX942-NEXT: v_mov_b32_e32 v24, 0965; GFX942-NEXT: v_mov_b32_e32 v25, 0966; GFX942-NEXT: v_mov_b32_e32 v26, 0967; GFX942-NEXT: v_mov_b32_e32 v27, 0968; GFX942-NEXT: v_mov_b32_e32 v28, 0969; GFX942-NEXT: v_mov_b32_e32 v29, 0970; GFX942-NEXT: v_mov_b32_e32 v30, 0971; GFX942-NEXT: v_mov_b32_e32 v31, 0972; GFX942-NEXT: v_mov_b32_e32 v32, 1.0973; GFX942-NEXT: .LBB2_1: ; %for.cond.preheader974; GFX942-NEXT: ; =>This Inner Loop Header: Depth=1975; GFX942-NEXT: v_accvgpr_write_b32 a0, v0976; GFX942-NEXT: v_accvgpr_write_b32 a1, v1977; GFX942-NEXT: v_accvgpr_write_b32 a2, v2978; GFX942-NEXT: v_accvgpr_write_b32 a3, v3979; GFX942-NEXT: v_accvgpr_write_b32 a4, v4980; GFX942-NEXT: v_accvgpr_write_b32 a5, v5981; GFX942-NEXT: v_accvgpr_write_b32 a6, v6982; GFX942-NEXT: v_accvgpr_write_b32 a7, v7983; GFX942-NEXT: v_accvgpr_write_b32 a8, v8984; GFX942-NEXT: v_accvgpr_write_b32 a9, v9985; GFX942-NEXT: v_accvgpr_write_b32 a10, v10986; GFX942-NEXT: v_accvgpr_write_b32 a11, v11987; GFX942-NEXT: v_accvgpr_write_b32 a12, v12988; GFX942-NEXT: v_accvgpr_write_b32 a13, v13989; GFX942-NEXT: v_accvgpr_write_b32 a14, v14990; GFX942-NEXT: v_accvgpr_write_b32 a15, v15991; GFX942-NEXT: v_accvgpr_write_b32 a16, v16992; GFX942-NEXT: v_accvgpr_write_b32 a17, v17993; GFX942-NEXT: v_accvgpr_write_b32 a18, v18994; GFX942-NEXT: v_accvgpr_write_b32 a19, v19995; GFX942-NEXT: v_accvgpr_write_b32 a20, v20996; GFX942-NEXT: v_accvgpr_write_b32 a21, v21997; GFX942-NEXT: v_accvgpr_write_b32 a22, v22998; GFX942-NEXT: v_accvgpr_write_b32 a23, v23999; GFX942-NEXT: v_accvgpr_write_b32 a24, v241000; GFX942-NEXT: v_accvgpr_write_b32 a25, v251001; GFX942-NEXT: v_accvgpr_write_b32 a26, v261002; GFX942-NEXT: v_accvgpr_write_b32 a27, v271003; GFX942-NEXT: v_accvgpr_write_b32 a28, v281004; GFX942-NEXT: v_accvgpr_write_b32 a29, v291005; GFX942-NEXT: v_accvgpr_write_b32 a30, v301006; GFX942-NEXT: v_accvgpr_write_b32 a31, v311007; GFX942-NEXT: v_mov_b32_e32 v0, 2.01008; GFX942-NEXT: s_add_i32 s0, s0, -11009; GFX942-NEXT: s_cmp_lg_u32 s0, 01010; GFX942-NEXT: v_mfma_f32_32x32x1_2b_f32 a[0:31], v32, v0, a[0:31]1011; GFX942-NEXT: s_nop 151012; GFX942-NEXT: s_nop 11013; GFX942-NEXT: v_accvgpr_read_b32 v0, a01014; GFX942-NEXT: v_accvgpr_read_b32 v1, a11015; GFX942-NEXT: v_accvgpr_read_b32 v2, a21016; GFX942-NEXT: v_accvgpr_read_b32 v3, a31017; GFX942-NEXT: v_accvgpr_read_b32 v4, a41018; GFX942-NEXT: v_accvgpr_read_b32 v5, a51019; GFX942-NEXT: v_accvgpr_read_b32 v6, a61020; GFX942-NEXT: v_accvgpr_read_b32 v7, a71021; GFX942-NEXT: v_accvgpr_read_b32 v8, a81022; GFX942-NEXT: v_accvgpr_read_b32 v9, a91023; GFX942-NEXT: v_accvgpr_read_b32 v10, a101024; GFX942-NEXT: v_accvgpr_read_b32 v11, a111025; GFX942-NEXT: v_accvgpr_read_b32 v12, a121026; GFX942-NEXT: v_accvgpr_read_b32 v13, a131027; GFX942-NEXT: v_accvgpr_read_b32 v14, a141028; GFX942-NEXT: v_accvgpr_read_b32 v15, a151029; GFX942-NEXT: v_accvgpr_read_b32 v16, a161030; GFX942-NEXT: v_accvgpr_read_b32 v17, a171031; GFX942-NEXT: v_accvgpr_read_b32 v18, a181032; GFX942-NEXT: v_accvgpr_read_b32 v19, a191033; GFX942-NEXT: v_accvgpr_read_b32 v20, a201034; GFX942-NEXT: v_accvgpr_read_b32 v21, a211035; GFX942-NEXT: v_accvgpr_read_b32 v22, a221036; GFX942-NEXT: v_accvgpr_read_b32 v23, a231037; GFX942-NEXT: v_accvgpr_read_b32 v24, a241038; GFX942-NEXT: v_accvgpr_read_b32 v25, a251039; GFX942-NEXT: v_accvgpr_read_b32 v26, a261040; GFX942-NEXT: v_accvgpr_read_b32 v27, a271041; GFX942-NEXT: v_accvgpr_read_b32 v28, a281042; GFX942-NEXT: v_accvgpr_read_b32 v29, a291043; GFX942-NEXT: v_accvgpr_read_b32 v30, a301044; GFX942-NEXT: v_accvgpr_read_b32 v31, a311045; GFX942-NEXT: s_cbranch_scc1 .LBB2_11046; GFX942-NEXT: ; %bb.2: ; %exit1047; GFX942-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241048; GFX942-NEXT: v_mov_b32_e32 v0, 01049; GFX942-NEXT: s_waitcnt lgkmcnt(0)1050; GFX942-NEXT: global_store_dwordx4 v0, a[28:31], s[0:1] offset:1121051; GFX942-NEXT: global_store_dwordx4 v0, a[24:27], s[0:1] offset:961052; GFX942-NEXT: global_store_dwordx4 v0, a[20:23], s[0:1] offset:801053; GFX942-NEXT: global_store_dwordx4 v0, a[16:19], s[0:1] offset:641054; GFX942-NEXT: global_store_dwordx4 v0, a[12:15], s[0:1] offset:481055; GFX942-NEXT: global_store_dwordx4 v0, a[8:11], s[0:1] offset:321056; GFX942-NEXT: global_store_dwordx4 v0, a[4:7], s[0:1] offset:161057; GFX942-NEXT: global_store_dwordx4 v0, a[0:3], s[0:1]1058; GFX942-NEXT: s_endpgm1059entry:1060 br label %for.cond.preheader1061 1062for.cond.preheader:1063 %phi = phi <32 x float> [ <float 0.0, float 1.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0>, %entry ], [ %mai.1, %for.cond.preheader ]1064 %c = phi i32 [ 0, %entry ], [ %inc, %for.cond.preheader ]1065 %mai.1 = tail call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float 1.0, float 2.0, <32 x float> %phi, i32 0, i32 0, i32 0)1066 %inc = add nuw nsw i32 %c, 11067 %cc = icmp eq i32 %inc, 161068 br i1 %cc, label %exit, label %for.cond.preheader1069 1070exit:1071 store <32 x float> %mai.1, ptr addrspace(1) %arg1072 ret void1073}1074 1075; Check that we do not use 32 temp vgprs, but rotate 3 vgprs only.1076; 3 vgprs are needed to avoid wait states between writes.1077 1078; FIXME: Constant is now in VGPR instead of SGPR.1079 1080define amdgpu_kernel void @test_mfma_loop_unfoldable_seq(ptr addrspace(1) %arg) #0 {1081; GFX908-LABEL: test_mfma_loop_unfoldable_seq:1082; GFX908: ; %bb.0: ; %entry1083; GFX908-NEXT: v_mov_b32_e32 v0, 0x431a00001084; GFX908-NEXT: v_mov_b32_e32 v1, 0x431900001085; GFX908-NEXT: v_mov_b32_e32 v2, 0x431600001086; GFX908-NEXT: v_accvgpr_write_b32 a31, v01087; GFX908-NEXT: v_accvgpr_write_b32 a30, v11088; GFX908-NEXT: v_mov_b32_e32 v0, 0x431800001089; GFX908-NEXT: v_mov_b32_e32 v1, 0x431700001090; GFX908-NEXT: v_accvgpr_write_b32 a27, v21091; GFX908-NEXT: v_accvgpr_write_b32 a29, v01092; GFX908-NEXT: v_accvgpr_write_b32 a28, v11093; GFX908-NEXT: v_mov_b32_e32 v0, 0x431500001094; GFX908-NEXT: v_mov_b32_e32 v1, 0x431400001095; GFX908-NEXT: v_mov_b32_e32 v2, 0x431300001096; GFX908-NEXT: v_accvgpr_write_b32 a26, v01097; GFX908-NEXT: v_accvgpr_write_b32 a25, v11098; GFX908-NEXT: v_accvgpr_write_b32 a24, v21099; GFX908-NEXT: v_mov_b32_e32 v0, 0x431200001100; GFX908-NEXT: v_mov_b32_e32 v1, 0x431100001101; GFX908-NEXT: v_mov_b32_e32 v2, 0x431000001102; GFX908-NEXT: v_accvgpr_write_b32 a23, v01103; GFX908-NEXT: v_accvgpr_write_b32 a22, v11104; GFX908-NEXT: v_accvgpr_write_b32 a21, v21105; GFX908-NEXT: v_mov_b32_e32 v0, 0x430f00001106; GFX908-NEXT: v_mov_b32_e32 v1, 0x430e00001107; GFX908-NEXT: v_mov_b32_e32 v2, 0x430d00001108; GFX908-NEXT: v_accvgpr_write_b32 a20, v01109; GFX908-NEXT: v_accvgpr_write_b32 a19, v11110; GFX908-NEXT: v_accvgpr_write_b32 a18, v21111; GFX908-NEXT: v_mov_b32_e32 v0, 0x430c00001112; GFX908-NEXT: v_mov_b32_e32 v1, 0x430b00001113; GFX908-NEXT: v_mov_b32_e32 v2, 0x430a00001114; GFX908-NEXT: v_accvgpr_write_b32 a17, v01115; GFX908-NEXT: v_accvgpr_write_b32 a16, v11116; GFX908-NEXT: v_accvgpr_write_b32 a15, v21117; GFX908-NEXT: v_mov_b32_e32 v0, 0x430900001118; GFX908-NEXT: v_mov_b32_e32 v1, 0x430800001119; GFX908-NEXT: v_mov_b32_e32 v2, 0x430700001120; GFX908-NEXT: v_accvgpr_write_b32 a14, v01121; GFX908-NEXT: v_accvgpr_write_b32 a13, v11122; GFX908-NEXT: v_accvgpr_write_b32 a12, v21123; GFX908-NEXT: v_mov_b32_e32 v0, 0x430600001124; GFX908-NEXT: v_mov_b32_e32 v1, 0x430500001125; GFX908-NEXT: v_mov_b32_e32 v2, 0x430400001126; GFX908-NEXT: v_accvgpr_write_b32 a11, v01127; GFX908-NEXT: v_accvgpr_write_b32 a10, v11128; GFX908-NEXT: v_accvgpr_write_b32 a9, v21129; GFX908-NEXT: v_mov_b32_e32 v0, 0x430300001130; GFX908-NEXT: v_mov_b32_e32 v1, 0x430200001131; GFX908-NEXT: v_mov_b32_e32 v2, 0x430100001132; GFX908-NEXT: v_accvgpr_write_b32 a8, v01133; GFX908-NEXT: v_accvgpr_write_b32 a7, v11134; GFX908-NEXT: v_accvgpr_write_b32 a6, v21135; GFX908-NEXT: v_mov_b32_e32 v0, 0x430000001136; GFX908-NEXT: v_mov_b32_e32 v1, 0x42fe00001137; GFX908-NEXT: v_mov_b32_e32 v2, 0x42fc00001138; GFX908-NEXT: v_accvgpr_write_b32 a5, v01139; GFX908-NEXT: v_accvgpr_write_b32 a4, v11140; GFX908-NEXT: v_accvgpr_write_b32 a3, v21141; GFX908-NEXT: v_mov_b32_e32 v0, 0x42fa00001142; GFX908-NEXT: v_mov_b32_e32 v1, 0x42f800001143; GFX908-NEXT: v_mov_b32_e32 v2, 0x42f600001144; GFX908-NEXT: v_accvgpr_write_b32 a2, v01145; GFX908-NEXT: v_accvgpr_write_b32 a1, v11146; GFX908-NEXT: v_accvgpr_write_b32 a0, v21147; GFX908-NEXT: s_mov_b32 s0, 161148; GFX908-NEXT: v_mov_b32_e32 v0, 2.01149; GFX908-NEXT: v_mov_b32_e32 v1, 1.01150; GFX908-NEXT: .LBB3_1: ; %for.cond.preheader1151; GFX908-NEXT: ; =>This Inner Loop Header: Depth=11152; GFX908-NEXT: s_nop 11153; GFX908-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v1, v0, a[0:31]1154; GFX908-NEXT: s_add_i32 s0, s0, -11155; GFX908-NEXT: s_cmp_lg_u32 s0, 01156; GFX908-NEXT: s_cbranch_scc1 .LBB3_11157; GFX908-NEXT: ; %bb.2: ; %exit1158; GFX908-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241159; GFX908-NEXT: s_nop 131160; GFX908-NEXT: v_accvgpr_read_b32 v0, a01161; GFX908-NEXT: v_accvgpr_read_b32 v28, a281162; GFX908-NEXT: v_accvgpr_read_b32 v29, a291163; GFX908-NEXT: v_accvgpr_read_b32 v30, a301164; GFX908-NEXT: v_accvgpr_read_b32 v31, a311165; GFX908-NEXT: v_mov_b32_e32 v32, 01166; GFX908-NEXT: v_accvgpr_read_b32 v1, a11167; GFX908-NEXT: v_accvgpr_read_b32 v2, a21168; GFX908-NEXT: v_accvgpr_read_b32 v3, a31169; GFX908-NEXT: v_accvgpr_read_b32 v4, a41170; GFX908-NEXT: v_accvgpr_read_b32 v5, a51171; GFX908-NEXT: v_accvgpr_read_b32 v6, a61172; GFX908-NEXT: v_accvgpr_read_b32 v7, a71173; GFX908-NEXT: v_accvgpr_read_b32 v8, a81174; GFX908-NEXT: v_accvgpr_read_b32 v9, a91175; GFX908-NEXT: v_accvgpr_read_b32 v10, a101176; GFX908-NEXT: v_accvgpr_read_b32 v11, a111177; GFX908-NEXT: v_accvgpr_read_b32 v12, a121178; GFX908-NEXT: v_accvgpr_read_b32 v13, a131179; GFX908-NEXT: v_accvgpr_read_b32 v14, a141180; GFX908-NEXT: v_accvgpr_read_b32 v15, a151181; GFX908-NEXT: v_accvgpr_read_b32 v16, a161182; GFX908-NEXT: v_accvgpr_read_b32 v17, a171183; GFX908-NEXT: v_accvgpr_read_b32 v18, a181184; GFX908-NEXT: v_accvgpr_read_b32 v19, a191185; GFX908-NEXT: v_accvgpr_read_b32 v20, a201186; GFX908-NEXT: v_accvgpr_read_b32 v21, a211187; GFX908-NEXT: v_accvgpr_read_b32 v22, a221188; GFX908-NEXT: v_accvgpr_read_b32 v23, a231189; GFX908-NEXT: v_accvgpr_read_b32 v24, a241190; GFX908-NEXT: v_accvgpr_read_b32 v25, a251191; GFX908-NEXT: v_accvgpr_read_b32 v26, a261192; GFX908-NEXT: v_accvgpr_read_b32 v27, a271193; GFX908-NEXT: s_waitcnt lgkmcnt(0)1194; GFX908-NEXT: global_store_dwordx4 v32, v[28:31], s[0:1] offset:1121195; GFX908-NEXT: global_store_dwordx4 v32, v[24:27], s[0:1] offset:961196; GFX908-NEXT: global_store_dwordx4 v32, v[20:23], s[0:1] offset:801197; GFX908-NEXT: global_store_dwordx4 v32, v[16:19], s[0:1] offset:641198; GFX908-NEXT: global_store_dwordx4 v32, v[12:15], s[0:1] offset:481199; GFX908-NEXT: global_store_dwordx4 v32, v[8:11], s[0:1] offset:321200; GFX908-NEXT: global_store_dwordx4 v32, v[4:7], s[0:1] offset:161201; GFX908-NEXT: global_store_dwordx4 v32, v[0:3], s[0:1]1202; GFX908-NEXT: s_endpgm1203;1204; GFX90A-LABEL: test_mfma_loop_unfoldable_seq:1205; GFX90A: ; %bb.0: ; %entry1206; GFX90A-NEXT: s_mov_b32 s0, 161207; GFX90A-NEXT: v_mov_b32_e32 v0, 0x42f600001208; GFX90A-NEXT: v_mov_b32_e32 v1, 0x42f800001209; GFX90A-NEXT: v_mov_b32_e32 v2, 0x42fa00001210; GFX90A-NEXT: v_mov_b32_e32 v3, 0x42fc00001211; GFX90A-NEXT: v_mov_b32_e32 v4, 0x42fe00001212; GFX90A-NEXT: v_mov_b32_e32 v5, 0x430000001213; GFX90A-NEXT: v_mov_b32_e32 v6, 0x430100001214; GFX90A-NEXT: v_mov_b32_e32 v7, 0x430200001215; GFX90A-NEXT: v_mov_b32_e32 v8, 0x430300001216; GFX90A-NEXT: v_mov_b32_e32 v9, 0x430400001217; GFX90A-NEXT: v_mov_b32_e32 v10, 0x430500001218; GFX90A-NEXT: v_mov_b32_e32 v11, 0x430600001219; GFX90A-NEXT: v_mov_b32_e32 v12, 0x430700001220; GFX90A-NEXT: v_mov_b32_e32 v13, 0x430800001221; GFX90A-NEXT: v_mov_b32_e32 v14, 0x430900001222; GFX90A-NEXT: v_mov_b32_e32 v15, 0x430a00001223; GFX90A-NEXT: v_mov_b32_e32 v16, 0x430b00001224; GFX90A-NEXT: v_mov_b32_e32 v17, 0x430c00001225; GFX90A-NEXT: v_mov_b32_e32 v18, 0x430d00001226; GFX90A-NEXT: v_mov_b32_e32 v19, 0x430e00001227; GFX90A-NEXT: v_mov_b32_e32 v20, 0x430f00001228; GFX90A-NEXT: v_mov_b32_e32 v21, 0x431000001229; GFX90A-NEXT: v_mov_b32_e32 v22, 0x431100001230; GFX90A-NEXT: v_mov_b32_e32 v23, 0x431200001231; GFX90A-NEXT: v_mov_b32_e32 v24, 0x431300001232; GFX90A-NEXT: v_mov_b32_e32 v25, 0x431400001233; GFX90A-NEXT: v_mov_b32_e32 v26, 0x431500001234; GFX90A-NEXT: v_mov_b32_e32 v27, 0x431600001235; GFX90A-NEXT: v_mov_b32_e32 v28, 0x431700001236; GFX90A-NEXT: v_mov_b32_e32 v29, 0x431800001237; GFX90A-NEXT: v_mov_b32_e32 v30, 0x431900001238; GFX90A-NEXT: v_mov_b32_e32 v31, 0x431a00001239; GFX90A-NEXT: v_mov_b32_e32 v32, 1.01240; GFX90A-NEXT: .LBB3_1: ; %for.cond.preheader1241; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=11242; GFX90A-NEXT: v_accvgpr_write_b32 a0, v01243; GFX90A-NEXT: v_accvgpr_write_b32 a1, v11244; GFX90A-NEXT: v_accvgpr_write_b32 a2, v21245; GFX90A-NEXT: v_accvgpr_write_b32 a3, v31246; GFX90A-NEXT: v_accvgpr_write_b32 a4, v41247; GFX90A-NEXT: v_accvgpr_write_b32 a5, v51248; GFX90A-NEXT: v_accvgpr_write_b32 a6, v61249; GFX90A-NEXT: v_accvgpr_write_b32 a7, v71250; GFX90A-NEXT: v_accvgpr_write_b32 a8, v81251; GFX90A-NEXT: v_accvgpr_write_b32 a9, v91252; GFX90A-NEXT: v_accvgpr_write_b32 a10, v101253; GFX90A-NEXT: v_accvgpr_write_b32 a11, v111254; GFX90A-NEXT: v_accvgpr_write_b32 a12, v121255; GFX90A-NEXT: v_accvgpr_write_b32 a13, v131256; GFX90A-NEXT: v_accvgpr_write_b32 a14, v141257; GFX90A-NEXT: v_accvgpr_write_b32 a15, v151258; GFX90A-NEXT: v_accvgpr_write_b32 a16, v161259; GFX90A-NEXT: v_accvgpr_write_b32 a17, v171260; GFX90A-NEXT: v_accvgpr_write_b32 a18, v181261; GFX90A-NEXT: v_accvgpr_write_b32 a19, v191262; GFX90A-NEXT: v_accvgpr_write_b32 a20, v201263; GFX90A-NEXT: v_accvgpr_write_b32 a21, v211264; GFX90A-NEXT: v_accvgpr_write_b32 a22, v221265; GFX90A-NEXT: v_accvgpr_write_b32 a23, v231266; GFX90A-NEXT: v_accvgpr_write_b32 a24, v241267; GFX90A-NEXT: v_accvgpr_write_b32 a25, v251268; GFX90A-NEXT: v_accvgpr_write_b32 a26, v261269; GFX90A-NEXT: v_accvgpr_write_b32 a27, v271270; GFX90A-NEXT: v_accvgpr_write_b32 a28, v281271; GFX90A-NEXT: v_accvgpr_write_b32 a29, v291272; GFX90A-NEXT: v_accvgpr_write_b32 a30, v301273; GFX90A-NEXT: v_accvgpr_write_b32 a31, v311274; GFX90A-NEXT: v_mov_b32_e32 v0, 2.01275; GFX90A-NEXT: s_add_i32 s0, s0, -11276; GFX90A-NEXT: s_cmp_lg_u32 s0, 01277; GFX90A-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v32, v0, a[0:31]1278; GFX90A-NEXT: s_nop 151279; GFX90A-NEXT: s_nop 21280; GFX90A-NEXT: v_accvgpr_read_b32 v0, a01281; GFX90A-NEXT: v_accvgpr_read_b32 v1, a11282; GFX90A-NEXT: v_accvgpr_read_b32 v2, a21283; GFX90A-NEXT: v_accvgpr_read_b32 v3, a31284; GFX90A-NEXT: v_accvgpr_read_b32 v4, a41285; GFX90A-NEXT: v_accvgpr_read_b32 v5, a51286; GFX90A-NEXT: v_accvgpr_read_b32 v6, a61287; GFX90A-NEXT: v_accvgpr_read_b32 v7, a71288; GFX90A-NEXT: v_accvgpr_read_b32 v8, a81289; GFX90A-NEXT: v_accvgpr_read_b32 v9, a91290; GFX90A-NEXT: v_accvgpr_read_b32 v10, a101291; GFX90A-NEXT: v_accvgpr_read_b32 v11, a111292; GFX90A-NEXT: v_accvgpr_read_b32 v12, a121293; GFX90A-NEXT: v_accvgpr_read_b32 v13, a131294; GFX90A-NEXT: v_accvgpr_read_b32 v14, a141295; GFX90A-NEXT: v_accvgpr_read_b32 v15, a151296; GFX90A-NEXT: v_accvgpr_read_b32 v16, a161297; GFX90A-NEXT: v_accvgpr_read_b32 v17, a171298; GFX90A-NEXT: v_accvgpr_read_b32 v18, a181299; GFX90A-NEXT: v_accvgpr_read_b32 v19, a191300; GFX90A-NEXT: v_accvgpr_read_b32 v20, a201301; GFX90A-NEXT: v_accvgpr_read_b32 v21, a211302; GFX90A-NEXT: v_accvgpr_read_b32 v22, a221303; GFX90A-NEXT: v_accvgpr_read_b32 v23, a231304; GFX90A-NEXT: v_accvgpr_read_b32 v24, a241305; GFX90A-NEXT: v_accvgpr_read_b32 v25, a251306; GFX90A-NEXT: v_accvgpr_read_b32 v26, a261307; GFX90A-NEXT: v_accvgpr_read_b32 v27, a271308; GFX90A-NEXT: v_accvgpr_read_b32 v28, a281309; GFX90A-NEXT: v_accvgpr_read_b32 v29, a291310; GFX90A-NEXT: v_accvgpr_read_b32 v30, a301311; GFX90A-NEXT: v_accvgpr_read_b32 v31, a311312; GFX90A-NEXT: s_cbranch_scc1 .LBB3_11313; GFX90A-NEXT: ; %bb.2: ; %exit1314; GFX90A-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241315; GFX90A-NEXT: v_mov_b32_e32 v0, 01316; GFX90A-NEXT: s_waitcnt lgkmcnt(0)1317; GFX90A-NEXT: global_store_dwordx4 v0, a[28:31], s[0:1] offset:1121318; GFX90A-NEXT: global_store_dwordx4 v0, a[24:27], s[0:1] offset:961319; GFX90A-NEXT: global_store_dwordx4 v0, a[20:23], s[0:1] offset:801320; GFX90A-NEXT: global_store_dwordx4 v0, a[16:19], s[0:1] offset:641321; GFX90A-NEXT: global_store_dwordx4 v0, a[12:15], s[0:1] offset:481322; GFX90A-NEXT: global_store_dwordx4 v0, a[8:11], s[0:1] offset:321323; GFX90A-NEXT: global_store_dwordx4 v0, a[4:7], s[0:1] offset:161324; GFX90A-NEXT: global_store_dwordx4 v0, a[0:3], s[0:1]1325; GFX90A-NEXT: s_endpgm1326;1327; GFX942-LABEL: test_mfma_loop_unfoldable_seq:1328; GFX942: ; %bb.0: ; %entry1329; GFX942-NEXT: s_mov_b32 s0, 161330; GFX942-NEXT: v_mov_b32_e32 v0, 0x42f600001331; GFX942-NEXT: v_mov_b32_e32 v1, 0x42f800001332; GFX942-NEXT: v_mov_b32_e32 v2, 0x42fa00001333; GFX942-NEXT: v_mov_b32_e32 v3, 0x42fc00001334; GFX942-NEXT: v_mov_b32_e32 v4, 0x42fe00001335; GFX942-NEXT: v_mov_b32_e32 v5, 0x430000001336; GFX942-NEXT: v_mov_b32_e32 v6, 0x430100001337; GFX942-NEXT: v_mov_b32_e32 v7, 0x430200001338; GFX942-NEXT: v_mov_b32_e32 v8, 0x430300001339; GFX942-NEXT: v_mov_b32_e32 v9, 0x430400001340; GFX942-NEXT: v_mov_b32_e32 v10, 0x430500001341; GFX942-NEXT: v_mov_b32_e32 v11, 0x430600001342; GFX942-NEXT: v_mov_b32_e32 v12, 0x430700001343; GFX942-NEXT: v_mov_b32_e32 v13, 0x430800001344; GFX942-NEXT: v_mov_b32_e32 v14, 0x430900001345; GFX942-NEXT: v_mov_b32_e32 v15, 0x430a00001346; GFX942-NEXT: v_mov_b32_e32 v16, 0x430b00001347; GFX942-NEXT: v_mov_b32_e32 v17, 0x430c00001348; GFX942-NEXT: v_mov_b32_e32 v18, 0x430d00001349; GFX942-NEXT: v_mov_b32_e32 v19, 0x430e00001350; GFX942-NEXT: v_mov_b32_e32 v20, 0x430f00001351; GFX942-NEXT: v_mov_b32_e32 v21, 0x431000001352; GFX942-NEXT: v_mov_b32_e32 v22, 0x431100001353; GFX942-NEXT: v_mov_b32_e32 v23, 0x431200001354; GFX942-NEXT: v_mov_b32_e32 v24, 0x431300001355; GFX942-NEXT: v_mov_b32_e32 v25, 0x431400001356; GFX942-NEXT: v_mov_b32_e32 v26, 0x431500001357; GFX942-NEXT: v_mov_b32_e32 v27, 0x431600001358; GFX942-NEXT: v_mov_b32_e32 v28, 0x431700001359; GFX942-NEXT: v_mov_b32_e32 v29, 0x431800001360; GFX942-NEXT: v_mov_b32_e32 v30, 0x431900001361; GFX942-NEXT: v_mov_b32_e32 v31, 0x431a00001362; GFX942-NEXT: v_mov_b32_e32 v32, 1.01363; GFX942-NEXT: .LBB3_1: ; %for.cond.preheader1364; GFX942-NEXT: ; =>This Inner Loop Header: Depth=11365; GFX942-NEXT: v_accvgpr_write_b32 a0, v01366; GFX942-NEXT: v_accvgpr_write_b32 a1, v11367; GFX942-NEXT: v_accvgpr_write_b32 a2, v21368; GFX942-NEXT: v_accvgpr_write_b32 a3, v31369; GFX942-NEXT: v_accvgpr_write_b32 a4, v41370; GFX942-NEXT: v_accvgpr_write_b32 a5, v51371; GFX942-NEXT: v_accvgpr_write_b32 a6, v61372; GFX942-NEXT: v_accvgpr_write_b32 a7, v71373; GFX942-NEXT: v_accvgpr_write_b32 a8, v81374; GFX942-NEXT: v_accvgpr_write_b32 a9, v91375; GFX942-NEXT: v_accvgpr_write_b32 a10, v101376; GFX942-NEXT: v_accvgpr_write_b32 a11, v111377; GFX942-NEXT: v_accvgpr_write_b32 a12, v121378; GFX942-NEXT: v_accvgpr_write_b32 a13, v131379; GFX942-NEXT: v_accvgpr_write_b32 a14, v141380; GFX942-NEXT: v_accvgpr_write_b32 a15, v151381; GFX942-NEXT: v_accvgpr_write_b32 a16, v161382; GFX942-NEXT: v_accvgpr_write_b32 a17, v171383; GFX942-NEXT: v_accvgpr_write_b32 a18, v181384; GFX942-NEXT: v_accvgpr_write_b32 a19, v191385; GFX942-NEXT: v_accvgpr_write_b32 a20, v201386; GFX942-NEXT: v_accvgpr_write_b32 a21, v211387; GFX942-NEXT: v_accvgpr_write_b32 a22, v221388; GFX942-NEXT: v_accvgpr_write_b32 a23, v231389; GFX942-NEXT: v_accvgpr_write_b32 a24, v241390; GFX942-NEXT: v_accvgpr_write_b32 a25, v251391; GFX942-NEXT: v_accvgpr_write_b32 a26, v261392; GFX942-NEXT: v_accvgpr_write_b32 a27, v271393; GFX942-NEXT: v_accvgpr_write_b32 a28, v281394; GFX942-NEXT: v_accvgpr_write_b32 a29, v291395; GFX942-NEXT: v_accvgpr_write_b32 a30, v301396; GFX942-NEXT: v_accvgpr_write_b32 a31, v311397; GFX942-NEXT: v_mov_b32_e32 v0, 2.01398; GFX942-NEXT: s_add_i32 s0, s0, -11399; GFX942-NEXT: s_cmp_lg_u32 s0, 01400; GFX942-NEXT: v_mfma_f32_32x32x1_2b_f32 a[0:31], v32, v0, a[0:31]1401; GFX942-NEXT: s_nop 151402; GFX942-NEXT: s_nop 11403; GFX942-NEXT: v_accvgpr_read_b32 v0, a01404; GFX942-NEXT: v_accvgpr_read_b32 v1, a11405; GFX942-NEXT: v_accvgpr_read_b32 v2, a21406; GFX942-NEXT: v_accvgpr_read_b32 v3, a31407; GFX942-NEXT: v_accvgpr_read_b32 v4, a41408; GFX942-NEXT: v_accvgpr_read_b32 v5, a51409; GFX942-NEXT: v_accvgpr_read_b32 v6, a61410; GFX942-NEXT: v_accvgpr_read_b32 v7, a71411; GFX942-NEXT: v_accvgpr_read_b32 v8, a81412; GFX942-NEXT: v_accvgpr_read_b32 v9, a91413; GFX942-NEXT: v_accvgpr_read_b32 v10, a101414; GFX942-NEXT: v_accvgpr_read_b32 v11, a111415; GFX942-NEXT: v_accvgpr_read_b32 v12, a121416; GFX942-NEXT: v_accvgpr_read_b32 v13, a131417; GFX942-NEXT: v_accvgpr_read_b32 v14, a141418; GFX942-NEXT: v_accvgpr_read_b32 v15, a151419; GFX942-NEXT: v_accvgpr_read_b32 v16, a161420; GFX942-NEXT: v_accvgpr_read_b32 v17, a171421; GFX942-NEXT: v_accvgpr_read_b32 v18, a181422; GFX942-NEXT: v_accvgpr_read_b32 v19, a191423; GFX942-NEXT: v_accvgpr_read_b32 v20, a201424; GFX942-NEXT: v_accvgpr_read_b32 v21, a211425; GFX942-NEXT: v_accvgpr_read_b32 v22, a221426; GFX942-NEXT: v_accvgpr_read_b32 v23, a231427; GFX942-NEXT: v_accvgpr_read_b32 v24, a241428; GFX942-NEXT: v_accvgpr_read_b32 v25, a251429; GFX942-NEXT: v_accvgpr_read_b32 v26, a261430; GFX942-NEXT: v_accvgpr_read_b32 v27, a271431; GFX942-NEXT: v_accvgpr_read_b32 v28, a281432; GFX942-NEXT: v_accvgpr_read_b32 v29, a291433; GFX942-NEXT: v_accvgpr_read_b32 v30, a301434; GFX942-NEXT: v_accvgpr_read_b32 v31, a311435; GFX942-NEXT: s_cbranch_scc1 .LBB3_11436; GFX942-NEXT: ; %bb.2: ; %exit1437; GFX942-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241438; GFX942-NEXT: v_mov_b32_e32 v0, 01439; GFX942-NEXT: s_waitcnt lgkmcnt(0)1440; GFX942-NEXT: global_store_dwordx4 v0, a[28:31], s[0:1] offset:1121441; GFX942-NEXT: global_store_dwordx4 v0, a[24:27], s[0:1] offset:961442; GFX942-NEXT: global_store_dwordx4 v0, a[20:23], s[0:1] offset:801443; GFX942-NEXT: global_store_dwordx4 v0, a[16:19], s[0:1] offset:641444; GFX942-NEXT: global_store_dwordx4 v0, a[12:15], s[0:1] offset:481445; GFX942-NEXT: global_store_dwordx4 v0, a[8:11], s[0:1] offset:321446; GFX942-NEXT: global_store_dwordx4 v0, a[4:7], s[0:1] offset:161447; GFX942-NEXT: global_store_dwordx4 v0, a[0:3], s[0:1]1448; GFX942-NEXT: s_endpgm1449entry:1450 br label %for.cond.preheader1451 1452for.cond.preheader:1453 %phi = phi <32 x float> [ <float 123.0, float 124.0, float 125.0, float 126.0, float 127.0, float 128.0, float 129.0, float 130.0, float 131.0, float 132.0, float 133.0, float 134.0, float 135.0, float 136.0, float 137.0, float 138.0, float 139.0, float 140.0, float 141.0, float 142.0, float 143.0, float 144.0, float 145.0, float 146.0, float 147.0, float 148.0, float 149.0, float 150.0, float 151.0, float 152.0, float 153.0, float 154.0>, %entry ], [ %mai.1, %for.cond.preheader ]1454 %c = phi i32 [ 0, %entry ], [ %inc, %for.cond.preheader ]1455 %mai.1 = tail call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float 1.0, float 2.0, <32 x float> %phi, i32 0, i32 0, i32 0)1456 %inc = add nuw nsw i32 %c, 11457 %cc = icmp eq i32 %inc, 161458 br i1 %cc, label %exit, label %for.cond.preheader1459 1460exit:1461 store <32 x float> %mai.1, ptr addrspace(1) %arg1462 ret void1463}1464 1465define amdgpu_kernel void @test_mfma_loop_vgpr_init(ptr addrspace(1) %arg) #0 {1466; GFX908-LABEL: test_mfma_loop_vgpr_init:1467; GFX908: ; %bb.0: ; %entry1468; GFX908-NEXT: v_accvgpr_write_b32 a31, v01469; GFX908-NEXT: v_accvgpr_write_b32 a30, v01470; GFX908-NEXT: v_accvgpr_write_b32 a29, v01471; GFX908-NEXT: v_accvgpr_write_b32 a28, v01472; GFX908-NEXT: v_accvgpr_write_b32 a27, v01473; GFX908-NEXT: v_accvgpr_write_b32 a26, v01474; GFX908-NEXT: v_accvgpr_write_b32 a25, v01475; GFX908-NEXT: v_accvgpr_write_b32 a24, v01476; GFX908-NEXT: v_accvgpr_write_b32 a23, v01477; GFX908-NEXT: v_accvgpr_write_b32 a22, v01478; GFX908-NEXT: v_accvgpr_write_b32 a21, v01479; GFX908-NEXT: v_accvgpr_write_b32 a20, v01480; GFX908-NEXT: v_accvgpr_write_b32 a19, v01481; GFX908-NEXT: v_accvgpr_write_b32 a18, v01482; GFX908-NEXT: v_accvgpr_write_b32 a17, v01483; GFX908-NEXT: v_accvgpr_write_b32 a16, v01484; GFX908-NEXT: v_accvgpr_write_b32 a15, v01485; GFX908-NEXT: v_accvgpr_write_b32 a14, v01486; GFX908-NEXT: v_accvgpr_write_b32 a13, v01487; GFX908-NEXT: v_accvgpr_write_b32 a12, v01488; GFX908-NEXT: v_accvgpr_write_b32 a11, v01489; GFX908-NEXT: v_accvgpr_write_b32 a10, v01490; GFX908-NEXT: v_accvgpr_write_b32 a9, v01491; GFX908-NEXT: v_accvgpr_write_b32 a8, v01492; GFX908-NEXT: v_accvgpr_write_b32 a7, v01493; GFX908-NEXT: v_accvgpr_write_b32 a6, v01494; GFX908-NEXT: v_accvgpr_write_b32 a5, v01495; GFX908-NEXT: v_accvgpr_write_b32 a4, v01496; GFX908-NEXT: v_accvgpr_write_b32 a3, v01497; GFX908-NEXT: v_accvgpr_write_b32 a2, v01498; GFX908-NEXT: v_accvgpr_write_b32 a1, v01499; GFX908-NEXT: v_accvgpr_write_b32 a0, v01500; GFX908-NEXT: s_mov_b32 s0, 161501; GFX908-NEXT: v_mov_b32_e32 v0, 2.01502; GFX908-NEXT: v_mov_b32_e32 v1, 1.01503; GFX908-NEXT: .LBB4_1: ; %for.cond.preheader1504; GFX908-NEXT: ; =>This Inner Loop Header: Depth=11505; GFX908-NEXT: s_nop 11506; GFX908-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v1, v0, a[0:31]1507; GFX908-NEXT: s_add_i32 s0, s0, -11508; GFX908-NEXT: s_cmp_lg_u32 s0, 01509; GFX908-NEXT: s_cbranch_scc1 .LBB4_11510; GFX908-NEXT: ; %bb.2: ; %exit1511; GFX908-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241512; GFX908-NEXT: s_nop 131513; GFX908-NEXT: v_accvgpr_read_b32 v0, a01514; GFX908-NEXT: v_accvgpr_read_b32 v28, a281515; GFX908-NEXT: v_accvgpr_read_b32 v29, a291516; GFX908-NEXT: v_accvgpr_read_b32 v30, a301517; GFX908-NEXT: v_accvgpr_read_b32 v31, a311518; GFX908-NEXT: v_mov_b32_e32 v32, 01519; GFX908-NEXT: v_accvgpr_read_b32 v1, a11520; GFX908-NEXT: v_accvgpr_read_b32 v2, a21521; GFX908-NEXT: v_accvgpr_read_b32 v3, a31522; GFX908-NEXT: v_accvgpr_read_b32 v4, a41523; GFX908-NEXT: v_accvgpr_read_b32 v5, a51524; GFX908-NEXT: v_accvgpr_read_b32 v6, a61525; GFX908-NEXT: v_accvgpr_read_b32 v7, a71526; GFX908-NEXT: v_accvgpr_read_b32 v8, a81527; GFX908-NEXT: v_accvgpr_read_b32 v9, a91528; GFX908-NEXT: v_accvgpr_read_b32 v10, a101529; GFX908-NEXT: v_accvgpr_read_b32 v11, a111530; GFX908-NEXT: v_accvgpr_read_b32 v12, a121531; GFX908-NEXT: v_accvgpr_read_b32 v13, a131532; GFX908-NEXT: v_accvgpr_read_b32 v14, a141533; GFX908-NEXT: v_accvgpr_read_b32 v15, a151534; GFX908-NEXT: v_accvgpr_read_b32 v16, a161535; GFX908-NEXT: v_accvgpr_read_b32 v17, a171536; GFX908-NEXT: v_accvgpr_read_b32 v18, a181537; GFX908-NEXT: v_accvgpr_read_b32 v19, a191538; GFX908-NEXT: v_accvgpr_read_b32 v20, a201539; GFX908-NEXT: v_accvgpr_read_b32 v21, a211540; GFX908-NEXT: v_accvgpr_read_b32 v22, a221541; GFX908-NEXT: v_accvgpr_read_b32 v23, a231542; GFX908-NEXT: v_accvgpr_read_b32 v24, a241543; GFX908-NEXT: v_accvgpr_read_b32 v25, a251544; GFX908-NEXT: v_accvgpr_read_b32 v26, a261545; GFX908-NEXT: v_accvgpr_read_b32 v27, a271546; GFX908-NEXT: s_waitcnt lgkmcnt(0)1547; GFX908-NEXT: global_store_dwordx4 v32, v[28:31], s[0:1] offset:1121548; GFX908-NEXT: global_store_dwordx4 v32, v[24:27], s[0:1] offset:961549; GFX908-NEXT: global_store_dwordx4 v32, v[20:23], s[0:1] offset:801550; GFX908-NEXT: global_store_dwordx4 v32, v[16:19], s[0:1] offset:641551; GFX908-NEXT: global_store_dwordx4 v32, v[12:15], s[0:1] offset:481552; GFX908-NEXT: global_store_dwordx4 v32, v[8:11], s[0:1] offset:321553; GFX908-NEXT: global_store_dwordx4 v32, v[4:7], s[0:1] offset:161554; GFX908-NEXT: global_store_dwordx4 v32, v[0:3], s[0:1]1555; GFX908-NEXT: s_endpgm1556;1557; GFX90A-LABEL: test_mfma_loop_vgpr_init:1558; GFX90A: ; %bb.0: ; %entry1559; GFX90A-NEXT: v_and_b32_e32 v31, 0x3ff, v01560; GFX90A-NEXT: s_mov_b32 s0, 161561; GFX90A-NEXT: v_mov_b32_e32 v0, v311562; GFX90A-NEXT: v_mov_b32_e32 v1, v311563; GFX90A-NEXT: v_mov_b32_e32 v2, v311564; GFX90A-NEXT: v_mov_b32_e32 v3, v311565; GFX90A-NEXT: v_mov_b32_e32 v4, v311566; GFX90A-NEXT: v_mov_b32_e32 v5, v311567; GFX90A-NEXT: v_mov_b32_e32 v6, v311568; GFX90A-NEXT: v_mov_b32_e32 v7, v311569; GFX90A-NEXT: v_mov_b32_e32 v8, v311570; GFX90A-NEXT: v_mov_b32_e32 v9, v311571; GFX90A-NEXT: v_mov_b32_e32 v10, v311572; GFX90A-NEXT: v_mov_b32_e32 v11, v311573; GFX90A-NEXT: v_mov_b32_e32 v12, v311574; GFX90A-NEXT: v_mov_b32_e32 v13, v311575; GFX90A-NEXT: v_mov_b32_e32 v14, v311576; GFX90A-NEXT: v_mov_b32_e32 v15, v311577; GFX90A-NEXT: v_mov_b32_e32 v16, v311578; GFX90A-NEXT: v_mov_b32_e32 v17, v311579; GFX90A-NEXT: v_mov_b32_e32 v18, v311580; GFX90A-NEXT: v_mov_b32_e32 v19, v311581; GFX90A-NEXT: v_mov_b32_e32 v20, v311582; GFX90A-NEXT: v_mov_b32_e32 v21, v311583; GFX90A-NEXT: v_mov_b32_e32 v22, v311584; GFX90A-NEXT: v_mov_b32_e32 v23, v311585; GFX90A-NEXT: v_mov_b32_e32 v24, v311586; GFX90A-NEXT: v_mov_b32_e32 v25, v311587; GFX90A-NEXT: v_mov_b32_e32 v26, v311588; GFX90A-NEXT: v_mov_b32_e32 v27, v311589; GFX90A-NEXT: v_mov_b32_e32 v28, v311590; GFX90A-NEXT: v_mov_b32_e32 v29, v311591; GFX90A-NEXT: v_mov_b32_e32 v30, v311592; GFX90A-NEXT: v_mov_b32_e32 v32, 1.01593; GFX90A-NEXT: .LBB4_1: ; %for.cond.preheader1594; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=11595; GFX90A-NEXT: v_accvgpr_write_b32 a0, v01596; GFX90A-NEXT: v_accvgpr_write_b32 a1, v11597; GFX90A-NEXT: v_accvgpr_write_b32 a2, v21598; GFX90A-NEXT: v_accvgpr_write_b32 a3, v31599; GFX90A-NEXT: v_accvgpr_write_b32 a4, v41600; GFX90A-NEXT: v_accvgpr_write_b32 a5, v51601; GFX90A-NEXT: v_accvgpr_write_b32 a6, v61602; GFX90A-NEXT: v_accvgpr_write_b32 a7, v71603; GFX90A-NEXT: v_accvgpr_write_b32 a8, v81604; GFX90A-NEXT: v_accvgpr_write_b32 a9, v91605; GFX90A-NEXT: v_accvgpr_write_b32 a10, v101606; GFX90A-NEXT: v_accvgpr_write_b32 a11, v111607; GFX90A-NEXT: v_accvgpr_write_b32 a12, v121608; GFX90A-NEXT: v_accvgpr_write_b32 a13, v131609; GFX90A-NEXT: v_accvgpr_write_b32 a14, v141610; GFX90A-NEXT: v_accvgpr_write_b32 a15, v151611; GFX90A-NEXT: v_accvgpr_write_b32 a16, v161612; GFX90A-NEXT: v_accvgpr_write_b32 a17, v171613; GFX90A-NEXT: v_accvgpr_write_b32 a18, v181614; GFX90A-NEXT: v_accvgpr_write_b32 a19, v191615; GFX90A-NEXT: v_accvgpr_write_b32 a20, v201616; GFX90A-NEXT: v_accvgpr_write_b32 a21, v211617; GFX90A-NEXT: v_accvgpr_write_b32 a22, v221618; GFX90A-NEXT: v_accvgpr_write_b32 a23, v231619; GFX90A-NEXT: v_accvgpr_write_b32 a24, v241620; GFX90A-NEXT: v_accvgpr_write_b32 a25, v251621; GFX90A-NEXT: v_accvgpr_write_b32 a26, v261622; GFX90A-NEXT: v_accvgpr_write_b32 a27, v271623; GFX90A-NEXT: v_accvgpr_write_b32 a28, v281624; GFX90A-NEXT: v_accvgpr_write_b32 a29, v291625; GFX90A-NEXT: v_accvgpr_write_b32 a30, v301626; GFX90A-NEXT: v_accvgpr_write_b32 a31, v311627; GFX90A-NEXT: v_mov_b32_e32 v0, 2.01628; GFX90A-NEXT: s_add_i32 s0, s0, -11629; GFX90A-NEXT: s_cmp_lg_u32 s0, 01630; GFX90A-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v32, v0, a[0:31]1631; GFX90A-NEXT: s_nop 151632; GFX90A-NEXT: s_nop 21633; GFX90A-NEXT: v_accvgpr_read_b32 v0, a01634; GFX90A-NEXT: v_accvgpr_read_b32 v1, a11635; GFX90A-NEXT: v_accvgpr_read_b32 v2, a21636; GFX90A-NEXT: v_accvgpr_read_b32 v3, a31637; GFX90A-NEXT: v_accvgpr_read_b32 v4, a41638; GFX90A-NEXT: v_accvgpr_read_b32 v5, a51639; GFX90A-NEXT: v_accvgpr_read_b32 v6, a61640; GFX90A-NEXT: v_accvgpr_read_b32 v7, a71641; GFX90A-NEXT: v_accvgpr_read_b32 v8, a81642; GFX90A-NEXT: v_accvgpr_read_b32 v9, a91643; GFX90A-NEXT: v_accvgpr_read_b32 v10, a101644; GFX90A-NEXT: v_accvgpr_read_b32 v11, a111645; GFX90A-NEXT: v_accvgpr_read_b32 v12, a121646; GFX90A-NEXT: v_accvgpr_read_b32 v13, a131647; GFX90A-NEXT: v_accvgpr_read_b32 v14, a141648; GFX90A-NEXT: v_accvgpr_read_b32 v15, a151649; GFX90A-NEXT: v_accvgpr_read_b32 v16, a161650; GFX90A-NEXT: v_accvgpr_read_b32 v17, a171651; GFX90A-NEXT: v_accvgpr_read_b32 v18, a181652; GFX90A-NEXT: v_accvgpr_read_b32 v19, a191653; GFX90A-NEXT: v_accvgpr_read_b32 v20, a201654; GFX90A-NEXT: v_accvgpr_read_b32 v21, a211655; GFX90A-NEXT: v_accvgpr_read_b32 v22, a221656; GFX90A-NEXT: v_accvgpr_read_b32 v23, a231657; GFX90A-NEXT: v_accvgpr_read_b32 v24, a241658; GFX90A-NEXT: v_accvgpr_read_b32 v25, a251659; GFX90A-NEXT: v_accvgpr_read_b32 v26, a261660; GFX90A-NEXT: v_accvgpr_read_b32 v27, a271661; GFX90A-NEXT: v_accvgpr_read_b32 v28, a281662; GFX90A-NEXT: v_accvgpr_read_b32 v29, a291663; GFX90A-NEXT: v_accvgpr_read_b32 v30, a301664; GFX90A-NEXT: v_accvgpr_read_b32 v31, a311665; GFX90A-NEXT: s_cbranch_scc1 .LBB4_11666; GFX90A-NEXT: ; %bb.2: ; %exit1667; GFX90A-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241668; GFX90A-NEXT: v_mov_b32_e32 v0, 01669; GFX90A-NEXT: s_waitcnt lgkmcnt(0)1670; GFX90A-NEXT: global_store_dwordx4 v0, a[28:31], s[0:1] offset:1121671; GFX90A-NEXT: global_store_dwordx4 v0, a[24:27], s[0:1] offset:961672; GFX90A-NEXT: global_store_dwordx4 v0, a[20:23], s[0:1] offset:801673; GFX90A-NEXT: global_store_dwordx4 v0, a[16:19], s[0:1] offset:641674; GFX90A-NEXT: global_store_dwordx4 v0, a[12:15], s[0:1] offset:481675; GFX90A-NEXT: global_store_dwordx4 v0, a[8:11], s[0:1] offset:321676; GFX90A-NEXT: global_store_dwordx4 v0, a[4:7], s[0:1] offset:161677; GFX90A-NEXT: global_store_dwordx4 v0, a[0:3], s[0:1]1678; GFX90A-NEXT: s_endpgm1679;1680; GFX942-LABEL: test_mfma_loop_vgpr_init:1681; GFX942: ; %bb.0: ; %entry1682; GFX942-NEXT: v_and_b32_e32 v31, 0x3ff, v01683; GFX942-NEXT: s_mov_b32 s0, 161684; GFX942-NEXT: v_mov_b32_e32 v0, v311685; GFX942-NEXT: v_mov_b32_e32 v1, v311686; GFX942-NEXT: v_mov_b32_e32 v2, v311687; GFX942-NEXT: v_mov_b32_e32 v3, v311688; GFX942-NEXT: v_mov_b32_e32 v4, v311689; GFX942-NEXT: v_mov_b32_e32 v5, v311690; GFX942-NEXT: v_mov_b32_e32 v6, v311691; GFX942-NEXT: v_mov_b32_e32 v7, v311692; GFX942-NEXT: v_mov_b32_e32 v8, v311693; GFX942-NEXT: v_mov_b32_e32 v9, v311694; GFX942-NEXT: v_mov_b32_e32 v10, v311695; GFX942-NEXT: v_mov_b32_e32 v11, v311696; GFX942-NEXT: v_mov_b32_e32 v12, v311697; GFX942-NEXT: v_mov_b32_e32 v13, v311698; GFX942-NEXT: v_mov_b32_e32 v14, v311699; GFX942-NEXT: v_mov_b32_e32 v15, v311700; GFX942-NEXT: v_mov_b32_e32 v16, v311701; GFX942-NEXT: v_mov_b32_e32 v17, v311702; GFX942-NEXT: v_mov_b32_e32 v18, v311703; GFX942-NEXT: v_mov_b32_e32 v19, v311704; GFX942-NEXT: v_mov_b32_e32 v20, v311705; GFX942-NEXT: v_mov_b32_e32 v21, v311706; GFX942-NEXT: v_mov_b32_e32 v22, v311707; GFX942-NEXT: v_mov_b32_e32 v23, v311708; GFX942-NEXT: v_mov_b32_e32 v24, v311709; GFX942-NEXT: v_mov_b32_e32 v25, v311710; GFX942-NEXT: v_mov_b32_e32 v26, v311711; GFX942-NEXT: v_mov_b32_e32 v27, v311712; GFX942-NEXT: v_mov_b32_e32 v28, v311713; GFX942-NEXT: v_mov_b32_e32 v29, v311714; GFX942-NEXT: v_mov_b32_e32 v30, v311715; GFX942-NEXT: v_mov_b32_e32 v32, 1.01716; GFX942-NEXT: .LBB4_1: ; %for.cond.preheader1717; GFX942-NEXT: ; =>This Inner Loop Header: Depth=11718; GFX942-NEXT: v_accvgpr_write_b32 a0, v01719; GFX942-NEXT: v_accvgpr_write_b32 a1, v11720; GFX942-NEXT: v_accvgpr_write_b32 a2, v21721; GFX942-NEXT: v_accvgpr_write_b32 a3, v31722; GFX942-NEXT: v_accvgpr_write_b32 a4, v41723; GFX942-NEXT: v_accvgpr_write_b32 a5, v51724; GFX942-NEXT: v_accvgpr_write_b32 a6, v61725; GFX942-NEXT: v_accvgpr_write_b32 a7, v71726; GFX942-NEXT: v_accvgpr_write_b32 a8, v81727; GFX942-NEXT: v_accvgpr_write_b32 a9, v91728; GFX942-NEXT: v_accvgpr_write_b32 a10, v101729; GFX942-NEXT: v_accvgpr_write_b32 a11, v111730; GFX942-NEXT: v_accvgpr_write_b32 a12, v121731; GFX942-NEXT: v_accvgpr_write_b32 a13, v131732; GFX942-NEXT: v_accvgpr_write_b32 a14, v141733; GFX942-NEXT: v_accvgpr_write_b32 a15, v151734; GFX942-NEXT: v_accvgpr_write_b32 a16, v161735; GFX942-NEXT: v_accvgpr_write_b32 a17, v171736; GFX942-NEXT: v_accvgpr_write_b32 a18, v181737; GFX942-NEXT: v_accvgpr_write_b32 a19, v191738; GFX942-NEXT: v_accvgpr_write_b32 a20, v201739; GFX942-NEXT: v_accvgpr_write_b32 a21, v211740; GFX942-NEXT: v_accvgpr_write_b32 a22, v221741; GFX942-NEXT: v_accvgpr_write_b32 a23, v231742; GFX942-NEXT: v_accvgpr_write_b32 a24, v241743; GFX942-NEXT: v_accvgpr_write_b32 a25, v251744; GFX942-NEXT: v_accvgpr_write_b32 a26, v261745; GFX942-NEXT: v_accvgpr_write_b32 a27, v271746; GFX942-NEXT: v_accvgpr_write_b32 a28, v281747; GFX942-NEXT: v_accvgpr_write_b32 a29, v291748; GFX942-NEXT: v_accvgpr_write_b32 a30, v301749; GFX942-NEXT: v_accvgpr_write_b32 a31, v311750; GFX942-NEXT: v_mov_b32_e32 v0, 2.01751; GFX942-NEXT: s_add_i32 s0, s0, -11752; GFX942-NEXT: s_cmp_lg_u32 s0, 01753; GFX942-NEXT: v_mfma_f32_32x32x1_2b_f32 a[0:31], v32, v0, a[0:31]1754; GFX942-NEXT: s_nop 151755; GFX942-NEXT: s_nop 11756; GFX942-NEXT: v_accvgpr_read_b32 v0, a01757; GFX942-NEXT: v_accvgpr_read_b32 v1, a11758; GFX942-NEXT: v_accvgpr_read_b32 v2, a21759; GFX942-NEXT: v_accvgpr_read_b32 v3, a31760; GFX942-NEXT: v_accvgpr_read_b32 v4, a41761; GFX942-NEXT: v_accvgpr_read_b32 v5, a51762; GFX942-NEXT: v_accvgpr_read_b32 v6, a61763; GFX942-NEXT: v_accvgpr_read_b32 v7, a71764; GFX942-NEXT: v_accvgpr_read_b32 v8, a81765; GFX942-NEXT: v_accvgpr_read_b32 v9, a91766; GFX942-NEXT: v_accvgpr_read_b32 v10, a101767; GFX942-NEXT: v_accvgpr_read_b32 v11, a111768; GFX942-NEXT: v_accvgpr_read_b32 v12, a121769; GFX942-NEXT: v_accvgpr_read_b32 v13, a131770; GFX942-NEXT: v_accvgpr_read_b32 v14, a141771; GFX942-NEXT: v_accvgpr_read_b32 v15, a151772; GFX942-NEXT: v_accvgpr_read_b32 v16, a161773; GFX942-NEXT: v_accvgpr_read_b32 v17, a171774; GFX942-NEXT: v_accvgpr_read_b32 v18, a181775; GFX942-NEXT: v_accvgpr_read_b32 v19, a191776; GFX942-NEXT: v_accvgpr_read_b32 v20, a201777; GFX942-NEXT: v_accvgpr_read_b32 v21, a211778; GFX942-NEXT: v_accvgpr_read_b32 v22, a221779; GFX942-NEXT: v_accvgpr_read_b32 v23, a231780; GFX942-NEXT: v_accvgpr_read_b32 v24, a241781; GFX942-NEXT: v_accvgpr_read_b32 v25, a251782; GFX942-NEXT: v_accvgpr_read_b32 v26, a261783; GFX942-NEXT: v_accvgpr_read_b32 v27, a271784; GFX942-NEXT: v_accvgpr_read_b32 v28, a281785; GFX942-NEXT: v_accvgpr_read_b32 v29, a291786; GFX942-NEXT: v_accvgpr_read_b32 v30, a301787; GFX942-NEXT: v_accvgpr_read_b32 v31, a311788; GFX942-NEXT: s_cbranch_scc1 .LBB4_11789; GFX942-NEXT: ; %bb.2: ; %exit1790; GFX942-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241791; GFX942-NEXT: v_mov_b32_e32 v0, 01792; GFX942-NEXT: s_waitcnt lgkmcnt(0)1793; GFX942-NEXT: global_store_dwordx4 v0, a[28:31], s[0:1] offset:1121794; GFX942-NEXT: global_store_dwordx4 v0, a[24:27], s[0:1] offset:961795; GFX942-NEXT: global_store_dwordx4 v0, a[20:23], s[0:1] offset:801796; GFX942-NEXT: global_store_dwordx4 v0, a[16:19], s[0:1] offset:641797; GFX942-NEXT: global_store_dwordx4 v0, a[12:15], s[0:1] offset:481798; GFX942-NEXT: global_store_dwordx4 v0, a[8:11], s[0:1] offset:321799; GFX942-NEXT: global_store_dwordx4 v0, a[4:7], s[0:1] offset:161800; GFX942-NEXT: global_store_dwordx4 v0, a[0:3], s[0:1]1801; GFX942-NEXT: s_endpgm1802entry:1803 %tid = call i32 @llvm.amdgcn.workitem.id.x()1804 %init = bitcast i32 %tid to float1805 %tmp0 = insertelement <32 x float> poison, float %init, i32 01806 %tmp1 = insertelement <32 x float> %tmp0, float %init, i32 11807 %tmp2 = insertelement <32 x float> %tmp1, float %init, i32 21808 %tmp3 = insertelement <32 x float> %tmp2, float %init, i32 31809 %tmp4 = insertelement <32 x float> %tmp3, float %init, i32 41810 %tmp5 = insertelement <32 x float> %tmp4, float %init, i32 51811 %tmp6 = insertelement <32 x float> %tmp5, float %init, i32 61812 %tmp7 = insertelement <32 x float> %tmp6, float %init, i32 71813 %tmp8 = insertelement <32 x float> %tmp7, float %init, i32 81814 %tmp9 = insertelement <32 x float> %tmp8, float %init, i32 91815 %tmp10 = insertelement <32 x float> %tmp9, float %init, i32 101816 %tmp11 = insertelement <32 x float> %tmp10, float %init, i32 111817 %tmp12 = insertelement <32 x float> %tmp11, float %init, i32 121818 %tmp13 = insertelement <32 x float> %tmp12, float %init, i32 131819 %tmp14 = insertelement <32 x float> %tmp13, float %init, i32 141820 %tmp15 = insertelement <32 x float> %tmp14, float %init, i32 151821 %tmp16 = insertelement <32 x float> %tmp15, float %init, i32 161822 %tmp17 = insertelement <32 x float> %tmp16, float %init, i32 171823 %tmp18 = insertelement <32 x float> %tmp17, float %init, i32 181824 %tmp19 = insertelement <32 x float> %tmp18, float %init, i32 191825 %tmp20 = insertelement <32 x float> %tmp19, float %init, i32 201826 %tmp21 = insertelement <32 x float> %tmp20, float %init, i32 211827 %tmp22 = insertelement <32 x float> %tmp21, float %init, i32 221828 %tmp23 = insertelement <32 x float> %tmp22, float %init, i32 231829 %tmp24 = insertelement <32 x float> %tmp23, float %init, i32 241830 %tmp25 = insertelement <32 x float> %tmp24, float %init, i32 251831 %tmp26 = insertelement <32 x float> %tmp25, float %init, i32 261832 %tmp27 = insertelement <32 x float> %tmp26, float %init, i32 271833 %tmp28 = insertelement <32 x float> %tmp27, float %init, i32 281834 %tmp29 = insertelement <32 x float> %tmp28, float %init, i32 291835 %tmp30 = insertelement <32 x float> %tmp29, float %init, i32 301836 %tmp31 = insertelement <32 x float> %tmp30, float %init, i32 311837 1838 br label %for.cond.preheader1839 1840for.cond.preheader:1841 %phi = phi <32 x float> [ %tmp31, %entry ], [ %mai.1, %for.cond.preheader ]1842 %c = phi i32 [ 0, %entry ], [ %inc, %for.cond.preheader ]1843 %mai.1 = tail call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float 1.0, float 2.0, <32 x float> %phi, i32 0, i32 0, i32 0)1844 %inc = add nuw nsw i32 %c, 11845 %cc = icmp eq i32 %inc, 161846 br i1 %cc, label %exit, label %for.cond.preheader1847 1848exit:1849 store <32 x float> %mai.1, ptr addrspace(1) %arg1850 ret void1851}1852 1853define amdgpu_kernel void @test_mfma_loop_sgpr_init(ptr addrspace(1) %arg, float %init) #0 {1854; GFX908-LABEL: test_mfma_loop_sgpr_init:1855; GFX908: ; %bb.0: ; %entry1856; GFX908-NEXT: s_load_dword s0, s[4:5], 0x2c1857; GFX908-NEXT: v_mov_b32_e32 v1, 1.01858; GFX908-NEXT: s_waitcnt lgkmcnt(0)1859; GFX908-NEXT: v_mov_b32_e32 v0, s01860; GFX908-NEXT: s_mov_b32 s0, 161861; GFX908-NEXT: s_nop 01862; GFX908-NEXT: v_accvgpr_write_b32 a31, v01863; GFX908-NEXT: v_accvgpr_write_b32 a30, v01864; GFX908-NEXT: v_accvgpr_write_b32 a29, v01865; GFX908-NEXT: v_accvgpr_write_b32 a28, v01866; GFX908-NEXT: v_accvgpr_write_b32 a27, v01867; GFX908-NEXT: v_accvgpr_write_b32 a26, v01868; GFX908-NEXT: v_accvgpr_write_b32 a25, v01869; GFX908-NEXT: v_accvgpr_write_b32 a24, v01870; GFX908-NEXT: v_accvgpr_write_b32 a23, v01871; GFX908-NEXT: v_accvgpr_write_b32 a22, v01872; GFX908-NEXT: v_accvgpr_write_b32 a21, v01873; GFX908-NEXT: v_accvgpr_write_b32 a20, v01874; GFX908-NEXT: v_accvgpr_write_b32 a19, v01875; GFX908-NEXT: v_accvgpr_write_b32 a18, v01876; GFX908-NEXT: v_accvgpr_write_b32 a17, v01877; GFX908-NEXT: v_accvgpr_write_b32 a16, v01878; GFX908-NEXT: v_accvgpr_write_b32 a15, v01879; GFX908-NEXT: v_accvgpr_write_b32 a14, v01880; GFX908-NEXT: v_accvgpr_write_b32 a13, v01881; GFX908-NEXT: v_accvgpr_write_b32 a12, v01882; GFX908-NEXT: v_accvgpr_write_b32 a11, v01883; GFX908-NEXT: v_accvgpr_write_b32 a10, v01884; GFX908-NEXT: v_accvgpr_write_b32 a9, v01885; GFX908-NEXT: v_accvgpr_write_b32 a8, v01886; GFX908-NEXT: v_accvgpr_write_b32 a7, v01887; GFX908-NEXT: v_accvgpr_write_b32 a6, v01888; GFX908-NEXT: v_accvgpr_write_b32 a5, v01889; GFX908-NEXT: v_accvgpr_write_b32 a4, v01890; GFX908-NEXT: v_accvgpr_write_b32 a3, v01891; GFX908-NEXT: v_accvgpr_write_b32 a2, v01892; GFX908-NEXT: v_accvgpr_write_b32 a1, v01893; GFX908-NEXT: v_accvgpr_write_b32 a0, v01894; GFX908-NEXT: v_mov_b32_e32 v0, 2.01895; GFX908-NEXT: .LBB5_1: ; %for.cond.preheader1896; GFX908-NEXT: ; =>This Inner Loop Header: Depth=11897; GFX908-NEXT: s_nop 11898; GFX908-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v1, v0, a[0:31]1899; GFX908-NEXT: s_add_i32 s0, s0, -11900; GFX908-NEXT: s_cmp_lg_u32 s0, 01901; GFX908-NEXT: s_cbranch_scc1 .LBB5_11902; GFX908-NEXT: ; %bb.2: ; %exit1903; GFX908-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241904; GFX908-NEXT: s_nop 131905; GFX908-NEXT: v_accvgpr_read_b32 v0, a01906; GFX908-NEXT: v_accvgpr_read_b32 v28, a281907; GFX908-NEXT: v_accvgpr_read_b32 v29, a291908; GFX908-NEXT: v_accvgpr_read_b32 v30, a301909; GFX908-NEXT: v_accvgpr_read_b32 v31, a311910; GFX908-NEXT: v_mov_b32_e32 v32, 01911; GFX908-NEXT: v_accvgpr_read_b32 v1, a11912; GFX908-NEXT: v_accvgpr_read_b32 v2, a21913; GFX908-NEXT: v_accvgpr_read_b32 v3, a31914; GFX908-NEXT: v_accvgpr_read_b32 v4, a41915; GFX908-NEXT: v_accvgpr_read_b32 v5, a51916; GFX908-NEXT: v_accvgpr_read_b32 v6, a61917; GFX908-NEXT: v_accvgpr_read_b32 v7, a71918; GFX908-NEXT: v_accvgpr_read_b32 v8, a81919; GFX908-NEXT: v_accvgpr_read_b32 v9, a91920; GFX908-NEXT: v_accvgpr_read_b32 v10, a101921; GFX908-NEXT: v_accvgpr_read_b32 v11, a111922; GFX908-NEXT: v_accvgpr_read_b32 v12, a121923; GFX908-NEXT: v_accvgpr_read_b32 v13, a131924; GFX908-NEXT: v_accvgpr_read_b32 v14, a141925; GFX908-NEXT: v_accvgpr_read_b32 v15, a151926; GFX908-NEXT: v_accvgpr_read_b32 v16, a161927; GFX908-NEXT: v_accvgpr_read_b32 v17, a171928; GFX908-NEXT: v_accvgpr_read_b32 v18, a181929; GFX908-NEXT: v_accvgpr_read_b32 v19, a191930; GFX908-NEXT: v_accvgpr_read_b32 v20, a201931; GFX908-NEXT: v_accvgpr_read_b32 v21, a211932; GFX908-NEXT: v_accvgpr_read_b32 v22, a221933; GFX908-NEXT: v_accvgpr_read_b32 v23, a231934; GFX908-NEXT: v_accvgpr_read_b32 v24, a241935; GFX908-NEXT: v_accvgpr_read_b32 v25, a251936; GFX908-NEXT: v_accvgpr_read_b32 v26, a261937; GFX908-NEXT: v_accvgpr_read_b32 v27, a271938; GFX908-NEXT: s_waitcnt lgkmcnt(0)1939; GFX908-NEXT: global_store_dwordx4 v32, v[28:31], s[0:1] offset:1121940; GFX908-NEXT: global_store_dwordx4 v32, v[24:27], s[0:1] offset:961941; GFX908-NEXT: global_store_dwordx4 v32, v[20:23], s[0:1] offset:801942; GFX908-NEXT: global_store_dwordx4 v32, v[16:19], s[0:1] offset:641943; GFX908-NEXT: global_store_dwordx4 v32, v[12:15], s[0:1] offset:481944; GFX908-NEXT: global_store_dwordx4 v32, v[8:11], s[0:1] offset:321945; GFX908-NEXT: global_store_dwordx4 v32, v[4:7], s[0:1] offset:161946; GFX908-NEXT: global_store_dwordx4 v32, v[0:3], s[0:1]1947; GFX908-NEXT: s_endpgm1948;1949; GFX90A-LABEL: test_mfma_loop_sgpr_init:1950; GFX90A: ; %bb.0: ; %entry1951; GFX90A-NEXT: s_load_dword s1, s[4:5], 0x2c1952; GFX90A-NEXT: s_mov_b32 s0, 161953; GFX90A-NEXT: v_mov_b32_e32 v32, 1.01954; GFX90A-NEXT: s_waitcnt lgkmcnt(0)1955; GFX90A-NEXT: v_mov_b32_e32 v31, s11956; GFX90A-NEXT: v_mov_b32_e32 v0, s11957; GFX90A-NEXT: v_mov_b32_e32 v1, s11958; GFX90A-NEXT: v_mov_b32_e32 v2, s11959; GFX90A-NEXT: v_mov_b32_e32 v3, s11960; GFX90A-NEXT: v_mov_b32_e32 v4, s11961; GFX90A-NEXT: v_mov_b32_e32 v5, s11962; GFX90A-NEXT: v_mov_b32_e32 v6, s11963; GFX90A-NEXT: v_mov_b32_e32 v7, s11964; GFX90A-NEXT: v_mov_b32_e32 v8, s11965; GFX90A-NEXT: v_mov_b32_e32 v9, s11966; GFX90A-NEXT: v_mov_b32_e32 v10, s11967; GFX90A-NEXT: v_mov_b32_e32 v11, s11968; GFX90A-NEXT: v_mov_b32_e32 v12, s11969; GFX90A-NEXT: v_mov_b32_e32 v13, s11970; GFX90A-NEXT: v_mov_b32_e32 v14, s11971; GFX90A-NEXT: v_mov_b32_e32 v15, s11972; GFX90A-NEXT: v_mov_b32_e32 v16, s11973; GFX90A-NEXT: v_mov_b32_e32 v17, s11974; GFX90A-NEXT: v_mov_b32_e32 v18, s11975; GFX90A-NEXT: v_mov_b32_e32 v19, s11976; GFX90A-NEXT: v_mov_b32_e32 v20, s11977; GFX90A-NEXT: v_mov_b32_e32 v21, s11978; GFX90A-NEXT: v_mov_b32_e32 v22, s11979; GFX90A-NEXT: v_mov_b32_e32 v23, s11980; GFX90A-NEXT: v_mov_b32_e32 v24, s11981; GFX90A-NEXT: v_mov_b32_e32 v25, s11982; GFX90A-NEXT: v_mov_b32_e32 v26, s11983; GFX90A-NEXT: v_mov_b32_e32 v27, s11984; GFX90A-NEXT: v_mov_b32_e32 v28, s11985; GFX90A-NEXT: v_mov_b32_e32 v29, s11986; GFX90A-NEXT: v_mov_b32_e32 v30, s11987; GFX90A-NEXT: .LBB5_1: ; %for.cond.preheader1988; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=11989; GFX90A-NEXT: v_accvgpr_write_b32 a0, v01990; GFX90A-NEXT: v_accvgpr_write_b32 a1, v11991; GFX90A-NEXT: v_accvgpr_write_b32 a2, v21992; GFX90A-NEXT: v_accvgpr_write_b32 a3, v31993; GFX90A-NEXT: v_accvgpr_write_b32 a4, v41994; GFX90A-NEXT: v_accvgpr_write_b32 a5, v51995; GFX90A-NEXT: v_accvgpr_write_b32 a6, v61996; GFX90A-NEXT: v_accvgpr_write_b32 a7, v71997; GFX90A-NEXT: v_accvgpr_write_b32 a8, v81998; GFX90A-NEXT: v_accvgpr_write_b32 a9, v91999; GFX90A-NEXT: v_accvgpr_write_b32 a10, v102000; GFX90A-NEXT: v_accvgpr_write_b32 a11, v112001; GFX90A-NEXT: v_accvgpr_write_b32 a12, v122002; GFX90A-NEXT: v_accvgpr_write_b32 a13, v132003; GFX90A-NEXT: v_accvgpr_write_b32 a14, v142004; GFX90A-NEXT: v_accvgpr_write_b32 a15, v152005; GFX90A-NEXT: v_accvgpr_write_b32 a16, v162006; GFX90A-NEXT: v_accvgpr_write_b32 a17, v172007; GFX90A-NEXT: v_accvgpr_write_b32 a18, v182008; GFX90A-NEXT: v_accvgpr_write_b32 a19, v192009; GFX90A-NEXT: v_accvgpr_write_b32 a20, v202010; GFX90A-NEXT: v_accvgpr_write_b32 a21, v212011; GFX90A-NEXT: v_accvgpr_write_b32 a22, v222012; GFX90A-NEXT: v_accvgpr_write_b32 a23, v232013; GFX90A-NEXT: v_accvgpr_write_b32 a24, v242014; GFX90A-NEXT: v_accvgpr_write_b32 a25, v252015; GFX90A-NEXT: v_accvgpr_write_b32 a26, v262016; GFX90A-NEXT: v_accvgpr_write_b32 a27, v272017; GFX90A-NEXT: v_accvgpr_write_b32 a28, v282018; GFX90A-NEXT: v_accvgpr_write_b32 a29, v292019; GFX90A-NEXT: v_accvgpr_write_b32 a30, v302020; GFX90A-NEXT: v_accvgpr_write_b32 a31, v312021; GFX90A-NEXT: v_mov_b32_e32 v0, 2.02022; GFX90A-NEXT: s_add_i32 s0, s0, -12023; GFX90A-NEXT: s_cmp_lg_u32 s0, 02024; GFX90A-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v32, v0, a[0:31]2025; GFX90A-NEXT: s_nop 152026; GFX90A-NEXT: s_nop 22027; GFX90A-NEXT: v_accvgpr_read_b32 v0, a02028; GFX90A-NEXT: v_accvgpr_read_b32 v1, a12029; GFX90A-NEXT: v_accvgpr_read_b32 v2, a22030; GFX90A-NEXT: v_accvgpr_read_b32 v3, a32031; GFX90A-NEXT: v_accvgpr_read_b32 v4, a42032; GFX90A-NEXT: v_accvgpr_read_b32 v5, a52033; GFX90A-NEXT: v_accvgpr_read_b32 v6, a62034; GFX90A-NEXT: v_accvgpr_read_b32 v7, a72035; GFX90A-NEXT: v_accvgpr_read_b32 v8, a82036; GFX90A-NEXT: v_accvgpr_read_b32 v9, a92037; GFX90A-NEXT: v_accvgpr_read_b32 v10, a102038; GFX90A-NEXT: v_accvgpr_read_b32 v11, a112039; GFX90A-NEXT: v_accvgpr_read_b32 v12, a122040; GFX90A-NEXT: v_accvgpr_read_b32 v13, a132041; GFX90A-NEXT: v_accvgpr_read_b32 v14, a142042; GFX90A-NEXT: v_accvgpr_read_b32 v15, a152043; GFX90A-NEXT: v_accvgpr_read_b32 v16, a162044; GFX90A-NEXT: v_accvgpr_read_b32 v17, a172045; GFX90A-NEXT: v_accvgpr_read_b32 v18, a182046; GFX90A-NEXT: v_accvgpr_read_b32 v19, a192047; GFX90A-NEXT: v_accvgpr_read_b32 v20, a202048; GFX90A-NEXT: v_accvgpr_read_b32 v21, a212049; GFX90A-NEXT: v_accvgpr_read_b32 v22, a222050; GFX90A-NEXT: v_accvgpr_read_b32 v23, a232051; GFX90A-NEXT: v_accvgpr_read_b32 v24, a242052; GFX90A-NEXT: v_accvgpr_read_b32 v25, a252053; GFX90A-NEXT: v_accvgpr_read_b32 v26, a262054; GFX90A-NEXT: v_accvgpr_read_b32 v27, a272055; GFX90A-NEXT: v_accvgpr_read_b32 v28, a282056; GFX90A-NEXT: v_accvgpr_read_b32 v29, a292057; GFX90A-NEXT: v_accvgpr_read_b32 v30, a302058; GFX90A-NEXT: v_accvgpr_read_b32 v31, a312059; GFX90A-NEXT: s_cbranch_scc1 .LBB5_12060; GFX90A-NEXT: ; %bb.2: ; %exit2061; GFX90A-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242062; GFX90A-NEXT: v_mov_b32_e32 v0, 02063; GFX90A-NEXT: s_waitcnt lgkmcnt(0)2064; GFX90A-NEXT: global_store_dwordx4 v0, a[28:31], s[0:1] offset:1122065; GFX90A-NEXT: global_store_dwordx4 v0, a[24:27], s[0:1] offset:962066; GFX90A-NEXT: global_store_dwordx4 v0, a[20:23], s[0:1] offset:802067; GFX90A-NEXT: global_store_dwordx4 v0, a[16:19], s[0:1] offset:642068; GFX90A-NEXT: global_store_dwordx4 v0, a[12:15], s[0:1] offset:482069; GFX90A-NEXT: global_store_dwordx4 v0, a[8:11], s[0:1] offset:322070; GFX90A-NEXT: global_store_dwordx4 v0, a[4:7], s[0:1] offset:162071; GFX90A-NEXT: global_store_dwordx4 v0, a[0:3], s[0:1]2072; GFX90A-NEXT: s_endpgm2073;2074; GFX942-LABEL: test_mfma_loop_sgpr_init:2075; GFX942: ; %bb.0: ; %entry2076; GFX942-NEXT: s_load_dword s1, s[4:5], 0x2c2077; GFX942-NEXT: s_mov_b32 s0, 162078; GFX942-NEXT: v_mov_b32_e32 v32, 1.02079; GFX942-NEXT: s_waitcnt lgkmcnt(0)2080; GFX942-NEXT: v_mov_b32_e32 v31, s12081; GFX942-NEXT: v_mov_b32_e32 v0, s12082; GFX942-NEXT: v_mov_b32_e32 v1, s12083; GFX942-NEXT: v_mov_b32_e32 v2, s12084; GFX942-NEXT: v_mov_b32_e32 v3, s12085; GFX942-NEXT: v_mov_b32_e32 v4, s12086; GFX942-NEXT: v_mov_b32_e32 v5, s12087; GFX942-NEXT: v_mov_b32_e32 v6, s12088; GFX942-NEXT: v_mov_b32_e32 v7, s12089; GFX942-NEXT: v_mov_b32_e32 v8, s12090; GFX942-NEXT: v_mov_b32_e32 v9, s12091; GFX942-NEXT: v_mov_b32_e32 v10, s12092; GFX942-NEXT: v_mov_b32_e32 v11, s12093; GFX942-NEXT: v_mov_b32_e32 v12, s12094; GFX942-NEXT: v_mov_b32_e32 v13, s12095; GFX942-NEXT: v_mov_b32_e32 v14, s12096; GFX942-NEXT: v_mov_b32_e32 v15, s12097; GFX942-NEXT: v_mov_b32_e32 v16, s12098; GFX942-NEXT: v_mov_b32_e32 v17, s12099; GFX942-NEXT: v_mov_b32_e32 v18, s12100; GFX942-NEXT: v_mov_b32_e32 v19, s12101; GFX942-NEXT: v_mov_b32_e32 v20, s12102; GFX942-NEXT: v_mov_b32_e32 v21, s12103; GFX942-NEXT: v_mov_b32_e32 v22, s12104; GFX942-NEXT: v_mov_b32_e32 v23, s12105; GFX942-NEXT: v_mov_b32_e32 v24, s12106; GFX942-NEXT: v_mov_b32_e32 v25, s12107; GFX942-NEXT: v_mov_b32_e32 v26, s12108; GFX942-NEXT: v_mov_b32_e32 v27, s12109; GFX942-NEXT: v_mov_b32_e32 v28, s12110; GFX942-NEXT: v_mov_b32_e32 v29, s12111; GFX942-NEXT: v_mov_b32_e32 v30, s12112; GFX942-NEXT: .LBB5_1: ; %for.cond.preheader2113; GFX942-NEXT: ; =>This Inner Loop Header: Depth=12114; GFX942-NEXT: v_accvgpr_write_b32 a0, v02115; GFX942-NEXT: v_accvgpr_write_b32 a1, v12116; GFX942-NEXT: v_accvgpr_write_b32 a2, v22117; GFX942-NEXT: v_accvgpr_write_b32 a3, v32118; GFX942-NEXT: v_accvgpr_write_b32 a4, v42119; GFX942-NEXT: v_accvgpr_write_b32 a5, v52120; GFX942-NEXT: v_accvgpr_write_b32 a6, v62121; GFX942-NEXT: v_accvgpr_write_b32 a7, v72122; GFX942-NEXT: v_accvgpr_write_b32 a8, v82123; GFX942-NEXT: v_accvgpr_write_b32 a9, v92124; GFX942-NEXT: v_accvgpr_write_b32 a10, v102125; GFX942-NEXT: v_accvgpr_write_b32 a11, v112126; GFX942-NEXT: v_accvgpr_write_b32 a12, v122127; GFX942-NEXT: v_accvgpr_write_b32 a13, v132128; GFX942-NEXT: v_accvgpr_write_b32 a14, v142129; GFX942-NEXT: v_accvgpr_write_b32 a15, v152130; GFX942-NEXT: v_accvgpr_write_b32 a16, v162131; GFX942-NEXT: v_accvgpr_write_b32 a17, v172132; GFX942-NEXT: v_accvgpr_write_b32 a18, v182133; GFX942-NEXT: v_accvgpr_write_b32 a19, v192134; GFX942-NEXT: v_accvgpr_write_b32 a20, v202135; GFX942-NEXT: v_accvgpr_write_b32 a21, v212136; GFX942-NEXT: v_accvgpr_write_b32 a22, v222137; GFX942-NEXT: v_accvgpr_write_b32 a23, v232138; GFX942-NEXT: v_accvgpr_write_b32 a24, v242139; GFX942-NEXT: v_accvgpr_write_b32 a25, v252140; GFX942-NEXT: v_accvgpr_write_b32 a26, v262141; GFX942-NEXT: v_accvgpr_write_b32 a27, v272142; GFX942-NEXT: v_accvgpr_write_b32 a28, v282143; GFX942-NEXT: v_accvgpr_write_b32 a29, v292144; GFX942-NEXT: v_accvgpr_write_b32 a30, v302145; GFX942-NEXT: v_accvgpr_write_b32 a31, v312146; GFX942-NEXT: v_mov_b32_e32 v0, 2.02147; GFX942-NEXT: s_add_i32 s0, s0, -12148; GFX942-NEXT: s_cmp_lg_u32 s0, 02149; GFX942-NEXT: v_mfma_f32_32x32x1_2b_f32 a[0:31], v32, v0, a[0:31]2150; GFX942-NEXT: s_nop 152151; GFX942-NEXT: s_nop 12152; GFX942-NEXT: v_accvgpr_read_b32 v0, a02153; GFX942-NEXT: v_accvgpr_read_b32 v1, a12154; GFX942-NEXT: v_accvgpr_read_b32 v2, a22155; GFX942-NEXT: v_accvgpr_read_b32 v3, a32156; GFX942-NEXT: v_accvgpr_read_b32 v4, a42157; GFX942-NEXT: v_accvgpr_read_b32 v5, a52158; GFX942-NEXT: v_accvgpr_read_b32 v6, a62159; GFX942-NEXT: v_accvgpr_read_b32 v7, a72160; GFX942-NEXT: v_accvgpr_read_b32 v8, a82161; GFX942-NEXT: v_accvgpr_read_b32 v9, a92162; GFX942-NEXT: v_accvgpr_read_b32 v10, a102163; GFX942-NEXT: v_accvgpr_read_b32 v11, a112164; GFX942-NEXT: v_accvgpr_read_b32 v12, a122165; GFX942-NEXT: v_accvgpr_read_b32 v13, a132166; GFX942-NEXT: v_accvgpr_read_b32 v14, a142167; GFX942-NEXT: v_accvgpr_read_b32 v15, a152168; GFX942-NEXT: v_accvgpr_read_b32 v16, a162169; GFX942-NEXT: v_accvgpr_read_b32 v17, a172170; GFX942-NEXT: v_accvgpr_read_b32 v18, a182171; GFX942-NEXT: v_accvgpr_read_b32 v19, a192172; GFX942-NEXT: v_accvgpr_read_b32 v20, a202173; GFX942-NEXT: v_accvgpr_read_b32 v21, a212174; GFX942-NEXT: v_accvgpr_read_b32 v22, a222175; GFX942-NEXT: v_accvgpr_read_b32 v23, a232176; GFX942-NEXT: v_accvgpr_read_b32 v24, a242177; GFX942-NEXT: v_accvgpr_read_b32 v25, a252178; GFX942-NEXT: v_accvgpr_read_b32 v26, a262179; GFX942-NEXT: v_accvgpr_read_b32 v27, a272180; GFX942-NEXT: v_accvgpr_read_b32 v28, a282181; GFX942-NEXT: v_accvgpr_read_b32 v29, a292182; GFX942-NEXT: v_accvgpr_read_b32 v30, a302183; GFX942-NEXT: v_accvgpr_read_b32 v31, a312184; GFX942-NEXT: s_cbranch_scc1 .LBB5_12185; GFX942-NEXT: ; %bb.2: ; %exit2186; GFX942-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242187; GFX942-NEXT: v_mov_b32_e32 v0, 02188; GFX942-NEXT: s_waitcnt lgkmcnt(0)2189; GFX942-NEXT: global_store_dwordx4 v0, a[28:31], s[0:1] offset:1122190; GFX942-NEXT: global_store_dwordx4 v0, a[24:27], s[0:1] offset:962191; GFX942-NEXT: global_store_dwordx4 v0, a[20:23], s[0:1] offset:802192; GFX942-NEXT: global_store_dwordx4 v0, a[16:19], s[0:1] offset:642193; GFX942-NEXT: global_store_dwordx4 v0, a[12:15], s[0:1] offset:482194; GFX942-NEXT: global_store_dwordx4 v0, a[8:11], s[0:1] offset:322195; GFX942-NEXT: global_store_dwordx4 v0, a[4:7], s[0:1] offset:162196; GFX942-NEXT: global_store_dwordx4 v0, a[0:3], s[0:1]2197; GFX942-NEXT: s_endpgm2198entry:2199 %tmp0 = insertelement <32 x float> poison, float %init, i32 02200 %tmp1 = insertelement <32 x float> %tmp0, float %init, i32 12201 %tmp2 = insertelement <32 x float> %tmp1, float %init, i32 22202 %tmp3 = insertelement <32 x float> %tmp2, float %init, i32 32203 %tmp4 = insertelement <32 x float> %tmp3, float %init, i32 42204 %tmp5 = insertelement <32 x float> %tmp4, float %init, i32 52205 %tmp6 = insertelement <32 x float> %tmp5, float %init, i32 62206 %tmp7 = insertelement <32 x float> %tmp6, float %init, i32 72207 %tmp8 = insertelement <32 x float> %tmp7, float %init, i32 82208 %tmp9 = insertelement <32 x float> %tmp8, float %init, i32 92209 %tmp10 = insertelement <32 x float> %tmp9, float %init, i32 102210 %tmp11 = insertelement <32 x float> %tmp10, float %init, i32 112211 %tmp12 = insertelement <32 x float> %tmp11, float %init, i32 122212 %tmp13 = insertelement <32 x float> %tmp12, float %init, i32 132213 %tmp14 = insertelement <32 x float> %tmp13, float %init, i32 142214 %tmp15 = insertelement <32 x float> %tmp14, float %init, i32 152215 %tmp16 = insertelement <32 x float> %tmp15, float %init, i32 162216 %tmp17 = insertelement <32 x float> %tmp16, float %init, i32 172217 %tmp18 = insertelement <32 x float> %tmp17, float %init, i32 182218 %tmp19 = insertelement <32 x float> %tmp18, float %init, i32 192219 %tmp20 = insertelement <32 x float> %tmp19, float %init, i32 202220 %tmp21 = insertelement <32 x float> %tmp20, float %init, i32 212221 %tmp22 = insertelement <32 x float> %tmp21, float %init, i32 222222 %tmp23 = insertelement <32 x float> %tmp22, float %init, i32 232223 %tmp24 = insertelement <32 x float> %tmp23, float %init, i32 242224 %tmp25 = insertelement <32 x float> %tmp24, float %init, i32 252225 %tmp26 = insertelement <32 x float> %tmp25, float %init, i32 262226 %tmp27 = insertelement <32 x float> %tmp26, float %init, i32 272227 %tmp28 = insertelement <32 x float> %tmp27, float %init, i32 282228 %tmp29 = insertelement <32 x float> %tmp28, float %init, i32 292229 %tmp30 = insertelement <32 x float> %tmp29, float %init, i32 302230 %tmp31 = insertelement <32 x float> %tmp30, float %init, i32 312231 2232 br label %for.cond.preheader2233 2234for.cond.preheader:2235 %phi = phi <32 x float> [ %tmp31, %entry ], [ %mai.1, %for.cond.preheader ]2236 %c = phi i32 [ 0, %entry ], [ %inc, %for.cond.preheader ]2237 %mai.1 = tail call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float 1.0, float 2.0, <32 x float> %phi, i32 0, i32 0, i32 0)2238 %inc = add nuw nsw i32 %c, 12239 %cc = icmp eq i32 %inc, 162240 br i1 %cc, label %exit, label %for.cond.preheader2241 2242exit:2243 store <32 x float> %mai.1, ptr addrspace(1) %arg2244 ret void2245}2246 2247define amdgpu_kernel void @test_mfma_loop_mixed_init(ptr addrspace(1) %arg, float %x) #0 {2248; GFX908-LABEL: test_mfma_loop_mixed_init:2249; GFX908: ; %bb.0: ; %entry2250; GFX908-NEXT: s_load_dword s1, s[4:5], 0x2c2251; GFX908-NEXT: v_accvgpr_write_b32 a0, v02252; GFX908-NEXT: v_accvgpr_write_b32 a31, 02253; GFX908-NEXT: v_accvgpr_write_b32 a30, 02254; GFX908-NEXT: v_accvgpr_write_b32 a29, 02255; GFX908-NEXT: s_waitcnt lgkmcnt(0)2256; GFX908-NEXT: v_mov_b32_e32 v0, s12257; GFX908-NEXT: v_accvgpr_write_b32 a28, 02258; GFX908-NEXT: v_accvgpr_write_b32 a27, 02259; GFX908-NEXT: v_accvgpr_write_b32 a26, 02260; GFX908-NEXT: v_accvgpr_write_b32 a25, 02261; GFX908-NEXT: v_accvgpr_write_b32 a24, 02262; GFX908-NEXT: v_accvgpr_write_b32 a23, 02263; GFX908-NEXT: v_accvgpr_write_b32 a22, 02264; GFX908-NEXT: v_accvgpr_write_b32 a21, 02265; GFX908-NEXT: v_accvgpr_write_b32 a20, 02266; GFX908-NEXT: v_accvgpr_write_b32 a19, 02267; GFX908-NEXT: v_accvgpr_write_b32 a18, 02268; GFX908-NEXT: v_accvgpr_write_b32 a17, 02269; GFX908-NEXT: v_accvgpr_write_b32 a16, 02270; GFX908-NEXT: v_accvgpr_write_b32 a15, 02271; GFX908-NEXT: v_accvgpr_write_b32 a14, 02272; GFX908-NEXT: v_accvgpr_write_b32 a13, 02273; GFX908-NEXT: v_accvgpr_write_b32 a12, 02274; GFX908-NEXT: v_accvgpr_write_b32 a11, 02275; GFX908-NEXT: v_accvgpr_write_b32 a10, 02276; GFX908-NEXT: v_accvgpr_write_b32 a9, 02277; GFX908-NEXT: v_accvgpr_write_b32 a8, 02278; GFX908-NEXT: v_accvgpr_write_b32 a7, 02279; GFX908-NEXT: v_accvgpr_write_b32 a6, 02280; GFX908-NEXT: v_accvgpr_write_b32 a5, 02281; GFX908-NEXT: v_accvgpr_write_b32 a4, 02282; GFX908-NEXT: v_accvgpr_write_b32 a3, 02283; GFX908-NEXT: v_accvgpr_write_b32 a2, 02284; GFX908-NEXT: v_accvgpr_write_b32 a1, v02285; GFX908-NEXT: s_mov_b32 s0, 162286; GFX908-NEXT: v_mov_b32_e32 v0, 2.02287; GFX908-NEXT: v_mov_b32_e32 v1, 1.02288; GFX908-NEXT: .LBB6_1: ; %for.cond.preheader2289; GFX908-NEXT: ; =>This Inner Loop Header: Depth=12290; GFX908-NEXT: s_nop 12291; GFX908-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v1, v0, a[0:31]2292; GFX908-NEXT: s_add_i32 s0, s0, -12293; GFX908-NEXT: s_cmp_lg_u32 s0, 02294; GFX908-NEXT: s_cbranch_scc1 .LBB6_12295; GFX908-NEXT: ; %bb.2: ; %exit2296; GFX908-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242297; GFX908-NEXT: s_nop 132298; GFX908-NEXT: v_accvgpr_read_b32 v0, a02299; GFX908-NEXT: v_accvgpr_read_b32 v28, a282300; GFX908-NEXT: v_accvgpr_read_b32 v29, a292301; GFX908-NEXT: v_accvgpr_read_b32 v30, a302302; GFX908-NEXT: v_accvgpr_read_b32 v31, a312303; GFX908-NEXT: v_mov_b32_e32 v32, 02304; GFX908-NEXT: v_accvgpr_read_b32 v1, a12305; GFX908-NEXT: v_accvgpr_read_b32 v2, a22306; GFX908-NEXT: v_accvgpr_read_b32 v3, a32307; GFX908-NEXT: v_accvgpr_read_b32 v4, a42308; GFX908-NEXT: v_accvgpr_read_b32 v5, a52309; GFX908-NEXT: v_accvgpr_read_b32 v6, a62310; GFX908-NEXT: v_accvgpr_read_b32 v7, a72311; GFX908-NEXT: v_accvgpr_read_b32 v8, a82312; GFX908-NEXT: v_accvgpr_read_b32 v9, a92313; GFX908-NEXT: v_accvgpr_read_b32 v10, a102314; GFX908-NEXT: v_accvgpr_read_b32 v11, a112315; GFX908-NEXT: v_accvgpr_read_b32 v12, a122316; GFX908-NEXT: v_accvgpr_read_b32 v13, a132317; GFX908-NEXT: v_accvgpr_read_b32 v14, a142318; GFX908-NEXT: v_accvgpr_read_b32 v15, a152319; GFX908-NEXT: v_accvgpr_read_b32 v16, a162320; GFX908-NEXT: v_accvgpr_read_b32 v17, a172321; GFX908-NEXT: v_accvgpr_read_b32 v18, a182322; GFX908-NEXT: v_accvgpr_read_b32 v19, a192323; GFX908-NEXT: v_accvgpr_read_b32 v20, a202324; GFX908-NEXT: v_accvgpr_read_b32 v21, a212325; GFX908-NEXT: v_accvgpr_read_b32 v22, a222326; GFX908-NEXT: v_accvgpr_read_b32 v23, a232327; GFX908-NEXT: v_accvgpr_read_b32 v24, a242328; GFX908-NEXT: v_accvgpr_read_b32 v25, a252329; GFX908-NEXT: v_accvgpr_read_b32 v26, a262330; GFX908-NEXT: v_accvgpr_read_b32 v27, a272331; GFX908-NEXT: s_waitcnt lgkmcnt(0)2332; GFX908-NEXT: global_store_dwordx4 v32, v[28:31], s[0:1] offset:1122333; GFX908-NEXT: global_store_dwordx4 v32, v[24:27], s[0:1] offset:962334; GFX908-NEXT: global_store_dwordx4 v32, v[20:23], s[0:1] offset:802335; GFX908-NEXT: global_store_dwordx4 v32, v[16:19], s[0:1] offset:642336; GFX908-NEXT: global_store_dwordx4 v32, v[12:15], s[0:1] offset:482337; GFX908-NEXT: global_store_dwordx4 v32, v[8:11], s[0:1] offset:322338; GFX908-NEXT: global_store_dwordx4 v32, v[4:7], s[0:1] offset:162339; GFX908-NEXT: global_store_dwordx4 v32, v[0:3], s[0:1]2340; GFX908-NEXT: s_endpgm2341;2342; GFX90A-LABEL: test_mfma_loop_mixed_init:2343; GFX90A: ; %bb.0: ; %entry2344; GFX90A-NEXT: s_load_dword s1, s[4:5], 0x2c2345; GFX90A-NEXT: s_mov_b32 s0, 162346; GFX90A-NEXT: v_mov_b32_e32 v2, 02347; GFX90A-NEXT: v_and_b32_e32 v0, 0x3ff, v02348; GFX90A-NEXT: v_mov_b32_e32 v3, 02349; GFX90A-NEXT: s_waitcnt lgkmcnt(0)2350; GFX90A-NEXT: v_mov_b32_e32 v1, s12351; GFX90A-NEXT: v_mov_b32_e32 v4, 02352; GFX90A-NEXT: v_mov_b32_e32 v5, 02353; GFX90A-NEXT: v_mov_b32_e32 v6, 02354; GFX90A-NEXT: v_mov_b32_e32 v7, 02355; GFX90A-NEXT: v_mov_b32_e32 v8, 02356; GFX90A-NEXT: v_mov_b32_e32 v9, 02357; GFX90A-NEXT: v_mov_b32_e32 v10, 02358; GFX90A-NEXT: v_mov_b32_e32 v11, 02359; GFX90A-NEXT: v_mov_b32_e32 v12, 02360; GFX90A-NEXT: v_mov_b32_e32 v13, 02361; GFX90A-NEXT: v_mov_b32_e32 v14, 02362; GFX90A-NEXT: v_mov_b32_e32 v15, 02363; GFX90A-NEXT: v_mov_b32_e32 v16, 02364; GFX90A-NEXT: v_mov_b32_e32 v17, 02365; GFX90A-NEXT: v_mov_b32_e32 v18, 02366; GFX90A-NEXT: v_mov_b32_e32 v19, 02367; GFX90A-NEXT: v_mov_b32_e32 v20, 02368; GFX90A-NEXT: v_mov_b32_e32 v21, 02369; GFX90A-NEXT: v_mov_b32_e32 v22, 02370; GFX90A-NEXT: v_mov_b32_e32 v23, 02371; GFX90A-NEXT: v_mov_b32_e32 v24, 02372; GFX90A-NEXT: v_mov_b32_e32 v25, 02373; GFX90A-NEXT: v_mov_b32_e32 v26, 02374; GFX90A-NEXT: v_mov_b32_e32 v27, 02375; GFX90A-NEXT: v_mov_b32_e32 v28, 02376; GFX90A-NEXT: v_mov_b32_e32 v29, 02377; GFX90A-NEXT: v_mov_b32_e32 v30, 02378; GFX90A-NEXT: v_mov_b32_e32 v31, 02379; GFX90A-NEXT: v_mov_b32_e32 v32, 1.02380; GFX90A-NEXT: .LBB6_1: ; %for.cond.preheader2381; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=12382; GFX90A-NEXT: v_accvgpr_write_b32 a0, v02383; GFX90A-NEXT: v_accvgpr_write_b32 a1, v12384; GFX90A-NEXT: v_accvgpr_write_b32 a2, v22385; GFX90A-NEXT: v_accvgpr_write_b32 a3, v32386; GFX90A-NEXT: v_accvgpr_write_b32 a4, v42387; GFX90A-NEXT: v_accvgpr_write_b32 a5, v52388; GFX90A-NEXT: v_accvgpr_write_b32 a6, v62389; GFX90A-NEXT: v_accvgpr_write_b32 a7, v72390; GFX90A-NEXT: v_accvgpr_write_b32 a8, v82391; GFX90A-NEXT: v_accvgpr_write_b32 a9, v92392; GFX90A-NEXT: v_accvgpr_write_b32 a10, v102393; GFX90A-NEXT: v_accvgpr_write_b32 a11, v112394; GFX90A-NEXT: v_accvgpr_write_b32 a12, v122395; GFX90A-NEXT: v_accvgpr_write_b32 a13, v132396; GFX90A-NEXT: v_accvgpr_write_b32 a14, v142397; GFX90A-NEXT: v_accvgpr_write_b32 a15, v152398; GFX90A-NEXT: v_accvgpr_write_b32 a16, v162399; GFX90A-NEXT: v_accvgpr_write_b32 a17, v172400; GFX90A-NEXT: v_accvgpr_write_b32 a18, v182401; GFX90A-NEXT: v_accvgpr_write_b32 a19, v192402; GFX90A-NEXT: v_accvgpr_write_b32 a20, v202403; GFX90A-NEXT: v_accvgpr_write_b32 a21, v212404; GFX90A-NEXT: v_accvgpr_write_b32 a22, v222405; GFX90A-NEXT: v_accvgpr_write_b32 a23, v232406; GFX90A-NEXT: v_accvgpr_write_b32 a24, v242407; GFX90A-NEXT: v_accvgpr_write_b32 a25, v252408; GFX90A-NEXT: v_accvgpr_write_b32 a26, v262409; GFX90A-NEXT: v_accvgpr_write_b32 a27, v272410; GFX90A-NEXT: v_accvgpr_write_b32 a28, v282411; GFX90A-NEXT: v_accvgpr_write_b32 a29, v292412; GFX90A-NEXT: v_accvgpr_write_b32 a30, v302413; GFX90A-NEXT: v_accvgpr_write_b32 a31, v312414; GFX90A-NEXT: v_mov_b32_e32 v0, 2.02415; GFX90A-NEXT: s_add_i32 s0, s0, -12416; GFX90A-NEXT: s_cmp_lg_u32 s0, 02417; GFX90A-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v32, v0, a[0:31]2418; GFX90A-NEXT: s_nop 152419; GFX90A-NEXT: s_nop 22420; GFX90A-NEXT: v_accvgpr_read_b32 v0, a02421; GFX90A-NEXT: v_accvgpr_read_b32 v1, a12422; GFX90A-NEXT: v_accvgpr_read_b32 v2, a22423; GFX90A-NEXT: v_accvgpr_read_b32 v3, a32424; GFX90A-NEXT: v_accvgpr_read_b32 v4, a42425; GFX90A-NEXT: v_accvgpr_read_b32 v5, a52426; GFX90A-NEXT: v_accvgpr_read_b32 v6, a62427; GFX90A-NEXT: v_accvgpr_read_b32 v7, a72428; GFX90A-NEXT: v_accvgpr_read_b32 v8, a82429; GFX90A-NEXT: v_accvgpr_read_b32 v9, a92430; GFX90A-NEXT: v_accvgpr_read_b32 v10, a102431; GFX90A-NEXT: v_accvgpr_read_b32 v11, a112432; GFX90A-NEXT: v_accvgpr_read_b32 v12, a122433; GFX90A-NEXT: v_accvgpr_read_b32 v13, a132434; GFX90A-NEXT: v_accvgpr_read_b32 v14, a142435; GFX90A-NEXT: v_accvgpr_read_b32 v15, a152436; GFX90A-NEXT: v_accvgpr_read_b32 v16, a162437; GFX90A-NEXT: v_accvgpr_read_b32 v17, a172438; GFX90A-NEXT: v_accvgpr_read_b32 v18, a182439; GFX90A-NEXT: v_accvgpr_read_b32 v19, a192440; GFX90A-NEXT: v_accvgpr_read_b32 v20, a202441; GFX90A-NEXT: v_accvgpr_read_b32 v21, a212442; GFX90A-NEXT: v_accvgpr_read_b32 v22, a222443; GFX90A-NEXT: v_accvgpr_read_b32 v23, a232444; GFX90A-NEXT: v_accvgpr_read_b32 v24, a242445; GFX90A-NEXT: v_accvgpr_read_b32 v25, a252446; GFX90A-NEXT: v_accvgpr_read_b32 v26, a262447; GFX90A-NEXT: v_accvgpr_read_b32 v27, a272448; GFX90A-NEXT: v_accvgpr_read_b32 v28, a282449; GFX90A-NEXT: v_accvgpr_read_b32 v29, a292450; GFX90A-NEXT: v_accvgpr_read_b32 v30, a302451; GFX90A-NEXT: v_accvgpr_read_b32 v31, a312452; GFX90A-NEXT: s_cbranch_scc1 .LBB6_12453; GFX90A-NEXT: ; %bb.2: ; %exit2454; GFX90A-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242455; GFX90A-NEXT: v_mov_b32_e32 v0, 02456; GFX90A-NEXT: s_waitcnt lgkmcnt(0)2457; GFX90A-NEXT: global_store_dwordx4 v0, a[28:31], s[0:1] offset:1122458; GFX90A-NEXT: global_store_dwordx4 v0, a[24:27], s[0:1] offset:962459; GFX90A-NEXT: global_store_dwordx4 v0, a[20:23], s[0:1] offset:802460; GFX90A-NEXT: global_store_dwordx4 v0, a[16:19], s[0:1] offset:642461; GFX90A-NEXT: global_store_dwordx4 v0, a[12:15], s[0:1] offset:482462; GFX90A-NEXT: global_store_dwordx4 v0, a[8:11], s[0:1] offset:322463; GFX90A-NEXT: global_store_dwordx4 v0, a[4:7], s[0:1] offset:162464; GFX90A-NEXT: global_store_dwordx4 v0, a[0:3], s[0:1]2465; GFX90A-NEXT: s_endpgm2466;2467; GFX942-LABEL: test_mfma_loop_mixed_init:2468; GFX942: ; %bb.0: ; %entry2469; GFX942-NEXT: s_load_dword s1, s[4:5], 0x2c2470; GFX942-NEXT: s_mov_b32 s0, 162471; GFX942-NEXT: v_mov_b32_e32 v2, 02472; GFX942-NEXT: v_and_b32_e32 v0, 0x3ff, v02473; GFX942-NEXT: v_mov_b32_e32 v3, 02474; GFX942-NEXT: s_waitcnt lgkmcnt(0)2475; GFX942-NEXT: v_mov_b32_e32 v1, s12476; GFX942-NEXT: v_mov_b32_e32 v4, 02477; GFX942-NEXT: v_mov_b32_e32 v5, 02478; GFX942-NEXT: v_mov_b32_e32 v6, 02479; GFX942-NEXT: v_mov_b32_e32 v7, 02480; GFX942-NEXT: v_mov_b32_e32 v8, 02481; GFX942-NEXT: v_mov_b32_e32 v9, 02482; GFX942-NEXT: v_mov_b32_e32 v10, 02483; GFX942-NEXT: v_mov_b32_e32 v11, 02484; GFX942-NEXT: v_mov_b32_e32 v12, 02485; GFX942-NEXT: v_mov_b32_e32 v13, 02486; GFX942-NEXT: v_mov_b32_e32 v14, 02487; GFX942-NEXT: v_mov_b32_e32 v15, 02488; GFX942-NEXT: v_mov_b32_e32 v16, 02489; GFX942-NEXT: v_mov_b32_e32 v17, 02490; GFX942-NEXT: v_mov_b32_e32 v18, 02491; GFX942-NEXT: v_mov_b32_e32 v19, 02492; GFX942-NEXT: v_mov_b32_e32 v20, 02493; GFX942-NEXT: v_mov_b32_e32 v21, 02494; GFX942-NEXT: v_mov_b32_e32 v22, 02495; GFX942-NEXT: v_mov_b32_e32 v23, 02496; GFX942-NEXT: v_mov_b32_e32 v24, 02497; GFX942-NEXT: v_mov_b32_e32 v25, 02498; GFX942-NEXT: v_mov_b32_e32 v26, 02499; GFX942-NEXT: v_mov_b32_e32 v27, 02500; GFX942-NEXT: v_mov_b32_e32 v28, 02501; GFX942-NEXT: v_mov_b32_e32 v29, 02502; GFX942-NEXT: v_mov_b32_e32 v30, 02503; GFX942-NEXT: v_mov_b32_e32 v31, 02504; GFX942-NEXT: v_mov_b32_e32 v32, 1.02505; GFX942-NEXT: .LBB6_1: ; %for.cond.preheader2506; GFX942-NEXT: ; =>This Inner Loop Header: Depth=12507; GFX942-NEXT: v_accvgpr_write_b32 a0, v02508; GFX942-NEXT: v_accvgpr_write_b32 a1, v12509; GFX942-NEXT: v_accvgpr_write_b32 a2, v22510; GFX942-NEXT: v_accvgpr_write_b32 a3, v32511; GFX942-NEXT: v_accvgpr_write_b32 a4, v42512; GFX942-NEXT: v_accvgpr_write_b32 a5, v52513; GFX942-NEXT: v_accvgpr_write_b32 a6, v62514; GFX942-NEXT: v_accvgpr_write_b32 a7, v72515; GFX942-NEXT: v_accvgpr_write_b32 a8, v82516; GFX942-NEXT: v_accvgpr_write_b32 a9, v92517; GFX942-NEXT: v_accvgpr_write_b32 a10, v102518; GFX942-NEXT: v_accvgpr_write_b32 a11, v112519; GFX942-NEXT: v_accvgpr_write_b32 a12, v122520; GFX942-NEXT: v_accvgpr_write_b32 a13, v132521; GFX942-NEXT: v_accvgpr_write_b32 a14, v142522; GFX942-NEXT: v_accvgpr_write_b32 a15, v152523; GFX942-NEXT: v_accvgpr_write_b32 a16, v162524; GFX942-NEXT: v_accvgpr_write_b32 a17, v172525; GFX942-NEXT: v_accvgpr_write_b32 a18, v182526; GFX942-NEXT: v_accvgpr_write_b32 a19, v192527; GFX942-NEXT: v_accvgpr_write_b32 a20, v202528; GFX942-NEXT: v_accvgpr_write_b32 a21, v212529; GFX942-NEXT: v_accvgpr_write_b32 a22, v222530; GFX942-NEXT: v_accvgpr_write_b32 a23, v232531; GFX942-NEXT: v_accvgpr_write_b32 a24, v242532; GFX942-NEXT: v_accvgpr_write_b32 a25, v252533; GFX942-NEXT: v_accvgpr_write_b32 a26, v262534; GFX942-NEXT: v_accvgpr_write_b32 a27, v272535; GFX942-NEXT: v_accvgpr_write_b32 a28, v282536; GFX942-NEXT: v_accvgpr_write_b32 a29, v292537; GFX942-NEXT: v_accvgpr_write_b32 a30, v302538; GFX942-NEXT: v_accvgpr_write_b32 a31, v312539; GFX942-NEXT: v_mov_b32_e32 v0, 2.02540; GFX942-NEXT: s_add_i32 s0, s0, -12541; GFX942-NEXT: s_cmp_lg_u32 s0, 02542; GFX942-NEXT: v_mfma_f32_32x32x1_2b_f32 a[0:31], v32, v0, a[0:31]2543; GFX942-NEXT: s_nop 152544; GFX942-NEXT: s_nop 12545; GFX942-NEXT: v_accvgpr_read_b32 v0, a02546; GFX942-NEXT: v_accvgpr_read_b32 v1, a12547; GFX942-NEXT: v_accvgpr_read_b32 v2, a22548; GFX942-NEXT: v_accvgpr_read_b32 v3, a32549; GFX942-NEXT: v_accvgpr_read_b32 v4, a42550; GFX942-NEXT: v_accvgpr_read_b32 v5, a52551; GFX942-NEXT: v_accvgpr_read_b32 v6, a62552; GFX942-NEXT: v_accvgpr_read_b32 v7, a72553; GFX942-NEXT: v_accvgpr_read_b32 v8, a82554; GFX942-NEXT: v_accvgpr_read_b32 v9, a92555; GFX942-NEXT: v_accvgpr_read_b32 v10, a102556; GFX942-NEXT: v_accvgpr_read_b32 v11, a112557; GFX942-NEXT: v_accvgpr_read_b32 v12, a122558; GFX942-NEXT: v_accvgpr_read_b32 v13, a132559; GFX942-NEXT: v_accvgpr_read_b32 v14, a142560; GFX942-NEXT: v_accvgpr_read_b32 v15, a152561; GFX942-NEXT: v_accvgpr_read_b32 v16, a162562; GFX942-NEXT: v_accvgpr_read_b32 v17, a172563; GFX942-NEXT: v_accvgpr_read_b32 v18, a182564; GFX942-NEXT: v_accvgpr_read_b32 v19, a192565; GFX942-NEXT: v_accvgpr_read_b32 v20, a202566; GFX942-NEXT: v_accvgpr_read_b32 v21, a212567; GFX942-NEXT: v_accvgpr_read_b32 v22, a222568; GFX942-NEXT: v_accvgpr_read_b32 v23, a232569; GFX942-NEXT: v_accvgpr_read_b32 v24, a242570; GFX942-NEXT: v_accvgpr_read_b32 v25, a252571; GFX942-NEXT: v_accvgpr_read_b32 v26, a262572; GFX942-NEXT: v_accvgpr_read_b32 v27, a272573; GFX942-NEXT: v_accvgpr_read_b32 v28, a282574; GFX942-NEXT: v_accvgpr_read_b32 v29, a292575; GFX942-NEXT: v_accvgpr_read_b32 v30, a302576; GFX942-NEXT: v_accvgpr_read_b32 v31, a312577; GFX942-NEXT: s_cbranch_scc1 .LBB6_12578; GFX942-NEXT: ; %bb.2: ; %exit2579; GFX942-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242580; GFX942-NEXT: v_mov_b32_e32 v0, 02581; GFX942-NEXT: s_waitcnt lgkmcnt(0)2582; GFX942-NEXT: global_store_dwordx4 v0, a[28:31], s[0:1] offset:1122583; GFX942-NEXT: global_store_dwordx4 v0, a[24:27], s[0:1] offset:962584; GFX942-NEXT: global_store_dwordx4 v0, a[20:23], s[0:1] offset:802585; GFX942-NEXT: global_store_dwordx4 v0, a[16:19], s[0:1] offset:642586; GFX942-NEXT: global_store_dwordx4 v0, a[12:15], s[0:1] offset:482587; GFX942-NEXT: global_store_dwordx4 v0, a[8:11], s[0:1] offset:322588; GFX942-NEXT: global_store_dwordx4 v0, a[4:7], s[0:1] offset:162589; GFX942-NEXT: global_store_dwordx4 v0, a[0:3], s[0:1]2590; GFX942-NEXT: s_endpgm2591entry:2592 %tid = call i32 @llvm.amdgcn.workitem.id.x()2593 %init = bitcast i32 %tid to float2594 %tmp0 = insertelement <32 x float> zeroinitializer, float %init, i32 02595 %tmp1 = insertelement <32 x float> %tmp0, float %x, i32 12596 2597 br label %for.cond.preheader2598 2599for.cond.preheader:2600 %phi = phi <32 x float> [ %tmp1, %entry ], [ %mai.1, %for.cond.preheader ]2601 %c = phi i32 [ 0, %entry ], [ %inc, %for.cond.preheader ]2602 %mai.1 = tail call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float 1.0, float 2.0, <32 x float> %phi, i32 0, i32 0, i32 0)2603 %inc = add nuw nsw i32 %c, 12604 %cc = icmp eq i32 %inc, 162605 br i1 %cc, label %exit, label %for.cond.preheader2606 2607exit:2608 store <32 x float> %mai.1, ptr addrspace(1) %arg2609 ret void2610}2611 2612define amdgpu_kernel void @test_mfma_loop_mfma_forward_init(ptr addrspace(1) %arg) #0 {2613; GFX908-LABEL: test_mfma_loop_mfma_forward_init:2614; GFX908: ; %bb.0: ; %entry2615; GFX908-NEXT: v_mov_b32_e32 v0, 1.02616; GFX908-NEXT: v_accvgpr_write_b32 a0, 02617; GFX908-NEXT: v_accvgpr_write_b32 a1, 02618; GFX908-NEXT: v_accvgpr_write_b32 a2, 02619; GFX908-NEXT: v_accvgpr_write_b32 a3, 02620; GFX908-NEXT: v_accvgpr_write_b32 a4, 02621; GFX908-NEXT: v_accvgpr_write_b32 a5, 02622; GFX908-NEXT: v_accvgpr_write_b32 a6, 02623; GFX908-NEXT: v_accvgpr_write_b32 a7, 02624; GFX908-NEXT: v_accvgpr_write_b32 a8, 02625; GFX908-NEXT: v_accvgpr_write_b32 a9, 02626; GFX908-NEXT: v_accvgpr_write_b32 a10, 02627; GFX908-NEXT: v_accvgpr_write_b32 a11, 02628; GFX908-NEXT: v_accvgpr_write_b32 a12, 02629; GFX908-NEXT: v_accvgpr_write_b32 a13, 02630; GFX908-NEXT: v_accvgpr_write_b32 a14, 02631; GFX908-NEXT: v_accvgpr_write_b32 a15, 02632; GFX908-NEXT: v_accvgpr_write_b32 a16, 02633; GFX908-NEXT: v_accvgpr_write_b32 a17, 02634; GFX908-NEXT: v_accvgpr_write_b32 a18, 02635; GFX908-NEXT: v_accvgpr_write_b32 a19, 02636; GFX908-NEXT: v_accvgpr_write_b32 a20, 02637; GFX908-NEXT: v_accvgpr_write_b32 a21, 02638; GFX908-NEXT: v_accvgpr_write_b32 a22, 02639; GFX908-NEXT: v_accvgpr_write_b32 a23, 02640; GFX908-NEXT: v_accvgpr_write_b32 a24, 02641; GFX908-NEXT: v_accvgpr_write_b32 a25, 02642; GFX908-NEXT: v_accvgpr_write_b32 a26, 02643; GFX908-NEXT: v_accvgpr_write_b32 a27, 02644; GFX908-NEXT: v_accvgpr_write_b32 a28, 02645; GFX908-NEXT: v_accvgpr_write_b32 a29, 02646; GFX908-NEXT: v_accvgpr_write_b32 a30, 02647; GFX908-NEXT: v_accvgpr_write_b32 a31, 02648; GFX908-NEXT: v_mov_b32_e32 v1, 2.02649; GFX908-NEXT: s_mov_b32 s0, 162650; GFX908-NEXT: s_nop 02651; GFX908-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v0, v1, a[0:31]2652; GFX908-NEXT: .LBB7_1: ; %for.cond.preheader2653; GFX908-NEXT: ; =>This Inner Loop Header: Depth=12654; GFX908-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v0, v1, a[0:31]2655; GFX908-NEXT: s_add_i32 s0, s0, -12656; GFX908-NEXT: s_cmp_lg_u32 s0, 02657; GFX908-NEXT: s_cbranch_scc1 .LBB7_12658; GFX908-NEXT: ; %bb.2: ; %exit2659; GFX908-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242660; GFX908-NEXT: s_nop 132661; GFX908-NEXT: v_accvgpr_read_b32 v0, a02662; GFX908-NEXT: v_accvgpr_read_b32 v28, a282663; GFX908-NEXT: v_accvgpr_read_b32 v29, a292664; GFX908-NEXT: v_accvgpr_read_b32 v30, a302665; GFX908-NEXT: v_accvgpr_read_b32 v31, a312666; GFX908-NEXT: v_mov_b32_e32 v32, 02667; GFX908-NEXT: v_accvgpr_read_b32 v1, a12668; GFX908-NEXT: v_accvgpr_read_b32 v2, a22669; GFX908-NEXT: v_accvgpr_read_b32 v3, a32670; GFX908-NEXT: v_accvgpr_read_b32 v4, a42671; GFX908-NEXT: v_accvgpr_read_b32 v5, a52672; GFX908-NEXT: v_accvgpr_read_b32 v6, a62673; GFX908-NEXT: v_accvgpr_read_b32 v7, a72674; GFX908-NEXT: v_accvgpr_read_b32 v8, a82675; GFX908-NEXT: v_accvgpr_read_b32 v9, a92676; GFX908-NEXT: v_accvgpr_read_b32 v10, a102677; GFX908-NEXT: v_accvgpr_read_b32 v11, a112678; GFX908-NEXT: v_accvgpr_read_b32 v12, a122679; GFX908-NEXT: v_accvgpr_read_b32 v13, a132680; GFX908-NEXT: v_accvgpr_read_b32 v14, a142681; GFX908-NEXT: v_accvgpr_read_b32 v15, a152682; GFX908-NEXT: v_accvgpr_read_b32 v16, a162683; GFX908-NEXT: v_accvgpr_read_b32 v17, a172684; GFX908-NEXT: v_accvgpr_read_b32 v18, a182685; GFX908-NEXT: v_accvgpr_read_b32 v19, a192686; GFX908-NEXT: v_accvgpr_read_b32 v20, a202687; GFX908-NEXT: v_accvgpr_read_b32 v21, a212688; GFX908-NEXT: v_accvgpr_read_b32 v22, a222689; GFX908-NEXT: v_accvgpr_read_b32 v23, a232690; GFX908-NEXT: v_accvgpr_read_b32 v24, a242691; GFX908-NEXT: v_accvgpr_read_b32 v25, a252692; GFX908-NEXT: v_accvgpr_read_b32 v26, a262693; GFX908-NEXT: v_accvgpr_read_b32 v27, a272694; GFX908-NEXT: s_waitcnt lgkmcnt(0)2695; GFX908-NEXT: global_store_dwordx4 v32, v[28:31], s[0:1] offset:1122696; GFX908-NEXT: global_store_dwordx4 v32, v[24:27], s[0:1] offset:962697; GFX908-NEXT: global_store_dwordx4 v32, v[20:23], s[0:1] offset:802698; GFX908-NEXT: global_store_dwordx4 v32, v[16:19], s[0:1] offset:642699; GFX908-NEXT: global_store_dwordx4 v32, v[12:15], s[0:1] offset:482700; GFX908-NEXT: global_store_dwordx4 v32, v[8:11], s[0:1] offset:322701; GFX908-NEXT: global_store_dwordx4 v32, v[4:7], s[0:1] offset:162702; GFX908-NEXT: global_store_dwordx4 v32, v[0:3], s[0:1]2703; GFX908-NEXT: s_endpgm2704;2705; GFX90A-LABEL: test_mfma_loop_mfma_forward_init:2706; GFX90A: ; %bb.0: ; %entry2707; GFX90A-NEXT: v_mov_b32_e32 v0, 1.02708; GFX90A-NEXT: v_mov_b32_e32 v1, 2.02709; GFX90A-NEXT: s_mov_b32 s0, 162710; GFX90A-NEXT: s_nop 02711; GFX90A-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v0, v1, 02712; GFX90A-NEXT: .LBB7_1: ; %for.cond.preheader2713; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=12714; GFX90A-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v0, v1, a[0:31]2715; GFX90A-NEXT: s_add_i32 s0, s0, -12716; GFX90A-NEXT: s_cmp_lg_u32 s0, 02717; GFX90A-NEXT: s_cbranch_scc1 .LBB7_12718; GFX90A-NEXT: ; %bb.2: ; %exit2719; GFX90A-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242720; GFX90A-NEXT: v_mov_b32_e32 v0, 02721; GFX90A-NEXT: s_waitcnt lgkmcnt(0)2722; GFX90A-NEXT: s_nop 122723; GFX90A-NEXT: global_store_dwordx4 v0, a[28:31], s[0:1] offset:1122724; GFX90A-NEXT: global_store_dwordx4 v0, a[24:27], s[0:1] offset:962725; GFX90A-NEXT: global_store_dwordx4 v0, a[20:23], s[0:1] offset:802726; GFX90A-NEXT: global_store_dwordx4 v0, a[16:19], s[0:1] offset:642727; GFX90A-NEXT: global_store_dwordx4 v0, a[12:15], s[0:1] offset:482728; GFX90A-NEXT: global_store_dwordx4 v0, a[8:11], s[0:1] offset:322729; GFX90A-NEXT: global_store_dwordx4 v0, a[4:7], s[0:1] offset:162730; GFX90A-NEXT: global_store_dwordx4 v0, a[0:3], s[0:1]2731; GFX90A-NEXT: s_endpgm2732;2733; GFX942-LABEL: test_mfma_loop_mfma_forward_init:2734; GFX942: ; %bb.0: ; %entry2735; GFX942-NEXT: v_mov_b32_e32 v0, 1.02736; GFX942-NEXT: v_mov_b32_e32 v1, 2.02737; GFX942-NEXT: s_mov_b32 s0, 162738; GFX942-NEXT: s_nop 02739; GFX942-NEXT: v_mfma_f32_32x32x1_2b_f32 a[0:31], v0, v1, 02740; GFX942-NEXT: .LBB7_1: ; %for.cond.preheader2741; GFX942-NEXT: ; =>This Inner Loop Header: Depth=12742; GFX942-NEXT: v_mfma_f32_32x32x1_2b_f32 a[0:31], v0, v1, a[0:31]2743; GFX942-NEXT: s_add_i32 s0, s0, -12744; GFX942-NEXT: s_cmp_lg_u32 s0, 02745; GFX942-NEXT: s_cbranch_scc1 .LBB7_12746; GFX942-NEXT: ; %bb.2: ; %exit2747; GFX942-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242748; GFX942-NEXT: v_mov_b32_e32 v0, 02749; GFX942-NEXT: s_waitcnt lgkmcnt(0)2750; GFX942-NEXT: s_nop 112751; GFX942-NEXT: global_store_dwordx4 v0, a[28:31], s[0:1] offset:1122752; GFX942-NEXT: global_store_dwordx4 v0, a[24:27], s[0:1] offset:962753; GFX942-NEXT: global_store_dwordx4 v0, a[20:23], s[0:1] offset:802754; GFX942-NEXT: global_store_dwordx4 v0, a[16:19], s[0:1] offset:642755; GFX942-NEXT: global_store_dwordx4 v0, a[12:15], s[0:1] offset:482756; GFX942-NEXT: global_store_dwordx4 v0, a[8:11], s[0:1] offset:322757; GFX942-NEXT: global_store_dwordx4 v0, a[4:7], s[0:1] offset:162758; GFX942-NEXT: global_store_dwordx4 v0, a[0:3], s[0:1]2759; GFX942-NEXT: s_endpgm2760entry:2761 %mai.0 = tail call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float 1.0, float 2.0, <32 x float> zeroinitializer, i32 0, i32 0, i32 0)2762 2763 br label %for.cond.preheader2764 2765for.cond.preheader:2766 %phi = phi <32 x float> [ %mai.0, %entry ], [ %mai.1, %for.cond.preheader ]2767 %c = phi i32 [ 0, %entry ], [ %inc, %for.cond.preheader ]2768 %mai.1 = tail call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float 1.0, float 2.0, <32 x float> %phi, i32 0, i32 0, i32 0)2769 %inc = add nuw nsw i32 %c, 12770 %cc = icmp eq i32 %inc, 162771 br i1 %cc, label %exit, label %for.cond.preheader2772 2773exit:2774 store <32 x float> %mai.1, ptr addrspace(1) %arg2775 ret void2776}2777 2778; Check that we are using only one tmp VGPR.2779 2780define amdgpu_kernel void @test_mfma_loop_agpr_init(ptr addrspace(1) %arg) #0 {2781; GFX908-LABEL: test_mfma_loop_agpr_init:2782; GFX908: ; %bb.0: ; %entry2783; GFX908-NEXT: v_mov_b32_e32 v0, 1.02784; GFX908-NEXT: v_accvgpr_write_b32 a0, 02785; GFX908-NEXT: v_accvgpr_write_b32 a1, 02786; GFX908-NEXT: v_accvgpr_write_b32 a2, 02787; GFX908-NEXT: v_accvgpr_write_b32 a3, 02788; GFX908-NEXT: v_accvgpr_write_b32 a4, 02789; GFX908-NEXT: v_accvgpr_write_b32 a5, 02790; GFX908-NEXT: v_accvgpr_write_b32 a6, 02791; GFX908-NEXT: v_accvgpr_write_b32 a7, 02792; GFX908-NEXT: v_accvgpr_write_b32 a8, 02793; GFX908-NEXT: v_accvgpr_write_b32 a9, 02794; GFX908-NEXT: v_accvgpr_write_b32 a10, 02795; GFX908-NEXT: v_accvgpr_write_b32 a11, 02796; GFX908-NEXT: v_accvgpr_write_b32 a12, 02797; GFX908-NEXT: v_accvgpr_write_b32 a13, 02798; GFX908-NEXT: v_accvgpr_write_b32 a14, 02799; GFX908-NEXT: v_accvgpr_write_b32 a15, 02800; GFX908-NEXT: v_accvgpr_write_b32 a16, 02801; GFX908-NEXT: v_accvgpr_write_b32 a17, 02802; GFX908-NEXT: v_accvgpr_write_b32 a18, 02803; GFX908-NEXT: v_accvgpr_write_b32 a19, 02804; GFX908-NEXT: v_accvgpr_write_b32 a20, 02805; GFX908-NEXT: v_accvgpr_write_b32 a21, 02806; GFX908-NEXT: v_accvgpr_write_b32 a22, 02807; GFX908-NEXT: v_accvgpr_write_b32 a23, 02808; GFX908-NEXT: v_accvgpr_write_b32 a24, 02809; GFX908-NEXT: v_accvgpr_write_b32 a25, 02810; GFX908-NEXT: v_accvgpr_write_b32 a26, 02811; GFX908-NEXT: v_accvgpr_write_b32 a27, 02812; GFX908-NEXT: v_accvgpr_write_b32 a28, 02813; GFX908-NEXT: v_accvgpr_write_b32 a29, 02814; GFX908-NEXT: v_accvgpr_write_b32 a30, 02815; GFX908-NEXT: v_accvgpr_write_b32 a31, 02816; GFX908-NEXT: v_mov_b32_e32 v1, 2.02817; GFX908-NEXT: s_mov_b32 s0, 162818; GFX908-NEXT: s_nop 02819; GFX908-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v0, v1, a[0:31]2820; GFX908-NEXT: s_nop 152821; GFX908-NEXT: s_nop 12822; GFX908-NEXT: v_accvgpr_read_b32 v2, a02823; GFX908-NEXT: s_nop 12824; GFX908-NEXT: v_accvgpr_write_b32 a0, v22825; GFX908-NEXT: v_accvgpr_write_b32 a1, v22826; GFX908-NEXT: v_accvgpr_write_b32 a2, v22827; GFX908-NEXT: v_accvgpr_write_b32 a3, v22828; GFX908-NEXT: v_accvgpr_write_b32 a4, v22829; GFX908-NEXT: v_accvgpr_write_b32 a5, v22830; GFX908-NEXT: v_accvgpr_write_b32 a6, v22831; GFX908-NEXT: v_accvgpr_write_b32 a7, v22832; GFX908-NEXT: v_accvgpr_write_b32 a8, v22833; GFX908-NEXT: v_accvgpr_write_b32 a9, v22834; GFX908-NEXT: v_accvgpr_write_b32 a10, v22835; GFX908-NEXT: v_accvgpr_write_b32 a11, v22836; GFX908-NEXT: v_accvgpr_write_b32 a12, v22837; GFX908-NEXT: v_accvgpr_write_b32 a13, v22838; GFX908-NEXT: v_accvgpr_write_b32 a14, v22839; GFX908-NEXT: v_accvgpr_write_b32 a15, v22840; GFX908-NEXT: v_accvgpr_write_b32 a16, v22841; GFX908-NEXT: v_accvgpr_write_b32 a17, v22842; GFX908-NEXT: v_accvgpr_write_b32 a18, v22843; GFX908-NEXT: v_accvgpr_write_b32 a19, v22844; GFX908-NEXT: v_accvgpr_write_b32 a20, v22845; GFX908-NEXT: v_accvgpr_write_b32 a21, v22846; GFX908-NEXT: v_accvgpr_write_b32 a22, v22847; GFX908-NEXT: v_accvgpr_write_b32 a23, v22848; GFX908-NEXT: v_accvgpr_write_b32 a24, v22849; GFX908-NEXT: v_accvgpr_write_b32 a25, v22850; GFX908-NEXT: v_accvgpr_write_b32 a26, v22851; GFX908-NEXT: v_accvgpr_write_b32 a27, v22852; GFX908-NEXT: v_accvgpr_write_b32 a28, v22853; GFX908-NEXT: v_accvgpr_write_b32 a29, v22854; GFX908-NEXT: v_accvgpr_write_b32 a30, v22855; GFX908-NEXT: v_accvgpr_write_b32 a31, v22856; GFX908-NEXT: .LBB8_1: ; %for.cond.preheader2857; GFX908-NEXT: ; =>This Inner Loop Header: Depth=12858; GFX908-NEXT: s_nop 02859; GFX908-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v0, v1, a[0:31]2860; GFX908-NEXT: s_add_i32 s0, s0, -12861; GFX908-NEXT: s_cmp_lg_u32 s0, 02862; GFX908-NEXT: s_cbranch_scc1 .LBB8_12863; GFX908-NEXT: ; %bb.2: ; %exit2864; GFX908-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242865; GFX908-NEXT: s_nop 132866; GFX908-NEXT: v_accvgpr_read_b32 v0, a02867; GFX908-NEXT: v_accvgpr_read_b32 v28, a282868; GFX908-NEXT: v_accvgpr_read_b32 v29, a292869; GFX908-NEXT: v_accvgpr_read_b32 v30, a302870; GFX908-NEXT: v_accvgpr_read_b32 v31, a312871; GFX908-NEXT: v_mov_b32_e32 v32, 02872; GFX908-NEXT: v_accvgpr_read_b32 v1, a12873; GFX908-NEXT: v_accvgpr_read_b32 v2, a22874; GFX908-NEXT: v_accvgpr_read_b32 v3, a32875; GFX908-NEXT: v_accvgpr_read_b32 v4, a42876; GFX908-NEXT: v_accvgpr_read_b32 v5, a52877; GFX908-NEXT: v_accvgpr_read_b32 v6, a62878; GFX908-NEXT: v_accvgpr_read_b32 v7, a72879; GFX908-NEXT: v_accvgpr_read_b32 v8, a82880; GFX908-NEXT: v_accvgpr_read_b32 v9, a92881; GFX908-NEXT: v_accvgpr_read_b32 v10, a102882; GFX908-NEXT: v_accvgpr_read_b32 v11, a112883; GFX908-NEXT: v_accvgpr_read_b32 v12, a122884; GFX908-NEXT: v_accvgpr_read_b32 v13, a132885; GFX908-NEXT: v_accvgpr_read_b32 v14, a142886; GFX908-NEXT: v_accvgpr_read_b32 v15, a152887; GFX908-NEXT: v_accvgpr_read_b32 v16, a162888; GFX908-NEXT: v_accvgpr_read_b32 v17, a172889; GFX908-NEXT: v_accvgpr_read_b32 v18, a182890; GFX908-NEXT: v_accvgpr_read_b32 v19, a192891; GFX908-NEXT: v_accvgpr_read_b32 v20, a202892; GFX908-NEXT: v_accvgpr_read_b32 v21, a212893; GFX908-NEXT: v_accvgpr_read_b32 v22, a222894; GFX908-NEXT: v_accvgpr_read_b32 v23, a232895; GFX908-NEXT: v_accvgpr_read_b32 v24, a242896; GFX908-NEXT: v_accvgpr_read_b32 v25, a252897; GFX908-NEXT: v_accvgpr_read_b32 v26, a262898; GFX908-NEXT: v_accvgpr_read_b32 v27, a272899; GFX908-NEXT: s_waitcnt lgkmcnt(0)2900; GFX908-NEXT: global_store_dwordx4 v32, v[28:31], s[0:1] offset:1122901; GFX908-NEXT: global_store_dwordx4 v32, v[24:27], s[0:1] offset:962902; GFX908-NEXT: global_store_dwordx4 v32, v[20:23], s[0:1] offset:802903; GFX908-NEXT: global_store_dwordx4 v32, v[16:19], s[0:1] offset:642904; GFX908-NEXT: global_store_dwordx4 v32, v[12:15], s[0:1] offset:482905; GFX908-NEXT: global_store_dwordx4 v32, v[8:11], s[0:1] offset:322906; GFX908-NEXT: global_store_dwordx4 v32, v[4:7], s[0:1] offset:162907; GFX908-NEXT: global_store_dwordx4 v32, v[0:3], s[0:1]2908; GFX908-NEXT: s_endpgm2909;2910; GFX90A-LABEL: test_mfma_loop_agpr_init:2911; GFX90A: ; %bb.0: ; %entry2912; GFX90A-NEXT: v_mov_b32_e32 v0, 1.02913; GFX90A-NEXT: v_mov_b32_e32 v1, 2.02914; GFX90A-NEXT: s_mov_b32 s0, 162915; GFX90A-NEXT: s_nop 02916; GFX90A-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v0, v1, 02917; GFX90A-NEXT: s_nop 152918; GFX90A-NEXT: s_nop 22919; GFX90A-NEXT: v_accvgpr_read_b32 v33, a02920; GFX90A-NEXT: v_accvgpr_read_b32 v2, a02921; GFX90A-NEXT: v_accvgpr_read_b32 v3, a02922; GFX90A-NEXT: v_accvgpr_read_b32 v4, a02923; GFX90A-NEXT: v_accvgpr_read_b32 v5, a02924; GFX90A-NEXT: v_accvgpr_read_b32 v6, a02925; GFX90A-NEXT: v_accvgpr_read_b32 v7, a02926; GFX90A-NEXT: v_accvgpr_read_b32 v8, a02927; GFX90A-NEXT: v_accvgpr_read_b32 v9, a02928; GFX90A-NEXT: v_accvgpr_read_b32 v10, a02929; GFX90A-NEXT: v_accvgpr_read_b32 v11, a02930; GFX90A-NEXT: v_accvgpr_read_b32 v12, a02931; GFX90A-NEXT: v_accvgpr_read_b32 v13, a02932; GFX90A-NEXT: v_accvgpr_read_b32 v14, a02933; GFX90A-NEXT: v_accvgpr_read_b32 v15, a02934; GFX90A-NEXT: v_accvgpr_read_b32 v16, a02935; GFX90A-NEXT: v_accvgpr_read_b32 v17, a02936; GFX90A-NEXT: v_accvgpr_read_b32 v18, a02937; GFX90A-NEXT: v_accvgpr_read_b32 v19, a02938; GFX90A-NEXT: v_accvgpr_read_b32 v20, a02939; GFX90A-NEXT: v_accvgpr_read_b32 v21, a02940; GFX90A-NEXT: v_accvgpr_read_b32 v22, a02941; GFX90A-NEXT: v_accvgpr_read_b32 v23, a02942; GFX90A-NEXT: v_accvgpr_read_b32 v24, a02943; GFX90A-NEXT: v_accvgpr_read_b32 v25, a02944; GFX90A-NEXT: v_accvgpr_read_b32 v26, a02945; GFX90A-NEXT: v_accvgpr_read_b32 v27, a02946; GFX90A-NEXT: v_accvgpr_read_b32 v28, a02947; GFX90A-NEXT: v_accvgpr_read_b32 v29, a02948; GFX90A-NEXT: v_accvgpr_read_b32 v30, a02949; GFX90A-NEXT: v_accvgpr_read_b32 v31, a02950; GFX90A-NEXT: v_accvgpr_read_b32 v32, a02951; GFX90A-NEXT: .LBB8_1: ; %for.cond.preheader2952; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=12953; GFX90A-NEXT: v_accvgpr_write_b32 a0, v22954; GFX90A-NEXT: v_accvgpr_write_b32 a1, v32955; GFX90A-NEXT: v_accvgpr_write_b32 a2, v42956; GFX90A-NEXT: v_accvgpr_write_b32 a3, v52957; GFX90A-NEXT: v_accvgpr_write_b32 a4, v62958; GFX90A-NEXT: v_accvgpr_write_b32 a5, v72959; GFX90A-NEXT: v_accvgpr_write_b32 a6, v82960; GFX90A-NEXT: v_accvgpr_write_b32 a7, v92961; GFX90A-NEXT: v_accvgpr_write_b32 a8, v102962; GFX90A-NEXT: v_accvgpr_write_b32 a9, v112963; GFX90A-NEXT: v_accvgpr_write_b32 a10, v122964; GFX90A-NEXT: v_accvgpr_write_b32 a11, v132965; GFX90A-NEXT: v_accvgpr_write_b32 a12, v142966; GFX90A-NEXT: v_accvgpr_write_b32 a13, v152967; GFX90A-NEXT: v_accvgpr_write_b32 a14, v162968; GFX90A-NEXT: v_accvgpr_write_b32 a15, v172969; GFX90A-NEXT: v_accvgpr_write_b32 a16, v182970; GFX90A-NEXT: v_accvgpr_write_b32 a17, v192971; GFX90A-NEXT: v_accvgpr_write_b32 a18, v202972; GFX90A-NEXT: v_accvgpr_write_b32 a19, v212973; GFX90A-NEXT: v_accvgpr_write_b32 a20, v222974; GFX90A-NEXT: v_accvgpr_write_b32 a21, v232975; GFX90A-NEXT: v_accvgpr_write_b32 a22, v242976; GFX90A-NEXT: v_accvgpr_write_b32 a23, v252977; GFX90A-NEXT: v_accvgpr_write_b32 a24, v262978; GFX90A-NEXT: v_accvgpr_write_b32 a25, v272979; GFX90A-NEXT: v_accvgpr_write_b32 a26, v282980; GFX90A-NEXT: v_accvgpr_write_b32 a27, v292981; GFX90A-NEXT: v_accvgpr_write_b32 a28, v302982; GFX90A-NEXT: v_accvgpr_write_b32 a29, v312983; GFX90A-NEXT: v_accvgpr_write_b32 a30, v322984; GFX90A-NEXT: v_accvgpr_write_b32 a31, v332985; GFX90A-NEXT: s_add_i32 s0, s0, -12986; GFX90A-NEXT: s_cmp_lg_u32 s0, 02987; GFX90A-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v0, v1, a[0:31]2988; GFX90A-NEXT: s_nop 152989; GFX90A-NEXT: s_nop 22990; GFX90A-NEXT: v_accvgpr_read_b32 v2, a02991; GFX90A-NEXT: v_accvgpr_read_b32 v3, a12992; GFX90A-NEXT: v_accvgpr_read_b32 v4, a22993; GFX90A-NEXT: v_accvgpr_read_b32 v5, a32994; GFX90A-NEXT: v_accvgpr_read_b32 v6, a42995; GFX90A-NEXT: v_accvgpr_read_b32 v7, a52996; GFX90A-NEXT: v_accvgpr_read_b32 v8, a62997; GFX90A-NEXT: v_accvgpr_read_b32 v9, a72998; GFX90A-NEXT: v_accvgpr_read_b32 v10, a82999; GFX90A-NEXT: v_accvgpr_read_b32 v11, a93000; GFX90A-NEXT: v_accvgpr_read_b32 v12, a103001; GFX90A-NEXT: v_accvgpr_read_b32 v13, a113002; GFX90A-NEXT: v_accvgpr_read_b32 v14, a123003; GFX90A-NEXT: v_accvgpr_read_b32 v15, a133004; GFX90A-NEXT: v_accvgpr_read_b32 v16, a143005; GFX90A-NEXT: v_accvgpr_read_b32 v17, a153006; GFX90A-NEXT: v_accvgpr_read_b32 v18, a163007; GFX90A-NEXT: v_accvgpr_read_b32 v19, a173008; GFX90A-NEXT: v_accvgpr_read_b32 v20, a183009; GFX90A-NEXT: v_accvgpr_read_b32 v21, a193010; GFX90A-NEXT: v_accvgpr_read_b32 v22, a203011; GFX90A-NEXT: v_accvgpr_read_b32 v23, a213012; GFX90A-NEXT: v_accvgpr_read_b32 v24, a223013; GFX90A-NEXT: v_accvgpr_read_b32 v25, a233014; GFX90A-NEXT: v_accvgpr_read_b32 v26, a243015; GFX90A-NEXT: v_accvgpr_read_b32 v27, a253016; GFX90A-NEXT: v_accvgpr_read_b32 v28, a263017; GFX90A-NEXT: v_accvgpr_read_b32 v29, a273018; GFX90A-NEXT: v_accvgpr_read_b32 v30, a283019; GFX90A-NEXT: v_accvgpr_read_b32 v31, a293020; GFX90A-NEXT: v_accvgpr_read_b32 v32, a303021; GFX90A-NEXT: v_accvgpr_read_b32 v33, a313022; GFX90A-NEXT: s_cbranch_scc1 .LBB8_13023; GFX90A-NEXT: ; %bb.2: ; %exit3024; GFX90A-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x243025; GFX90A-NEXT: v_mov_b32_e32 v0, 03026; GFX90A-NEXT: s_waitcnt lgkmcnt(0)3027; GFX90A-NEXT: global_store_dwordx4 v0, a[28:31], s[0:1] offset:1123028; GFX90A-NEXT: global_store_dwordx4 v0, a[24:27], s[0:1] offset:963029; GFX90A-NEXT: global_store_dwordx4 v0, a[20:23], s[0:1] offset:803030; GFX90A-NEXT: global_store_dwordx4 v0, a[16:19], s[0:1] offset:643031; GFX90A-NEXT: global_store_dwordx4 v0, a[12:15], s[0:1] offset:483032; GFX90A-NEXT: global_store_dwordx4 v0, a[8:11], s[0:1] offset:323033; GFX90A-NEXT: global_store_dwordx4 v0, a[4:7], s[0:1] offset:163034; GFX90A-NEXT: global_store_dwordx4 v0, a[0:3], s[0:1]3035; GFX90A-NEXT: s_endpgm3036;3037; GFX942-LABEL: test_mfma_loop_agpr_init:3038; GFX942: ; %bb.0: ; %entry3039; GFX942-NEXT: v_mov_b32_e32 v0, 1.03040; GFX942-NEXT: v_mov_b32_e32 v1, 2.03041; GFX942-NEXT: s_mov_b32 s0, 163042; GFX942-NEXT: s_nop 03043; GFX942-NEXT: v_mfma_f32_32x32x1_2b_f32 a[0:31], v0, v1, 03044; GFX942-NEXT: s_nop 153045; GFX942-NEXT: s_nop 13046; GFX942-NEXT: v_accvgpr_read_b32 v33, a03047; GFX942-NEXT: v_accvgpr_read_b32 v2, a03048; GFX942-NEXT: v_accvgpr_read_b32 v3, a03049; GFX942-NEXT: v_accvgpr_read_b32 v4, a03050; GFX942-NEXT: v_accvgpr_read_b32 v5, a03051; GFX942-NEXT: v_accvgpr_read_b32 v6, a03052; GFX942-NEXT: v_accvgpr_read_b32 v7, a03053; GFX942-NEXT: v_accvgpr_read_b32 v8, a03054; GFX942-NEXT: v_accvgpr_read_b32 v9, a03055; GFX942-NEXT: v_accvgpr_read_b32 v10, a03056; GFX942-NEXT: v_accvgpr_read_b32 v11, a03057; GFX942-NEXT: v_accvgpr_read_b32 v12, a03058; GFX942-NEXT: v_accvgpr_read_b32 v13, a03059; GFX942-NEXT: v_accvgpr_read_b32 v14, a03060; GFX942-NEXT: v_accvgpr_read_b32 v15, a03061; GFX942-NEXT: v_accvgpr_read_b32 v16, a03062; GFX942-NEXT: v_accvgpr_read_b32 v17, a03063; GFX942-NEXT: v_accvgpr_read_b32 v18, a03064; GFX942-NEXT: v_accvgpr_read_b32 v19, a03065; GFX942-NEXT: v_accvgpr_read_b32 v20, a03066; GFX942-NEXT: v_accvgpr_read_b32 v21, a03067; GFX942-NEXT: v_accvgpr_read_b32 v22, a03068; GFX942-NEXT: v_accvgpr_read_b32 v23, a03069; GFX942-NEXT: v_accvgpr_read_b32 v24, a03070; GFX942-NEXT: v_accvgpr_read_b32 v25, a03071; GFX942-NEXT: v_accvgpr_read_b32 v26, a03072; GFX942-NEXT: v_accvgpr_read_b32 v27, a03073; GFX942-NEXT: v_accvgpr_read_b32 v28, a03074; GFX942-NEXT: v_accvgpr_read_b32 v29, a03075; GFX942-NEXT: v_accvgpr_read_b32 v30, a03076; GFX942-NEXT: v_accvgpr_read_b32 v31, a03077; GFX942-NEXT: v_accvgpr_read_b32 v32, a03078; GFX942-NEXT: .LBB8_1: ; %for.cond.preheader3079; GFX942-NEXT: ; =>This Inner Loop Header: Depth=13080; GFX942-NEXT: v_accvgpr_write_b32 a0, v23081; GFX942-NEXT: v_accvgpr_write_b32 a1, v33082; GFX942-NEXT: v_accvgpr_write_b32 a2, v43083; GFX942-NEXT: v_accvgpr_write_b32 a3, v53084; GFX942-NEXT: v_accvgpr_write_b32 a4, v63085; GFX942-NEXT: v_accvgpr_write_b32 a5, v73086; GFX942-NEXT: v_accvgpr_write_b32 a6, v83087; GFX942-NEXT: v_accvgpr_write_b32 a7, v93088; GFX942-NEXT: v_accvgpr_write_b32 a8, v103089; GFX942-NEXT: v_accvgpr_write_b32 a9, v113090; GFX942-NEXT: v_accvgpr_write_b32 a10, v123091; GFX942-NEXT: v_accvgpr_write_b32 a11, v133092; GFX942-NEXT: v_accvgpr_write_b32 a12, v143093; GFX942-NEXT: v_accvgpr_write_b32 a13, v153094; GFX942-NEXT: v_accvgpr_write_b32 a14, v163095; GFX942-NEXT: v_accvgpr_write_b32 a15, v173096; GFX942-NEXT: v_accvgpr_write_b32 a16, v183097; GFX942-NEXT: v_accvgpr_write_b32 a17, v193098; GFX942-NEXT: v_accvgpr_write_b32 a18, v203099; GFX942-NEXT: v_accvgpr_write_b32 a19, v213100; GFX942-NEXT: v_accvgpr_write_b32 a20, v223101; GFX942-NEXT: v_accvgpr_write_b32 a21, v233102; GFX942-NEXT: v_accvgpr_write_b32 a22, v243103; GFX942-NEXT: v_accvgpr_write_b32 a23, v253104; GFX942-NEXT: v_accvgpr_write_b32 a24, v263105; GFX942-NEXT: v_accvgpr_write_b32 a25, v273106; GFX942-NEXT: v_accvgpr_write_b32 a26, v283107; GFX942-NEXT: v_accvgpr_write_b32 a27, v293108; GFX942-NEXT: v_accvgpr_write_b32 a28, v303109; GFX942-NEXT: v_accvgpr_write_b32 a29, v313110; GFX942-NEXT: v_accvgpr_write_b32 a30, v323111; GFX942-NEXT: v_accvgpr_write_b32 a31, v333112; GFX942-NEXT: s_add_i32 s0, s0, -13113; GFX942-NEXT: s_cmp_lg_u32 s0, 03114; GFX942-NEXT: v_mfma_f32_32x32x1_2b_f32 a[0:31], v0, v1, a[0:31]3115; GFX942-NEXT: s_nop 153116; GFX942-NEXT: s_nop 13117; GFX942-NEXT: v_accvgpr_read_b32 v2, a03118; GFX942-NEXT: v_accvgpr_read_b32 v3, a13119; GFX942-NEXT: v_accvgpr_read_b32 v4, a23120; GFX942-NEXT: v_accvgpr_read_b32 v5, a33121; GFX942-NEXT: v_accvgpr_read_b32 v6, a43122; GFX942-NEXT: v_accvgpr_read_b32 v7, a53123; GFX942-NEXT: v_accvgpr_read_b32 v8, a63124; GFX942-NEXT: v_accvgpr_read_b32 v9, a73125; GFX942-NEXT: v_accvgpr_read_b32 v10, a83126; GFX942-NEXT: v_accvgpr_read_b32 v11, a93127; GFX942-NEXT: v_accvgpr_read_b32 v12, a103128; GFX942-NEXT: v_accvgpr_read_b32 v13, a113129; GFX942-NEXT: v_accvgpr_read_b32 v14, a123130; GFX942-NEXT: v_accvgpr_read_b32 v15, a133131; GFX942-NEXT: v_accvgpr_read_b32 v16, a143132; GFX942-NEXT: v_accvgpr_read_b32 v17, a153133; GFX942-NEXT: v_accvgpr_read_b32 v18, a163134; GFX942-NEXT: v_accvgpr_read_b32 v19, a173135; GFX942-NEXT: v_accvgpr_read_b32 v20, a183136; GFX942-NEXT: v_accvgpr_read_b32 v21, a193137; GFX942-NEXT: v_accvgpr_read_b32 v22, a203138; GFX942-NEXT: v_accvgpr_read_b32 v23, a213139; GFX942-NEXT: v_accvgpr_read_b32 v24, a223140; GFX942-NEXT: v_accvgpr_read_b32 v25, a233141; GFX942-NEXT: v_accvgpr_read_b32 v26, a243142; GFX942-NEXT: v_accvgpr_read_b32 v27, a253143; GFX942-NEXT: v_accvgpr_read_b32 v28, a263144; GFX942-NEXT: v_accvgpr_read_b32 v29, a273145; GFX942-NEXT: v_accvgpr_read_b32 v30, a283146; GFX942-NEXT: v_accvgpr_read_b32 v31, a293147; GFX942-NEXT: v_accvgpr_read_b32 v32, a303148; GFX942-NEXT: v_accvgpr_read_b32 v33, a313149; GFX942-NEXT: s_cbranch_scc1 .LBB8_13150; GFX942-NEXT: ; %bb.2: ; %exit3151; GFX942-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x243152; GFX942-NEXT: v_mov_b32_e32 v0, 03153; GFX942-NEXT: s_waitcnt lgkmcnt(0)3154; GFX942-NEXT: global_store_dwordx4 v0, a[28:31], s[0:1] offset:1123155; GFX942-NEXT: global_store_dwordx4 v0, a[24:27], s[0:1] offset:963156; GFX942-NEXT: global_store_dwordx4 v0, a[20:23], s[0:1] offset:803157; GFX942-NEXT: global_store_dwordx4 v0, a[16:19], s[0:1] offset:643158; GFX942-NEXT: global_store_dwordx4 v0, a[12:15], s[0:1] offset:483159; GFX942-NEXT: global_store_dwordx4 v0, a[8:11], s[0:1] offset:323160; GFX942-NEXT: global_store_dwordx4 v0, a[4:7], s[0:1] offset:163161; GFX942-NEXT: global_store_dwordx4 v0, a[0:3], s[0:1]3162; GFX942-NEXT: s_endpgm3163entry:3164 %mai.0 = tail call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float 1.0, float 2.0, <32 x float> zeroinitializer, i32 0, i32 0, i32 0)3165 %init = extractelement <32 x float> %mai.0, i32 03166 %tmp0 = insertelement <32 x float> poison, float %init, i32 03167 %tmp1 = insertelement <32 x float> %tmp0, float %init, i32 13168 %tmp2 = insertelement <32 x float> %tmp1, float %init, i32 23169 %tmp3 = insertelement <32 x float> %tmp2, float %init, i32 33170 %tmp4 = insertelement <32 x float> %tmp3, float %init, i32 43171 %tmp5 = insertelement <32 x float> %tmp4, float %init, i32 53172 %tmp6 = insertelement <32 x float> %tmp5, float %init, i32 63173 %tmp7 = insertelement <32 x float> %tmp6, float %init, i32 73174 %tmp8 = insertelement <32 x float> %tmp7, float %init, i32 83175 %tmp9 = insertelement <32 x float> %tmp8, float %init, i32 93176 %tmp10 = insertelement <32 x float> %tmp9, float %init, i32 103177 %tmp11 = insertelement <32 x float> %tmp10, float %init, i32 113178 %tmp12 = insertelement <32 x float> %tmp11, float %init, i32 123179 %tmp13 = insertelement <32 x float> %tmp12, float %init, i32 133180 %tmp14 = insertelement <32 x float> %tmp13, float %init, i32 143181 %tmp15 = insertelement <32 x float> %tmp14, float %init, i32 153182 %tmp16 = insertelement <32 x float> %tmp15, float %init, i32 163183 %tmp17 = insertelement <32 x float> %tmp16, float %init, i32 173184 %tmp18 = insertelement <32 x float> %tmp17, float %init, i32 183185 %tmp19 = insertelement <32 x float> %tmp18, float %init, i32 193186 %tmp20 = insertelement <32 x float> %tmp19, float %init, i32 203187 %tmp21 = insertelement <32 x float> %tmp20, float %init, i32 213188 %tmp22 = insertelement <32 x float> %tmp21, float %init, i32 223189 %tmp23 = insertelement <32 x float> %tmp22, float %init, i32 233190 %tmp24 = insertelement <32 x float> %tmp23, float %init, i32 243191 %tmp25 = insertelement <32 x float> %tmp24, float %init, i32 253192 %tmp26 = insertelement <32 x float> %tmp25, float %init, i32 263193 %tmp27 = insertelement <32 x float> %tmp26, float %init, i32 273194 %tmp28 = insertelement <32 x float> %tmp27, float %init, i32 283195 %tmp29 = insertelement <32 x float> %tmp28, float %init, i32 293196 %tmp30 = insertelement <32 x float> %tmp29, float %init, i32 303197 %tmp31 = insertelement <32 x float> %tmp30, float %init, i32 313198 3199 br label %for.cond.preheader3200 3201for.cond.preheader:3202 %phi = phi <32 x float> [ %tmp31, %entry ], [ %mai.1, %for.cond.preheader ]3203 %c = phi i32 [ 0, %entry ], [ %inc, %for.cond.preheader ]3204 %mai.1 = tail call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float 1.0, float 2.0, <32 x float> %phi, i32 0, i32 0, i32 0)3205 %inc = add nuw nsw i32 %c, 13206 %cc = icmp eq i32 %inc, 163207 br i1 %cc, label %exit, label %for.cond.preheader3208 3209exit:3210 store <32 x float> %mai.1, ptr addrspace(1) %arg3211 ret void3212}3213 3214; Check that we do not copy agprs to vgprs and back in an outer loop.3215; Final result should be read only once after the loop.3216 3217define amdgpu_kernel void @test_mfma_nested_loop_zeroinit(ptr addrspace(1) %arg) #0 {3218; GFX908-LABEL: test_mfma_nested_loop_zeroinit:3219; GFX908: ; %bb.0: ; %entry3220; GFX908-NEXT: v_accvgpr_write_b32 a0, 03221; GFX908-NEXT: v_accvgpr_write_b32 a1, 03222; GFX908-NEXT: v_accvgpr_write_b32 a2, 03223; GFX908-NEXT: v_accvgpr_write_b32 a3, 03224; GFX908-NEXT: v_accvgpr_write_b32 a4, 03225; GFX908-NEXT: v_accvgpr_write_b32 a5, 03226; GFX908-NEXT: v_accvgpr_write_b32 a6, 03227; GFX908-NEXT: v_accvgpr_write_b32 a7, 03228; GFX908-NEXT: v_accvgpr_write_b32 a8, 03229; GFX908-NEXT: v_accvgpr_write_b32 a9, 03230; GFX908-NEXT: v_accvgpr_write_b32 a10, 03231; GFX908-NEXT: v_accvgpr_write_b32 a11, 03232; GFX908-NEXT: v_accvgpr_write_b32 a12, 03233; GFX908-NEXT: v_accvgpr_write_b32 a13, 03234; GFX908-NEXT: v_accvgpr_write_b32 a14, 03235; GFX908-NEXT: v_accvgpr_write_b32 a15, 03236; GFX908-NEXT: v_accvgpr_write_b32 a16, 03237; GFX908-NEXT: v_accvgpr_write_b32 a17, 03238; GFX908-NEXT: v_accvgpr_write_b32 a18, 03239; GFX908-NEXT: v_accvgpr_write_b32 a19, 03240; GFX908-NEXT: v_accvgpr_write_b32 a20, 03241; GFX908-NEXT: v_accvgpr_write_b32 a21, 03242; GFX908-NEXT: v_accvgpr_write_b32 a22, 03243; GFX908-NEXT: v_accvgpr_write_b32 a23, 03244; GFX908-NEXT: v_accvgpr_write_b32 a24, 03245; GFX908-NEXT: v_accvgpr_write_b32 a25, 03246; GFX908-NEXT: v_accvgpr_write_b32 a26, 03247; GFX908-NEXT: v_accvgpr_write_b32 a27, 03248; GFX908-NEXT: v_accvgpr_write_b32 a28, 03249; GFX908-NEXT: v_accvgpr_write_b32 a29, 03250; GFX908-NEXT: v_accvgpr_write_b32 a30, 03251; GFX908-NEXT: v_accvgpr_write_b32 a31, 03252; GFX908-NEXT: s_mov_b32 s0, 03253; GFX908-NEXT: v_mov_b32_e32 v0, 2.03254; GFX908-NEXT: v_mov_b32_e32 v1, 1.03255; GFX908-NEXT: .LBB9_1: ; %for.cond.preheader3256; GFX908-NEXT: ; =>This Loop Header: Depth=13257; GFX908-NEXT: ; Child Loop BB9_2 Depth 23258; GFX908-NEXT: s_mov_b32 s1, 163259; GFX908-NEXT: .LBB9_2: ; %inner.for.cond.preheader3260; GFX908-NEXT: ; Parent Loop BB9_1 Depth=13261; GFX908-NEXT: ; => This Inner Loop Header: Depth=23262; GFX908-NEXT: s_nop 03263; GFX908-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v1, v0, a[0:31]3264; GFX908-NEXT: s_add_i32 s1, s1, -13265; GFX908-NEXT: s_cmp_lg_u32 s1, 03266; GFX908-NEXT: s_cbranch_scc1 .LBB9_23267; GFX908-NEXT: ; %bb.3: ; %inner.exit3268; GFX908-NEXT: ; in Loop: Header=BB9_1 Depth=13269; GFX908-NEXT: s_add_i32 s0, s0, 13270; GFX908-NEXT: s_cmp_lg_u32 s0, 163271; GFX908-NEXT: s_cbranch_scc1 .LBB9_13272; GFX908-NEXT: ; %bb.4: ; %exit3273; GFX908-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x243274; GFX908-NEXT: s_nop 103275; GFX908-NEXT: v_accvgpr_read_b32 v0, a03276; GFX908-NEXT: v_accvgpr_read_b32 v28, a283277; GFX908-NEXT: v_accvgpr_read_b32 v29, a293278; GFX908-NEXT: v_accvgpr_read_b32 v30, a303279; GFX908-NEXT: v_accvgpr_read_b32 v31, a313280; GFX908-NEXT: v_mov_b32_e32 v32, 03281; GFX908-NEXT: v_accvgpr_read_b32 v1, a13282; GFX908-NEXT: v_accvgpr_read_b32 v2, a23283; GFX908-NEXT: v_accvgpr_read_b32 v3, a33284; GFX908-NEXT: v_accvgpr_read_b32 v4, a43285; GFX908-NEXT: v_accvgpr_read_b32 v5, a53286; GFX908-NEXT: v_accvgpr_read_b32 v6, a63287; GFX908-NEXT: v_accvgpr_read_b32 v7, a73288; GFX908-NEXT: v_accvgpr_read_b32 v8, a83289; GFX908-NEXT: v_accvgpr_read_b32 v9, a93290; GFX908-NEXT: v_accvgpr_read_b32 v10, a103291; GFX908-NEXT: v_accvgpr_read_b32 v11, a113292; GFX908-NEXT: v_accvgpr_read_b32 v12, a123293; GFX908-NEXT: v_accvgpr_read_b32 v13, a133294; GFX908-NEXT: v_accvgpr_read_b32 v14, a143295; GFX908-NEXT: v_accvgpr_read_b32 v15, a153296; GFX908-NEXT: v_accvgpr_read_b32 v16, a163297; GFX908-NEXT: v_accvgpr_read_b32 v17, a173298; GFX908-NEXT: v_accvgpr_read_b32 v18, a183299; GFX908-NEXT: v_accvgpr_read_b32 v19, a193300; GFX908-NEXT: v_accvgpr_read_b32 v20, a203301; GFX908-NEXT: v_accvgpr_read_b32 v21, a213302; GFX908-NEXT: v_accvgpr_read_b32 v22, a223303; GFX908-NEXT: v_accvgpr_read_b32 v23, a233304; GFX908-NEXT: v_accvgpr_read_b32 v24, a243305; GFX908-NEXT: v_accvgpr_read_b32 v25, a253306; GFX908-NEXT: v_accvgpr_read_b32 v26, a263307; GFX908-NEXT: v_accvgpr_read_b32 v27, a273308; GFX908-NEXT: s_waitcnt lgkmcnt(0)3309; GFX908-NEXT: global_store_dwordx4 v32, v[28:31], s[0:1] offset:1123310; GFX908-NEXT: global_store_dwordx4 v32, v[24:27], s[0:1] offset:963311; GFX908-NEXT: global_store_dwordx4 v32, v[20:23], s[0:1] offset:803312; GFX908-NEXT: global_store_dwordx4 v32, v[16:19], s[0:1] offset:643313; GFX908-NEXT: global_store_dwordx4 v32, v[12:15], s[0:1] offset:483314; GFX908-NEXT: global_store_dwordx4 v32, v[8:11], s[0:1] offset:323315; GFX908-NEXT: global_store_dwordx4 v32, v[4:7], s[0:1] offset:163316; GFX908-NEXT: global_store_dwordx4 v32, v[0:3], s[0:1]3317; GFX908-NEXT: s_endpgm3318;3319; GFX90A-LABEL: test_mfma_nested_loop_zeroinit:3320; GFX90A: ; %bb.0: ; %entry3321; GFX90A-NEXT: v_accvgpr_write_b32 a0, 03322; GFX90A-NEXT: s_mov_b32 s0, 03323; GFX90A-NEXT: v_accvgpr_mov_b32 a1, a03324; GFX90A-NEXT: v_accvgpr_mov_b32 a2, a03325; GFX90A-NEXT: v_accvgpr_mov_b32 a3, a03326; GFX90A-NEXT: v_accvgpr_mov_b32 a4, a03327; GFX90A-NEXT: v_accvgpr_mov_b32 a5, a03328; GFX90A-NEXT: v_accvgpr_mov_b32 a6, a03329; GFX90A-NEXT: v_accvgpr_mov_b32 a7, a03330; GFX90A-NEXT: v_accvgpr_mov_b32 a8, a03331; GFX90A-NEXT: v_accvgpr_mov_b32 a9, a03332; GFX90A-NEXT: v_accvgpr_mov_b32 a10, a03333; GFX90A-NEXT: v_accvgpr_mov_b32 a11, a03334; GFX90A-NEXT: v_accvgpr_mov_b32 a12, a03335; GFX90A-NEXT: v_accvgpr_mov_b32 a13, a03336; GFX90A-NEXT: v_accvgpr_mov_b32 a14, a03337; GFX90A-NEXT: v_accvgpr_mov_b32 a15, a03338; GFX90A-NEXT: v_accvgpr_mov_b32 a16, a03339; GFX90A-NEXT: v_accvgpr_mov_b32 a17, a03340; GFX90A-NEXT: v_accvgpr_mov_b32 a18, a03341; GFX90A-NEXT: v_accvgpr_mov_b32 a19, a03342; GFX90A-NEXT: v_accvgpr_mov_b32 a20, a03343; GFX90A-NEXT: v_accvgpr_mov_b32 a21, a03344; GFX90A-NEXT: v_accvgpr_mov_b32 a22, a03345; GFX90A-NEXT: v_accvgpr_mov_b32 a23, a03346; GFX90A-NEXT: v_accvgpr_mov_b32 a24, a03347; GFX90A-NEXT: v_accvgpr_mov_b32 a25, a03348; GFX90A-NEXT: v_accvgpr_mov_b32 a26, a03349; GFX90A-NEXT: v_accvgpr_mov_b32 a27, a03350; GFX90A-NEXT: v_accvgpr_mov_b32 a28, a03351; GFX90A-NEXT: v_accvgpr_mov_b32 a29, a03352; GFX90A-NEXT: v_accvgpr_mov_b32 a30, a03353; GFX90A-NEXT: v_accvgpr_mov_b32 a31, a03354; GFX90A-NEXT: v_mov_b32_e32 v0, 1.03355; GFX90A-NEXT: v_mov_b32_e32 v1, 2.03356; GFX90A-NEXT: .LBB9_1: ; %for.cond.preheader3357; GFX90A-NEXT: ; =>This Loop Header: Depth=13358; GFX90A-NEXT: ; Child Loop BB9_2 Depth 23359; GFX90A-NEXT: s_mov_b32 s1, 163360; GFX90A-NEXT: .LBB9_2: ; %inner.for.cond.preheader3361; GFX90A-NEXT: ; Parent Loop BB9_1 Depth=13362; GFX90A-NEXT: ; => This Inner Loop Header: Depth=23363; GFX90A-NEXT: s_nop 03364; GFX90A-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v0, v1, a[0:31]3365; GFX90A-NEXT: s_add_i32 s1, s1, -13366; GFX90A-NEXT: s_cmp_lg_u32 s1, 03367; GFX90A-NEXT: s_cbranch_scc1 .LBB9_23368; GFX90A-NEXT: ; %bb.3: ; %inner.exit3369; GFX90A-NEXT: ; in Loop: Header=BB9_1 Depth=13370; GFX90A-NEXT: s_add_i32 s0, s0, 13371; GFX90A-NEXT: s_cmp_lg_u32 s0, 163372; GFX90A-NEXT: s_cbranch_scc1 .LBB9_13373; GFX90A-NEXT: ; %bb.4: ; %exit3374; GFX90A-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x243375; GFX90A-NEXT: v_mov_b32_e32 v0, 03376; GFX90A-NEXT: s_waitcnt lgkmcnt(0)3377; GFX90A-NEXT: s_nop 93378; GFX90A-NEXT: global_store_dwordx4 v0, a[28:31], s[0:1] offset:1123379; GFX90A-NEXT: global_store_dwordx4 v0, a[24:27], s[0:1] offset:963380; GFX90A-NEXT: global_store_dwordx4 v0, a[20:23], s[0:1] offset:803381; GFX90A-NEXT: global_store_dwordx4 v0, a[16:19], s[0:1] offset:643382; GFX90A-NEXT: global_store_dwordx4 v0, a[12:15], s[0:1] offset:483383; GFX90A-NEXT: global_store_dwordx4 v0, a[8:11], s[0:1] offset:323384; GFX90A-NEXT: global_store_dwordx4 v0, a[4:7], s[0:1] offset:163385; GFX90A-NEXT: global_store_dwordx4 v0, a[0:3], s[0:1]3386; GFX90A-NEXT: s_endpgm3387;3388; GFX942-LABEL: test_mfma_nested_loop_zeroinit:3389; GFX942: ; %bb.0: ; %entry3390; GFX942-NEXT: v_accvgpr_write_b32 a0, 03391; GFX942-NEXT: s_mov_b32 s0, 03392; GFX942-NEXT: v_accvgpr_mov_b32 a1, a03393; GFX942-NEXT: v_accvgpr_mov_b32 a2, a03394; GFX942-NEXT: v_accvgpr_mov_b32 a3, a03395; GFX942-NEXT: v_accvgpr_mov_b32 a4, a03396; GFX942-NEXT: v_accvgpr_mov_b32 a5, a03397; GFX942-NEXT: v_accvgpr_mov_b32 a6, a03398; GFX942-NEXT: v_accvgpr_mov_b32 a7, a03399; GFX942-NEXT: v_accvgpr_mov_b32 a8, a03400; GFX942-NEXT: v_accvgpr_mov_b32 a9, a03401; GFX942-NEXT: v_accvgpr_mov_b32 a10, a03402; GFX942-NEXT: v_accvgpr_mov_b32 a11, a03403; GFX942-NEXT: v_accvgpr_mov_b32 a12, a03404; GFX942-NEXT: v_accvgpr_mov_b32 a13, a03405; GFX942-NEXT: v_accvgpr_mov_b32 a14, a03406; GFX942-NEXT: v_accvgpr_mov_b32 a15, a03407; GFX942-NEXT: v_accvgpr_mov_b32 a16, a03408; GFX942-NEXT: v_accvgpr_mov_b32 a17, a03409; GFX942-NEXT: v_accvgpr_mov_b32 a18, a03410; GFX942-NEXT: v_accvgpr_mov_b32 a19, a03411; GFX942-NEXT: v_accvgpr_mov_b32 a20, a03412; GFX942-NEXT: v_accvgpr_mov_b32 a21, a03413; GFX942-NEXT: v_accvgpr_mov_b32 a22, a03414; GFX942-NEXT: v_accvgpr_mov_b32 a23, a03415; GFX942-NEXT: v_accvgpr_mov_b32 a24, a03416; GFX942-NEXT: v_accvgpr_mov_b32 a25, a03417; GFX942-NEXT: v_accvgpr_mov_b32 a26, a03418; GFX942-NEXT: v_accvgpr_mov_b32 a27, a03419; GFX942-NEXT: v_accvgpr_mov_b32 a28, a03420; GFX942-NEXT: v_accvgpr_mov_b32 a29, a03421; GFX942-NEXT: v_accvgpr_mov_b32 a30, a03422; GFX942-NEXT: v_accvgpr_mov_b32 a31, a03423; GFX942-NEXT: v_mov_b32_e32 v0, 1.03424; GFX942-NEXT: v_mov_b32_e32 v1, 2.03425; GFX942-NEXT: .LBB9_1: ; %for.cond.preheader3426; GFX942-NEXT: ; =>This Loop Header: Depth=13427; GFX942-NEXT: ; Child Loop BB9_2 Depth 23428; GFX942-NEXT: s_mov_b32 s1, 163429; GFX942-NEXT: .LBB9_2: ; %inner.for.cond.preheader3430; GFX942-NEXT: ; Parent Loop BB9_1 Depth=13431; GFX942-NEXT: ; => This Inner Loop Header: Depth=23432; GFX942-NEXT: s_nop 03433; GFX942-NEXT: v_mfma_f32_32x32x1_2b_f32 a[0:31], v0, v1, a[0:31]3434; GFX942-NEXT: s_add_i32 s1, s1, -13435; GFX942-NEXT: s_cmp_lg_u32 s1, 03436; GFX942-NEXT: s_cbranch_scc1 .LBB9_23437; GFX942-NEXT: ; %bb.3: ; %inner.exit3438; GFX942-NEXT: ; in Loop: Header=BB9_1 Depth=13439; GFX942-NEXT: s_add_i32 s0, s0, 13440; GFX942-NEXT: s_cmp_lg_u32 s0, 163441; GFX942-NEXT: s_cbranch_scc1 .LBB9_13442; GFX942-NEXT: ; %bb.4: ; %exit3443; GFX942-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x243444; GFX942-NEXT: v_mov_b32_e32 v0, 03445; GFX942-NEXT: s_waitcnt lgkmcnt(0)3446; GFX942-NEXT: s_nop 83447; GFX942-NEXT: global_store_dwordx4 v0, a[28:31], s[0:1] offset:1123448; GFX942-NEXT: global_store_dwordx4 v0, a[24:27], s[0:1] offset:963449; GFX942-NEXT: global_store_dwordx4 v0, a[20:23], s[0:1] offset:803450; GFX942-NEXT: global_store_dwordx4 v0, a[16:19], s[0:1] offset:643451; GFX942-NEXT: global_store_dwordx4 v0, a[12:15], s[0:1] offset:483452; GFX942-NEXT: global_store_dwordx4 v0, a[8:11], s[0:1] offset:323453; GFX942-NEXT: global_store_dwordx4 v0, a[4:7], s[0:1] offset:163454; GFX942-NEXT: global_store_dwordx4 v0, a[0:3], s[0:1]3455; GFX942-NEXT: s_endpgm3456entry:3457 br label %for.cond.preheader3458 3459for.cond.preheader:3460 %phi.0 = phi <32 x float> [ zeroinitializer, %entry ], [ %mai.1, %inner.exit ]3461 %c.0 = phi i32 [ 0, %entry ], [ %inc.0, %inner.exit ]3462 br label %inner.for.cond.preheader3463 3464inner.for.cond.preheader:3465 %phi = phi <32 x float> [ %phi.0, %for.cond.preheader ], [ %mai.1, %inner.for.cond.preheader ]3466 %c = phi i32 [ 0, %for.cond.preheader ], [ %inc, %inner.for.cond.preheader ]3467 %mai.1 = tail call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float 1.0, float 2.0, <32 x float> %phi, i32 0, i32 0, i32 0)3468 %inc = add nuw nsw i32 %c, 13469 %cc = icmp eq i32 %inc, 163470 br i1 %cc, label %inner.exit, label %inner.for.cond.preheader3471 3472inner.exit:3473 %inc.0 = add nuw nsw i32 %c.0, 13474 %cc.0 = icmp eq i32 %inc.0, 163475 br i1 %cc.0, label %exit, label %for.cond.preheader3476 3477exit:3478 store <32 x float> %mai.1, ptr addrspace(1) %arg3479 ret void3480}3481 3482; Phi exit use is vgpr abi use3483define <32 x float> @test_mfma_loop_zeroinit_ret_use() #0 {3484; GFX908-LABEL: test_mfma_loop_zeroinit_ret_use:3485; GFX908: ; %bb.0: ; %entry3486; GFX908-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3487; GFX908-NEXT: v_accvgpr_write_b32 a31, 03488; GFX908-NEXT: v_accvgpr_write_b32 a30, 03489; GFX908-NEXT: v_accvgpr_write_b32 a29, 03490; GFX908-NEXT: v_accvgpr_write_b32 a28, 03491; GFX908-NEXT: v_accvgpr_write_b32 a27, 03492; GFX908-NEXT: v_accvgpr_write_b32 a26, 03493; GFX908-NEXT: v_accvgpr_write_b32 a25, 03494; GFX908-NEXT: v_accvgpr_write_b32 a24, 03495; GFX908-NEXT: v_accvgpr_write_b32 a23, 03496; GFX908-NEXT: v_accvgpr_write_b32 a22, 03497; GFX908-NEXT: v_accvgpr_write_b32 a21, 03498; GFX908-NEXT: v_accvgpr_write_b32 a20, 03499; GFX908-NEXT: v_accvgpr_write_b32 a19, 03500; GFX908-NEXT: v_accvgpr_write_b32 a18, 03501; GFX908-NEXT: v_accvgpr_write_b32 a17, 03502; GFX908-NEXT: v_accvgpr_write_b32 a16, 03503; GFX908-NEXT: v_accvgpr_write_b32 a15, 03504; GFX908-NEXT: v_accvgpr_write_b32 a14, 03505; GFX908-NEXT: v_accvgpr_write_b32 a13, 03506; GFX908-NEXT: v_accvgpr_write_b32 a12, 03507; GFX908-NEXT: v_accvgpr_write_b32 a11, 03508; GFX908-NEXT: v_accvgpr_write_b32 a10, 03509; GFX908-NEXT: v_accvgpr_write_b32 a9, 03510; GFX908-NEXT: v_accvgpr_write_b32 a8, 03511; GFX908-NEXT: v_accvgpr_write_b32 a7, 03512; GFX908-NEXT: v_accvgpr_write_b32 a6, 03513; GFX908-NEXT: v_accvgpr_write_b32 a5, 03514; GFX908-NEXT: v_accvgpr_write_b32 a4, 03515; GFX908-NEXT: v_accvgpr_write_b32 a3, 03516; GFX908-NEXT: v_accvgpr_write_b32 a2, 03517; GFX908-NEXT: v_accvgpr_write_b32 a1, 03518; GFX908-NEXT: v_accvgpr_write_b32 a0, 03519; GFX908-NEXT: s_mov_b32 s4, 163520; GFX908-NEXT: v_mov_b32_e32 v0, 2.03521; GFX908-NEXT: v_mov_b32_e32 v1, 1.03522; GFX908-NEXT: .LBB10_1: ; %for.cond.preheader3523; GFX908-NEXT: ; =>This Inner Loop Header: Depth=13524; GFX908-NEXT: s_nop 13525; GFX908-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v1, v0, a[0:31]3526; GFX908-NEXT: s_add_i32 s4, s4, -13527; GFX908-NEXT: s_cmp_lg_u32 s4, 03528; GFX908-NEXT: s_cbranch_scc1 .LBB10_13529; GFX908-NEXT: ; %bb.2: ; %exit3530; GFX908-NEXT: s_nop 143531; GFX908-NEXT: v_accvgpr_read_b32 v0, a03532; GFX908-NEXT: v_accvgpr_read_b32 v1, a13533; GFX908-NEXT: v_accvgpr_read_b32 v2, a23534; GFX908-NEXT: v_accvgpr_read_b32 v3, a33535; GFX908-NEXT: v_accvgpr_read_b32 v4, a43536; GFX908-NEXT: v_accvgpr_read_b32 v5, a53537; GFX908-NEXT: v_accvgpr_read_b32 v6, a63538; GFX908-NEXT: v_accvgpr_read_b32 v7, a73539; GFX908-NEXT: v_accvgpr_read_b32 v8, a83540; GFX908-NEXT: v_accvgpr_read_b32 v9, a93541; GFX908-NEXT: v_accvgpr_read_b32 v10, a103542; GFX908-NEXT: v_accvgpr_read_b32 v11, a113543; GFX908-NEXT: v_accvgpr_read_b32 v12, a123544; GFX908-NEXT: v_accvgpr_read_b32 v13, a133545; GFX908-NEXT: v_accvgpr_read_b32 v14, a143546; GFX908-NEXT: v_accvgpr_read_b32 v15, a153547; GFX908-NEXT: v_accvgpr_read_b32 v16, a163548; GFX908-NEXT: v_accvgpr_read_b32 v17, a173549; GFX908-NEXT: v_accvgpr_read_b32 v18, a183550; GFX908-NEXT: v_accvgpr_read_b32 v19, a193551; GFX908-NEXT: v_accvgpr_read_b32 v20, a203552; GFX908-NEXT: v_accvgpr_read_b32 v21, a213553; GFX908-NEXT: v_accvgpr_read_b32 v22, a223554; GFX908-NEXT: v_accvgpr_read_b32 v23, a233555; GFX908-NEXT: v_accvgpr_read_b32 v24, a243556; GFX908-NEXT: v_accvgpr_read_b32 v25, a253557; GFX908-NEXT: v_accvgpr_read_b32 v26, a263558; GFX908-NEXT: v_accvgpr_read_b32 v27, a273559; GFX908-NEXT: v_accvgpr_read_b32 v28, a283560; GFX908-NEXT: v_accvgpr_read_b32 v29, a293561; GFX908-NEXT: v_accvgpr_read_b32 v30, a303562; GFX908-NEXT: v_accvgpr_read_b32 v31, a313563; GFX908-NEXT: s_setpc_b64 s[30:31]3564;3565; GFX90A-LABEL: test_mfma_loop_zeroinit_ret_use:3566; GFX90A: ; %bb.0: ; %entry3567; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3568; GFX90A-NEXT: s_mov_b32 s4, 163569; GFX90A-NEXT: v_mov_b32_e32 v0, 03570; GFX90A-NEXT: v_mov_b32_e32 v1, 03571; GFX90A-NEXT: v_mov_b32_e32 v2, 03572; GFX90A-NEXT: v_mov_b32_e32 v3, 03573; GFX90A-NEXT: v_mov_b32_e32 v4, 03574; GFX90A-NEXT: v_mov_b32_e32 v5, 03575; GFX90A-NEXT: v_mov_b32_e32 v6, 03576; GFX90A-NEXT: v_mov_b32_e32 v7, 03577; GFX90A-NEXT: v_mov_b32_e32 v8, 03578; GFX90A-NEXT: v_mov_b32_e32 v9, 03579; GFX90A-NEXT: v_mov_b32_e32 v10, 03580; GFX90A-NEXT: v_mov_b32_e32 v11, 03581; GFX90A-NEXT: v_mov_b32_e32 v12, 03582; GFX90A-NEXT: v_mov_b32_e32 v13, 03583; GFX90A-NEXT: v_mov_b32_e32 v14, 03584; GFX90A-NEXT: v_mov_b32_e32 v15, 03585; GFX90A-NEXT: v_mov_b32_e32 v16, 03586; GFX90A-NEXT: v_mov_b32_e32 v17, 03587; GFX90A-NEXT: v_mov_b32_e32 v18, 03588; GFX90A-NEXT: v_mov_b32_e32 v19, 03589; GFX90A-NEXT: v_mov_b32_e32 v20, 03590; GFX90A-NEXT: v_mov_b32_e32 v21, 03591; GFX90A-NEXT: v_mov_b32_e32 v22, 03592; GFX90A-NEXT: v_mov_b32_e32 v23, 03593; GFX90A-NEXT: v_mov_b32_e32 v24, 03594; GFX90A-NEXT: v_mov_b32_e32 v25, 03595; GFX90A-NEXT: v_mov_b32_e32 v26, 03596; GFX90A-NEXT: v_mov_b32_e32 v27, 03597; GFX90A-NEXT: v_mov_b32_e32 v28, 03598; GFX90A-NEXT: v_mov_b32_e32 v29, 03599; GFX90A-NEXT: v_mov_b32_e32 v30, 03600; GFX90A-NEXT: v_mov_b32_e32 v31, 03601; GFX90A-NEXT: v_mov_b32_e32 v32, 1.03602; GFX90A-NEXT: .LBB10_1: ; %for.cond.preheader3603; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=13604; GFX90A-NEXT: v_accvgpr_write_b32 a0, v03605; GFX90A-NEXT: v_accvgpr_write_b32 a1, v13606; GFX90A-NEXT: v_accvgpr_write_b32 a2, v23607; GFX90A-NEXT: v_accvgpr_write_b32 a3, v33608; GFX90A-NEXT: v_accvgpr_write_b32 a4, v43609; GFX90A-NEXT: v_accvgpr_write_b32 a5, v53610; GFX90A-NEXT: v_accvgpr_write_b32 a6, v63611; GFX90A-NEXT: v_accvgpr_write_b32 a7, v73612; GFX90A-NEXT: v_accvgpr_write_b32 a8, v83613; GFX90A-NEXT: v_accvgpr_write_b32 a9, v93614; GFX90A-NEXT: v_accvgpr_write_b32 a10, v103615; GFX90A-NEXT: v_accvgpr_write_b32 a11, v113616; GFX90A-NEXT: v_accvgpr_write_b32 a12, v123617; GFX90A-NEXT: v_accvgpr_write_b32 a13, v133618; GFX90A-NEXT: v_accvgpr_write_b32 a14, v143619; GFX90A-NEXT: v_accvgpr_write_b32 a15, v153620; GFX90A-NEXT: v_accvgpr_write_b32 a16, v163621; GFX90A-NEXT: v_accvgpr_write_b32 a17, v173622; GFX90A-NEXT: v_accvgpr_write_b32 a18, v183623; GFX90A-NEXT: v_accvgpr_write_b32 a19, v193624; GFX90A-NEXT: v_accvgpr_write_b32 a20, v203625; GFX90A-NEXT: v_accvgpr_write_b32 a21, v213626; GFX90A-NEXT: v_accvgpr_write_b32 a22, v223627; GFX90A-NEXT: v_accvgpr_write_b32 a23, v233628; GFX90A-NEXT: v_accvgpr_write_b32 a24, v243629; GFX90A-NEXT: v_accvgpr_write_b32 a25, v253630; GFX90A-NEXT: v_accvgpr_write_b32 a26, v263631; GFX90A-NEXT: v_accvgpr_write_b32 a27, v273632; GFX90A-NEXT: v_accvgpr_write_b32 a28, v283633; GFX90A-NEXT: v_accvgpr_write_b32 a29, v293634; GFX90A-NEXT: v_accvgpr_write_b32 a30, v303635; GFX90A-NEXT: v_accvgpr_write_b32 a31, v313636; GFX90A-NEXT: v_mov_b32_e32 v0, 2.03637; GFX90A-NEXT: s_add_i32 s4, s4, -13638; GFX90A-NEXT: s_cmp_lg_u32 s4, 03639; GFX90A-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v32, v0, a[0:31]3640; GFX90A-NEXT: s_nop 153641; GFX90A-NEXT: s_nop 23642; GFX90A-NEXT: v_accvgpr_read_b32 v0, a03643; GFX90A-NEXT: v_accvgpr_read_b32 v1, a13644; GFX90A-NEXT: v_accvgpr_read_b32 v2, a23645; GFX90A-NEXT: v_accvgpr_read_b32 v3, a33646; GFX90A-NEXT: v_accvgpr_read_b32 v4, a43647; GFX90A-NEXT: v_accvgpr_read_b32 v5, a53648; GFX90A-NEXT: v_accvgpr_read_b32 v6, a63649; GFX90A-NEXT: v_accvgpr_read_b32 v7, a73650; GFX90A-NEXT: v_accvgpr_read_b32 v8, a83651; GFX90A-NEXT: v_accvgpr_read_b32 v9, a93652; GFX90A-NEXT: v_accvgpr_read_b32 v10, a103653; GFX90A-NEXT: v_accvgpr_read_b32 v11, a113654; GFX90A-NEXT: v_accvgpr_read_b32 v12, a123655; GFX90A-NEXT: v_accvgpr_read_b32 v13, a133656; GFX90A-NEXT: v_accvgpr_read_b32 v14, a143657; GFX90A-NEXT: v_accvgpr_read_b32 v15, a153658; GFX90A-NEXT: v_accvgpr_read_b32 v16, a163659; GFX90A-NEXT: v_accvgpr_read_b32 v17, a173660; GFX90A-NEXT: v_accvgpr_read_b32 v18, a183661; GFX90A-NEXT: v_accvgpr_read_b32 v19, a193662; GFX90A-NEXT: v_accvgpr_read_b32 v20, a203663; GFX90A-NEXT: v_accvgpr_read_b32 v21, a213664; GFX90A-NEXT: v_accvgpr_read_b32 v22, a223665; GFX90A-NEXT: v_accvgpr_read_b32 v23, a233666; GFX90A-NEXT: v_accvgpr_read_b32 v24, a243667; GFX90A-NEXT: v_accvgpr_read_b32 v25, a253668; GFX90A-NEXT: v_accvgpr_read_b32 v26, a263669; GFX90A-NEXT: v_accvgpr_read_b32 v27, a273670; GFX90A-NEXT: v_accvgpr_read_b32 v28, a283671; GFX90A-NEXT: v_accvgpr_read_b32 v29, a293672; GFX90A-NEXT: v_accvgpr_read_b32 v30, a303673; GFX90A-NEXT: v_accvgpr_read_b32 v31, a313674; GFX90A-NEXT: s_cbranch_scc1 .LBB10_13675; GFX90A-NEXT: ; %bb.2: ; %exit3676; GFX90A-NEXT: v_accvgpr_read_b32 v0, a03677; GFX90A-NEXT: v_accvgpr_read_b32 v1, a13678; GFX90A-NEXT: v_accvgpr_read_b32 v2, a23679; GFX90A-NEXT: v_accvgpr_read_b32 v3, a33680; GFX90A-NEXT: v_accvgpr_read_b32 v4, a43681; GFX90A-NEXT: v_accvgpr_read_b32 v5, a53682; GFX90A-NEXT: v_accvgpr_read_b32 v6, a63683; GFX90A-NEXT: v_accvgpr_read_b32 v7, a73684; GFX90A-NEXT: v_accvgpr_read_b32 v8, a83685; GFX90A-NEXT: v_accvgpr_read_b32 v9, a93686; GFX90A-NEXT: v_accvgpr_read_b32 v10, a103687; GFX90A-NEXT: v_accvgpr_read_b32 v11, a113688; GFX90A-NEXT: v_accvgpr_read_b32 v12, a123689; GFX90A-NEXT: v_accvgpr_read_b32 v13, a133690; GFX90A-NEXT: v_accvgpr_read_b32 v14, a143691; GFX90A-NEXT: v_accvgpr_read_b32 v15, a153692; GFX90A-NEXT: v_accvgpr_read_b32 v16, a163693; GFX90A-NEXT: v_accvgpr_read_b32 v17, a173694; GFX90A-NEXT: v_accvgpr_read_b32 v18, a183695; GFX90A-NEXT: v_accvgpr_read_b32 v19, a193696; GFX90A-NEXT: v_accvgpr_read_b32 v20, a203697; GFX90A-NEXT: v_accvgpr_read_b32 v21, a213698; GFX90A-NEXT: v_accvgpr_read_b32 v22, a223699; GFX90A-NEXT: v_accvgpr_read_b32 v23, a233700; GFX90A-NEXT: v_accvgpr_read_b32 v24, a243701; GFX90A-NEXT: v_accvgpr_read_b32 v25, a253702; GFX90A-NEXT: v_accvgpr_read_b32 v26, a263703; GFX90A-NEXT: v_accvgpr_read_b32 v27, a273704; GFX90A-NEXT: v_accvgpr_read_b32 v28, a283705; GFX90A-NEXT: v_accvgpr_read_b32 v29, a293706; GFX90A-NEXT: v_accvgpr_read_b32 v30, a303707; GFX90A-NEXT: v_accvgpr_read_b32 v31, a313708; GFX90A-NEXT: s_setpc_b64 s[30:31]3709;3710; GFX942-LABEL: test_mfma_loop_zeroinit_ret_use:3711; GFX942: ; %bb.0: ; %entry3712; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3713; GFX942-NEXT: s_mov_b32 s0, 163714; GFX942-NEXT: v_mov_b32_e32 v0, 03715; GFX942-NEXT: v_mov_b32_e32 v1, 03716; GFX942-NEXT: v_mov_b32_e32 v2, 03717; GFX942-NEXT: v_mov_b32_e32 v3, 03718; GFX942-NEXT: v_mov_b32_e32 v4, 03719; GFX942-NEXT: v_mov_b32_e32 v5, 03720; GFX942-NEXT: v_mov_b32_e32 v6, 03721; GFX942-NEXT: v_mov_b32_e32 v7, 03722; GFX942-NEXT: v_mov_b32_e32 v8, 03723; GFX942-NEXT: v_mov_b32_e32 v9, 03724; GFX942-NEXT: v_mov_b32_e32 v10, 03725; GFX942-NEXT: v_mov_b32_e32 v11, 03726; GFX942-NEXT: v_mov_b32_e32 v12, 03727; GFX942-NEXT: v_mov_b32_e32 v13, 03728; GFX942-NEXT: v_mov_b32_e32 v14, 03729; GFX942-NEXT: v_mov_b32_e32 v15, 03730; GFX942-NEXT: v_mov_b32_e32 v16, 03731; GFX942-NEXT: v_mov_b32_e32 v17, 03732; GFX942-NEXT: v_mov_b32_e32 v18, 03733; GFX942-NEXT: v_mov_b32_e32 v19, 03734; GFX942-NEXT: v_mov_b32_e32 v20, 03735; GFX942-NEXT: v_mov_b32_e32 v21, 03736; GFX942-NEXT: v_mov_b32_e32 v22, 03737; GFX942-NEXT: v_mov_b32_e32 v23, 03738; GFX942-NEXT: v_mov_b32_e32 v24, 03739; GFX942-NEXT: v_mov_b32_e32 v25, 03740; GFX942-NEXT: v_mov_b32_e32 v26, 03741; GFX942-NEXT: v_mov_b32_e32 v27, 03742; GFX942-NEXT: v_mov_b32_e32 v28, 03743; GFX942-NEXT: v_mov_b32_e32 v29, 03744; GFX942-NEXT: v_mov_b32_e32 v30, 03745; GFX942-NEXT: v_mov_b32_e32 v31, 03746; GFX942-NEXT: v_mov_b32_e32 v32, 1.03747; GFX942-NEXT: .LBB10_1: ; %for.cond.preheader3748; GFX942-NEXT: ; =>This Inner Loop Header: Depth=13749; GFX942-NEXT: v_accvgpr_write_b32 a0, v03750; GFX942-NEXT: v_accvgpr_write_b32 a1, v13751; GFX942-NEXT: v_accvgpr_write_b32 a2, v23752; GFX942-NEXT: v_accvgpr_write_b32 a3, v33753; GFX942-NEXT: v_accvgpr_write_b32 a4, v43754; GFX942-NEXT: v_accvgpr_write_b32 a5, v53755; GFX942-NEXT: v_accvgpr_write_b32 a6, v63756; GFX942-NEXT: v_accvgpr_write_b32 a7, v73757; GFX942-NEXT: v_accvgpr_write_b32 a8, v83758; GFX942-NEXT: v_accvgpr_write_b32 a9, v93759; GFX942-NEXT: v_accvgpr_write_b32 a10, v103760; GFX942-NEXT: v_accvgpr_write_b32 a11, v113761; GFX942-NEXT: v_accvgpr_write_b32 a12, v123762; GFX942-NEXT: v_accvgpr_write_b32 a13, v133763; GFX942-NEXT: v_accvgpr_write_b32 a14, v143764; GFX942-NEXT: v_accvgpr_write_b32 a15, v153765; GFX942-NEXT: v_accvgpr_write_b32 a16, v163766; GFX942-NEXT: v_accvgpr_write_b32 a17, v173767; GFX942-NEXT: v_accvgpr_write_b32 a18, v183768; GFX942-NEXT: v_accvgpr_write_b32 a19, v193769; GFX942-NEXT: v_accvgpr_write_b32 a20, v203770; GFX942-NEXT: v_accvgpr_write_b32 a21, v213771; GFX942-NEXT: v_accvgpr_write_b32 a22, v223772; GFX942-NEXT: v_accvgpr_write_b32 a23, v233773; GFX942-NEXT: v_accvgpr_write_b32 a24, v243774; GFX942-NEXT: v_accvgpr_write_b32 a25, v253775; GFX942-NEXT: v_accvgpr_write_b32 a26, v263776; GFX942-NEXT: v_accvgpr_write_b32 a27, v273777; GFX942-NEXT: v_accvgpr_write_b32 a28, v283778; GFX942-NEXT: v_accvgpr_write_b32 a29, v293779; GFX942-NEXT: v_accvgpr_write_b32 a30, v303780; GFX942-NEXT: v_accvgpr_write_b32 a31, v313781; GFX942-NEXT: v_mov_b32_e32 v0, 2.03782; GFX942-NEXT: s_add_i32 s0, s0, -13783; GFX942-NEXT: s_cmp_lg_u32 s0, 03784; GFX942-NEXT: v_mfma_f32_32x32x1_2b_f32 a[0:31], v32, v0, a[0:31]3785; GFX942-NEXT: s_nop 153786; GFX942-NEXT: s_nop 13787; GFX942-NEXT: v_accvgpr_read_b32 v0, a03788; GFX942-NEXT: v_accvgpr_read_b32 v1, a13789; GFX942-NEXT: v_accvgpr_read_b32 v2, a23790; GFX942-NEXT: v_accvgpr_read_b32 v3, a33791; GFX942-NEXT: v_accvgpr_read_b32 v4, a43792; GFX942-NEXT: v_accvgpr_read_b32 v5, a53793; GFX942-NEXT: v_accvgpr_read_b32 v6, a63794; GFX942-NEXT: v_accvgpr_read_b32 v7, a73795; GFX942-NEXT: v_accvgpr_read_b32 v8, a83796; GFX942-NEXT: v_accvgpr_read_b32 v9, a93797; GFX942-NEXT: v_accvgpr_read_b32 v10, a103798; GFX942-NEXT: v_accvgpr_read_b32 v11, a113799; GFX942-NEXT: v_accvgpr_read_b32 v12, a123800; GFX942-NEXT: v_accvgpr_read_b32 v13, a133801; GFX942-NEXT: v_accvgpr_read_b32 v14, a143802; GFX942-NEXT: v_accvgpr_read_b32 v15, a153803; GFX942-NEXT: v_accvgpr_read_b32 v16, a163804; GFX942-NEXT: v_accvgpr_read_b32 v17, a173805; GFX942-NEXT: v_accvgpr_read_b32 v18, a183806; GFX942-NEXT: v_accvgpr_read_b32 v19, a193807; GFX942-NEXT: v_accvgpr_read_b32 v20, a203808; GFX942-NEXT: v_accvgpr_read_b32 v21, a213809; GFX942-NEXT: v_accvgpr_read_b32 v22, a223810; GFX942-NEXT: v_accvgpr_read_b32 v23, a233811; GFX942-NEXT: v_accvgpr_read_b32 v24, a243812; GFX942-NEXT: v_accvgpr_read_b32 v25, a253813; GFX942-NEXT: v_accvgpr_read_b32 v26, a263814; GFX942-NEXT: v_accvgpr_read_b32 v27, a273815; GFX942-NEXT: v_accvgpr_read_b32 v28, a283816; GFX942-NEXT: v_accvgpr_read_b32 v29, a293817; GFX942-NEXT: v_accvgpr_read_b32 v30, a303818; GFX942-NEXT: v_accvgpr_read_b32 v31, a313819; GFX942-NEXT: s_cbranch_scc1 .LBB10_13820; GFX942-NEXT: ; %bb.2: ; %exit3821; GFX942-NEXT: v_accvgpr_read_b32 v0, a03822; GFX942-NEXT: v_accvgpr_read_b32 v1, a13823; GFX942-NEXT: v_accvgpr_read_b32 v2, a23824; GFX942-NEXT: v_accvgpr_read_b32 v3, a33825; GFX942-NEXT: v_accvgpr_read_b32 v4, a43826; GFX942-NEXT: v_accvgpr_read_b32 v5, a53827; GFX942-NEXT: v_accvgpr_read_b32 v6, a63828; GFX942-NEXT: v_accvgpr_read_b32 v7, a73829; GFX942-NEXT: v_accvgpr_read_b32 v8, a83830; GFX942-NEXT: v_accvgpr_read_b32 v9, a93831; GFX942-NEXT: v_accvgpr_read_b32 v10, a103832; GFX942-NEXT: v_accvgpr_read_b32 v11, a113833; GFX942-NEXT: v_accvgpr_read_b32 v12, a123834; GFX942-NEXT: v_accvgpr_read_b32 v13, a133835; GFX942-NEXT: v_accvgpr_read_b32 v14, a143836; GFX942-NEXT: v_accvgpr_read_b32 v15, a153837; GFX942-NEXT: v_accvgpr_read_b32 v16, a163838; GFX942-NEXT: v_accvgpr_read_b32 v17, a173839; GFX942-NEXT: v_accvgpr_read_b32 v18, a183840; GFX942-NEXT: v_accvgpr_read_b32 v19, a193841; GFX942-NEXT: v_accvgpr_read_b32 v20, a203842; GFX942-NEXT: v_accvgpr_read_b32 v21, a213843; GFX942-NEXT: v_accvgpr_read_b32 v22, a223844; GFX942-NEXT: v_accvgpr_read_b32 v23, a233845; GFX942-NEXT: v_accvgpr_read_b32 v24, a243846; GFX942-NEXT: v_accvgpr_read_b32 v25, a253847; GFX942-NEXT: v_accvgpr_read_b32 v26, a263848; GFX942-NEXT: v_accvgpr_read_b32 v27, a273849; GFX942-NEXT: v_accvgpr_read_b32 v28, a283850; GFX942-NEXT: v_accvgpr_read_b32 v29, a293851; GFX942-NEXT: v_accvgpr_read_b32 v30, a303852; GFX942-NEXT: v_accvgpr_read_b32 v31, a313853; GFX942-NEXT: s_setpc_b64 s[30:31]3854entry:3855 br label %for.cond.preheader3856 3857for.cond.preheader:3858 %phi = phi <32 x float> [ zeroinitializer, %entry ], [ %mai.1, %for.cond.preheader ]3859 %c = phi i32 [ 0, %entry ], [ %inc, %for.cond.preheader ]3860 %mai.1 = tail call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float 1.0, float 2.0, <32 x float> %phi, i32 0, i32 0, i32 0)3861 %inc = add nuw nsw i32 %c, 13862 %cc = icmp eq i32 %inc, 163863 br i1 %cc, label %exit, label %for.cond.preheader3864 3865exit:3866 ret <32 x float> %mai.13867}3868 3869define <32 x float> @test_mfma_loop_non_splat_ret_use() #0 {3870; GFX908-LABEL: test_mfma_loop_non_splat_ret_use:3871; GFX908: ; %bb.0: ; %entry3872; GFX908-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3873; GFX908-NEXT: v_accvgpr_write_b32 a1, 1.03874; GFX908-NEXT: v_accvgpr_write_b32 a31, 03875; GFX908-NEXT: v_accvgpr_write_b32 a30, 03876; GFX908-NEXT: v_accvgpr_write_b32 a29, 03877; GFX908-NEXT: v_accvgpr_write_b32 a28, 03878; GFX908-NEXT: v_accvgpr_write_b32 a27, 03879; GFX908-NEXT: v_accvgpr_write_b32 a26, 03880; GFX908-NEXT: v_accvgpr_write_b32 a25, 03881; GFX908-NEXT: v_accvgpr_write_b32 a24, 03882; GFX908-NEXT: v_accvgpr_write_b32 a23, 03883; GFX908-NEXT: v_accvgpr_write_b32 a22, 03884; GFX908-NEXT: v_accvgpr_write_b32 a21, 03885; GFX908-NEXT: v_accvgpr_write_b32 a20, 03886; GFX908-NEXT: v_accvgpr_write_b32 a19, 03887; GFX908-NEXT: v_accvgpr_write_b32 a18, 03888; GFX908-NEXT: v_accvgpr_write_b32 a17, 03889; GFX908-NEXT: v_accvgpr_write_b32 a16, 03890; GFX908-NEXT: v_accvgpr_write_b32 a15, 03891; GFX908-NEXT: v_accvgpr_write_b32 a14, 03892; GFX908-NEXT: v_accvgpr_write_b32 a13, 03893; GFX908-NEXT: v_accvgpr_write_b32 a12, 03894; GFX908-NEXT: v_accvgpr_write_b32 a11, 03895; GFX908-NEXT: v_accvgpr_write_b32 a10, 03896; GFX908-NEXT: v_accvgpr_write_b32 a9, 03897; GFX908-NEXT: v_accvgpr_write_b32 a8, 03898; GFX908-NEXT: v_accvgpr_write_b32 a7, 03899; GFX908-NEXT: v_accvgpr_write_b32 a6, 03900; GFX908-NEXT: v_accvgpr_write_b32 a5, 03901; GFX908-NEXT: v_accvgpr_write_b32 a4, 03902; GFX908-NEXT: v_accvgpr_write_b32 a3, 03903; GFX908-NEXT: v_accvgpr_write_b32 a2, 03904; GFX908-NEXT: v_accvgpr_write_b32 a0, 03905; GFX908-NEXT: s_mov_b32 s4, 163906; GFX908-NEXT: v_mov_b32_e32 v0, 1.03907; GFX908-NEXT: v_mov_b32_e32 v1, 2.03908; GFX908-NEXT: .LBB11_1: ; %for.cond.preheader3909; GFX908-NEXT: ; =>This Inner Loop Header: Depth=13910; GFX908-NEXT: s_nop 13911; GFX908-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v0, v1, a[0:31]3912; GFX908-NEXT: s_add_i32 s4, s4, -13913; GFX908-NEXT: s_cmp_lg_u32 s4, 03914; GFX908-NEXT: s_cbranch_scc1 .LBB11_13915; GFX908-NEXT: ; %bb.2: ; %exit3916; GFX908-NEXT: s_nop 143917; GFX908-NEXT: v_accvgpr_read_b32 v0, a03918; GFX908-NEXT: v_accvgpr_read_b32 v1, a13919; GFX908-NEXT: v_accvgpr_read_b32 v2, a23920; GFX908-NEXT: v_accvgpr_read_b32 v3, a33921; GFX908-NEXT: v_accvgpr_read_b32 v4, a43922; GFX908-NEXT: v_accvgpr_read_b32 v5, a53923; GFX908-NEXT: v_accvgpr_read_b32 v6, a63924; GFX908-NEXT: v_accvgpr_read_b32 v7, a73925; GFX908-NEXT: v_accvgpr_read_b32 v8, a83926; GFX908-NEXT: v_accvgpr_read_b32 v9, a93927; GFX908-NEXT: v_accvgpr_read_b32 v10, a103928; GFX908-NEXT: v_accvgpr_read_b32 v11, a113929; GFX908-NEXT: v_accvgpr_read_b32 v12, a123930; GFX908-NEXT: v_accvgpr_read_b32 v13, a133931; GFX908-NEXT: v_accvgpr_read_b32 v14, a143932; GFX908-NEXT: v_accvgpr_read_b32 v15, a153933; GFX908-NEXT: v_accvgpr_read_b32 v16, a163934; GFX908-NEXT: v_accvgpr_read_b32 v17, a173935; GFX908-NEXT: v_accvgpr_read_b32 v18, a183936; GFX908-NEXT: v_accvgpr_read_b32 v19, a193937; GFX908-NEXT: v_accvgpr_read_b32 v20, a203938; GFX908-NEXT: v_accvgpr_read_b32 v21, a213939; GFX908-NEXT: v_accvgpr_read_b32 v22, a223940; GFX908-NEXT: v_accvgpr_read_b32 v23, a233941; GFX908-NEXT: v_accvgpr_read_b32 v24, a243942; GFX908-NEXT: v_accvgpr_read_b32 v25, a253943; GFX908-NEXT: v_accvgpr_read_b32 v26, a263944; GFX908-NEXT: v_accvgpr_read_b32 v27, a273945; GFX908-NEXT: v_accvgpr_read_b32 v28, a283946; GFX908-NEXT: v_accvgpr_read_b32 v29, a293947; GFX908-NEXT: v_accvgpr_read_b32 v30, a303948; GFX908-NEXT: v_accvgpr_read_b32 v31, a313949; GFX908-NEXT: s_setpc_b64 s[30:31]3950;3951; GFX90A-LABEL: test_mfma_loop_non_splat_ret_use:3952; GFX90A: ; %bb.0: ; %entry3953; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3954; GFX90A-NEXT: s_mov_b32 s4, 163955; GFX90A-NEXT: v_mov_b32_e32 v0, 03956; GFX90A-NEXT: v_mov_b32_e32 v1, 1.03957; GFX90A-NEXT: v_mov_b32_e32 v2, 03958; GFX90A-NEXT: v_mov_b32_e32 v3, 03959; GFX90A-NEXT: v_mov_b32_e32 v4, 03960; GFX90A-NEXT: v_mov_b32_e32 v5, 03961; GFX90A-NEXT: v_mov_b32_e32 v6, 03962; GFX90A-NEXT: v_mov_b32_e32 v7, 03963; GFX90A-NEXT: v_mov_b32_e32 v8, 03964; GFX90A-NEXT: v_mov_b32_e32 v9, 03965; GFX90A-NEXT: v_mov_b32_e32 v10, 03966; GFX90A-NEXT: v_mov_b32_e32 v11, 03967; GFX90A-NEXT: v_mov_b32_e32 v12, 03968; GFX90A-NEXT: v_mov_b32_e32 v13, 03969; GFX90A-NEXT: v_mov_b32_e32 v14, 03970; GFX90A-NEXT: v_mov_b32_e32 v15, 03971; GFX90A-NEXT: v_mov_b32_e32 v16, 03972; GFX90A-NEXT: v_mov_b32_e32 v17, 03973; GFX90A-NEXT: v_mov_b32_e32 v18, 03974; GFX90A-NEXT: v_mov_b32_e32 v19, 03975; GFX90A-NEXT: v_mov_b32_e32 v20, 03976; GFX90A-NEXT: v_mov_b32_e32 v21, 03977; GFX90A-NEXT: v_mov_b32_e32 v22, 03978; GFX90A-NEXT: v_mov_b32_e32 v23, 03979; GFX90A-NEXT: v_mov_b32_e32 v24, 03980; GFX90A-NEXT: v_mov_b32_e32 v25, 03981; GFX90A-NEXT: v_mov_b32_e32 v26, 03982; GFX90A-NEXT: v_mov_b32_e32 v27, 03983; GFX90A-NEXT: v_mov_b32_e32 v28, 03984; GFX90A-NEXT: v_mov_b32_e32 v29, 03985; GFX90A-NEXT: v_mov_b32_e32 v30, 03986; GFX90A-NEXT: v_mov_b32_e32 v31, 03987; GFX90A-NEXT: v_mov_b32_e32 v32, 1.03988; GFX90A-NEXT: .LBB11_1: ; %for.cond.preheader3989; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=13990; GFX90A-NEXT: v_accvgpr_write_b32 a0, v03991; GFX90A-NEXT: v_accvgpr_write_b32 a1, v13992; GFX90A-NEXT: v_accvgpr_write_b32 a2, v23993; GFX90A-NEXT: v_accvgpr_write_b32 a3, v33994; GFX90A-NEXT: v_accvgpr_write_b32 a4, v43995; GFX90A-NEXT: v_accvgpr_write_b32 a5, v53996; GFX90A-NEXT: v_accvgpr_write_b32 a6, v63997; GFX90A-NEXT: v_accvgpr_write_b32 a7, v73998; GFX90A-NEXT: v_accvgpr_write_b32 a8, v83999; GFX90A-NEXT: v_accvgpr_write_b32 a9, v94000; GFX90A-NEXT: v_accvgpr_write_b32 a10, v104001; GFX90A-NEXT: v_accvgpr_write_b32 a11, v114002; GFX90A-NEXT: v_accvgpr_write_b32 a12, v124003; GFX90A-NEXT: v_accvgpr_write_b32 a13, v134004; GFX90A-NEXT: v_accvgpr_write_b32 a14, v144005; GFX90A-NEXT: v_accvgpr_write_b32 a15, v154006; GFX90A-NEXT: v_accvgpr_write_b32 a16, v164007; GFX90A-NEXT: v_accvgpr_write_b32 a17, v174008; GFX90A-NEXT: v_accvgpr_write_b32 a18, v184009; GFX90A-NEXT: v_accvgpr_write_b32 a19, v194010; GFX90A-NEXT: v_accvgpr_write_b32 a20, v204011; GFX90A-NEXT: v_accvgpr_write_b32 a21, v214012; GFX90A-NEXT: v_accvgpr_write_b32 a22, v224013; GFX90A-NEXT: v_accvgpr_write_b32 a23, v234014; GFX90A-NEXT: v_accvgpr_write_b32 a24, v244015; GFX90A-NEXT: v_accvgpr_write_b32 a25, v254016; GFX90A-NEXT: v_accvgpr_write_b32 a26, v264017; GFX90A-NEXT: v_accvgpr_write_b32 a27, v274018; GFX90A-NEXT: v_accvgpr_write_b32 a28, v284019; GFX90A-NEXT: v_accvgpr_write_b32 a29, v294020; GFX90A-NEXT: v_accvgpr_write_b32 a30, v304021; GFX90A-NEXT: v_accvgpr_write_b32 a31, v314022; GFX90A-NEXT: v_mov_b32_e32 v0, 2.04023; GFX90A-NEXT: s_add_i32 s4, s4, -14024; GFX90A-NEXT: s_cmp_lg_u32 s4, 04025; GFX90A-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v32, v0, a[0:31]4026; GFX90A-NEXT: s_nop 154027; GFX90A-NEXT: s_nop 24028; GFX90A-NEXT: v_accvgpr_read_b32 v0, a04029; GFX90A-NEXT: v_accvgpr_read_b32 v1, a14030; GFX90A-NEXT: v_accvgpr_read_b32 v2, a24031; GFX90A-NEXT: v_accvgpr_read_b32 v3, a34032; GFX90A-NEXT: v_accvgpr_read_b32 v4, a44033; GFX90A-NEXT: v_accvgpr_read_b32 v5, a54034; GFX90A-NEXT: v_accvgpr_read_b32 v6, a64035; GFX90A-NEXT: v_accvgpr_read_b32 v7, a74036; GFX90A-NEXT: v_accvgpr_read_b32 v8, a84037; GFX90A-NEXT: v_accvgpr_read_b32 v9, a94038; GFX90A-NEXT: v_accvgpr_read_b32 v10, a104039; GFX90A-NEXT: v_accvgpr_read_b32 v11, a114040; GFX90A-NEXT: v_accvgpr_read_b32 v12, a124041; GFX90A-NEXT: v_accvgpr_read_b32 v13, a134042; GFX90A-NEXT: v_accvgpr_read_b32 v14, a144043; GFX90A-NEXT: v_accvgpr_read_b32 v15, a154044; GFX90A-NEXT: v_accvgpr_read_b32 v16, a164045; GFX90A-NEXT: v_accvgpr_read_b32 v17, a174046; GFX90A-NEXT: v_accvgpr_read_b32 v18, a184047; GFX90A-NEXT: v_accvgpr_read_b32 v19, a194048; GFX90A-NEXT: v_accvgpr_read_b32 v20, a204049; GFX90A-NEXT: v_accvgpr_read_b32 v21, a214050; GFX90A-NEXT: v_accvgpr_read_b32 v22, a224051; GFX90A-NEXT: v_accvgpr_read_b32 v23, a234052; GFX90A-NEXT: v_accvgpr_read_b32 v24, a244053; GFX90A-NEXT: v_accvgpr_read_b32 v25, a254054; GFX90A-NEXT: v_accvgpr_read_b32 v26, a264055; GFX90A-NEXT: v_accvgpr_read_b32 v27, a274056; GFX90A-NEXT: v_accvgpr_read_b32 v28, a284057; GFX90A-NEXT: v_accvgpr_read_b32 v29, a294058; GFX90A-NEXT: v_accvgpr_read_b32 v30, a304059; GFX90A-NEXT: v_accvgpr_read_b32 v31, a314060; GFX90A-NEXT: s_cbranch_scc1 .LBB11_14061; GFX90A-NEXT: ; %bb.2: ; %exit4062; GFX90A-NEXT: v_accvgpr_read_b32 v0, a04063; GFX90A-NEXT: v_accvgpr_read_b32 v1, a14064; GFX90A-NEXT: v_accvgpr_read_b32 v2, a24065; GFX90A-NEXT: v_accvgpr_read_b32 v3, a34066; GFX90A-NEXT: v_accvgpr_read_b32 v4, a44067; GFX90A-NEXT: v_accvgpr_read_b32 v5, a54068; GFX90A-NEXT: v_accvgpr_read_b32 v6, a64069; GFX90A-NEXT: v_accvgpr_read_b32 v7, a74070; GFX90A-NEXT: v_accvgpr_read_b32 v8, a84071; GFX90A-NEXT: v_accvgpr_read_b32 v9, a94072; GFX90A-NEXT: v_accvgpr_read_b32 v10, a104073; GFX90A-NEXT: v_accvgpr_read_b32 v11, a114074; GFX90A-NEXT: v_accvgpr_read_b32 v12, a124075; GFX90A-NEXT: v_accvgpr_read_b32 v13, a134076; GFX90A-NEXT: v_accvgpr_read_b32 v14, a144077; GFX90A-NEXT: v_accvgpr_read_b32 v15, a154078; GFX90A-NEXT: v_accvgpr_read_b32 v16, a164079; GFX90A-NEXT: v_accvgpr_read_b32 v17, a174080; GFX90A-NEXT: v_accvgpr_read_b32 v18, a184081; GFX90A-NEXT: v_accvgpr_read_b32 v19, a194082; GFX90A-NEXT: v_accvgpr_read_b32 v20, a204083; GFX90A-NEXT: v_accvgpr_read_b32 v21, a214084; GFX90A-NEXT: v_accvgpr_read_b32 v22, a224085; GFX90A-NEXT: v_accvgpr_read_b32 v23, a234086; GFX90A-NEXT: v_accvgpr_read_b32 v24, a244087; GFX90A-NEXT: v_accvgpr_read_b32 v25, a254088; GFX90A-NEXT: v_accvgpr_read_b32 v26, a264089; GFX90A-NEXT: v_accvgpr_read_b32 v27, a274090; GFX90A-NEXT: v_accvgpr_read_b32 v28, a284091; GFX90A-NEXT: v_accvgpr_read_b32 v29, a294092; GFX90A-NEXT: v_accvgpr_read_b32 v30, a304093; GFX90A-NEXT: v_accvgpr_read_b32 v31, a314094; GFX90A-NEXT: s_setpc_b64 s[30:31]4095;4096; GFX942-LABEL: test_mfma_loop_non_splat_ret_use:4097; GFX942: ; %bb.0: ; %entry4098; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4099; GFX942-NEXT: s_mov_b32 s0, 164100; GFX942-NEXT: v_mov_b32_e32 v0, 04101; GFX942-NEXT: v_mov_b32_e32 v1, 1.04102; GFX942-NEXT: v_mov_b32_e32 v2, 04103; GFX942-NEXT: v_mov_b32_e32 v3, 04104; GFX942-NEXT: v_mov_b32_e32 v4, 04105; GFX942-NEXT: v_mov_b32_e32 v5, 04106; GFX942-NEXT: v_mov_b32_e32 v6, 04107; GFX942-NEXT: v_mov_b32_e32 v7, 04108; GFX942-NEXT: v_mov_b32_e32 v8, 04109; GFX942-NEXT: v_mov_b32_e32 v9, 04110; GFX942-NEXT: v_mov_b32_e32 v10, 04111; GFX942-NEXT: v_mov_b32_e32 v11, 04112; GFX942-NEXT: v_mov_b32_e32 v12, 04113; GFX942-NEXT: v_mov_b32_e32 v13, 04114; GFX942-NEXT: v_mov_b32_e32 v14, 04115; GFX942-NEXT: v_mov_b32_e32 v15, 04116; GFX942-NEXT: v_mov_b32_e32 v16, 04117; GFX942-NEXT: v_mov_b32_e32 v17, 04118; GFX942-NEXT: v_mov_b32_e32 v18, 04119; GFX942-NEXT: v_mov_b32_e32 v19, 04120; GFX942-NEXT: v_mov_b32_e32 v20, 04121; GFX942-NEXT: v_mov_b32_e32 v21, 04122; GFX942-NEXT: v_mov_b32_e32 v22, 04123; GFX942-NEXT: v_mov_b32_e32 v23, 04124; GFX942-NEXT: v_mov_b32_e32 v24, 04125; GFX942-NEXT: v_mov_b32_e32 v25, 04126; GFX942-NEXT: v_mov_b32_e32 v26, 04127; GFX942-NEXT: v_mov_b32_e32 v27, 04128; GFX942-NEXT: v_mov_b32_e32 v28, 04129; GFX942-NEXT: v_mov_b32_e32 v29, 04130; GFX942-NEXT: v_mov_b32_e32 v30, 04131; GFX942-NEXT: v_mov_b32_e32 v31, 04132; GFX942-NEXT: v_mov_b32_e32 v32, 1.04133; GFX942-NEXT: .LBB11_1: ; %for.cond.preheader4134; GFX942-NEXT: ; =>This Inner Loop Header: Depth=14135; GFX942-NEXT: v_accvgpr_write_b32 a0, v04136; GFX942-NEXT: v_accvgpr_write_b32 a1, v14137; GFX942-NEXT: v_accvgpr_write_b32 a2, v24138; GFX942-NEXT: v_accvgpr_write_b32 a3, v34139; GFX942-NEXT: v_accvgpr_write_b32 a4, v44140; GFX942-NEXT: v_accvgpr_write_b32 a5, v54141; GFX942-NEXT: v_accvgpr_write_b32 a6, v64142; GFX942-NEXT: v_accvgpr_write_b32 a7, v74143; GFX942-NEXT: v_accvgpr_write_b32 a8, v84144; GFX942-NEXT: v_accvgpr_write_b32 a9, v94145; GFX942-NEXT: v_accvgpr_write_b32 a10, v104146; GFX942-NEXT: v_accvgpr_write_b32 a11, v114147; GFX942-NEXT: v_accvgpr_write_b32 a12, v124148; GFX942-NEXT: v_accvgpr_write_b32 a13, v134149; GFX942-NEXT: v_accvgpr_write_b32 a14, v144150; GFX942-NEXT: v_accvgpr_write_b32 a15, v154151; GFX942-NEXT: v_accvgpr_write_b32 a16, v164152; GFX942-NEXT: v_accvgpr_write_b32 a17, v174153; GFX942-NEXT: v_accvgpr_write_b32 a18, v184154; GFX942-NEXT: v_accvgpr_write_b32 a19, v194155; GFX942-NEXT: v_accvgpr_write_b32 a20, v204156; GFX942-NEXT: v_accvgpr_write_b32 a21, v214157; GFX942-NEXT: v_accvgpr_write_b32 a22, v224158; GFX942-NEXT: v_accvgpr_write_b32 a23, v234159; GFX942-NEXT: v_accvgpr_write_b32 a24, v244160; GFX942-NEXT: v_accvgpr_write_b32 a25, v254161; GFX942-NEXT: v_accvgpr_write_b32 a26, v264162; GFX942-NEXT: v_accvgpr_write_b32 a27, v274163; GFX942-NEXT: v_accvgpr_write_b32 a28, v284164; GFX942-NEXT: v_accvgpr_write_b32 a29, v294165; GFX942-NEXT: v_accvgpr_write_b32 a30, v304166; GFX942-NEXT: v_accvgpr_write_b32 a31, v314167; GFX942-NEXT: v_mov_b32_e32 v0, 2.04168; GFX942-NEXT: s_add_i32 s0, s0, -14169; GFX942-NEXT: s_cmp_lg_u32 s0, 04170; GFX942-NEXT: v_mfma_f32_32x32x1_2b_f32 a[0:31], v32, v0, a[0:31]4171; GFX942-NEXT: s_nop 154172; GFX942-NEXT: s_nop 14173; GFX942-NEXT: v_accvgpr_read_b32 v0, a04174; GFX942-NEXT: v_accvgpr_read_b32 v1, a14175; GFX942-NEXT: v_accvgpr_read_b32 v2, a24176; GFX942-NEXT: v_accvgpr_read_b32 v3, a34177; GFX942-NEXT: v_accvgpr_read_b32 v4, a44178; GFX942-NEXT: v_accvgpr_read_b32 v5, a54179; GFX942-NEXT: v_accvgpr_read_b32 v6, a64180; GFX942-NEXT: v_accvgpr_read_b32 v7, a74181; GFX942-NEXT: v_accvgpr_read_b32 v8, a84182; GFX942-NEXT: v_accvgpr_read_b32 v9, a94183; GFX942-NEXT: v_accvgpr_read_b32 v10, a104184; GFX942-NEXT: v_accvgpr_read_b32 v11, a114185; GFX942-NEXT: v_accvgpr_read_b32 v12, a124186; GFX942-NEXT: v_accvgpr_read_b32 v13, a134187; GFX942-NEXT: v_accvgpr_read_b32 v14, a144188; GFX942-NEXT: v_accvgpr_read_b32 v15, a154189; GFX942-NEXT: v_accvgpr_read_b32 v16, a164190; GFX942-NEXT: v_accvgpr_read_b32 v17, a174191; GFX942-NEXT: v_accvgpr_read_b32 v18, a184192; GFX942-NEXT: v_accvgpr_read_b32 v19, a194193; GFX942-NEXT: v_accvgpr_read_b32 v20, a204194; GFX942-NEXT: v_accvgpr_read_b32 v21, a214195; GFX942-NEXT: v_accvgpr_read_b32 v22, a224196; GFX942-NEXT: v_accvgpr_read_b32 v23, a234197; GFX942-NEXT: v_accvgpr_read_b32 v24, a244198; GFX942-NEXT: v_accvgpr_read_b32 v25, a254199; GFX942-NEXT: v_accvgpr_read_b32 v26, a264200; GFX942-NEXT: v_accvgpr_read_b32 v27, a274201; GFX942-NEXT: v_accvgpr_read_b32 v28, a284202; GFX942-NEXT: v_accvgpr_read_b32 v29, a294203; GFX942-NEXT: v_accvgpr_read_b32 v30, a304204; GFX942-NEXT: v_accvgpr_read_b32 v31, a314205; GFX942-NEXT: s_cbranch_scc1 .LBB11_14206; GFX942-NEXT: ; %bb.2: ; %exit4207; GFX942-NEXT: v_accvgpr_read_b32 v0, a04208; GFX942-NEXT: v_accvgpr_read_b32 v1, a14209; GFX942-NEXT: v_accvgpr_read_b32 v2, a24210; GFX942-NEXT: v_accvgpr_read_b32 v3, a34211; GFX942-NEXT: v_accvgpr_read_b32 v4, a44212; GFX942-NEXT: v_accvgpr_read_b32 v5, a54213; GFX942-NEXT: v_accvgpr_read_b32 v6, a64214; GFX942-NEXT: v_accvgpr_read_b32 v7, a74215; GFX942-NEXT: v_accvgpr_read_b32 v8, a84216; GFX942-NEXT: v_accvgpr_read_b32 v9, a94217; GFX942-NEXT: v_accvgpr_read_b32 v10, a104218; GFX942-NEXT: v_accvgpr_read_b32 v11, a114219; GFX942-NEXT: v_accvgpr_read_b32 v12, a124220; GFX942-NEXT: v_accvgpr_read_b32 v13, a134221; GFX942-NEXT: v_accvgpr_read_b32 v14, a144222; GFX942-NEXT: v_accvgpr_read_b32 v15, a154223; GFX942-NEXT: v_accvgpr_read_b32 v16, a164224; GFX942-NEXT: v_accvgpr_read_b32 v17, a174225; GFX942-NEXT: v_accvgpr_read_b32 v18, a184226; GFX942-NEXT: v_accvgpr_read_b32 v19, a194227; GFX942-NEXT: v_accvgpr_read_b32 v20, a204228; GFX942-NEXT: v_accvgpr_read_b32 v21, a214229; GFX942-NEXT: v_accvgpr_read_b32 v22, a224230; GFX942-NEXT: v_accvgpr_read_b32 v23, a234231; GFX942-NEXT: v_accvgpr_read_b32 v24, a244232; GFX942-NEXT: v_accvgpr_read_b32 v25, a254233; GFX942-NEXT: v_accvgpr_read_b32 v26, a264234; GFX942-NEXT: v_accvgpr_read_b32 v27, a274235; GFX942-NEXT: v_accvgpr_read_b32 v28, a284236; GFX942-NEXT: v_accvgpr_read_b32 v29, a294237; GFX942-NEXT: v_accvgpr_read_b32 v30, a304238; GFX942-NEXT: v_accvgpr_read_b32 v31, a314239; GFX942-NEXT: s_setpc_b64 s[30:31]4240entry:4241 br label %for.cond.preheader4242 4243for.cond.preheader:4244 %phi = phi <32 x float> [ <float 0.0, float 1.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0>, %entry ], [ %mai.1, %for.cond.preheader ]4245 %c = phi i32 [ 0, %entry ], [ %inc, %for.cond.preheader ]4246 %mai.1 = tail call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float 1.0, float 2.0, <32 x float> %phi, i32 0, i32 0, i32 0)4247 %inc = add nuw nsw i32 %c, 14248 %cc = icmp eq i32 %inc, 164249 br i1 %cc, label %exit, label %for.cond.preheader4250 4251exit:4252 ret <32 x float> %mai.14253}4254 4255declare <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float, float, <32 x float>, i32, i32, i32)4256declare i32 @llvm.amdgcn.workitem.id.x()4257 4258attributes #0 = { "amdgpu-flat-work-group-size"="1,256" }4259