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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefixes=GFX11,SDAG,SDAG-GFX11,SDAG-GFX11-TRUE16 %s3; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefixes=GFX11,SDAG,SDAG-GFX11,SDAG-GFX11-FAKE16 %s4; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefixes=GFX11,GISEL,GISEL-GFX11,GISEL-GFX11-TRUE16 %s5; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefixes=GFX11,GISEL,GISEL-GFX11,GISEL-GFX11-FAKE16 %s6; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1200 -mattr=+real-true16 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefixes=GFX12,SDAG,SDAG-GFX12,SDAG-GFX12-TRUE16 %s7; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1200 -mattr=-real-true16 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefixes=GFX12,SDAG,SDAG-GFX12,SDAG-GFX12-FAKE16 %s8; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1200 -mattr=+real-true16 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefixes=GFX12,GISEL,GISEL-GFX12,GISEL-GFX12-TRUE16 %s9; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1200 -mattr=-real-true16 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefixes=GFX12,GISEL,GISEL-GFX12,GISEL-GFX12-FAKE16 %s10; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1250 -mattr=+real-true16 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefixes=GFX1250,SDAG,SDAG-GFX1250,SDAG-GFX1250-TRUE16 %s11; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1250 -mattr=-real-true16 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefixes=GFX1250,SDAG,SDAG-GFX1250,SDAG-GFX1250-FAKE16 %s12; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1250 -mattr=+real-true16 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefixes=GFX1250,GISEL,GISEL-GFX1250,GISEL-GFX1250-TRUE16 %s13; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1250 -mattr=-real-true16 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefixes=GFX1250,GISEL,GISEL-GFX1250,GISEL-GFX1250-FAKE16 %s14 15define i32 @test_minmax_i32(i32 %a, i32 %b, i32 %c) {16; GFX11-LABEL: test_minmax_i32:17; GFX11: ; %bb.0:18; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)19; GFX11-NEXT: v_maxmin_i32 v0, v0, v1, v220; GFX11-NEXT: s_setpc_b64 s[30:31]21;22; GFX12-LABEL: test_minmax_i32:23; GFX12: ; %bb.0:24; GFX12-NEXT: s_wait_loadcnt_dscnt 0x025; GFX12-NEXT: s_wait_expcnt 0x026; GFX12-NEXT: s_wait_samplecnt 0x027; GFX12-NEXT: s_wait_bvhcnt 0x028; GFX12-NEXT: s_wait_kmcnt 0x029; GFX12-NEXT: v_maxmin_i32 v0, v0, v1, v230; GFX12-NEXT: s_setpc_b64 s[30:31]31;32; GFX1250-LABEL: test_minmax_i32:33; GFX1250: ; %bb.0:34; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x035; GFX1250-NEXT: s_wait_kmcnt 0x036; GFX1250-NEXT: v_maxmin_i32 v0, v0, v1, v237; GFX1250-NEXT: s_set_pc_i64 s[30:31]38 %smax = call i32 @llvm.smax.i32(i32 %a, i32 %b)39 %sminmax = call i32 @llvm.smin.i32(i32 %smax, i32 %c)40 ret i32 %sminmax41}42 43define amdgpu_ps void @s_test_minmax_i32(i32 inreg %a, i32 inreg %b, i32 inreg %c, ptr addrspace(1) inreg %out) {44; SDAG-GFX11-LABEL: s_test_minmax_i32:45; SDAG-GFX11: ; %bb.0:46; SDAG-GFX11-NEXT: s_max_i32 s0, s0, s147; SDAG-GFX11-NEXT: s_mov_b32 s5, s448; SDAG-GFX11-NEXT: s_min_i32 s0, s0, s249; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s050; SDAG-GFX11-NEXT: s_mov_b32 s4, s351; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[4:5]52; SDAG-GFX11-NEXT: s_endpgm53;54; GISEL-GFX11-LABEL: s_test_minmax_i32:55; GISEL-GFX11: ; %bb.0:56; GISEL-GFX11-NEXT: s_max_i32 s0, s0, s157; GISEL-GFX11-NEXT: s_mov_b32 s6, s358; GISEL-GFX11-NEXT: s_min_i32 s0, s0, s259; GISEL-GFX11-NEXT: s_mov_b32 s7, s460; GISEL-GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, 061; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[6:7]62; GISEL-GFX11-NEXT: s_endpgm63;64; SDAG-GFX12-LABEL: s_test_minmax_i32:65; SDAG-GFX12: ; %bb.0:66; SDAG-GFX12-NEXT: s_max_i32 s0, s0, s167; SDAG-GFX12-NEXT: s_mov_b32 s5, s468; SDAG-GFX12-NEXT: s_min_i32 s0, s0, s269; SDAG-GFX12-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s070; SDAG-GFX12-NEXT: s_mov_b32 s4, s371; SDAG-GFX12-NEXT: global_store_b32 v0, v1, s[4:5]72; SDAG-GFX12-NEXT: s_endpgm73;74; GISEL-GFX12-LABEL: s_test_minmax_i32:75; GISEL-GFX12: ; %bb.0:76; GISEL-GFX12-NEXT: s_max_i32 s0, s0, s177; GISEL-GFX12-NEXT: s_mov_b32 s6, s378; GISEL-GFX12-NEXT: s_min_i32 s0, s0, s279; GISEL-GFX12-NEXT: s_mov_b32 s7, s480; GISEL-GFX12-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, 081; GISEL-GFX12-NEXT: global_store_b32 v1, v0, s[6:7]82; GISEL-GFX12-NEXT: s_endpgm83;84; SDAG-GFX1250-LABEL: s_test_minmax_i32:85; SDAG-GFX1250: ; %bb.0:86; SDAG-GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 187; SDAG-GFX1250-NEXT: s_max_i32 s0, s0, s188; SDAG-GFX1250-NEXT: s_mov_b32 s5, s489; SDAG-GFX1250-NEXT: s_min_i32 s0, s0, s290; SDAG-GFX1250-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s091; SDAG-GFX1250-NEXT: s_mov_b32 s4, s392; SDAG-GFX1250-NEXT: global_store_b32 v0, v1, s[4:5]93; SDAG-GFX1250-NEXT: s_endpgm94;95; GISEL-GFX1250-LABEL: s_test_minmax_i32:96; GISEL-GFX1250: ; %bb.0:97; GISEL-GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 198; GISEL-GFX1250-NEXT: s_max_i32 s0, s0, s199; GISEL-GFX1250-NEXT: s_mov_b32 s6, s3100; GISEL-GFX1250-NEXT: s_min_i32 s0, s0, s2101; GISEL-GFX1250-NEXT: s_mov_b32 s7, s4102; GISEL-GFX1250-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, 0103; GISEL-GFX1250-NEXT: global_store_b32 v1, v0, s[6:7]104; GISEL-GFX1250-NEXT: s_endpgm105 %smax = call i32 @llvm.smax.i32(i32 %a, i32 %b)106 %sminmax = call i32 @llvm.smin.i32(i32 %smax, i32 %c)107 store i32 %sminmax, ptr addrspace(1) %out108 ret void109}110 111define i32 @test_minmax_commuted_i32(i32 %a, i32 %b, i32 %c) {112; GFX11-LABEL: test_minmax_commuted_i32:113; GFX11: ; %bb.0:114; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)115; GFX11-NEXT: v_maxmin_i32 v0, v0, v1, v2116; GFX11-NEXT: s_setpc_b64 s[30:31]117;118; GFX12-LABEL: test_minmax_commuted_i32:119; GFX12: ; %bb.0:120; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0121; GFX12-NEXT: s_wait_expcnt 0x0122; GFX12-NEXT: s_wait_samplecnt 0x0123; GFX12-NEXT: s_wait_bvhcnt 0x0124; GFX12-NEXT: s_wait_kmcnt 0x0125; GFX12-NEXT: v_maxmin_i32 v0, v0, v1, v2126; GFX12-NEXT: s_setpc_b64 s[30:31]127;128; GFX1250-LABEL: test_minmax_commuted_i32:129; GFX1250: ; %bb.0:130; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0131; GFX1250-NEXT: s_wait_kmcnt 0x0132; GFX1250-NEXT: v_maxmin_i32 v0, v0, v1, v2133; GFX1250-NEXT: s_set_pc_i64 s[30:31]134 %smax = call i32 @llvm.smax.i32(i32 %a, i32 %b)135 %sminmax = call i32 @llvm.smin.i32(i32 %c, i32 %smax)136 ret i32 %sminmax137}138 139define i32 @test_maxmin_i32(i32 %a, i32 %b, i32 %c) {140; GFX11-LABEL: test_maxmin_i32:141; GFX11: ; %bb.0:142; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)143; GFX11-NEXT: v_minmax_i32 v0, v0, v1, v2144; GFX11-NEXT: s_setpc_b64 s[30:31]145;146; GFX12-LABEL: test_maxmin_i32:147; GFX12: ; %bb.0:148; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0149; GFX12-NEXT: s_wait_expcnt 0x0150; GFX12-NEXT: s_wait_samplecnt 0x0151; GFX12-NEXT: s_wait_bvhcnt 0x0152; GFX12-NEXT: s_wait_kmcnt 0x0153; GFX12-NEXT: v_minmax_i32 v0, v0, v1, v2154; GFX12-NEXT: s_setpc_b64 s[30:31]155;156; GFX1250-LABEL: test_maxmin_i32:157; GFX1250: ; %bb.0:158; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0159; GFX1250-NEXT: s_wait_kmcnt 0x0160; GFX1250-NEXT: v_minmax_i32 v0, v0, v1, v2161; GFX1250-NEXT: s_set_pc_i64 s[30:31]162 %smin = call i32 @llvm.smin.i32(i32 %a, i32 %b)163 %smaxmin = call i32 @llvm.smax.i32(i32 %smin, i32 %c)164 ret i32 %smaxmin165}166 167define i32 @test_maxmin_commuted_i32(i32 %a, i32 %b, i32 %c) {168; GFX11-LABEL: test_maxmin_commuted_i32:169; GFX11: ; %bb.0:170; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)171; GFX11-NEXT: v_minmax_i32 v0, v0, v1, v2172; GFX11-NEXT: s_setpc_b64 s[30:31]173;174; GFX12-LABEL: test_maxmin_commuted_i32:175; GFX12: ; %bb.0:176; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0177; GFX12-NEXT: s_wait_expcnt 0x0178; GFX12-NEXT: s_wait_samplecnt 0x0179; GFX12-NEXT: s_wait_bvhcnt 0x0180; GFX12-NEXT: s_wait_kmcnt 0x0181; GFX12-NEXT: v_minmax_i32 v0, v0, v1, v2182; GFX12-NEXT: s_setpc_b64 s[30:31]183;184; GFX1250-LABEL: test_maxmin_commuted_i32:185; GFX1250: ; %bb.0:186; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0187; GFX1250-NEXT: s_wait_kmcnt 0x0188; GFX1250-NEXT: v_minmax_i32 v0, v0, v1, v2189; GFX1250-NEXT: s_set_pc_i64 s[30:31]190 %smin = call i32 @llvm.smin.i32(i32 %a, i32 %b)191 %smaxmin = call i32 @llvm.smax.i32(i32 %c, i32 %smin)192 ret i32 %smaxmin193}194 195define void @test_smed3_i32(ptr addrspace(1) %arg, i32 %x, i32 %y, i32 %z) {196; GFX11-LABEL: test_smed3_i32:197; GFX11: ; %bb.0:198; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)199; GFX11-NEXT: v_med3_i32 v2, v2, v3, v4200; GFX11-NEXT: global_store_b32 v[0:1], v2, off201; GFX11-NEXT: s_setpc_b64 s[30:31]202;203; GFX12-LABEL: test_smed3_i32:204; GFX12: ; %bb.0:205; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0206; GFX12-NEXT: s_wait_expcnt 0x0207; GFX12-NEXT: s_wait_samplecnt 0x0208; GFX12-NEXT: s_wait_bvhcnt 0x0209; GFX12-NEXT: s_wait_kmcnt 0x0210; GFX12-NEXT: v_med3_i32 v2, v2, v3, v4211; GFX12-NEXT: global_store_b32 v[0:1], v2, off212; GFX12-NEXT: s_setpc_b64 s[30:31]213;214; GFX1250-LABEL: test_smed3_i32:215; GFX1250: ; %bb.0:216; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0217; GFX1250-NEXT: s_wait_kmcnt 0x0218; GFX1250-NEXT: v_med3_i32 v2, v2, v3, v4219; GFX1250-NEXT: global_store_b32 v[0:1], v2, off220; GFX1250-NEXT: s_set_pc_i64 s[30:31]221 %tmp0 = call i32 @llvm.smin.i32(i32 %x, i32 %y)222 %tmp1 = call i32 @llvm.smax.i32(i32 %x, i32 %y)223 %tmp2 = call i32 @llvm.smin.i32(i32 %tmp1, i32 %z)224 %tmp3 = call i32 @llvm.smax.i32(i32 %tmp0, i32 %tmp2)225 store i32 %tmp3, ptr addrspace(1) %arg226 ret void227}228 229define i32 @test_minmax_u32(i32 %a, i32 %b, i32 %c) {230; GFX11-LABEL: test_minmax_u32:231; GFX11: ; %bb.0:232; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)233; GFX11-NEXT: v_maxmin_u32 v0, v0, v1, v2234; GFX11-NEXT: s_setpc_b64 s[30:31]235;236; GFX12-LABEL: test_minmax_u32:237; GFX12: ; %bb.0:238; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0239; GFX12-NEXT: s_wait_expcnt 0x0240; GFX12-NEXT: s_wait_samplecnt 0x0241; GFX12-NEXT: s_wait_bvhcnt 0x0242; GFX12-NEXT: s_wait_kmcnt 0x0243; GFX12-NEXT: v_maxmin_u32 v0, v0, v1, v2244; GFX12-NEXT: s_setpc_b64 s[30:31]245;246; GFX1250-LABEL: test_minmax_u32:247; GFX1250: ; %bb.0:248; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0249; GFX1250-NEXT: s_wait_kmcnt 0x0250; GFX1250-NEXT: v_maxmin_u32 v0, v0, v1, v2251; GFX1250-NEXT: s_set_pc_i64 s[30:31]252 %umax = call i32 @llvm.umax.i32(i32 %a, i32 %b)253 %uminmax = call i32 @llvm.umin.i32(i32 %umax, i32 %c)254 ret i32 %uminmax255}256 257define amdgpu_ps void @s_test_minmax_u32(i32 inreg %a, i32 inreg %b, i32 inreg %c, ptr addrspace(1) inreg %out) {258; SDAG-GFX11-LABEL: s_test_minmax_u32:259; SDAG-GFX11: ; %bb.0:260; SDAG-GFX11-NEXT: s_max_u32 s0, s0, s1261; SDAG-GFX11-NEXT: s_mov_b32 s5, s4262; SDAG-GFX11-NEXT: s_min_u32 s0, s0, s2263; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s0264; SDAG-GFX11-NEXT: s_mov_b32 s4, s3265; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[4:5]266; SDAG-GFX11-NEXT: s_endpgm267;268; GISEL-GFX11-LABEL: s_test_minmax_u32:269; GISEL-GFX11: ; %bb.0:270; GISEL-GFX11-NEXT: s_max_u32 s0, s0, s1271; GISEL-GFX11-NEXT: s_mov_b32 s6, s3272; GISEL-GFX11-NEXT: s_min_u32 s0, s0, s2273; GISEL-GFX11-NEXT: s_mov_b32 s7, s4274; GISEL-GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, 0275; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[6:7]276; GISEL-GFX11-NEXT: s_endpgm277;278; SDAG-GFX12-LABEL: s_test_minmax_u32:279; SDAG-GFX12: ; %bb.0:280; SDAG-GFX12-NEXT: s_max_u32 s0, s0, s1281; SDAG-GFX12-NEXT: s_mov_b32 s5, s4282; SDAG-GFX12-NEXT: s_min_u32 s0, s0, s2283; SDAG-GFX12-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s0284; SDAG-GFX12-NEXT: s_mov_b32 s4, s3285; SDAG-GFX12-NEXT: global_store_b32 v0, v1, s[4:5]286; SDAG-GFX12-NEXT: s_endpgm287;288; GISEL-GFX12-LABEL: s_test_minmax_u32:289; GISEL-GFX12: ; %bb.0:290; GISEL-GFX12-NEXT: s_max_u32 s0, s0, s1291; GISEL-GFX12-NEXT: s_mov_b32 s6, s3292; GISEL-GFX12-NEXT: s_min_u32 s0, s0, s2293; GISEL-GFX12-NEXT: s_mov_b32 s7, s4294; GISEL-GFX12-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, 0295; GISEL-GFX12-NEXT: global_store_b32 v1, v0, s[6:7]296; GISEL-GFX12-NEXT: s_endpgm297;298; SDAG-GFX1250-LABEL: s_test_minmax_u32:299; SDAG-GFX1250: ; %bb.0:300; SDAG-GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1301; SDAG-GFX1250-NEXT: s_max_u32 s0, s0, s1302; SDAG-GFX1250-NEXT: s_mov_b32 s5, s4303; SDAG-GFX1250-NEXT: s_min_u32 s0, s0, s2304; SDAG-GFX1250-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s0305; SDAG-GFX1250-NEXT: s_mov_b32 s4, s3306; SDAG-GFX1250-NEXT: global_store_b32 v0, v1, s[4:5]307; SDAG-GFX1250-NEXT: s_endpgm308;309; GISEL-GFX1250-LABEL: s_test_minmax_u32:310; GISEL-GFX1250: ; %bb.0:311; GISEL-GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1312; GISEL-GFX1250-NEXT: s_max_u32 s0, s0, s1313; GISEL-GFX1250-NEXT: s_mov_b32 s6, s3314; GISEL-GFX1250-NEXT: s_min_u32 s0, s0, s2315; GISEL-GFX1250-NEXT: s_mov_b32 s7, s4316; GISEL-GFX1250-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, 0317; GISEL-GFX1250-NEXT: global_store_b32 v1, v0, s[6:7]318; GISEL-GFX1250-NEXT: s_endpgm319 %smax = call i32 @llvm.umax.i32(i32 %a, i32 %b)320 %sminmax = call i32 @llvm.umin.i32(i32 %smax, i32 %c)321 store i32 %sminmax, ptr addrspace(1) %out322 ret void323}324 325define i32 @test_minmax_commuted_u32(i32 %a, i32 %b, i32 %c) {326; GFX11-LABEL: test_minmax_commuted_u32:327; GFX11: ; %bb.0:328; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)329; GFX11-NEXT: v_maxmin_u32 v0, v0, v1, v2330; GFX11-NEXT: s_setpc_b64 s[30:31]331;332; GFX12-LABEL: test_minmax_commuted_u32:333; GFX12: ; %bb.0:334; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0335; GFX12-NEXT: s_wait_expcnt 0x0336; GFX12-NEXT: s_wait_samplecnt 0x0337; GFX12-NEXT: s_wait_bvhcnt 0x0338; GFX12-NEXT: s_wait_kmcnt 0x0339; GFX12-NEXT: v_maxmin_u32 v0, v0, v1, v2340; GFX12-NEXT: s_setpc_b64 s[30:31]341;342; GFX1250-LABEL: test_minmax_commuted_u32:343; GFX1250: ; %bb.0:344; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0345; GFX1250-NEXT: s_wait_kmcnt 0x0346; GFX1250-NEXT: v_maxmin_u32 v0, v0, v1, v2347; GFX1250-NEXT: s_set_pc_i64 s[30:31]348 %umax = call i32 @llvm.umax.i32(i32 %a, i32 %b)349 %uminmax = call i32 @llvm.umin.i32(i32 %c, i32 %umax)350 ret i32 %uminmax351}352 353define i32 @test_maxmin_u32(i32 %a, i32 %b, i32 %c) {354; GFX11-LABEL: test_maxmin_u32:355; GFX11: ; %bb.0:356; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)357; GFX11-NEXT: v_minmax_u32 v0, v0, v1, v2358; GFX11-NEXT: s_setpc_b64 s[30:31]359;360; GFX12-LABEL: test_maxmin_u32:361; GFX12: ; %bb.0:362; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0363; GFX12-NEXT: s_wait_expcnt 0x0364; GFX12-NEXT: s_wait_samplecnt 0x0365; GFX12-NEXT: s_wait_bvhcnt 0x0366; GFX12-NEXT: s_wait_kmcnt 0x0367; GFX12-NEXT: v_minmax_u32 v0, v0, v1, v2368; GFX12-NEXT: s_setpc_b64 s[30:31]369;370; GFX1250-LABEL: test_maxmin_u32:371; GFX1250: ; %bb.0:372; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0373; GFX1250-NEXT: s_wait_kmcnt 0x0374; GFX1250-NEXT: v_minmax_u32 v0, v0, v1, v2375; GFX1250-NEXT: s_set_pc_i64 s[30:31]376 %umin = call i32 @llvm.umin.i32(i32 %a, i32 %b)377 %umaxmin = call i32 @llvm.umax.i32(i32 %umin, i32 %c)378 ret i32 %umaxmin379}380 381define i32 @test_maxmin_commuted_u32(i32 %a, i32 %b, i32 %c) {382; GFX11-LABEL: test_maxmin_commuted_u32:383; GFX11: ; %bb.0:384; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)385; GFX11-NEXT: v_minmax_u32 v0, v0, v1, v2386; GFX11-NEXT: s_setpc_b64 s[30:31]387;388; GFX12-LABEL: test_maxmin_commuted_u32:389; GFX12: ; %bb.0:390; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0391; GFX12-NEXT: s_wait_expcnt 0x0392; GFX12-NEXT: s_wait_samplecnt 0x0393; GFX12-NEXT: s_wait_bvhcnt 0x0394; GFX12-NEXT: s_wait_kmcnt 0x0395; GFX12-NEXT: v_minmax_u32 v0, v0, v1, v2396; GFX12-NEXT: s_setpc_b64 s[30:31]397;398; GFX1250-LABEL: test_maxmin_commuted_u32:399; GFX1250: ; %bb.0:400; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0401; GFX1250-NEXT: s_wait_kmcnt 0x0402; GFX1250-NEXT: v_minmax_u32 v0, v0, v1, v2403; GFX1250-NEXT: s_set_pc_i64 s[30:31]404 %umin = call i32 @llvm.umin.i32(i32 %a, i32 %b)405 %umaxmin = call i32 @llvm.umax.i32(i32 %c, i32 %umin)406 ret i32 %umaxmin407}408 409define void @test_umed3_i32(ptr addrspace(1) %arg, i32 %x, i32 %y, i32 %z) {410; GFX11-LABEL: test_umed3_i32:411; GFX11: ; %bb.0:412; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)413; GFX11-NEXT: v_med3_u32 v2, v2, v3, v4414; GFX11-NEXT: global_store_b32 v[0:1], v2, off415; GFX11-NEXT: s_setpc_b64 s[30:31]416;417; GFX12-LABEL: test_umed3_i32:418; GFX12: ; %bb.0:419; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0420; GFX12-NEXT: s_wait_expcnt 0x0421; GFX12-NEXT: s_wait_samplecnt 0x0422; GFX12-NEXT: s_wait_bvhcnt 0x0423; GFX12-NEXT: s_wait_kmcnt 0x0424; GFX12-NEXT: v_med3_u32 v2, v2, v3, v4425; GFX12-NEXT: global_store_b32 v[0:1], v2, off426; GFX12-NEXT: s_setpc_b64 s[30:31]427;428; GFX1250-LABEL: test_umed3_i32:429; GFX1250: ; %bb.0:430; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0431; GFX1250-NEXT: s_wait_kmcnt 0x0432; GFX1250-NEXT: v_med3_u32 v2, v2, v3, v4433; GFX1250-NEXT: global_store_b32 v[0:1], v2, off434; GFX1250-NEXT: s_set_pc_i64 s[30:31]435 %tmp0 = call i32 @llvm.umin.i32(i32 %x, i32 %y)436 %tmp1 = call i32 @llvm.umax.i32(i32 %x, i32 %y)437 %tmp2 = call i32 @llvm.umin.i32(i32 %tmp1, i32 %z)438 %tmp3 = call i32 @llvm.umax.i32(i32 %tmp0, i32 %tmp2)439 store i32 %tmp3, ptr addrspace(1) %arg440 ret void441}442 443define float @test_minmax_f32_ieee_true(float %a, float %b, float %c) {444; SDAG-GFX11-LABEL: test_minmax_f32_ieee_true:445; SDAG-GFX11: ; %bb.0:446; SDAG-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)447; SDAG-GFX11-NEXT: v_dual_max_f32 v1, v1, v1 :: v_dual_max_f32 v0, v0, v0448; SDAG-GFX11-NEXT: v_max_f32_e32 v2, v2, v2449; SDAG-GFX11-NEXT: v_maxmin_f32 v0, v0, v1, v2450; SDAG-GFX11-NEXT: s_setpc_b64 s[30:31]451;452; GISEL-GFX11-LABEL: test_minmax_f32_ieee_true:453; GISEL-GFX11: ; %bb.0:454; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)455; GISEL-GFX11-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1456; GISEL-GFX11-NEXT: v_max_f32_e32 v2, v2, v2457; GISEL-GFX11-NEXT: v_maxmin_f32 v0, v0, v1, v2458; GISEL-GFX11-NEXT: s_setpc_b64 s[30:31]459;460; SDAG-GFX12-LABEL: test_minmax_f32_ieee_true:461; SDAG-GFX12: ; %bb.0:462; SDAG-GFX12-NEXT: s_wait_loadcnt_dscnt 0x0463; SDAG-GFX12-NEXT: s_wait_expcnt 0x0464; SDAG-GFX12-NEXT: s_wait_samplecnt 0x0465; SDAG-GFX12-NEXT: s_wait_bvhcnt 0x0466; SDAG-GFX12-NEXT: s_wait_kmcnt 0x0467; SDAG-GFX12-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0468; SDAG-GFX12-NEXT: v_max_num_f32_e32 v2, v2, v2469; SDAG-GFX12-NEXT: v_maxmin_num_f32 v0, v0, v1, v2470; SDAG-GFX12-NEXT: s_setpc_b64 s[30:31]471;472; GISEL-GFX12-LABEL: test_minmax_f32_ieee_true:473; GISEL-GFX12: ; %bb.0:474; GISEL-GFX12-NEXT: s_wait_loadcnt_dscnt 0x0475; GISEL-GFX12-NEXT: s_wait_expcnt 0x0476; GISEL-GFX12-NEXT: s_wait_samplecnt 0x0477; GISEL-GFX12-NEXT: s_wait_bvhcnt 0x0478; GISEL-GFX12-NEXT: s_wait_kmcnt 0x0479; GISEL-GFX12-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1480; GISEL-GFX12-NEXT: v_max_num_f32_e32 v2, v2, v2481; GISEL-GFX12-NEXT: v_maxmin_num_f32 v0, v0, v1, v2482; GISEL-GFX12-NEXT: s_setpc_b64 s[30:31]483;484; SDAG-GFX1250-LABEL: test_minmax_f32_ieee_true:485; SDAG-GFX1250: ; %bb.0:486; SDAG-GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0487; SDAG-GFX1250-NEXT: s_wait_kmcnt 0x0488; SDAG-GFX1250-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0489; SDAG-GFX1250-NEXT: v_max_num_f32_e32 v2, v2, v2490; SDAG-GFX1250-NEXT: v_maxmin_num_f32 v0, v0, v1, v2491; SDAG-GFX1250-NEXT: s_set_pc_i64 s[30:31]492;493; GISEL-GFX1250-LABEL: test_minmax_f32_ieee_true:494; GISEL-GFX1250: ; %bb.0:495; GISEL-GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0496; GISEL-GFX1250-NEXT: s_wait_kmcnt 0x0497; GISEL-GFX1250-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1498; GISEL-GFX1250-NEXT: v_max_num_f32_e32 v2, v2, v2499; GISEL-GFX1250-NEXT: v_maxmin_num_f32 v0, v0, v1, v2500; GISEL-GFX1250-NEXT: s_set_pc_i64 s[30:31]501 %max = call float @llvm.maxnum.f32(float %a, float %b)502 %minmax = call float @llvm.minnum.f32(float %max, float %c)503 ret float %minmax504}505 506define amdgpu_ps void @s_test_minmax_f32_ieee_false(float inreg %a, float inreg %b, float inreg %c, ptr addrspace(1) inreg %out) {507; SDAG-GFX11-LABEL: s_test_minmax_f32_ieee_false:508; SDAG-GFX11: ; %bb.0:509; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, 0510; SDAG-GFX11-NEXT: s_mov_b32 s5, s4511; SDAG-GFX11-NEXT: s_mov_b32 s4, s3512; SDAG-GFX11-NEXT: v_maxmin_f32 v0, s0, s1, v0513; SDAG-GFX11-NEXT: global_store_b32 v1, v0, s[4:5]514; SDAG-GFX11-NEXT: s_endpgm515;516; GISEL-GFX11-LABEL: s_test_minmax_f32_ieee_false:517; GISEL-GFX11: ; %bb.0:518; GISEL-GFX11-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, 0519; GISEL-GFX11-NEXT: s_mov_b32 s6, s3520; GISEL-GFX11-NEXT: s_mov_b32 s7, s4521; GISEL-GFX11-NEXT: v_maxmin_f32 v0, s0, s1, v0522; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[6:7]523; GISEL-GFX11-NEXT: s_endpgm524;525; SDAG-GFX12-LABEL: s_test_minmax_f32_ieee_false:526; SDAG-GFX12: ; %bb.0:527; SDAG-GFX12-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, 0528; SDAG-GFX12-NEXT: s_mov_b32 s5, s4529; SDAG-GFX12-NEXT: s_mov_b32 s4, s3530; SDAG-GFX12-NEXT: v_maxmin_num_f32 v0, s0, s1, v0531; SDAG-GFX12-NEXT: global_store_b32 v1, v0, s[4:5]532; SDAG-GFX12-NEXT: s_endpgm533;534; GISEL-GFX12-LABEL: s_test_minmax_f32_ieee_false:535; GISEL-GFX12: ; %bb.0:536; GISEL-GFX12-NEXT: s_max_num_f32 s0, s0, s1537; GISEL-GFX12-NEXT: s_mov_b32 s6, s3538; GISEL-GFX12-NEXT: s_mov_b32 s7, s4539; GISEL-GFX12-NEXT: v_mov_b32_e32 v1, 0540; GISEL-GFX12-NEXT: s_min_num_f32 s0, s0, s2541; GISEL-GFX12-NEXT: v_mov_b32_e32 v0, s0542; GISEL-GFX12-NEXT: global_store_b32 v1, v0, s[6:7]543; GISEL-GFX12-NEXT: s_endpgm544;545; SDAG-GFX1250-LABEL: s_test_minmax_f32_ieee_false:546; SDAG-GFX1250: ; %bb.0:547; SDAG-GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1548; SDAG-GFX1250-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, 0549; SDAG-GFX1250-NEXT: s_mov_b32 s5, s4550; SDAG-GFX1250-NEXT: s_mov_b32 s4, s3551; SDAG-GFX1250-NEXT: v_maxmin_num_f32 v0, s0, s1, v0552; SDAG-GFX1250-NEXT: global_store_b32 v1, v0, s[4:5]553; SDAG-GFX1250-NEXT: s_endpgm554;555; GISEL-GFX1250-LABEL: s_test_minmax_f32_ieee_false:556; GISEL-GFX1250: ; %bb.0:557; GISEL-GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1558; GISEL-GFX1250-NEXT: s_max_num_f32 s0, s0, s1559; GISEL-GFX1250-NEXT: s_mov_b32 s6, s3560; GISEL-GFX1250-NEXT: s_mov_b32 s7, s4561; GISEL-GFX1250-NEXT: v_mov_b32_e32 v1, 0562; GISEL-GFX1250-NEXT: s_min_num_f32 s0, s0, s2563; GISEL-GFX1250-NEXT: v_mov_b32_e32 v0, s0564; GISEL-GFX1250-NEXT: global_store_b32 v1, v0, s[6:7]565; GISEL-GFX1250-NEXT: s_endpgm566 %smax = call float @llvm.maxnum.f32(float %a, float %b)567 %sminmax = call float @llvm.minnum.f32(float %smax, float %c)568 store float %sminmax, ptr addrspace(1) %out569 ret void570}571 572define amdgpu_ps float @test_minmax_commuted_f32_ieee_false(float %a, float %b, float %c) {573; GFX11-LABEL: test_minmax_commuted_f32_ieee_false:574; GFX11: ; %bb.0:575; GFX11-NEXT: v_maxmin_f32 v0, v0, v1, v2576; GFX11-NEXT: ; return to shader part epilog577;578; GFX12-LABEL: test_minmax_commuted_f32_ieee_false:579; GFX12: ; %bb.0:580; GFX12-NEXT: v_maxmin_num_f32 v0, v0, v1, v2581; GFX12-NEXT: ; return to shader part epilog582;583; GFX1250-LABEL: test_minmax_commuted_f32_ieee_false:584; GFX1250: ; %bb.0:585; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1586; GFX1250-NEXT: v_maxmin_num_f32 v0, v0, v1, v2587; GFX1250-NEXT: ; return to shader part epilog588 %max = call float @llvm.maxnum.f32(float %a, float %b)589 %minmax = call float @llvm.minnum.f32(float %c, float %max)590 ret float %minmax591}592 593define float @test_maxmin_f32_ieee_true(float %a, float %b, float %c) {594; SDAG-GFX11-LABEL: test_maxmin_f32_ieee_true:595; SDAG-GFX11: ; %bb.0:596; SDAG-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)597; SDAG-GFX11-NEXT: v_dual_max_f32 v1, v1, v1 :: v_dual_max_f32 v0, v0, v0598; SDAG-GFX11-NEXT: v_max_f32_e32 v2, v2, v2599; SDAG-GFX11-NEXT: v_minmax_f32 v0, v0, v1, v2600; SDAG-GFX11-NEXT: s_setpc_b64 s[30:31]601;602; GISEL-GFX11-LABEL: test_maxmin_f32_ieee_true:603; GISEL-GFX11: ; %bb.0:604; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)605; GISEL-GFX11-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1606; GISEL-GFX11-NEXT: v_max_f32_e32 v2, v2, v2607; GISEL-GFX11-NEXT: v_minmax_f32 v0, v0, v1, v2608; GISEL-GFX11-NEXT: s_setpc_b64 s[30:31]609;610; SDAG-GFX12-LABEL: test_maxmin_f32_ieee_true:611; SDAG-GFX12: ; %bb.0:612; SDAG-GFX12-NEXT: s_wait_loadcnt_dscnt 0x0613; SDAG-GFX12-NEXT: s_wait_expcnt 0x0614; SDAG-GFX12-NEXT: s_wait_samplecnt 0x0615; SDAG-GFX12-NEXT: s_wait_bvhcnt 0x0616; SDAG-GFX12-NEXT: s_wait_kmcnt 0x0617; SDAG-GFX12-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0618; SDAG-GFX12-NEXT: v_max_num_f32_e32 v2, v2, v2619; SDAG-GFX12-NEXT: v_minmax_num_f32 v0, v0, v1, v2620; SDAG-GFX12-NEXT: s_setpc_b64 s[30:31]621;622; GISEL-GFX12-LABEL: test_maxmin_f32_ieee_true:623; GISEL-GFX12: ; %bb.0:624; GISEL-GFX12-NEXT: s_wait_loadcnt_dscnt 0x0625; GISEL-GFX12-NEXT: s_wait_expcnt 0x0626; GISEL-GFX12-NEXT: s_wait_samplecnt 0x0627; GISEL-GFX12-NEXT: s_wait_bvhcnt 0x0628; GISEL-GFX12-NEXT: s_wait_kmcnt 0x0629; GISEL-GFX12-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1630; GISEL-GFX12-NEXT: v_max_num_f32_e32 v2, v2, v2631; GISEL-GFX12-NEXT: v_minmax_num_f32 v0, v0, v1, v2632; GISEL-GFX12-NEXT: s_setpc_b64 s[30:31]633;634; SDAG-GFX1250-LABEL: test_maxmin_f32_ieee_true:635; SDAG-GFX1250: ; %bb.0:636; SDAG-GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0637; SDAG-GFX1250-NEXT: s_wait_kmcnt 0x0638; SDAG-GFX1250-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0639; SDAG-GFX1250-NEXT: v_max_num_f32_e32 v2, v2, v2640; SDAG-GFX1250-NEXT: v_minmax_num_f32 v0, v0, v1, v2641; SDAG-GFX1250-NEXT: s_set_pc_i64 s[30:31]642;643; GISEL-GFX1250-LABEL: test_maxmin_f32_ieee_true:644; GISEL-GFX1250: ; %bb.0:645; GISEL-GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0646; GISEL-GFX1250-NEXT: s_wait_kmcnt 0x0647; GISEL-GFX1250-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1648; GISEL-GFX1250-NEXT: v_max_num_f32_e32 v2, v2, v2649; GISEL-GFX1250-NEXT: v_minmax_num_f32 v0, v0, v1, v2650; GISEL-GFX1250-NEXT: s_set_pc_i64 s[30:31]651 %min = call float @llvm.minnum.f32(float %a, float %b)652 %maxmin = call float @llvm.maxnum.f32(float %min, float %c)653 ret float %maxmin654}655 656define amdgpu_ps float @test_maxmin_commuted_f32_ieee_false(float %a, float %b, float %c) {657; GFX11-LABEL: test_maxmin_commuted_f32_ieee_false:658; GFX11: ; %bb.0:659; GFX11-NEXT: v_minmax_f32 v0, v0, v1, v2660; GFX11-NEXT: ; return to shader part epilog661;662; GFX12-LABEL: test_maxmin_commuted_f32_ieee_false:663; GFX12: ; %bb.0:664; GFX12-NEXT: v_minmax_num_f32 v0, v0, v1, v2665; GFX12-NEXT: ; return to shader part epilog666;667; GFX1250-LABEL: test_maxmin_commuted_f32_ieee_false:668; GFX1250: ; %bb.0:669; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1670; GFX1250-NEXT: v_minmax_num_f32 v0, v0, v1, v2671; GFX1250-NEXT: ; return to shader part epilog672 %min = call float @llvm.minnum.f32(float %a, float %b)673 %maxmin = call float @llvm.maxnum.f32(float %c, float %min)674 ret float %maxmin675}676 677define void @test_med3_f32(ptr addrspace(1) %arg, float %x, float %y, float %z) #0 {678; GFX11-LABEL: test_med3_f32:679; GFX11: ; %bb.0:680; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)681; GFX11-NEXT: v_med3_f32 v2, v2, v3, v4682; GFX11-NEXT: global_store_b32 v[0:1], v2, off683; GFX11-NEXT: s_setpc_b64 s[30:31]684;685; GFX12-LABEL: test_med3_f32:686; GFX12: ; %bb.0:687; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0688; GFX12-NEXT: s_wait_expcnt 0x0689; GFX12-NEXT: s_wait_samplecnt 0x0690; GFX12-NEXT: s_wait_bvhcnt 0x0691; GFX12-NEXT: s_wait_kmcnt 0x0692; GFX12-NEXT: v_med3_num_f32 v2, v2, v3, v4693; GFX12-NEXT: global_store_b32 v[0:1], v2, off694; GFX12-NEXT: s_setpc_b64 s[30:31]695;696; GFX1250-LABEL: test_med3_f32:697; GFX1250: ; %bb.0:698; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0699; GFX1250-NEXT: s_wait_kmcnt 0x0700; GFX1250-NEXT: v_med3_num_f32 v2, v2, v3, v4701; GFX1250-NEXT: global_store_b32 v[0:1], v2, off702; GFX1250-NEXT: s_set_pc_i64 s[30:31]703 %tmp0 = call nnan float @llvm.minnum.f32(float %x, float %y)704 %tmp1 = call nnan float @llvm.maxnum.f32(float %x, float %y)705 %tmp2 = call nnan float @llvm.minnum.f32(float %tmp1, float %z)706 %tmp3 = call nnan float @llvm.maxnum.f32(float %tmp0, float %tmp2)707 store float %tmp3, ptr addrspace(1) %arg708 ret void709}710 711define void @test_med3_minimumnum_maximumnum_f32(ptr addrspace(1) %arg, float %x, float %y, float %z) #0 {712; GFX11-LABEL: test_med3_minimumnum_maximumnum_f32:713; GFX11: ; %bb.0:714; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)715; GFX11-NEXT: v_med3_f32 v2, v2, v3, v4716; GFX11-NEXT: global_store_b32 v[0:1], v2, off717; GFX11-NEXT: s_setpc_b64 s[30:31]718;719; GFX12-LABEL: test_med3_minimumnum_maximumnum_f32:720; GFX12: ; %bb.0:721; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0722; GFX12-NEXT: s_wait_expcnt 0x0723; GFX12-NEXT: s_wait_samplecnt 0x0724; GFX12-NEXT: s_wait_bvhcnt 0x0725; GFX12-NEXT: s_wait_kmcnt 0x0726; GFX12-NEXT: v_med3_num_f32 v2, v2, v3, v4727; GFX12-NEXT: global_store_b32 v[0:1], v2, off728; GFX12-NEXT: s_setpc_b64 s[30:31]729;730; GFX1250-LABEL: test_med3_minimumnum_maximumnum_f32:731; GFX1250: ; %bb.0:732; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0733; GFX1250-NEXT: s_wait_kmcnt 0x0734; GFX1250-NEXT: v_med3_num_f32 v2, v2, v3, v4735; GFX1250-NEXT: global_store_b32 v[0:1], v2, off736; GFX1250-NEXT: s_set_pc_i64 s[30:31]737 %tmp0 = call nnan float @llvm.minimumnum.f32(float %x, float %y)738 %tmp1 = call nnan float @llvm.maximumnum.f32(float %x, float %y)739 %tmp2 = call nnan float @llvm.minimumnum.f32(float %tmp1, float %z)740 %tmp3 = call nnan float @llvm.maximumnum.f32(float %tmp0, float %tmp2)741 store float %tmp3, ptr addrspace(1) %arg742 ret void743}744 745define amdgpu_ps half @test_minmax_f16_ieee_false(half %a, half %b, half %c) {746; SDAG-GFX11-TRUE16-LABEL: test_minmax_f16_ieee_false:747; SDAG-GFX11-TRUE16: ; %bb.0:748; SDAG-GFX11-TRUE16-NEXT: v_maxmin_f16 v0.l, v0.l, v1.l, v2.l749; SDAG-GFX11-TRUE16-NEXT: ; return to shader part epilog750;751; SDAG-GFX11-FAKE16-LABEL: test_minmax_f16_ieee_false:752; SDAG-GFX11-FAKE16: ; %bb.0:753; SDAG-GFX11-FAKE16-NEXT: v_maxmin_f16 v0, v0, v1, v2754; SDAG-GFX11-FAKE16-NEXT: ; return to shader part epilog755;756; GISEL-GFX11-TRUE16-LABEL: test_minmax_f16_ieee_false:757; GISEL-GFX11-TRUE16: ; %bb.0:758; GISEL-GFX11-TRUE16-NEXT: v_maxmin_f16 v0.l, v0.l, v1.l, v2.l759; GISEL-GFX11-TRUE16-NEXT: ; return to shader part epilog760;761; GISEL-GFX11-FAKE16-LABEL: test_minmax_f16_ieee_false:762; GISEL-GFX11-FAKE16: ; %bb.0:763; GISEL-GFX11-FAKE16-NEXT: v_maxmin_f16 v0, v0, v1, v2764; GISEL-GFX11-FAKE16-NEXT: ; return to shader part epilog765;766; SDAG-GFX12-TRUE16-LABEL: test_minmax_f16_ieee_false:767; SDAG-GFX12-TRUE16: ; %bb.0:768; SDAG-GFX12-TRUE16-NEXT: v_maxmin_num_f16 v0.l, v0.l, v1.l, v2.l769; SDAG-GFX12-TRUE16-NEXT: ; return to shader part epilog770;771; SDAG-GFX12-FAKE16-LABEL: test_minmax_f16_ieee_false:772; SDAG-GFX12-FAKE16: ; %bb.0:773; SDAG-GFX12-FAKE16-NEXT: v_maxmin_num_f16 v0, v0, v1, v2774; SDAG-GFX12-FAKE16-NEXT: ; return to shader part epilog775;776; GISEL-GFX12-TRUE16-LABEL: test_minmax_f16_ieee_false:777; GISEL-GFX12-TRUE16: ; %bb.0:778; GISEL-GFX12-TRUE16-NEXT: v_maxmin_num_f16 v0.l, v0.l, v1.l, v2.l779; GISEL-GFX12-TRUE16-NEXT: ; return to shader part epilog780;781; GISEL-GFX12-FAKE16-LABEL: test_minmax_f16_ieee_false:782; GISEL-GFX12-FAKE16: ; %bb.0:783; GISEL-GFX12-FAKE16-NEXT: v_maxmin_num_f16 v0, v0, v1, v2784; GISEL-GFX12-FAKE16-NEXT: ; return to shader part epilog785;786; SDAG-GFX1250-TRUE16-LABEL: test_minmax_f16_ieee_false:787; SDAG-GFX1250-TRUE16: ; %bb.0:788; SDAG-GFX1250-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1789; SDAG-GFX1250-TRUE16-NEXT: v_maxmin_num_f16 v0.l, v0.l, v1.l, v2.l790; SDAG-GFX1250-TRUE16-NEXT: ; return to shader part epilog791;792; SDAG-GFX1250-FAKE16-LABEL: test_minmax_f16_ieee_false:793; SDAG-GFX1250-FAKE16: ; %bb.0:794; SDAG-GFX1250-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1795; SDAG-GFX1250-FAKE16-NEXT: v_maxmin_num_f16 v0, v0, v1, v2796; SDAG-GFX1250-FAKE16-NEXT: ; return to shader part epilog797;798; GISEL-GFX1250-TRUE16-LABEL: test_minmax_f16_ieee_false:799; GISEL-GFX1250-TRUE16: ; %bb.0:800; GISEL-GFX1250-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1801; GISEL-GFX1250-TRUE16-NEXT: v_maxmin_num_f16 v0.l, v0.l, v1.l, v2.l802; GISEL-GFX1250-TRUE16-NEXT: ; return to shader part epilog803;804; GISEL-GFX1250-FAKE16-LABEL: test_minmax_f16_ieee_false:805; GISEL-GFX1250-FAKE16: ; %bb.0:806; GISEL-GFX1250-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1807; GISEL-GFX1250-FAKE16-NEXT: v_maxmin_num_f16 v0, v0, v1, v2808; GISEL-GFX1250-FAKE16-NEXT: ; return to shader part epilog809 %max = call half @llvm.maxnum.f16(half %a, half %b)810 %minmax = call half @llvm.minnum.f16(half %max, half %c)811 ret half %minmax812}813 814define amdgpu_ps void @s_test_minmax_f16_ieee_false(half inreg %a, half inreg %b, half inreg %c, ptr addrspace(1) inreg %out) {815; SDAG-GFX11-TRUE16-LABEL: s_test_minmax_f16_ieee_false:816; SDAG-GFX11-TRUE16: ; %bb.0:817; SDAG-GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2818; SDAG-GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0819; SDAG-GFX11-TRUE16-NEXT: s_mov_b32 s5, s4820; SDAG-GFX11-TRUE16-NEXT: s_mov_b32 s4, s3821; SDAG-GFX11-TRUE16-NEXT: v_maxmin_f16 v0.l, s0, s1, v0.l822; SDAG-GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[4:5]823; SDAG-GFX11-TRUE16-NEXT: s_endpgm824;825; SDAG-GFX11-FAKE16-LABEL: s_test_minmax_f16_ieee_false:826; SDAG-GFX11-FAKE16: ; %bb.0:827; SDAG-GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, 0828; SDAG-GFX11-FAKE16-NEXT: s_mov_b32 s5, s4829; SDAG-GFX11-FAKE16-NEXT: s_mov_b32 s4, s3830; SDAG-GFX11-FAKE16-NEXT: v_maxmin_f16 v0, s0, s1, v0831; SDAG-GFX11-FAKE16-NEXT: global_store_b16 v1, v0, s[4:5]832; SDAG-GFX11-FAKE16-NEXT: s_endpgm833;834; GISEL-GFX11-TRUE16-LABEL: s_test_minmax_f16_ieee_false:835; GISEL-GFX11-TRUE16: ; %bb.0:836; GISEL-GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2837; GISEL-GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0838; GISEL-GFX11-TRUE16-NEXT: s_mov_b32 s6, s3839; GISEL-GFX11-TRUE16-NEXT: s_mov_b32 s7, s4840; GISEL-GFX11-TRUE16-NEXT: v_maxmin_f16 v0.l, s0, s1, v0.l841; GISEL-GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[6:7]842; GISEL-GFX11-TRUE16-NEXT: s_endpgm843;844; GISEL-GFX11-FAKE16-LABEL: s_test_minmax_f16_ieee_false:845; GISEL-GFX11-FAKE16: ; %bb.0:846; GISEL-GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, 0847; GISEL-GFX11-FAKE16-NEXT: s_mov_b32 s6, s3848; GISEL-GFX11-FAKE16-NEXT: s_mov_b32 s7, s4849; GISEL-GFX11-FAKE16-NEXT: v_maxmin_f16 v0, s0, s1, v0850; GISEL-GFX11-FAKE16-NEXT: global_store_b16 v1, v0, s[6:7]851; GISEL-GFX11-FAKE16-NEXT: s_endpgm852;853; SDAG-GFX12-TRUE16-LABEL: s_test_minmax_f16_ieee_false:854; SDAG-GFX12-TRUE16: ; %bb.0:855; SDAG-GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2856; SDAG-GFX12-TRUE16-NEXT: v_mov_b32_e32 v1, 0857; SDAG-GFX12-TRUE16-NEXT: s_mov_b32 s5, s4858; SDAG-GFX12-TRUE16-NEXT: s_mov_b32 s4, s3859; SDAG-GFX12-TRUE16-NEXT: v_maxmin_num_f16 v0.l, s0, s1, v0.l860; SDAG-GFX12-TRUE16-NEXT: global_store_b16 v1, v0, s[4:5]861; SDAG-GFX12-TRUE16-NEXT: s_endpgm862;863; SDAG-GFX12-FAKE16-LABEL: s_test_minmax_f16_ieee_false:864; SDAG-GFX12-FAKE16: ; %bb.0:865; SDAG-GFX12-FAKE16-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, 0866; SDAG-GFX12-FAKE16-NEXT: s_mov_b32 s5, s4867; SDAG-GFX12-FAKE16-NEXT: s_mov_b32 s4, s3868; SDAG-GFX12-FAKE16-NEXT: v_maxmin_num_f16 v0, s0, s1, v0869; SDAG-GFX12-FAKE16-NEXT: global_store_b16 v1, v0, s[4:5]870; SDAG-GFX12-FAKE16-NEXT: s_endpgm871;872; GISEL-GFX12-TRUE16-LABEL: s_test_minmax_f16_ieee_false:873; GISEL-GFX12-TRUE16: ; %bb.0:874; GISEL-GFX12-TRUE16-NEXT: s_max_num_f16 s0, s0, s1875; GISEL-GFX12-TRUE16-NEXT: v_mov_b32_e32 v1, 0876; GISEL-GFX12-TRUE16-NEXT: s_mov_b32 s6, s3877; GISEL-GFX12-TRUE16-NEXT: s_mov_b32 s7, s4878; GISEL-GFX12-TRUE16-NEXT: s_min_num_f16 s0, s0, s2879; GISEL-GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0880; GISEL-GFX12-TRUE16-NEXT: global_store_b16 v1, v0, s[6:7]881; GISEL-GFX12-TRUE16-NEXT: s_endpgm882;883; GISEL-GFX12-FAKE16-LABEL: s_test_minmax_f16_ieee_false:884; GISEL-GFX12-FAKE16: ; %bb.0:885; GISEL-GFX12-FAKE16-NEXT: s_max_num_f16 s0, s0, s1886; GISEL-GFX12-FAKE16-NEXT: s_mov_b32 s6, s3887; GISEL-GFX12-FAKE16-NEXT: s_mov_b32 s7, s4888; GISEL-GFX12-FAKE16-NEXT: v_mov_b32_e32 v1, 0889; GISEL-GFX12-FAKE16-NEXT: s_min_num_f16 s0, s0, s2890; GISEL-GFX12-FAKE16-NEXT: v_mov_b32_e32 v0, s0891; GISEL-GFX12-FAKE16-NEXT: global_store_b16 v1, v0, s[6:7]892; GISEL-GFX12-FAKE16-NEXT: s_endpgm893;894; SDAG-GFX1250-TRUE16-LABEL: s_test_minmax_f16_ieee_false:895; SDAG-GFX1250-TRUE16: ; %bb.0:896; SDAG-GFX1250-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1897; SDAG-GFX1250-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2898; SDAG-GFX1250-TRUE16-NEXT: v_mov_b32_e32 v1, 0899; SDAG-GFX1250-TRUE16-NEXT: s_mov_b32 s5, s4900; SDAG-GFX1250-TRUE16-NEXT: s_mov_b32 s4, s3901; SDAG-GFX1250-TRUE16-NEXT: v_maxmin_num_f16 v0.l, s0, s1, v0.l902; SDAG-GFX1250-TRUE16-NEXT: global_store_b16 v1, v0, s[4:5]903; SDAG-GFX1250-TRUE16-NEXT: s_endpgm904;905; SDAG-GFX1250-FAKE16-LABEL: s_test_minmax_f16_ieee_false:906; SDAG-GFX1250-FAKE16: ; %bb.0:907; SDAG-GFX1250-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1908; SDAG-GFX1250-FAKE16-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, 0909; SDAG-GFX1250-FAKE16-NEXT: s_mov_b32 s5, s4910; SDAG-GFX1250-FAKE16-NEXT: s_mov_b32 s4, s3911; SDAG-GFX1250-FAKE16-NEXT: v_maxmin_num_f16 v0, s0, s1, v0912; SDAG-GFX1250-FAKE16-NEXT: global_store_b16 v1, v0, s[4:5]913; SDAG-GFX1250-FAKE16-NEXT: s_endpgm914;915; GISEL-GFX1250-TRUE16-LABEL: s_test_minmax_f16_ieee_false:916; GISEL-GFX1250-TRUE16: ; %bb.0:917; GISEL-GFX1250-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1918; GISEL-GFX1250-TRUE16-NEXT: s_max_num_f16 s0, s0, s1919; GISEL-GFX1250-TRUE16-NEXT: v_mov_b32_e32 v1, 0920; GISEL-GFX1250-TRUE16-NEXT: s_mov_b32 s6, s3921; GISEL-GFX1250-TRUE16-NEXT: s_mov_b32 s7, s4922; GISEL-GFX1250-TRUE16-NEXT: s_min_num_f16 s0, s0, s2923; GISEL-GFX1250-TRUE16-NEXT: v_mov_b16_e32 v0.l, s0924; GISEL-GFX1250-TRUE16-NEXT: global_store_b16 v1, v0, s[6:7]925; GISEL-GFX1250-TRUE16-NEXT: s_endpgm926;927; GISEL-GFX1250-FAKE16-LABEL: s_test_minmax_f16_ieee_false:928; GISEL-GFX1250-FAKE16: ; %bb.0:929; GISEL-GFX1250-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1930; GISEL-GFX1250-FAKE16-NEXT: s_max_num_f16 s0, s0, s1931; GISEL-GFX1250-FAKE16-NEXT: s_mov_b32 s6, s3932; GISEL-GFX1250-FAKE16-NEXT: s_mov_b32 s7, s4933; GISEL-GFX1250-FAKE16-NEXT: v_mov_b32_e32 v1, 0934; GISEL-GFX1250-FAKE16-NEXT: s_min_num_f16 s0, s0, s2935; GISEL-GFX1250-FAKE16-NEXT: v_mov_b32_e32 v0, s0936; GISEL-GFX1250-FAKE16-NEXT: global_store_b16 v1, v0, s[6:7]937; GISEL-GFX1250-FAKE16-NEXT: s_endpgm938 %smax = call half @llvm.maxnum.f16(half %a, half %b)939 %sminmax = call half @llvm.minnum.f16(half %smax, half %c)940 store half %sminmax, ptr addrspace(1) %out941 ret void942}943 944define half @test_minmax_commuted_f16_ieee_true(half %a, half %b, half %c) {945; SDAG-GFX11-TRUE16-LABEL: test_minmax_commuted_f16_ieee_true:946; SDAG-GFX11-TRUE16: ; %bb.0:947; SDAG-GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)948; SDAG-GFX11-TRUE16-NEXT: v_max_f16_e32 v0.h, v1.l, v1.l949; SDAG-GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l950; SDAG-GFX11-TRUE16-NEXT: v_max_f16_e32 v1.l, v2.l, v2.l951; SDAG-GFX11-TRUE16-NEXT: v_maxmin_f16 v0.l, v0.l, v0.h, v1.l952; SDAG-GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]953;954; SDAG-GFX11-FAKE16-LABEL: test_minmax_commuted_f16_ieee_true:955; SDAG-GFX11-FAKE16: ; %bb.0:956; SDAG-GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)957; SDAG-GFX11-FAKE16-NEXT: v_max_f16_e32 v1, v1, v1958; SDAG-GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v0959; SDAG-GFX11-FAKE16-NEXT: v_max_f16_e32 v2, v2, v2960; SDAG-GFX11-FAKE16-NEXT: v_maxmin_f16 v0, v0, v1, v2961; SDAG-GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]962;963; GISEL-GFX11-TRUE16-LABEL: test_minmax_commuted_f16_ieee_true:964; GISEL-GFX11-TRUE16: ; %bb.0:965; GISEL-GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)966; GISEL-GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l967; GISEL-GFX11-TRUE16-NEXT: v_max_f16_e32 v0.h, v1.l, v1.l968; GISEL-GFX11-TRUE16-NEXT: v_max_f16_e32 v1.l, v2.l, v2.l969; GISEL-GFX11-TRUE16-NEXT: v_maxmin_f16 v0.l, v0.l, v0.h, v1.l970; GISEL-GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]971;972; GISEL-GFX11-FAKE16-LABEL: test_minmax_commuted_f16_ieee_true:973; GISEL-GFX11-FAKE16: ; %bb.0:974; GISEL-GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)975; GISEL-GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v0976; GISEL-GFX11-FAKE16-NEXT: v_max_f16_e32 v1, v1, v1977; GISEL-GFX11-FAKE16-NEXT: v_max_f16_e32 v2, v2, v2978; GISEL-GFX11-FAKE16-NEXT: v_maxmin_f16 v0, v0, v1, v2979; GISEL-GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]980;981; SDAG-GFX12-TRUE16-LABEL: test_minmax_commuted_f16_ieee_true:982; SDAG-GFX12-TRUE16: ; %bb.0:983; SDAG-GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0984; SDAG-GFX12-TRUE16-NEXT: s_wait_expcnt 0x0985; SDAG-GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0986; SDAG-GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0987; SDAG-GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0988; SDAG-GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l989; SDAG-GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l990; SDAG-GFX12-TRUE16-NEXT: v_max_num_f16_e32 v1.l, v2.l, v2.l991; SDAG-GFX12-TRUE16-NEXT: v_maxmin_num_f16 v0.l, v0.l, v0.h, v1.l992; SDAG-GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]993;994; SDAG-GFX12-FAKE16-LABEL: test_minmax_commuted_f16_ieee_true:995; SDAG-GFX12-FAKE16: ; %bb.0:996; SDAG-GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0997; SDAG-GFX12-FAKE16-NEXT: s_wait_expcnt 0x0998; SDAG-GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0999; SDAG-GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x01000; SDAG-GFX12-FAKE16-NEXT: s_wait_kmcnt 0x01001; SDAG-GFX12-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v11002; SDAG-GFX12-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v01003; SDAG-GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v21004; SDAG-GFX12-FAKE16-NEXT: v_maxmin_num_f16 v0, v0, v1, v21005; SDAG-GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]1006;1007; GISEL-GFX12-TRUE16-LABEL: test_minmax_commuted_f16_ieee_true:1008; GISEL-GFX12-TRUE16: ; %bb.0:1009; GISEL-GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01010; GISEL-GFX12-TRUE16-NEXT: s_wait_expcnt 0x01011; GISEL-GFX12-TRUE16-NEXT: s_wait_samplecnt 0x01012; GISEL-GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x01013; GISEL-GFX12-TRUE16-NEXT: s_wait_kmcnt 0x01014; GISEL-GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l1015; GISEL-GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l1016; GISEL-GFX12-TRUE16-NEXT: v_max_num_f16_e32 v1.l, v2.l, v2.l1017; GISEL-GFX12-TRUE16-NEXT: v_maxmin_num_f16 v0.l, v0.l, v0.h, v1.l1018; GISEL-GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]1019;1020; GISEL-GFX12-FAKE16-LABEL: test_minmax_commuted_f16_ieee_true:1021; GISEL-GFX12-FAKE16: ; %bb.0:1022; GISEL-GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01023; GISEL-GFX12-FAKE16-NEXT: s_wait_expcnt 0x01024; GISEL-GFX12-FAKE16-NEXT: s_wait_samplecnt 0x01025; GISEL-GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x01026; GISEL-GFX12-FAKE16-NEXT: s_wait_kmcnt 0x01027; GISEL-GFX12-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v01028; GISEL-GFX12-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v11029; GISEL-GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v21030; GISEL-GFX12-FAKE16-NEXT: v_maxmin_num_f16 v0, v0, v1, v21031; GISEL-GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]1032;1033; SDAG-GFX1250-TRUE16-LABEL: test_minmax_commuted_f16_ieee_true:1034; SDAG-GFX1250-TRUE16: ; %bb.0:1035; SDAG-GFX1250-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01036; SDAG-GFX1250-TRUE16-NEXT: s_wait_kmcnt 0x01037; SDAG-GFX1250-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l1038; SDAG-GFX1250-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l1039; SDAG-GFX1250-TRUE16-NEXT: v_max_num_f16_e32 v1.l, v2.l, v2.l1040; SDAG-GFX1250-TRUE16-NEXT: v_maxmin_num_f16 v0.l, v0.l, v0.h, v1.l1041; SDAG-GFX1250-TRUE16-NEXT: s_set_pc_i64 s[30:31]1042;1043; SDAG-GFX1250-FAKE16-LABEL: test_minmax_commuted_f16_ieee_true:1044; SDAG-GFX1250-FAKE16: ; %bb.0:1045; SDAG-GFX1250-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01046; SDAG-GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x01047; SDAG-GFX1250-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v11048; SDAG-GFX1250-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v01049; SDAG-GFX1250-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v21050; SDAG-GFX1250-FAKE16-NEXT: v_maxmin_num_f16 v0, v0, v1, v21051; SDAG-GFX1250-FAKE16-NEXT: s_set_pc_i64 s[30:31]1052;1053; GISEL-GFX1250-TRUE16-LABEL: test_minmax_commuted_f16_ieee_true:1054; GISEL-GFX1250-TRUE16: ; %bb.0:1055; GISEL-GFX1250-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01056; GISEL-GFX1250-TRUE16-NEXT: s_wait_kmcnt 0x01057; GISEL-GFX1250-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l1058; GISEL-GFX1250-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l1059; GISEL-GFX1250-TRUE16-NEXT: v_max_num_f16_e32 v1.l, v2.l, v2.l1060; GISEL-GFX1250-TRUE16-NEXT: v_maxmin_num_f16 v0.l, v0.l, v0.h, v1.l1061; GISEL-GFX1250-TRUE16-NEXT: s_set_pc_i64 s[30:31]1062;1063; GISEL-GFX1250-FAKE16-LABEL: test_minmax_commuted_f16_ieee_true:1064; GISEL-GFX1250-FAKE16: ; %bb.0:1065; GISEL-GFX1250-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01066; GISEL-GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x01067; GISEL-GFX1250-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v01068; GISEL-GFX1250-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v11069; GISEL-GFX1250-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v21070; GISEL-GFX1250-FAKE16-NEXT: v_maxmin_num_f16 v0, v0, v1, v21071; GISEL-GFX1250-FAKE16-NEXT: s_set_pc_i64 s[30:31]1072 %max = call half @llvm.maxnum.f16(half %a, half %b)1073 %minmax = call half @llvm.minnum.f16(half %c, half %max)1074 ret half %minmax1075}1076 1077define amdgpu_ps half @test_maxmin_f16_ieee_false(half %a, half %b, half %c) {1078; SDAG-GFX11-TRUE16-LABEL: test_maxmin_f16_ieee_false:1079; SDAG-GFX11-TRUE16: ; %bb.0:1080; SDAG-GFX11-TRUE16-NEXT: v_minmax_f16 v0.l, v0.l, v1.l, v2.l1081; SDAG-GFX11-TRUE16-NEXT: ; return to shader part epilog1082;1083; SDAG-GFX11-FAKE16-LABEL: test_maxmin_f16_ieee_false:1084; SDAG-GFX11-FAKE16: ; %bb.0:1085; SDAG-GFX11-FAKE16-NEXT: v_minmax_f16 v0, v0, v1, v21086; SDAG-GFX11-FAKE16-NEXT: ; return to shader part epilog1087;1088; GISEL-GFX11-TRUE16-LABEL: test_maxmin_f16_ieee_false:1089; GISEL-GFX11-TRUE16: ; %bb.0:1090; GISEL-GFX11-TRUE16-NEXT: v_minmax_f16 v0.l, v0.l, v1.l, v2.l1091; GISEL-GFX11-TRUE16-NEXT: ; return to shader part epilog1092;1093; GISEL-GFX11-FAKE16-LABEL: test_maxmin_f16_ieee_false:1094; GISEL-GFX11-FAKE16: ; %bb.0:1095; GISEL-GFX11-FAKE16-NEXT: v_minmax_f16 v0, v0, v1, v21096; GISEL-GFX11-FAKE16-NEXT: ; return to shader part epilog1097;1098; SDAG-GFX12-TRUE16-LABEL: test_maxmin_f16_ieee_false:1099; SDAG-GFX12-TRUE16: ; %bb.0:1100; SDAG-GFX12-TRUE16-NEXT: v_minmax_num_f16 v0.l, v0.l, v1.l, v2.l1101; SDAG-GFX12-TRUE16-NEXT: ; return to shader part epilog1102;1103; SDAG-GFX12-FAKE16-LABEL: test_maxmin_f16_ieee_false:1104; SDAG-GFX12-FAKE16: ; %bb.0:1105; SDAG-GFX12-FAKE16-NEXT: v_minmax_num_f16 v0, v0, v1, v21106; SDAG-GFX12-FAKE16-NEXT: ; return to shader part epilog1107;1108; GISEL-GFX12-TRUE16-LABEL: test_maxmin_f16_ieee_false:1109; GISEL-GFX12-TRUE16: ; %bb.0:1110; GISEL-GFX12-TRUE16-NEXT: v_minmax_num_f16 v0.l, v0.l, v1.l, v2.l1111; GISEL-GFX12-TRUE16-NEXT: ; return to shader part epilog1112;1113; GISEL-GFX12-FAKE16-LABEL: test_maxmin_f16_ieee_false:1114; GISEL-GFX12-FAKE16: ; %bb.0:1115; GISEL-GFX12-FAKE16-NEXT: v_minmax_num_f16 v0, v0, v1, v21116; GISEL-GFX12-FAKE16-NEXT: ; return to shader part epilog1117;1118; SDAG-GFX1250-TRUE16-LABEL: test_maxmin_f16_ieee_false:1119; SDAG-GFX1250-TRUE16: ; %bb.0:1120; SDAG-GFX1250-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11121; SDAG-GFX1250-TRUE16-NEXT: v_minmax_num_f16 v0.l, v0.l, v1.l, v2.l1122; SDAG-GFX1250-TRUE16-NEXT: ; return to shader part epilog1123;1124; SDAG-GFX1250-FAKE16-LABEL: test_maxmin_f16_ieee_false:1125; SDAG-GFX1250-FAKE16: ; %bb.0:1126; SDAG-GFX1250-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11127; SDAG-GFX1250-FAKE16-NEXT: v_minmax_num_f16 v0, v0, v1, v21128; SDAG-GFX1250-FAKE16-NEXT: ; return to shader part epilog1129;1130; GISEL-GFX1250-TRUE16-LABEL: test_maxmin_f16_ieee_false:1131; GISEL-GFX1250-TRUE16: ; %bb.0:1132; GISEL-GFX1250-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11133; GISEL-GFX1250-TRUE16-NEXT: v_minmax_num_f16 v0.l, v0.l, v1.l, v2.l1134; GISEL-GFX1250-TRUE16-NEXT: ; return to shader part epilog1135;1136; GISEL-GFX1250-FAKE16-LABEL: test_maxmin_f16_ieee_false:1137; GISEL-GFX1250-FAKE16: ; %bb.0:1138; GISEL-GFX1250-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11139; GISEL-GFX1250-FAKE16-NEXT: v_minmax_num_f16 v0, v0, v1, v21140; GISEL-GFX1250-FAKE16-NEXT: ; return to shader part epilog1141 %min = call half @llvm.minnum.f16(half %a, half %b)1142 %maxmin = call half @llvm.maxnum.f16(half %min, half %c)1143 ret half %maxmin1144}1145 1146define half @test_maxmin_commuted_f16_ieee_true(half %a, half %b, half %c) {1147; SDAG-GFX11-TRUE16-LABEL: test_maxmin_commuted_f16_ieee_true:1148; SDAG-GFX11-TRUE16: ; %bb.0:1149; SDAG-GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1150; SDAG-GFX11-TRUE16-NEXT: v_max_f16_e32 v0.h, v1.l, v1.l1151; SDAG-GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l1152; SDAG-GFX11-TRUE16-NEXT: v_max_f16_e32 v1.l, v2.l, v2.l1153; SDAG-GFX11-TRUE16-NEXT: v_minmax_f16 v0.l, v0.l, v0.h, v1.l1154; SDAG-GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]1155;1156; SDAG-GFX11-FAKE16-LABEL: test_maxmin_commuted_f16_ieee_true:1157; SDAG-GFX11-FAKE16: ; %bb.0:1158; SDAG-GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1159; SDAG-GFX11-FAKE16-NEXT: v_max_f16_e32 v1, v1, v11160; SDAG-GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v01161; SDAG-GFX11-FAKE16-NEXT: v_max_f16_e32 v2, v2, v21162; SDAG-GFX11-FAKE16-NEXT: v_minmax_f16 v0, v0, v1, v21163; SDAG-GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]1164;1165; GISEL-GFX11-TRUE16-LABEL: test_maxmin_commuted_f16_ieee_true:1166; GISEL-GFX11-TRUE16: ; %bb.0:1167; GISEL-GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1168; GISEL-GFX11-TRUE16-NEXT: v_max_f16_e32 v0.l, v0.l, v0.l1169; GISEL-GFX11-TRUE16-NEXT: v_max_f16_e32 v0.h, v1.l, v1.l1170; GISEL-GFX11-TRUE16-NEXT: v_max_f16_e32 v1.l, v2.l, v2.l1171; GISEL-GFX11-TRUE16-NEXT: v_minmax_f16 v0.l, v0.l, v0.h, v1.l1172; GISEL-GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]1173;1174; GISEL-GFX11-FAKE16-LABEL: test_maxmin_commuted_f16_ieee_true:1175; GISEL-GFX11-FAKE16: ; %bb.0:1176; GISEL-GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1177; GISEL-GFX11-FAKE16-NEXT: v_max_f16_e32 v0, v0, v01178; GISEL-GFX11-FAKE16-NEXT: v_max_f16_e32 v1, v1, v11179; GISEL-GFX11-FAKE16-NEXT: v_max_f16_e32 v2, v2, v21180; GISEL-GFX11-FAKE16-NEXT: v_minmax_f16 v0, v0, v1, v21181; GISEL-GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]1182;1183; SDAG-GFX12-TRUE16-LABEL: test_maxmin_commuted_f16_ieee_true:1184; SDAG-GFX12-TRUE16: ; %bb.0:1185; SDAG-GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01186; SDAG-GFX12-TRUE16-NEXT: s_wait_expcnt 0x01187; SDAG-GFX12-TRUE16-NEXT: s_wait_samplecnt 0x01188; SDAG-GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x01189; SDAG-GFX12-TRUE16-NEXT: s_wait_kmcnt 0x01190; SDAG-GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l1191; SDAG-GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l1192; SDAG-GFX12-TRUE16-NEXT: v_max_num_f16_e32 v1.l, v2.l, v2.l1193; SDAG-GFX12-TRUE16-NEXT: v_minmax_num_f16 v0.l, v0.l, v0.h, v1.l1194; SDAG-GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]1195;1196; SDAG-GFX12-FAKE16-LABEL: test_maxmin_commuted_f16_ieee_true:1197; SDAG-GFX12-FAKE16: ; %bb.0:1198; SDAG-GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01199; SDAG-GFX12-FAKE16-NEXT: s_wait_expcnt 0x01200; SDAG-GFX12-FAKE16-NEXT: s_wait_samplecnt 0x01201; SDAG-GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x01202; SDAG-GFX12-FAKE16-NEXT: s_wait_kmcnt 0x01203; SDAG-GFX12-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v11204; SDAG-GFX12-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v01205; SDAG-GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v21206; SDAG-GFX12-FAKE16-NEXT: v_minmax_num_f16 v0, v0, v1, v21207; SDAG-GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]1208;1209; GISEL-GFX12-TRUE16-LABEL: test_maxmin_commuted_f16_ieee_true:1210; GISEL-GFX12-TRUE16: ; %bb.0:1211; GISEL-GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01212; GISEL-GFX12-TRUE16-NEXT: s_wait_expcnt 0x01213; GISEL-GFX12-TRUE16-NEXT: s_wait_samplecnt 0x01214; GISEL-GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x01215; GISEL-GFX12-TRUE16-NEXT: s_wait_kmcnt 0x01216; GISEL-GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l1217; GISEL-GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l1218; GISEL-GFX12-TRUE16-NEXT: v_max_num_f16_e32 v1.l, v2.l, v2.l1219; GISEL-GFX12-TRUE16-NEXT: v_minmax_num_f16 v0.l, v0.l, v0.h, v1.l1220; GISEL-GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]1221;1222; GISEL-GFX12-FAKE16-LABEL: test_maxmin_commuted_f16_ieee_true:1223; GISEL-GFX12-FAKE16: ; %bb.0:1224; GISEL-GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01225; GISEL-GFX12-FAKE16-NEXT: s_wait_expcnt 0x01226; GISEL-GFX12-FAKE16-NEXT: s_wait_samplecnt 0x01227; GISEL-GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x01228; GISEL-GFX12-FAKE16-NEXT: s_wait_kmcnt 0x01229; GISEL-GFX12-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v01230; GISEL-GFX12-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v11231; GISEL-GFX12-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v21232; GISEL-GFX12-FAKE16-NEXT: v_minmax_num_f16 v0, v0, v1, v21233; GISEL-GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]1234;1235; SDAG-GFX1250-TRUE16-LABEL: test_maxmin_commuted_f16_ieee_true:1236; SDAG-GFX1250-TRUE16: ; %bb.0:1237; SDAG-GFX1250-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01238; SDAG-GFX1250-TRUE16-NEXT: s_wait_kmcnt 0x01239; SDAG-GFX1250-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l1240; SDAG-GFX1250-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l1241; SDAG-GFX1250-TRUE16-NEXT: v_max_num_f16_e32 v1.l, v2.l, v2.l1242; SDAG-GFX1250-TRUE16-NEXT: v_minmax_num_f16 v0.l, v0.l, v0.h, v1.l1243; SDAG-GFX1250-TRUE16-NEXT: s_set_pc_i64 s[30:31]1244;1245; SDAG-GFX1250-FAKE16-LABEL: test_maxmin_commuted_f16_ieee_true:1246; SDAG-GFX1250-FAKE16: ; %bb.0:1247; SDAG-GFX1250-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01248; SDAG-GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x01249; SDAG-GFX1250-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v11250; SDAG-GFX1250-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v01251; SDAG-GFX1250-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v21252; SDAG-GFX1250-FAKE16-NEXT: v_minmax_num_f16 v0, v0, v1, v21253; SDAG-GFX1250-FAKE16-NEXT: s_set_pc_i64 s[30:31]1254;1255; GISEL-GFX1250-TRUE16-LABEL: test_maxmin_commuted_f16_ieee_true:1256; GISEL-GFX1250-TRUE16: ; %bb.0:1257; GISEL-GFX1250-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01258; GISEL-GFX1250-TRUE16-NEXT: s_wait_kmcnt 0x01259; GISEL-GFX1250-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l1260; GISEL-GFX1250-TRUE16-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l1261; GISEL-GFX1250-TRUE16-NEXT: v_max_num_f16_e32 v1.l, v2.l, v2.l1262; GISEL-GFX1250-TRUE16-NEXT: v_minmax_num_f16 v0.l, v0.l, v0.h, v1.l1263; GISEL-GFX1250-TRUE16-NEXT: s_set_pc_i64 s[30:31]1264;1265; GISEL-GFX1250-FAKE16-LABEL: test_maxmin_commuted_f16_ieee_true:1266; GISEL-GFX1250-FAKE16: ; %bb.0:1267; GISEL-GFX1250-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01268; GISEL-GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x01269; GISEL-GFX1250-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v01270; GISEL-GFX1250-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v11271; GISEL-GFX1250-FAKE16-NEXT: v_max_num_f16_e32 v2, v2, v21272; GISEL-GFX1250-FAKE16-NEXT: v_minmax_num_f16 v0, v0, v1, v21273; GISEL-GFX1250-FAKE16-NEXT: s_set_pc_i64 s[30:31]1274 %min = call half @llvm.minnum.f16(half %a, half %b)1275 %maxmin = call half @llvm.maxnum.f16(half %c, half %min)1276 ret half %maxmin1277}1278 1279define void @test_med3_f16(ptr addrspace(1) %arg, half %x, half %y, half %z) #0 {1280; SDAG-GFX11-TRUE16-LABEL: test_med3_f16:1281; SDAG-GFX11-TRUE16: ; %bb.0:1282; SDAG-GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1283; SDAG-GFX11-TRUE16-NEXT: v_med3_f16 v2.l, v2.l, v3.l, v4.l1284; SDAG-GFX11-TRUE16-NEXT: global_store_b16 v[0:1], v2, off1285; SDAG-GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]1286;1287; SDAG-GFX11-FAKE16-LABEL: test_med3_f16:1288; SDAG-GFX11-FAKE16: ; %bb.0:1289; SDAG-GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1290; SDAG-GFX11-FAKE16-NEXT: v_med3_f16 v2, v2, v3, v41291; SDAG-GFX11-FAKE16-NEXT: global_store_b16 v[0:1], v2, off1292; SDAG-GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]1293;1294; GISEL-GFX11-TRUE16-LABEL: test_med3_f16:1295; GISEL-GFX11-TRUE16: ; %bb.0:1296; GISEL-GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1297; GISEL-GFX11-TRUE16-NEXT: v_med3_f16 v2.l, v2.l, v3.l, v4.l1298; GISEL-GFX11-TRUE16-NEXT: global_store_b16 v[0:1], v2, off1299; GISEL-GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]1300;1301; GISEL-GFX11-FAKE16-LABEL: test_med3_f16:1302; GISEL-GFX11-FAKE16: ; %bb.0:1303; GISEL-GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1304; GISEL-GFX11-FAKE16-NEXT: v_med3_f16 v2, v2, v3, v41305; GISEL-GFX11-FAKE16-NEXT: global_store_b16 v[0:1], v2, off1306; GISEL-GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]1307;1308; SDAG-GFX12-TRUE16-LABEL: test_med3_f16:1309; SDAG-GFX12-TRUE16: ; %bb.0:1310; SDAG-GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01311; SDAG-GFX12-TRUE16-NEXT: s_wait_expcnt 0x01312; SDAG-GFX12-TRUE16-NEXT: s_wait_samplecnt 0x01313; SDAG-GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x01314; SDAG-GFX12-TRUE16-NEXT: s_wait_kmcnt 0x01315; SDAG-GFX12-TRUE16-NEXT: v_med3_num_f16 v2.l, v2.l, v3.l, v4.l1316; SDAG-GFX12-TRUE16-NEXT: global_store_b16 v[0:1], v2, off1317; SDAG-GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]1318;1319; SDAG-GFX12-FAKE16-LABEL: test_med3_f16:1320; SDAG-GFX12-FAKE16: ; %bb.0:1321; SDAG-GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01322; SDAG-GFX12-FAKE16-NEXT: s_wait_expcnt 0x01323; SDAG-GFX12-FAKE16-NEXT: s_wait_samplecnt 0x01324; SDAG-GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x01325; SDAG-GFX12-FAKE16-NEXT: s_wait_kmcnt 0x01326; SDAG-GFX12-FAKE16-NEXT: v_med3_num_f16 v2, v2, v3, v41327; SDAG-GFX12-FAKE16-NEXT: global_store_b16 v[0:1], v2, off1328; SDAG-GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]1329;1330; GISEL-GFX12-TRUE16-LABEL: test_med3_f16:1331; GISEL-GFX12-TRUE16: ; %bb.0:1332; GISEL-GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01333; GISEL-GFX12-TRUE16-NEXT: s_wait_expcnt 0x01334; GISEL-GFX12-TRUE16-NEXT: s_wait_samplecnt 0x01335; GISEL-GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x01336; GISEL-GFX12-TRUE16-NEXT: s_wait_kmcnt 0x01337; GISEL-GFX12-TRUE16-NEXT: v_med3_num_f16 v2.l, v2.l, v3.l, v4.l1338; GISEL-GFX12-TRUE16-NEXT: global_store_b16 v[0:1], v2, off1339; GISEL-GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]1340;1341; GISEL-GFX12-FAKE16-LABEL: test_med3_f16:1342; GISEL-GFX12-FAKE16: ; %bb.0:1343; GISEL-GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01344; GISEL-GFX12-FAKE16-NEXT: s_wait_expcnt 0x01345; GISEL-GFX12-FAKE16-NEXT: s_wait_samplecnt 0x01346; GISEL-GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x01347; GISEL-GFX12-FAKE16-NEXT: s_wait_kmcnt 0x01348; GISEL-GFX12-FAKE16-NEXT: v_med3_num_f16 v2, v2, v3, v41349; GISEL-GFX12-FAKE16-NEXT: global_store_b16 v[0:1], v2, off1350; GISEL-GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]1351;1352; SDAG-GFX1250-TRUE16-LABEL: test_med3_f16:1353; SDAG-GFX1250-TRUE16: ; %bb.0:1354; SDAG-GFX1250-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01355; SDAG-GFX1250-TRUE16-NEXT: s_wait_kmcnt 0x01356; SDAG-GFX1250-TRUE16-NEXT: v_med3_num_f16 v2.l, v2.l, v3.l, v4.l1357; SDAG-GFX1250-TRUE16-NEXT: global_store_b16 v[0:1], v2, off1358; SDAG-GFX1250-TRUE16-NEXT: s_set_pc_i64 s[30:31]1359;1360; SDAG-GFX1250-FAKE16-LABEL: test_med3_f16:1361; SDAG-GFX1250-FAKE16: ; %bb.0:1362; SDAG-GFX1250-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01363; SDAG-GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x01364; SDAG-GFX1250-FAKE16-NEXT: v_med3_num_f16 v2, v2, v3, v41365; SDAG-GFX1250-FAKE16-NEXT: global_store_b16 v[0:1], v2, off1366; SDAG-GFX1250-FAKE16-NEXT: s_set_pc_i64 s[30:31]1367;1368; GISEL-GFX1250-TRUE16-LABEL: test_med3_f16:1369; GISEL-GFX1250-TRUE16: ; %bb.0:1370; GISEL-GFX1250-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01371; GISEL-GFX1250-TRUE16-NEXT: s_wait_kmcnt 0x01372; GISEL-GFX1250-TRUE16-NEXT: v_med3_num_f16 v2.l, v2.l, v3.l, v4.l1373; GISEL-GFX1250-TRUE16-NEXT: global_store_b16 v[0:1], v2, off1374; GISEL-GFX1250-TRUE16-NEXT: s_set_pc_i64 s[30:31]1375;1376; GISEL-GFX1250-FAKE16-LABEL: test_med3_f16:1377; GISEL-GFX1250-FAKE16: ; %bb.0:1378; GISEL-GFX1250-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01379; GISEL-GFX1250-FAKE16-NEXT: s_wait_kmcnt 0x01380; GISEL-GFX1250-FAKE16-NEXT: v_med3_num_f16 v2, v2, v3, v41381; GISEL-GFX1250-FAKE16-NEXT: global_store_b16 v[0:1], v2, off1382; GISEL-GFX1250-FAKE16-NEXT: s_set_pc_i64 s[30:31]1383 %tmp0 = call nnan half @llvm.minnum.f16(half %x, half %y)1384 %tmp1 = call nnan half @llvm.maxnum.f16(half %x, half %y)1385 %tmp2 = call nnan half @llvm.minnum.f16(half %tmp1, half %z)1386 %tmp3 = call nnan half @llvm.maxnum.f16(half %tmp0, half %tmp2)1387 store half %tmp3, ptr addrspace(1) %arg1388 ret void1389}1390 1391declare i32 @llvm.smin.i32(i32, i32)1392declare i32 @llvm.smax.i32(i32, i32)1393declare i32 @llvm.umin.i32(i32, i32)1394declare i32 @llvm.umax.i32(i32, i32)1395declare half @llvm.minnum.f16(half, half)1396declare half @llvm.maxnum.f16(half, half)1397declare float @llvm.minnum.f32(float, float)1398declare float @llvm.maxnum.f32(float, float)1399attributes #0 = { nounwind "no-nans-fp-math"="true" }1400;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:1401; GISEL: {{.*}}1402; SDAG: {{.*}}1403