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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefix=GCN %s3; XUN: llc -mtriple=amdgcn -mcpu=fiji < %s | FileCheck --check-prefixes=GCN,VI %s4 5; FIXME: broken on VI because flat instructions need to be emitted6; instead of addr64 equivalent of the _OFFSET variants.7 8; Check that moving the pointer out of the resource descriptor to9; vaddr works for atomics.10 11declare i32 @llvm.amdgcn.workitem.id.x() #112 13define amdgpu_kernel void @atomic_max_i32(ptr addrspace(1) %out, ptr addrspace(1) %in, ptr addrspace(1) %x, i32 %y) #0 {14; GCN-LABEL: atomic_max_i32:15; GCN: ; %bb.0:16; GCN-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x917; GCN-NEXT: s_mov_b32 s11, 0xf00018; GCN-NEXT: s_mov_b32 s10, 019; GCN-NEXT: v_lshlrev_b32_e32 v1, 3, v020; GCN-NEXT: v_mov_b32_e32 v2, 021; GCN-NEXT: s_waitcnt lgkmcnt(0)22; GCN-NEXT: s_mov_b64 s[8:9], s[2:3]23; GCN-NEXT: buffer_load_dwordx2 v[1:2], v[1:2], s[8:11], 0 addr64 glc24; GCN-NEXT: s_waitcnt vmcnt(0)25; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 1, v026; GCN-NEXT: s_and_saveexec_b64 s[2:3], vcc27; GCN-NEXT: s_cbranch_execz .LBB0_428; GCN-NEXT: ; %bb.1: ; %atomic29; GCN-NEXT: s_mov_b32 s8, s1030; GCN-NEXT: s_mov_b32 s9, s1031; GCN-NEXT: buffer_load_dword v4, v[1:2], s[8:11], 0 addr64 offset:40032; GCN-NEXT: s_load_dword s4, s[4:5], 0xf33; GCN-NEXT: s_mov_b64 s[2:3], 034; GCN-NEXT: .LBB0_2: ; %atomicrmw.start35; GCN-NEXT: ; =>This Inner Loop Header: Depth=136; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)37; GCN-NEXT: v_max_i32_e32 v3, s4, v438; GCN-NEXT: s_waitcnt expcnt(0)39; GCN-NEXT: v_mov_b32_e32 v6, v440; GCN-NEXT: v_mov_b32_e32 v5, v341; GCN-NEXT: buffer_atomic_cmpswap v[5:6], v[1:2], s[8:11], 0 addr64 offset:400 glc42; GCN-NEXT: s_waitcnt vmcnt(0)43; GCN-NEXT: buffer_wbinvl144; GCN-NEXT: v_cmp_eq_u32_e32 vcc, v5, v445; GCN-NEXT: s_or_b64 s[2:3], vcc, s[2:3]46; GCN-NEXT: v_mov_b32_e32 v4, v547; GCN-NEXT: s_andn2_b64 exec, exec, s[2:3]48; GCN-NEXT: s_cbranch_execnz .LBB0_249; GCN-NEXT: ; %bb.3: ; %atomicrmw.end50; GCN-NEXT: s_or_b64 exec, exec, s[2:3]51; GCN-NEXT: s_mov_b32 s3, 0xf00052; GCN-NEXT: s_mov_b32 s2, -153; GCN-NEXT: buffer_store_dword v5, off, s[0:3], 054; GCN-NEXT: .LBB0_4: ; %exit55; GCN-NEXT: s_endpgm56 %tid = call i32 @llvm.amdgcn.workitem.id.x()57 %tid.gep = getelementptr ptr addrspace(1), ptr addrspace(1) %in, i32 %tid58 %ptr = load volatile ptr addrspace(1), ptr addrspace(1) %tid.gep59 %xor = xor i32 %tid, 160 %cmp = icmp ne i32 %xor, 061 br i1 %cmp, label %atomic, label %exit62 63atomic:64 %gep = getelementptr i32, ptr addrspace(1) %ptr, i32 10065 %ret = atomicrmw max ptr addrspace(1) %gep, i32 %y seq_cst66 store i32 %ret, ptr addrspace(1) %out67 br label %exit68 69exit:70 ret void71}72 73define amdgpu_kernel void @atomic_max_i32_noret(ptr addrspace(1) %out, ptr addrspace(1) %in, ptr addrspace(1) %x, i32 %y) #0 {74; GCN-LABEL: atomic_max_i32_noret:75; GCN: ; %bb.0:76; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xb77; GCN-NEXT: s_mov_b32 s3, 0xf00078; GCN-NEXT: s_mov_b32 s2, 079; GCN-NEXT: v_lshlrev_b32_e32 v1, 3, v080; GCN-NEXT: v_mov_b32_e32 v2, 081; GCN-NEXT: s_waitcnt lgkmcnt(0)82; GCN-NEXT: buffer_load_dwordx2 v[1:2], v[1:2], s[0:3], 0 addr64 glc83; GCN-NEXT: s_waitcnt vmcnt(0)84; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 1, v085; GCN-NEXT: s_and_saveexec_b64 s[0:1], vcc86; GCN-NEXT: s_cbranch_execz .LBB1_387; GCN-NEXT: ; %bb.1: ; %atomic88; GCN-NEXT: s_mov_b32 s0, s289; GCN-NEXT: s_mov_b32 s1, s290; GCN-NEXT: buffer_load_dword v4, v[1:2], s[0:3], 0 addr64 offset:40091; GCN-NEXT: s_load_dword s6, s[4:5], 0xf92; GCN-NEXT: s_mov_b64 s[4:5], 093; GCN-NEXT: .LBB1_2: ; %atomicrmw.start94; GCN-NEXT: ; =>This Inner Loop Header: Depth=195; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)96; GCN-NEXT: v_max_i32_e32 v3, s6, v497; GCN-NEXT: s_waitcnt expcnt(0)98; GCN-NEXT: v_mov_b32_e32 v6, v499; GCN-NEXT: v_mov_b32_e32 v5, v3100; GCN-NEXT: buffer_atomic_cmpswap v[5:6], v[1:2], s[0:3], 0 addr64 offset:400 glc101; GCN-NEXT: s_waitcnt vmcnt(0)102; GCN-NEXT: buffer_wbinvl1103; GCN-NEXT: v_cmp_eq_u32_e32 vcc, v5, v4104; GCN-NEXT: s_or_b64 s[4:5], vcc, s[4:5]105; GCN-NEXT: v_mov_b32_e32 v4, v5106; GCN-NEXT: s_andn2_b64 exec, exec, s[4:5]107; GCN-NEXT: s_cbranch_execnz .LBB1_2108; GCN-NEXT: .LBB1_3: ; %exit109; GCN-NEXT: s_endpgm110 %tid = call i32 @llvm.amdgcn.workitem.id.x()111 %tid.gep = getelementptr ptr addrspace(1), ptr addrspace(1) %in, i32 %tid112 %ptr = load volatile ptr addrspace(1), ptr addrspace(1) %tid.gep113 %xor = xor i32 %tid, 1114 %cmp = icmp ne i32 %xor, 0115 br i1 %cmp, label %atomic, label %exit116 117atomic:118 %gep = getelementptr i32, ptr addrspace(1) %ptr, i32 100119 %ret = atomicrmw max ptr addrspace(1) %gep, i32 %y seq_cst120 br label %exit121 122exit:123 ret void124}125 126attributes #0 = { nounwind }127attributes #1 = { nounwind readnone }128