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1; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -enable-var-scope -check-prefixes=GCN,SI %s2; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=fiji -mattr=-flat-for-global < %s | FileCheck -enable-var-scope -check-prefixes=GCN,VI,GFX89 %s3; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx900 -mattr=-flat-for-global < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX9,GFX89 %s4; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -mattr=-flat-for-global,+real-true16 < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX11-TRUE16 %s5; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -mattr=-flat-for-global,-real-true16 < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX11-FAKE16 %s6 7; GCN-LABEL: {{^}}v_mul_i16:8; SI: v_and_b32_e32 v{{[0-9]+}}, 0xffff, v{{[0-9]+}}9; SI: v_and_b32_e32 v{{[0-9]+}}, 0xffff, v{{[0-9]+}}10; SI: v_mul_u32_u2411 12; GFX89: v_mul_lo_u16_e32 v0, v0, v113 14; GFX11-TRUE16: v_mul_lo_u16 v{{[0-9]+}}.{{(l|h)}}, v{{[0-9]+}}.{{(l|h)}}, v{{[0-9]+}}.{{(l|h)}}15; GFX11-FAKE16: v_mul_lo_u16 v0, v0, v116define i16 @v_mul_i16(i16 %a, i16 %b) {17 %r.val = mul i16 %a, %b18 ret i16 %r.val19}20 21; GCN-LABEL: {{^}}s_mul_i16:22; GCN: s_mul_i1623define amdgpu_kernel void @s_mul_i16(i16 %a, i16 %b) {24 %r.val = mul i16 %a, %b25 store volatile i16 %r.val, ptr addrspace(1) null26 ret void27}28 29; FIXME: Should emit u16 mul here.30; GCN-LABEL: {{^}}v_mul_i16_uniform_load:31; GCN: v_mul_lo_u3232define amdgpu_kernel void @v_mul_i16_uniform_load(33 ptr addrspace(1) %r,34 ptr addrspace(1) %a,35 ptr addrspace(1) %b) {36entry:37 %a.val = load i16, ptr addrspace(1) %a38 %b.val = load i16, ptr addrspace(1) %b39 %r.val = mul i16 %a.val, %b.val40 store i16 %r.val, ptr addrspace(1) %r41 ret void42}43 44; GCN-LABEL: {{^}}v_mul_v2i16:45; SI: v_mul_u32_u2446; SI: v_mul_u32_u2447 48; VI: v_mul_lo_u16_sdwa49; VI: v_mul_lo_u16_e3250; VI: v_or_b32_e3251 52 53; GFX9: s_waitcnt54; GFX9-NEXT: v_pk_mul_lo_u16 v0, v0, v155; GFX9-NEXT: s_setpc_b6456define <2 x i16> @v_mul_v2i16(<2 x i16> %a, <2 x i16> %b) {57 %r.val = mul <2 x i16> %a, %b58 ret <2 x i16> %r.val59}60 61; FIXME: Unpack garbage on gfx962; GCN-LABEL: {{^}}v_mul_v3i16:63; SI: v_mul_u32_u2464; SI: v_mul_u32_u2465; SI: v_mul_u32_u2466 67; VI: v_mul_lo_u1668; VI: v_mul_lo_u1669; VI: v_mul_lo_u1670 71; GFX9: s_waitcnt72; GFX9-NEXT: v_pk_mul_lo_u1673; GFX9-NEXT: v_pk_mul_lo_u1674; GFX9-NEXT: s_setpc_b6475define <3 x i16> @v_mul_v3i16(<3 x i16> %a, <3 x i16> %b) {76 %r.val = mul <3 x i16> %a, %b77 ret <3 x i16> %r.val78}79 80; GCN-LABEL: {{^}}v_mul_v4i16:81; SI: v_mul_u32_u2482; SI: v_mul_u32_u2483; SI: v_mul_u32_u2484; SI: v_mul_u32_u2485 86; VI: v_mul_lo_u16_sdwa87; VI: v_mul_lo_u16_sdwa88; VI: v_mul_lo_u16_e3289; VI: v_mul_lo_u16_e3290; VI: v_or_b32_e3291; VI: v_or_b32_e3292 93; GFX9: s_waitcnt94; GFX9-NEXT: v_pk_mul_lo_u16 v0, v0, v295; GFX9-NEXT: v_pk_mul_lo_u16 v1, v1, v396; GFX9-NEXT: s_setpc_b6497define <4 x i16> @v_mul_v4i16(<4 x i16> %a, <4 x i16> %b) {98 %r.val = mul <4 x i16> %a, %b99 ret <4 x i16> %r.val100}101