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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=verde < %s | FileCheck -check-prefixes=SI %s3; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global < %s | FileCheck -check-prefixes=VI %s4; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx900 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX9 %s5; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1010 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX10 %s6; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX11 %s7; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1200 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX12 %s8; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1250 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX1250 %s9; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=r600 -mcpu=redwood < %s | FileCheck -check-prefixes=EG %s10 11; mul24 and mad24 are affected12 13define amdgpu_kernel void @test_mul_v2i32(ptr addrspace(1) %out, ptr addrspace(1) %in) {14; SI-LABEL: test_mul_v2i32:15; SI: ; %bb.0: ; %entry16; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x917; SI-NEXT: s_mov_b32 s7, 0xf00018; SI-NEXT: s_mov_b32 s6, -119; SI-NEXT: s_mov_b32 s10, s620; SI-NEXT: s_mov_b32 s11, s721; SI-NEXT: s_waitcnt lgkmcnt(0)22; SI-NEXT: s_mov_b32 s8, s223; SI-NEXT: s_mov_b32 s9, s324; SI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 025; SI-NEXT: s_mov_b32 s4, s026; SI-NEXT: s_mov_b32 s5, s127; SI-NEXT: s_waitcnt vmcnt(0)28; SI-NEXT: v_mul_lo_u32 v1, v1, v329; SI-NEXT: v_mul_lo_u32 v0, v0, v230; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 031; SI-NEXT: s_endpgm32;33; VI-LABEL: test_mul_v2i32:34; VI: ; %bb.0: ; %entry35; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2436; VI-NEXT: s_mov_b32 s7, 0xf00037; VI-NEXT: s_mov_b32 s6, -138; VI-NEXT: s_mov_b32 s10, s639; VI-NEXT: s_mov_b32 s11, s740; VI-NEXT: s_waitcnt lgkmcnt(0)41; VI-NEXT: s_mov_b32 s8, s242; VI-NEXT: s_mov_b32 s9, s343; VI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 044; VI-NEXT: s_mov_b32 s4, s045; VI-NEXT: s_mov_b32 s5, s146; VI-NEXT: s_waitcnt vmcnt(0)47; VI-NEXT: v_mul_lo_u32 v1, v1, v348; VI-NEXT: v_mul_lo_u32 v0, v0, v249; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 050; VI-NEXT: s_endpgm51;52; GFX9-LABEL: test_mul_v2i32:53; GFX9: ; %bb.0: ; %entry54; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2455; GFX9-NEXT: s_mov_b32 s7, 0xf00056; GFX9-NEXT: s_mov_b32 s6, -157; GFX9-NEXT: s_mov_b32 s10, s658; GFX9-NEXT: s_mov_b32 s11, s759; GFX9-NEXT: s_waitcnt lgkmcnt(0)60; GFX9-NEXT: s_mov_b32 s8, s261; GFX9-NEXT: s_mov_b32 s9, s362; GFX9-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 063; GFX9-NEXT: s_mov_b32 s4, s064; GFX9-NEXT: s_mov_b32 s5, s165; GFX9-NEXT: s_waitcnt vmcnt(0)66; GFX9-NEXT: v_mul_lo_u32 v1, v1, v367; GFX9-NEXT: v_mul_lo_u32 v0, v0, v268; GFX9-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 069; GFX9-NEXT: s_endpgm70;71; GFX10-LABEL: test_mul_v2i32:72; GFX10: ; %bb.0: ; %entry73; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2474; GFX10-NEXT: s_mov_b32 s6, -175; GFX10-NEXT: s_mov_b32 s7, 0x3101600076; GFX10-NEXT: s_mov_b32 s10, s677; GFX10-NEXT: s_mov_b32 s11, s778; GFX10-NEXT: s_waitcnt lgkmcnt(0)79; GFX10-NEXT: s_mov_b32 s8, s280; GFX10-NEXT: s_mov_b32 s9, s381; GFX10-NEXT: s_mov_b32 s4, s082; GFX10-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 083; GFX10-NEXT: s_mov_b32 s5, s184; GFX10-NEXT: s_waitcnt vmcnt(0)85; GFX10-NEXT: v_mul_lo_u32 v1, v1, v386; GFX10-NEXT: v_mul_lo_u32 v0, v0, v287; GFX10-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 088; GFX10-NEXT: s_endpgm89;90; GFX11-LABEL: test_mul_v2i32:91; GFX11: ; %bb.0: ; %entry92; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x2493; GFX11-NEXT: s_mov_b32 s6, -194; GFX11-NEXT: s_mov_b32 s7, 0x3101600095; GFX11-NEXT: s_mov_b32 s10, s696; GFX11-NEXT: s_mov_b32 s11, s797; GFX11-NEXT: s_waitcnt lgkmcnt(0)98; GFX11-NEXT: s_mov_b32 s8, s299; GFX11-NEXT: s_mov_b32 s9, s3100; GFX11-NEXT: s_mov_b32 s4, s0101; GFX11-NEXT: buffer_load_b128 v[0:3], off, s[8:11], 0102; GFX11-NEXT: s_mov_b32 s5, s1103; GFX11-NEXT: s_waitcnt vmcnt(0)104; GFX11-NEXT: v_mul_lo_u32 v1, v1, v3105; GFX11-NEXT: v_mul_lo_u32 v0, v0, v2106; GFX11-NEXT: buffer_store_b64 v[0:1], off, s[4:7], 0107; GFX11-NEXT: s_endpgm108;109; GFX12-LABEL: test_mul_v2i32:110; GFX12: ; %bb.0: ; %entry111; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24112; GFX12-NEXT: s_mov_b32 s6, -1113; GFX12-NEXT: s_mov_b32 s7, 0x31016000114; GFX12-NEXT: s_mov_b32 s10, s6115; GFX12-NEXT: s_mov_b32 s11, s7116; GFX12-NEXT: s_wait_kmcnt 0x0117; GFX12-NEXT: s_mov_b32 s8, s2118; GFX12-NEXT: s_mov_b32 s9, s3119; GFX12-NEXT: s_mov_b32 s4, s0120; GFX12-NEXT: buffer_load_b128 v[0:3], off, s[8:11], null121; GFX12-NEXT: s_mov_b32 s5, s1122; GFX12-NEXT: s_wait_loadcnt 0x0123; GFX12-NEXT: v_mul_lo_u32 v1, v1, v3124; GFX12-NEXT: v_mul_lo_u32 v0, v0, v2125; GFX12-NEXT: buffer_store_b64 v[0:1], off, s[4:7], null126; GFX12-NEXT: s_endpgm127;128; GFX1250-LABEL: test_mul_v2i32:129; GFX1250: ; %bb.0: ; %entry130; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1131; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x24132; GFX1250-NEXT: s_mov_b32 s6, -1133; GFX1250-NEXT: s_mov_b32 s7, 0x31016000134; GFX1250-NEXT: s_mov_b32 s10, s6135; GFX1250-NEXT: s_mov_b32 s11, s7136; GFX1250-NEXT: s_wait_kmcnt 0x0137; GFX1250-NEXT: s_mov_b32 s8, s2138; GFX1250-NEXT: s_mov_b32 s9, s3139; GFX1250-NEXT: s_mov_b32 s4, s0140; GFX1250-NEXT: buffer_load_b128 v[0:3], off, s[8:11], null141; GFX1250-NEXT: s_mov_b32 s5, s1142; GFX1250-NEXT: s_wait_loadcnt 0x0143; GFX1250-NEXT: v_mul_lo_u32 v1, v1, v3144; GFX1250-NEXT: v_mul_lo_u32 v0, v0, v2145; GFX1250-NEXT: buffer_store_b64 v[0:1], off, s[4:7], null146; GFX1250-NEXT: s_endpgm147;148; EG-LABEL: test_mul_v2i32:149; EG: ; %bb.0: ; %entry150; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]151; EG-NEXT: TEX 0 @6152; EG-NEXT: ALU 3, @9, KC0[CB0:0-32], KC1[]153; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1154; EG-NEXT: CF_END155; EG-NEXT: PAD156; EG-NEXT: Fetch clause starting at 6:157; EG-NEXT: VTX_READ_128 T0.XYZW, T0.X, 0, #1158; EG-NEXT: ALU clause starting at 8:159; EG-NEXT: MOV * T0.X, KC0[2].Z,160; EG-NEXT: ALU clause starting at 9:161; EG-NEXT: MULLO_INT * T0.Y, T0.Y, T0.W,162; EG-NEXT: LSHR T1.X, KC0[2].Y, literal.x,163; EG-NEXT: MULLO_INT * T0.X, T0.X, T0.Z,164; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)165entry:166 %b_ptr = getelementptr <2 x i32>, ptr addrspace(1) %in, i32 1167 %a = load <2 x i32>, ptr addrspace(1) %in168 %b = load <2 x i32>, ptr addrspace(1) %b_ptr169 %result = mul <2 x i32> %a, %b170 store <2 x i32> %result, ptr addrspace(1) %out171 ret void172}173 174define amdgpu_kernel void @v_mul_v4i32(ptr addrspace(1) %out, ptr addrspace(1) %in) {175; SI-LABEL: v_mul_v4i32:176; SI: ; %bb.0: ; %entry177; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9178; SI-NEXT: s_mov_b32 s7, 0xf000179; SI-NEXT: s_mov_b32 s6, -1180; SI-NEXT: s_mov_b32 s10, s6181; SI-NEXT: s_mov_b32 s11, s7182; SI-NEXT: s_waitcnt lgkmcnt(0)183; SI-NEXT: s_mov_b32 s8, s2184; SI-NEXT: s_mov_b32 s9, s3185; SI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0186; SI-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 offset:16187; SI-NEXT: s_mov_b32 s4, s0188; SI-NEXT: s_mov_b32 s5, s1189; SI-NEXT: s_waitcnt vmcnt(0)190; SI-NEXT: v_mul_lo_u32 v3, v3, v7191; SI-NEXT: v_mul_lo_u32 v2, v2, v6192; SI-NEXT: v_mul_lo_u32 v1, v1, v5193; SI-NEXT: v_mul_lo_u32 v0, v0, v4194; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0195; SI-NEXT: s_endpgm196;197; VI-LABEL: v_mul_v4i32:198; VI: ; %bb.0: ; %entry199; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24200; VI-NEXT: s_mov_b32 s7, 0xf000201; VI-NEXT: s_mov_b32 s6, -1202; VI-NEXT: s_mov_b32 s10, s6203; VI-NEXT: s_mov_b32 s11, s7204; VI-NEXT: s_waitcnt lgkmcnt(0)205; VI-NEXT: s_mov_b32 s8, s2206; VI-NEXT: s_mov_b32 s9, s3207; VI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0208; VI-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 offset:16209; VI-NEXT: s_mov_b32 s4, s0210; VI-NEXT: s_mov_b32 s5, s1211; VI-NEXT: s_waitcnt vmcnt(0)212; VI-NEXT: v_mul_lo_u32 v3, v3, v7213; VI-NEXT: v_mul_lo_u32 v2, v2, v6214; VI-NEXT: v_mul_lo_u32 v1, v1, v5215; VI-NEXT: v_mul_lo_u32 v0, v0, v4216; VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0217; VI-NEXT: s_endpgm218;219; GFX9-LABEL: v_mul_v4i32:220; GFX9: ; %bb.0: ; %entry221; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24222; GFX9-NEXT: s_mov_b32 s7, 0xf000223; GFX9-NEXT: s_mov_b32 s6, -1224; GFX9-NEXT: s_mov_b32 s10, s6225; GFX9-NEXT: s_mov_b32 s11, s7226; GFX9-NEXT: s_waitcnt lgkmcnt(0)227; GFX9-NEXT: s_mov_b32 s8, s2228; GFX9-NEXT: s_mov_b32 s9, s3229; GFX9-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0230; GFX9-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 offset:16231; GFX9-NEXT: s_mov_b32 s4, s0232; GFX9-NEXT: s_mov_b32 s5, s1233; GFX9-NEXT: s_waitcnt vmcnt(0)234; GFX9-NEXT: v_mul_lo_u32 v3, v3, v7235; GFX9-NEXT: v_mul_lo_u32 v2, v2, v6236; GFX9-NEXT: v_mul_lo_u32 v1, v1, v5237; GFX9-NEXT: v_mul_lo_u32 v0, v0, v4238; GFX9-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0239; GFX9-NEXT: s_endpgm240;241; GFX10-LABEL: v_mul_v4i32:242; GFX10: ; %bb.0: ; %entry243; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24244; GFX10-NEXT: s_mov_b32 s6, -1245; GFX10-NEXT: s_mov_b32 s7, 0x31016000246; GFX10-NEXT: s_mov_b32 s10, s6247; GFX10-NEXT: s_mov_b32 s11, s7248; GFX10-NEXT: s_waitcnt lgkmcnt(0)249; GFX10-NEXT: s_mov_b32 s8, s2250; GFX10-NEXT: s_mov_b32 s9, s3251; GFX10-NEXT: s_clause 0x1252; GFX10-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0253; GFX10-NEXT: buffer_load_dwordx4 v[4:7], off, s[8:11], 0 offset:16254; GFX10-NEXT: s_mov_b32 s4, s0255; GFX10-NEXT: s_mov_b32 s5, s1256; GFX10-NEXT: s_waitcnt vmcnt(0)257; GFX10-NEXT: v_mul_lo_u32 v3, v3, v7258; GFX10-NEXT: v_mul_lo_u32 v2, v2, v6259; GFX10-NEXT: v_mul_lo_u32 v1, v1, v5260; GFX10-NEXT: v_mul_lo_u32 v0, v0, v4261; GFX10-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0262; GFX10-NEXT: s_endpgm263;264; GFX11-LABEL: v_mul_v4i32:265; GFX11: ; %bb.0: ; %entry266; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24267; GFX11-NEXT: s_mov_b32 s6, -1268; GFX11-NEXT: s_mov_b32 s7, 0x31016000269; GFX11-NEXT: s_mov_b32 s10, s6270; GFX11-NEXT: s_mov_b32 s11, s7271; GFX11-NEXT: s_waitcnt lgkmcnt(0)272; GFX11-NEXT: s_mov_b32 s8, s2273; GFX11-NEXT: s_mov_b32 s9, s3274; GFX11-NEXT: s_clause 0x1275; GFX11-NEXT: buffer_load_b128 v[0:3], off, s[8:11], 0276; GFX11-NEXT: buffer_load_b128 v[4:7], off, s[8:11], 0 offset:16277; GFX11-NEXT: s_mov_b32 s4, s0278; GFX11-NEXT: s_mov_b32 s5, s1279; GFX11-NEXT: s_waitcnt vmcnt(0)280; GFX11-NEXT: v_mul_lo_u32 v3, v3, v7281; GFX11-NEXT: v_mul_lo_u32 v2, v2, v6282; GFX11-NEXT: v_mul_lo_u32 v1, v1, v5283; GFX11-NEXT: v_mul_lo_u32 v0, v0, v4284; GFX11-NEXT: buffer_store_b128 v[0:3], off, s[4:7], 0285; GFX11-NEXT: s_endpgm286;287; GFX12-LABEL: v_mul_v4i32:288; GFX12: ; %bb.0: ; %entry289; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24290; GFX12-NEXT: s_mov_b32 s6, -1291; GFX12-NEXT: s_mov_b32 s7, 0x31016000292; GFX12-NEXT: s_mov_b32 s10, s6293; GFX12-NEXT: s_mov_b32 s11, s7294; GFX12-NEXT: s_wait_kmcnt 0x0295; GFX12-NEXT: s_mov_b32 s8, s2296; GFX12-NEXT: s_mov_b32 s9, s3297; GFX12-NEXT: s_clause 0x1298; GFX12-NEXT: buffer_load_b128 v[0:3], off, s[8:11], null299; GFX12-NEXT: buffer_load_b128 v[4:7], off, s[8:11], null offset:16300; GFX12-NEXT: s_mov_b32 s4, s0301; GFX12-NEXT: s_mov_b32 s5, s1302; GFX12-NEXT: s_wait_loadcnt 0x0303; GFX12-NEXT: v_mul_lo_u32 v3, v3, v7304; GFX12-NEXT: v_mul_lo_u32 v2, v2, v6305; GFX12-NEXT: v_mul_lo_u32 v1, v1, v5306; GFX12-NEXT: v_mul_lo_u32 v0, v0, v4307; GFX12-NEXT: buffer_store_b128 v[0:3], off, s[4:7], null308; GFX12-NEXT: s_endpgm309;310; GFX1250-LABEL: v_mul_v4i32:311; GFX1250: ; %bb.0: ; %entry312; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1313; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x24314; GFX1250-NEXT: s_mov_b32 s6, -1315; GFX1250-NEXT: s_mov_b32 s7, 0x31016000316; GFX1250-NEXT: s_mov_b32 s10, s6317; GFX1250-NEXT: s_mov_b32 s11, s7318; GFX1250-NEXT: s_wait_kmcnt 0x0319; GFX1250-NEXT: s_mov_b32 s8, s2320; GFX1250-NEXT: s_mov_b32 s9, s3321; GFX1250-NEXT: s_clause 0x1322; GFX1250-NEXT: buffer_load_b128 v[0:3], off, s[8:11], null323; GFX1250-NEXT: buffer_load_b128 v[4:7], off, s[8:11], null offset:16324; GFX1250-NEXT: s_mov_b32 s4, s0325; GFX1250-NEXT: s_mov_b32 s5, s1326; GFX1250-NEXT: s_wait_loadcnt 0x0327; GFX1250-NEXT: v_mul_lo_u32 v3, v3, v7328; GFX1250-NEXT: v_mul_lo_u32 v2, v2, v6329; GFX1250-NEXT: v_mul_lo_u32 v1, v1, v5330; GFX1250-NEXT: v_mul_lo_u32 v0, v0, v4331; GFX1250-NEXT: buffer_store_b128 v[0:3], off, s[4:7], null332; GFX1250-NEXT: s_endpgm333;334; EG-LABEL: v_mul_v4i32:335; EG: ; %bb.0: ; %entry336; EG-NEXT: ALU 0, @10, KC0[CB0:0-32], KC1[]337; EG-NEXT: TEX 1 @6338; EG-NEXT: ALU 5, @11, KC0[CB0:0-32], KC1[]339; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T2.X, 1340; EG-NEXT: CF_END341; EG-NEXT: PAD342; EG-NEXT: Fetch clause starting at 6:343; EG-NEXT: VTX_READ_128 T1.XYZW, T0.X, 16, #1344; EG-NEXT: VTX_READ_128 T0.XYZW, T0.X, 0, #1345; EG-NEXT: ALU clause starting at 10:346; EG-NEXT: MOV * T0.X, KC0[2].Z,347; EG-NEXT: ALU clause starting at 11:348; EG-NEXT: MULLO_INT * T0.W, T0.W, T1.W,349; EG-NEXT: MULLO_INT * T0.Z, T0.Z, T1.Z,350; EG-NEXT: MULLO_INT * T0.Y, T0.Y, T1.Y,351; EG-NEXT: LSHR T2.X, KC0[2].Y, literal.x,352; EG-NEXT: MULLO_INT * T0.X, T0.X, T1.X,353; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)354entry:355 %b_ptr = getelementptr <4 x i32>, ptr addrspace(1) %in, i32 1356 %a = load <4 x i32>, ptr addrspace(1) %in357 %b = load <4 x i32>, ptr addrspace(1) %b_ptr358 %result = mul <4 x i32> %a, %b359 store <4 x i32> %result, ptr addrspace(1) %out360 ret void361}362 363define amdgpu_kernel void @s_trunc_i64_mul_to_i32(ptr addrspace(1) %out, i64 %a, i64 %b) {364; SI-LABEL: s_trunc_i64_mul_to_i32:365; SI: ; %bb.0: ; %entry366; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9367; SI-NEXT: s_waitcnt lgkmcnt(0)368; SI-NEXT: s_load_dword s3, s[4:5], 0xd369; SI-NEXT: s_mov_b32 s7, 0xf000370; SI-NEXT: s_mov_b32 s6, -1371; SI-NEXT: s_mov_b32 s4, s0372; SI-NEXT: s_waitcnt lgkmcnt(0)373; SI-NEXT: s_mul_i32 s0, s3, s2374; SI-NEXT: s_mov_b32 s5, s1375; SI-NEXT: v_mov_b32_e32 v0, s0376; SI-NEXT: buffer_store_dword v0, off, s[4:7], 0377; SI-NEXT: s_endpgm378;379; VI-LABEL: s_trunc_i64_mul_to_i32:380; VI: ; %bb.0: ; %entry381; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24382; VI-NEXT: s_waitcnt lgkmcnt(0)383; VI-NEXT: s_load_dword s3, s[4:5], 0x34384; VI-NEXT: s_mov_b32 s7, 0xf000385; VI-NEXT: s_mov_b32 s6, -1386; VI-NEXT: s_mov_b32 s4, s0387; VI-NEXT: s_waitcnt lgkmcnt(0)388; VI-NEXT: s_mul_i32 s0, s3, s2389; VI-NEXT: s_mov_b32 s5, s1390; VI-NEXT: v_mov_b32_e32 v0, s0391; VI-NEXT: buffer_store_dword v0, off, s[4:7], 0392; VI-NEXT: s_endpgm393;394; GFX9-LABEL: s_trunc_i64_mul_to_i32:395; GFX9: ; %bb.0: ; %entry396; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24397; GFX9-NEXT: s_waitcnt lgkmcnt(0)398; GFX9-NEXT: s_load_dword s3, s[4:5], 0x34399; GFX9-NEXT: ; kill: killed $sgpr4_sgpr5400; GFX9-NEXT: s_mov_b32 s7, 0xf000401; GFX9-NEXT: s_mov_b32 s6, -1402; GFX9-NEXT: s_mov_b32 s4, s0403; GFX9-NEXT: s_waitcnt lgkmcnt(0)404; GFX9-NEXT: s_mul_i32 s0, s3, s2405; GFX9-NEXT: s_mov_b32 s5, s1406; GFX9-NEXT: v_mov_b32_e32 v0, s0407; GFX9-NEXT: buffer_store_dword v0, off, s[4:7], 0408; GFX9-NEXT: s_endpgm409;410; GFX10-LABEL: s_trunc_i64_mul_to_i32:411; GFX10: ; %bb.0: ; %entry412; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24413; GFX10-NEXT: s_waitcnt lgkmcnt(0)414; GFX10-NEXT: s_load_dword s3, s[4:5], 0x34415; GFX10-NEXT: ; kill: killed $sgpr4_sgpr5416; GFX10-NEXT: s_waitcnt lgkmcnt(0)417; GFX10-NEXT: s_mul_i32 s2, s3, s2418; GFX10-NEXT: s_mov_b32 s3, 0x31016000419; GFX10-NEXT: v_mov_b32_e32 v0, s2420; GFX10-NEXT: s_mov_b32 s2, -1421; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], 0422; GFX10-NEXT: s_endpgm423;424; GFX11-LABEL: s_trunc_i64_mul_to_i32:425; GFX11: ; %bb.0: ; %entry426; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24427; GFX11-NEXT: s_waitcnt lgkmcnt(0)428; GFX11-NEXT: s_load_b32 s3, s[4:5], 0x34429; GFX11-NEXT: s_waitcnt lgkmcnt(0)430; GFX11-NEXT: s_mul_i32 s2, s3, s2431; GFX11-NEXT: s_mov_b32 s3, 0x31016000432; GFX11-NEXT: v_mov_b32_e32 v0, s2433; GFX11-NEXT: s_mov_b32 s2, -1434; GFX11-NEXT: buffer_store_b32 v0, off, s[0:3], 0435; GFX11-NEXT: s_endpgm436;437; GFX12-LABEL: s_trunc_i64_mul_to_i32:438; GFX12: ; %bb.0: ; %entry439; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24440; GFX12-NEXT: s_wait_kmcnt 0x0441; GFX12-NEXT: s_load_b32 s3, s[4:5], 0x34442; GFX12-NEXT: s_wait_kmcnt 0x0443; GFX12-NEXT: s_mul_i32 s2, s3, s2444; GFX12-NEXT: s_mov_b32 s3, 0x31016000445; GFX12-NEXT: v_mov_b32_e32 v0, s2446; GFX12-NEXT: s_mov_b32 s2, -1447; GFX12-NEXT: buffer_store_b32 v0, off, s[0:3], null448; GFX12-NEXT: s_endpgm449;450; GFX1250-LABEL: s_trunc_i64_mul_to_i32:451; GFX1250: ; %bb.0: ; %entry452; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1453; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x24454; GFX1250-NEXT: s_wait_kmcnt 0x0455; GFX1250-NEXT: s_load_b32 s3, s[4:5], 0x34456; GFX1250-NEXT: ; kill: killed $sgpr4_sgpr5457; GFX1250-NEXT: s_wait_kmcnt 0x0458; GFX1250-NEXT: s_mul_i32 s2, s3, s2459; GFX1250-NEXT: s_mov_b32 s3, 0x31016000460; GFX1250-NEXT: v_mov_b32_e32 v0, s2461; GFX1250-NEXT: s_mov_b32 s2, -1462; GFX1250-NEXT: buffer_store_b32 v0, off, s[0:3], null463; GFX1250-NEXT: s_endpgm464;465; EG-LABEL: s_trunc_i64_mul_to_i32:466; EG: ; %bb.0: ; %entry467; EG-NEXT: ALU 2, @4, KC0[CB0:0-32], KC1[]468; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T1.X, T0.X, 1469; EG-NEXT: CF_END470; EG-NEXT: PAD471; EG-NEXT: ALU clause starting at 4:472; EG-NEXT: LSHR * T0.X, KC0[2].Y, literal.x,473; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)474; EG-NEXT: MULLO_INT * T1.X, KC0[3].Y, KC0[2].W,475entry:476 %mul = mul i64 %b, %a477 %trunc = trunc i64 %mul to i32478 store i32 %trunc, ptr addrspace(1) %out, align 8479 ret void480}481 482define amdgpu_kernel void @v_trunc_i64_mul_to_i32(ptr addrspace(1) %out, ptr addrspace(1) %aptr, ptr addrspace(1) %bptr) nounwind {483; SI-LABEL: v_trunc_i64_mul_to_i32:484; SI: ; %bb.0: ; %entry485; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9486; SI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0xd487; SI-NEXT: s_mov_b32 s7, 0xf000488; SI-NEXT: s_mov_b32 s6, -1489; SI-NEXT: s_mov_b32 s14, s6490; SI-NEXT: s_waitcnt lgkmcnt(0)491; SI-NEXT: s_mov_b32 s12, s2492; SI-NEXT: s_mov_b32 s13, s3493; SI-NEXT: s_mov_b32 s15, s7494; SI-NEXT: s_mov_b32 s10, s6495; SI-NEXT: s_mov_b32 s11, s7496; SI-NEXT: buffer_load_dword v0, off, s[12:15], 0497; SI-NEXT: buffer_load_dword v1, off, s[8:11], 0498; SI-NEXT: s_mov_b32 s4, s0499; SI-NEXT: s_mov_b32 s5, s1500; SI-NEXT: s_waitcnt vmcnt(0)501; SI-NEXT: v_mul_lo_u32 v0, v1, v0502; SI-NEXT: buffer_store_dword v0, off, s[4:7], 0503; SI-NEXT: s_endpgm504;505; VI-LABEL: v_trunc_i64_mul_to_i32:506; VI: ; %bb.0: ; %entry507; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24508; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34509; VI-NEXT: s_mov_b32 s7, 0xf000510; VI-NEXT: s_mov_b32 s6, -1511; VI-NEXT: s_mov_b32 s14, s6512; VI-NEXT: s_waitcnt lgkmcnt(0)513; VI-NEXT: s_mov_b32 s12, s2514; VI-NEXT: s_mov_b32 s13, s3515; VI-NEXT: s_mov_b32 s15, s7516; VI-NEXT: s_mov_b32 s10, s6517; VI-NEXT: s_mov_b32 s11, s7518; VI-NEXT: buffer_load_dword v0, off, s[12:15], 0519; VI-NEXT: buffer_load_dword v1, off, s[8:11], 0520; VI-NEXT: s_mov_b32 s4, s0521; VI-NEXT: s_mov_b32 s5, s1522; VI-NEXT: s_waitcnt vmcnt(0)523; VI-NEXT: v_mul_lo_u32 v0, v1, v0524; VI-NEXT: buffer_store_dword v0, off, s[4:7], 0525; VI-NEXT: s_endpgm526;527; GFX9-LABEL: v_trunc_i64_mul_to_i32:528; GFX9: ; %bb.0: ; %entry529; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24530; GFX9-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34531; GFX9-NEXT: s_mov_b32 s7, 0xf000532; GFX9-NEXT: s_mov_b32 s6, -1533; GFX9-NEXT: s_mov_b32 s14, s6534; GFX9-NEXT: s_waitcnt lgkmcnt(0)535; GFX9-NEXT: s_mov_b32 s12, s2536; GFX9-NEXT: s_mov_b32 s13, s3537; GFX9-NEXT: s_mov_b32 s15, s7538; GFX9-NEXT: s_mov_b32 s10, s6539; GFX9-NEXT: s_mov_b32 s11, s7540; GFX9-NEXT: buffer_load_dword v0, off, s[12:15], 0541; GFX9-NEXT: buffer_load_dword v1, off, s[8:11], 0542; GFX9-NEXT: s_mov_b32 s4, s0543; GFX9-NEXT: s_mov_b32 s5, s1544; GFX9-NEXT: s_waitcnt vmcnt(0)545; GFX9-NEXT: v_mul_lo_u32 v0, v1, v0546; GFX9-NEXT: buffer_store_dword v0, off, s[4:7], 0547; GFX9-NEXT: s_endpgm548;549; GFX10-LABEL: v_trunc_i64_mul_to_i32:550; GFX10: ; %bb.0: ; %entry551; GFX10-NEXT: s_clause 0x1552; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24553; GFX10-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34554; GFX10-NEXT: s_mov_b32 s6, -1555; GFX10-NEXT: s_mov_b32 s7, 0x31016000556; GFX10-NEXT: s_mov_b32 s14, s6557; GFX10-NEXT: s_mov_b32 s15, s7558; GFX10-NEXT: s_mov_b32 s10, s6559; GFX10-NEXT: s_mov_b32 s11, s7560; GFX10-NEXT: s_waitcnt lgkmcnt(0)561; GFX10-NEXT: s_mov_b32 s12, s2562; GFX10-NEXT: s_mov_b32 s13, s3563; GFX10-NEXT: buffer_load_dword v0, off, s[12:15], 0564; GFX10-NEXT: buffer_load_dword v1, off, s[8:11], 0565; GFX10-NEXT: s_mov_b32 s4, s0566; GFX10-NEXT: s_mov_b32 s5, s1567; GFX10-NEXT: s_waitcnt vmcnt(0)568; GFX10-NEXT: v_mul_lo_u32 v0, v1, v0569; GFX10-NEXT: buffer_store_dword v0, off, s[4:7], 0570; GFX10-NEXT: s_endpgm571;572; GFX11-LABEL: v_trunc_i64_mul_to_i32:573; GFX11: ; %bb.0: ; %entry574; GFX11-NEXT: s_clause 0x1575; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24576; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x34577; GFX11-NEXT: s_mov_b32 s10, -1578; GFX11-NEXT: s_mov_b32 s11, 0x31016000579; GFX11-NEXT: s_mov_b32 s14, s10580; GFX11-NEXT: s_mov_b32 s15, s11581; GFX11-NEXT: s_mov_b32 s6, s10582; GFX11-NEXT: s_mov_b32 s7, s11583; GFX11-NEXT: s_waitcnt lgkmcnt(0)584; GFX11-NEXT: s_mov_b32 s12, s2585; GFX11-NEXT: s_mov_b32 s13, s3586; GFX11-NEXT: buffer_load_b32 v0, off, s[12:15], 0587; GFX11-NEXT: buffer_load_b32 v1, off, s[4:7], 0588; GFX11-NEXT: s_mov_b32 s8, s0589; GFX11-NEXT: s_mov_b32 s9, s1590; GFX11-NEXT: s_waitcnt vmcnt(0)591; GFX11-NEXT: v_mul_lo_u32 v0, v1, v0592; GFX11-NEXT: buffer_store_b32 v0, off, s[8:11], 0593; GFX11-NEXT: s_endpgm594;595; GFX12-LABEL: v_trunc_i64_mul_to_i32:596; GFX12: ; %bb.0: ; %entry597; GFX12-NEXT: s_clause 0x1598; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24599; GFX12-NEXT: s_load_b64 s[4:5], s[4:5], 0x34600; GFX12-NEXT: s_mov_b32 s10, -1601; GFX12-NEXT: s_mov_b32 s11, 0x31016000602; GFX12-NEXT: s_mov_b32 s14, s10603; GFX12-NEXT: s_mov_b32 s15, s11604; GFX12-NEXT: s_mov_b32 s6, s10605; GFX12-NEXT: s_mov_b32 s7, s11606; GFX12-NEXT: s_wait_kmcnt 0x0607; GFX12-NEXT: s_mov_b32 s12, s2608; GFX12-NEXT: s_mov_b32 s13, s3609; GFX12-NEXT: buffer_load_b32 v0, off, s[12:15], null610; GFX12-NEXT: buffer_load_b32 v1, off, s[4:7], null611; GFX12-NEXT: s_mov_b32 s8, s0612; GFX12-NEXT: s_mov_b32 s9, s1613; GFX12-NEXT: s_wait_loadcnt 0x0614; GFX12-NEXT: v_mul_lo_u32 v0, v1, v0615; GFX12-NEXT: buffer_store_b32 v0, off, s[8:11], null616; GFX12-NEXT: s_endpgm617;618; GFX1250-LABEL: v_trunc_i64_mul_to_i32:619; GFX1250: ; %bb.0: ; %entry620; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1621; GFX1250-NEXT: s_clause 0x1622; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x24623; GFX1250-NEXT: s_load_b64 s[8:9], s[4:5], 0x34624; GFX1250-NEXT: s_mov_b32 s6, -1625; GFX1250-NEXT: s_mov_b32 s7, 0x31016000626; GFX1250-NEXT: s_mov_b32 s14, s6627; GFX1250-NEXT: s_mov_b32 s15, s7628; GFX1250-NEXT: s_mov_b32 s10, s6629; GFX1250-NEXT: s_mov_b32 s11, s7630; GFX1250-NEXT: s_wait_kmcnt 0x0631; GFX1250-NEXT: s_mov_b32 s12, s2632; GFX1250-NEXT: s_mov_b32 s13, s3633; GFX1250-NEXT: buffer_load_b32 v0, off, s[12:15], null634; GFX1250-NEXT: buffer_load_b32 v1, off, s[8:11], null635; GFX1250-NEXT: s_mov_b32 s4, s0636; GFX1250-NEXT: s_mov_b32 s5, s1637; GFX1250-NEXT: s_wait_loadcnt 0x0638; GFX1250-NEXT: v_mul_lo_u32 v0, v1, v0639; GFX1250-NEXT: buffer_store_b32 v0, off, s[4:7], null640; GFX1250-NEXT: s_endpgm641;642; EG-LABEL: v_trunc_i64_mul_to_i32:643; EG: ; %bb.0: ; %entry644; EG-NEXT: ALU 1, @10, KC0[CB0:0-32], KC1[]645; EG-NEXT: TEX 1 @6646; EG-NEXT: ALU 2, @12, KC0[CB0:0-32], KC1[]647; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T2.X, 1648; EG-NEXT: CF_END649; EG-NEXT: PAD650; EG-NEXT: Fetch clause starting at 6:651; EG-NEXT: VTX_READ_32 T1.X, T1.X, 0, #1652; EG-NEXT: VTX_READ_32 T0.X, T0.X, 0, #1653; EG-NEXT: ALU clause starting at 10:654; EG-NEXT: MOV T0.X, KC0[2].Z,655; EG-NEXT: MOV * T1.X, KC0[2].W,656; EG-NEXT: ALU clause starting at 12:657; EG-NEXT: LSHR T2.X, KC0[2].Y, literal.x,658; EG-NEXT: MULLO_INT * T0.X, T1.X, T0.X,659; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)660entry:661 %a = load i64, ptr addrspace(1) %aptr, align 8662 %b = load i64, ptr addrspace(1) %bptr, align 8663 %mul = mul i64 %b, %a664 %trunc = trunc i64 %mul to i32665 store i32 %trunc, ptr addrspace(1) %out, align 8666 ret void667}668 669; This 64-bit multiply should just use MUL_HI and MUL_LO, since the top670; 32-bits of both arguments are sign bits.671 672define amdgpu_kernel void @mul64_sext_c(ptr addrspace(1) %out, i32 %in) {673; SI-LABEL: mul64_sext_c:674; SI: ; %bb.0: ; %entry675; SI-NEXT: s_load_dword s6, s[4:5], 0xb676; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9677; SI-NEXT: v_mov_b32_e32 v0, 0x50678; SI-NEXT: s_mov_b32 s3, 0xf000679; SI-NEXT: s_mov_b32 s2, -1680; SI-NEXT: s_waitcnt lgkmcnt(0)681; SI-NEXT: v_mul_hi_i32 v1, s6, v0682; SI-NEXT: s_mulk_i32 s6, 0x50683; SI-NEXT: v_mov_b32_e32 v0, s6684; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0685; SI-NEXT: s_endpgm686;687; VI-LABEL: mul64_sext_c:688; VI: ; %bb.0: ; %entry689; VI-NEXT: s_load_dword s2, s[4:5], 0x2c690; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24691; VI-NEXT: v_mov_b32_e32 v0, 0x50692; VI-NEXT: s_waitcnt lgkmcnt(0)693; VI-NEXT: v_mad_i64_i32 v[0:1], s[2:3], s2, v0, 0694; VI-NEXT: s_mov_b32 s3, 0xf000695; VI-NEXT: s_mov_b32 s2, -1696; VI-NEXT: s_nop 2697; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0698; VI-NEXT: s_endpgm699;700; GFX9-LABEL: mul64_sext_c:701; GFX9: ; %bb.0: ; %entry702; GFX9-NEXT: s_load_dword s6, s[4:5], 0x2c703; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24704; GFX9-NEXT: s_mov_b32 s3, 0xf000705; GFX9-NEXT: s_mov_b32 s2, -1706; GFX9-NEXT: s_waitcnt lgkmcnt(0)707; GFX9-NEXT: s_mul_hi_i32 s4, s6, 0x50708; GFX9-NEXT: s_mulk_i32 s6, 0x50709; GFX9-NEXT: v_mov_b32_e32 v0, s6710; GFX9-NEXT: v_mov_b32_e32 v1, s4711; GFX9-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0712; GFX9-NEXT: s_endpgm713;714; GFX10-LABEL: mul64_sext_c:715; GFX10: ; %bb.0: ; %entry716; GFX10-NEXT: s_clause 0x1717; GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c718; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24719; GFX10-NEXT: s_waitcnt lgkmcnt(0)720; GFX10-NEXT: s_mul_i32 s3, s2, 0x50721; GFX10-NEXT: s_mul_hi_i32 s2, s2, 0x50722; GFX10-NEXT: v_mov_b32_e32 v0, s3723; GFX10-NEXT: v_mov_b32_e32 v1, s2724; GFX10-NEXT: s_mov_b32 s3, 0x31016000725; GFX10-NEXT: s_mov_b32 s2, -1726; GFX10-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0727; GFX10-NEXT: s_endpgm728;729; GFX11-LABEL: mul64_sext_c:730; GFX11: ; %bb.0: ; %entry731; GFX11-NEXT: s_clause 0x1732; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c733; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24734; GFX11-NEXT: s_waitcnt lgkmcnt(0)735; GFX11-NEXT: s_mul_i32 s3, s2, 0x50736; GFX11-NEXT: s_mul_hi_i32 s2, s2, 0x50737; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)738; GFX11-NEXT: v_dual_mov_b32 v0, s3 :: v_dual_mov_b32 v1, s2739; GFX11-NEXT: s_mov_b32 s3, 0x31016000740; GFX11-NEXT: s_mov_b32 s2, -1741; GFX11-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0742; GFX11-NEXT: s_endpgm743;744; GFX12-LABEL: mul64_sext_c:745; GFX12: ; %bb.0: ; %entry746; GFX12-NEXT: s_load_b96 s[0:2], s[4:5], 0x24747; GFX12-NEXT: s_wait_kmcnt 0x0748; GFX12-NEXT: s_ashr_i32 s3, s2, 31749; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)750; GFX12-NEXT: s_mul_u64 s[4:5], s[2:3], 0x50751; GFX12-NEXT: s_mov_b32 s3, 0x31016000752; GFX12-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5753; GFX12-NEXT: s_mov_b32 s2, -1754; GFX12-NEXT: buffer_store_b64 v[0:1], off, s[0:3], null755; GFX12-NEXT: s_endpgm756;757; GFX1250-LABEL: mul64_sext_c:758; GFX1250: ; %bb.0: ; %entry759; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1760; GFX1250-NEXT: s_load_b96 s[0:2], s[4:5], 0x24761; GFX1250-NEXT: s_wait_kmcnt 0x0762; GFX1250-NEXT: s_ashr_i32 s3, s2, 31763; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1)764; GFX1250-NEXT: s_mul_u64 s[4:5], s[2:3], 0x50765; GFX1250-NEXT: s_mov_b32 s3, 0x31016000766; GFX1250-NEXT: v_mov_b64_e32 v[0:1], s[4:5]767; GFX1250-NEXT: s_mov_b32 s2, -1768; GFX1250-NEXT: buffer_store_b64 v[0:1], off, s[0:3], null769; GFX1250-NEXT: s_endpgm770;771; EG-LABEL: mul64_sext_c:772; EG: ; %bb.0: ; %entry773; EG-NEXT: ALU 4, @4, KC0[CB0:0-32], KC1[]774; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1775; EG-NEXT: CF_END776; EG-NEXT: PAD777; EG-NEXT: ALU clause starting at 4:778; EG-NEXT: MULHI_INT * T0.Y, KC0[2].Z, literal.x,779; EG-NEXT: 80(1.121039e-43), 0(0.000000e+00)780; EG-NEXT: LSHR T1.X, KC0[2].Y, literal.x,781; EG-NEXT: MULLO_INT * T0.X, KC0[2].Z, literal.y,782; EG-NEXT: 2(2.802597e-45), 80(1.121039e-43)783entry:784 %0 = sext i32 %in to i64785 %1 = mul i64 %0, 80786 store i64 %1, ptr addrspace(1) %out787 ret void788}789 790define amdgpu_kernel void @mul64_zext_c(ptr addrspace(1) %out, i32 %in) {791; SI-LABEL: mul64_zext_c:792; SI: ; %bb.0: ; %entry793; SI-NEXT: s_load_dword s6, s[4:5], 0xb794; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9795; SI-NEXT: v_mov_b32_e32 v0, 0x50796; SI-NEXT: s_mov_b32 s3, 0xf000797; SI-NEXT: s_mov_b32 s2, -1798; SI-NEXT: s_waitcnt lgkmcnt(0)799; SI-NEXT: v_mul_hi_u32 v1, s6, v0800; SI-NEXT: s_mulk_i32 s6, 0x50801; SI-NEXT: v_mov_b32_e32 v0, s6802; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0803; SI-NEXT: s_endpgm804;805; VI-LABEL: mul64_zext_c:806; VI: ; %bb.0: ; %entry807; VI-NEXT: s_load_dword s2, s[4:5], 0x2c808; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24809; VI-NEXT: v_mov_b32_e32 v0, 0x50810; VI-NEXT: s_waitcnt lgkmcnt(0)811; VI-NEXT: v_mad_u64_u32 v[0:1], s[2:3], s2, v0, 0812; VI-NEXT: s_mov_b32 s3, 0xf000813; VI-NEXT: s_mov_b32 s2, -1814; VI-NEXT: s_nop 2815; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0816; VI-NEXT: s_endpgm817;818; GFX9-LABEL: mul64_zext_c:819; GFX9: ; %bb.0: ; %entry820; GFX9-NEXT: s_load_dword s6, s[4:5], 0x2c821; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24822; GFX9-NEXT: s_mov_b32 s3, 0xf000823; GFX9-NEXT: s_mov_b32 s2, -1824; GFX9-NEXT: s_waitcnt lgkmcnt(0)825; GFX9-NEXT: s_mul_hi_u32 s4, s6, 0x50826; GFX9-NEXT: s_mulk_i32 s6, 0x50827; GFX9-NEXT: v_mov_b32_e32 v0, s6828; GFX9-NEXT: v_mov_b32_e32 v1, s4829; GFX9-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0830; GFX9-NEXT: s_endpgm831;832; GFX10-LABEL: mul64_zext_c:833; GFX10: ; %bb.0: ; %entry834; GFX10-NEXT: s_clause 0x1835; GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c836; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24837; GFX10-NEXT: s_waitcnt lgkmcnt(0)838; GFX10-NEXT: s_mul_i32 s3, s2, 0x50839; GFX10-NEXT: s_mul_hi_u32 s2, s2, 0x50840; GFX10-NEXT: v_mov_b32_e32 v0, s3841; GFX10-NEXT: v_mov_b32_e32 v1, s2842; GFX10-NEXT: s_mov_b32 s3, 0x31016000843; GFX10-NEXT: s_mov_b32 s2, -1844; GFX10-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0845; GFX10-NEXT: s_endpgm846;847; GFX11-LABEL: mul64_zext_c:848; GFX11: ; %bb.0: ; %entry849; GFX11-NEXT: s_clause 0x1850; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c851; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24852; GFX11-NEXT: s_waitcnt lgkmcnt(0)853; GFX11-NEXT: s_mul_i32 s3, s2, 0x50854; GFX11-NEXT: s_mul_hi_u32 s2, s2, 0x50855; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)856; GFX11-NEXT: v_dual_mov_b32 v0, s3 :: v_dual_mov_b32 v1, s2857; GFX11-NEXT: s_mov_b32 s3, 0x31016000858; GFX11-NEXT: s_mov_b32 s2, -1859; GFX11-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0860; GFX11-NEXT: s_endpgm861;862; GFX12-LABEL: mul64_zext_c:863; GFX12: ; %bb.0: ; %entry864; GFX12-NEXT: s_load_b96 s[0:2], s[4:5], 0x24865; GFX12-NEXT: s_mov_b32 s3, 0866; GFX12-NEXT: s_wait_kmcnt 0x0867; GFX12-NEXT: s_mul_u64 s[4:5], s[2:3], 0x50868; GFX12-NEXT: s_mov_b32 s3, 0x31016000869; GFX12-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5870; GFX12-NEXT: s_mov_b32 s2, -1871; GFX12-NEXT: buffer_store_b64 v[0:1], off, s[0:3], null872; GFX12-NEXT: s_endpgm873;874; GFX1250-LABEL: mul64_zext_c:875; GFX1250: ; %bb.0: ; %entry876; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1877; GFX1250-NEXT: s_load_b96 s[0:2], s[4:5], 0x24878; GFX1250-NEXT: s_mov_b32 s3, 0879; GFX1250-NEXT: s_wait_kmcnt 0x0880; GFX1250-NEXT: s_mul_u64 s[4:5], s[2:3], 0x50881; GFX1250-NEXT: s_mov_b32 s3, 0x31016000882; GFX1250-NEXT: v_mov_b64_e32 v[0:1], s[4:5]883; GFX1250-NEXT: s_mov_b32 s2, -1884; GFX1250-NEXT: buffer_store_b64 v[0:1], off, s[0:3], null885; GFX1250-NEXT: s_endpgm886;887; EG-LABEL: mul64_zext_c:888; EG: ; %bb.0: ; %entry889; EG-NEXT: ALU 4, @4, KC0[CB0:0-32], KC1[]890; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1891; EG-NEXT: CF_END892; EG-NEXT: PAD893; EG-NEXT: ALU clause starting at 4:894; EG-NEXT: MULHI * T0.Y, KC0[2].Z, literal.x,895; EG-NEXT: 80(1.121039e-43), 0(0.000000e+00)896; EG-NEXT: LSHR T1.X, KC0[2].Y, literal.x,897; EG-NEXT: MULLO_INT * T0.X, KC0[2].Z, literal.y,898; EG-NEXT: 2(2.802597e-45), 80(1.121039e-43)899entry:900 %0 = zext i32 %in to i64901 %1 = mul i64 %0, 80902 store i64 %1, ptr addrspace(1) %out903 ret void904}905 906define amdgpu_kernel void @v_mul64_sext_c(ptr addrspace(1) %out, ptr addrspace(1) %in) {907; SI-LABEL: v_mul64_sext_c:908; SI: ; %bb.0: ; %entry909; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9910; SI-NEXT: s_mov_b32 s7, 0xf000911; SI-NEXT: s_mov_b32 s6, -1912; SI-NEXT: s_mov_b32 s10, s6913; SI-NEXT: s_mov_b32 s11, s7914; SI-NEXT: s_waitcnt lgkmcnt(0)915; SI-NEXT: s_mov_b32 s8, s2916; SI-NEXT: s_mov_b32 s9, s3917; SI-NEXT: buffer_load_dword v0, off, s[8:11], 0918; SI-NEXT: s_movk_i32 s2, 0x50919; SI-NEXT: s_mov_b32 s4, s0920; SI-NEXT: s_mov_b32 s5, s1921; SI-NEXT: s_waitcnt vmcnt(0)922; SI-NEXT: v_mul_hi_i32 v1, v0, s2923; SI-NEXT: v_mul_lo_u32 v0, v0, s2924; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0925; SI-NEXT: s_endpgm926;927; VI-LABEL: v_mul64_sext_c:928; VI: ; %bb.0: ; %entry929; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24930; VI-NEXT: s_mov_b32 s7, 0xf000931; VI-NEXT: s_mov_b32 s6, -1932; VI-NEXT: s_mov_b32 s10, s6933; VI-NEXT: s_mov_b32 s11, s7934; VI-NEXT: s_waitcnt lgkmcnt(0)935; VI-NEXT: s_mov_b32 s8, s2936; VI-NEXT: s_mov_b32 s9, s3937; VI-NEXT: buffer_load_dword v0, off, s[8:11], 0938; VI-NEXT: s_movk_i32 s2, 0x50939; VI-NEXT: s_mov_b32 s4, s0940; VI-NEXT: s_mov_b32 s5, s1941; VI-NEXT: s_waitcnt vmcnt(0)942; VI-NEXT: v_mad_i64_i32 v[0:1], s[2:3], v0, s2, 0943; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0944; VI-NEXT: s_endpgm945;946; GFX9-LABEL: v_mul64_sext_c:947; GFX9: ; %bb.0: ; %entry948; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24949; GFX9-NEXT: s_mov_b32 s7, 0xf000950; GFX9-NEXT: s_mov_b32 s6, -1951; GFX9-NEXT: s_mov_b32 s10, s6952; GFX9-NEXT: s_mov_b32 s11, s7953; GFX9-NEXT: s_waitcnt lgkmcnt(0)954; GFX9-NEXT: s_mov_b32 s8, s2955; GFX9-NEXT: s_mov_b32 s9, s3956; GFX9-NEXT: buffer_load_dword v0, off, s[8:11], 0957; GFX9-NEXT: s_movk_i32 s2, 0x50958; GFX9-NEXT: s_mov_b32 s4, s0959; GFX9-NEXT: s_mov_b32 s5, s1960; GFX9-NEXT: s_waitcnt vmcnt(0)961; GFX9-NEXT: v_mul_hi_i32 v1, v0, s2962; GFX9-NEXT: v_mul_lo_u32 v0, v0, s2963; GFX9-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0964; GFX9-NEXT: s_endpgm965;966; GFX10-LABEL: v_mul64_sext_c:967; GFX10: ; %bb.0: ; %entry968; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24969; GFX10-NEXT: s_mov_b32 s6, -1970; GFX10-NEXT: s_mov_b32 s7, 0x31016000971; GFX10-NEXT: s_mov_b32 s10, s6972; GFX10-NEXT: s_mov_b32 s11, s7973; GFX10-NEXT: s_waitcnt lgkmcnt(0)974; GFX10-NEXT: s_mov_b32 s8, s2975; GFX10-NEXT: s_mov_b32 s9, s3976; GFX10-NEXT: s_mov_b32 s4, s0977; GFX10-NEXT: buffer_load_dword v0, off, s[8:11], 0978; GFX10-NEXT: s_mov_b32 s5, s1979; GFX10-NEXT: s_waitcnt vmcnt(0)980; GFX10-NEXT: v_mul_hi_i32 v1, 0x50, v0981; GFX10-NEXT: v_mul_lo_u32 v0, 0x50, v0982; GFX10-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0983; GFX10-NEXT: s_endpgm984;985; GFX11-LABEL: v_mul64_sext_c:986; GFX11: ; %bb.0: ; %entry987; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24988; GFX11-NEXT: s_mov_b32 s6, -1989; GFX11-NEXT: s_mov_b32 s7, 0x31016000990; GFX11-NEXT: s_mov_b32 s10, s6991; GFX11-NEXT: s_mov_b32 s11, s7992; GFX11-NEXT: s_waitcnt lgkmcnt(0)993; GFX11-NEXT: s_mov_b32 s8, s2994; GFX11-NEXT: s_mov_b32 s9, s3995; GFX11-NEXT: s_mov_b32 s4, s0996; GFX11-NEXT: buffer_load_b32 v0, off, s[8:11], 0997; GFX11-NEXT: s_mov_b32 s5, s1998; GFX11-NEXT: s_waitcnt vmcnt(0)999; GFX11-NEXT: v_mul_hi_i32 v1, 0x50, v01000; GFX11-NEXT: v_mul_lo_u32 v0, 0x50, v01001; GFX11-NEXT: buffer_store_b64 v[0:1], off, s[4:7], 01002; GFX11-NEXT: s_endpgm1003;1004; GFX12-LABEL: v_mul64_sext_c:1005; GFX12: ; %bb.0: ; %entry1006; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x241007; GFX12-NEXT: s_mov_b32 s6, -11008; GFX12-NEXT: s_mov_b32 s7, 0x310160001009; GFX12-NEXT: s_mov_b32 s10, s61010; GFX12-NEXT: s_mov_b32 s11, s71011; GFX12-NEXT: s_wait_kmcnt 0x01012; GFX12-NEXT: s_mov_b32 s8, s21013; GFX12-NEXT: s_mov_b32 s9, s31014; GFX12-NEXT: s_mov_b32 s4, s01015; GFX12-NEXT: buffer_load_b32 v0, off, s[8:11], null1016; GFX12-NEXT: s_mov_b32 s5, s11017; GFX12-NEXT: s_wait_loadcnt 0x01018; GFX12-NEXT: v_mul_hi_i32 v1, 0x50, v01019; GFX12-NEXT: v_mul_lo_u32 v0, 0x50, v01020; GFX12-NEXT: buffer_store_b64 v[0:1], off, s[4:7], null1021; GFX12-NEXT: s_endpgm1022;1023; GFX1250-LABEL: v_mul64_sext_c:1024; GFX1250: ; %bb.0: ; %entry1025; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11026; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x241027; GFX1250-NEXT: s_mov_b32 s6, -11028; GFX1250-NEXT: s_mov_b32 s7, 0x310160001029; GFX1250-NEXT: s_mov_b32 s10, s61030; GFX1250-NEXT: s_mov_b32 s11, s71031; GFX1250-NEXT: s_wait_kmcnt 0x01032; GFX1250-NEXT: s_mov_b32 s8, s21033; GFX1250-NEXT: s_mov_b32 s9, s31034; GFX1250-NEXT: s_mov_b32 s4, s01035; GFX1250-NEXT: buffer_load_b32 v0, off, s[8:11], null1036; GFX1250-NEXT: s_mov_b32 s5, s11037; GFX1250-NEXT: s_wait_loadcnt 0x01038; GFX1250-NEXT: v_ashrrev_i32_e32 v1, 31, v01039; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)1040; GFX1250-NEXT: v_mul_u64_e32 v[0:1], 0x50, v[0:1]1041; GFX1250-NEXT: buffer_store_b64 v[0:1], off, s[4:7], null1042; GFX1250-NEXT: s_endpgm1043;1044; EG-LABEL: v_mul64_sext_c:1045; EG: ; %bb.0: ; %entry1046; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]1047; EG-NEXT: TEX 0 @61048; EG-NEXT: ALU 4, @9, KC0[CB0:0-32], KC1[]1049; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 11050; EG-NEXT: CF_END1051; EG-NEXT: PAD1052; EG-NEXT: Fetch clause starting at 6:1053; EG-NEXT: VTX_READ_32 T0.X, T0.X, 0, #11054; EG-NEXT: ALU clause starting at 8:1055; EG-NEXT: MOV * T0.X, KC0[2].Z,1056; EG-NEXT: ALU clause starting at 9:1057; EG-NEXT: MULHI_INT * T0.Y, T0.X, literal.x,1058; EG-NEXT: 80(1.121039e-43), 0(0.000000e+00)1059; EG-NEXT: LSHR T1.X, KC0[2].Y, literal.x,1060; EG-NEXT: MULLO_INT * T0.X, T0.X, literal.y,1061; EG-NEXT: 2(2.802597e-45), 80(1.121039e-43)1062entry:1063 %val = load i32, ptr addrspace(1) %in, align 41064 %ext = sext i32 %val to i641065 %mul = mul i64 %ext, 801066 store i64 %mul, ptr addrspace(1) %out, align 81067 ret void1068}1069 1070define amdgpu_kernel void @v_mul64_zext_c(ptr addrspace(1) %out, ptr addrspace(1) %in) {1071; SI-LABEL: v_mul64_zext_c:1072; SI: ; %bb.0: ; %entry1073; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91074; SI-NEXT: s_mov_b32 s7, 0xf0001075; SI-NEXT: s_mov_b32 s6, -11076; SI-NEXT: s_mov_b32 s10, s61077; SI-NEXT: s_mov_b32 s11, s71078; SI-NEXT: s_waitcnt lgkmcnt(0)1079; SI-NEXT: s_mov_b32 s8, s21080; SI-NEXT: s_mov_b32 s9, s31081; SI-NEXT: buffer_load_dword v0, off, s[8:11], 01082; SI-NEXT: s_movk_i32 s2, 0x501083; SI-NEXT: s_mov_b32 s4, s01084; SI-NEXT: s_mov_b32 s5, s11085; SI-NEXT: s_waitcnt vmcnt(0)1086; SI-NEXT: v_mul_hi_u32 v1, v0, s21087; SI-NEXT: v_mul_lo_u32 v0, v0, s21088; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 01089; SI-NEXT: s_endpgm1090;1091; VI-LABEL: v_mul64_zext_c:1092; VI: ; %bb.0: ; %entry1093; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241094; VI-NEXT: s_mov_b32 s7, 0xf0001095; VI-NEXT: s_mov_b32 s6, -11096; VI-NEXT: s_mov_b32 s10, s61097; VI-NEXT: s_mov_b32 s11, s71098; VI-NEXT: s_waitcnt lgkmcnt(0)1099; VI-NEXT: s_mov_b32 s8, s21100; VI-NEXT: s_mov_b32 s9, s31101; VI-NEXT: buffer_load_dword v0, off, s[8:11], 01102; VI-NEXT: s_movk_i32 s2, 0x501103; VI-NEXT: s_mov_b32 s4, s01104; VI-NEXT: s_mov_b32 s5, s11105; VI-NEXT: s_waitcnt vmcnt(0)1106; VI-NEXT: v_mad_u64_u32 v[0:1], s[2:3], v0, s2, 01107; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 01108; VI-NEXT: s_endpgm1109;1110; GFX9-LABEL: v_mul64_zext_c:1111; GFX9: ; %bb.0: ; %entry1112; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241113; GFX9-NEXT: s_mov_b32 s7, 0xf0001114; GFX9-NEXT: s_mov_b32 s6, -11115; GFX9-NEXT: s_mov_b32 s10, s61116; GFX9-NEXT: s_mov_b32 s11, s71117; GFX9-NEXT: s_waitcnt lgkmcnt(0)1118; GFX9-NEXT: s_mov_b32 s8, s21119; GFX9-NEXT: s_mov_b32 s9, s31120; GFX9-NEXT: buffer_load_dword v0, off, s[8:11], 01121; GFX9-NEXT: s_movk_i32 s2, 0x501122; GFX9-NEXT: s_mov_b32 s4, s01123; GFX9-NEXT: s_mov_b32 s5, s11124; GFX9-NEXT: s_waitcnt vmcnt(0)1125; GFX9-NEXT: v_mul_hi_u32 v1, v0, s21126; GFX9-NEXT: v_mul_lo_u32 v0, v0, s21127; GFX9-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 01128; GFX9-NEXT: s_endpgm1129;1130; GFX10-LABEL: v_mul64_zext_c:1131; GFX10: ; %bb.0: ; %entry1132; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241133; GFX10-NEXT: s_mov_b32 s6, -11134; GFX10-NEXT: s_mov_b32 s7, 0x310160001135; GFX10-NEXT: s_mov_b32 s10, s61136; GFX10-NEXT: s_mov_b32 s11, s71137; GFX10-NEXT: s_waitcnt lgkmcnt(0)1138; GFX10-NEXT: s_mov_b32 s8, s21139; GFX10-NEXT: s_mov_b32 s9, s31140; GFX10-NEXT: s_mov_b32 s4, s01141; GFX10-NEXT: buffer_load_dword v0, off, s[8:11], 01142; GFX10-NEXT: s_mov_b32 s5, s11143; GFX10-NEXT: s_waitcnt vmcnt(0)1144; GFX10-NEXT: v_mul_hi_u32 v1, 0x50, v01145; GFX10-NEXT: v_mul_lo_u32 v0, 0x50, v01146; GFX10-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 01147; GFX10-NEXT: s_endpgm1148;1149; GFX11-LABEL: v_mul64_zext_c:1150; GFX11: ; %bb.0: ; %entry1151; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x241152; GFX11-NEXT: s_mov_b32 s6, -11153; GFX11-NEXT: s_mov_b32 s7, 0x310160001154; GFX11-NEXT: s_mov_b32 s10, s61155; GFX11-NEXT: s_mov_b32 s11, s71156; GFX11-NEXT: s_waitcnt lgkmcnt(0)1157; GFX11-NEXT: s_mov_b32 s8, s21158; GFX11-NEXT: s_mov_b32 s9, s31159; GFX11-NEXT: s_mov_b32 s4, s01160; GFX11-NEXT: buffer_load_b32 v0, off, s[8:11], 01161; GFX11-NEXT: s_mov_b32 s5, s11162; GFX11-NEXT: s_waitcnt vmcnt(0)1163; GFX11-NEXT: v_mul_hi_u32 v1, 0x50, v01164; GFX11-NEXT: v_mul_lo_u32 v0, 0x50, v01165; GFX11-NEXT: buffer_store_b64 v[0:1], off, s[4:7], 01166; GFX11-NEXT: s_endpgm1167;1168; GFX12-LABEL: v_mul64_zext_c:1169; GFX12: ; %bb.0: ; %entry1170; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x241171; GFX12-NEXT: s_mov_b32 s6, -11172; GFX12-NEXT: s_mov_b32 s7, 0x310160001173; GFX12-NEXT: s_mov_b32 s10, s61174; GFX12-NEXT: s_mov_b32 s11, s71175; GFX12-NEXT: s_wait_kmcnt 0x01176; GFX12-NEXT: s_mov_b32 s8, s21177; GFX12-NEXT: s_mov_b32 s9, s31178; GFX12-NEXT: s_mov_b32 s4, s01179; GFX12-NEXT: buffer_load_b32 v0, off, s[8:11], null1180; GFX12-NEXT: s_mov_b32 s5, s11181; GFX12-NEXT: s_wait_loadcnt 0x01182; GFX12-NEXT: v_mul_hi_u32 v1, 0x50, v01183; GFX12-NEXT: v_mul_lo_u32 v0, 0x50, v01184; GFX12-NEXT: buffer_store_b64 v[0:1], off, s[4:7], null1185; GFX12-NEXT: s_endpgm1186;1187; GFX1250-LABEL: v_mul64_zext_c:1188; GFX1250: ; %bb.0: ; %entry1189; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11190; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x241191; GFX1250-NEXT: s_mov_b32 s6, -11192; GFX1250-NEXT: s_mov_b32 s7, 0x310160001193; GFX1250-NEXT: s_mov_b32 s10, s61194; GFX1250-NEXT: s_mov_b32 s11, s71195; GFX1250-NEXT: v_mov_b32_e32 v1, 01196; GFX1250-NEXT: s_wait_kmcnt 0x01197; GFX1250-NEXT: s_mov_b32 s8, s21198; GFX1250-NEXT: s_mov_b32 s9, s31199; GFX1250-NEXT: s_mov_b32 s4, s01200; GFX1250-NEXT: buffer_load_b32 v0, off, s[8:11], null1201; GFX1250-NEXT: s_mov_b32 s5, s11202; GFX1250-NEXT: s_wait_loadcnt 0x01203; GFX1250-NEXT: v_mul_u64_e32 v[0:1], 0x50, v[0:1]1204; GFX1250-NEXT: buffer_store_b64 v[0:1], off, s[4:7], null1205; GFX1250-NEXT: s_endpgm1206;1207; EG-LABEL: v_mul64_zext_c:1208; EG: ; %bb.0: ; %entry1209; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]1210; EG-NEXT: TEX 0 @61211; EG-NEXT: ALU 4, @9, KC0[CB0:0-32], KC1[]1212; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 11213; EG-NEXT: CF_END1214; EG-NEXT: PAD1215; EG-NEXT: Fetch clause starting at 6:1216; EG-NEXT: VTX_READ_32 T0.X, T0.X, 0, #11217; EG-NEXT: ALU clause starting at 8:1218; EG-NEXT: MOV * T0.X, KC0[2].Z,1219; EG-NEXT: ALU clause starting at 9:1220; EG-NEXT: MULHI * T0.Y, T0.X, literal.x,1221; EG-NEXT: 80(1.121039e-43), 0(0.000000e+00)1222; EG-NEXT: LSHR T1.X, KC0[2].Y, literal.x,1223; EG-NEXT: MULLO_INT * T0.X, T0.X, literal.y,1224; EG-NEXT: 2(2.802597e-45), 80(1.121039e-43)1225entry:1226 %val = load i32, ptr addrspace(1) %in, align 41227 %ext = zext i32 %val to i641228 %mul = mul i64 %ext, 801229 store i64 %mul, ptr addrspace(1) %out, align 81230 ret void1231}1232 1233define amdgpu_kernel void @v_mul64_sext_inline_imm(ptr addrspace(1) %out, ptr addrspace(1) %in) {1234; SI-LABEL: v_mul64_sext_inline_imm:1235; SI: ; %bb.0: ; %entry1236; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91237; SI-NEXT: s_mov_b32 s7, 0xf0001238; SI-NEXT: s_mov_b32 s6, -11239; SI-NEXT: s_mov_b32 s10, s61240; SI-NEXT: s_mov_b32 s11, s71241; SI-NEXT: s_waitcnt lgkmcnt(0)1242; SI-NEXT: s_mov_b32 s8, s21243; SI-NEXT: s_mov_b32 s9, s31244; SI-NEXT: buffer_load_dword v0, off, s[8:11], 01245; SI-NEXT: s_mov_b32 s4, s01246; SI-NEXT: s_mov_b32 s5, s11247; SI-NEXT: s_waitcnt vmcnt(0)1248; SI-NEXT: v_mul_hi_i32 v1, v0, 91249; SI-NEXT: v_mul_lo_u32 v0, v0, 91250; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 01251; SI-NEXT: s_endpgm1252;1253; VI-LABEL: v_mul64_sext_inline_imm:1254; VI: ; %bb.0: ; %entry1255; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241256; VI-NEXT: s_mov_b32 s7, 0xf0001257; VI-NEXT: s_mov_b32 s6, -11258; VI-NEXT: s_mov_b32 s10, s61259; VI-NEXT: s_mov_b32 s11, s71260; VI-NEXT: s_waitcnt lgkmcnt(0)1261; VI-NEXT: s_mov_b32 s8, s21262; VI-NEXT: s_mov_b32 s9, s31263; VI-NEXT: buffer_load_dword v0, off, s[8:11], 01264; VI-NEXT: s_mov_b32 s4, s01265; VI-NEXT: s_mov_b32 s5, s11266; VI-NEXT: s_waitcnt vmcnt(0)1267; VI-NEXT: v_mad_i64_i32 v[0:1], s[2:3], v0, 9, 01268; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 01269; VI-NEXT: s_endpgm1270;1271; GFX9-LABEL: v_mul64_sext_inline_imm:1272; GFX9: ; %bb.0: ; %entry1273; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241274; GFX9-NEXT: s_mov_b32 s7, 0xf0001275; GFX9-NEXT: s_mov_b32 s6, -11276; GFX9-NEXT: s_mov_b32 s10, s61277; GFX9-NEXT: s_mov_b32 s11, s71278; GFX9-NEXT: s_waitcnt lgkmcnt(0)1279; GFX9-NEXT: s_mov_b32 s8, s21280; GFX9-NEXT: s_mov_b32 s9, s31281; GFX9-NEXT: buffer_load_dword v0, off, s[8:11], 01282; GFX9-NEXT: s_mov_b32 s4, s01283; GFX9-NEXT: s_mov_b32 s5, s11284; GFX9-NEXT: s_waitcnt vmcnt(0)1285; GFX9-NEXT: v_mul_hi_i32 v1, v0, 91286; GFX9-NEXT: v_mul_lo_u32 v0, v0, 91287; GFX9-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 01288; GFX9-NEXT: s_endpgm1289;1290; GFX10-LABEL: v_mul64_sext_inline_imm:1291; GFX10: ; %bb.0: ; %entry1292; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241293; GFX10-NEXT: s_mov_b32 s6, -11294; GFX10-NEXT: s_mov_b32 s7, 0x310160001295; GFX10-NEXT: s_mov_b32 s10, s61296; GFX10-NEXT: s_mov_b32 s11, s71297; GFX10-NEXT: s_waitcnt lgkmcnt(0)1298; GFX10-NEXT: s_mov_b32 s8, s21299; GFX10-NEXT: s_mov_b32 s9, s31300; GFX10-NEXT: s_mov_b32 s4, s01301; GFX10-NEXT: buffer_load_dword v0, off, s[8:11], 01302; GFX10-NEXT: s_mov_b32 s5, s11303; GFX10-NEXT: s_waitcnt vmcnt(0)1304; GFX10-NEXT: v_mul_hi_i32 v1, v0, 91305; GFX10-NEXT: v_mul_lo_u32 v0, v0, 91306; GFX10-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 01307; GFX10-NEXT: s_endpgm1308;1309; GFX11-LABEL: v_mul64_sext_inline_imm:1310; GFX11: ; %bb.0: ; %entry1311; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x241312; GFX11-NEXT: s_mov_b32 s6, -11313; GFX11-NEXT: s_mov_b32 s7, 0x310160001314; GFX11-NEXT: s_mov_b32 s10, s61315; GFX11-NEXT: s_mov_b32 s11, s71316; GFX11-NEXT: s_waitcnt lgkmcnt(0)1317; GFX11-NEXT: s_mov_b32 s8, s21318; GFX11-NEXT: s_mov_b32 s9, s31319; GFX11-NEXT: s_mov_b32 s4, s01320; GFX11-NEXT: buffer_load_b32 v0, off, s[8:11], 01321; GFX11-NEXT: s_mov_b32 s5, s11322; GFX11-NEXT: s_waitcnt vmcnt(0)1323; GFX11-NEXT: v_mul_hi_i32 v1, v0, 91324; GFX11-NEXT: v_mul_lo_u32 v0, v0, 91325; GFX11-NEXT: buffer_store_b64 v[0:1], off, s[4:7], 01326; GFX11-NEXT: s_endpgm1327;1328; GFX12-LABEL: v_mul64_sext_inline_imm:1329; GFX12: ; %bb.0: ; %entry1330; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x241331; GFX12-NEXT: s_mov_b32 s6, -11332; GFX12-NEXT: s_mov_b32 s7, 0x310160001333; GFX12-NEXT: s_mov_b32 s10, s61334; GFX12-NEXT: s_mov_b32 s11, s71335; GFX12-NEXT: s_wait_kmcnt 0x01336; GFX12-NEXT: s_mov_b32 s8, s21337; GFX12-NEXT: s_mov_b32 s9, s31338; GFX12-NEXT: s_mov_b32 s4, s01339; GFX12-NEXT: buffer_load_b32 v0, off, s[8:11], null1340; GFX12-NEXT: s_mov_b32 s5, s11341; GFX12-NEXT: s_wait_loadcnt 0x01342; GFX12-NEXT: v_mul_hi_i32 v1, 9, v01343; GFX12-NEXT: v_mul_lo_u32 v0, 9, v01344; GFX12-NEXT: buffer_store_b64 v[0:1], off, s[4:7], null1345; GFX12-NEXT: s_endpgm1346;1347; GFX1250-LABEL: v_mul64_sext_inline_imm:1348; GFX1250: ; %bb.0: ; %entry1349; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11350; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x241351; GFX1250-NEXT: s_mov_b32 s6, -11352; GFX1250-NEXT: s_mov_b32 s7, 0x310160001353; GFX1250-NEXT: s_mov_b32 s10, s61354; GFX1250-NEXT: s_mov_b32 s11, s71355; GFX1250-NEXT: s_wait_kmcnt 0x01356; GFX1250-NEXT: s_mov_b32 s8, s21357; GFX1250-NEXT: s_mov_b32 s9, s31358; GFX1250-NEXT: s_mov_b32 s4, s01359; GFX1250-NEXT: buffer_load_b32 v0, off, s[8:11], null1360; GFX1250-NEXT: s_mov_b32 s5, s11361; GFX1250-NEXT: s_wait_loadcnt 0x01362; GFX1250-NEXT: v_ashrrev_i32_e32 v1, 31, v01363; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)1364; GFX1250-NEXT: v_mul_u64_e32 v[0:1], 9, v[0:1]1365; GFX1250-NEXT: buffer_store_b64 v[0:1], off, s[4:7], null1366; GFX1250-NEXT: s_endpgm1367;1368; EG-LABEL: v_mul64_sext_inline_imm:1369; EG: ; %bb.0: ; %entry1370; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]1371; EG-NEXT: TEX 0 @61372; EG-NEXT: ALU 4, @9, KC0[CB0:0-32], KC1[]1373; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 11374; EG-NEXT: CF_END1375; EG-NEXT: PAD1376; EG-NEXT: Fetch clause starting at 6:1377; EG-NEXT: VTX_READ_32 T0.X, T0.X, 0, #11378; EG-NEXT: ALU clause starting at 8:1379; EG-NEXT: MOV * T0.X, KC0[2].Z,1380; EG-NEXT: ALU clause starting at 9:1381; EG-NEXT: MULHI_INT * T0.Y, T0.X, literal.x,1382; EG-NEXT: 9(1.261169e-44), 0(0.000000e+00)1383; EG-NEXT: LSHR T1.X, KC0[2].Y, literal.x,1384; EG-NEXT: MULLO_INT * T0.X, T0.X, literal.y,1385; EG-NEXT: 2(2.802597e-45), 9(1.261169e-44)1386entry:1387 %val = load i32, ptr addrspace(1) %in, align 41388 %ext = sext i32 %val to i641389 %mul = mul i64 %ext, 91390 store i64 %mul, ptr addrspace(1) %out, align 81391 ret void1392}1393 1394define amdgpu_kernel void @s_mul_i32(ptr addrspace(1) %out, [8 x i32], i32 %a, [8 x i32], i32 %b) nounwind {1395; SI-LABEL: s_mul_i32:1396; SI: ; %bb.0: ; %entry1397; SI-NEXT: s_load_dword s6, s[4:5], 0x131398; SI-NEXT: s_load_dword s7, s[4:5], 0x1c1399; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91400; SI-NEXT: s_mov_b32 s3, 0xf0001401; SI-NEXT: s_mov_b32 s2, -11402; SI-NEXT: s_waitcnt lgkmcnt(0)1403; SI-NEXT: s_mul_i32 s4, s6, s71404; SI-NEXT: v_mov_b32_e32 v0, s41405; SI-NEXT: buffer_store_dword v0, off, s[0:3], 01406; SI-NEXT: s_endpgm1407;1408; VI-LABEL: s_mul_i32:1409; VI: ; %bb.0: ; %entry1410; VI-NEXT: s_load_dword s6, s[4:5], 0x4c1411; VI-NEXT: s_load_dword s7, s[4:5], 0x701412; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241413; VI-NEXT: s_mov_b32 s3, 0xf0001414; VI-NEXT: s_mov_b32 s2, -11415; VI-NEXT: s_waitcnt lgkmcnt(0)1416; VI-NEXT: s_mul_i32 s4, s6, s71417; VI-NEXT: v_mov_b32_e32 v0, s41418; VI-NEXT: buffer_store_dword v0, off, s[0:3], 01419; VI-NEXT: s_endpgm1420;1421; GFX9-LABEL: s_mul_i32:1422; GFX9: ; %bb.0: ; %entry1423; GFX9-NEXT: s_load_dword s6, s[4:5], 0x4c1424; GFX9-NEXT: s_load_dword s7, s[4:5], 0x701425; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241426; GFX9-NEXT: s_mov_b32 s3, 0xf0001427; GFX9-NEXT: s_mov_b32 s2, -11428; GFX9-NEXT: s_waitcnt lgkmcnt(0)1429; GFX9-NEXT: s_mul_i32 s4, s6, s71430; GFX9-NEXT: v_mov_b32_e32 v0, s41431; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], 01432; GFX9-NEXT: s_endpgm1433;1434; GFX10-LABEL: s_mul_i32:1435; GFX10: ; %bb.0: ; %entry1436; GFX10-NEXT: s_clause 0x21437; GFX10-NEXT: s_load_dword s2, s[4:5], 0x4c1438; GFX10-NEXT: s_load_dword s3, s[4:5], 0x701439; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241440; GFX10-NEXT: s_waitcnt lgkmcnt(0)1441; GFX10-NEXT: s_mul_i32 s2, s2, s31442; GFX10-NEXT: s_mov_b32 s3, 0x310160001443; GFX10-NEXT: v_mov_b32_e32 v0, s21444; GFX10-NEXT: s_mov_b32 s2, -11445; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], 01446; GFX10-NEXT: s_endpgm1447;1448; GFX11-LABEL: s_mul_i32:1449; GFX11: ; %bb.0: ; %entry1450; GFX11-NEXT: s_clause 0x21451; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x4c1452; GFX11-NEXT: s_load_b32 s3, s[4:5], 0x701453; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x241454; GFX11-NEXT: s_waitcnt lgkmcnt(0)1455; GFX11-NEXT: s_mul_i32 s2, s2, s31456; GFX11-NEXT: s_mov_b32 s3, 0x310160001457; GFX11-NEXT: v_mov_b32_e32 v0, s21458; GFX11-NEXT: s_mov_b32 s2, -11459; GFX11-NEXT: buffer_store_b32 v0, off, s[0:3], 01460; GFX11-NEXT: s_endpgm1461;1462; GFX12-LABEL: s_mul_i32:1463; GFX12: ; %bb.0: ; %entry1464; GFX12-NEXT: s_clause 0x21465; GFX12-NEXT: s_load_b32 s2, s[4:5], 0x4c1466; GFX12-NEXT: s_load_b32 s3, s[4:5], 0x701467; GFX12-NEXT: s_load_b64 s[0:1], s[4:5], 0x241468; GFX12-NEXT: s_wait_kmcnt 0x01469; GFX12-NEXT: s_mul_i32 s2, s2, s31470; GFX12-NEXT: s_mov_b32 s3, 0x310160001471; GFX12-NEXT: v_mov_b32_e32 v0, s21472; GFX12-NEXT: s_mov_b32 s2, -11473; GFX12-NEXT: buffer_store_b32 v0, off, s[0:3], null1474; GFX12-NEXT: s_endpgm1475;1476; GFX1250-LABEL: s_mul_i32:1477; GFX1250: ; %bb.0: ; %entry1478; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11479; GFX1250-NEXT: s_clause 0x21480; GFX1250-NEXT: s_load_b32 s2, s[4:5], 0x4c1481; GFX1250-NEXT: s_load_b32 s3, s[4:5], 0x701482; GFX1250-NEXT: s_load_b64 s[0:1], s[4:5], 0x241483; GFX1250-NEXT: s_wait_kmcnt 0x01484; GFX1250-NEXT: s_mul_i32 s2, s2, s31485; GFX1250-NEXT: s_mov_b32 s3, 0x310160001486; GFX1250-NEXT: v_mov_b32_e32 v0, s21487; GFX1250-NEXT: s_mov_b32 s2, -11488; GFX1250-NEXT: buffer_store_b32 v0, off, s[0:3], null1489; GFX1250-NEXT: s_endpgm1490;1491; EG-LABEL: s_mul_i32:1492; EG: ; %bb.0: ; %entry1493; EG-NEXT: ALU 2, @4, KC0[CB0:0-32], KC1[]1494; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T1.X, T0.X, 11495; EG-NEXT: CF_END1496; EG-NEXT: PAD1497; EG-NEXT: ALU clause starting at 4:1498; EG-NEXT: LSHR * T0.X, KC0[2].Y, literal.x,1499; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)1500; EG-NEXT: MULLO_INT * T1.X, KC0[4].Z, KC0[6].W,1501entry:1502 %mul = mul i32 %a, %b1503 store i32 %mul, ptr addrspace(1) %out, align 41504 ret void1505}1506 1507define amdgpu_kernel void @v_mul_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) {1508; SI-LABEL: v_mul_i32:1509; SI: ; %bb.0: ; %entry1510; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91511; SI-NEXT: s_mov_b32 s7, 0xf0001512; SI-NEXT: s_mov_b32 s6, -11513; SI-NEXT: s_mov_b32 s10, s61514; SI-NEXT: s_mov_b32 s11, s71515; SI-NEXT: s_waitcnt lgkmcnt(0)1516; SI-NEXT: s_mov_b32 s8, s21517; SI-NEXT: s_mov_b32 s9, s31518; SI-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 01519; SI-NEXT: s_mov_b32 s4, s01520; SI-NEXT: s_mov_b32 s5, s11521; SI-NEXT: s_waitcnt vmcnt(0)1522; SI-NEXT: v_mul_lo_u32 v0, v0, v11523; SI-NEXT: buffer_store_dword v0, off, s[4:7], 01524; SI-NEXT: s_endpgm1525;1526; VI-LABEL: v_mul_i32:1527; VI: ; %bb.0: ; %entry1528; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241529; VI-NEXT: s_mov_b32 s7, 0xf0001530; VI-NEXT: s_mov_b32 s6, -11531; VI-NEXT: s_mov_b32 s10, s61532; VI-NEXT: s_mov_b32 s11, s71533; VI-NEXT: s_waitcnt lgkmcnt(0)1534; VI-NEXT: s_mov_b32 s8, s21535; VI-NEXT: s_mov_b32 s9, s31536; VI-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 01537; VI-NEXT: s_mov_b32 s4, s01538; VI-NEXT: s_mov_b32 s5, s11539; VI-NEXT: s_waitcnt vmcnt(0)1540; VI-NEXT: v_mul_lo_u32 v0, v0, v11541; VI-NEXT: buffer_store_dword v0, off, s[4:7], 01542; VI-NEXT: s_endpgm1543;1544; GFX9-LABEL: v_mul_i32:1545; GFX9: ; %bb.0: ; %entry1546; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241547; GFX9-NEXT: s_mov_b32 s7, 0xf0001548; GFX9-NEXT: s_mov_b32 s6, -11549; GFX9-NEXT: s_mov_b32 s10, s61550; GFX9-NEXT: s_mov_b32 s11, s71551; GFX9-NEXT: s_waitcnt lgkmcnt(0)1552; GFX9-NEXT: s_mov_b32 s8, s21553; GFX9-NEXT: s_mov_b32 s9, s31554; GFX9-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 01555; GFX9-NEXT: s_mov_b32 s4, s01556; GFX9-NEXT: s_mov_b32 s5, s11557; GFX9-NEXT: s_waitcnt vmcnt(0)1558; GFX9-NEXT: v_mul_lo_u32 v0, v0, v11559; GFX9-NEXT: buffer_store_dword v0, off, s[4:7], 01560; GFX9-NEXT: s_endpgm1561;1562; GFX10-LABEL: v_mul_i32:1563; GFX10: ; %bb.0: ; %entry1564; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241565; GFX10-NEXT: s_mov_b32 s6, -11566; GFX10-NEXT: s_mov_b32 s7, 0x310160001567; GFX10-NEXT: s_mov_b32 s10, s61568; GFX10-NEXT: s_mov_b32 s11, s71569; GFX10-NEXT: s_waitcnt lgkmcnt(0)1570; GFX10-NEXT: s_mov_b32 s8, s21571; GFX10-NEXT: s_mov_b32 s9, s31572; GFX10-NEXT: s_mov_b32 s4, s01573; GFX10-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 01574; GFX10-NEXT: s_mov_b32 s5, s11575; GFX10-NEXT: s_waitcnt vmcnt(0)1576; GFX10-NEXT: v_mul_lo_u32 v0, v0, v11577; GFX10-NEXT: buffer_store_dword v0, off, s[4:7], 01578; GFX10-NEXT: s_endpgm1579;1580; GFX11-LABEL: v_mul_i32:1581; GFX11: ; %bb.0: ; %entry1582; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x241583; GFX11-NEXT: s_mov_b32 s6, -11584; GFX11-NEXT: s_mov_b32 s7, 0x310160001585; GFX11-NEXT: s_mov_b32 s10, s61586; GFX11-NEXT: s_mov_b32 s11, s71587; GFX11-NEXT: s_waitcnt lgkmcnt(0)1588; GFX11-NEXT: s_mov_b32 s8, s21589; GFX11-NEXT: s_mov_b32 s9, s31590; GFX11-NEXT: s_mov_b32 s4, s01591; GFX11-NEXT: buffer_load_b64 v[0:1], off, s[8:11], 01592; GFX11-NEXT: s_mov_b32 s5, s11593; GFX11-NEXT: s_waitcnt vmcnt(0)1594; GFX11-NEXT: v_mul_lo_u32 v0, v0, v11595; GFX11-NEXT: buffer_store_b32 v0, off, s[4:7], 01596; GFX11-NEXT: s_endpgm1597;1598; GFX12-LABEL: v_mul_i32:1599; GFX12: ; %bb.0: ; %entry1600; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x241601; GFX12-NEXT: s_mov_b32 s6, -11602; GFX12-NEXT: s_mov_b32 s7, 0x310160001603; GFX12-NEXT: s_mov_b32 s10, s61604; GFX12-NEXT: s_mov_b32 s11, s71605; GFX12-NEXT: s_wait_kmcnt 0x01606; GFX12-NEXT: s_mov_b32 s8, s21607; GFX12-NEXT: s_mov_b32 s9, s31608; GFX12-NEXT: s_mov_b32 s4, s01609; GFX12-NEXT: buffer_load_b64 v[0:1], off, s[8:11], null1610; GFX12-NEXT: s_mov_b32 s5, s11611; GFX12-NEXT: s_wait_loadcnt 0x01612; GFX12-NEXT: v_mul_lo_u32 v0, v0, v11613; GFX12-NEXT: buffer_store_b32 v0, off, s[4:7], null1614; GFX12-NEXT: s_endpgm1615;1616; GFX1250-LABEL: v_mul_i32:1617; GFX1250: ; %bb.0: ; %entry1618; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11619; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x241620; GFX1250-NEXT: s_mov_b32 s6, -11621; GFX1250-NEXT: s_mov_b32 s7, 0x310160001622; GFX1250-NEXT: s_mov_b32 s10, s61623; GFX1250-NEXT: s_mov_b32 s11, s71624; GFX1250-NEXT: s_wait_kmcnt 0x01625; GFX1250-NEXT: s_mov_b32 s8, s21626; GFX1250-NEXT: s_mov_b32 s9, s31627; GFX1250-NEXT: s_mov_b32 s4, s01628; GFX1250-NEXT: buffer_load_b64 v[0:1], off, s[8:11], null1629; GFX1250-NEXT: s_mov_b32 s5, s11630; GFX1250-NEXT: s_wait_loadcnt 0x01631; GFX1250-NEXT: v_mul_lo_u32 v0, v0, v11632; GFX1250-NEXT: buffer_store_b32 v0, off, s[4:7], null1633; GFX1250-NEXT: s_endpgm1634;1635; EG-LABEL: v_mul_i32:1636; EG: ; %bb.0: ; %entry1637; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]1638; EG-NEXT: TEX 0 @61639; EG-NEXT: ALU 2, @9, KC0[CB0:0-32], KC1[]1640; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 11641; EG-NEXT: CF_END1642; EG-NEXT: PAD1643; EG-NEXT: Fetch clause starting at 6:1644; EG-NEXT: VTX_READ_64 T0.XY, T0.X, 0, #11645; EG-NEXT: ALU clause starting at 8:1646; EG-NEXT: MOV * T0.X, KC0[2].Z,1647; EG-NEXT: ALU clause starting at 9:1648; EG-NEXT: LSHR T1.X, KC0[2].Y, literal.x,1649; EG-NEXT: MULLO_INT * T0.X, T0.X, T0.Y,1650; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)1651entry:1652 %b_ptr = getelementptr i32, ptr addrspace(1) %in, i32 11653 %a = load i32, ptr addrspace(1) %in1654 %b = load i32, ptr addrspace(1) %b_ptr1655 %result = mul i32 %a, %b1656 store i32 %result, ptr addrspace(1) %out1657 ret void1658}1659 1660define amdgpu_kernel void @s_mul_i1(ptr addrspace(1) %out, [8 x i32], i1 %a, [8 x i32], i1 %b) nounwind {1661; SI-LABEL: s_mul_i1:1662; SI: ; %bb.0: ; %entry1663; SI-NEXT: s_load_dword s6, s[4:5], 0x131664; SI-NEXT: s_load_dword s7, s[4:5], 0x1c1665; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91666; SI-NEXT: s_mov_b32 s3, 0xf0001667; SI-NEXT: s_mov_b32 s2, -11668; SI-NEXT: s_waitcnt lgkmcnt(0)1669; SI-NEXT: s_and_b32 s4, s6, s71670; SI-NEXT: s_and_b32 s4, s4, 11671; SI-NEXT: v_mov_b32_e32 v0, s41672; SI-NEXT: buffer_store_byte v0, off, s[0:3], 01673; SI-NEXT: s_endpgm1674;1675; VI-LABEL: s_mul_i1:1676; VI: ; %bb.0: ; %entry1677; VI-NEXT: s_load_dword s6, s[4:5], 0x4c1678; VI-NEXT: s_load_dword s7, s[4:5], 0x701679; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241680; VI-NEXT: s_mov_b32 s3, 0xf0001681; VI-NEXT: s_mov_b32 s2, -11682; VI-NEXT: s_waitcnt lgkmcnt(0)1683; VI-NEXT: s_and_b32 s4, s6, s71684; VI-NEXT: s_and_b32 s4, s4, 11685; VI-NEXT: v_mov_b32_e32 v0, s41686; VI-NEXT: buffer_store_byte v0, off, s[0:3], 01687; VI-NEXT: s_endpgm1688;1689; GFX9-LABEL: s_mul_i1:1690; GFX9: ; %bb.0: ; %entry1691; GFX9-NEXT: s_load_dword s6, s[4:5], 0x4c1692; GFX9-NEXT: s_load_dword s7, s[4:5], 0x701693; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241694; GFX9-NEXT: s_mov_b32 s3, 0xf0001695; GFX9-NEXT: s_mov_b32 s2, -11696; GFX9-NEXT: s_waitcnt lgkmcnt(0)1697; GFX9-NEXT: s_and_b32 s4, s6, s71698; GFX9-NEXT: s_and_b32 s4, s4, 11699; GFX9-NEXT: v_mov_b32_e32 v0, s41700; GFX9-NEXT: buffer_store_byte v0, off, s[0:3], 01701; GFX9-NEXT: s_endpgm1702;1703; GFX10-LABEL: s_mul_i1:1704; GFX10: ; %bb.0: ; %entry1705; GFX10-NEXT: s_clause 0x21706; GFX10-NEXT: s_load_dword s2, s[4:5], 0x4c1707; GFX10-NEXT: s_load_dword s3, s[4:5], 0x701708; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241709; GFX10-NEXT: s_waitcnt lgkmcnt(0)1710; GFX10-NEXT: s_and_b32 s2, s2, s31711; GFX10-NEXT: s_mov_b32 s3, 0x310160001712; GFX10-NEXT: s_and_b32 s2, s2, 11713; GFX10-NEXT: v_mov_b32_e32 v0, s21714; GFX10-NEXT: s_mov_b32 s2, -11715; GFX10-NEXT: buffer_store_byte v0, off, s[0:3], 01716; GFX10-NEXT: s_endpgm1717;1718; GFX11-LABEL: s_mul_i1:1719; GFX11: ; %bb.0: ; %entry1720; GFX11-NEXT: s_clause 0x21721; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x4c1722; GFX11-NEXT: s_load_b32 s3, s[4:5], 0x701723; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x241724; GFX11-NEXT: s_waitcnt lgkmcnt(0)1725; GFX11-NEXT: s_and_b32 s2, s2, s31726; GFX11-NEXT: s_mov_b32 s3, 0x310160001727; GFX11-NEXT: s_and_b32 s2, s2, 11728; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1729; GFX11-NEXT: v_mov_b32_e32 v0, s21730; GFX11-NEXT: s_mov_b32 s2, -11731; GFX11-NEXT: buffer_store_b8 v0, off, s[0:3], 01732; GFX11-NEXT: s_endpgm1733;1734; GFX12-LABEL: s_mul_i1:1735; GFX12: ; %bb.0: ; %entry1736; GFX12-NEXT: s_clause 0x21737; GFX12-NEXT: s_load_b32 s2, s[4:5], 0x4c1738; GFX12-NEXT: s_load_b32 s3, s[4:5], 0x701739; GFX12-NEXT: s_load_b64 s[0:1], s[4:5], 0x241740; GFX12-NEXT: s_wait_kmcnt 0x01741; GFX12-NEXT: s_and_b32 s2, s2, s31742; GFX12-NEXT: s_mov_b32 s3, 0x310160001743; GFX12-NEXT: s_and_b32 s2, s2, 11744; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1745; GFX12-NEXT: v_mov_b32_e32 v0, s21746; GFX12-NEXT: s_mov_b32 s2, -11747; GFX12-NEXT: buffer_store_b8 v0, off, s[0:3], null1748; GFX12-NEXT: s_endpgm1749;1750; GFX1250-LABEL: s_mul_i1:1751; GFX1250: ; %bb.0: ; %entry1752; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11753; GFX1250-NEXT: s_clause 0x21754; GFX1250-NEXT: s_load_b32 s2, s[4:5], 0x4c1755; GFX1250-NEXT: s_load_b32 s3, s[4:5], 0x701756; GFX1250-NEXT: s_load_b64 s[0:1], s[4:5], 0x241757; GFX1250-NEXT: s_wait_kmcnt 0x01758; GFX1250-NEXT: s_and_b32 s2, s2, s31759; GFX1250-NEXT: s_mov_b32 s3, 0x310160001760; GFX1250-NEXT: s_and_b32 s2, s2, 11761; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1762; GFX1250-NEXT: v_mov_b32_e32 v0, s21763; GFX1250-NEXT: s_mov_b32 s2, -11764; GFX1250-NEXT: buffer_store_b8 v0, off, s[0:3], null1765; GFX1250-NEXT: s_endpgm1766;1767; EG-LABEL: s_mul_i1:1768; EG: ; %bb.0: ; %entry1769; EG-NEXT: ALU 0, @10, KC0[], KC1[]1770; EG-NEXT: TEX 1 @61771; EG-NEXT: ALU 12, @11, KC0[CB0:0-32], KC1[]1772; EG-NEXT: MEM_RAT MSKOR T0.XW, T1.X1773; EG-NEXT: CF_END1774; EG-NEXT: PAD1775; EG-NEXT: Fetch clause starting at 6:1776; EG-NEXT: VTX_READ_8 T1.X, T0.X, 72, #31777; EG-NEXT: VTX_READ_8 T0.X, T0.X, 108, #31778; EG-NEXT: ALU clause starting at 10:1779; EG-NEXT: MOV * T0.X, 0.0,1780; EG-NEXT: ALU clause starting at 11:1781; EG-NEXT: AND_INT T0.W, KC0[2].Y, literal.x,1782; EG-NEXT: AND_INT * T1.W, T1.X, T0.X,1783; EG-NEXT: 3(4.203895e-45), 0(0.000000e+00)1784; EG-NEXT: AND_INT T1.W, PS, 1,1785; EG-NEXT: LSHL * T0.W, PV.W, literal.x,1786; EG-NEXT: 3(4.203895e-45), 0(0.000000e+00)1787; EG-NEXT: LSHL T0.X, PV.W, PS,1788; EG-NEXT: LSHL * T0.W, literal.x, PS,1789; EG-NEXT: 255(3.573311e-43), 0(0.000000e+00)1790; EG-NEXT: MOV T0.Y, 0.0,1791; EG-NEXT: MOV * T0.Z, 0.0,1792; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,1793; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)1794entry:1795 %mul = mul i1 %a, %b1796 store i1 %mul, ptr addrspace(1) %out, align 41797 ret void1798}1799 1800define amdgpu_kernel void @v_mul_i1(ptr addrspace(1) %out, ptr addrspace(1) %in) {1801; SI-LABEL: v_mul_i1:1802; SI: ; %bb.0: ; %entry1803; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91804; SI-NEXT: s_mov_b32 s7, 0xf0001805; SI-NEXT: s_mov_b32 s6, -11806; SI-NEXT: s_mov_b32 s10, s61807; SI-NEXT: s_mov_b32 s11, s71808; SI-NEXT: s_waitcnt lgkmcnt(0)1809; SI-NEXT: s_mov_b32 s8, s21810; SI-NEXT: s_mov_b32 s9, s31811; SI-NEXT: buffer_load_ubyte v0, off, s[8:11], 01812; SI-NEXT: buffer_load_ubyte v1, off, s[8:11], 0 offset:41813; SI-NEXT: s_mov_b32 s4, s01814; SI-NEXT: s_mov_b32 s5, s11815; SI-NEXT: s_waitcnt vmcnt(0)1816; SI-NEXT: v_and_b32_e32 v0, v0, v11817; SI-NEXT: v_and_b32_e32 v0, 1, v01818; SI-NEXT: buffer_store_byte v0, off, s[4:7], 01819; SI-NEXT: s_endpgm1820;1821; VI-LABEL: v_mul_i1:1822; VI: ; %bb.0: ; %entry1823; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241824; VI-NEXT: s_mov_b32 s7, 0xf0001825; VI-NEXT: s_mov_b32 s6, -11826; VI-NEXT: s_mov_b32 s10, s61827; VI-NEXT: s_mov_b32 s11, s71828; VI-NEXT: s_waitcnt lgkmcnt(0)1829; VI-NEXT: s_mov_b32 s8, s21830; VI-NEXT: s_mov_b32 s9, s31831; VI-NEXT: buffer_load_ubyte v0, off, s[8:11], 01832; VI-NEXT: buffer_load_ubyte v1, off, s[8:11], 0 offset:41833; VI-NEXT: s_mov_b32 s4, s01834; VI-NEXT: s_mov_b32 s5, s11835; VI-NEXT: s_waitcnt vmcnt(0)1836; VI-NEXT: v_and_b32_e32 v0, v0, v11837; VI-NEXT: v_and_b32_e32 v0, 1, v01838; VI-NEXT: buffer_store_byte v0, off, s[4:7], 01839; VI-NEXT: s_endpgm1840;1841; GFX9-LABEL: v_mul_i1:1842; GFX9: ; %bb.0: ; %entry1843; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241844; GFX9-NEXT: s_mov_b32 s7, 0xf0001845; GFX9-NEXT: s_mov_b32 s6, -11846; GFX9-NEXT: s_mov_b32 s10, s61847; GFX9-NEXT: s_mov_b32 s11, s71848; GFX9-NEXT: s_waitcnt lgkmcnt(0)1849; GFX9-NEXT: s_mov_b32 s8, s21850; GFX9-NEXT: s_mov_b32 s9, s31851; GFX9-NEXT: buffer_load_ubyte v0, off, s[8:11], 01852; GFX9-NEXT: buffer_load_ubyte v1, off, s[8:11], 0 offset:41853; GFX9-NEXT: s_mov_b32 s4, s01854; GFX9-NEXT: s_mov_b32 s5, s11855; GFX9-NEXT: s_waitcnt vmcnt(0)1856; GFX9-NEXT: v_and_b32_e32 v0, v0, v11857; GFX9-NEXT: v_and_b32_e32 v0, 1, v01858; GFX9-NEXT: buffer_store_byte v0, off, s[4:7], 01859; GFX9-NEXT: s_endpgm1860;1861; GFX10-LABEL: v_mul_i1:1862; GFX10: ; %bb.0: ; %entry1863; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241864; GFX10-NEXT: s_mov_b32 s6, -11865; GFX10-NEXT: s_mov_b32 s7, 0x310160001866; GFX10-NEXT: s_mov_b32 s10, s61867; GFX10-NEXT: s_mov_b32 s11, s71868; GFX10-NEXT: s_waitcnt lgkmcnt(0)1869; GFX10-NEXT: s_mov_b32 s8, s21870; GFX10-NEXT: s_mov_b32 s9, s31871; GFX10-NEXT: s_clause 0x11872; GFX10-NEXT: buffer_load_ubyte v0, off, s[8:11], 01873; GFX10-NEXT: buffer_load_ubyte v1, off, s[8:11], 0 offset:41874; GFX10-NEXT: s_mov_b32 s4, s01875; GFX10-NEXT: s_mov_b32 s5, s11876; GFX10-NEXT: s_waitcnt vmcnt(0)1877; GFX10-NEXT: v_and_b32_e32 v0, v0, v11878; GFX10-NEXT: v_and_b32_e32 v0, 1, v01879; GFX10-NEXT: buffer_store_byte v0, off, s[4:7], 01880; GFX10-NEXT: s_endpgm1881;1882; GFX11-LABEL: v_mul_i1:1883; GFX11: ; %bb.0: ; %entry1884; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x241885; GFX11-NEXT: s_mov_b32 s6, -11886; GFX11-NEXT: s_mov_b32 s7, 0x310160001887; GFX11-NEXT: s_mov_b32 s10, s61888; GFX11-NEXT: s_mov_b32 s11, s71889; GFX11-NEXT: s_waitcnt lgkmcnt(0)1890; GFX11-NEXT: s_mov_b32 s8, s21891; GFX11-NEXT: s_mov_b32 s9, s31892; GFX11-NEXT: s_clause 0x11893; GFX11-NEXT: buffer_load_u8 v0, off, s[8:11], 01894; GFX11-NEXT: buffer_load_u8 v1, off, s[8:11], 0 offset:41895; GFX11-NEXT: s_mov_b32 s4, s01896; GFX11-NEXT: s_mov_b32 s5, s11897; GFX11-NEXT: s_waitcnt vmcnt(0)1898; GFX11-NEXT: v_and_b32_e32 v0, v0, v11899; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)1900; GFX11-NEXT: v_and_b32_e32 v0, 1, v01901; GFX11-NEXT: buffer_store_b8 v0, off, s[4:7], 01902; GFX11-NEXT: s_endpgm1903;1904; GFX12-LABEL: v_mul_i1:1905; GFX12: ; %bb.0: ; %entry1906; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x241907; GFX12-NEXT: s_mov_b32 s6, -11908; GFX12-NEXT: s_mov_b32 s7, 0x310160001909; GFX12-NEXT: s_mov_b32 s10, s61910; GFX12-NEXT: s_mov_b32 s11, s71911; GFX12-NEXT: s_wait_kmcnt 0x01912; GFX12-NEXT: s_mov_b32 s8, s21913; GFX12-NEXT: s_mov_b32 s9, s31914; GFX12-NEXT: s_clause 0x11915; GFX12-NEXT: buffer_load_u8 v0, off, s[8:11], null1916; GFX12-NEXT: buffer_load_u8 v1, off, s[8:11], null offset:41917; GFX12-NEXT: s_mov_b32 s4, s01918; GFX12-NEXT: s_mov_b32 s5, s11919; GFX12-NEXT: s_wait_loadcnt 0x01920; GFX12-NEXT: v_and_b32_e32 v0, v0, v11921; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)1922; GFX12-NEXT: v_and_b32_e32 v0, 1, v01923; GFX12-NEXT: buffer_store_b8 v0, off, s[4:7], null1924; GFX12-NEXT: s_endpgm1925;1926; GFX1250-LABEL: v_mul_i1:1927; GFX1250: ; %bb.0: ; %entry1928; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11929; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x241930; GFX1250-NEXT: s_mov_b32 s6, -11931; GFX1250-NEXT: s_mov_b32 s7, 0x310160001932; GFX1250-NEXT: s_mov_b32 s10, s61933; GFX1250-NEXT: s_mov_b32 s11, s71934; GFX1250-NEXT: s_wait_kmcnt 0x01935; GFX1250-NEXT: s_mov_b32 s8, s21936; GFX1250-NEXT: s_mov_b32 s9, s31937; GFX1250-NEXT: s_clause 0x11938; GFX1250-NEXT: buffer_load_u8 v0, off, s[8:11], null1939; GFX1250-NEXT: buffer_load_u8 v1, off, s[8:11], null offset:41940; GFX1250-NEXT: s_mov_b32 s4, s01941; GFX1250-NEXT: s_mov_b32 s5, s11942; GFX1250-NEXT: s_wait_loadcnt 0x01943; GFX1250-NEXT: v_and_b32_e32 v0, v0, v11944; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)1945; GFX1250-NEXT: v_and_b32_e32 v0, 1, v01946; GFX1250-NEXT: buffer_store_b8 v0, off, s[4:7], null1947; GFX1250-NEXT: s_endpgm1948;1949; EG-LABEL: v_mul_i1:1950; EG: ; %bb.0: ; %entry1951; EG-NEXT: ALU 0, @10, KC0[CB0:0-32], KC1[]1952; EG-NEXT: TEX 1 @61953; EG-NEXT: ALU 12, @11, KC0[CB0:0-32], KC1[]1954; EG-NEXT: MEM_RAT MSKOR T0.XW, T1.X1955; EG-NEXT: CF_END1956; EG-NEXT: PAD1957; EG-NEXT: Fetch clause starting at 6:1958; EG-NEXT: VTX_READ_8 T1.X, T0.X, 4, #11959; EG-NEXT: VTX_READ_8 T0.X, T0.X, 0, #11960; EG-NEXT: ALU clause starting at 10:1961; EG-NEXT: MOV * T0.X, KC0[2].Z,1962; EG-NEXT: ALU clause starting at 11:1963; EG-NEXT: AND_INT T0.W, KC0[2].Y, literal.x,1964; EG-NEXT: AND_INT * T1.W, T0.X, T1.X,1965; EG-NEXT: 3(4.203895e-45), 0(0.000000e+00)1966; EG-NEXT: AND_INT T1.W, PS, 1,1967; EG-NEXT: LSHL * T0.W, PV.W, literal.x,1968; EG-NEXT: 3(4.203895e-45), 0(0.000000e+00)1969; EG-NEXT: LSHL T0.X, PV.W, PS,1970; EG-NEXT: LSHL * T0.W, literal.x, PS,1971; EG-NEXT: 255(3.573311e-43), 0(0.000000e+00)1972; EG-NEXT: MOV T0.Y, 0.0,1973; EG-NEXT: MOV * T0.Z, 0.0,1974; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,1975; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)1976entry:1977 %b_ptr = getelementptr i32, ptr addrspace(1) %in, i32 11978 %a = load i1, ptr addrspace(1) %in1979 %b = load i1, ptr addrspace(1) %b_ptr1980 %result = mul i1 %a, %b1981 store i1 %result, ptr addrspace(1) %out1982 ret void1983}1984 1985; A standard 64-bit multiply. The expansion should be around 6 instructions.1986; It would be difficult to match the expansion correctly without writing1987; a really complicated list of FileCheck expressions. I don't want1988; to confuse people who may 'break' this test with a correct optimization,1989; so this test just uses FUNC-LABEL to make sure the compiler does not1990; crash with a 'failed to select' error.1991 1992define amdgpu_kernel void @s_mul_i64(ptr addrspace(1) %out, i64 %a, i64 %b) nounwind {1993; SI-LABEL: s_mul_i64:1994; SI: ; %bb.0: ; %entry1995; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91996; SI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0xd1997; SI-NEXT: s_mov_b32 s7, 0xf0001998; SI-NEXT: s_mov_b32 s6, -11999; SI-NEXT: s_waitcnt lgkmcnt(0)2000; SI-NEXT: s_mov_b32 s4, s02001; SI-NEXT: v_mov_b32_e32 v0, s82002; SI-NEXT: v_mul_hi_u32 v0, s2, v02003; SI-NEXT: s_mul_i32 s0, s2, s92004; SI-NEXT: s_mov_b32 s5, s12005; SI-NEXT: v_add_i32_e32 v0, vcc, s0, v02006; SI-NEXT: s_mul_i32 s0, s3, s82007; SI-NEXT: v_add_i32_e32 v1, vcc, s0, v02008; SI-NEXT: s_mul_i32 s0, s2, s82009; SI-NEXT: v_mov_b32_e32 v0, s02010; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 02011; SI-NEXT: s_endpgm2012;2013; VI-LABEL: s_mul_i64:2014; VI: ; %bb.0: ; %entry2015; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242016; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x342017; VI-NEXT: s_mov_b32 s7, 0xf0002018; VI-NEXT: s_mov_b32 s6, -12019; VI-NEXT: s_waitcnt lgkmcnt(0)2020; VI-NEXT: s_mov_b32 s4, s02021; VI-NEXT: v_mov_b32_e32 v0, s82022; VI-NEXT: v_mad_u64_u32 v[0:1], s[10:11], s2, v0, 02023; VI-NEXT: s_mul_i32 s0, s2, s92024; VI-NEXT: s_mov_b32 s5, s12025; VI-NEXT: v_add_u32_e32 v1, vcc, s0, v12026; VI-NEXT: s_mul_i32 s0, s3, s82027; VI-NEXT: v_add_u32_e32 v1, vcc, s0, v12028; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 02029; VI-NEXT: s_endpgm2030;2031; GFX9-LABEL: s_mul_i64:2032; GFX9: ; %bb.0: ; %entry2033; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242034; GFX9-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x342035; GFX9-NEXT: s_mov_b32 s7, 0xf0002036; GFX9-NEXT: s_mov_b32 s6, -12037; GFX9-NEXT: s_waitcnt lgkmcnt(0)2038; GFX9-NEXT: s_mov_b32 s4, s02039; GFX9-NEXT: s_mov_b32 s5, s12040; GFX9-NEXT: s_mul_i32 s0, s2, s92041; GFX9-NEXT: s_mul_hi_u32 s1, s2, s82042; GFX9-NEXT: s_add_i32 s0, s1, s02043; GFX9-NEXT: s_mul_i32 s1, s3, s82044; GFX9-NEXT: s_add_i32 s0, s0, s12045; GFX9-NEXT: s_mul_i32 s1, s2, s82046; GFX9-NEXT: v_mov_b32_e32 v0, s12047; GFX9-NEXT: v_mov_b32_e32 v1, s02048; GFX9-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 02049; GFX9-NEXT: s_endpgm2050;2051; GFX10-LABEL: s_mul_i64:2052; GFX10: ; %bb.0: ; %entry2053; GFX10-NEXT: s_clause 0x12054; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242055; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x342056; GFX10-NEXT: s_waitcnt lgkmcnt(0)2057; GFX10-NEXT: s_mul_i32 s4, s2, s72058; GFX10-NEXT: s_mul_hi_u32 s5, s2, s62059; GFX10-NEXT: s_mul_i32 s3, s3, s62060; GFX10-NEXT: s_add_i32 s4, s5, s42061; GFX10-NEXT: s_mul_i32 s2, s2, s62062; GFX10-NEXT: s_add_i32 s4, s4, s32063; GFX10-NEXT: v_mov_b32_e32 v0, s22064; GFX10-NEXT: v_mov_b32_e32 v1, s42065; GFX10-NEXT: s_mov_b32 s7, 0x310160002066; GFX10-NEXT: s_mov_b32 s6, -12067; GFX10-NEXT: s_mov_b32 s4, s02068; GFX10-NEXT: s_mov_b32 s5, s12069; GFX10-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 02070; GFX10-NEXT: s_endpgm2071;2072; GFX11-LABEL: s_mul_i64:2073; GFX11: ; %bb.0: ; %entry2074; GFX11-NEXT: s_clause 0x12075; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x242076; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x342077; GFX11-NEXT: s_mov_b32 s7, 0x310160002078; GFX11-NEXT: s_waitcnt lgkmcnt(0)2079; GFX11-NEXT: s_mul_i32 s5, s2, s52080; GFX11-NEXT: s_mul_hi_u32 s6, s2, s42081; GFX11-NEXT: s_mul_i32 s3, s3, s42082; GFX11-NEXT: s_add_i32 s5, s6, s52083; GFX11-NEXT: s_mul_i32 s2, s2, s42084; GFX11-NEXT: s_add_i32 s5, s5, s32085; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)2086; GFX11-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s52087; GFX11-NEXT: s_mov_b32 s6, -12088; GFX11-NEXT: s_mov_b32 s4, s02089; GFX11-NEXT: s_mov_b32 s5, s12090; GFX11-NEXT: buffer_store_b64 v[0:1], off, s[4:7], 02091; GFX11-NEXT: s_endpgm2092;2093; GFX12-LABEL: s_mul_i64:2094; GFX12: ; %bb.0: ; %entry2095; GFX12-NEXT: s_clause 0x12096; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x242097; GFX12-NEXT: s_load_b64 s[4:5], s[4:5], 0x342098; GFX12-NEXT: s_wait_kmcnt 0x02099; GFX12-NEXT: s_mul_u64 s[4:5], s[2:3], s[4:5]2100; GFX12-NEXT: s_mov_b32 s3, 0x310160002101; GFX12-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s52102; GFX12-NEXT: s_mov_b32 s2, -12103; GFX12-NEXT: buffer_store_b64 v[0:1], off, s[0:3], null2104; GFX12-NEXT: s_endpgm2105;2106; GFX1250-LABEL: s_mul_i64:2107; GFX1250: ; %bb.0: ; %entry2108; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 12109; GFX1250-NEXT: s_clause 0x12110; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x242111; GFX1250-NEXT: s_load_b64 s[6:7], s[4:5], 0x342112; GFX1250-NEXT: s_wait_kmcnt 0x02113; GFX1250-NEXT: s_mul_u64 s[4:5], s[2:3], s[6:7]2114; GFX1250-NEXT: s_mov_b32 s3, 0x310160002115; GFX1250-NEXT: v_mov_b64_e32 v[0:1], s[4:5]2116; GFX1250-NEXT: s_mov_b32 s2, -12117; GFX1250-NEXT: buffer_store_b64 v[0:1], off, s[0:3], null2118; GFX1250-NEXT: s_endpgm2119;2120; EG-LABEL: s_mul_i64:2121; EG: ; %bb.0: ; %entry2122; EG-NEXT: ALU 7, @4, KC0[CB0:0-32], KC1[]2123; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 12124; EG-NEXT: CF_END2125; EG-NEXT: PAD2126; EG-NEXT: ALU clause starting at 4:2127; EG-NEXT: MULHI * T0.X, KC0[2].W, KC0[3].Y,2128; EG-NEXT: MULLO_INT * T0.Y, KC0[2].W, KC0[3].Z,2129; EG-NEXT: ADD_INT T0.W, T0.X, PS,2130; EG-NEXT: MULLO_INT * T0.X, KC0[3].X, KC0[3].Y,2131; EG-NEXT: ADD_INT * T0.Y, PV.W, PS,2132; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,2133; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)2134; EG-NEXT: MULLO_INT * T0.X, KC0[2].W, KC0[3].Y,2135entry:2136 %mul = mul i64 %a, %b2137 store i64 %mul, ptr addrspace(1) %out, align 82138 ret void2139}2140 2141define amdgpu_kernel void @v_mul_i64(ptr addrspace(1) %out, ptr addrspace(1) %aptr, ptr addrspace(1) %bptr) {2142; SI-LABEL: v_mul_i64:2143; SI: ; %bb.0: ; %entry2144; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x92145; SI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0xd2146; SI-NEXT: s_mov_b32 s7, 0xf0002147; SI-NEXT: s_mov_b32 s6, -12148; SI-NEXT: s_mov_b32 s10, s62149; SI-NEXT: s_mov_b32 s11, s72150; SI-NEXT: s_waitcnt lgkmcnt(0)2151; SI-NEXT: s_mov_b32 s12, s22152; SI-NEXT: s_mov_b32 s13, s32153; SI-NEXT: s_mov_b32 s14, s62154; SI-NEXT: s_mov_b32 s15, s72155; SI-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 02156; SI-NEXT: buffer_load_dwordx2 v[2:3], off, s[12:15], 02157; SI-NEXT: s_mov_b32 s4, s02158; SI-NEXT: s_mov_b32 s5, s12159; SI-NEXT: s_waitcnt vmcnt(0)2160; SI-NEXT: v_mul_lo_u32 v1, v2, v12161; SI-NEXT: v_mul_hi_u32 v4, v2, v02162; SI-NEXT: v_mul_lo_u32 v3, v3, v02163; SI-NEXT: v_mul_lo_u32 v0, v2, v02164; SI-NEXT: v_add_i32_e32 v1, vcc, v1, v42165; SI-NEXT: v_add_i32_e32 v1, vcc, v1, v32166; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 02167; SI-NEXT: s_endpgm2168;2169; VI-LABEL: v_mul_i64:2170; VI: ; %bb.0: ; %entry2171; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242172; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x342173; VI-NEXT: s_mov_b32 s7, 0xf0002174; VI-NEXT: s_mov_b32 s6, -12175; VI-NEXT: s_mov_b32 s10, s62176; VI-NEXT: s_mov_b32 s11, s72177; VI-NEXT: s_waitcnt lgkmcnt(0)2178; VI-NEXT: s_mov_b32 s12, s22179; VI-NEXT: s_mov_b32 s13, s32180; VI-NEXT: s_mov_b32 s14, s62181; VI-NEXT: s_mov_b32 s15, s72182; VI-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 02183; VI-NEXT: buffer_load_dwordx2 v[2:3], off, s[12:15], 02184; VI-NEXT: s_mov_b32 s4, s02185; VI-NEXT: s_mov_b32 s5, s12186; VI-NEXT: s_waitcnt vmcnt(0)2187; VI-NEXT: v_mul_lo_u32 v4, v2, v12188; VI-NEXT: v_mad_u64_u32 v[1:2], s[2:3], v2, v0, 02189; VI-NEXT: v_mul_lo_u32 v0, v3, v02190; VI-NEXT: v_add_u32_e32 v2, vcc, v4, v22191; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v02192; VI-NEXT: buffer_store_dwordx2 v[1:2], off, s[4:7], 02193; VI-NEXT: s_endpgm2194;2195; GFX9-LABEL: v_mul_i64:2196; GFX9: ; %bb.0: ; %entry2197; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242198; GFX9-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x342199; GFX9-NEXT: s_mov_b32 s7, 0xf0002200; GFX9-NEXT: s_mov_b32 s6, -12201; GFX9-NEXT: s_mov_b32 s10, s62202; GFX9-NEXT: s_mov_b32 s11, s72203; GFX9-NEXT: s_waitcnt lgkmcnt(0)2204; GFX9-NEXT: s_mov_b32 s12, s22205; GFX9-NEXT: s_mov_b32 s13, s32206; GFX9-NEXT: s_mov_b32 s14, s62207; GFX9-NEXT: s_mov_b32 s15, s72208; GFX9-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 02209; GFX9-NEXT: buffer_load_dwordx2 v[2:3], off, s[12:15], 02210; GFX9-NEXT: s_mov_b32 s4, s02211; GFX9-NEXT: s_mov_b32 s5, s12212; GFX9-NEXT: s_waitcnt vmcnt(0)2213; GFX9-NEXT: v_mul_lo_u32 v1, v2, v12214; GFX9-NEXT: v_mul_hi_u32 v4, v2, v02215; GFX9-NEXT: v_mul_lo_u32 v3, v3, v02216; GFX9-NEXT: v_mul_lo_u32 v0, v2, v02217; GFX9-NEXT: v_add_u32_e32 v1, v4, v12218; GFX9-NEXT: v_add_u32_e32 v1, v1, v32219; GFX9-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 02220; GFX9-NEXT: s_endpgm2221;2222; GFX10-LABEL: v_mul_i64:2223; GFX10: ; %bb.0: ; %entry2224; GFX10-NEXT: s_clause 0x12225; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242226; GFX10-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x342227; GFX10-NEXT: s_mov_b32 s6, -12228; GFX10-NEXT: s_mov_b32 s7, 0x310160002229; GFX10-NEXT: s_mov_b32 s10, s62230; GFX10-NEXT: s_mov_b32 s11, s72231; GFX10-NEXT: s_mov_b32 s14, s62232; GFX10-NEXT: s_mov_b32 s15, s72233; GFX10-NEXT: s_waitcnt lgkmcnt(0)2234; GFX10-NEXT: s_mov_b32 s12, s22235; GFX10-NEXT: s_mov_b32 s13, s32236; GFX10-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 02237; GFX10-NEXT: buffer_load_dwordx2 v[2:3], off, s[12:15], 02238; GFX10-NEXT: s_mov_b32 s4, s02239; GFX10-NEXT: s_mov_b32 s5, s12240; GFX10-NEXT: s_waitcnt vmcnt(0)2241; GFX10-NEXT: v_mul_lo_u32 v1, v2, v12242; GFX10-NEXT: v_mul_hi_u32 v4, v2, v02243; GFX10-NEXT: v_mul_lo_u32 v3, v3, v02244; GFX10-NEXT: v_mul_lo_u32 v0, v2, v02245; GFX10-NEXT: v_add_nc_u32_e32 v1, v4, v12246; GFX10-NEXT: v_add_nc_u32_e32 v1, v1, v32247; GFX10-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 02248; GFX10-NEXT: s_endpgm2249;2250; GFX11-LABEL: v_mul_i64:2251; GFX11: ; %bb.0: ; %entry2252; GFX11-NEXT: s_clause 0x12253; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x242254; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x342255; GFX11-NEXT: s_mov_b32 s10, -12256; GFX11-NEXT: s_mov_b32 s11, 0x310160002257; GFX11-NEXT: s_mov_b32 s6, s102258; GFX11-NEXT: s_mov_b32 s7, s112259; GFX11-NEXT: s_mov_b32 s14, s102260; GFX11-NEXT: s_mov_b32 s15, s112261; GFX11-NEXT: s_waitcnt lgkmcnt(0)2262; GFX11-NEXT: s_mov_b32 s12, s22263; GFX11-NEXT: s_mov_b32 s13, s32264; GFX11-NEXT: buffer_load_b64 v[0:1], off, s[4:7], 02265; GFX11-NEXT: buffer_load_b64 v[2:3], off, s[12:15], 02266; GFX11-NEXT: s_mov_b32 s8, s02267; GFX11-NEXT: s_mov_b32 s9, s12268; GFX11-NEXT: s_waitcnt vmcnt(0)2269; GFX11-NEXT: v_mul_lo_u32 v1, v2, v12270; GFX11-NEXT: v_mul_hi_u32 v4, v2, v02271; GFX11-NEXT: v_mul_lo_u32 v3, v3, v02272; GFX11-NEXT: v_mul_lo_u32 v0, v2, v02273; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)2274; GFX11-NEXT: v_add_nc_u32_e32 v1, v4, v12275; GFX11-NEXT: v_add_nc_u32_e32 v1, v1, v32276; GFX11-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 02277; GFX11-NEXT: s_endpgm2278;2279; GFX12-LABEL: v_mul_i64:2280; GFX12: ; %bb.0: ; %entry2281; GFX12-NEXT: s_clause 0x12282; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x242283; GFX12-NEXT: s_load_b64 s[4:5], s[4:5], 0x342284; GFX12-NEXT: s_mov_b32 s10, -12285; GFX12-NEXT: s_mov_b32 s11, 0x310160002286; GFX12-NEXT: s_mov_b32 s6, s102287; GFX12-NEXT: s_mov_b32 s7, s112288; GFX12-NEXT: s_mov_b32 s14, s102289; GFX12-NEXT: s_mov_b32 s15, s112290; GFX12-NEXT: s_wait_kmcnt 0x02291; GFX12-NEXT: s_mov_b32 s12, s22292; GFX12-NEXT: s_mov_b32 s13, s32293; GFX12-NEXT: buffer_load_b64 v[0:1], off, s[4:7], null2294; GFX12-NEXT: buffer_load_b64 v[2:3], off, s[12:15], null2295; GFX12-NEXT: s_mov_b32 s8, s02296; GFX12-NEXT: s_mov_b32 s9, s12297; GFX12-NEXT: s_wait_loadcnt 0x02298; GFX12-NEXT: v_mul_lo_u32 v3, v0, v32299; GFX12-NEXT: v_mul_lo_u32 v1, v1, v22300; GFX12-NEXT: v_mul_hi_u32 v4, v0, v22301; GFX12-NEXT: v_mul_lo_u32 v0, v0, v22302; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)2303; GFX12-NEXT: v_add_nc_u32_e32 v1, v3, v12304; GFX12-NEXT: v_add_nc_u32_e32 v1, v1, v42305; GFX12-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null2306; GFX12-NEXT: s_endpgm2307;2308; GFX1250-LABEL: v_mul_i64:2309; GFX1250: ; %bb.0: ; %entry2310; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 12311; GFX1250-NEXT: s_clause 0x12312; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x242313; GFX1250-NEXT: s_load_b64 s[8:9], s[4:5], 0x342314; GFX1250-NEXT: s_mov_b32 s6, -12315; GFX1250-NEXT: s_mov_b32 s7, 0x310160002316; GFX1250-NEXT: s_mov_b32 s14, s62317; GFX1250-NEXT: s_mov_b32 s15, s72318; GFX1250-NEXT: s_mov_b32 s10, s62319; GFX1250-NEXT: s_mov_b32 s11, s72320; GFX1250-NEXT: s_wait_kmcnt 0x02321; GFX1250-NEXT: s_mov_b32 s12, s22322; GFX1250-NEXT: s_mov_b32 s13, s32323; GFX1250-NEXT: buffer_load_b64 v[0:1], off, s[12:15], null2324; GFX1250-NEXT: buffer_load_b64 v[2:3], off, s[8:11], null2325; GFX1250-NEXT: s_mov_b32 s4, s02326; GFX1250-NEXT: s_mov_b32 s5, s12327; GFX1250-NEXT: s_wait_loadcnt 0x02328; GFX1250-NEXT: v_mul_u64_e32 v[0:1], v[0:1], v[2:3]2329; GFX1250-NEXT: buffer_store_b64 v[0:1], off, s[4:7], null2330; GFX1250-NEXT: s_endpgm2331;2332; EG-LABEL: v_mul_i64:2333; EG: ; %bb.0: ; %entry2334; EG-NEXT: ALU 1, @10, KC0[CB0:0-32], KC1[]2335; EG-NEXT: TEX 1 @62336; EG-NEXT: ALU 7, @12, KC0[CB0:0-32], KC1[]2337; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T2.X, 12338; EG-NEXT: CF_END2339; EG-NEXT: PAD2340; EG-NEXT: Fetch clause starting at 6:2341; EG-NEXT: VTX_READ_64 T1.XY, T1.X, 0, #12342; EG-NEXT: VTX_READ_64 T0.XY, T0.X, 0, #12343; EG-NEXT: ALU clause starting at 10:2344; EG-NEXT: MOV T0.X, KC0[2].Z,2345; EG-NEXT: MOV * T1.X, KC0[2].W,2346; EG-NEXT: ALU clause starting at 12:2347; EG-NEXT: MULHI * T0.Z, T0.X, T1.X,2348; EG-NEXT: MULLO_INT * T0.W, T0.X, T1.Y,2349; EG-NEXT: ADD_INT T0.W, T0.Z, PS,2350; EG-NEXT: MULLO_INT * T0.Y, T0.Y, T1.X,2351; EG-NEXT: ADD_INT * T0.Y, PV.W, PS,2352; EG-NEXT: LSHR T2.X, KC0[2].Y, literal.x,2353; EG-NEXT: MULLO_INT * T0.X, T0.X, T1.X,2354; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)2355entry:2356 %a = load i64, ptr addrspace(1) %aptr, align 82357 %b = load i64, ptr addrspace(1) %bptr, align 82358 %mul = mul i64 %a, %b2359 store i64 %mul, ptr addrspace(1) %out, align 82360 ret void2361}2362 2363define amdgpu_kernel void @mul32_in_branch(ptr addrspace(1) %out, ptr addrspace(1) %in, i32 %a, i32 %b, i32 %c) {2364; SI-LABEL: mul32_in_branch:2365; SI: ; %bb.0: ; %entry2366; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xd2367; SI-NEXT: s_waitcnt lgkmcnt(0)2368; SI-NEXT: s_cmp_lg_u32 s0, 02369; SI-NEXT: s_cbranch_scc0 .LBB15_22370; SI-NEXT: ; %bb.1: ; %else2371; SI-NEXT: s_mul_i32 s8, s0, s12372; SI-NEXT: s_mov_b64 s[6:7], 02373; SI-NEXT: s_branch .LBB15_32374; SI-NEXT: .LBB15_2:2375; SI-NEXT: s_mov_b64 s[6:7], -12376; SI-NEXT: ; implicit-def: $sgpr82377; SI-NEXT: .LBB15_3: ; %Flow2378; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x92379; SI-NEXT: s_andn2_b64 vcc, exec, s[6:7]2380; SI-NEXT: s_waitcnt lgkmcnt(0)2381; SI-NEXT: s_mov_b64 vcc, vcc2382; SI-NEXT: s_cbranch_vccnz .LBB15_52383; SI-NEXT: ; %bb.4: ; %if2384; SI-NEXT: s_mov_b32 s7, 0xf0002385; SI-NEXT: s_mov_b32 s6, -12386; SI-NEXT: s_mov_b32 s4, s22387; SI-NEXT: s_mov_b32 s5, s32388; SI-NEXT: buffer_load_dword v0, off, s[4:7], 02389; SI-NEXT: s_branch .LBB15_62390; SI-NEXT: .LBB15_5:2391; SI-NEXT: v_mov_b32_e32 v0, s82392; SI-NEXT: .LBB15_6: ; %endif2393; SI-NEXT: s_mov_b32 s3, 0xf0002394; SI-NEXT: s_mov_b32 s2, -12395; SI-NEXT: s_waitcnt vmcnt(0)2396; SI-NEXT: buffer_store_dword v0, off, s[0:3], 02397; SI-NEXT: s_endpgm2398;2399; VI-LABEL: mul32_in_branch:2400; VI: ; %bb.0: ; %entry2401; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x342402; VI-NEXT: s_waitcnt lgkmcnt(0)2403; VI-NEXT: s_cmp_lg_u32 s0, 02404; VI-NEXT: s_cbranch_scc0 .LBB15_22405; VI-NEXT: ; %bb.1: ; %else2406; VI-NEXT: s_mul_i32 s8, s0, s12407; VI-NEXT: s_mov_b64 s[6:7], 02408; VI-NEXT: s_branch .LBB15_32409; VI-NEXT: .LBB15_2:2410; VI-NEXT: s_mov_b64 s[6:7], -12411; VI-NEXT: ; implicit-def: $sgpr82412; VI-NEXT: .LBB15_3: ; %Flow2413; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242414; VI-NEXT: s_andn2_b64 vcc, exec, s[6:7]2415; VI-NEXT: s_cbranch_vccnz .LBB15_52416; VI-NEXT: ; %bb.4: ; %if2417; VI-NEXT: s_mov_b32 s7, 0xf0002418; VI-NEXT: s_mov_b32 s6, -12419; VI-NEXT: s_waitcnt lgkmcnt(0)2420; VI-NEXT: s_mov_b32 s4, s22421; VI-NEXT: s_mov_b32 s5, s32422; VI-NEXT: buffer_load_dword v0, off, s[4:7], 02423; VI-NEXT: s_branch .LBB15_62424; VI-NEXT: .LBB15_5:2425; VI-NEXT: v_mov_b32_e32 v0, s82426; VI-NEXT: .LBB15_6: ; %endif2427; VI-NEXT: s_waitcnt lgkmcnt(0)2428; VI-NEXT: s_mov_b32 s3, 0xf0002429; VI-NEXT: s_mov_b32 s2, -12430; VI-NEXT: s_waitcnt vmcnt(0)2431; VI-NEXT: buffer_store_dword v0, off, s[0:3], 02432; VI-NEXT: s_endpgm2433;2434; GFX9-LABEL: mul32_in_branch:2435; GFX9: ; %bb.0: ; %entry2436; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x342437; GFX9-NEXT: s_waitcnt lgkmcnt(0)2438; GFX9-NEXT: s_cmp_lg_u32 s0, 02439; GFX9-NEXT: s_cbranch_scc0 .LBB15_22440; GFX9-NEXT: ; %bb.1: ; %else2441; GFX9-NEXT: s_mul_i32 s8, s0, s12442; GFX9-NEXT: s_mov_b64 s[6:7], 02443; GFX9-NEXT: s_branch .LBB15_32444; GFX9-NEXT: .LBB15_2:2445; GFX9-NEXT: s_mov_b64 s[6:7], -12446; GFX9-NEXT: ; implicit-def: $sgpr82447; GFX9-NEXT: .LBB15_3: ; %Flow2448; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242449; GFX9-NEXT: s_andn2_b64 vcc, exec, s[6:7]2450; GFX9-NEXT: s_cbranch_vccnz .LBB15_52451; GFX9-NEXT: ; %bb.4: ; %if2452; GFX9-NEXT: s_mov_b32 s7, 0xf0002453; GFX9-NEXT: s_mov_b32 s6, -12454; GFX9-NEXT: s_waitcnt lgkmcnt(0)2455; GFX9-NEXT: s_mov_b32 s4, s22456; GFX9-NEXT: s_mov_b32 s5, s32457; GFX9-NEXT: buffer_load_dword v0, off, s[4:7], 02458; GFX9-NEXT: s_branch .LBB15_62459; GFX9-NEXT: .LBB15_5:2460; GFX9-NEXT: v_mov_b32_e32 v0, s82461; GFX9-NEXT: .LBB15_6: ; %endif2462; GFX9-NEXT: s_waitcnt lgkmcnt(0)2463; GFX9-NEXT: s_mov_b32 s3, 0xf0002464; GFX9-NEXT: s_mov_b32 s2, -12465; GFX9-NEXT: s_waitcnt vmcnt(0)2466; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], 02467; GFX9-NEXT: s_endpgm2468;2469; GFX10-LABEL: mul32_in_branch:2470; GFX10: ; %bb.0: ; %entry2471; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x342472; GFX10-NEXT: s_mov_b32 s6, 02473; GFX10-NEXT: s_waitcnt lgkmcnt(0)2474; GFX10-NEXT: s_cmp_lg_u32 s0, 02475; GFX10-NEXT: s_cbranch_scc0 .LBB15_22476; GFX10-NEXT: ; %bb.1: ; %else2477; GFX10-NEXT: s_mul_i32 s7, s0, s12478; GFX10-NEXT: s_branch .LBB15_32479; GFX10-NEXT: .LBB15_2:2480; GFX10-NEXT: s_mov_b32 s6, -12481; GFX10-NEXT: ; implicit-def: $sgpr72482; GFX10-NEXT: .LBB15_3: ; %Flow2483; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242484; GFX10-NEXT: s_andn2_b32 vcc_lo, exec_lo, s62485; GFX10-NEXT: s_cbranch_vccnz .LBB15_52486; GFX10-NEXT: ; %bb.4: ; %if2487; GFX10-NEXT: s_mov_b32 s7, 0x310160002488; GFX10-NEXT: s_mov_b32 s6, -12489; GFX10-NEXT: s_waitcnt lgkmcnt(0)2490; GFX10-NEXT: s_mov_b32 s4, s22491; GFX10-NEXT: s_mov_b32 s5, s32492; GFX10-NEXT: buffer_load_dword v0, off, s[4:7], 02493; GFX10-NEXT: s_branch .LBB15_62494; GFX10-NEXT: .LBB15_5:2495; GFX10-NEXT: v_mov_b32_e32 v0, s72496; GFX10-NEXT: .LBB15_6: ; %endif2497; GFX10-NEXT: s_waitcnt lgkmcnt(0)2498; GFX10-NEXT: s_mov_b32 s3, 0x310160002499; GFX10-NEXT: s_mov_b32 s2, -12500; GFX10-NEXT: s_waitcnt vmcnt(0)2501; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], 02502; GFX10-NEXT: s_endpgm2503;2504; GFX11-LABEL: mul32_in_branch:2505; GFX11: ; %bb.0: ; %entry2506; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x342507; GFX11-NEXT: s_mov_b32 s6, 02508; GFX11-NEXT: s_waitcnt lgkmcnt(0)2509; GFX11-NEXT: s_cmp_lg_u32 s0, 02510; GFX11-NEXT: s_cbranch_scc0 .LBB15_22511; GFX11-NEXT: ; %bb.1: ; %else2512; GFX11-NEXT: s_mul_i32 s7, s0, s12513; GFX11-NEXT: s_branch .LBB15_32514; GFX11-NEXT: .LBB15_2:2515; GFX11-NEXT: s_mov_b32 s6, -12516; GFX11-NEXT: ; implicit-def: $sgpr72517; GFX11-NEXT: .LBB15_3: ; %Flow2518; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x242519; GFX11-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s62520; GFX11-NEXT: s_cbranch_vccnz .LBB15_52521; GFX11-NEXT: ; %bb.4: ; %if2522; GFX11-NEXT: s_mov_b32 s7, 0x310160002523; GFX11-NEXT: s_mov_b32 s6, -12524; GFX11-NEXT: s_waitcnt lgkmcnt(0)2525; GFX11-NEXT: s_mov_b32 s4, s22526; GFX11-NEXT: s_mov_b32 s5, s32527; GFX11-NEXT: buffer_load_b32 v0, off, s[4:7], 02528; GFX11-NEXT: s_branch .LBB15_62529; GFX11-NEXT: .LBB15_5:2530; GFX11-NEXT: v_mov_b32_e32 v0, s72531; GFX11-NEXT: .LBB15_6: ; %endif2532; GFX11-NEXT: s_waitcnt lgkmcnt(0)2533; GFX11-NEXT: s_mov_b32 s3, 0x310160002534; GFX11-NEXT: s_mov_b32 s2, -12535; GFX11-NEXT: s_waitcnt vmcnt(0)2536; GFX11-NEXT: buffer_store_b32 v0, off, s[0:3], 02537; GFX11-NEXT: s_endpgm2538;2539; GFX12-LABEL: mul32_in_branch:2540; GFX12: ; %bb.0: ; %entry2541; GFX12-NEXT: s_load_b64 s[0:1], s[4:5], 0x342542; GFX12-NEXT: s_mov_b32 s6, 02543; GFX12-NEXT: s_wait_kmcnt 0x02544; GFX12-NEXT: s_cmp_lg_u32 s0, 02545; GFX12-NEXT: s_cbranch_scc0 .LBB15_22546; GFX12-NEXT: ; %bb.1: ; %else2547; GFX12-NEXT: s_mul_i32 s7, s0, s12548; GFX12-NEXT: s_branch .LBB15_32549; GFX12-NEXT: .LBB15_2:2550; GFX12-NEXT: s_mov_b32 s6, -12551; GFX12-NEXT: ; implicit-def: $sgpr72552; GFX12-NEXT: .LBB15_3: ; %Flow2553; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x242554; GFX12-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s62555; GFX12-NEXT: s_cbranch_vccnz .LBB15_52556; GFX12-NEXT: ; %bb.4: ; %if2557; GFX12-NEXT: s_mov_b32 s7, 0x310160002558; GFX12-NEXT: s_mov_b32 s6, -12559; GFX12-NEXT: s_wait_kmcnt 0x02560; GFX12-NEXT: s_mov_b32 s4, s22561; GFX12-NEXT: s_mov_b32 s5, s32562; GFX12-NEXT: buffer_load_b32 v0, off, s[4:7], null2563; GFX12-NEXT: s_branch .LBB15_62564; GFX12-NEXT: .LBB15_5:2565; GFX12-NEXT: v_mov_b32_e32 v0, s72566; GFX12-NEXT: .LBB15_6: ; %endif2567; GFX12-NEXT: s_wait_kmcnt 0x02568; GFX12-NEXT: s_mov_b32 s3, 0x310160002569; GFX12-NEXT: s_mov_b32 s2, -12570; GFX12-NEXT: s_wait_loadcnt 0x02571; GFX12-NEXT: buffer_store_b32 v0, off, s[0:3], null2572; GFX12-NEXT: s_endpgm2573;2574; GFX1250-LABEL: mul32_in_branch:2575; GFX1250: ; %bb.0: ; %entry2576; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 12577; GFX1250-NEXT: s_load_b64 s[0:1], s[4:5], 0x342578; GFX1250-NEXT: s_mov_b32 s6, 02579; GFX1250-NEXT: s_wait_kmcnt 0x02580; GFX1250-NEXT: s_cmp_lg_u32 s0, 02581; GFX1250-NEXT: s_cbranch_scc0 .LBB15_22582; GFX1250-NEXT: ; %bb.1: ; %else2583; GFX1250-NEXT: s_mul_i32 s7, s0, s12584; GFX1250-NEXT: s_branch .LBB15_32585; GFX1250-NEXT: .LBB15_2:2586; GFX1250-NEXT: s_mov_b32 s6, -12587; GFX1250-NEXT: ; implicit-def: $sgpr72588; GFX1250-NEXT: .LBB15_3: ; %Flow2589; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x242590; GFX1250-NEXT: s_and_not1_b32 vcc_lo, exec_lo, s62591; GFX1250-NEXT: s_cbranch_vccnz .LBB15_52592; GFX1250-NEXT: ; %bb.4: ; %if2593; GFX1250-NEXT: s_mov_b32 s7, 0x310160002594; GFX1250-NEXT: s_mov_b32 s6, -12595; GFX1250-NEXT: s_wait_kmcnt 0x02596; GFX1250-NEXT: s_mov_b32 s4, s22597; GFX1250-NEXT: s_mov_b32 s5, s32598; GFX1250-NEXT: buffer_load_b32 v0, off, s[4:7], null2599; GFX1250-NEXT: s_branch .LBB15_62600; GFX1250-NEXT: .LBB15_5:2601; GFX1250-NEXT: v_mov_b32_e32 v0, s72602; GFX1250-NEXT: .LBB15_6: ; %endif2603; GFX1250-NEXT: s_wait_kmcnt 0x02604; GFX1250-NEXT: s_mov_b32 s3, 0x310160002605; GFX1250-NEXT: s_mov_b32 s2, -12606; GFX1250-NEXT: s_wait_loadcnt 0x02607; GFX1250-NEXT: buffer_store_b32 v0, off, s[0:3], null2608; GFX1250-NEXT: s_endpgm2609;2610; EG-LABEL: mul32_in_branch:2611; EG: ; %bb.0: ; %entry2612; EG-NEXT: ALU_PUSH_BEFORE 3, @14, KC0[CB0:0-32], KC1[]2613; EG-NEXT: JUMP @3 POP:12614; EG-NEXT: ALU_POP_AFTER 4, @18, KC0[CB0:0-32], KC1[]2615; EG-NEXT: ALU_PUSH_BEFORE 2, @23, KC0[CB0:0-32], KC1[]2616; EG-NEXT: JUMP @8 POP:12617; EG-NEXT: ALU 0, @26, KC0[CB0:0-32], KC1[]2618; EG-NEXT: TEX 0 @122619; EG-NEXT: POP @8 POP:12620; EG-NEXT: ALU 1, @27, KC0[], KC1[]2621; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 12622; EG-NEXT: CF_END2623; EG-NEXT: PAD2624; EG-NEXT: Fetch clause starting at 12:2625; EG-NEXT: VTX_READ_32 T0.X, T0.X, 0, #12626; EG-NEXT: ALU clause starting at 14:2627; EG-NEXT: MOV T0.W, literal.x,2628; EG-NEXT: SETNE_INT * T1.W, KC0[2].W, 0.0,2629; EG-NEXT: 1(1.401298e-45), 0(0.000000e+00)2630; EG-NEXT: PRED_SETNE_INT * ExecMask,PredicateBit (MASKED), PS, 0.0,2631; EG-NEXT: ALU clause starting at 18:2632; EG-NEXT: MOV T1.W, KC0[2].W,2633; EG-NEXT: MOV * T2.W, KC0[3].X,2634; EG-NEXT: MOV T0.W, literal.x,2635; EG-NEXT: MULLO_INT * T0.X, PV.W, PS,2636; EG-NEXT: 0(0.000000e+00), 0(0.000000e+00)2637; EG-NEXT: ALU clause starting at 23:2638; EG-NEXT: MOV T1.W, KC0[2].Y,2639; EG-NEXT: SETE_INT * T0.W, T0.W, 0.0,2640; EG-NEXT: PRED_SETE_INT * ExecMask,PredicateBit (MASKED), PS, 0.0,2641; EG-NEXT: ALU clause starting at 26:2642; EG-NEXT: MOV * T0.X, KC0[2].Z,2643; EG-NEXT: ALU clause starting at 27:2644; EG-NEXT: LSHR * T1.X, T1.W, literal.x,2645; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)2646entry:2647 %0 = icmp eq i32 %a, 02648 br i1 %0, label %if, label %else2649 2650if:2651 %1 = load i32, ptr addrspace(1) %in2652 br label %endif2653 2654else:2655 %2 = mul i32 %a, %b2656 br label %endif2657 2658endif:2659 %3 = phi i32 [%1, %if], [%2, %else]2660 store i32 %3, ptr addrspace(1) %out2661 ret void2662}2663 2664define amdgpu_kernel void @mul64_in_branch(ptr addrspace(1) %out, ptr addrspace(1) %in, i64 %a, i64 %b, i64 %c) {2665; SI-LABEL: mul64_in_branch:2666; SI: ; %bb.0: ; %entry2667; SI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x92668; SI-NEXT: s_mov_b64 s[8:9], 02669; SI-NEXT: s_waitcnt lgkmcnt(0)2670; SI-NEXT: v_cmp_ne_u64_e64 s[10:11], s[4:5], 02671; SI-NEXT: s_and_b64 vcc, exec, s[10:11]2672; SI-NEXT: s_cbranch_vccz .LBB16_42673; SI-NEXT: ; %bb.1: ; %else2674; SI-NEXT: v_mov_b32_e32 v0, s62675; SI-NEXT: v_mul_hi_u32 v0, s4, v02676; SI-NEXT: s_mul_i32 s7, s4, s72677; SI-NEXT: s_mul_i32 s5, s5, s62678; SI-NEXT: s_mul_i32 s4, s4, s62679; SI-NEXT: v_add_i32_e32 v0, vcc, s7, v02680; SI-NEXT: v_add_i32_e32 v1, vcc, s5, v02681; SI-NEXT: v_mov_b32_e32 v0, s42682; SI-NEXT: s_andn2_b64 vcc, exec, s[8:9]2683; SI-NEXT: s_cbranch_vccnz .LBB16_32684; SI-NEXT: .LBB16_2: ; %if2685; SI-NEXT: s_mov_b32 s7, 0xf0002686; SI-NEXT: s_mov_b32 s6, -12687; SI-NEXT: s_mov_b32 s4, s22688; SI-NEXT: s_mov_b32 s5, s32689; SI-NEXT: buffer_load_dwordx2 v[0:1], off, s[4:7], 02690; SI-NEXT: .LBB16_3: ; %endif2691; SI-NEXT: s_mov_b32 s3, 0xf0002692; SI-NEXT: s_mov_b32 s2, -12693; SI-NEXT: s_waitcnt vmcnt(0)2694; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 02695; SI-NEXT: s_endpgm2696; SI-NEXT: .LBB16_4:2697; SI-NEXT: ; implicit-def: $vgpr0_vgpr12698; SI-NEXT: s_branch .LBB16_22699;2700; VI-LABEL: mul64_in_branch:2701; VI: ; %bb.0: ; %entry2702; VI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x242703; VI-NEXT: s_mov_b64 s[8:9], 02704; VI-NEXT: s_waitcnt lgkmcnt(0)2705; VI-NEXT: s_cmp_lg_u64 s[4:5], 02706; VI-NEXT: s_cbranch_scc0 .LBB16_42707; VI-NEXT: ; %bb.1: ; %else2708; VI-NEXT: v_mov_b32_e32 v0, s62709; VI-NEXT: v_mad_u64_u32 v[0:1], s[10:11], s4, v0, 02710; VI-NEXT: s_mul_i32 s4, s4, s72711; VI-NEXT: v_add_u32_e32 v1, vcc, s4, v12712; VI-NEXT: s_mul_i32 s4, s5, s62713; VI-NEXT: v_add_u32_e32 v1, vcc, s4, v12714; VI-NEXT: s_andn2_b64 vcc, exec, s[8:9]2715; VI-NEXT: s_cbranch_vccnz .LBB16_32716; VI-NEXT: .LBB16_2: ; %if2717; VI-NEXT: s_mov_b32 s7, 0xf0002718; VI-NEXT: s_mov_b32 s6, -12719; VI-NEXT: s_mov_b32 s4, s22720; VI-NEXT: s_mov_b32 s5, s32721; VI-NEXT: buffer_load_dwordx2 v[0:1], off, s[4:7], 02722; VI-NEXT: .LBB16_3: ; %endif2723; VI-NEXT: s_mov_b32 s3, 0xf0002724; VI-NEXT: s_mov_b32 s2, -12725; VI-NEXT: s_waitcnt vmcnt(0)2726; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 02727; VI-NEXT: s_endpgm2728; VI-NEXT: .LBB16_4:2729; VI-NEXT: ; implicit-def: $vgpr0_vgpr12730; VI-NEXT: s_branch .LBB16_22731;2732; GFX9-LABEL: mul64_in_branch:2733; GFX9: ; %bb.0: ; %entry2734; GFX9-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x242735; GFX9-NEXT: s_mov_b64 s[0:1], 02736; GFX9-NEXT: s_waitcnt lgkmcnt(0)2737; GFX9-NEXT: s_cmp_lg_u64 s[12:13], 02738; GFX9-NEXT: s_cbranch_scc0 .LBB16_32739; GFX9-NEXT: ; %bb.1: ; %else2740; GFX9-NEXT: s_mul_i32 s2, s12, s152741; GFX9-NEXT: s_mul_hi_u32 s3, s12, s142742; GFX9-NEXT: s_add_i32 s2, s3, s22743; GFX9-NEXT: s_mul_i32 s3, s13, s142744; GFX9-NEXT: s_add_i32 s3, s2, s32745; GFX9-NEXT: s_mul_i32 s2, s12, s142746; GFX9-NEXT: s_andn2_b64 vcc, exec, s[0:1]2747; GFX9-NEXT: s_cbranch_vccnz .LBB16_42748; GFX9-NEXT: .LBB16_2: ; %if2749; GFX9-NEXT: s_mov_b32 s3, 0xf0002750; GFX9-NEXT: s_mov_b32 s2, -12751; GFX9-NEXT: s_mov_b32 s0, s102752; GFX9-NEXT: s_mov_b32 s1, s112753; GFX9-NEXT: buffer_load_dwordx2 v[0:1], off, s[0:3], 02754; GFX9-NEXT: s_branch .LBB16_52755; GFX9-NEXT: .LBB16_3:2756; GFX9-NEXT: ; implicit-def: $sgpr2_sgpr32757; GFX9-NEXT: s_branch .LBB16_22758; GFX9-NEXT: .LBB16_4:2759; GFX9-NEXT: v_mov_b32_e32 v0, s22760; GFX9-NEXT: v_mov_b32_e32 v1, s32761; GFX9-NEXT: .LBB16_5: ; %endif2762; GFX9-NEXT: s_mov_b32 s11, 0xf0002763; GFX9-NEXT: s_mov_b32 s10, -12764; GFX9-NEXT: s_waitcnt vmcnt(0)2765; GFX9-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 02766; GFX9-NEXT: s_endpgm2767;2768; GFX10-LABEL: mul64_in_branch:2769; GFX10: ; %bb.0: ; %entry2770; GFX10-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x242771; GFX10-NEXT: s_waitcnt lgkmcnt(0)2772; GFX10-NEXT: s_cmp_lg_u64 s[12:13], 02773; GFX10-NEXT: s_cbranch_scc0 .LBB16_32774; GFX10-NEXT: ; %bb.1: ; %else2775; GFX10-NEXT: s_mul_i32 s0, s12, s152776; GFX10-NEXT: s_mul_hi_u32 s1, s12, s142777; GFX10-NEXT: s_mul_i32 s2, s13, s142778; GFX10-NEXT: s_add_i32 s0, s1, s02779; GFX10-NEXT: s_add_i32 s1, s0, s22780; GFX10-NEXT: s_mul_i32 s0, s12, s142781; GFX10-NEXT: s_cbranch_execnz .LBB16_42782; GFX10-NEXT: .LBB16_2: ; %if2783; GFX10-NEXT: s_mov_b32 s3, 0x310160002784; GFX10-NEXT: s_mov_b32 s2, -12785; GFX10-NEXT: s_mov_b32 s0, s102786; GFX10-NEXT: s_mov_b32 s1, s112787; GFX10-NEXT: buffer_load_dwordx2 v[0:1], off, s[0:3], 02788; GFX10-NEXT: s_branch .LBB16_52789; GFX10-NEXT: .LBB16_3:2790; GFX10-NEXT: ; implicit-def: $sgpr0_sgpr12791; GFX10-NEXT: s_branch .LBB16_22792; GFX10-NEXT: .LBB16_4:2793; GFX10-NEXT: v_mov_b32_e32 v0, s02794; GFX10-NEXT: v_mov_b32_e32 v1, s12795; GFX10-NEXT: .LBB16_5: ; %endif2796; GFX10-NEXT: s_mov_b32 s11, 0x310160002797; GFX10-NEXT: s_mov_b32 s10, -12798; GFX10-NEXT: s_waitcnt vmcnt(0)2799; GFX10-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 02800; GFX10-NEXT: s_endpgm2801;2802; GFX11-LABEL: mul64_in_branch:2803; GFX11: ; %bb.0: ; %entry2804; GFX11-NEXT: s_load_b256 s[0:7], s[4:5], 0x242805; GFX11-NEXT: s_waitcnt lgkmcnt(0)2806; GFX11-NEXT: s_cmp_lg_u64 s[4:5], 02807; GFX11-NEXT: s_cbranch_scc0 .LBB16_32808; GFX11-NEXT: ; %bb.1: ; %else2809; GFX11-NEXT: s_mul_i32 s7, s4, s72810; GFX11-NEXT: s_mul_hi_u32 s8, s4, s62811; GFX11-NEXT: s_mul_i32 s5, s5, s62812; GFX11-NEXT: s_add_i32 s7, s8, s72813; GFX11-NEXT: s_mul_i32 s4, s4, s62814; GFX11-NEXT: s_add_i32 s5, s7, s52815; GFX11-NEXT: s_cbranch_execnz .LBB16_42816; GFX11-NEXT: .LBB16_2: ; %if2817; GFX11-NEXT: s_mov_b32 s7, 0x310160002818; GFX11-NEXT: s_mov_b32 s6, -12819; GFX11-NEXT: s_mov_b32 s4, s22820; GFX11-NEXT: s_mov_b32 s5, s32821; GFX11-NEXT: buffer_load_b64 v[0:1], off, s[4:7], 02822; GFX11-NEXT: s_branch .LBB16_52823; GFX11-NEXT: .LBB16_3:2824; GFX11-NEXT: ; implicit-def: $sgpr4_sgpr52825; GFX11-NEXT: s_branch .LBB16_22826; GFX11-NEXT: .LBB16_4:2827; GFX11-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s52828; GFX11-NEXT: .LBB16_5: ; %endif2829; GFX11-NEXT: s_mov_b32 s3, 0x310160002830; GFX11-NEXT: s_mov_b32 s2, -12831; GFX11-NEXT: s_waitcnt vmcnt(0)2832; GFX11-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 02833; GFX11-NEXT: s_endpgm2834;2835; GFX12-LABEL: mul64_in_branch:2836; GFX12: ; %bb.0: ; %entry2837; GFX12-NEXT: s_load_b256 s[0:7], s[4:5], 0x242838; GFX12-NEXT: s_wait_kmcnt 0x02839; GFX12-NEXT: s_cmp_lg_u64 s[4:5], 02840; GFX12-NEXT: s_cbranch_scc0 .LBB16_32841; GFX12-NEXT: ; %bb.1: ; %else2842; GFX12-NEXT: s_mul_u64 s[4:5], s[4:5], s[6:7]2843; GFX12-NEXT: s_cbranch_execnz .LBB16_42844; GFX12-NEXT: .LBB16_2: ; %if2845; GFX12-NEXT: s_mov_b32 s7, 0x310160002846; GFX12-NEXT: s_mov_b32 s6, -12847; GFX12-NEXT: s_mov_b32 s4, s22848; GFX12-NEXT: s_mov_b32 s5, s32849; GFX12-NEXT: buffer_load_b64 v[0:1], off, s[4:7], null2850; GFX12-NEXT: s_branch .LBB16_52851; GFX12-NEXT: .LBB16_3:2852; GFX12-NEXT: ; implicit-def: $sgpr4_sgpr52853; GFX12-NEXT: s_branch .LBB16_22854; GFX12-NEXT: .LBB16_4:2855; GFX12-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s52856; GFX12-NEXT: .LBB16_5: ; %endif2857; GFX12-NEXT: s_mov_b32 s3, 0x310160002858; GFX12-NEXT: s_mov_b32 s2, -12859; GFX12-NEXT: s_wait_loadcnt 0x02860; GFX12-NEXT: buffer_store_b64 v[0:1], off, s[0:3], null2861; GFX12-NEXT: s_endpgm2862;2863; GFX1250-LABEL: mul64_in_branch:2864; GFX1250: ; %bb.0: ; %entry2865; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 12866; GFX1250-NEXT: s_load_b256 s[8:15], s[4:5], 0x242867; GFX1250-NEXT: s_wait_kmcnt 0x02868; GFX1250-NEXT: s_cmp_lg_u64 s[12:13], 02869; GFX1250-NEXT: s_cbranch_scc0 .LBB16_32870; GFX1250-NEXT: ; %bb.1: ; %else2871; GFX1250-NEXT: s_mul_u64 s[0:1], s[12:13], s[14:15]2872; GFX1250-NEXT: s_cbranch_execnz .LBB16_42873; GFX1250-NEXT: .LBB16_2: ; %if2874; GFX1250-NEXT: s_mov_b32 s3, 0x310160002875; GFX1250-NEXT: s_mov_b32 s2, -12876; GFX1250-NEXT: s_mov_b32 s0, s102877; GFX1250-NEXT: s_mov_b32 s1, s112878; GFX1250-NEXT: buffer_load_b64 v[0:1], off, s[0:3], null2879; GFX1250-NEXT: s_branch .LBB16_52880; GFX1250-NEXT: .LBB16_3:2881; GFX1250-NEXT: ; implicit-def: $sgpr0_sgpr12882; GFX1250-NEXT: s_branch .LBB16_22883; GFX1250-NEXT: .LBB16_4:2884; GFX1250-NEXT: v_mov_b64_e32 v[0:1], s[0:1]2885; GFX1250-NEXT: .LBB16_5: ; %endif2886; GFX1250-NEXT: s_mov_b32 s11, 0x310160002887; GFX1250-NEXT: s_mov_b32 s10, -12888; GFX1250-NEXT: s_wait_loadcnt 0x02889; GFX1250-NEXT: buffer_store_b64 v[0:1], off, s[8:11], null2890; GFX1250-NEXT: s_endpgm2891;2892; EG-LABEL: mul64_in_branch:2893; EG: ; %bb.0: ; %entry2894; EG-NEXT: ALU_PUSH_BEFORE 4, @14, KC0[CB0:0-32], KC1[]2895; EG-NEXT: JUMP @3 POP:12896; EG-NEXT: ALU_POP_AFTER 11, @19, KC0[CB0:0-32], KC1[]2897; EG-NEXT: ALU_PUSH_BEFORE 2, @31, KC0[CB0:0-32], KC1[]2898; EG-NEXT: JUMP @8 POP:12899; EG-NEXT: ALU 0, @34, KC0[CB0:0-32], KC1[]2900; EG-NEXT: TEX 0 @122901; EG-NEXT: POP @8 POP:12902; EG-NEXT: ALU 1, @35, KC0[], KC1[]2903; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 12904; EG-NEXT: CF_END2905; EG-NEXT: PAD2906; EG-NEXT: Fetch clause starting at 12:2907; EG-NEXT: VTX_READ_64 T0.XY, T0.X, 0, #12908; EG-NEXT: ALU clause starting at 14:2909; EG-NEXT: OR_INT T0.W, KC0[2].W, KC0[3].X,2910; EG-NEXT: MOV * T1.W, literal.x,2911; EG-NEXT: 1(1.401298e-45), 0(0.000000e+00)2912; EG-NEXT: SETNE_INT * T0.W, PV.W, 0.0,2913; EG-NEXT: PRED_SETNE_INT * ExecMask,PredicateBit (MASKED), PV.W, 0.0,2914; EG-NEXT: ALU clause starting at 19:2915; EG-NEXT: MOV T0.W, KC0[2].W,2916; EG-NEXT: MOV * T1.W, KC0[3].Z,2917; EG-NEXT: MOV T2.W, KC0[3].Y,2918; EG-NEXT: MULLO_INT * T0.X, PV.W, PS,2919; EG-NEXT: MOV T1.W, KC0[3].X,2920; EG-NEXT: MULHI * T0.Y, T0.W, PV.W,2921; EG-NEXT: ADD_INT T3.W, PS, T0.X,2922; EG-NEXT: MULLO_INT * T0.X, PV.W, T2.W,2923; EG-NEXT: ADD_INT T0.Y, PV.W, PS,2924; EG-NEXT: MOV T1.W, literal.x,2925; EG-NEXT: MULLO_INT * T0.X, T0.W, T2.W,2926; EG-NEXT: 0(0.000000e+00), 0(0.000000e+00)2927; EG-NEXT: ALU clause starting at 31:2928; EG-NEXT: MOV T0.W, KC0[2].Y,2929; EG-NEXT: SETE_INT * T1.W, T1.W, 0.0,2930; EG-NEXT: PRED_SETE_INT * ExecMask,PredicateBit (MASKED), PS, 0.0,2931; EG-NEXT: ALU clause starting at 34:2932; EG-NEXT: MOV * T0.X, KC0[2].Z,2933; EG-NEXT: ALU clause starting at 35:2934; EG-NEXT: LSHR * T1.X, T0.W, literal.x,2935; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)2936entry:2937 %0 = icmp eq i64 %a, 02938 br i1 %0, label %if, label %else2939 2940if:2941 %1 = load i64, ptr addrspace(1) %in2942 br label %endif2943 2944else:2945 %2 = mul i64 %a, %b2946 br label %endif2947 2948endif:2949 %3 = phi i64 [%1, %if], [%2, %else]2950 store i64 %3, ptr addrspace(1) %out2951 ret void2952}2953 2954define amdgpu_kernel void @s_mul_i128(ptr addrspace(1) %out, [8 x i32], i128 %a, [8 x i32], i128 %b) nounwind #0 {2955; SI-LABEL: s_mul_i128:2956; SI: ; %bb.0: ; %entry2957; SI-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x132958; SI-NEXT: s_load_dwordx4 s[12:15], s[4:5], 0x1f2959; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x92960; SI-NEXT: s_mov_b32 s3, 0xf0002961; SI-NEXT: s_mov_b32 s2, -12962; SI-NEXT: s_waitcnt lgkmcnt(0)2963; SI-NEXT: v_mov_b32_e32 v0, s102964; SI-NEXT: v_mul_hi_u32 v0, s12, v02965; SI-NEXT: v_mov_b32_e32 v1, s82966; SI-NEXT: v_mul_hi_u32 v1, s14, v12967; SI-NEXT: s_mul_i32 s4, s12, s112968; SI-NEXT: s_mul_i32 s5, s13, s102969; SI-NEXT: v_add_i32_e32 v0, vcc, s4, v02970; SI-NEXT: v_add_i32_e32 v0, vcc, s5, v02971; SI-NEXT: s_mul_i32 s5, s14, s92972; SI-NEXT: v_add_i32_e32 v1, vcc, s5, v12973; SI-NEXT: s_mul_i32 s5, s15, s82974; SI-NEXT: v_add_i32_e32 v1, vcc, s5, v12975; SI-NEXT: s_mul_i32 s5, s14, s82976; SI-NEXT: s_mul_i32 s4, s12, s102977; SI-NEXT: v_mov_b32_e32 v2, s52978; SI-NEXT: v_add_i32_e32 v2, vcc, s4, v22979; SI-NEXT: v_addc_u32_e32 v0, vcc, v1, v0, vcc2980; SI-NEXT: v_mov_b32_e32 v1, s122981; SI-NEXT: v_mul_hi_u32 v5, s8, v12982; SI-NEXT: v_mul_hi_u32 v1, s9, v12983; SI-NEXT: v_mov_b32_e32 v3, s132984; SI-NEXT: v_mul_hi_u32 v4, s8, v32985; SI-NEXT: s_mul_i32 s5, s9, s122986; SI-NEXT: v_add_i32_e32 v5, vcc, s5, v52987; SI-NEXT: s_mul_i32 s4, s8, s132988; SI-NEXT: v_addc_u32_e32 v6, vcc, 0, v1, vcc2989; SI-NEXT: v_add_i32_e32 v1, vcc, s4, v52990; SI-NEXT: v_addc_u32_e32 v4, vcc, 0, v4, vcc2991; SI-NEXT: v_add_i32_e32 v4, vcc, v6, v42992; SI-NEXT: v_mul_hi_u32 v3, s9, v32993; SI-NEXT: v_addc_u32_e64 v5, s[4:5], 0, 0, vcc2994; SI-NEXT: s_mul_i32 s4, s9, s132995; SI-NEXT: v_add_i32_e32 v4, vcc, s4, v42996; SI-NEXT: v_addc_u32_e32 v3, vcc, v3, v5, vcc2997; SI-NEXT: v_add_i32_e32 v2, vcc, v4, v22998; SI-NEXT: s_mul_i32 s4, s8, s122999; SI-NEXT: v_addc_u32_e32 v3, vcc, v3, v0, vcc3000; SI-NEXT: v_mov_b32_e32 v0, s43001; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 03002; SI-NEXT: s_endpgm3003;3004; VI-LABEL: s_mul_i128:3005; VI: ; %bb.0: ; %entry3006; VI-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x4c3007; VI-NEXT: s_load_dwordx4 s[12:15], s[4:5], 0x7c3008; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x243009; VI-NEXT: v_mov_b32_e32 v2, 03010; VI-NEXT: s_mov_b32 s3, 0xf0003011; VI-NEXT: s_waitcnt lgkmcnt(0)3012; VI-NEXT: v_mov_b32_e32 v0, s103013; VI-NEXT: v_mad_u64_u32 v[3:4], s[4:5], s12, v0, 03014; VI-NEXT: s_mul_i32 s4, s12, s113015; VI-NEXT: v_mov_b32_e32 v5, s123016; VI-NEXT: v_add_u32_e32 v0, vcc, s4, v43017; VI-NEXT: s_mul_i32 s4, s13, s103018; VI-NEXT: v_add_u32_e32 v4, vcc, s4, v03019; VI-NEXT: v_mad_u64_u32 v[0:1], s[4:5], s8, v5, 03020; VI-NEXT: v_mov_b32_e32 v7, s83021; VI-NEXT: v_mad_u64_u32 v[3:4], s[4:5], s14, v7, v[3:4]3022; VI-NEXT: v_mad_u64_u32 v[5:6], s[4:5], s9, v5, v[1:2]3023; VI-NEXT: v_mov_b32_e32 v7, s133024; VI-NEXT: s_mul_i32 s6, s15, s83025; VI-NEXT: v_mov_b32_e32 v1, v53026; VI-NEXT: v_mad_u64_u32 v[1:2], s[4:5], s8, v7, v[1:2]3027; VI-NEXT: v_add_u32_e32 v8, vcc, s6, v43028; VI-NEXT: v_add_u32_e32 v4, vcc, v6, v23029; VI-NEXT: v_addc_u32_e64 v5, s[4:5], 0, 0, vcc3030; VI-NEXT: v_mad_u64_u32 v[4:5], s[4:5], s9, v7, v[4:5]3031; VI-NEXT: s_mul_i32 s6, s14, s93032; VI-NEXT: v_add_u32_e32 v6, vcc, s6, v83033; VI-NEXT: v_add_u32_e32 v2, vcc, v4, v33034; VI-NEXT: s_mov_b32 s2, -13035; VI-NEXT: v_addc_u32_e32 v3, vcc, v5, v6, vcc3036; VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 03037; VI-NEXT: s_endpgm3038;3039; GFX9-LABEL: s_mul_i128:3040; GFX9: ; %bb.0: ; %entry3041; GFX9-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x7c3042; GFX9-NEXT: s_load_dwordx4 s[12:15], s[4:5], 0x4c3043; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x243044; GFX9-NEXT: s_mov_b32 s3, 0xf0003045; GFX9-NEXT: s_mov_b32 s2, -13046; GFX9-NEXT: s_waitcnt lgkmcnt(0)3047; GFX9-NEXT: s_mul_i32 s4, s8, s153048; GFX9-NEXT: s_mul_hi_u32 s5, s8, s143049; GFX9-NEXT: s_mul_i32 s6, s10, s133050; GFX9-NEXT: s_mul_hi_u32 s7, s10, s123051; GFX9-NEXT: s_add_i32 s4, s5, s43052; GFX9-NEXT: s_mul_i32 s5, s9, s143053; GFX9-NEXT: s_add_i32 s6, s7, s63054; GFX9-NEXT: s_mul_i32 s7, s11, s123055; GFX9-NEXT: s_add_i32 s4, s4, s53056; GFX9-NEXT: s_mul_i32 s5, s8, s143057; GFX9-NEXT: s_add_i32 s6, s6, s73058; GFX9-NEXT: s_mul_i32 s7, s10, s123059; GFX9-NEXT: s_add_u32 s7, s7, s53060; GFX9-NEXT: s_addc_u32 s6, s6, s43061; GFX9-NEXT: s_mul_i32 s14, s13, s83062; GFX9-NEXT: s_mul_hi_u32 s15, s12, s83063; GFX9-NEXT: s_mul_hi_u32 s11, s13, s83064; GFX9-NEXT: s_add_u32 s14, s14, s153065; GFX9-NEXT: s_mul_i32 s5, s12, s93066; GFX9-NEXT: s_addc_u32 s11, s11, 03067; GFX9-NEXT: s_mul_hi_u32 s10, s12, s93068; GFX9-NEXT: s_add_u32 s5, s5, s143069; GFX9-NEXT: s_addc_u32 s10, s10, 03070; GFX9-NEXT: s_add_u32 s10, s11, s103071; GFX9-NEXT: s_addc_u32 s11, 0, 03072; GFX9-NEXT: s_mul_hi_u32 s14, s13, s93073; GFX9-NEXT: s_mul_i32 s9, s13, s93074; GFX9-NEXT: s_add_u32 s9, s9, s103075; GFX9-NEXT: s_addc_u32 s10, s14, s113076; GFX9-NEXT: s_mov_b32 s4, 03077; GFX9-NEXT: s_add_u32 s9, s9, s73078; GFX9-NEXT: s_addc_u32 s10, s10, s63079; GFX9-NEXT: s_mul_i32 s6, s12, s83080; GFX9-NEXT: s_mov_b32 s7, s43081; GFX9-NEXT: s_or_b64 s[4:5], s[6:7], s[4:5]3082; GFX9-NEXT: v_mov_b32_e32 v0, s43083; GFX9-NEXT: v_mov_b32_e32 v1, s53084; GFX9-NEXT: v_mov_b32_e32 v2, s93085; GFX9-NEXT: v_mov_b32_e32 v3, s103086; GFX9-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 03087; GFX9-NEXT: s_endpgm3088;3089; GFX10-LABEL: s_mul_i128:3090; GFX10: ; %bb.0: ; %entry3091; GFX10-NEXT: s_clause 0x23092; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x4c3093; GFX10-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x7c3094; GFX10-NEXT: s_load_dwordx2 s[12:13], s[4:5], 0x243095; GFX10-NEXT: s_mov_b32 s6, 03096; GFX10-NEXT: s_mov_b32 s5, s63097; GFX10-NEXT: s_waitcnt lgkmcnt(0)3098; GFX10-NEXT: s_mul_i32 s3, s8, s33099; GFX10-NEXT: s_mul_hi_u32 s4, s8, s23100; GFX10-NEXT: s_mul_i32 s14, s10, s13101; GFX10-NEXT: s_mul_hi_u32 s15, s10, s03102; GFX10-NEXT: s_mul_i32 s7, s9, s23103; GFX10-NEXT: s_mul_i32 s11, s11, s03104; GFX10-NEXT: s_add_i32 s3, s4, s33105; GFX10-NEXT: s_add_i32 s4, s15, s143106; GFX10-NEXT: s_mul_i32 s2, s8, s23107; GFX10-NEXT: s_mul_i32 s10, s10, s03108; GFX10-NEXT: s_add_i32 s3, s3, s73109; GFX10-NEXT: s_add_i32 s4, s4, s113110; GFX10-NEXT: s_mul_i32 s19, s1, s83111; GFX10-NEXT: s_mul_hi_u32 s20, s0, s83112; GFX10-NEXT: s_add_u32 s2, s10, s23113; GFX10-NEXT: s_mul_hi_u32 s18, s1, s83114; GFX10-NEXT: s_addc_u32 s3, s4, s33115; GFX10-NEXT: s_mul_i32 s17, s0, s93116; GFX10-NEXT: s_add_u32 s4, s19, s203117; GFX10-NEXT: s_mul_hi_u32 s16, s0, s93118; GFX10-NEXT: s_mul_hi_u32 s21, s1, s93119; GFX10-NEXT: s_mul_i32 s1, s1, s93120; GFX10-NEXT: s_addc_u32 s9, s18, 03121; GFX10-NEXT: s_add_u32 s7, s17, s43122; GFX10-NEXT: s_addc_u32 s10, s16, 03123; GFX10-NEXT: s_mul_i32 s4, s0, s83124; GFX10-NEXT: s_add_u32 s0, s9, s103125; GFX10-NEXT: s_addc_u32 s8, 0, 03126; GFX10-NEXT: s_add_u32 s0, s1, s03127; GFX10-NEXT: s_addc_u32 s1, s21, s83128; GFX10-NEXT: s_add_u32 s2, s0, s23129; GFX10-NEXT: s_addc_u32 s3, s1, s33130; GFX10-NEXT: s_or_b64 s[0:1], s[4:5], s[6:7]3131; GFX10-NEXT: v_mov_b32_e32 v2, s23132; GFX10-NEXT: v_mov_b32_e32 v0, s03133; GFX10-NEXT: v_mov_b32_e32 v1, s13134; GFX10-NEXT: v_mov_b32_e32 v3, s33135; GFX10-NEXT: s_mov_b32 s15, 0x310160003136; GFX10-NEXT: s_mov_b32 s14, -13137; GFX10-NEXT: buffer_store_dwordx4 v[0:3], off, s[12:15], 03138; GFX10-NEXT: s_endpgm3139;3140; GFX11-LABEL: s_mul_i128:3141; GFX11: ; %bb.0: ; %entry3142; GFX11-NEXT: s_clause 0x23143; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x4c3144; GFX11-NEXT: s_load_b128 s[8:11], s[4:5], 0x7c3145; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x243146; GFX11-NEXT: s_mov_b32 s6, 03147; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)3148; GFX11-NEXT: s_mov_b32 s13, s63149; GFX11-NEXT: s_waitcnt lgkmcnt(0)3150; GFX11-NEXT: s_mul_i32 s3, s8, s33151; GFX11-NEXT: s_mul_hi_u32 s7, s8, s23152; GFX11-NEXT: s_mul_i32 s14, s10, s13153; GFX11-NEXT: s_mul_hi_u32 s15, s10, s03154; GFX11-NEXT: s_mul_i32 s12, s9, s23155; GFX11-NEXT: s_mul_i32 s11, s11, s03156; GFX11-NEXT: s_add_i32 s3, s7, s33157; GFX11-NEXT: s_add_i32 s7, s15, s143158; GFX11-NEXT: s_mul_i32 s2, s8, s23159; GFX11-NEXT: s_mul_i32 s10, s10, s03160; GFX11-NEXT: s_add_i32 s3, s3, s123161; GFX11-NEXT: s_add_i32 s7, s7, s113162; GFX11-NEXT: s_mul_i32 s19, s1, s83163; GFX11-NEXT: s_mul_hi_u32 s20, s0, s83164; GFX11-NEXT: s_add_u32 s2, s10, s23165; GFX11-NEXT: s_mul_hi_u32 s18, s1, s83166; GFX11-NEXT: s_addc_u32 s3, s7, s33167; GFX11-NEXT: s_mul_i32 s17, s0, s93168; GFX11-NEXT: s_add_u32 s7, s19, s203169; GFX11-NEXT: s_mul_hi_u32 s16, s0, s93170; GFX11-NEXT: s_mul_hi_u32 s21, s1, s93171; GFX11-NEXT: s_mul_i32 s1, s1, s93172; GFX11-NEXT: s_addc_u32 s9, s18, 03173; GFX11-NEXT: s_add_u32 s7, s17, s73174; GFX11-NEXT: s_addc_u32 s10, s16, 03175; GFX11-NEXT: s_mul_i32 s12, s0, s83176; GFX11-NEXT: s_add_u32 s0, s9, s103177; GFX11-NEXT: s_addc_u32 s8, 0, 03178; GFX11-NEXT: s_add_u32 s0, s1, s03179; GFX11-NEXT: s_addc_u32 s1, s21, s83180; GFX11-NEXT: s_add_u32 s2, s0, s23181; GFX11-NEXT: s_addc_u32 s3, s1, s33182; GFX11-NEXT: s_or_b64 s[0:1], s[12:13], s[6:7]3183; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)3184; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s13185; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v3, s33186; GFX11-NEXT: s_mov_b32 s7, 0x310160003187; GFX11-NEXT: s_mov_b32 s6, -13188; GFX11-NEXT: buffer_store_b128 v[0:3], off, s[4:7], 03189; GFX11-NEXT: s_endpgm3190;3191; GFX12-LABEL: s_mul_i128:3192; GFX12: ; %bb.0: ; %entry3193; GFX12-NEXT: s_clause 0x13194; GFX12-NEXT: s_load_b128 s[8:11], s[4:5], 0x7c3195; GFX12-NEXT: s_load_b128 s[12:15], s[4:5], 0x4c3196; GFX12-NEXT: s_mov_b32 s3, 03197; GFX12-NEXT: s_load_b64 s[0:1], s[4:5], 0x243198; GFX12-NEXT: s_mov_b32 s7, s33199; GFX12-NEXT: s_mov_b32 s5, s33200; GFX12-NEXT: s_mov_b32 s17, s33201; GFX12-NEXT: s_mov_b32 s19, s33202; GFX12-NEXT: s_mov_b32 s20, s33203; GFX12-NEXT: s_wait_kmcnt 0x03204; GFX12-NEXT: s_mov_b32 s2, s83205; GFX12-NEXT: s_mov_b32 s6, s123206; GFX12-NEXT: s_mov_b32 s4, s133207; GFX12-NEXT: s_mul_u64 s[22:23], s[6:7], s[2:3]3208; GFX12-NEXT: s_mul_u64 s[24:25], s[4:5], s[2:3]3209; GFX12-NEXT: s_mov_b32 s2, s233210; GFX12-NEXT: s_mov_b32 s16, s93211; GFX12-NEXT: s_mul_u64 s[10:11], s[10:11], s[12:13]3212; GFX12-NEXT: s_add_nc_u64 s[12:13], s[24:25], s[2:3]3213; GFX12-NEXT: s_mul_u64 s[6:7], s[6:7], s[16:17]3214; GFX12-NEXT: s_mov_b32 s2, s133215; GFX12-NEXT: s_mov_b32 s13, s33216; GFX12-NEXT: s_mul_u64 s[8:9], s[8:9], s[14:15]3217; GFX12-NEXT: s_add_nc_u64 s[6:7], s[6:7], s[12:13]3218; GFX12-NEXT: s_mul_u64 s[4:5], s[4:5], s[16:17]3219; GFX12-NEXT: s_mov_b32 s18, s73220; GFX12-NEXT: s_mov_b32 s23, s33221; GFX12-NEXT: s_add_nc_u64 s[2:3], s[2:3], s[18:19]3222; GFX12-NEXT: s_add_nc_u64 s[8:9], s[10:11], s[8:9]3223; GFX12-NEXT: s_mov_b32 s21, s63224; GFX12-NEXT: s_add_nc_u64 s[2:3], s[4:5], s[2:3]3225; GFX12-NEXT: s_or_b64 s[6:7], s[22:23], s[20:21]3226; GFX12-NEXT: s_add_nc_u64 s[2:3], s[2:3], s[8:9]3227; GFX12-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s73228; GFX12-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s33229; GFX12-NEXT: s_mov_b32 s3, 0x310160003230; GFX12-NEXT: s_mov_b32 s2, -13231; GFX12-NEXT: buffer_store_b128 v[0:3], off, s[0:3], null3232; GFX12-NEXT: s_endpgm3233;3234; GFX1250-LABEL: s_mul_i128:3235; GFX1250: ; %bb.0: ; %entry3236; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 13237; GFX1250-NEXT: s_clause 0x23238; GFX1250-NEXT: s_load_b128 s[8:11], s[4:5], 0x7c3239; GFX1250-NEXT: s_load_b128 s[12:15], s[4:5], 0x4c3240; GFX1250-NEXT: s_load_b64 s[0:1], s[4:5], 0x243241; GFX1250-NEXT: s_wait_xcnt 0x03242; GFX1250-NEXT: s_mov_b64 s[4:5], 0xffffffff3243; GFX1250-NEXT: s_mov_b32 s3, 03244; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1)3245; GFX1250-NEXT: s_mov_b32 s7, s33246; GFX1250-NEXT: s_mov_b32 s17, s33247; GFX1250-NEXT: s_mov_b32 s19, s33248; GFX1250-NEXT: s_mov_b32 s20, s33249; GFX1250-NEXT: s_wait_kmcnt 0x03250; GFX1250-NEXT: s_mov_b32 s2, s83251; GFX1250-NEXT: s_and_b64 s[4:5], s[12:13], s[4:5]3252; GFX1250-NEXT: s_mov_b32 s6, s133253; GFX1250-NEXT: s_mul_u64 s[10:11], s[10:11], s[12:13]3254; GFX1250-NEXT: s_mul_u64 s[12:13], s[4:5], s[2:3]3255; GFX1250-NEXT: s_mov_b32 s16, s93256; GFX1250-NEXT: s_mul_u64 s[8:9], s[8:9], s[14:15]3257; GFX1250-NEXT: s_mul_u64 s[14:15], s[6:7], s[2:3]3258; GFX1250-NEXT: s_mov_b32 s2, s133259; GFX1250-NEXT: s_mul_u64 s[4:5], s[4:5], s[16:17]3260; GFX1250-NEXT: s_add_nc_u64 s[14:15], s[14:15], s[2:3]3261; GFX1250-NEXT: s_mul_u64 s[6:7], s[6:7], s[16:17]3262; GFX1250-NEXT: s_mov_b32 s2, s153263; GFX1250-NEXT: s_mov_b32 s15, s33264; GFX1250-NEXT: s_mov_b32 s13, s33265; GFX1250-NEXT: s_add_nc_u64 s[4:5], s[4:5], s[14:15]3266; GFX1250-NEXT: s_add_nc_u64 s[8:9], s[10:11], s[8:9]3267; GFX1250-NEXT: s_mov_b32 s18, s53268; GFX1250-NEXT: s_mov_b32 s21, s43269; GFX1250-NEXT: s_add_nc_u64 s[2:3], s[2:3], s[18:19]3270; GFX1250-NEXT: s_or_b64 s[4:5], s[12:13], s[20:21]3271; GFX1250-NEXT: s_add_nc_u64 s[2:3], s[6:7], s[2:3]3272; GFX1250-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s53273; GFX1250-NEXT: s_add_nc_u64 s[2:3], s[2:3], s[8:9]3274; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1)3275; GFX1250-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s33276; GFX1250-NEXT: s_mov_b32 s3, 0x310160003277; GFX1250-NEXT: s_mov_b32 s2, -13278; GFX1250-NEXT: buffer_store_b128 v[0:3], off, s[0:3], null3279; GFX1250-NEXT: s_endpgm3280;3281; EG-LABEL: s_mul_i128:3282; EG: ; %bb.0: ; %entry3283; EG-NEXT: ALU 41, @4, KC0[CB0:0-32], KC1[]3284; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T1.X, 13285; EG-NEXT: CF_END3286; EG-NEXT: PAD3287; EG-NEXT: ALU clause starting at 4:3288; EG-NEXT: MULLO_INT * T0.X, KC0[5].X, KC0[8].X,3289; EG-NEXT: MULHI * T0.Y, KC0[5].X, KC0[8].X,3290; EG-NEXT: MULLO_INT * T0.Z, KC0[8].Y, KC0[4].W,3291; EG-NEXT: MULLO_INT * T0.W, KC0[8].X, KC0[5].Y,3292; EG-NEXT: MULHI * T1.X, KC0[5].X, KC0[7].W,3293; EG-NEXT: MULHI * T1.Y, KC0[4].W, KC0[8].X,3294; EG-NEXT: MULHI * T1.Z, KC0[8].Y, KC0[4].W,3295; EG-NEXT: MULLO_INT * T1.W, KC0[8].Y, KC0[5].X,3296; EG-NEXT: MULHI * T2.X, KC0[7].W, KC0[5].Y,3297; EG-NEXT: MULLO_INT * T2.Y, KC0[5].X, KC0[7].W,3298; EG-NEXT: MULHI * T2.Z, KC0[4].W, KC0[7].W,3299; EG-NEXT: ADD_INT T2.W, T2.Y, PS,3300; EG-NEXT: MULLO_INT * T3.X, KC0[4].W, KC0[8].X,3301; EG-NEXT: ADDC_UINT T2.Z, T2.Y, T2.Z,3302; EG-NEXT: ADDC_UINT T3.W, PS, PV.W,3303; EG-NEXT: MULLO_INT * T2.Y, KC0[7].W, KC0[5].Z,3304; EG-NEXT: ADD_INT T2.X, T2.X, PS,3305; EG-NEXT: ADD_INT T2.Y, T1.Z, T1.W,3306; EG-NEXT: ADD_INT T1.Z, T1.Y, PV.W,3307; EG-NEXT: ADD_INT T1.W, T1.X, PV.Z, BS:VEC_120/SCL_2123308; EG-NEXT: MULLO_INT * T1.X, KC0[8].Z, KC0[4].W,3309; EG-NEXT: ADD_INT T4.X, PV.W, PV.Z,3310; EG-NEXT: ADDC_UINT T1.Y, PV.W, PV.Z,3311; EG-NEXT: ADD_INT T1.Z, PV.Y, PS,3312; EG-NEXT: ADD_INT T0.W, PV.X, T0.W,3313; EG-NEXT: MULLO_INT * T1.X, KC0[7].W, KC0[5].Y,3314; EG-NEXT: ADD_INT T2.Y, PV.Z, PV.W,3315; EG-NEXT: ADDC_UINT T1.Z, T0.Z, PS,3316; EG-NEXT: ADD_INT T0.W, T0.Y, PV.Y,3317; EG-NEXT: ADDC_UINT * T1.W, T0.X, PV.X,3318; EG-NEXT: ADD_INT T0.Y, T0.X, T4.X,3319; EG-NEXT: ADD_INT T0.Z, T0.Z, T1.X, BS:VEC_021/SCL_1223320; EG-NEXT: ADD_INT T0.W, PV.W, PS,3321; EG-NEXT: ADD_INT * T1.W, PV.Y, PV.Z,3322; EG-NEXT: ADD_INT T0.W, PV.W, PS,3323; EG-NEXT: ADDC_UINT * T1.W, PV.Y, PV.Z,3324; EG-NEXT: ADD_INT * T0.W, PV.W, PS,3325; EG-NEXT: ADD_INT * T0.Z, T0.Y, T0.Z,3326; EG-NEXT: ADD_INT * T0.Y, T3.X, T2.W,3327; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,3328; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)3329; EG-NEXT: MULLO_INT * T0.X, KC0[4].W, KC0[7].W,3330entry:3331 %mul = mul i128 %a, %b3332 store i128 %mul, ptr addrspace(1) %out3333 ret void3334}3335 3336define amdgpu_kernel void @v_mul_i128(ptr addrspace(1) %out, ptr addrspace(1) %aptr, ptr addrspace(1) %bptr) #0 {3337; SI-LABEL: v_mul_i128:3338; SI: ; %bb.0: ; %entry3339; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0xb3340; SI-NEXT: s_mov_b32 s7, 0xf0003341; SI-NEXT: s_mov_b32 s6, 03342; SI-NEXT: v_lshlrev_b32_e32 v8, 4, v03343; SI-NEXT: v_mov_b32_e32 v9, 03344; SI-NEXT: s_waitcnt lgkmcnt(0)3345; SI-NEXT: s_mov_b64 s[4:5], s[0:1]3346; SI-NEXT: s_mov_b64 s[0:1], s[2:3]3347; SI-NEXT: s_mov_b64 s[2:3], s[6:7]3348; SI-NEXT: buffer_load_dwordx4 v[0:3], v[8:9], s[4:7], 0 addr643349; SI-NEXT: buffer_load_dwordx4 v[4:7], v[8:9], s[0:3], 0 addr643350; SI-NEXT: s_waitcnt vmcnt(0)3351; SI-NEXT: v_mul_lo_u32 v3, v4, v33352; SI-NEXT: v_mul_hi_u32 v10, v4, v23353; SI-NEXT: v_mul_lo_u32 v12, v6, v13354; SI-NEXT: v_mul_hi_u32 v13, v6, v03355; SI-NEXT: v_mul_lo_u32 v17, v1, v43356; SI-NEXT: v_mul_hi_u32 v18, v0, v43357; SI-NEXT: v_mul_lo_u32 v11, v5, v23358; SI-NEXT: v_mul_lo_u32 v7, v7, v03359; SI-NEXT: v_mul_hi_u32 v16, v1, v43360; SI-NEXT: v_mul_lo_u32 v15, v0, v53361; SI-NEXT: v_mul_hi_u32 v14, v0, v53362; SI-NEXT: v_mul_hi_u32 v19, v1, v53363; SI-NEXT: v_mul_lo_u32 v5, v1, v53364; SI-NEXT: v_add_i32_e32 v1, vcc, v10, v33365; SI-NEXT: v_add_i32_e32 v3, vcc, v13, v123366; SI-NEXT: v_mul_lo_u32 v2, v4, v23367; SI-NEXT: v_mul_lo_u32 v6, v6, v03368; SI-NEXT: v_mul_lo_u32 v0, v0, v43369; SI-NEXT: v_add_i32_e32 v4, vcc, v17, v183370; SI-NEXT: v_addc_u32_e32 v10, vcc, 0, v16, vcc3371; SI-NEXT: v_add_i32_e32 v11, vcc, v1, v113372; SI-NEXT: v_add_i32_e32 v3, vcc, v3, v73373; SI-NEXT: v_add_i32_e32 v1, vcc, v15, v43374; SI-NEXT: v_addc_u32_e32 v4, vcc, 0, v14, vcc3375; SI-NEXT: v_add_i32_e32 v2, vcc, v6, v23376; SI-NEXT: v_addc_u32_e32 v3, vcc, v3, v11, vcc3377; SI-NEXT: v_add_i32_e32 v4, vcc, v10, v43378; SI-NEXT: v_addc_u32_e64 v6, s[4:5], 0, 0, vcc3379; SI-NEXT: v_add_i32_e32 v4, vcc, v5, v43380; SI-NEXT: v_addc_u32_e32 v5, vcc, v19, v6, vcc3381; SI-NEXT: v_add_i32_e32 v2, vcc, v4, v23382; SI-NEXT: v_addc_u32_e32 v3, vcc, v5, v3, vcc3383; SI-NEXT: buffer_store_dwordx4 v[0:3], v[8:9], s[0:3], 0 addr643384; SI-NEXT: s_endpgm3385;3386; VI-LABEL: v_mul_i128:3387; VI: ; %bb.0: ; %entry3388; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2c3389; VI-NEXT: v_lshlrev_b32_e32 v2, 4, v03390; VI-NEXT: v_mov_b32_e32 v9, 03391; VI-NEXT: s_waitcnt lgkmcnt(0)3392; VI-NEXT: v_mov_b32_e32 v1, s13393; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v23394; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc3395; VI-NEXT: v_mov_b32_e32 v3, s33396; VI-NEXT: v_add_u32_e32 v11, vcc, s2, v23397; VI-NEXT: v_addc_u32_e32 v12, vcc, 0, v3, vcc3398; VI-NEXT: flat_load_dwordx4 v[0:3], v[0:1]3399; VI-NEXT: flat_load_dwordx4 v[4:7], v[11:12]3400; VI-NEXT: s_waitcnt vmcnt(0)3401; VI-NEXT: v_mul_lo_u32 v3, v4, v33402; VI-NEXT: v_mad_u64_u32 v[13:14], s[0:1], v4, v2, 03403; VI-NEXT: v_mul_lo_u32 v2, v5, v23404; VI-NEXT: v_mul_lo_u32 v10, v7, v03405; VI-NEXT: v_mad_u64_u32 v[7:8], s[0:1], v0, v4, 03406; VI-NEXT: v_add_u32_e32 v3, vcc, v14, v33407; VI-NEXT: v_add_u32_e32 v14, vcc, v3, v23408; VI-NEXT: v_mad_u64_u32 v[2:3], s[0:1], v1, v4, v[8:9]3409; VI-NEXT: v_mad_u64_u32 v[13:14], s[0:1], v6, v0, v[13:14]3410; VI-NEXT: v_mov_b32_e32 v8, v23411; VI-NEXT: v_mad_u64_u32 v[8:9], s[0:1], v0, v5, v[8:9]3412; VI-NEXT: v_mul_lo_u32 v4, v6, v13413; VI-NEXT: v_add_u32_e32 v6, vcc, v10, v143414; VI-NEXT: v_add_u32_e32 v2, vcc, v3, v93415; VI-NEXT: v_addc_u32_e64 v3, s[0:1], 0, 0, vcc3416; VI-NEXT: v_mad_u64_u32 v[0:1], s[0:1], v1, v5, v[2:3]3417; VI-NEXT: v_add_u32_e32 v2, vcc, v4, v63418; VI-NEXT: v_add_u32_e32 v9, vcc, v0, v133419; VI-NEXT: v_addc_u32_e32 v10, vcc, v1, v2, vcc3420; VI-NEXT: flat_store_dwordx4 v[11:12], v[7:10]3421; VI-NEXT: s_endpgm3422;3423; GFX9-LABEL: v_mul_i128:3424; GFX9: ; %bb.0: ; %entry3425; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2c3426; GFX9-NEXT: v_lshlrev_b32_e32 v13, 4, v03427; GFX9-NEXT: v_mov_b32_e32 v10, 03428; GFX9-NEXT: s_waitcnt lgkmcnt(0)3429; GFX9-NEXT: global_load_dwordx4 v[0:3], v13, s[0:1]3430; GFX9-NEXT: global_load_dwordx4 v[4:7], v13, s[2:3]3431; GFX9-NEXT: s_waitcnt vmcnt(0)3432; GFX9-NEXT: v_mad_u64_u32 v[8:9], s[0:1], v0, v4, 03433; GFX9-NEXT: v_mul_lo_u32 v14, v5, v23434; GFX9-NEXT: v_mul_lo_u32 v15, v4, v33435; GFX9-NEXT: v_mad_u64_u32 v[11:12], s[0:1], v1, v4, v[9:10]3436; GFX9-NEXT: v_mad_u64_u32 v[2:3], s[0:1], v4, v2, 03437; GFX9-NEXT: v_mov_b32_e32 v9, v113438; GFX9-NEXT: v_mad_u64_u32 v[9:10], s[0:1], v0, v5, v[9:10]3439; GFX9-NEXT: v_add3_u32 v3, v3, v15, v143440; GFX9-NEXT: v_mul_lo_u32 v4, v6, v13441; GFX9-NEXT: v_mad_u64_u32 v[2:3], s[0:1], v6, v0, v[2:3]3442; GFX9-NEXT: v_add_co_u32_e32 v6, vcc, v12, v103443; GFX9-NEXT: v_mul_lo_u32 v14, v7, v03444; GFX9-NEXT: v_addc_co_u32_e64 v7, s[0:1], 0, 0, vcc3445; GFX9-NEXT: v_mad_u64_u32 v[0:1], s[0:1], v1, v5, v[6:7]3446; GFX9-NEXT: v_add3_u32 v3, v14, v3, v43447; GFX9-NEXT: v_add_co_u32_e32 v10, vcc, v0, v23448; GFX9-NEXT: v_addc_co_u32_e32 v11, vcc, v1, v3, vcc3449; GFX9-NEXT: global_store_dwordx4 v13, v[8:11], s[2:3]3450; GFX9-NEXT: s_endpgm3451;3452; GFX10-LABEL: v_mul_i128:3453; GFX10: ; %bb.0: ; %entry3454; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2c3455; GFX10-NEXT: v_lshlrev_b32_e32 v13, 4, v03456; GFX10-NEXT: v_mov_b32_e32 v10, 03457; GFX10-NEXT: s_waitcnt lgkmcnt(0)3458; GFX10-NEXT: s_clause 0x13459; GFX10-NEXT: global_load_dwordx4 v[0:3], v13, s[0:1]3460; GFX10-NEXT: global_load_dwordx4 v[4:7], v13, s[2:3]3461; GFX10-NEXT: s_waitcnt vmcnt(0)3462; GFX10-NEXT: v_mad_u64_u32 v[8:9], s0, v0, v4, 03463; GFX10-NEXT: v_mul_lo_u32 v14, v5, v23464; GFX10-NEXT: v_mul_lo_u32 v7, v7, v03465; GFX10-NEXT: v_mad_u64_u32 v[11:12], s0, v1, v4, v[9:10]3466; GFX10-NEXT: v_mov_b32_e32 v9, v113467; GFX10-NEXT: v_mul_lo_u32 v11, v4, v33468; GFX10-NEXT: v_mad_u64_u32 v[2:3], s0, v4, v2, 03469; GFX10-NEXT: v_mul_lo_u32 v4, v6, v13470; GFX10-NEXT: v_mad_u64_u32 v[9:10], s0, v0, v5, v[9:10]3471; GFX10-NEXT: v_add3_u32 v3, v3, v11, v143472; GFX10-NEXT: v_add_co_u32 v10, s0, v12, v103473; GFX10-NEXT: v_add_co_ci_u32_e64 v11, s0, 0, 0, s03474; GFX10-NEXT: v_mad_u64_u32 v[2:3], s0, v6, v0, v[2:3]3475; GFX10-NEXT: v_mad_u64_u32 v[0:1], s0, v1, v5, v[10:11]3476; GFX10-NEXT: v_add3_u32 v3, v7, v3, v43477; GFX10-NEXT: v_add_co_u32 v10, vcc_lo, v0, v23478; GFX10-NEXT: v_add_co_ci_u32_e32 v11, vcc_lo, v1, v3, vcc_lo3479; GFX10-NEXT: global_store_dwordx4 v13, v[8:11], s[2:3]3480; GFX10-NEXT: s_endpgm3481;3482; GFX11-LABEL: v_mul_i128:3483; GFX11: ; %bb.0: ; %entry3484; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x2c3485; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v03486; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)3487; GFX11-NEXT: v_dual_mov_b32 v10, 0 :: v_dual_lshlrev_b32 v15, 4, v03488; GFX11-NEXT: s_waitcnt lgkmcnt(0)3489; GFX11-NEXT: s_clause 0x13490; GFX11-NEXT: global_load_b128 v[0:3], v15, s[0:1]3491; GFX11-NEXT: global_load_b128 v[4:7], v15, s[2:3]3492; GFX11-NEXT: s_waitcnt vmcnt(0)3493; GFX11-NEXT: v_mad_u64_u32 v[8:9], null, v0, v4, 03494; GFX11-NEXT: v_mul_lo_u32 v16, v5, v23495; GFX11-NEXT: v_mad_u64_u32 v[13:14], null, v4, v2, 03496; GFX11-NEXT: v_mul_lo_u32 v17, v6, v13497; GFX11-NEXT: v_mul_lo_u32 v18, v7, v03498; GFX11-NEXT: v_mad_u64_u32 v[11:12], null, v1, v4, v[9:10]3499; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)3500; GFX11-NEXT: v_mov_b32_e32 v9, v113501; GFX11-NEXT: v_mul_lo_u32 v11, v4, v33502; GFX11-NEXT: v_mad_u64_u32 v[2:3], null, v0, v5, v[9:10]3503; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3504; GFX11-NEXT: v_add3_u32 v14, v14, v11, v163505; GFX11-NEXT: v_add_co_u32 v3, s0, v12, v33506; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)3507; GFX11-NEXT: v_add_co_ci_u32_e64 v4, null, 0, 0, s03508; GFX11-NEXT: v_mad_u64_u32 v[9:10], null, v6, v0, v[13:14]3509; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3510; GFX11-NEXT: v_mad_u64_u32 v[6:7], null, v1, v5, v[3:4]3511; GFX11-NEXT: v_add3_u32 v0, v18, v10, v173512; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)3513; GFX11-NEXT: v_add_co_u32 v10, vcc_lo, v6, v93514; GFX11-NEXT: v_add_co_ci_u32_e64 v11, null, v7, v0, vcc_lo3515; GFX11-NEXT: v_mov_b32_e32 v9, v23516; GFX11-NEXT: global_store_b128 v15, v[8:11], s[2:3]3517; GFX11-NEXT: s_endpgm3518;3519; GFX12-LABEL: v_mul_i128:3520; GFX12: ; %bb.0: ; %entry3521; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x2c3522; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v03523; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)3524; GFX12-NEXT: v_dual_mov_b32 v10, 0 :: v_dual_lshlrev_b32 v13, 4, v03525; GFX12-NEXT: s_wait_kmcnt 0x03526; GFX12-NEXT: s_clause 0x13527; GFX12-NEXT: global_load_b128 v[0:3], v13, s[0:1]3528; GFX12-NEXT: global_load_b128 v[4:7], v13, s[2:3]3529; GFX12-NEXT: s_wait_loadcnt 0x03530; GFX12-NEXT: v_mad_co_u64_u32 v[8:9], null, v0, v4, 03531; GFX12-NEXT: v_mul_lo_u32 v14, v5, v23532; GFX12-NEXT: v_mul_lo_u32 v7, v7, v03533; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)3534; GFX12-NEXT: v_mad_co_u64_u32 v[11:12], null, v1, v4, v[9:10]3535; GFX12-NEXT: v_mov_b32_e32 v9, v113536; GFX12-NEXT: v_mul_lo_u32 v11, v4, v33537; GFX12-NEXT: v_mad_co_u64_u32 v[2:3], null, v4, v2, 03538; GFX12-NEXT: v_mul_lo_u32 v4, v6, v13539; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)3540; GFX12-NEXT: v_mad_co_u64_u32 v[9:10], null, v0, v5, v[9:10]3541; GFX12-NEXT: v_add3_u32 v3, v3, v11, v143542; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)3543; GFX12-NEXT: v_add_co_u32 v10, s0, v12, v103544; GFX12-NEXT: v_add_co_ci_u32_e64 v11, null, 0, 0, s03545; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)3546; GFX12-NEXT: v_mad_co_u64_u32 v[2:3], null, v6, v0, v[2:3]3547; GFX12-NEXT: v_mad_co_u64_u32 v[0:1], null, v1, v5, v[10:11]3548; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3549; GFX12-NEXT: v_add3_u32 v3, v7, v3, v43550; GFX12-NEXT: v_add_co_u32 v10, vcc_lo, v0, v23551; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)3552; GFX12-NEXT: v_add_co_ci_u32_e64 v11, null, v1, v3, vcc_lo3553; GFX12-NEXT: global_store_b128 v13, v[8:11], s[2:3]3554; GFX12-NEXT: s_endpgm3555;3556; GFX1250-LABEL: v_mul_i128:3557; GFX1250: ; %bb.0: ; %entry3558; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 13559; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x2c3560; GFX1250-NEXT: v_and_b32_e32 v16, 0x3ff, v03561; GFX1250-NEXT: s_wait_kmcnt 0x03562; GFX1250-NEXT: s_clause 0x13563; GFX1250-NEXT: global_load_b128 v[0:3], v16, s[2:3] scale_offset3564; GFX1250-NEXT: global_load_b128 v[4:7], v16, s[0:1] scale_offset3565; GFX1250-NEXT: s_wait_loadcnt 0x13566; GFX1250-NEXT: v_dual_mov_b32 v11, 0 :: v_dual_mov_b32 v10, v03567; GFX1250-NEXT: s_wait_loadcnt 0x03568; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)3569; GFX1250-NEXT: v_dual_mov_b32 v9, v11 :: v_dual_mov_b32 v8, v43570; GFX1250-NEXT: v_mul_u64_e32 v[6:7], v[0:1], v[6:7]3571; GFX1250-NEXT: v_mul_u64_e32 v[8:9], v[8:9], v[10:11]3572; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3573; GFX1250-NEXT: v_mad_nc_u64_u32 v[6:7], v2, v4, v[6:7]3574; GFX1250-NEXT: v_mov_b32_e32 v10, v93575; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)3576; GFX1250-NEXT: v_mad_nc_u64_u32 v[12:13], v5, v0, v[10:11]3577; GFX1250-NEXT: v_mad_u32 v0, v3, v4, v73578; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3579; GFX1250-NEXT: v_dual_mov_b32 v10, v13 :: v_dual_mov_b32 v13, v113580; GFX1250-NEXT: v_mad_u32 v7, v2, v5, v03581; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)3582; GFX1250-NEXT: v_mad_nc_u64_u32 v[12:13], v4, v1, v[12:13]3583; GFX1250-NEXT: v_dual_mov_b32 v15, v11 :: v_dual_mov_b32 v9, v123584; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)3585; GFX1250-NEXT: v_mov_b32_e32 v14, v133586; GFX1250-NEXT: v_add_nc_u64_e32 v[10:11], v[10:11], v[14:15]3587; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3588; GFX1250-NEXT: v_mad_nc_u64_u32 v[0:1], v5, v1, v[10:11]3589; GFX1250-NEXT: v_add_nc_u64_e32 v[10:11], v[0:1], v[6:7]3590; GFX1250-NEXT: global_store_b128 v16, v[8:11], s[2:3] scale_offset3591; GFX1250-NEXT: s_endpgm3592;3593; EG-LABEL: v_mul_i128:3594; EG: ; %bb.0: ; %entry3595; EG-NEXT: ALU 3, @10, KC0[CB0:0-32], KC1[]3596; EG-NEXT: TEX 1 @63597; EG-NEXT: ALU 41, @14, KC0[], KC1[]3598; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T1.X, 13599; EG-NEXT: CF_END3600; EG-NEXT: PAD3601; EG-NEXT: Fetch clause starting at 6:3602; EG-NEXT: VTX_READ_128 T2.XYZW, T1.X, 0, #13603; EG-NEXT: VTX_READ_128 T0.XYZW, T0.X, 0, #13604; EG-NEXT: ALU clause starting at 10:3605; EG-NEXT: LSHL * T0.W, T0.X, literal.x,3606; EG-NEXT: 4(5.605194e-45), 0(0.000000e+00)3607; EG-NEXT: ADD_INT T0.X, KC0[2].Z, PV.W,3608; EG-NEXT: ADD_INT * T1.X, KC0[2].W, PV.W,3609; EG-NEXT: ALU clause starting at 14:3610; EG-NEXT: MULLO_INT * T1.Y, T0.Y, T2.Y,3611; EG-NEXT: MULHI * T1.Z, T0.Y, T2.Y,3612; EG-NEXT: MULLO_INT * T1.W, T2.Z, T0.X,3613; EG-NEXT: MULLO_INT * T3.X, T2.Y, T0.Z,3614; EG-NEXT: MULHI * T3.Y, T0.Y, T2.X,3615; EG-NEXT: MULHI * T3.Z, T0.X, T2.Y,3616; EG-NEXT: MULHI * T3.W, T2.Z, T0.X,3617; EG-NEXT: MULLO_INT * T2.Z, T2.Z, T0.Y,3618; EG-NEXT: MULHI * T4.X, T2.X, T0.Z,3619; EG-NEXT: MULLO_INT * T0.Y, T0.Y, T2.X,3620; EG-NEXT: MULHI * T4.Y, T0.X, T2.X,3621; EG-NEXT: ADD_INT T4.W, T0.Y, PS,3622; EG-NEXT: MULLO_INT * T2.Y, T0.X, T2.Y,3623; EG-NEXT: ADDC_UINT T4.Z, T0.Y, T4.Y,3624; EG-NEXT: ADDC_UINT T5.W, PS, PV.W,3625; EG-NEXT: MULLO_INT * T0.Y, T2.X, T0.W,3626; EG-NEXT: ADD_INT T4.X, T4.X, PS,3627; EG-NEXT: ADD_INT T0.Y, T3.W, T2.Z,3628; EG-NEXT: ADD_INT T2.Z, T3.Z, PV.W,3629; EG-NEXT: ADD_INT T0.W, T3.Y, PV.Z,3630; EG-NEXT: MULLO_INT * T2.W, T2.W, T0.X,3631; EG-NEXT: ADD_INT T5.X, PV.W, PV.Z,3632; EG-NEXT: ADDC_UINT T3.Y, PV.W, PV.Z,3633; EG-NEXT: ADD_INT T2.Z, PV.Y, PS,3634; EG-NEXT: ADD_INT T0.W, PV.X, T3.X,3635; EG-NEXT: MULLO_INT * T0.Y, T2.X, T0.Z,3636; EG-NEXT: ADD_INT T4.Y, PV.Z, PV.W,3637; EG-NEXT: ADDC_UINT T0.Z, T1.W, PS,3638; EG-NEXT: ADD_INT T0.W, T1.Z, PV.Y,3639; EG-NEXT: ADDC_UINT * T2.W, T1.Y, PV.X,3640; EG-NEXT: ADD_INT T1.Y, T1.Y, T5.X,3641; EG-NEXT: ADD_INT T1.Z, T1.W, T0.Y,3642; EG-NEXT: ADD_INT T0.W, PV.W, PS,3643; EG-NEXT: ADD_INT * T1.W, PV.Y, PV.Z,3644; EG-NEXT: ADD_INT T0.W, PV.W, PS,3645; EG-NEXT: ADDC_UINT * T1.W, PV.Y, PV.Z,3646; EG-NEXT: ADD_INT * T0.W, PV.W, PS,3647; EG-NEXT: ADD_INT * T0.Z, T1.Y, T1.Z,3648; EG-NEXT: ADD_INT * T0.Y, T2.Y, T4.W,3649; EG-NEXT: LSHR T1.X, T1.X, literal.x,3650; EG-NEXT: MULLO_INT * T0.X, T0.X, T2.X,3651; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)3652entry:3653 %tid = call i32 @llvm.amdgcn.workitem.id.x()3654 %gep.a = getelementptr inbounds i128, ptr addrspace(1) %aptr, i32 %tid3655 %gep.b = getelementptr inbounds i128, ptr addrspace(1) %bptr, i32 %tid3656 %gep.out = getelementptr inbounds i128, ptr addrspace(1) %bptr, i32 %tid3657 %a = load i128, ptr addrspace(1) %gep.a3658 %b = load i128, ptr addrspace(1) %gep.b3659 %mul = mul i128 %a, %b3660 store i128 %mul, ptr addrspace(1) %gep.out3661 ret void3662}3663 3664define i32 @mul_pow2_plus_1(i32 %val) {3665; SI-LABEL: mul_pow2_plus_1:3666; SI: ; %bb.0:3667; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3668; SI-NEXT: v_mul_lo_u32 v0, v0, 93669; SI-NEXT: s_setpc_b64 s[30:31]3670;3671; VI-LABEL: mul_pow2_plus_1:3672; VI: ; %bb.0:3673; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3674; VI-NEXT: v_mul_lo_u32 v0, v0, 93675; VI-NEXT: s_setpc_b64 s[30:31]3676;3677; GFX9-LABEL: mul_pow2_plus_1:3678; GFX9: ; %bb.0:3679; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3680; GFX9-NEXT: v_lshl_add_u32 v0, v0, 3, v03681; GFX9-NEXT: s_setpc_b64 s[30:31]3682;3683; GFX10-LABEL: mul_pow2_plus_1:3684; GFX10: ; %bb.0:3685; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3686; GFX10-NEXT: v_lshl_add_u32 v0, v0, 3, v03687; GFX10-NEXT: s_setpc_b64 s[30:31]3688;3689; GFX11-LABEL: mul_pow2_plus_1:3690; GFX11: ; %bb.0:3691; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3692; GFX11-NEXT: v_lshl_add_u32 v0, v0, 3, v03693; GFX11-NEXT: s_setpc_b64 s[30:31]3694;3695; GFX12-LABEL: mul_pow2_plus_1:3696; GFX12: ; %bb.0:3697; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03698; GFX12-NEXT: s_wait_expcnt 0x03699; GFX12-NEXT: s_wait_samplecnt 0x03700; GFX12-NEXT: s_wait_bvhcnt 0x03701; GFX12-NEXT: s_wait_kmcnt 0x03702; GFX12-NEXT: v_lshl_add_u32 v0, v0, 3, v03703; GFX12-NEXT: s_setpc_b64 s[30:31]3704;3705; GFX1250-LABEL: mul_pow2_plus_1:3706; GFX1250: ; %bb.0:3707; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x03708; GFX1250-NEXT: s_wait_kmcnt 0x03709; GFX1250-NEXT: v_lshl_add_u32 v0, v0, 3, v03710; GFX1250-NEXT: s_set_pc_i64 s[30:31]3711;3712; EG-LABEL: mul_pow2_plus_1:3713; EG: ; %bb.0:3714; EG-NEXT: CF_END3715; EG-NEXT: PAD3716 %mul = mul i32 %val, 93717 ret i32 %mul3718}3719 3720declare i32 @llvm.amdgcn.workitem.id.x() #13721 3722attributes #0 = { nounwind }3723attributes #1 = { nounwind readnone}3724