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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -O0 < %s | FileCheck %s3 4; FP is in CSR range, modified.5define hidden fastcc void @callee_has_fp() #1 {6; CHECK-LABEL: callee_has_fp:7; CHECK: ; %bb.0:8; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9; CHECK-NEXT: s_mov_b32 s4, s3310; CHECK-NEXT: s_mov_b32 s33, s3211; CHECK-NEXT: s_add_i32 s32, s32, 0x20012; CHECK-NEXT: v_mov_b32_e32 v0, 113; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s3314; CHECK-NEXT: s_waitcnt vmcnt(0)15; CHECK-NEXT: s_mov_b32 s32, s3316; CHECK-NEXT: s_mov_b32 s33, s417; CHECK-NEXT: s_setpc_b64 s[30:31]18 %alloca = alloca i32, addrspace(5)19 store volatile i32 1, ptr addrspace(5) %alloca20 ret void21}22 23; Has no stack objects, but introduces them due to the CSR spill. We24; see the FP modified in the callee with IPRA. We should not have25; redundant spills of s33 or assert.26define internal fastcc void @csr_vgpr_spill_fp_callee() #0 {27; CHECK-LABEL: csr_vgpr_spill_fp_callee:28; CHECK: ; %bb.0: ; %bb29; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)30; CHECK-NEXT: s_mov_b32 s18, s3331; CHECK-NEXT: s_mov_b32 s33, s3232; CHECK-NEXT: s_xor_saveexec_b64 s[16:17], -133; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill34; CHECK-NEXT: s_mov_b64 exec, s[16:17]35; CHECK-NEXT: s_add_i32 s32, s32, 0x40036; CHECK-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill37; CHECK-NEXT: v_writelane_b32 v1, s30, 038; CHECK-NEXT: v_writelane_b32 v1, s31, 139; CHECK-NEXT: s_getpc_b64 s[16:17]40; CHECK-NEXT: s_add_u32 s16, s16, callee_has_fp@rel32@lo+441; CHECK-NEXT: s_addc_u32 s17, s17, callee_has_fp@rel32@hi+1242; CHECK-NEXT: s_mov_b64 s[22:23], s[2:3]43; CHECK-NEXT: s_mov_b64 s[20:21], s[0:1]44; CHECK-NEXT: s_mov_b64 s[0:1], s[20:21]45; CHECK-NEXT: s_mov_b64 s[2:3], s[22:23]46; CHECK-NEXT: s_swappc_b64 s[30:31], s[16:17]47; CHECK-NEXT: ;;#ASMSTART48; CHECK-NEXT: ; clobber csr v4049; CHECK-NEXT: ;;#ASMEND50; CHECK-NEXT: v_readlane_b32 s31, v1, 151; CHECK-NEXT: v_readlane_b32 s30, v1, 052; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s33 ; 4-byte Folded Reload53; CHECK-NEXT: s_mov_b32 s32, s3354; CHECK-NEXT: s_xor_saveexec_b64 s[4:5], -155; CHECK-NEXT: buffer_load_dword v1, off, s[0:3], s33 offset:4 ; 4-byte Folded Reload56; CHECK-NEXT: s_mov_b64 exec, s[4:5]57; CHECK-NEXT: s_mov_b32 s33, s1858; CHECK-NEXT: s_waitcnt vmcnt(0)59; CHECK-NEXT: s_setpc_b64 s[30:31]60bb:61 call fastcc void @callee_has_fp()62 call void asm sideeffect "; clobber csr v40", "~{v40}"()63 ret void64}65 66define amdgpu_kernel void @kernel_call() {67; CHECK-LABEL: kernel_call:68; CHECK: ; %bb.0: ; %bb69; CHECK-NEXT: s_mov_b32 s32, 070; CHECK-NEXT: s_add_u32 flat_scratch_lo, s12, s1771; CHECK-NEXT: s_addc_u32 flat_scratch_hi, s13, 072; CHECK-NEXT: s_add_u32 s0, s0, s1773; CHECK-NEXT: s_addc_u32 s1, s1, 074; CHECK-NEXT: ; implicit-def: $vgpr3 : SGPR spill to VGPR lane75; CHECK-NEXT: v_writelane_b32 v3, s16, 076; CHECK-NEXT: s_mov_b32 s13, s1577; CHECK-NEXT: s_mov_b32 s12, s1478; CHECK-NEXT: v_readlane_b32 s14, v3, 079; CHECK-NEXT: s_getpc_b64 s[16:17]80; CHECK-NEXT: s_add_u32 s16, s16, csr_vgpr_spill_fp_callee@rel32@lo+481; CHECK-NEXT: s_addc_u32 s17, s17, csr_vgpr_spill_fp_callee@rel32@hi+1282; CHECK-NEXT: s_mov_b64 s[22:23], s[2:3]83; CHECK-NEXT: s_mov_b64 s[20:21], s[0:1]84; CHECK-NEXT: s_mov_b32 s15, 2085; CHECK-NEXT: v_lshlrev_b32_e64 v2, s15, v286; CHECK-NEXT: s_mov_b32 s15, 1087; CHECK-NEXT: v_lshlrev_b32_e64 v1, s15, v188; CHECK-NEXT: v_or3_b32 v31, v0, v1, v289; CHECK-NEXT: ; implicit-def: $sgpr1590; CHECK-NEXT: s_mov_b64 s[0:1], s[20:21]91; CHECK-NEXT: s_mov_b64 s[2:3], s[22:23]92; CHECK-NEXT: s_swappc_b64 s[30:31], s[16:17]93; CHECK-NEXT: s_endpgm94bb:95 tail call fastcc void @csr_vgpr_spill_fp_callee()96 ret void97}98 99; Same, except with a tail call.100define internal fastcc void @csr_vgpr_spill_fp_tailcall_callee() #0 {101; CHECK-LABEL: csr_vgpr_spill_fp_tailcall_callee:102; CHECK: ; %bb.0: ; %bb103; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)104; CHECK-NEXT: s_xor_saveexec_b64 s[16:17], -1105; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill106; CHECK-NEXT: s_mov_b64 exec, s[16:17]107; CHECK-NEXT: buffer_store_dword v40, off, s[0:3], s32 ; 4-byte Folded Spill108; CHECK-NEXT: v_writelane_b32 v1, s33, 0109; CHECK-NEXT: ;;#ASMSTART110; CHECK-NEXT: ; clobber csr v40111; CHECK-NEXT: ;;#ASMEND112; CHECK-NEXT: s_getpc_b64 s[16:17]113; CHECK-NEXT: s_add_u32 s16, s16, callee_has_fp@rel32@lo+4114; CHECK-NEXT: s_addc_u32 s17, s17, callee_has_fp@rel32@hi+12115; CHECK-NEXT: v_readlane_b32 s33, v1, 0116; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s32 ; 4-byte Folded Reload117; CHECK-NEXT: s_xor_saveexec_b64 s[18:19], -1118; CHECK-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload119; CHECK-NEXT: s_mov_b64 exec, s[18:19]120; CHECK-NEXT: s_setpc_b64 s[16:17]121bb:122 call void asm sideeffect "; clobber csr v40", "~{v40}"()123 tail call fastcc void @callee_has_fp()124 ret void125}126 127define amdgpu_kernel void @kernel_tailcall() {128; CHECK-LABEL: kernel_tailcall:129; CHECK: ; %bb.0: ; %bb130; CHECK-NEXT: s_mov_b32 s32, 0131; CHECK-NEXT: s_add_u32 flat_scratch_lo, s12, s17132; CHECK-NEXT: s_addc_u32 flat_scratch_hi, s13, 0133; CHECK-NEXT: s_add_u32 s0, s0, s17134; CHECK-NEXT: s_addc_u32 s1, s1, 0135; CHECK-NEXT: ; implicit-def: $vgpr3 : SGPR spill to VGPR lane136; CHECK-NEXT: v_writelane_b32 v3, s16, 0137; CHECK-NEXT: s_mov_b32 s13, s15138; CHECK-NEXT: s_mov_b32 s12, s14139; CHECK-NEXT: v_readlane_b32 s14, v3, 0140; CHECK-NEXT: s_getpc_b64 s[16:17]141; CHECK-NEXT: s_add_u32 s16, s16, csr_vgpr_spill_fp_tailcall_callee@rel32@lo+4142; CHECK-NEXT: s_addc_u32 s17, s17, csr_vgpr_spill_fp_tailcall_callee@rel32@hi+12143; CHECK-NEXT: s_mov_b64 s[22:23], s[2:3]144; CHECK-NEXT: s_mov_b64 s[20:21], s[0:1]145; CHECK-NEXT: s_mov_b32 s15, 20146; CHECK-NEXT: v_lshlrev_b32_e64 v2, s15, v2147; CHECK-NEXT: s_mov_b32 s15, 10148; CHECK-NEXT: v_lshlrev_b32_e64 v1, s15, v1149; CHECK-NEXT: v_or3_b32 v31, v0, v1, v2150; CHECK-NEXT: ; implicit-def: $sgpr15151; CHECK-NEXT: s_mov_b64 s[0:1], s[20:21]152; CHECK-NEXT: s_mov_b64 s[2:3], s[22:23]153; CHECK-NEXT: s_swappc_b64 s[30:31], s[16:17]154; CHECK-NEXT: s_endpgm155bb:156 tail call fastcc void @csr_vgpr_spill_fp_tailcall_callee()157 ret void158}159 160define hidden i32 @tail_call() #1 {161; CHECK-LABEL: tail_call:162; CHECK: ; %bb.0: ; %entry163; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)164; CHECK-NEXT: s_mov_b32 s4, s33165; CHECK-NEXT: s_mov_b32 s33, s32166; CHECK-NEXT: v_mov_b32_e32 v0, 0167; CHECK-NEXT: s_mov_b32 s33, s4168; CHECK-NEXT: s_setpc_b64 s[30:31]169entry:170 ret i32 0171}172 173define hidden i32 @caller_save_vgpr_spill_fp_tail_call() #0 {174; CHECK-LABEL: caller_save_vgpr_spill_fp_tail_call:175; CHECK: ; %bb.0: ; %entry176; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)177; CHECK-NEXT: s_mov_b32 s18, s33178; CHECK-NEXT: s_mov_b32 s33, s32179; CHECK-NEXT: s_xor_saveexec_b64 s[16:17], -1180; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], s33 ; 4-byte Folded Spill181; CHECK-NEXT: s_mov_b64 exec, s[16:17]182; CHECK-NEXT: s_add_i32 s32, s32, 0x400183; CHECK-NEXT: v_writelane_b32 v1, s30, 0184; CHECK-NEXT: v_writelane_b32 v1, s31, 1185; CHECK-NEXT: s_getpc_b64 s[16:17]186; CHECK-NEXT: s_add_u32 s16, s16, tail_call@rel32@lo+4187; CHECK-NEXT: s_addc_u32 s17, s17, tail_call@rel32@hi+12188; CHECK-NEXT: s_mov_b64 s[22:23], s[2:3]189; CHECK-NEXT: s_mov_b64 s[20:21], s[0:1]190; CHECK-NEXT: s_mov_b64 s[0:1], s[20:21]191; CHECK-NEXT: s_mov_b64 s[2:3], s[22:23]192; CHECK-NEXT: s_swappc_b64 s[30:31], s[16:17]193; CHECK-NEXT: v_readlane_b32 s31, v1, 1194; CHECK-NEXT: v_readlane_b32 s30, v1, 0195; CHECK-NEXT: s_mov_b32 s32, s33196; CHECK-NEXT: s_xor_saveexec_b64 s[4:5], -1197; CHECK-NEXT: buffer_load_dword v1, off, s[0:3], s33 ; 4-byte Folded Reload198; CHECK-NEXT: s_mov_b64 exec, s[4:5]199; CHECK-NEXT: s_mov_b32 s33, s18200; CHECK-NEXT: s_waitcnt vmcnt(0)201; CHECK-NEXT: s_setpc_b64 s[30:31]202entry:203 %call = call i32 @tail_call()204 ret i32 %call205}206 207define hidden i32 @caller_save_vgpr_spill_fp() #0 {208; CHECK-LABEL: caller_save_vgpr_spill_fp:209; CHECK: ; %bb.0: ; %entry210; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)211; CHECK-NEXT: s_mov_b32 s19, s33212; CHECK-NEXT: s_mov_b32 s33, s32213; CHECK-NEXT: s_xor_saveexec_b64 s[16:17], -1214; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s33 ; 4-byte Folded Spill215; CHECK-NEXT: s_mov_b64 exec, s[16:17]216; CHECK-NEXT: s_add_i32 s32, s32, 0x400217; CHECK-NEXT: v_writelane_b32 v2, s30, 0218; CHECK-NEXT: v_writelane_b32 v2, s31, 1219; CHECK-NEXT: s_getpc_b64 s[16:17]220; CHECK-NEXT: s_add_u32 s16, s16, caller_save_vgpr_spill_fp_tail_call@rel32@lo+4221; CHECK-NEXT: s_addc_u32 s17, s17, caller_save_vgpr_spill_fp_tail_call@rel32@hi+12222; CHECK-NEXT: s_mov_b64 s[22:23], s[2:3]223; CHECK-NEXT: s_mov_b64 s[20:21], s[0:1]224; CHECK-NEXT: s_mov_b64 s[0:1], s[20:21]225; CHECK-NEXT: s_mov_b64 s[2:3], s[22:23]226; CHECK-NEXT: s_swappc_b64 s[30:31], s[16:17]227; CHECK-NEXT: v_readlane_b32 s31, v2, 1228; CHECK-NEXT: v_readlane_b32 s30, v2, 0229; CHECK-NEXT: s_mov_b32 s32, s33230; CHECK-NEXT: s_xor_saveexec_b64 s[4:5], -1231; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s33 ; 4-byte Folded Reload232; CHECK-NEXT: s_mov_b64 exec, s[4:5]233; CHECK-NEXT: s_mov_b32 s33, s19234; CHECK-NEXT: s_waitcnt vmcnt(0)235; CHECK-NEXT: s_setpc_b64 s[30:31]236entry:237 %call = call i32 @caller_save_vgpr_spill_fp_tail_call()238 ret i32 %call239}240 241define protected amdgpu_kernel void @kernel() {242; CHECK-LABEL: kernel:243; CHECK: ; %bb.0: ; %entry244; CHECK-NEXT: s_mov_b32 s32, 0245; CHECK-NEXT: s_add_u32 flat_scratch_lo, s12, s17246; CHECK-NEXT: s_addc_u32 flat_scratch_hi, s13, 0247; CHECK-NEXT: s_add_u32 s0, s0, s17248; CHECK-NEXT: s_addc_u32 s1, s1, 0249; CHECK-NEXT: ; implicit-def: $vgpr3 : SGPR spill to VGPR lane250; CHECK-NEXT: v_writelane_b32 v3, s16, 0251; CHECK-NEXT: s_mov_b32 s13, s15252; CHECK-NEXT: s_mov_b32 s12, s14253; CHECK-NEXT: v_readlane_b32 s14, v3, 0254; CHECK-NEXT: s_getpc_b64 s[16:17]255; CHECK-NEXT: s_add_u32 s16, s16, caller_save_vgpr_spill_fp@rel32@lo+4256; CHECK-NEXT: s_addc_u32 s17, s17, caller_save_vgpr_spill_fp@rel32@hi+12257; CHECK-NEXT: s_mov_b64 s[22:23], s[2:3]258; CHECK-NEXT: s_mov_b64 s[20:21], s[0:1]259; CHECK-NEXT: s_mov_b32 s15, 20260; CHECK-NEXT: v_lshlrev_b32_e64 v2, s15, v2261; CHECK-NEXT: s_mov_b32 s15, 10262; CHECK-NEXT: v_lshlrev_b32_e64 v1, s15, v1263; CHECK-NEXT: v_or3_b32 v31, v0, v1, v2264; CHECK-NEXT: ; implicit-def: $sgpr15265; CHECK-NEXT: s_mov_b64 s[0:1], s[20:21]266; CHECK-NEXT: s_mov_b64 s[2:3], s[22:23]267; CHECK-NEXT: s_swappc_b64 s[30:31], s[16:17]268; CHECK-NEXT: s_endpgm269entry:270 %call = call i32 @caller_save_vgpr_spill_fp()271 ret void272}273 274attributes #0 = { "frame-pointer"="none" noinline }275attributes #1 = { "frame-pointer"="all" noinline }276 277