347 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: opt -mtriple=amdgcn-- -S -structurizecfg -si-annotate-control-flow %s | FileCheck -check-prefix=IR %s3; RUN: llc -mtriple=amdgcn -mcpu=hawaii < %s | FileCheck -check-prefix=GCN %s4 5; After structurizing, there are 3 levels of loops. The i1 phi6; conditions mutually depend on each other, so it isn't safe to delete7; the condition that appears to have no uses until the loop is8; completely processed.9 10define amdgpu_kernel void @reduced_nested_loop_conditions(ptr addrspace(3) captures(none) %arg) #0 {11; GCN-LABEL: reduced_nested_loop_conditions:12; GCN: ; %bb.0: ; %bb13; GCN-NEXT: s_load_dword s0, s[4:5], 0x914; GCN-NEXT: v_lshlrev_b32_e32 v0, 3, v015; GCN-NEXT: s_mov_b32 m0, -116; GCN-NEXT: s_and_b64 s[2:3], exec, -117; GCN-NEXT: s_waitcnt lgkmcnt(0)18; GCN-NEXT: v_add_i32_e32 v0, vcc, s0, v019; GCN-NEXT: ds_read_b64 v[0:1], v020; GCN-NEXT: s_and_b64 s[0:1], exec, 021; GCN-NEXT: s_branch .LBB0_222; GCN-NEXT: .LBB0_1: ; %Flow23; GCN-NEXT: ; in Loop: Header=BB0_2 Depth=124; GCN-NEXT: s_mov_b64 vcc, s[0:1]25; GCN-NEXT: s_cbranch_vccz .LBB0_426; GCN-NEXT: .LBB0_2: ; %bb527; GCN-NEXT: ; =>This Inner Loop Header: Depth=128; GCN-NEXT: s_mov_b64 s[4:5], -129; GCN-NEXT: s_mov_b64 vcc, s[2:3]30; GCN-NEXT: s_cbranch_vccz .LBB0_131; GCN-NEXT: ; %bb.3: ; %bb1032; GCN-NEXT: ; in Loop: Header=BB0_2 Depth=133; GCN-NEXT: s_mov_b64 s[4:5], 034; GCN-NEXT: s_branch .LBB0_135; GCN-NEXT: .LBB0_4: ; %loop.exit.guard36; GCN-NEXT: s_and_b64 vcc, exec, s[4:5]37; GCN-NEXT: s_cbranch_vccz .LBB0_738; GCN-NEXT: ; %bb.5: ; %bb839; GCN-NEXT: s_waitcnt lgkmcnt(0)40; GCN-NEXT: ds_read_b32 v0, v041; GCN-NEXT: s_and_b64 vcc, exec, 042; GCN-NEXT: .LBB0_6: ; %bb943; GCN-NEXT: ; =>This Inner Loop Header: Depth=144; GCN-NEXT: s_mov_b64 vcc, vcc45; GCN-NEXT: s_cbranch_vccz .LBB0_646; GCN-NEXT: .LBB0_7: ; %DummyReturnBlock47; GCN-NEXT: s_endpgm48; IR-LABEL: define amdgpu_kernel void @reduced_nested_loop_conditions(49; IR-SAME: ptr addrspace(3) captures(none) [[ARG:%.*]]) #[[ATTR0:[0-9]+]] {50; IR-NEXT: [[BB:.*]]:51; IR-NEXT: [[MY_TMP:%.*]] = tail call i32 @llvm.amdgcn.workitem.id.x() #[[ATTR4:[0-9]+]]52; IR-NEXT: [[MY_TMP1:%.*]] = getelementptr inbounds i64, ptr addrspace(3) [[ARG]], i32 [[MY_TMP]]53; IR-NEXT: [[MY_TMP2:%.*]] = load volatile i64, ptr addrspace(3) [[MY_TMP1]], align 854; IR-NEXT: br label %[[BB5:.*]]55; IR: [[BB3:.*]]:56; IR-NEXT: br i1 true, label %[[BB4:.*]], label %[[BB13:.*]]57; IR: [[BB4]]:58; IR-NEXT: br label %[[FLOW:.*]]59; IR: [[BB5]]:60; IR-NEXT: [[PHI_BROKEN:%.*]] = phi i64 [ [[TMP6:%.*]], %[[BB10:.*]] ], [ 0, %[[BB]] ]61; IR-NEXT: [[MY_TMP6:%.*]] = phi i32 [ 0, %[[BB]] ], [ [[TMP5:%.*]], %[[BB10]] ]62; IR-NEXT: [[MY_TMP7:%.*]] = icmp eq i32 [[MY_TMP6]], 163; IR-NEXT: [[TMP0:%.*]] = call { i1, i64 } @llvm.amdgcn.if.i64(i1 [[MY_TMP7]])64; IR-NEXT: [[TMP1:%.*]] = extractvalue { i1, i64 } [[TMP0]], 065; IR-NEXT: [[TMP2:%.*]] = extractvalue { i1, i64 } [[TMP0]], 166; IR-NEXT: br i1 [[TMP1]], label %[[BB8:.*]], label %[[FLOW]]67; IR: [[BB8]]:68; IR-NEXT: br label %[[BB13]]69; IR: [[BB9:.*]]:70; IR-NEXT: br i1 false, label %[[BB3]], label %[[BB9]]71; IR: [[BB10]]:72; IR-NEXT: [[TMP3:%.*]] = call i1 @llvm.amdgcn.loop.i64(i64 [[TMP6]])73; IR-NEXT: br i1 [[TMP3]], label %[[BB23:.*]], label %[[BB5]]74; IR: [[FLOW]]:75; IR-NEXT: [[TMP4:%.*]] = phi i1 [ [[MY_TMP22:%.*]], %[[BB4]] ], [ true, %[[BB5]] ]76; IR-NEXT: [[TMP5]] = phi i32 [ [[MY_TMP21:%.*]], %[[BB4]] ], [ poison, %[[BB5]] ]77; IR-NEXT: call void @llvm.amdgcn.end.cf.i64(i64 [[TMP2]])78; IR-NEXT: [[TMP6]] = call i64 @llvm.amdgcn.if.break.i64(i1 [[TMP4]], i64 [[PHI_BROKEN]])79; IR-NEXT: br label %[[BB10]]80; IR: [[BB13]]:81; IR-NEXT: [[MY_TMP14:%.*]] = phi i1 [ [[MY_TMP22]], %[[BB3]] ], [ true, %[[BB8]] ]82; IR-NEXT: [[MY_TMP15:%.*]] = bitcast i64 [[MY_TMP2]] to <2 x i32>83; IR-NEXT: br i1 [[MY_TMP14]], label %[[BB16:.*]], label %[[BB20:.*]]84; IR: [[BB16]]:85; IR-NEXT: [[MY_TMP17:%.*]] = extractelement <2 x i32> [[MY_TMP15]], i64 186; IR-NEXT: [[MY_TMP18:%.*]] = getelementptr inbounds i32, ptr addrspace(3) poison, i32 [[MY_TMP17]]87; IR-NEXT: [[MY_TMP19:%.*]] = load volatile i32, ptr addrspace(3) [[MY_TMP18]], align 488; IR-NEXT: br label %[[BB20]]89; IR: [[BB20]]:90; IR-NEXT: [[MY_TMP21]] = phi i32 [ [[MY_TMP19]], %[[BB16]] ], [ 0, %[[BB13]] ]91; IR-NEXT: [[MY_TMP22]] = phi i1 [ false, %[[BB16]] ], [ [[MY_TMP14]], %[[BB13]] ]92; IR-NEXT: br label %[[BB9]]93; IR: [[BB23]]:94; IR-NEXT: call void @llvm.amdgcn.end.cf.i64(i64 [[TMP6]])95; IR-NEXT: ret void96;97bb:98 %my.tmp = tail call i32 @llvm.amdgcn.workitem.id.x() #199 %my.tmp1 = getelementptr inbounds i64, ptr addrspace(3) %arg, i32 %my.tmp100 %my.tmp2 = load volatile i64, ptr addrspace(3) %my.tmp1101 br label %bb5102 103bb3: ; preds = %bb9104 br i1 true, label %bb4, label %bb13105 106bb4: ; preds = %bb3107 br label %bb10108 109bb5: ; preds = %bb10, %bb110 %my.tmp6 = phi i32 [ 0, %bb ], [ %my.tmp11, %bb10 ]111 %my.tmp7 = icmp eq i32 %my.tmp6, 1112 br i1 %my.tmp7, label %bb8, label %bb10113 114bb8: ; preds = %bb5115 br label %bb13116 117bb9: ; preds = %bb20, %bb9118 br i1 false, label %bb3, label %bb9119 120bb10: ; preds = %bb5, %bb4121 %my.tmp11 = phi i32 [ %my.tmp21, %bb4 ], [ poison, %bb5 ]122 %my.tmp12 = phi i1 [ %my.tmp22, %bb4 ], [ true, %bb5 ]123 br i1 %my.tmp12, label %bb23, label %bb5124 125bb13: ; preds = %bb8, %bb3126 %my.tmp14 = phi i1 [ %my.tmp22, %bb3 ], [ true, %bb8 ]127 %my.tmp15 = bitcast i64 %my.tmp2 to <2 x i32>128 br i1 %my.tmp14, label %bb16, label %bb20129 130bb16: ; preds = %bb13131 %my.tmp17 = extractelement <2 x i32> %my.tmp15, i64 1132 %my.tmp18 = getelementptr inbounds i32, ptr addrspace(3) poison, i32 %my.tmp17133 %my.tmp19 = load volatile i32, ptr addrspace(3) %my.tmp18134 br label %bb20135 136bb20: ; preds = %bb16, %bb13137 %my.tmp21 = phi i32 [ %my.tmp19, %bb16 ], [ 0, %bb13 ]138 %my.tmp22 = phi i1 [ false, %bb16 ], [ %my.tmp14, %bb13 ]139 br label %bb9140 141bb23: ; preds = %bb10142 ret void143}144 145; Earlier version of above, before a run of the structurizer.146 147define amdgpu_kernel void @nested_loop_conditions(ptr addrspace(1) captures(none) %arg) #0 {148; GCN-LABEL: nested_loop_conditions:149; GCN: ; %bb.0: ; %bb150; GCN-NEXT: s_mov_b32 s3, 0xf000151; GCN-NEXT: s_mov_b32 s2, -1152; GCN-NEXT: buffer_load_dword v0, off, s[0:3], 0 glc153; GCN-NEXT: s_waitcnt vmcnt(0)154; GCN-NEXT: v_cmp_lt_i32_e32 vcc, 8, v0155; GCN-NEXT: s_cbranch_vccnz .LBB1_6156; GCN-NEXT: ; %bb.1: ; %bb14.lr.ph157; GCN-NEXT: s_load_dword s4, s[0:1], 0x0158; GCN-NEXT: s_branch .LBB1_3159; GCN-NEXT: .LBB1_2: ; %Flow160; GCN-NEXT: ; in Loop: Header=BB1_3 Depth=1161; GCN-NEXT: s_and_b64 vcc, exec, s[0:1]162; GCN-NEXT: s_waitcnt lgkmcnt(0)163; GCN-NEXT: s_mov_b64 vcc, vcc164; GCN-NEXT: s_cbranch_vccnz .LBB1_6165; GCN-NEXT: .LBB1_3: ; %bb14166; GCN-NEXT: ; =>This Loop Header: Depth=1167; GCN-NEXT: ; Child Loop BB1_4 Depth 2168; GCN-NEXT: s_waitcnt lgkmcnt(0)169; GCN-NEXT: s_cmp_lg_u32 s4, 1170; GCN-NEXT: s_mov_b64 s[0:1], -1171; GCN-NEXT: ; implicit-def: $sgpr4172; GCN-NEXT: s_cbranch_scc1 .LBB1_2173; GCN-NEXT: .LBB1_4: ; %bb18174; GCN-NEXT: ; Parent Loop BB1_3 Depth=1175; GCN-NEXT: ; => This Inner Loop Header: Depth=2176; GCN-NEXT: buffer_load_dword v0, off, s[0:3], 0 glc177; GCN-NEXT: s_waitcnt vmcnt(0)178; GCN-NEXT: v_cmp_lt_i32_e32 vcc, 8, v0179; GCN-NEXT: s_cbranch_vccnz .LBB1_4180; GCN-NEXT: ; %bb.5: ; %bb21181; GCN-NEXT: ; in Loop: Header=BB1_3 Depth=1182; GCN-NEXT: s_load_dword s4, s[0:1], 0x0183; GCN-NEXT: buffer_load_dword v0, off, s[0:3], 0 glc184; GCN-NEXT: s_waitcnt vmcnt(0)185; GCN-NEXT: v_cmp_lt_i32_e64 s[0:1], 8, v0186; GCN-NEXT: s_branch .LBB1_2187; GCN-NEXT: .LBB1_6: ; %bb31188; GCN-NEXT: v_mov_b32_e32 v0, 0189; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0190; GCN-NEXT: s_waitcnt vmcnt(0)191; GCN-NEXT: s_endpgm192; IR-LABEL: define amdgpu_kernel void @nested_loop_conditions(193; IR-SAME: ptr addrspace(1) captures(none) [[ARG:%.*]]) #[[ATTR0]] {194; IR-NEXT: [[BB:.*]]:195; IR-NEXT: [[MY_TMP1134:%.*]] = load volatile i32, ptr addrspace(1) poison, align 4196; IR-NEXT: [[MY_TMP1235:%.*]] = icmp slt i32 [[MY_TMP1134]], 9197; IR-NEXT: br i1 [[MY_TMP1235]], label %[[BB14_LR_PH:.*]], label %[[FLOW:.*]]198; IR: [[BB14_LR_PH]]:199; IR-NEXT: [[MY_TMP:%.*]] = tail call i32 @llvm.amdgcn.workitem.id.x() #[[ATTR4]]200; IR-NEXT: [[MY_TMP1:%.*]] = zext i32 [[MY_TMP]] to i64201; IR-NEXT: [[MY_TMP2:%.*]] = getelementptr inbounds i64, ptr addrspace(1) [[ARG]], i64 [[MY_TMP1]]202; IR-NEXT: [[MY_TMP3:%.*]] = load i64, ptr addrspace(1) [[MY_TMP2]], align 16203; IR-NEXT: [[MY_TMP932:%.*]] = load <4 x i32>, ptr addrspace(1) poison, align 16204; IR-NEXT: [[MY_TMP1033:%.*]] = extractelement <4 x i32> [[MY_TMP932]], i64 0205; IR-NEXT: br label %[[BB14:.*]]206; IR: [[FLOW3:.*]]:207; IR-NEXT: call void @llvm.amdgcn.end.cf.i64(i64 [[TMP20:%.*]])208; IR-NEXT: [[TMP0:%.*]] = call { i1, i64 } @llvm.amdgcn.if.i64(i1 [[TMP14:%.*]])209; IR-NEXT: [[TMP1:%.*]] = extractvalue { i1, i64 } [[TMP0]], 0210; IR-NEXT: [[TMP2:%.*]] = extractvalue { i1, i64 } [[TMP0]], 1211; IR-NEXT: br i1 [[TMP1]], label %[[BB4_BB13_CRIT_EDGE:.*]], label %[[FLOW4:.*]]212; IR: [[BB4_BB13_CRIT_EDGE]]:213; IR-NEXT: br label %[[FLOW4]]214; IR: [[FLOW4]]:215; IR-NEXT: [[TMP3:%.*]] = phi i1 [ true, %[[BB4_BB13_CRIT_EDGE]] ], [ false, %[[FLOW3]] ]216; IR-NEXT: call void @llvm.amdgcn.end.cf.i64(i64 [[TMP2]])217; IR-NEXT: br label %[[FLOW]]218; IR: [[BB13:.*]]:219; IR-NEXT: br label %[[BB31:.*]]220; IR: [[FLOW]]:221; IR-NEXT: [[TMP4:%.*]] = phi i1 [ [[TMP3]], %[[FLOW4]] ], [ true, %[[BB]] ]222; IR-NEXT: [[TMP5:%.*]] = call { i1, i64 } @llvm.amdgcn.if.i64(i1 [[TMP4]])223; IR-NEXT: [[TMP6:%.*]] = extractvalue { i1, i64 } [[TMP5]], 0224; IR-NEXT: [[TMP7:%.*]] = extractvalue { i1, i64 } [[TMP5]], 1225; IR-NEXT: br i1 [[TMP6]], label %[[BB13]], label %[[BB31]]226; IR: [[BB14]]:227; IR-NEXT: [[PHI_BROKEN:%.*]] = phi i64 [ [[TMP16:%.*]], %[[FLOW1:.*]] ], [ 0, %[[BB14_LR_PH]] ]228; IR-NEXT: [[MY_TMP1037:%.*]] = phi i32 [ [[MY_TMP1033]], %[[BB14_LR_PH]] ], [ [[TMP12:%.*]], %[[FLOW1]] ]229; IR-NEXT: [[MY_TMP936:%.*]] = phi <4 x i32> [ [[MY_TMP932]], %[[BB14_LR_PH]] ], [ [[TMP11:%.*]], %[[FLOW1]] ]230; IR-NEXT: [[MY_TMP15:%.*]] = icmp eq i32 [[MY_TMP1037]], 1231; IR-NEXT: [[TMP8:%.*]] = call { i1, i64 } @llvm.amdgcn.if.i64(i1 [[MY_TMP15]])232; IR-NEXT: [[TMP9:%.*]] = extractvalue { i1, i64 } [[TMP8]], 0233; IR-NEXT: [[TMP10:%.*]] = extractvalue { i1, i64 } [[TMP8]], 1234; IR-NEXT: br i1 [[TMP9]], label %[[BB16:.*]], label %[[FLOW1]]235; IR: [[BB16]]:236; IR-NEXT: [[MY_TMP17:%.*]] = bitcast i64 [[MY_TMP3]] to <2 x i32>237; IR-NEXT: br label %[[BB18:.*]]238; IR: [[FLOW1]]:239; IR-NEXT: [[TMP11]] = phi <4 x i32> [ [[MY_TMP9:%.*]], %[[BB21:.*]] ], [ poison, %[[BB14]] ]240; IR-NEXT: [[TMP12]] = phi i32 [ [[MY_TMP10:%.*]], %[[BB21]] ], [ poison, %[[BB14]] ]241; IR-NEXT: [[TMP13:%.*]] = phi i1 [ [[MY_TMP12:%.*]], %[[BB21]] ], [ true, %[[BB14]] ]242; IR-NEXT: [[TMP14]] = phi i1 [ [[MY_TMP12]], %[[BB21]] ], [ false, %[[BB14]] ]243; IR-NEXT: [[TMP15:%.*]] = phi i1 [ false, %[[BB21]] ], [ true, %[[BB14]] ]244; IR-NEXT: call void @llvm.amdgcn.end.cf.i64(i64 [[TMP10]])245; IR-NEXT: [[TMP16]] = call i64 @llvm.amdgcn.if.break.i64(i1 [[TMP13]], i64 [[PHI_BROKEN]])246; IR-NEXT: [[TMP17:%.*]] = call i1 @llvm.amdgcn.loop.i64(i64 [[TMP16]])247; IR-NEXT: br i1 [[TMP17]], label %[[FLOW2:.*]], label %[[BB14]]248; IR: [[BB18]]:249; IR-NEXT: [[MY_TMP19:%.*]] = load volatile i32, ptr addrspace(1) poison, align 4250; IR-NEXT: [[MY_TMP20:%.*]] = icmp slt i32 [[MY_TMP19]], 9251; IR-NEXT: br i1 [[MY_TMP20]], label %[[BB21]], label %[[BB18]]252; IR: [[BB21]]:253; IR-NEXT: [[MY_TMP22:%.*]] = extractelement <2 x i32> [[MY_TMP17]], i64 1254; IR-NEXT: [[MY_TMP23:%.*]] = lshr i32 [[MY_TMP22]], 16255; IR-NEXT: [[MY_TMP24:%.*]] = select i1 false, i32 0, i32 [[MY_TMP23]]256; IR-NEXT: [[MY_TMP25:%.*]] = uitofp i32 [[MY_TMP24]] to float257; IR-NEXT: [[MY_TMP26:%.*]] = fmul float [[MY_TMP25]], 0x3EF0001000000000258; IR-NEXT: [[MY_TMP27:%.*]] = fsub float [[MY_TMP26]], 0x7FF8000000000000259; IR-NEXT: [[MY_TMP28:%.*]] = fcmp olt float [[MY_TMP27]], 5.000000e-01260; IR-NEXT: [[MY_TMP29:%.*]] = select i1 [[MY_TMP28]], i64 1, i64 2261; IR-NEXT: [[MY_TMP30:%.*]] = extractelement <4 x i32> [[MY_TMP936]], i64 [[MY_TMP29]]262; IR-NEXT: [[MY_TMP7:%.*]] = zext i32 [[MY_TMP30]] to i64263; IR-NEXT: [[MY_TMP8:%.*]] = getelementptr inbounds <4 x i32>, ptr addrspace(1) poison, i64 [[MY_TMP7]]264; IR-NEXT: [[MY_TMP9]] = load <4 x i32>, ptr addrspace(1) [[MY_TMP8]], align 16265; IR-NEXT: [[MY_TMP10]] = extractelement <4 x i32> [[MY_TMP9]], i64 0266; IR-NEXT: [[MY_TMP11:%.*]] = load volatile i32, ptr addrspace(1) poison, align 4267; IR-NEXT: [[MY_TMP12]] = icmp sge i32 [[MY_TMP11]], 9268; IR-NEXT: br label %[[FLOW1]]269; IR: [[FLOW2]]:270; IR-NEXT: call void @llvm.amdgcn.end.cf.i64(i64 [[TMP16]])271; IR-NEXT: [[TMP18:%.*]] = call { i1, i64 } @llvm.amdgcn.if.i64(i1 [[TMP15]])272; IR-NEXT: [[TMP19:%.*]] = extractvalue { i1, i64 } [[TMP18]], 0273; IR-NEXT: [[TMP20]] = extractvalue { i1, i64 } [[TMP18]], 1274; IR-NEXT: br i1 [[TMP19]], label %[[BB31_LOOPEXIT:.*]], label %[[FLOW3]]275; IR: [[BB31_LOOPEXIT]]:276; IR-NEXT: br label %[[FLOW3]]277; IR: [[BB31]]:278; IR-NEXT: call void @llvm.amdgcn.end.cf.i64(i64 [[TMP7]])279; IR-NEXT: store volatile i32 0, ptr addrspace(1) poison, align 4280; IR-NEXT: ret void281;282bb:283 %my.tmp1134 = load volatile i32, ptr addrspace(1) poison284 %my.tmp1235 = icmp slt i32 %my.tmp1134, 9285 br i1 %my.tmp1235, label %bb14.lr.ph, label %bb13286 287bb14.lr.ph: ; preds = %bb288 %my.tmp = tail call i32 @llvm.amdgcn.workitem.id.x() #1289 %my.tmp1 = zext i32 %my.tmp to i64290 %my.tmp2 = getelementptr inbounds i64, ptr addrspace(1) %arg, i64 %my.tmp1291 %my.tmp3 = load i64, ptr addrspace(1) %my.tmp2, align 16292 %my.tmp932 = load <4 x i32>, ptr addrspace(1) poison, align 16293 %my.tmp1033 = extractelement <4 x i32> %my.tmp932, i64 0294 br label %bb14295 296bb4.bb13_crit_edge: ; preds = %bb21297 br label %bb13298 299bb13: ; preds = %bb4.bb13_crit_edge, %bb300 br label %bb31301 302bb14: ; preds = %bb21, %bb14.lr.ph303 %my.tmp1037 = phi i32 [ %my.tmp1033, %bb14.lr.ph ], [ %my.tmp10, %bb21 ]304 %my.tmp936 = phi <4 x i32> [ %my.tmp932, %bb14.lr.ph ], [ %my.tmp9, %bb21 ]305 %my.tmp15 = icmp eq i32 %my.tmp1037, 1306 br i1 %my.tmp15, label %bb16, label %bb31.loopexit307 308bb16: ; preds = %bb14309 %my.tmp17 = bitcast i64 %my.tmp3 to <2 x i32>310 br label %bb18311 312bb18: ; preds = %bb18, %bb16313 %my.tmp19 = load volatile i32, ptr addrspace(1) poison314 %my.tmp20 = icmp slt i32 %my.tmp19, 9315 br i1 %my.tmp20, label %bb21, label %bb18316 317bb21: ; preds = %bb18318 %my.tmp22 = extractelement <2 x i32> %my.tmp17, i64 1319 %my.tmp23 = lshr i32 %my.tmp22, 16320 %my.tmp24 = select i1 false, i32 0, i32 %my.tmp23321 %my.tmp25 = uitofp i32 %my.tmp24 to float322 %my.tmp26 = fmul float %my.tmp25, 0x3EF0001000000000323 %my.tmp27 = fsub float %my.tmp26, 0x7FF8000000000000324 %my.tmp28 = fcmp olt float %my.tmp27, 5.000000e-01325 %my.tmp29 = select i1 %my.tmp28, i64 1, i64 2326 %my.tmp30 = extractelement <4 x i32> %my.tmp936, i64 %my.tmp29327 %my.tmp7 = zext i32 %my.tmp30 to i64328 %my.tmp8 = getelementptr inbounds <4 x i32>, ptr addrspace(1) poison, i64 %my.tmp7329 %my.tmp9 = load <4 x i32>, ptr addrspace(1) %my.tmp8, align 16330 %my.tmp10 = extractelement <4 x i32> %my.tmp9, i64 0331 %my.tmp11 = load volatile i32, ptr addrspace(1) poison332 %my.tmp12 = icmp slt i32 %my.tmp11, 9333 br i1 %my.tmp12, label %bb14, label %bb4.bb13_crit_edge334 335bb31.loopexit: ; preds = %bb14336 br label %bb31337 338bb31: ; preds = %bb31.loopexit, %bb13339 store volatile i32 0, ptr addrspace(1) poison340 ret void341}342 343declare i32 @llvm.amdgcn.workitem.id.x() #1344 345attributes #0 = { nounwind }346attributes #1 = { nounwind readnone }347