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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 62# RUN: llc -mtriple=amdgcn -run-pass register-coalescer -o - %s | FileCheck %s3 4# Check that coalescer may create wider register tuple than in source.5---6name: no_limit_coalesce7tracksRegLiveness: true8body: |9 bb.0:10 liveins: $sgpr16, $sgpr1711 12 ; CHECK-LABEL: name: no_limit_coalesce13 ; CHECK: liveins: $sgpr16, $sgpr1714 ; CHECK-NEXT: {{ $}}15 ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub1:sgpr_64 = COPY $sgpr1716 ; CHECK-NEXT: [[COPY:%[0-9]+]].sub0:sgpr_64 = COPY $sgpr1617 ; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec18 ; CHECK-NEXT: INLINEASM &"; def $0", 0 /* attdialect */, 2818058 /* regdef:VReg_64 */, def undef %5.sub0_sub119 ; CHECK-NEXT: GLOBAL_STORE_DWORDX4_SADDR [[V_MOV_B32_e32_]], %5.sub1_sub2_sub3_sub4, [[COPY]], 0, 0, implicit $exec :: (store (s128), addrspace 1)20 ; CHECK-NEXT: SI_RETURN21 %0:sgpr_32 = COPY killed $sgpr1722 %1:sgpr_32 = COPY killed $sgpr1623 undef %2.sub0:sgpr_64 = COPY killed %124 %2.sub1:sgpr_64 = COPY killed %025 %3:vgpr_32 = V_MOV_B32_e32 0, implicit $exec26 INLINEASM &"; def $0", 0 /* attdialect */, 2818058 /* regdef:VReg_64 */, def %4:vreg_6427 undef %5.sub0:vreg_128 = COPY killed %4.sub128 GLOBAL_STORE_DWORDX4_SADDR killed %3, killed %5, killed %2, 0, 0, implicit $exec :: (store (s128), addrspace 1)29 SI_RETURN30...31 32---33name: allow_coalesce34tracksRegLiveness: true35registers:36 - { id: 0, class: sreg_32_xm0, preferred-register: '%0' }37 - { id: 1, class: vreg_64, preferred-register: '%1' }38body: |39 bb.0:40 liveins: $sgpr0, $vgpr0_vgpr141 42 ; CHECK-LABEL: name: allow_coalesce43 ; CHECK: liveins: $sgpr0, $vgpr0_vgpr144 ; CHECK-NEXT: {{ $}}45 ; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub1:vreg_128 = COPY $sgpr046 ; CHECK-NEXT: FLAT_STORE_DWORDX2 $vgpr0_vgpr1, [[COPY]].sub0_sub1, 0, 0, implicit $exec, implicit $flat_scr47 ; CHECK-NEXT: [[DEF:%[0-9]+]]:vreg_96 = IMPLICIT_DEF48 ; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0_sub1:vreg_96 = COPY [[DEF]]49 ; CHECK-NEXT: FLAT_STORE_DWORDX3 $vgpr0_vgpr1, [[COPY1]], 0, 0, implicit $exec, implicit $flat_scr50 ; CHECK-NEXT: [[DEF1:%[0-9]+]]:vreg_128 = IMPLICIT_DEF51 ; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0_sub1_sub2:vreg_128 = COPY [[DEF1]]52 ; CHECK-NEXT: FLAT_STORE_DWORDX4 $vgpr0_vgpr1, [[COPY2]], 0, 0, implicit $exec, implicit $flat_scr53 %2:vreg_64 = IMPLICIT_DEF54 undef %3.sub0:vreg_64 = COPY $sgpr055 %3.sub1:vreg_64 = COPY %2.sub056 undef %4.sub0:vreg_64 = COPY %3.sub157 %4.sub1:vreg_64 = COPY %3.sub058 FLAT_STORE_DWORDX2 $vgpr0_vgpr1, killed %4, 0, 0, implicit $exec, implicit $flat_scr59 60 %5:vreg_96 = IMPLICIT_DEF61 undef %6.sub0_sub1:vreg_96 = COPY %562 %6.sub2:vreg_96 = COPY %2.sub063 FLAT_STORE_DWORDX3 $vgpr0_vgpr1, killed %6, 0, 0, implicit $exec, implicit $flat_scr64 65 %7:vreg_128 = IMPLICIT_DEF66 undef %8.sub0_sub1_sub2:vreg_128 = COPY %767 %8.sub3:vreg_128 = COPY %2.sub068 FLAT_STORE_DWORDX4 $vgpr0_vgpr1, killed %8, 0, 0, implicit $exec, implicit $flat_scr69 70...71 72