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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: sed 's/CODE_OBJECT_VERSION/400/g' %s | llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 | FileCheck -check-prefixes=MUBUF,DEFAULTSIZE %s3; RUN: sed 's/CODE_OBJECT_VERSION/500/g' %s | llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 | FileCheck -check-prefixes=MUBUF,DEFAULTSIZE-V5 %s4; RUN: sed 's/CODE_OBJECT_VERSION/600/g' %s | llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 | FileCheck -check-prefixes=MUBUF,DEFAULTSIZE-V5 %s5; RUN: sed 's/CODE_OBJECT_VERSION/400/g' %s | llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -amdgpu-assume-dynamic-stack-object-size=1024 | FileCheck -check-prefixes=MUBUF,ASSUME1024 %s6; RUN: sed 's/CODE_OBJECT_VERSION/400/g' %s | llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -amdgpu-assume-dynamic-stack-object-size=1024 | FileCheck -check-prefixes=MUBUF,ASSUME1024 %s7; RUN: sed 's/CODE_OBJECT_VERSION/400/g' %s | llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -mattr=+enable-flat-scratch | FileCheck -check-prefixes=FLATSCR,DEFAULTSIZE %s8; RUN: sed 's/CODE_OBJECT_VERSION/400/g' %s | llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -mattr=+enable-flat-scratch -amdgpu-assume-dynamic-stack-object-size=1024 | FileCheck -check-prefixes=FLATSCR,ASSUME1024 %s9 10; FIXME: Generated test checks do not check metadata at the end of the11; function, so this also includes manually added checks.12 13; Test that we can select a statically sized alloca outside of the14; entry block.15 16; FIXME: FunctionLoweringInfo unhelpfully doesn't preserve an17; alignment less than the stack alignment.18define amdgpu_kernel void @kernel_non_entry_block_static_alloca_uniformly_reached_align4(ptr addrspace(1) %out, i32 %arg.cond0, i32 %arg.cond1, i32 %in) #1 {19; MUBUF-LABEL: kernel_non_entry_block_static_alloca_uniformly_reached_align4:20; MUBUF: ; %bb.0: ; %entry21; MUBUF-NEXT: s_add_u32 s0, s0, s922; MUBUF-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x823; MUBUF-NEXT: s_addc_u32 s1, s1, 024; MUBUF-NEXT: s_mov_b32 s33, 025; MUBUF-NEXT: s_movk_i32 s32, 0x40026; MUBUF-NEXT: s_waitcnt lgkmcnt(0)27; MUBUF-NEXT: s_cmp_lg_u32 s8, 028; MUBUF-NEXT: s_cbranch_scc1 .LBB0_329; MUBUF-NEXT: ; %bb.1: ; %bb.030; MUBUF-NEXT: s_cmp_lg_u32 s9, 031; MUBUF-NEXT: s_cbranch_scc1 .LBB0_332; MUBUF-NEXT: ; %bb.2: ; %bb.133; MUBUF-NEXT: s_mov_b32 s6, s3234; MUBUF-NEXT: v_mov_b32_e32 v1, 035; MUBUF-NEXT: v_mov_b32_e32 v2, 136; MUBUF-NEXT: s_add_i32 s32, s6, 0x100037; MUBUF-NEXT: buffer_store_dword v1, off, s[0:3], s638; MUBUF-NEXT: buffer_store_dword v2, off, s[0:3], s6 offset:439; MUBUF-NEXT: s_lshl2_add_u32 s6, s10, s640; MUBUF-NEXT: v_mov_b32_e32 v2, s641; MUBUF-NEXT: buffer_load_dword v2, v2, s[0:3], 0 offen42; MUBUF-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x043; MUBUF-NEXT: s_waitcnt vmcnt(0)44; MUBUF-NEXT: v_add_u32_e32 v0, v2, v045; MUBUF-NEXT: s_waitcnt lgkmcnt(0)46; MUBUF-NEXT: global_store_dword v1, v0, s[4:5]47; MUBUF-NEXT: .LBB0_3: ; %bb.248; MUBUF-NEXT: v_mov_b32_e32 v0, 049; MUBUF-NEXT: global_store_dword v[0:1], v0, off50; MUBUF-NEXT: s_waitcnt vmcnt(0)51; MUBUF-NEXT: s_endpgm52;53; FLATSCR-LABEL: kernel_non_entry_block_static_alloca_uniformly_reached_align4:54; FLATSCR: ; %bb.0: ; %entry55; FLATSCR-NEXT: s_add_u32 flat_scratch_lo, s2, s556; FLATSCR-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x857; FLATSCR-NEXT: s_addc_u32 flat_scratch_hi, s3, 058; FLATSCR-NEXT: s_mov_b32 s33, 059; FLATSCR-NEXT: s_mov_b32 s32, 1660; FLATSCR-NEXT: s_waitcnt lgkmcnt(0)61; FLATSCR-NEXT: s_cmp_lg_u32 s4, 062; FLATSCR-NEXT: s_cbranch_scc1 .LBB0_363; FLATSCR-NEXT: ; %bb.1: ; %bb.064; FLATSCR-NEXT: s_cmp_lg_u32 s5, 065; FLATSCR-NEXT: s_cbranch_scc1 .LBB0_366; FLATSCR-NEXT: ; %bb.2: ; %bb.167; FLATSCR-NEXT: s_mov_b32 s2, s3268; FLATSCR-NEXT: v_mov_b32_e32 v1, 069; FLATSCR-NEXT: v_mov_b32_e32 v2, 170; FLATSCR-NEXT: s_add_i32 s32, s2, 0x100071; FLATSCR-NEXT: scratch_store_dwordx2 off, v[1:2], s272; FLATSCR-NEXT: s_lshl2_add_u32 s2, s6, s273; FLATSCR-NEXT: scratch_load_dword v2, off, s274; FLATSCR-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x075; FLATSCR-NEXT: s_waitcnt vmcnt(0)76; FLATSCR-NEXT: v_add_u32_e32 v0, v2, v077; FLATSCR-NEXT: s_waitcnt lgkmcnt(0)78; FLATSCR-NEXT: global_store_dword v1, v0, s[0:1]79; FLATSCR-NEXT: .LBB0_3: ; %bb.280; FLATSCR-NEXT: v_mov_b32_e32 v0, 081; FLATSCR-NEXT: global_store_dword v[0:1], v0, off82; FLATSCR-NEXT: s_waitcnt vmcnt(0)83; FLATSCR-NEXT: s_endpgm84 85entry:86 %cond0 = icmp eq i32 %arg.cond0, 087 br i1 %cond0, label %bb.0, label %bb.288 89bb.0:90 %alloca = alloca [16 x i32], align 4, addrspace(5)91 %gep1 = getelementptr [16 x i32], ptr addrspace(5) %alloca, i32 0, i32 192 %cond1 = icmp eq i32 %arg.cond1, 093 br i1 %cond1, label %bb.1, label %bb.294 95bb.1:96 ; Use the alloca outside of the defining block.97 store i32 0, ptr addrspace(5) %alloca98 store i32 1, ptr addrspace(5) %gep199 %gep2 = getelementptr [16 x i32], ptr addrspace(5) %alloca, i32 0, i32 %in100 %load = load i32, ptr addrspace(5) %gep2101 %tid = call i32 @llvm.amdgcn.workitem.id.x()102 %add = add i32 %load, %tid103 store i32 %add, ptr addrspace(1) %out104 br label %bb.2105 106bb.2:107 store volatile i32 0, ptr addrspace(1) poison108 ret void109}110; DEFAULTSIZE: .amdhsa_private_segment_fixed_size 4112111; DEFAULTSIZE: ; ScratchSize: 4112112; DEFAULTSIZE-V5: .amdhsa_private_segment_fixed_size 16113; DEFAULTSIZE-V5: .amdhsa_uses_dynamic_stack 1114; DEFAULTSIZE-V5: ; ScratchSize: 16115 116; ASSUME1024: .amdhsa_private_segment_fixed_size 1040117; ASSUME1024: ; ScratchSize: 1040118 119define amdgpu_kernel void @kernel_non_entry_block_static_alloca_uniformly_reached_align64(ptr addrspace(1) %out, i32 %arg.cond, i32 %in) {120; MUBUF-LABEL: kernel_non_entry_block_static_alloca_uniformly_reached_align64:121; MUBUF: ; %bb.0: ; %entry122; MUBUF-NEXT: s_load_dwordx2 s[4:5], s[8:9], 0x8123; MUBUF-NEXT: s_add_u32 s0, s0, s17124; MUBUF-NEXT: s_addc_u32 s1, s1, 0125; MUBUF-NEXT: s_mov_b32 s33, 0126; MUBUF-NEXT: s_movk_i32 s32, 0x1000127; MUBUF-NEXT: s_waitcnt lgkmcnt(0)128; MUBUF-NEXT: s_cmp_lg_u32 s4, 0129; MUBUF-NEXT: s_cbranch_scc1 .LBB1_2130; MUBUF-NEXT: ; %bb.1: ; %bb.0131; MUBUF-NEXT: s_add_i32 s4, s32, 0xfff132; MUBUF-NEXT: s_and_b32 s4, s4, 0xfffff000133; MUBUF-NEXT: s_add_i32 s32, s4, 0x1000134; MUBUF-NEXT: v_mov_b32_e32 v1, 0135; MUBUF-NEXT: v_mov_b32_e32 v2, s4136; MUBUF-NEXT: v_mov_b32_e32 v3, 1137; MUBUF-NEXT: s_lshl2_add_u32 s4, s5, s4138; MUBUF-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen139; MUBUF-NEXT: buffer_store_dword v3, v2, s[0:3], 0 offen offset:4140; MUBUF-NEXT: v_mov_b32_e32 v2, s4141; MUBUF-NEXT: buffer_load_dword v2, v2, s[0:3], 0 offen142; MUBUF-NEXT: s_load_dwordx2 s[4:5], s[8:9], 0x0143; MUBUF-NEXT: s_waitcnt vmcnt(0)144; MUBUF-NEXT: v_add_u32_e32 v0, v2, v0145; MUBUF-NEXT: s_waitcnt lgkmcnt(0)146; MUBUF-NEXT: global_store_dword v1, v0, s[4:5]147; MUBUF-NEXT: .LBB1_2: ; %bb.1148; MUBUF-NEXT: v_mov_b32_e32 v0, 0149; MUBUF-NEXT: global_store_dword v[0:1], v0, off150; MUBUF-NEXT: s_waitcnt vmcnt(0)151; MUBUF-NEXT: s_endpgm152;153; FLATSCR-LABEL: kernel_non_entry_block_static_alloca_uniformly_reached_align64:154; FLATSCR: ; %bb.0: ; %entry155; FLATSCR-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8156; FLATSCR-NEXT: s_add_u32 flat_scratch_lo, s8, s13157; FLATSCR-NEXT: s_addc_u32 flat_scratch_hi, s9, 0158; FLATSCR-NEXT: s_mov_b32 s33, 0159; FLATSCR-NEXT: s_mov_b32 s32, 64160; FLATSCR-NEXT: s_waitcnt lgkmcnt(0)161; FLATSCR-NEXT: s_cmp_lg_u32 s0, 0162; FLATSCR-NEXT: s_cbranch_scc1 .LBB1_2163; FLATSCR-NEXT: ; %bb.1: ; %bb.0164; FLATSCR-NEXT: s_add_i32 s0, s32, 0xfff165; FLATSCR-NEXT: v_mov_b32_e32 v1, 0166; FLATSCR-NEXT: s_and_b32 s0, s0, 0xfffff000167; FLATSCR-NEXT: v_mov_b32_e32 v2, 1168; FLATSCR-NEXT: s_add_i32 s32, s0, 0x1000169; FLATSCR-NEXT: scratch_store_dwordx2 off, v[1:2], s0170; FLATSCR-NEXT: s_lshl2_add_u32 s0, s1, s0171; FLATSCR-NEXT: scratch_load_dword v2, off, s0172; FLATSCR-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0173; FLATSCR-NEXT: s_waitcnt vmcnt(0)174; FLATSCR-NEXT: v_add_u32_e32 v0, v2, v0175; FLATSCR-NEXT: s_waitcnt lgkmcnt(0)176; FLATSCR-NEXT: global_store_dword v1, v0, s[0:1]177; FLATSCR-NEXT: .LBB1_2: ; %bb.1178; FLATSCR-NEXT: v_mov_b32_e32 v0, 0179; FLATSCR-NEXT: global_store_dword v[0:1], v0, off180; FLATSCR-NEXT: s_waitcnt vmcnt(0)181; FLATSCR-NEXT: s_endpgm182entry:183 %cond = icmp eq i32 %arg.cond, 0184 br i1 %cond, label %bb.0, label %bb.1185 186bb.0:187 %alloca = alloca [16 x i32], align 64, addrspace(5)188 %gep1 = getelementptr [16 x i32], ptr addrspace(5) %alloca, i32 0, i32 1189 store i32 0, ptr addrspace(5) %alloca190 store i32 1, ptr addrspace(5) %gep1191 %gep2 = getelementptr [16 x i32], ptr addrspace(5) %alloca, i32 0, i32 %in192 %load = load i32, ptr addrspace(5) %gep2193 %tid = call i32 @llvm.amdgcn.workitem.id.x()194 %add = add i32 %load, %tid195 store i32 %add, ptr addrspace(1) %out196 br label %bb.1197 198bb.1:199 store volatile i32 0, ptr addrspace(1) poison200 ret void201}202 203; DEFAULTSIZE: .amdhsa_private_segment_fixed_size 4160204; DEFAULTSIZE: ; ScratchSize: 4160205; DEFAULTSIZE-V5: .amdhsa_private_segment_fixed_size 64206; DEFAULTSIZE-V5: .amdhsa_uses_dynamic_stack 1207; DEFAULTSIZE-V5: ; ScratchSize: 64208 209; ASSUME1024: .amdhsa_private_segment_fixed_size 1088210; ASSUME1024: ; ScratchSize: 1088211 212 213define void @func_non_entry_block_static_alloca_align4(ptr addrspace(1) %out, i32 %arg.cond0, i32 %arg.cond1, i32 %in) {214; MUBUF-LABEL: func_non_entry_block_static_alloca_align4:215; MUBUF: ; %bb.0: ; %entry216; MUBUF-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)217; MUBUF-NEXT: s_mov_b32 s7, s33218; MUBUF-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2219; MUBUF-NEXT: s_mov_b32 s33, s32220; MUBUF-NEXT: s_addk_i32 s32, 0x400221; MUBUF-NEXT: s_and_saveexec_b64 s[4:5], vcc222; MUBUF-NEXT: s_cbranch_execz .LBB2_3223; MUBUF-NEXT: ; %bb.1: ; %bb.0224; MUBUF-NEXT: v_cmp_eq_u32_e32 vcc, 0, v3225; MUBUF-NEXT: s_and_b64 exec, exec, vcc226; MUBUF-NEXT: s_cbranch_execz .LBB2_3227; MUBUF-NEXT: ; %bb.2: ; %bb.1228; MUBUF-NEXT: s_mov_b32 s6, s32229; MUBUF-NEXT: v_mov_b32_e32 v2, 0230; MUBUF-NEXT: buffer_store_dword v2, off, s[0:3], s6231; MUBUF-NEXT: v_mov_b32_e32 v2, 1232; MUBUF-NEXT: buffer_store_dword v2, off, s[0:3], s6 offset:4233; MUBUF-NEXT: v_lshl_add_u32 v2, v4, 2, s6234; MUBUF-NEXT: buffer_load_dword v2, v2, s[0:3], 0 offen235; MUBUF-NEXT: v_and_b32_e32 v3, 0x3ff, v31236; MUBUF-NEXT: s_add_i32 s32, s6, 0x1000237; MUBUF-NEXT: s_waitcnt vmcnt(0)238; MUBUF-NEXT: v_add_u32_e32 v2, v2, v3239; MUBUF-NEXT: global_store_dword v[0:1], v2, off240; MUBUF-NEXT: .LBB2_3: ; %bb.2241; MUBUF-NEXT: s_or_b64 exec, exec, s[4:5]242; MUBUF-NEXT: v_mov_b32_e32 v0, 0243; MUBUF-NEXT: global_store_dword v[0:1], v0, off244; MUBUF-NEXT: s_waitcnt vmcnt(0)245; MUBUF-NEXT: s_mov_b32 s32, s33246; MUBUF-NEXT: s_mov_b32 s33, s7247; MUBUF-NEXT: s_setpc_b64 s[30:31]248;249; FLATSCR-LABEL: func_non_entry_block_static_alloca_align4:250; FLATSCR: ; %bb.0: ; %entry251; FLATSCR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)252; FLATSCR-NEXT: s_mov_b32 s3, s33253; FLATSCR-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2254; FLATSCR-NEXT: s_mov_b32 s33, s32255; FLATSCR-NEXT: s_add_i32 s32, s32, 16256; FLATSCR-NEXT: s_and_saveexec_b64 s[0:1], vcc257; FLATSCR-NEXT: s_cbranch_execz .LBB2_3258; FLATSCR-NEXT: ; %bb.1: ; %bb.0259; FLATSCR-NEXT: v_cmp_eq_u32_e32 vcc, 0, v3260; FLATSCR-NEXT: s_and_b64 exec, exec, vcc261; FLATSCR-NEXT: s_cbranch_execz .LBB2_3262; FLATSCR-NEXT: ; %bb.2: ; %bb.1263; FLATSCR-NEXT: s_mov_b32 s2, s32264; FLATSCR-NEXT: v_mov_b32_e32 v2, 0265; FLATSCR-NEXT: v_mov_b32_e32 v3, 1266; FLATSCR-NEXT: scratch_store_dwordx2 off, v[2:3], s2267; FLATSCR-NEXT: v_lshl_add_u32 v2, v4, 2, s2268; FLATSCR-NEXT: scratch_load_dword v2, v2, off269; FLATSCR-NEXT: v_and_b32_e32 v3, 0x3ff, v31270; FLATSCR-NEXT: s_add_i32 s32, s2, 0x1000271; FLATSCR-NEXT: s_waitcnt vmcnt(0)272; FLATSCR-NEXT: v_add_u32_e32 v2, v2, v3273; FLATSCR-NEXT: global_store_dword v[0:1], v2, off274; FLATSCR-NEXT: .LBB2_3: ; %bb.2275; FLATSCR-NEXT: s_or_b64 exec, exec, s[0:1]276; FLATSCR-NEXT: v_mov_b32_e32 v0, 0277; FLATSCR-NEXT: global_store_dword v[0:1], v0, off278; FLATSCR-NEXT: s_waitcnt vmcnt(0)279; FLATSCR-NEXT: s_mov_b32 s32, s33280; FLATSCR-NEXT: s_mov_b32 s33, s3281; FLATSCR-NEXT: s_setpc_b64 s[30:31]282 283entry:284 %cond0 = icmp eq i32 %arg.cond0, 0285 br i1 %cond0, label %bb.0, label %bb.2286 287bb.0:288 %alloca = alloca [16 x i32], align 4, addrspace(5)289 %gep1 = getelementptr [16 x i32], ptr addrspace(5) %alloca, i32 0, i32 1290 %cond1 = icmp eq i32 %arg.cond1, 0291 br i1 %cond1, label %bb.1, label %bb.2292 293bb.1:294 ; Use the alloca outside of the defining block.295 store i32 0, ptr addrspace(5) %alloca296 store i32 1, ptr addrspace(5) %gep1297 %gep2 = getelementptr [16 x i32], ptr addrspace(5) %alloca, i32 0, i32 %in298 %load = load i32, ptr addrspace(5) %gep2299 %tid = call i32 @llvm.amdgcn.workitem.id.x()300 %add = add i32 %load, %tid301 store i32 %add, ptr addrspace(1) %out302 br label %bb.2303 304bb.2:305 store volatile i32 0, ptr addrspace(1) poison306 ret void307}308 309define void @func_non_entry_block_static_alloca_align64(ptr addrspace(1) %out, i32 %arg.cond, i32 %in) {310; MUBUF-LABEL: func_non_entry_block_static_alloca_align64:311; MUBUF: ; %bb.0: ; %entry312; MUBUF-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)313; MUBUF-NEXT: s_mov_b32 s7, s33314; MUBUF-NEXT: s_add_i32 s33, s32, 0xfc0315; MUBUF-NEXT: s_mov_b32 s8, s34316; MUBUF-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2317; MUBUF-NEXT: s_and_b32 s33, s33, 0xfffff000318; MUBUF-NEXT: s_mov_b32 s34, s32319; MUBUF-NEXT: s_addk_i32 s32, 0x2000320; MUBUF-NEXT: s_and_saveexec_b64 s[4:5], vcc321; MUBUF-NEXT: s_cbranch_execz .LBB3_2322; MUBUF-NEXT: ; %bb.1: ; %bb.0323; MUBUF-NEXT: s_add_i32 s6, s32, 0xfff324; MUBUF-NEXT: s_and_b32 s6, s6, 0xfffff000325; MUBUF-NEXT: v_mov_b32_e32 v2, 0326; MUBUF-NEXT: v_mov_b32_e32 v4, s6327; MUBUF-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen328; MUBUF-NEXT: v_mov_b32_e32 v2, 1329; MUBUF-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen offset:4330; MUBUF-NEXT: v_lshl_add_u32 v2, v3, 2, s6331; MUBUF-NEXT: buffer_load_dword v2, v2, s[0:3], 0 offen332; MUBUF-NEXT: v_and_b32_e32 v3, 0x3ff, v31333; MUBUF-NEXT: s_add_i32 s32, s6, 0x1000334; MUBUF-NEXT: s_waitcnt vmcnt(0)335; MUBUF-NEXT: v_add_u32_e32 v2, v2, v3336; MUBUF-NEXT: global_store_dword v[0:1], v2, off337; MUBUF-NEXT: .LBB3_2: ; %bb.1338; MUBUF-NEXT: s_or_b64 exec, exec, s[4:5]339; MUBUF-NEXT: v_mov_b32_e32 v0, 0340; MUBUF-NEXT: global_store_dword v[0:1], v0, off341; MUBUF-NEXT: s_waitcnt vmcnt(0)342; MUBUF-NEXT: s_mov_b32 s32, s34343; MUBUF-NEXT: s_mov_b32 s34, s8344; MUBUF-NEXT: s_mov_b32 s33, s7345; MUBUF-NEXT: s_setpc_b64 s[30:31]346;347; FLATSCR-LABEL: func_non_entry_block_static_alloca_align64:348; FLATSCR: ; %bb.0: ; %entry349; FLATSCR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)350; FLATSCR-NEXT: s_mov_b32 s3, s33351; FLATSCR-NEXT: s_add_i32 s33, s32, 63352; FLATSCR-NEXT: s_mov_b32 s4, s34353; FLATSCR-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2354; FLATSCR-NEXT: s_andn2_b32 s33, s33, 63355; FLATSCR-NEXT: s_mov_b32 s34, s32356; FLATSCR-NEXT: s_addk_i32 s32, 0x80357; FLATSCR-NEXT: s_and_saveexec_b64 s[0:1], vcc358; FLATSCR-NEXT: s_cbranch_execz .LBB3_2359; FLATSCR-NEXT: ; %bb.1: ; %bb.0360; FLATSCR-NEXT: s_add_i32 s2, s32, 0xfff361; FLATSCR-NEXT: s_and_b32 s2, s2, 0xfffff000362; FLATSCR-NEXT: v_mov_b32_e32 v4, 0363; FLATSCR-NEXT: v_mov_b32_e32 v5, 1364; FLATSCR-NEXT: scratch_store_dwordx2 off, v[4:5], s2365; FLATSCR-NEXT: v_lshl_add_u32 v2, v3, 2, s2366; FLATSCR-NEXT: scratch_load_dword v2, v2, off367; FLATSCR-NEXT: v_and_b32_e32 v3, 0x3ff, v31368; FLATSCR-NEXT: s_add_i32 s32, s2, 0x1000369; FLATSCR-NEXT: s_waitcnt vmcnt(0)370; FLATSCR-NEXT: v_add_u32_e32 v2, v2, v3371; FLATSCR-NEXT: global_store_dword v[0:1], v2, off372; FLATSCR-NEXT: .LBB3_2: ; %bb.1373; FLATSCR-NEXT: s_or_b64 exec, exec, s[0:1]374; FLATSCR-NEXT: v_mov_b32_e32 v0, 0375; FLATSCR-NEXT: global_store_dword v[0:1], v0, off376; FLATSCR-NEXT: s_waitcnt vmcnt(0)377; FLATSCR-NEXT: s_mov_b32 s32, s34378; FLATSCR-NEXT: s_mov_b32 s34, s4379; FLATSCR-NEXT: s_mov_b32 s33, s3380; FLATSCR-NEXT: s_setpc_b64 s[30:31]381entry:382 %cond = icmp eq i32 %arg.cond, 0383 br i1 %cond, label %bb.0, label %bb.1384 385bb.0:386 %alloca = alloca [16 x i32], align 64, addrspace(5)387 %gep1 = getelementptr [16 x i32], ptr addrspace(5) %alloca, i32 0, i32 1388 store i32 0, ptr addrspace(5) %alloca389 store i32 1, ptr addrspace(5) %gep1390 %gep2 = getelementptr [16 x i32], ptr addrspace(5) %alloca, i32 0, i32 %in391 %load = load i32, ptr addrspace(5) %gep2392 %tid = call i32 @llvm.amdgcn.workitem.id.x()393 %add = add i32 %load, %tid394 store i32 %add, ptr addrspace(1) %out395 br label %bb.1396 397bb.1:398 store volatile i32 0, ptr addrspace(1) poison399 ret void400}401 402declare i32 @llvm.amdgcn.workitem.id.x() #0403 404attributes #0 = { nounwind readnone speculatable }405attributes #1 = { nounwind "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-cluster-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-cluster-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-cluster-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }406 407!llvm.module.flags = !{!0}408!0 = !{i32 1, !"amdhsa_code_object_version", i32 CODE_OBJECT_VERSION}409;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:410; ASSUME1024: {{.*}}411; DEFAULTSIZE: {{.*}}412; DEFAULTSIZE-V5: {{.*}}413