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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 -verify-machineinstrs -run-pass=si-optimize-exec-masking-pre-ra -o - %s | FileCheck %s3 4 5# Cannot fold this without moving the def of %7 after the and.6---7name: no_fold_andn2_select_condition_live_out_phi8tracksRegLiveness: true9body: |10 ; CHECK-LABEL: name: no_fold_andn2_select_condition_live_out_phi11 ; CHECK: bb.0:12 ; CHECK-NEXT: successors: %bb.2(0x80000000)13 ; CHECK-NEXT: {{ $}}14 ; CHECK-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64_xexec = S_MOV_B64 -115 ; CHECK-NEXT: undef [[V_MOV_B32_e32_:%[0-9]+]].sub0:vreg_64 = V_MOV_B32_e32 0, implicit $exec16 ; CHECK-NEXT: S_BRANCH %bb.217 ; CHECK-NEXT: {{ $}}18 ; CHECK-NEXT: bb.1:19 ; CHECK-NEXT: S_ENDPGM 020 ; CHECK-NEXT: {{ $}}21 ; CHECK-NEXT: bb.2:22 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)23 ; CHECK-NEXT: {{ $}}24 ; CHECK-NEXT: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[S_MOV_B64_]], implicit $exec25 ; CHECK-NEXT: V_CMP_NE_U32_e32 1, [[V_CNDMASK_B32_e64_]], implicit-def $vcc, implicit $exec26 ; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]].sub1:vreg_64 = COPY [[V_MOV_B32_e32_]].sub027 ; CHECK-NEXT: DS_WRITE_B64_gfx9 undef %3:vgpr_32, [[V_MOV_B32_e32_]], 0, 0, implicit $exec :: (store (s64), addrspace 3)28 ; CHECK-NEXT: ATOMIC_FENCE 4, 229 ; CHECK-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64_xexec = S_MOV_B64 030 ; CHECK-NEXT: $vcc = S_AND_B64 $exec, $vcc, implicit-def dead $scc31 ; CHECK-NEXT: S_CBRANCH_VCCNZ %bb.1, implicit $vcc32 ; CHECK-NEXT: S_BRANCH %bb.233 bb.0:34 successors: %bb.235 36 %7:sreg_64_xexec = S_MOV_B64 -137 undef %5.sub0:vreg_64 = V_MOV_B32_e32 0, implicit $exec38 S_BRANCH %bb.239 40 bb.1:41 S_ENDPGM 042 43 bb.2:44 successors: %bb.1, %bb.245 46 %4:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %7, implicit $exec47 V_CMP_NE_U32_e32 1, %4, implicit-def $vcc, implicit $exec48 %5.sub1:vreg_64 = COPY %5.sub049 DS_WRITE_B64_gfx9 undef %6:vgpr_32, %5, 0, 0, implicit $exec :: (store (s64), addrspace 3)50 ATOMIC_FENCE 4, 251 %7:sreg_64_xexec = S_MOV_B64 052 $vcc = S_AND_B64 $exec, killed $vcc, implicit-def dead $scc53 S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc54 S_BRANCH %bb.255 56...57 58# It's OK to fold this, since the phi def is after the andn2 insert point.59---60name: fold_andn2_select_condition_live_out_phi_reorder61tracksRegLiveness: true62body: |63 ; CHECK-LABEL: name: fold_andn2_select_condition_live_out_phi_reorder64 ; CHECK: bb.0:65 ; CHECK-NEXT: successors: %bb.2(0x80000000)66 ; CHECK-NEXT: {{ $}}67 ; CHECK-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64_xexec = S_MOV_B64 -168 ; CHECK-NEXT: undef [[V_MOV_B32_e32_:%[0-9]+]].sub0:vreg_64 = V_MOV_B32_e32 0, implicit $exec69 ; CHECK-NEXT: S_BRANCH %bb.270 ; CHECK-NEXT: {{ $}}71 ; CHECK-NEXT: bb.1:72 ; CHECK-NEXT: S_ENDPGM 073 ; CHECK-NEXT: {{ $}}74 ; CHECK-NEXT: bb.2:75 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)76 ; CHECK-NEXT: {{ $}}77 ; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]].sub1:vreg_64 = COPY [[V_MOV_B32_e32_]].sub078 ; CHECK-NEXT: DS_WRITE_B64_gfx9 undef %3:vgpr_32, [[V_MOV_B32_e32_]], 0, 0, implicit $exec :: (store (s64), addrspace 3)79 ; CHECK-NEXT: ATOMIC_FENCE 4, 280 ; CHECK-NEXT: $vcc = S_ANDN2_B64 $exec, [[S_MOV_B64_]], implicit-def dead $scc81 ; CHECK-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64_xexec = S_MOV_B64 082 ; CHECK-NEXT: S_CBRANCH_VCCNZ %bb.1, implicit $vcc83 ; CHECK-NEXT: S_BRANCH %bb.284 bb.0:85 successors: %bb.286 87 %7:sreg_64_xexec = S_MOV_B64 -188 undef %5.sub0:vreg_64 = V_MOV_B32_e32 0, implicit $exec89 S_BRANCH %bb.290 91 bb.1:92 S_ENDPGM 093 94 bb.2:95 successors: %bb.1, %bb.296 97 %4:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %7, implicit $exec98 V_CMP_NE_U32_e32 1, %4, implicit-def $vcc, implicit $exec99 %5.sub1:vreg_64 = COPY %5.sub0100 DS_WRITE_B64_gfx9 undef %6:vgpr_32, %5, 0, 0, implicit $exec :: (store (s64), addrspace 3)101 ATOMIC_FENCE 4, 2102 $vcc = S_AND_B64 $exec, killed $vcc, implicit-def dead $scc103 %7:sreg_64_xexec = S_MOV_B64 0104 S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc105 S_BRANCH %bb.2106 107...108 109---110name: no_fold_andn2_select_condition_live_out_phi_physreg111tracksRegLiveness: true112body: |113 ; CHECK-LABEL: name: no_fold_andn2_select_condition_live_out_phi_physreg114 ; CHECK: bb.0:115 ; CHECK-NEXT: successors: %bb.2(0x80000000)116 ; CHECK-NEXT: {{ $}}117 ; CHECK-NEXT: $sgpr4_sgpr5 = S_MOV_B64 -1118 ; CHECK-NEXT: undef [[V_MOV_B32_e32_:%[0-9]+]].sub0:vreg_64 = V_MOV_B32_e32 0, implicit $exec119 ; CHECK-NEXT: S_BRANCH %bb.2120 ; CHECK-NEXT: {{ $}}121 ; CHECK-NEXT: bb.1:122 ; CHECK-NEXT: S_ENDPGM 0123 ; CHECK-NEXT: {{ $}}124 ; CHECK-NEXT: bb.2:125 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)126 ; CHECK-NEXT: liveins: $sgpr4_sgpr5127 ; CHECK-NEXT: {{ $}}128 ; CHECK-NEXT: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, $sgpr4_sgpr5, implicit $exec129 ; CHECK-NEXT: V_CMP_NE_U32_e32 1, [[V_CNDMASK_B32_e64_]], implicit-def $vcc, implicit $exec130 ; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]].sub1:vreg_64 = COPY [[V_MOV_B32_e32_]].sub0131 ; CHECK-NEXT: DS_WRITE_B64_gfx9 undef %2:vgpr_32, [[V_MOV_B32_e32_]], 0, 0, implicit $exec :: (store (s64), addrspace 3)132 ; CHECK-NEXT: ATOMIC_FENCE 4, 2133 ; CHECK-NEXT: $sgpr4_sgpr5 = S_MOV_B64 0134 ; CHECK-NEXT: $vcc = S_AND_B64 $exec, $vcc, implicit-def dead $scc135 ; CHECK-NEXT: S_CBRANCH_VCCNZ %bb.1, implicit $vcc136 ; CHECK-NEXT: S_BRANCH %bb.2137 bb.0:138 successors: %bb.2139 140 $sgpr4_sgpr5 = S_MOV_B64 -1141 undef %5.sub0:vreg_64 = V_MOV_B32_e32 0, implicit $exec142 S_BRANCH %bb.2143 144 bb.1:145 S_ENDPGM 0146 147 bb.2:148 successors: %bb.1, %bb.2149 liveins: $sgpr4_sgpr5150 151 %4:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, $sgpr4_sgpr5, implicit $exec152 V_CMP_NE_U32_e32 1, %4, implicit-def $vcc, implicit $exec153 %5.sub1:vreg_64 = COPY %5.sub0154 DS_WRITE_B64_gfx9 undef %6:vgpr_32, %5, 0, 0, implicit $exec :: (store (s64), addrspace 3)155 ATOMIC_FENCE 4, 2156 $sgpr4_sgpr5 = S_MOV_B64 0157 $vcc = S_AND_B64 $exec, killed $vcc, implicit-def dead $scc158 S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc159 S_BRANCH %bb.2160 161...162 163---164name: fold_andn2_select_condition_live_out_phi_physreg_reorder165tracksRegLiveness: true166body: |167 ; CHECK-LABEL: name: fold_andn2_select_condition_live_out_phi_physreg_reorder168 ; CHECK: bb.0:169 ; CHECK-NEXT: successors: %bb.2(0x80000000)170 ; CHECK-NEXT: {{ $}}171 ; CHECK-NEXT: $sgpr4_sgpr5 = S_MOV_B64 -1172 ; CHECK-NEXT: undef [[V_MOV_B32_e32_:%[0-9]+]].sub0:vreg_64 = V_MOV_B32_e32 0, implicit $exec173 ; CHECK-NEXT: S_BRANCH %bb.2174 ; CHECK-NEXT: {{ $}}175 ; CHECK-NEXT: bb.1:176 ; CHECK-NEXT: S_ENDPGM 0177 ; CHECK-NEXT: {{ $}}178 ; CHECK-NEXT: bb.2:179 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)180 ; CHECK-NEXT: liveins: $sgpr4_sgpr5181 ; CHECK-NEXT: {{ $}}182 ; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]].sub1:vreg_64 = COPY [[V_MOV_B32_e32_]].sub0183 ; CHECK-NEXT: DS_WRITE_B64_gfx9 undef %2:vgpr_32, [[V_MOV_B32_e32_]], 0, 0, implicit $exec :: (store (s64), addrspace 3)184 ; CHECK-NEXT: ATOMIC_FENCE 4, 2185 ; CHECK-NEXT: $vcc = S_ANDN2_B64 $exec, $sgpr4_sgpr5, implicit-def dead $scc186 ; CHECK-NEXT: $sgpr4_sgpr5 = S_MOV_B64 0187 ; CHECK-NEXT: S_CBRANCH_VCCNZ %bb.1, implicit $vcc188 ; CHECK-NEXT: S_BRANCH %bb.2189 bb.0:190 successors: %bb.2191 192 $sgpr4_sgpr5 = S_MOV_B64 -1193 undef %5.sub0:vreg_64 = V_MOV_B32_e32 0, implicit $exec194 S_BRANCH %bb.2195 196 bb.1:197 S_ENDPGM 0198 199 bb.2:200 successors: %bb.1, %bb.2201 liveins: $sgpr4_sgpr5202 203 %4:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, $sgpr4_sgpr5, implicit $exec204 V_CMP_NE_U32_e32 1, %4, implicit-def $vcc, implicit $exec205 %5.sub1:vreg_64 = COPY %5.sub0206 DS_WRITE_B64_gfx9 undef %6:vgpr_32, %5, 0, 0, implicit $exec :: (store (s64), addrspace 3)207 ATOMIC_FENCE 4, 2208 $vcc = S_AND_B64 $exec, killed $vcc, implicit-def dead $scc209 $sgpr4_sgpr5 = S_MOV_B64 0210 S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc211 S_BRANCH %bb.2212 213...214