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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn-mesa-mesa3d -run-pass=si-optimize-exec-masking-pre-ra -verify-machineinstrs %s -o - | FileCheck -check-prefix=GCN %s3 4# Check for regression from assuming an instruction was a copy after5# dropping the opcode check.6---7name: exec_src1_is_not_copy8tracksRegLiveness: true9machineFunctionInfo:10 isEntryFunction: true11 scratchRSrcReg: '$sgpr96_sgpr97_sgpr98_sgpr99'12 frameOffsetReg: '$sgpr101'13body: |14 ; GCN-LABEL: name: exec_src1_is_not_copy15 ; GCN: bb.0:16 ; GCN-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)17 ; GCN-NEXT: liveins: $vgpr018 ; GCN-NEXT: {{ $}}19 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $exec20 ; GCN-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF21 ; GCN-NEXT: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_NE_U32_e64 0, [[DEF]], implicit $exec22 ; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec23 ; GCN-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY1]], [[V_CMP_NE_U32_e64_]], implicit-def dead $scc24 ; GCN-NEXT: [[S_XOR_B64_:%[0-9]+]]:sreg_64 = S_XOR_B64 [[S_AND_B64_]], [[COPY1]], implicit-def dead $scc25 ; GCN-NEXT: $exec = S_MOV_B64_term [[S_AND_B64_]]26 ; GCN-NEXT: S_CBRANCH_EXECZ %bb.2, implicit $exec27 ; GCN-NEXT: S_BRANCH %bb.128 ; GCN-NEXT: {{ $}}29 ; GCN-NEXT: bb.1:30 ; GCN-NEXT: successors: %bb.2(0x80000000)31 ; GCN-NEXT: {{ $}}32 ; GCN-NEXT: bb.2:33 ; GCN-NEXT: successors: %bb.3(0x40000000), %bb.6(0x40000000)34 ; GCN-NEXT: {{ $}}35 ; GCN-NEXT: [[S_OR_SAVEEXEC_B64_:%[0-9]+]]:sreg_64 = S_OR_SAVEEXEC_B64 [[S_XOR_B64_]], implicit-def $exec, implicit-def $scc, implicit $exec36 ; GCN-NEXT: $exec = S_AND_B64 $exec, [[COPY]], implicit-def dead $scc37 ; GCN-NEXT: [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 $exec, [[S_OR_SAVEEXEC_B64_]], implicit-def $scc38 ; GCN-NEXT: $exec = S_XOR_B64_term $exec, [[S_AND_B64_1]], implicit-def $scc39 ; GCN-NEXT: S_CBRANCH_EXECZ %bb.6, implicit $exec40 ; GCN-NEXT: S_BRANCH %bb.341 ; GCN-NEXT: {{ $}}42 ; GCN-NEXT: bb.3:43 ; GCN-NEXT: successors: %bb.4(0x40000000), %bb.5(0x40000000)44 ; GCN-NEXT: {{ $}}45 ; GCN-NEXT: [[V_CMP_NE_U32_e64_1:%[0-9]+]]:sreg_64 = V_CMP_NE_U32_e64 0, [[DEF]], implicit $exec46 ; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec47 ; GCN-NEXT: [[S_AND_B64_2:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_NE_U32_e64_1]], implicit-def dead $scc48 ; GCN-NEXT: $exec = S_MOV_B64_term [[S_AND_B64_2]]49 ; GCN-NEXT: S_CBRANCH_EXECZ %bb.5, implicit $exec50 ; GCN-NEXT: S_BRANCH %bb.451 ; GCN-NEXT: {{ $}}52 ; GCN-NEXT: bb.4:53 ; GCN-NEXT: successors: %bb.5(0x80000000)54 ; GCN-NEXT: {{ $}}55 ; GCN-NEXT: bb.5:56 ; GCN-NEXT: successors: %bb.6(0x80000000)57 ; GCN-NEXT: {{ $}}58 ; GCN-NEXT: $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc59 ; GCN-NEXT: {{ $}}60 ; GCN-NEXT: bb.6:61 ; GCN-NEXT: $exec = S_OR_B64 $exec, [[S_AND_B64_1]], implicit-def $scc62 bb.0:63 successors: %bb.1, %bb.264 liveins: $vgpr065 66 %0:sreg_64 = COPY $exec67 %1:vgpr_32 = IMPLICIT_DEF68 %2:sreg_64 = V_CMP_NE_U32_e64 0, %1, implicit $exec69 %3:sreg_64 = COPY $exec, implicit-def $exec70 %4:sreg_64 = S_AND_B64 %3, %2, implicit-def dead $scc71 %5:sreg_64 = S_XOR_B64 %4, %3, implicit-def dead $scc72 $exec = S_MOV_B64_term %473 S_CBRANCH_EXECZ %bb.2, implicit $exec74 S_BRANCH %bb.175 76 bb.1:77 78 bb.2:79 successors: %bb.3, %bb.680 81 %6:sreg_64 = S_OR_SAVEEXEC_B64 %5, implicit-def $exec, implicit-def $scc, implicit $exec82 $exec = S_AND_B64 $exec, %0, implicit-def dead $scc83 %7:sreg_64 = S_AND_B64 $exec, %6, implicit-def $scc84 $exec = S_XOR_B64_term $exec, %7, implicit-def $scc85 S_CBRANCH_EXECZ %bb.6, implicit $exec86 S_BRANCH %bb.387 88 bb.3:89 successors: %bb.4, %bb.590 91 %8:sreg_64 = V_CMP_NE_U32_e64 0, %1, implicit $exec92 %9:sreg_64 = COPY $exec, implicit-def $exec93 %10:sreg_64 = S_AND_B64 %9, %8, implicit-def dead $scc94 $exec = S_MOV_B64_term %1095 S_CBRANCH_EXECZ %bb.5, implicit $exec96 S_BRANCH %bb.497 98 bb.4:99 100 bb.5:101 $exec = S_OR_B64 $exec, %9, implicit-def $scc102 103 bb.6:104 $exec = S_OR_B64 $exec, %7, implicit-def $scc105 106...107 108# When folding a v_cndmask and a v_cmp in a pattern leading to109# s_cbranch_vccz, ensure that an undef operand is handled correctly.110---111name: cndmask_cmp_cbranch_fold_undef112tracksRegLiveness: true113body: |114 ; GCN-LABEL: name: cndmask_cmp_cbranch_fold_undef115 ; GCN: bb.0:116 ; GCN-NEXT: successors: %bb.1(0x80000000)117 ; GCN-NEXT: {{ $}}118 ; GCN-NEXT: $vcc = S_ANDN2_B64 $exec, undef %1:sreg_64_xexec, implicit-def dead $scc119 ; GCN-NEXT: S_CBRANCH_VCCZ %bb.1, implicit $vcc120 ; GCN-NEXT: {{ $}}121 ; GCN-NEXT: bb.1:122 bb.0:123 124 %1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, undef %0:sreg_64_xexec, implicit $exec125 V_CMP_NE_U32_e32 1, %1, implicit-def $vcc, implicit $exec126 $vcc = S_AND_B64 $exec, $vcc, implicit-def dead $scc127 S_CBRANCH_VCCZ %bb.1, implicit $vcc128 129 bb.1:130 131...132 133# Don't crash on exec copy to SGPR subregister.134---135name: exec_copy_to_subreg136tracksRegLiveness: true137body: |138 ; GCN-LABEL: name: exec_copy_to_subreg139 ; GCN: bb.0:140 ; GCN-NEXT: successors: %bb.1(0x80000000)141 ; GCN-NEXT: {{ $}}142 ; GCN-NEXT: dead undef [[COPY:%[0-9]+]].sub0:sgpr_256 = COPY $exec143 ; GCN-NEXT: dead [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, undef %2:sreg_64_xexec, implicit $exec144 ; GCN-NEXT: S_BRANCH %bb.1145 ; GCN-NEXT: {{ $}}146 ; GCN-NEXT: bb.1:147 bb.0:148 149 undef %0.sub0:sgpr_256 = COPY $exec150 %2:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, undef %1:sreg_64_xexec, implicit $exec151 S_BRANCH %bb.1152 153 bb.1:154 155...156