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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -enable-var-scope -check-prefix=GFX900 %s3; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx90a < %s | FileCheck -enable-var-scope -check-prefixes=PACKED,PACKED-SDAG,GFX90A-SDAG %s4; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx90a < %s | FileCheck -enable-var-scope -check-prefixes=PACKED,PACKED-GISEL,GFX90A-GISEL %s5; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx942 < %s | FileCheck -enable-var-scope -check-prefixes=PACKED,PACKED-SDAG,GFX942-SDAG %s6; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx942 < %s | FileCheck -enable-var-scope -check-prefixes=PACKED,PACKED-GISEL,GFX942-GISEL %s7; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1250 < %s | FileCheck -enable-var-scope -check-prefixes=GFX1250,GFX1250-SDAG %s8; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1250 < %s | FileCheck -enable-var-scope -check-prefixes=GFX1250,GFX1250-GISEL %s9 10define amdgpu_kernel void @fadd_v2_vv(ptr addrspace(1) %a) {11; GFX900-LABEL: fadd_v2_vv:12; GFX900: ; %bb.0:13; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2414; GFX900-NEXT: v_lshlrev_b32_e32 v2, 3, v015; GFX900-NEXT: s_waitcnt lgkmcnt(0)16; GFX900-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]17; GFX900-NEXT: s_waitcnt vmcnt(0)18; GFX900-NEXT: v_add_f32_e32 v1, v1, v119; GFX900-NEXT: v_add_f32_e32 v0, v0, v020; GFX900-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]21; GFX900-NEXT: s_endpgm22;23; PACKED-LABEL: fadd_v2_vv:24; PACKED: ; %bb.0:25; PACKED-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2426; PACKED-NEXT: v_and_b32_e32 v0, 0x3ff, v027; PACKED-NEXT: v_lshlrev_b32_e32 v2, 3, v028; PACKED-NEXT: s_waitcnt lgkmcnt(0)29; PACKED-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]30; PACKED-NEXT: s_waitcnt vmcnt(0)31; PACKED-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[0:1]32; PACKED-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]33; PACKED-NEXT: s_endpgm34;35; GFX1250-LABEL: fadd_v2_vv:36; GFX1250: ; %bb.0:37; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 138; GFX1250-NEXT: s_load_b64 s[0:1], s[4:5], 0x2439; GFX1250-NEXT: v_and_b32_e32 v2, 0x3ff, v040; GFX1250-NEXT: s_wait_kmcnt 0x041; GFX1250-NEXT: global_load_b64 v[0:1], v2, s[0:1] scale_offset42; GFX1250-NEXT: s_wait_loadcnt 0x043; GFX1250-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[0:1]44; GFX1250-NEXT: global_store_b64 v2, v[0:1], s[0:1] scale_offset45; GFX1250-NEXT: s_endpgm46 %id = tail call i32 @llvm.amdgcn.workitem.id.x()47 %gep = getelementptr inbounds <2 x float>, ptr addrspace(1) %a, i32 %id48 %load = load <2 x float>, ptr addrspace(1) %gep, align 849 %add = fadd <2 x float> %load, %load50 store <2 x float> %add, ptr addrspace(1) %gep, align 851 ret void52}53 54define amdgpu_kernel void @fadd_v2_vs(ptr addrspace(1) %a, <2 x float> %x) {55; GFX900-LABEL: fadd_v2_vs:56; GFX900: ; %bb.0:57; GFX900-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2458; GFX900-NEXT: v_lshlrev_b32_e32 v2, 3, v059; GFX900-NEXT: s_waitcnt lgkmcnt(0)60; GFX900-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]61; GFX900-NEXT: s_waitcnt vmcnt(0)62; GFX900-NEXT: v_add_f32_e32 v1, s3, v163; GFX900-NEXT: v_add_f32_e32 v0, s2, v064; GFX900-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]65; GFX900-NEXT: s_endpgm66;67; PACKED-LABEL: fadd_v2_vs:68; PACKED: ; %bb.0:69; PACKED-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2470; PACKED-NEXT: v_and_b32_e32 v0, 0x3ff, v071; PACKED-NEXT: v_lshlrev_b32_e32 v2, 3, v072; PACKED-NEXT: s_waitcnt lgkmcnt(0)73; PACKED-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]74; PACKED-NEXT: s_waitcnt vmcnt(0)75; PACKED-NEXT: v_pk_add_f32 v[0:1], v[0:1], s[2:3]76; PACKED-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]77; PACKED-NEXT: s_endpgm78;79; GFX1250-LABEL: fadd_v2_vs:80; GFX1250: ; %bb.0:81; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 182; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x2483; GFX1250-NEXT: v_and_b32_e32 v4, 0x3ff, v084; GFX1250-NEXT: s_wait_kmcnt 0x085; GFX1250-NEXT: global_load_b64 v[0:1], v4, s[0:1] scale_offset86; GFX1250-NEXT: v_mov_b64_e32 v[2:3], s[2:3]87; GFX1250-NEXT: s_wait_loadcnt 0x088; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)89; GFX1250-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3]90; GFX1250-NEXT: global_store_b64 v4, v[0:1], s[0:1] scale_offset91; GFX1250-NEXT: s_endpgm92 %id = tail call i32 @llvm.amdgcn.workitem.id.x()93 %gep = getelementptr inbounds <2 x float>, ptr addrspace(1) %a, i32 %id94 %load = load <2 x float>, ptr addrspace(1) %gep, align 895 %add = fadd <2 x float> %load, %x96 store <2 x float> %add, ptr addrspace(1) %gep, align 897 ret void98}99 100define amdgpu_kernel void @fadd_v4_vs(ptr addrspace(1) %a, <4 x float> %x) {101; GFX900-LABEL: fadd_v4_vs:102; GFX900: ; %bb.0:103; GFX900-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x24104; GFX900-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34105; GFX900-NEXT: v_lshlrev_b32_e32 v4, 4, v0106; GFX900-NEXT: s_waitcnt lgkmcnt(0)107; GFX900-NEXT: global_load_dwordx4 v[0:3], v4, s[6:7]108; GFX900-NEXT: s_waitcnt vmcnt(0)109; GFX900-NEXT: v_add_f32_e32 v3, s3, v3110; GFX900-NEXT: v_add_f32_e32 v2, s2, v2111; GFX900-NEXT: v_add_f32_e32 v1, s1, v1112; GFX900-NEXT: v_add_f32_e32 v0, s0, v0113; GFX900-NEXT: global_store_dwordx4 v4, v[0:3], s[6:7]114; GFX900-NEXT: s_endpgm115;116; PACKED-SDAG-LABEL: fadd_v4_vs:117; PACKED-SDAG: ; %bb.0:118; PACKED-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x24119; PACKED-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34120; PACKED-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0121; PACKED-SDAG-NEXT: v_lshlrev_b32_e32 v4, 4, v0122; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)123; PACKED-SDAG-NEXT: global_load_dwordx4 v[0:3], v4, s[6:7]124; PACKED-SDAG-NEXT: s_waitcnt vmcnt(0)125; PACKED-SDAG-NEXT: v_pk_add_f32 v[2:3], v[2:3], s[2:3]126; PACKED-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], s[0:1]127; PACKED-SDAG-NEXT: global_store_dwordx4 v4, v[0:3], s[6:7]128; PACKED-SDAG-NEXT: s_endpgm129;130; PACKED-GISEL-LABEL: fadd_v4_vs:131; PACKED-GISEL: ; %bb.0:132; PACKED-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x24133; PACKED-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34134; PACKED-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0135; PACKED-GISEL-NEXT: v_lshlrev_b32_e32 v4, 4, v0136; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)137; PACKED-GISEL-NEXT: global_load_dwordx4 v[0:3], v4, s[6:7]138; PACKED-GISEL-NEXT: s_waitcnt vmcnt(0)139; PACKED-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], s[0:1]140; PACKED-GISEL-NEXT: v_pk_add_f32 v[2:3], v[2:3], s[2:3]141; PACKED-GISEL-NEXT: global_store_dwordx4 v4, v[0:3], s[6:7]142; PACKED-GISEL-NEXT: s_endpgm143;144; GFX1250-SDAG-LABEL: fadd_v4_vs:145; GFX1250-SDAG: ; %bb.0:146; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1147; GFX1250-SDAG-NEXT: s_clause 0x1148; GFX1250-SDAG-NEXT: s_load_b64 s[6:7], s[4:5], 0x24149; GFX1250-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x34150; GFX1250-SDAG-NEXT: v_and_b32_e32 v8, 0x3ff, v0151; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0152; GFX1250-SDAG-NEXT: global_load_b128 v[0:3], v8, s[6:7] scale_offset153; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[0:1]154; GFX1250-SDAG-NEXT: v_dual_mov_b32 v4, s2 :: v_dual_mov_b32 v5, s3155; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x0156; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)157; GFX1250-SDAG-NEXT: v_pk_add_f32 v[2:3], v[2:3], v[4:5]158; GFX1250-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[6:7]159; GFX1250-SDAG-NEXT: global_store_b128 v8, v[0:3], s[6:7] scale_offset160; GFX1250-SDAG-NEXT: s_endpgm161;162; GFX1250-GISEL-LABEL: fadd_v4_vs:163; GFX1250-GISEL: ; %bb.0:164; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1165; GFX1250-GISEL-NEXT: s_clause 0x1166; GFX1250-GISEL-NEXT: s_load_b64 s[6:7], s[4:5], 0x24167; GFX1250-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x34168; GFX1250-GISEL-NEXT: v_and_b32_e32 v8, 0x3ff, v0169; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0170; GFX1250-GISEL-NEXT: global_load_b128 v[0:3], v8, s[6:7] scale_offset171; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[4:5], s[0:1]172; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[6:7], s[2:3]173; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x0174; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)175; GFX1250-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[4:5]176; GFX1250-GISEL-NEXT: v_pk_add_f32 v[2:3], v[2:3], v[6:7]177; GFX1250-GISEL-NEXT: global_store_b128 v8, v[0:3], s[6:7] scale_offset178; GFX1250-GISEL-NEXT: s_endpgm179 %id = tail call i32 @llvm.amdgcn.workitem.id.x()180 %gep = getelementptr inbounds <4 x float>, ptr addrspace(1) %a, i32 %id181 %load = load <4 x float>, ptr addrspace(1) %gep, align 16182 %add = fadd <4 x float> %load, %x183 store <4 x float> %add, ptr addrspace(1) %gep, align 16184 ret void185}186 187define amdgpu_kernel void @fadd_v32_vs(ptr addrspace(1) %a, <32 x float> %x) {188; GFX900-LABEL: fadd_v32_vs:189; GFX900: ; %bb.0:190; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24191; GFX900-NEXT: v_lshlrev_b32_e32 v0, 7, v0192; GFX900-NEXT: s_load_dwordx16 s[36:51], s[4:5], 0xa4193; GFX900-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0xe4194; GFX900-NEXT: s_waitcnt lgkmcnt(0)195; GFX900-NEXT: global_load_dwordx4 v[25:28], v0, s[0:1] offset:112196; GFX900-NEXT: global_load_dwordx4 v[29:32], v0, s[0:1] offset:96197; GFX900-NEXT: global_load_dwordx4 v[1:4], v0, s[0:1] offset:16198; GFX900-NEXT: global_load_dwordx4 v[5:8], v0, s[0:1]199; GFX900-NEXT: global_load_dwordx4 v[9:12], v0, s[0:1] offset:48200; GFX900-NEXT: global_load_dwordx4 v[13:16], v0, s[0:1] offset:32201; GFX900-NEXT: global_load_dwordx4 v[17:20], v0, s[0:1] offset:80202; GFX900-NEXT: global_load_dwordx4 v[21:24], v0, s[0:1] offset:64203; GFX900-NEXT: s_waitcnt vmcnt(5)204; GFX900-NEXT: v_add_f32_e32 v4, s43, v4205; GFX900-NEXT: v_add_f32_e32 v3, s42, v3206; GFX900-NEXT: v_add_f32_e32 v2, s41, v2207; GFX900-NEXT: v_add_f32_e32 v1, s40, v1208; GFX900-NEXT: v_add_f32_e32 v32, s19, v32209; GFX900-NEXT: v_add_f32_e32 v31, s18, v31210; GFX900-NEXT: v_add_f32_e32 v30, s17, v30211; GFX900-NEXT: v_add_f32_e32 v29, s16, v29212; GFX900-NEXT: s_waitcnt vmcnt(4)213; GFX900-NEXT: v_add_f32_e32 v8, s39, v8214; GFX900-NEXT: v_add_f32_e32 v7, s38, v7215; GFX900-NEXT: v_add_f32_e32 v6, s37, v6216; GFX900-NEXT: v_add_f32_e32 v5, s36, v5217; GFX900-NEXT: s_waitcnt vmcnt(3)218; GFX900-NEXT: v_add_f32_e32 v12, s51, v12219; GFX900-NEXT: v_add_f32_e32 v11, s50, v11220; GFX900-NEXT: v_add_f32_e32 v10, s49, v10221; GFX900-NEXT: v_add_f32_e32 v9, s48, v9222; GFX900-NEXT: s_waitcnt vmcnt(2)223; GFX900-NEXT: v_add_f32_e32 v16, s47, v16224; GFX900-NEXT: v_add_f32_e32 v15, s46, v15225; GFX900-NEXT: v_add_f32_e32 v14, s45, v14226; GFX900-NEXT: v_add_f32_e32 v13, s44, v13227; GFX900-NEXT: s_waitcnt vmcnt(1)228; GFX900-NEXT: v_add_f32_e32 v20, s15, v20229; GFX900-NEXT: v_add_f32_e32 v19, s14, v19230; GFX900-NEXT: v_add_f32_e32 v18, s13, v18231; GFX900-NEXT: v_add_f32_e32 v17, s12, v17232; GFX900-NEXT: s_waitcnt vmcnt(0)233; GFX900-NEXT: v_add_f32_e32 v24, s11, v24234; GFX900-NEXT: v_add_f32_e32 v23, s10, v23235; GFX900-NEXT: v_add_f32_e32 v22, s9, v22236; GFX900-NEXT: v_add_f32_e32 v21, s8, v21237; GFX900-NEXT: v_add_f32_e32 v28, s23, v28238; GFX900-NEXT: v_add_f32_e32 v27, s22, v27239; GFX900-NEXT: v_add_f32_e32 v26, s21, v26240; GFX900-NEXT: v_add_f32_e32 v25, s20, v25241; GFX900-NEXT: global_store_dwordx4 v0, v[29:32], s[0:1] offset:96242; GFX900-NEXT: global_store_dwordx4 v0, v[25:28], s[0:1] offset:112243; GFX900-NEXT: global_store_dwordx4 v0, v[21:24], s[0:1] offset:64244; GFX900-NEXT: global_store_dwordx4 v0, v[17:20], s[0:1] offset:80245; GFX900-NEXT: global_store_dwordx4 v0, v[13:16], s[0:1] offset:32246; GFX900-NEXT: global_store_dwordx4 v0, v[9:12], s[0:1] offset:48247; GFX900-NEXT: global_store_dwordx4 v0, v[5:8], s[0:1]248; GFX900-NEXT: global_store_dwordx4 v0, v[1:4], s[0:1] offset:16249; GFX900-NEXT: s_endpgm250;251; PACKED-SDAG-LABEL: fadd_v32_vs:252; PACKED-SDAG: ; %bb.0:253; PACKED-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24254; PACKED-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0255; PACKED-SDAG-NEXT: v_lshlrev_b32_e32 v32, 7, v0256; PACKED-SDAG-NEXT: s_load_dwordx16 s[36:51], s[4:5], 0xa4257; PACKED-SDAG-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0xe4258; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)259; PACKED-SDAG-NEXT: global_load_dwordx4 v[0:3], v32, s[0:1] offset:16260; PACKED-SDAG-NEXT: global_load_dwordx4 v[4:7], v32, s[0:1]261; PACKED-SDAG-NEXT: global_load_dwordx4 v[8:11], v32, s[0:1] offset:48262; PACKED-SDAG-NEXT: global_load_dwordx4 v[16:19], v32, s[0:1] offset:32263; PACKED-SDAG-NEXT: global_load_dwordx4 v[20:23], v32, s[0:1] offset:80264; PACKED-SDAG-NEXT: global_load_dwordx4 v[12:15], v32, s[0:1] offset:64265; PACKED-SDAG-NEXT: global_load_dwordx4 v[24:27], v32, s[0:1] offset:112266; PACKED-SDAG-NEXT: global_load_dwordx4 v[28:31], v32, s[0:1] offset:96267; PACKED-SDAG-NEXT: s_waitcnt vmcnt(7)268; PACKED-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], s[40:41]269; PACKED-SDAG-NEXT: v_pk_add_f32 v[2:3], v[2:3], s[42:43]270; PACKED-SDAG-NEXT: s_waitcnt vmcnt(6)271; PACKED-SDAG-NEXT: v_pk_add_f32 v[6:7], v[6:7], s[38:39]272; PACKED-SDAG-NEXT: s_waitcnt vmcnt(5)273; PACKED-SDAG-NEXT: v_pk_add_f32 v[8:9], v[8:9], s[48:49]274; PACKED-SDAG-NEXT: v_pk_add_f32 v[10:11], v[10:11], s[50:51]275; PACKED-SDAG-NEXT: s_waitcnt vmcnt(4)276; PACKED-SDAG-NEXT: v_pk_add_f32 v[16:17], v[16:17], s[44:45]277; PACKED-SDAG-NEXT: v_pk_add_f32 v[18:19], v[18:19], s[46:47]278; PACKED-SDAG-NEXT: s_waitcnt vmcnt(0)279; PACKED-SDAG-NEXT: v_pk_add_f32 v[28:29], v[28:29], s[16:17]280; PACKED-SDAG-NEXT: v_pk_add_f32 v[30:31], v[30:31], s[18:19]281; PACKED-SDAG-NEXT: v_pk_add_f32 v[20:21], v[20:21], s[12:13]282; PACKED-SDAG-NEXT: v_pk_add_f32 v[22:23], v[22:23], s[14:15]283; PACKED-SDAG-NEXT: v_pk_add_f32 v[14:15], v[14:15], s[10:11]284; PACKED-SDAG-NEXT: v_pk_add_f32 v[24:25], v[24:25], s[20:21]285; PACKED-SDAG-NEXT: v_pk_add_f32 v[26:27], v[26:27], s[22:23]286; PACKED-SDAG-NEXT: v_pk_add_f32 v[4:5], v[4:5], s[36:37]287; PACKED-SDAG-NEXT: v_pk_add_f32 v[12:13], v[12:13], s[8:9]288; PACKED-SDAG-NEXT: global_store_dwordx4 v32, v[28:31], s[0:1] offset:96289; PACKED-SDAG-NEXT: global_store_dwordx4 v32, v[24:27], s[0:1] offset:112290; PACKED-SDAG-NEXT: global_store_dwordx4 v32, v[12:15], s[0:1] offset:64291; PACKED-SDAG-NEXT: global_store_dwordx4 v32, v[20:23], s[0:1] offset:80292; PACKED-SDAG-NEXT: global_store_dwordx4 v32, v[16:19], s[0:1] offset:32293; PACKED-SDAG-NEXT: global_store_dwordx4 v32, v[8:11], s[0:1] offset:48294; PACKED-SDAG-NEXT: global_store_dwordx4 v32, v[4:7], s[0:1]295; PACKED-SDAG-NEXT: global_store_dwordx4 v32, v[0:3], s[0:1] offset:16296; PACKED-SDAG-NEXT: s_endpgm297;298; PACKED-GISEL-LABEL: fadd_v32_vs:299; PACKED-GISEL: ; %bb.0:300; PACKED-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24301; PACKED-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0302; PACKED-GISEL-NEXT: v_lshlrev_b32_e32 v32, 7, v0303; PACKED-GISEL-NEXT: s_load_dwordx16 s[36:51], s[4:5], 0xa4304; PACKED-GISEL-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0xe4305; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)306; PACKED-GISEL-NEXT: global_load_dwordx4 v[0:3], v32, s[0:1]307; PACKED-GISEL-NEXT: global_load_dwordx4 v[4:7], v32, s[0:1] offset:16308; PACKED-GISEL-NEXT: global_load_dwordx4 v[8:11], v32, s[0:1] offset:32309; PACKED-GISEL-NEXT: global_load_dwordx4 v[12:15], v32, s[0:1] offset:48310; PACKED-GISEL-NEXT: global_load_dwordx4 v[16:19], v32, s[0:1] offset:64311; PACKED-GISEL-NEXT: global_load_dwordx4 v[20:23], v32, s[0:1] offset:80312; PACKED-GISEL-NEXT: global_load_dwordx4 v[24:27], v32, s[0:1] offset:96313; PACKED-GISEL-NEXT: global_load_dwordx4 v[28:31], v32, s[0:1] offset:112314; PACKED-GISEL-NEXT: s_waitcnt vmcnt(7)315; PACKED-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], s[36:37]316; PACKED-GISEL-NEXT: v_pk_add_f32 v[2:3], v[2:3], s[38:39]317; PACKED-GISEL-NEXT: s_waitcnt vmcnt(6)318; PACKED-GISEL-NEXT: v_pk_add_f32 v[4:5], v[4:5], s[40:41]319; PACKED-GISEL-NEXT: v_pk_add_f32 v[6:7], v[6:7], s[42:43]320; PACKED-GISEL-NEXT: s_waitcnt vmcnt(5)321; PACKED-GISEL-NEXT: v_pk_add_f32 v[8:9], v[8:9], s[44:45]322; PACKED-GISEL-NEXT: v_pk_add_f32 v[10:11], v[10:11], s[46:47]323; PACKED-GISEL-NEXT: s_waitcnt vmcnt(4)324; PACKED-GISEL-NEXT: v_pk_add_f32 v[12:13], v[12:13], s[48:49]325; PACKED-GISEL-NEXT: v_pk_add_f32 v[14:15], v[14:15], s[50:51]326; PACKED-GISEL-NEXT: s_waitcnt vmcnt(3)327; PACKED-GISEL-NEXT: v_pk_add_f32 v[16:17], v[16:17], s[8:9]328; PACKED-GISEL-NEXT: v_pk_add_f32 v[18:19], v[18:19], s[10:11]329; PACKED-GISEL-NEXT: s_waitcnt vmcnt(2)330; PACKED-GISEL-NEXT: v_pk_add_f32 v[20:21], v[20:21], s[12:13]331; PACKED-GISEL-NEXT: v_pk_add_f32 v[22:23], v[22:23], s[14:15]332; PACKED-GISEL-NEXT: s_waitcnt vmcnt(1)333; PACKED-GISEL-NEXT: v_pk_add_f32 v[24:25], v[24:25], s[16:17]334; PACKED-GISEL-NEXT: v_pk_add_f32 v[26:27], v[26:27], s[18:19]335; PACKED-GISEL-NEXT: s_waitcnt vmcnt(0)336; PACKED-GISEL-NEXT: v_pk_add_f32 v[28:29], v[28:29], s[20:21]337; PACKED-GISEL-NEXT: v_pk_add_f32 v[30:31], v[30:31], s[22:23]338; PACKED-GISEL-NEXT: global_store_dwordx4 v32, v[0:3], s[0:1]339; PACKED-GISEL-NEXT: global_store_dwordx4 v32, v[4:7], s[0:1] offset:16340; PACKED-GISEL-NEXT: global_store_dwordx4 v32, v[8:11], s[0:1] offset:32341; PACKED-GISEL-NEXT: global_store_dwordx4 v32, v[12:15], s[0:1] offset:48342; PACKED-GISEL-NEXT: global_store_dwordx4 v32, v[16:19], s[0:1] offset:64343; PACKED-GISEL-NEXT: global_store_dwordx4 v32, v[20:23], s[0:1] offset:80344; PACKED-GISEL-NEXT: global_store_dwordx4 v32, v[24:27], s[0:1] offset:96345; PACKED-GISEL-NEXT: global_store_dwordx4 v32, v[28:31], s[0:1] offset:112346; PACKED-GISEL-NEXT: s_endpgm347;348; GFX1250-SDAG-LABEL: fadd_v32_vs:349; GFX1250-SDAG: ; %bb.0:350; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1351; GFX1250-SDAG-NEXT: s_clause 0x2352; GFX1250-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24353; GFX1250-SDAG-NEXT: s_load_b512 s[36:51], s[4:5], 0xa4354; GFX1250-SDAG-NEXT: s_load_b512 s[8:23], s[4:5], 0xe4355; GFX1250-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0356; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0357; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)358; GFX1250-SDAG-NEXT: v_dual_lshlrev_b32 v56, 7, v0 :: v_dual_mov_b32 v32, s40359; GFX1250-SDAG-NEXT: s_clause 0x7360; GFX1250-SDAG-NEXT: global_load_b128 v[0:3], v56, s[0:1] offset:16361; GFX1250-SDAG-NEXT: global_load_b128 v[4:7], v56, s[0:1] offset:48362; GFX1250-SDAG-NEXT: global_load_b128 v[8:11], v56, s[0:1] offset:32363; GFX1250-SDAG-NEXT: global_load_b128 v[12:15], v56, s[0:1]364; GFX1250-SDAG-NEXT: global_load_b128 v[16:19], v56, s[0:1] offset:80365; GFX1250-SDAG-NEXT: global_load_b128 v[20:23], v56, s[0:1] offset:96366; GFX1250-SDAG-NEXT: global_load_b128 v[24:27], v56, s[0:1] offset:64367; GFX1250-SDAG-NEXT: global_load_b128 v[28:31], v56, s[0:1] offset:112368; GFX1250-SDAG-NEXT: v_dual_mov_b32 v33, s41 :: v_dual_mov_b32 v34, s42369; GFX1250-SDAG-NEXT: v_dual_mov_b32 v35, s43 :: v_dual_mov_b32 v36, s38370; GFX1250-SDAG-NEXT: v_dual_mov_b32 v39, s49 :: v_dual_mov_b32 v40, s50371; GFX1250-SDAG-NEXT: v_dual_mov_b32 v41, s51 :: v_dual_mov_b32 v42, s44372; GFX1250-SDAG-NEXT: v_dual_mov_b32 v37, s39 :: v_dual_mov_b32 v38, s48373; GFX1250-SDAG-NEXT: v_dual_mov_b32 v55, s23 :: v_dual_mov_b32 v51, s11374; GFX1250-SDAG-NEXT: v_dual_mov_b32 v52, s20 :: v_dual_mov_b32 v53, s21375; GFX1250-SDAG-NEXT: v_dual_mov_b32 v54, s22 :: v_dual_mov_b32 v49, s15376; GFX1250-SDAG-NEXT: v_dual_mov_b32 v50, s10 :: v_dual_mov_b32 v45, s47377; GFX1250-SDAG-NEXT: v_dual_mov_b32 v46, s12 :: v_dual_mov_b32 v47, s13378; GFX1250-SDAG-NEXT: v_dual_mov_b32 v48, s14 :: v_dual_mov_b32 v43, s45379; GFX1250-SDAG-NEXT: v_mov_b32_e32 v44, s46380; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x7381; GFX1250-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[32:33]382; GFX1250-SDAG-NEXT: v_pk_add_f32 v[2:3], v[2:3], v[34:35]383; GFX1250-SDAG-NEXT: v_dual_mov_b32 v32, s16 :: v_dual_mov_b32 v33, s17384; GFX1250-SDAG-NEXT: v_dual_mov_b32 v34, s18 :: v_dual_mov_b32 v35, s19385; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x6386; GFX1250-SDAG-NEXT: v_pk_add_f32 v[6:7], v[6:7], v[40:41]387; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[40:41], s[8:9]388; GFX1250-SDAG-NEXT: v_pk_add_f32 v[4:5], v[4:5], v[38:39]389; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[38:39], s[36:37]390; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x2391; GFX1250-SDAG-NEXT: v_pk_add_f32 v[20:21], v[20:21], v[32:33]392; GFX1250-SDAG-NEXT: v_pk_add_f32 v[22:23], v[22:23], v[34:35]393; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x0394; GFX1250-SDAG-NEXT: v_pk_add_f32 v[28:29], v[28:29], v[52:53]395; GFX1250-SDAG-NEXT: v_pk_add_f32 v[30:31], v[30:31], v[54:55]396; GFX1250-SDAG-NEXT: v_pk_add_f32 v[26:27], v[26:27], v[50:51]397; GFX1250-SDAG-NEXT: v_pk_add_f32 v[24:25], v[24:25], v[40:41]398; GFX1250-SDAG-NEXT: v_pk_add_f32 v[16:17], v[16:17], v[46:47]399; GFX1250-SDAG-NEXT: v_pk_add_f32 v[18:19], v[18:19], v[48:49]400; GFX1250-SDAG-NEXT: v_pk_add_f32 v[8:9], v[8:9], v[42:43]401; GFX1250-SDAG-NEXT: v_pk_add_f32 v[10:11], v[10:11], v[44:45]402; GFX1250-SDAG-NEXT: v_pk_add_f32 v[14:15], v[14:15], v[36:37]403; GFX1250-SDAG-NEXT: v_pk_add_f32 v[12:13], v[12:13], v[38:39]404; GFX1250-SDAG-NEXT: s_clause 0x7405; GFX1250-SDAG-NEXT: global_store_b128 v56, v[20:23], s[0:1] offset:96406; GFX1250-SDAG-NEXT: global_store_b128 v56, v[28:31], s[0:1] offset:112407; GFX1250-SDAG-NEXT: global_store_b128 v56, v[24:27], s[0:1] offset:64408; GFX1250-SDAG-NEXT: global_store_b128 v56, v[16:19], s[0:1] offset:80409; GFX1250-SDAG-NEXT: global_store_b128 v56, v[8:11], s[0:1] offset:32410; GFX1250-SDAG-NEXT: global_store_b128 v56, v[4:7], s[0:1] offset:48411; GFX1250-SDAG-NEXT: global_store_b128 v56, v[12:15], s[0:1]412; GFX1250-SDAG-NEXT: global_store_b128 v56, v[0:3], s[0:1] offset:16413; GFX1250-SDAG-NEXT: s_endpgm414;415; GFX1250-GISEL-LABEL: fadd_v32_vs:416; GFX1250-GISEL: ; %bb.0:417; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1418; GFX1250-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24419; GFX1250-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0420; GFX1250-GISEL-NEXT: s_clause 0x1421; GFX1250-GISEL-NEXT: s_load_b512 s[36:51], s[4:5], 0xa4422; GFX1250-GISEL-NEXT: s_load_b512 s[8:23], s[4:5], 0xe4423; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)424; GFX1250-GISEL-NEXT: v_lshlrev_b32_e32 v56, 7, v0425; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0426; GFX1250-GISEL-NEXT: s_clause 0x7427; GFX1250-GISEL-NEXT: global_load_b128 v[0:3], v56, s[0:1]428; GFX1250-GISEL-NEXT: global_load_b128 v[4:7], v56, s[0:1] offset:16429; GFX1250-GISEL-NEXT: global_load_b128 v[8:11], v56, s[0:1] offset:32430; GFX1250-GISEL-NEXT: global_load_b128 v[12:15], v56, s[0:1] offset:48431; GFX1250-GISEL-NEXT: global_load_b128 v[16:19], v56, s[0:1] offset:64432; GFX1250-GISEL-NEXT: global_load_b128 v[20:23], v56, s[0:1] offset:80433; GFX1250-GISEL-NEXT: global_load_b128 v[24:27], v56, s[0:1] offset:96434; GFX1250-GISEL-NEXT: global_load_b128 v[28:31], v56, s[0:1] offset:112435; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[32:33], s[36:37]436; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[34:35], s[38:39]437; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[36:37], s[40:41]438; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[38:39], s[42:43]439; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[40:41], s[44:45]440; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[42:43], s[46:47]441; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[44:45], s[48:49]442; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[46:47], s[50:51]443; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[48:49], s[8:9]444; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[50:51], s[10:11]445; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[52:53], s[12:13]446; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[54:55], s[14:15]447; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x7448; GFX1250-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[32:33]449; GFX1250-GISEL-NEXT: v_pk_add_f32 v[2:3], v[2:3], v[34:35]450; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[32:33], s[16:17]451; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[34:35], s[18:19]452; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x6453; GFX1250-GISEL-NEXT: v_pk_add_f32 v[4:5], v[4:5], v[36:37]454; GFX1250-GISEL-NEXT: v_pk_add_f32 v[6:7], v[6:7], v[38:39]455; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[36:37], s[20:21]456; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[38:39], s[22:23]457; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x5458; GFX1250-GISEL-NEXT: v_pk_add_f32 v[8:9], v[8:9], v[40:41]459; GFX1250-GISEL-NEXT: v_pk_add_f32 v[10:11], v[10:11], v[42:43]460; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x4461; GFX1250-GISEL-NEXT: v_pk_add_f32 v[12:13], v[12:13], v[44:45]462; GFX1250-GISEL-NEXT: v_pk_add_f32 v[14:15], v[14:15], v[46:47]463; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x3464; GFX1250-GISEL-NEXT: v_pk_add_f32 v[16:17], v[16:17], v[48:49]465; GFX1250-GISEL-NEXT: v_pk_add_f32 v[18:19], v[18:19], v[50:51]466; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x2467; GFX1250-GISEL-NEXT: v_pk_add_f32 v[20:21], v[20:21], v[52:53]468; GFX1250-GISEL-NEXT: v_pk_add_f32 v[22:23], v[22:23], v[54:55]469; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x1470; GFX1250-GISEL-NEXT: v_pk_add_f32 v[24:25], v[24:25], v[32:33]471; GFX1250-GISEL-NEXT: v_pk_add_f32 v[26:27], v[26:27], v[34:35]472; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x0473; GFX1250-GISEL-NEXT: v_pk_add_f32 v[28:29], v[28:29], v[36:37]474; GFX1250-GISEL-NEXT: v_pk_add_f32 v[30:31], v[30:31], v[38:39]475; GFX1250-GISEL-NEXT: s_clause 0x7476; GFX1250-GISEL-NEXT: global_store_b128 v56, v[0:3], s[0:1]477; GFX1250-GISEL-NEXT: global_store_b128 v56, v[4:7], s[0:1] offset:16478; GFX1250-GISEL-NEXT: global_store_b128 v56, v[8:11], s[0:1] offset:32479; GFX1250-GISEL-NEXT: global_store_b128 v56, v[12:15], s[0:1] offset:48480; GFX1250-GISEL-NEXT: global_store_b128 v56, v[16:19], s[0:1] offset:64481; GFX1250-GISEL-NEXT: global_store_b128 v56, v[20:23], s[0:1] offset:80482; GFX1250-GISEL-NEXT: global_store_b128 v56, v[24:27], s[0:1] offset:96483; GFX1250-GISEL-NEXT: global_store_b128 v56, v[28:31], s[0:1] offset:112484; GFX1250-GISEL-NEXT: s_endpgm485 %id = tail call i32 @llvm.amdgcn.workitem.id.x()486 %gep = getelementptr inbounds <32 x float>, ptr addrspace(1) %a, i32 %id487 %load = load <32 x float>, ptr addrspace(1) %gep, align 128488 %add = fadd <32 x float> %load, %x489 store <32 x float> %add, ptr addrspace(1) %gep, align 128490 ret void491}492 493; FIXME: GISel does not use op_sel for splat constants.494define amdgpu_kernel void @fadd_v2_v_imm(ptr addrspace(1) %a) {495; GFX900-LABEL: fadd_v2_v_imm:496; GFX900: ; %bb.0:497; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24498; GFX900-NEXT: v_lshlrev_b32_e32 v2, 3, v0499; GFX900-NEXT: s_waitcnt lgkmcnt(0)500; GFX900-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]501; GFX900-NEXT: s_waitcnt vmcnt(0)502; GFX900-NEXT: v_add_f32_e32 v1, 0x42c80000, v1503; GFX900-NEXT: v_add_f32_e32 v0, 0x42c80000, v0504; GFX900-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]505; GFX900-NEXT: s_endpgm506;507; PACKED-SDAG-LABEL: fadd_v2_v_imm:508; PACKED-SDAG: ; %bb.0:509; PACKED-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24510; PACKED-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0511; PACKED-SDAG-NEXT: v_lshlrev_b32_e32 v2, 3, v0512; PACKED-SDAG-NEXT: s_mov_b32 s2, 0x42c80000513; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)514; PACKED-SDAG-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]515; PACKED-SDAG-NEXT: s_waitcnt vmcnt(0)516; PACKED-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], s[2:3] op_sel_hi:[1,0]517; PACKED-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]518; PACKED-SDAG-NEXT: s_endpgm519;520; PACKED-GISEL-LABEL: fadd_v2_v_imm:521; PACKED-GISEL: ; %bb.0:522; PACKED-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24523; PACKED-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0524; PACKED-GISEL-NEXT: v_lshlrev_b32_e32 v2, 3, v0525; PACKED-GISEL-NEXT: s_mov_b32 s2, 0x42c80000526; PACKED-GISEL-NEXT: s_mov_b32 s3, s2527; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)528; PACKED-GISEL-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]529; PACKED-GISEL-NEXT: s_waitcnt vmcnt(0)530; PACKED-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], s[2:3]531; PACKED-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]532; PACKED-GISEL-NEXT: s_endpgm533;534; GFX1250-SDAG-LABEL: fadd_v2_v_imm:535; GFX1250-SDAG: ; %bb.0:536; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1537; GFX1250-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24538; GFX1250-SDAG-NEXT: v_and_b32_e32 v2, 0x3ff, v0539; GFX1250-SDAG-NEXT: s_mov_b32 s2, 0x42c80000540; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0541; GFX1250-SDAG-NEXT: global_load_b64 v[0:1], v2, s[0:1] scale_offset542; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x0543; GFX1250-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], s[2:3] op_sel_hi:[1,0]544; GFX1250-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1] scale_offset545; GFX1250-SDAG-NEXT: s_endpgm546;547; GFX1250-GISEL-LABEL: fadd_v2_v_imm:548; GFX1250-GISEL: ; %bb.0:549; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1550; GFX1250-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24551; GFX1250-GISEL-NEXT: v_and_b32_e32 v4, 0x3ff, v0552; GFX1250-GISEL-NEXT: s_mov_b32 s2, 0x42c80000553; GFX1250-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)554; GFX1250-GISEL-NEXT: s_mov_b32 s3, s2555; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[2:3]556; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0557; GFX1250-GISEL-NEXT: global_load_b64 v[0:1], v4, s[0:1] scale_offset558; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x0559; GFX1250-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3]560; GFX1250-GISEL-NEXT: global_store_b64 v4, v[0:1], s[0:1] scale_offset561; GFX1250-GISEL-NEXT: s_endpgm562 %id = tail call i32 @llvm.amdgcn.workitem.id.x()563 %gep = getelementptr inbounds <2 x float>, ptr addrspace(1) %a, i32 %id564 %load = load <2 x float>, ptr addrspace(1) %gep, align 8565 %add = fadd <2 x float> %load, <float 100.0, float 100.0>566 store <2 x float> %add, ptr addrspace(1) %gep, align 8567 ret void568}569 570define amdgpu_kernel void @fadd_v2_v_v_splat(ptr addrspace(1) %a) {571; GFX900-LABEL: fadd_v2_v_v_splat:572; GFX900: ; %bb.0:573; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24574; GFX900-NEXT: v_lshlrev_b32_e32 v3, 3, v0575; GFX900-NEXT: s_waitcnt lgkmcnt(0)576; GFX900-NEXT: global_load_dwordx2 v[1:2], v3, s[0:1]577; GFX900-NEXT: s_waitcnt vmcnt(0)578; GFX900-NEXT: v_add_f32_e32 v2, v2, v0579; GFX900-NEXT: v_add_f32_e32 v1, v1, v0580; GFX900-NEXT: global_store_dwordx2 v3, v[1:2], s[0:1]581; GFX900-NEXT: s_endpgm582;583; PACKED-SDAG-LABEL: fadd_v2_v_v_splat:584; PACKED-SDAG: ; %bb.0:585; PACKED-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24586; PACKED-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0587; PACKED-SDAG-NEXT: v_lshlrev_b32_e32 v4, 3, v0588; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)589; PACKED-SDAG-NEXT: global_load_dwordx2 v[2:3], v4, s[0:1]590; PACKED-SDAG-NEXT: s_waitcnt vmcnt(0)591; PACKED-SDAG-NEXT: v_pk_add_f32 v[0:1], v[2:3], v[0:1] op_sel_hi:[1,0]592; PACKED-SDAG-NEXT: global_store_dwordx2 v4, v[0:1], s[0:1]593; PACKED-SDAG-NEXT: s_endpgm594;595; PACKED-GISEL-LABEL: fadd_v2_v_v_splat:596; PACKED-GISEL: ; %bb.0:597; PACKED-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24598; PACKED-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0599; PACKED-GISEL-NEXT: v_lshlrev_b32_e32 v4, 3, v0600; PACKED-GISEL-NEXT: v_mov_b32_e32 v1, v0601; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)602; PACKED-GISEL-NEXT: global_load_dwordx2 v[2:3], v4, s[0:1]603; PACKED-GISEL-NEXT: s_waitcnt vmcnt(0)604; PACKED-GISEL-NEXT: v_pk_add_f32 v[0:1], v[2:3], v[0:1]605; PACKED-GISEL-NEXT: global_store_dwordx2 v4, v[0:1], s[0:1]606; PACKED-GISEL-NEXT: s_endpgm607;608; GFX1250-SDAG-LABEL: fadd_v2_v_v_splat:609; GFX1250-SDAG: ; %bb.0:610; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1611; GFX1250-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24612; GFX1250-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0613; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0614; GFX1250-SDAG-NEXT: global_load_b64 v[2:3], v0, s[0:1] scale_offset615; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x0616; GFX1250-SDAG-NEXT: v_pk_add_f32 v[2:3], v[2:3], v[0:1] op_sel_hi:[1,0]617; GFX1250-SDAG-NEXT: global_store_b64 v0, v[2:3], s[0:1] scale_offset618; GFX1250-SDAG-NEXT: s_endpgm619;620; GFX1250-GISEL-LABEL: fadd_v2_v_v_splat:621; GFX1250-GISEL: ; %bb.0:622; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1623; GFX1250-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24624; GFX1250-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0625; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)626; GFX1250-GISEL-NEXT: v_mov_b32_e32 v1, v0627; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0628; GFX1250-GISEL-NEXT: global_load_b64 v[2:3], v0, s[0:1] scale_offset629; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x0630; GFX1250-GISEL-NEXT: v_pk_add_f32 v[2:3], v[2:3], v[0:1]631; GFX1250-GISEL-NEXT: global_store_b64 v0, v[2:3], s[0:1] scale_offset632; GFX1250-GISEL-NEXT: s_endpgm633 %id = tail call i32 @llvm.amdgcn.workitem.id.x()634 %gep = getelementptr inbounds <2 x float>, ptr addrspace(1) %a, i32 %id635 %load = load <2 x float>, ptr addrspace(1) %gep, align 8636 %fid = bitcast i32 %id to float637 %tmp1 = insertelement <2 x float> poison, float %fid, i64 0638 %k = insertelement <2 x float> %tmp1, float %fid, i64 1639 %add = fadd <2 x float> %load, %k640 store <2 x float> %add, ptr addrspace(1) %gep, align 8641 ret void642}643 644define amdgpu_kernel void @fadd_v2_v_lit_splat(ptr addrspace(1) %a) {645; GFX900-LABEL: fadd_v2_v_lit_splat:646; GFX900: ; %bb.0:647; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24648; GFX900-NEXT: v_lshlrev_b32_e32 v2, 3, v0649; GFX900-NEXT: s_waitcnt lgkmcnt(0)650; GFX900-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]651; GFX900-NEXT: s_waitcnt vmcnt(0)652; GFX900-NEXT: v_add_f32_e32 v1, 1.0, v1653; GFX900-NEXT: v_add_f32_e32 v0, 1.0, v0654; GFX900-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]655; GFX900-NEXT: s_endpgm656;657; PACKED-SDAG-LABEL: fadd_v2_v_lit_splat:658; PACKED-SDAG: ; %bb.0:659; PACKED-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24660; PACKED-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0661; PACKED-SDAG-NEXT: v_lshlrev_b32_e32 v2, 3, v0662; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)663; PACKED-SDAG-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]664; PACKED-SDAG-NEXT: s_waitcnt vmcnt(0)665; PACKED-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], 1.0 op_sel_hi:[1,0]666; PACKED-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]667; PACKED-SDAG-NEXT: s_endpgm668;669; PACKED-GISEL-LABEL: fadd_v2_v_lit_splat:670; PACKED-GISEL: ; %bb.0:671; PACKED-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24672; PACKED-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0673; PACKED-GISEL-NEXT: v_lshlrev_b32_e32 v2, 3, v0674; PACKED-GISEL-NEXT: s_mov_b32 s2, 1.0675; PACKED-GISEL-NEXT: s_mov_b32 s3, s2676; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)677; PACKED-GISEL-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]678; PACKED-GISEL-NEXT: s_waitcnt vmcnt(0)679; PACKED-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], s[2:3]680; PACKED-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]681; PACKED-GISEL-NEXT: s_endpgm682;683; GFX1250-SDAG-LABEL: fadd_v2_v_lit_splat:684; GFX1250-SDAG: ; %bb.0:685; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1686; GFX1250-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24687; GFX1250-SDAG-NEXT: v_and_b32_e32 v2, 0x3ff, v0688; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0689; GFX1250-SDAG-NEXT: global_load_b64 v[0:1], v2, s[0:1] scale_offset690; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x0691; GFX1250-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], 1.0 op_sel_hi:[1,0]692; GFX1250-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1] scale_offset693; GFX1250-SDAG-NEXT: s_endpgm694;695; GFX1250-GISEL-LABEL: fadd_v2_v_lit_splat:696; GFX1250-GISEL: ; %bb.0:697; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1698; GFX1250-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24699; GFX1250-GISEL-NEXT: v_and_b32_e32 v4, 0x3ff, v0700; GFX1250-GISEL-NEXT: s_mov_b32 s2, 1.0701; GFX1250-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)702; GFX1250-GISEL-NEXT: s_mov_b32 s3, s2703; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[2:3]704; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0705; GFX1250-GISEL-NEXT: global_load_b64 v[0:1], v4, s[0:1] scale_offset706; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x0707; GFX1250-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3]708; GFX1250-GISEL-NEXT: global_store_b64 v4, v[0:1], s[0:1] scale_offset709; GFX1250-GISEL-NEXT: s_endpgm710 %id = tail call i32 @llvm.amdgcn.workitem.id.x()711 %gep = getelementptr inbounds <2 x float>, ptr addrspace(1) %a, i32 %id712 %load = load <2 x float>, ptr addrspace(1) %gep, align 8713 %add = fadd <2 x float> %load, <float 1.0, float 1.0>714 store <2 x float> %add, ptr addrspace(1) %gep, align 8715 ret void716}717 718define amdgpu_kernel void @fadd_v2_v_lit_hi0(ptr addrspace(1) %a) {719; GFX900-LABEL: fadd_v2_v_lit_hi0:720; GFX900: ; %bb.0:721; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24722; GFX900-NEXT: v_lshlrev_b32_e32 v2, 3, v0723; GFX900-NEXT: s_waitcnt lgkmcnt(0)724; GFX900-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]725; GFX900-NEXT: s_waitcnt vmcnt(0)726; GFX900-NEXT: v_add_f32_e32 v1, 0, v1727; GFX900-NEXT: v_add_f32_e32 v0, 1.0, v0728; GFX900-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]729; GFX900-NEXT: s_endpgm730;731; PACKED-LABEL: fadd_v2_v_lit_hi0:732; PACKED: ; %bb.0:733; PACKED-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24734; PACKED-NEXT: v_and_b32_e32 v0, 0x3ff, v0735; PACKED-NEXT: v_lshlrev_b32_e32 v2, 3, v0736; PACKED-NEXT: s_mov_b64 s[2:3], 0x3f800000737; PACKED-NEXT: s_waitcnt lgkmcnt(0)738; PACKED-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]739; PACKED-NEXT: s_waitcnt vmcnt(0)740; PACKED-NEXT: v_pk_add_f32 v[0:1], v[0:1], s[2:3]741; PACKED-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]742; PACKED-NEXT: s_endpgm743;744; GFX1250-SDAG-LABEL: fadd_v2_v_lit_hi0:745; GFX1250-SDAG: ; %bb.0:746; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1747; GFX1250-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24748; GFX1250-SDAG-NEXT: v_and_b32_e32 v4, 0x3ff, v0749; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[2:3], 0x3f800000750; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0751; GFX1250-SDAG-NEXT: global_load_b64 v[0:1], v4, s[0:1] scale_offset752; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x0753; GFX1250-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3]754; GFX1250-SDAG-NEXT: global_store_b64 v4, v[0:1], s[0:1] scale_offset755; GFX1250-SDAG-NEXT: s_endpgm756;757; GFX1250-GISEL-LABEL: fadd_v2_v_lit_hi0:758; GFX1250-GISEL: ; %bb.0:759; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1760; GFX1250-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24761; GFX1250-GISEL-NEXT: v_and_b32_e32 v4, 0x3ff, v0762; GFX1250-GISEL-NEXT: s_mov_b64 s[2:3], 0x3f800000763; GFX1250-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)764; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[2:3]765; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0766; GFX1250-GISEL-NEXT: global_load_b64 v[0:1], v4, s[0:1] scale_offset767; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x0768; GFX1250-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3]769; GFX1250-GISEL-NEXT: global_store_b64 v4, v[0:1], s[0:1] scale_offset770; GFX1250-GISEL-NEXT: s_endpgm771 %id = tail call i32 @llvm.amdgcn.workitem.id.x()772 %gep = getelementptr inbounds <2 x float>, ptr addrspace(1) %a, i32 %id773 %load = load <2 x float>, ptr addrspace(1) %gep, align 8774 %add = fadd <2 x float> %load, <float 1.0, float 0.0>775 store <2 x float> %add, ptr addrspace(1) %gep, align 8776 ret void777}778 779define amdgpu_kernel void @fadd_v2_v_lit_lo0(ptr addrspace(1) %a) {780; GFX900-LABEL: fadd_v2_v_lit_lo0:781; GFX900: ; %bb.0:782; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24783; GFX900-NEXT: v_lshlrev_b32_e32 v2, 3, v0784; GFX900-NEXT: s_waitcnt lgkmcnt(0)785; GFX900-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]786; GFX900-NEXT: s_waitcnt vmcnt(0)787; GFX900-NEXT: v_add_f32_e32 v1, 1.0, v1788; GFX900-NEXT: v_add_f32_e32 v0, 0, v0789; GFX900-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]790; GFX900-NEXT: s_endpgm791;792; PACKED-LABEL: fadd_v2_v_lit_lo0:793; PACKED: ; %bb.0:794; PACKED-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24795; PACKED-NEXT: v_and_b32_e32 v0, 0x3ff, v0796; PACKED-NEXT: v_lshlrev_b32_e32 v2, 3, v0797; PACKED-NEXT: s_mov_b32 s2, 0798; PACKED-NEXT: s_mov_b32 s3, 1.0799; PACKED-NEXT: s_waitcnt lgkmcnt(0)800; PACKED-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]801; PACKED-NEXT: s_waitcnt vmcnt(0)802; PACKED-NEXT: v_pk_add_f32 v[0:1], v[0:1], s[2:3]803; PACKED-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]804; PACKED-NEXT: s_endpgm805;806; GFX1250-SDAG-LABEL: fadd_v2_v_lit_lo0:807; GFX1250-SDAG: ; %bb.0:808; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1809; GFX1250-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24810; GFX1250-SDAG-NEXT: v_and_b32_e32 v4, 0x3ff, v0811; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[2:3], 0x3f80000000000000812; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0813; GFX1250-SDAG-NEXT: global_load_b64 v[0:1], v4, s[0:1] scale_offset814; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x0815; GFX1250-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3]816; GFX1250-SDAG-NEXT: global_store_b64 v4, v[0:1], s[0:1] scale_offset817; GFX1250-SDAG-NEXT: s_endpgm818;819; GFX1250-GISEL-LABEL: fadd_v2_v_lit_lo0:820; GFX1250-GISEL: ; %bb.0:821; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1822; GFX1250-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24823; GFX1250-GISEL-NEXT: v_and_b32_e32 v4, 0x3ff, v0824; GFX1250-GISEL-NEXT: s_mov_b64 s[2:3], 0x3f80000000000000825; GFX1250-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)826; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[2:3]827; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0828; GFX1250-GISEL-NEXT: global_load_b64 v[0:1], v4, s[0:1] scale_offset829; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x0830; GFX1250-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3]831; GFX1250-GISEL-NEXT: global_store_b64 v4, v[0:1], s[0:1] scale_offset832; GFX1250-GISEL-NEXT: s_endpgm833 %id = tail call i32 @llvm.amdgcn.workitem.id.x()834 %gep = getelementptr inbounds <2 x float>, ptr addrspace(1) %a, i32 %id835 %load = load <2 x float>, ptr addrspace(1) %gep, align 8836 %add = fadd <2 x float> %load, <float 0.0, float 1.0>837 store <2 x float> %add, ptr addrspace(1) %gep, align 8838 ret void839}840 841define amdgpu_kernel void @fadd_v2_v_unfoldable_lit(ptr addrspace(1) %a) {842; GFX900-LABEL: fadd_v2_v_unfoldable_lit:843; GFX900: ; %bb.0:844; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24845; GFX900-NEXT: v_lshlrev_b32_e32 v2, 3, v0846; GFX900-NEXT: s_waitcnt lgkmcnt(0)847; GFX900-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]848; GFX900-NEXT: s_waitcnt vmcnt(0)849; GFX900-NEXT: v_add_f32_e32 v1, 2.0, v1850; GFX900-NEXT: v_add_f32_e32 v0, 1.0, v0851; GFX900-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]852; GFX900-NEXT: s_endpgm853;854; PACKED-LABEL: fadd_v2_v_unfoldable_lit:855; PACKED: ; %bb.0:856; PACKED-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24857; PACKED-NEXT: v_and_b32_e32 v0, 0x3ff, v0858; PACKED-NEXT: v_lshlrev_b32_e32 v2, 3, v0859; PACKED-NEXT: s_mov_b32 s2, 1.0860; PACKED-NEXT: s_mov_b32 s3, 2.0861; PACKED-NEXT: s_waitcnt lgkmcnt(0)862; PACKED-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]863; PACKED-NEXT: s_waitcnt vmcnt(0)864; PACKED-NEXT: v_pk_add_f32 v[0:1], v[0:1], s[2:3]865; PACKED-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]866; PACKED-NEXT: s_endpgm867;868; GFX1250-SDAG-LABEL: fadd_v2_v_unfoldable_lit:869; GFX1250-SDAG: ; %bb.0:870; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1871; GFX1250-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24872; GFX1250-SDAG-NEXT: v_and_b32_e32 v4, 0x3ff, v0873; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[2:3], 0x400000003f800000874; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0875; GFX1250-SDAG-NEXT: global_load_b64 v[0:1], v4, s[0:1] scale_offset876; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x0877; GFX1250-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3]878; GFX1250-SDAG-NEXT: global_store_b64 v4, v[0:1], s[0:1] scale_offset879; GFX1250-SDAG-NEXT: s_endpgm880;881; GFX1250-GISEL-LABEL: fadd_v2_v_unfoldable_lit:882; GFX1250-GISEL: ; %bb.0:883; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1884; GFX1250-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24885; GFX1250-GISEL-NEXT: v_and_b32_e32 v4, 0x3ff, v0886; GFX1250-GISEL-NEXT: s_mov_b64 s[2:3], 0x400000003f800000887; GFX1250-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)888; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[2:3]889; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0890; GFX1250-GISEL-NEXT: global_load_b64 v[0:1], v4, s[0:1] scale_offset891; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x0892; GFX1250-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3]893; GFX1250-GISEL-NEXT: global_store_b64 v4, v[0:1], s[0:1] scale_offset894; GFX1250-GISEL-NEXT: s_endpgm895 %id = tail call i32 @llvm.amdgcn.workitem.id.x()896 %gep = getelementptr inbounds <2 x float>, ptr addrspace(1) %a, i32 %id897 %load = load <2 x float>, ptr addrspace(1) %gep, align 8898 %add = fadd <2 x float> %load, <float 1.0, float 2.0>899 store <2 x float> %add, ptr addrspace(1) %gep, align 8900 ret void901}902 903; FIXME: Fold fneg into v_pk_add_f32 with Global ISel.904define amdgpu_kernel void @fadd_v2_v_fneg(ptr addrspace(1) %a, float %x) {905; GFX900-LABEL: fadd_v2_v_fneg:906; GFX900: ; %bb.0:907; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24908; GFX900-NEXT: s_load_dword s2, s[4:5], 0x2c909; GFX900-NEXT: v_lshlrev_b32_e32 v2, 3, v0910; GFX900-NEXT: s_waitcnt lgkmcnt(0)911; GFX900-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]912; GFX900-NEXT: s_waitcnt vmcnt(0)913; GFX900-NEXT: v_subrev_f32_e32 v1, s2, v1914; GFX900-NEXT: v_subrev_f32_e32 v0, s2, v0915; GFX900-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]916; GFX900-NEXT: s_endpgm917;918; PACKED-SDAG-LABEL: fadd_v2_v_fneg:919; PACKED-SDAG: ; %bb.0:920; PACKED-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24921; PACKED-SDAG-NEXT: s_load_dword s2, s[4:5], 0x2c922; PACKED-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0923; PACKED-SDAG-NEXT: v_lshlrev_b32_e32 v2, 3, v0924; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)925; PACKED-SDAG-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]926; PACKED-SDAG-NEXT: s_waitcnt vmcnt(0)927; PACKED-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], s[2:3] op_sel_hi:[1,0] neg_lo:[0,1] neg_hi:[0,1]928; PACKED-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]929; PACKED-SDAG-NEXT: s_endpgm930;931; PACKED-GISEL-LABEL: fadd_v2_v_fneg:932; PACKED-GISEL: ; %bb.0:933; PACKED-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24934; PACKED-GISEL-NEXT: s_load_dword s2, s[4:5], 0x2c935; PACKED-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0936; PACKED-GISEL-NEXT: v_lshlrev_b32_e32 v4, 3, v0937; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)938; PACKED-GISEL-NEXT: global_load_dwordx2 v[0:1], v4, s[0:1]939; PACKED-GISEL-NEXT: v_max_f32_e64 v2, -s2, -s2940; PACKED-GISEL-NEXT: v_mov_b32_e32 v3, v2941; PACKED-GISEL-NEXT: s_waitcnt vmcnt(0)942; PACKED-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3]943; PACKED-GISEL-NEXT: global_store_dwordx2 v4, v[0:1], s[0:1]944; PACKED-GISEL-NEXT: s_endpgm945;946; GFX1250-SDAG-LABEL: fadd_v2_v_fneg:947; GFX1250-SDAG: ; %bb.0:948; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1949; GFX1250-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x24950; GFX1250-SDAG-NEXT: v_and_b32_e32 v2, 0x3ff, v0951; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0952; GFX1250-SDAG-NEXT: global_load_b64 v[0:1], v2, s[0:1] scale_offset953; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x0954; GFX1250-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], s[2:3] op_sel_hi:[1,0] neg_lo:[0,1] neg_hi:[0,1]955; GFX1250-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1] scale_offset956; GFX1250-SDAG-NEXT: s_endpgm957;958; GFX1250-GISEL-LABEL: fadd_v2_v_fneg:959; GFX1250-GISEL: ; %bb.0:960; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1961; GFX1250-GISEL-NEXT: s_load_b96 s[0:2], s[4:5], 0x24962; GFX1250-GISEL-NEXT: v_and_b32_e32 v4, 0x3ff, v0963; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0964; GFX1250-GISEL-NEXT: global_load_b64 v[0:1], v4, s[0:1] scale_offset965; GFX1250-GISEL-NEXT: v_max_num_f32_e64 v2, -s2, -s2966; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)967; GFX1250-GISEL-NEXT: v_mov_b32_e32 v3, v2968; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x0969; GFX1250-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3]970; GFX1250-GISEL-NEXT: global_store_b64 v4, v[0:1], s[0:1] scale_offset971; GFX1250-GISEL-NEXT: s_endpgm972 %id = tail call i32 @llvm.amdgcn.workitem.id.x()973 %gep = getelementptr inbounds <2 x float>, ptr addrspace(1) %a, i32 %id974 %load = load <2 x float>, ptr addrspace(1) %gep, align 8975 %fneg = fsub float -0.0, %x976 %tmp1 = insertelement <2 x float> poison, float %fneg, i64 0977 %k = insertelement <2 x float> %tmp1, float %fneg, i64 1978 %add = fadd <2 x float> %load, %k979 store <2 x float> %add, ptr addrspace(1) %gep, align 8980 ret void981}982 983define amdgpu_kernel void @fadd_v2_v_fneg_lo(ptr addrspace(1) %a, float %x) {984; GFX900-LABEL: fadd_v2_v_fneg_lo:985; GFX900: ; %bb.0:986; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24987; GFX900-NEXT: s_load_dword s2, s[4:5], 0x2c988; GFX900-NEXT: v_lshlrev_b32_e32 v2, 3, v0989; GFX900-NEXT: s_waitcnt lgkmcnt(0)990; GFX900-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]991; GFX900-NEXT: s_waitcnt vmcnt(0)992; GFX900-NEXT: v_add_f32_e32 v1, s2, v1993; GFX900-NEXT: v_subrev_f32_e32 v0, s2, v0994; GFX900-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]995; GFX900-NEXT: s_endpgm996;997; PACKED-SDAG-LABEL: fadd_v2_v_fneg_lo:998; PACKED-SDAG: ; %bb.0:999; PACKED-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241000; PACKED-SDAG-NEXT: s_load_dword s2, s[4:5], 0x2c1001; PACKED-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v01002; PACKED-SDAG-NEXT: v_lshlrev_b32_e32 v2, 3, v01003; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)1004; PACKED-SDAG-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]1005; PACKED-SDAG-NEXT: s_waitcnt vmcnt(0)1006; PACKED-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], s[2:3] op_sel_hi:[1,0] neg_lo:[0,1]1007; PACKED-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1008; PACKED-SDAG-NEXT: s_endpgm1009;1010; PACKED-GISEL-LABEL: fadd_v2_v_fneg_lo:1011; PACKED-GISEL: ; %bb.0:1012; PACKED-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241013; PACKED-GISEL-NEXT: s_load_dword s2, s[4:5], 0x2c1014; PACKED-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v01015; PACKED-GISEL-NEXT: v_lshlrev_b32_e32 v4, 3, v01016; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)1017; PACKED-GISEL-NEXT: global_load_dwordx2 v[0:1], v4, s[0:1]1018; PACKED-GISEL-NEXT: v_mov_b32_e32 v3, s21019; PACKED-GISEL-NEXT: v_max_f32_e64 v2, -s2, -s21020; PACKED-GISEL-NEXT: s_waitcnt vmcnt(0)1021; PACKED-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3]1022; PACKED-GISEL-NEXT: global_store_dwordx2 v4, v[0:1], s[0:1]1023; PACKED-GISEL-NEXT: s_endpgm1024;1025; GFX1250-SDAG-LABEL: fadd_v2_v_fneg_lo:1026; GFX1250-SDAG: ; %bb.0:1027; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11028; GFX1250-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x241029; GFX1250-SDAG-NEXT: v_and_b32_e32 v2, 0x3ff, v01030; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x01031; GFX1250-SDAG-NEXT: global_load_b64 v[0:1], v2, s[0:1] scale_offset1032; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x01033; GFX1250-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], s[2:3] op_sel_hi:[1,0] neg_lo:[0,1]1034; GFX1250-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1] scale_offset1035; GFX1250-SDAG-NEXT: s_endpgm1036;1037; GFX1250-GISEL-LABEL: fadd_v2_v_fneg_lo:1038; GFX1250-GISEL: ; %bb.0:1039; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11040; GFX1250-GISEL-NEXT: s_load_b96 s[0:2], s[4:5], 0x241041; GFX1250-GISEL-NEXT: v_and_b32_e32 v4, 0x3ff, v01042; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x01043; GFX1250-GISEL-NEXT: global_load_b64 v[0:1], v4, s[0:1] scale_offset1044; GFX1250-GISEL-NEXT: v_mov_b32_e32 v3, s21045; GFX1250-GISEL-NEXT: v_max_num_f32_e64 v2, -s2, -s21046; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x01047; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)1048; GFX1250-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3]1049; GFX1250-GISEL-NEXT: global_store_b64 v4, v[0:1], s[0:1] scale_offset1050; GFX1250-GISEL-NEXT: s_endpgm1051 %id = tail call i32 @llvm.amdgcn.workitem.id.x()1052 %gep = getelementptr inbounds <2 x float>, ptr addrspace(1) %a, i32 %id1053 %load = load <2 x float>, ptr addrspace(1) %gep, align 81054 %fneg = fsub float -0.0, %x1055 %tmp1 = insertelement <2 x float> poison, float %fneg, i64 01056 %k = insertelement <2 x float> %tmp1, float %x, i64 11057 %add = fadd <2 x float> %load, %k1058 store <2 x float> %add, ptr addrspace(1) %gep, align 81059 ret void1060}1061 1062define amdgpu_kernel void @fadd_v2_v_fneg_hi(ptr addrspace(1) %a, float %x) {1063; GFX900-LABEL: fadd_v2_v_fneg_hi:1064; GFX900: ; %bb.0:1065; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241066; GFX900-NEXT: s_load_dword s2, s[4:5], 0x2c1067; GFX900-NEXT: v_lshlrev_b32_e32 v2, 3, v01068; GFX900-NEXT: s_waitcnt lgkmcnt(0)1069; GFX900-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]1070; GFX900-NEXT: s_waitcnt vmcnt(0)1071; GFX900-NEXT: v_subrev_f32_e32 v1, s2, v11072; GFX900-NEXT: v_add_f32_e32 v0, s2, v01073; GFX900-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1074; GFX900-NEXT: s_endpgm1075;1076; PACKED-SDAG-LABEL: fadd_v2_v_fneg_hi:1077; PACKED-SDAG: ; %bb.0:1078; PACKED-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241079; PACKED-SDAG-NEXT: s_load_dword s2, s[4:5], 0x2c1080; PACKED-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v01081; PACKED-SDAG-NEXT: v_lshlrev_b32_e32 v2, 3, v01082; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)1083; PACKED-SDAG-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]1084; PACKED-SDAG-NEXT: s_waitcnt vmcnt(0)1085; PACKED-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], s[2:3] op_sel_hi:[1,0] neg_hi:[0,1]1086; PACKED-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1087; PACKED-SDAG-NEXT: s_endpgm1088;1089; PACKED-GISEL-LABEL: fadd_v2_v_fneg_hi:1090; PACKED-GISEL: ; %bb.0:1091; PACKED-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241092; PACKED-GISEL-NEXT: s_load_dword s2, s[4:5], 0x2c1093; PACKED-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v01094; PACKED-GISEL-NEXT: v_lshlrev_b32_e32 v4, 3, v01095; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)1096; PACKED-GISEL-NEXT: global_load_dwordx2 v[0:1], v4, s[0:1]1097; PACKED-GISEL-NEXT: v_mov_b32_e32 v2, s21098; PACKED-GISEL-NEXT: v_max_f32_e64 v3, -s2, -s21099; PACKED-GISEL-NEXT: s_waitcnt vmcnt(0)1100; PACKED-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3]1101; PACKED-GISEL-NEXT: global_store_dwordx2 v4, v[0:1], s[0:1]1102; PACKED-GISEL-NEXT: s_endpgm1103;1104; GFX1250-SDAG-LABEL: fadd_v2_v_fneg_hi:1105; GFX1250-SDAG: ; %bb.0:1106; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11107; GFX1250-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x241108; GFX1250-SDAG-NEXT: v_and_b32_e32 v2, 0x3ff, v01109; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x01110; GFX1250-SDAG-NEXT: global_load_b64 v[0:1], v2, s[0:1] scale_offset1111; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x01112; GFX1250-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], s[2:3] op_sel_hi:[1,0] neg_hi:[0,1]1113; GFX1250-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1] scale_offset1114; GFX1250-SDAG-NEXT: s_endpgm1115;1116; GFX1250-GISEL-LABEL: fadd_v2_v_fneg_hi:1117; GFX1250-GISEL: ; %bb.0:1118; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11119; GFX1250-GISEL-NEXT: s_load_b96 s[0:2], s[4:5], 0x241120; GFX1250-GISEL-NEXT: v_and_b32_e32 v4, 0x3ff, v01121; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x01122; GFX1250-GISEL-NEXT: global_load_b64 v[0:1], v4, s[0:1] scale_offset1123; GFX1250-GISEL-NEXT: v_mov_b32_e32 v2, s21124; GFX1250-GISEL-NEXT: v_max_num_f32_e64 v3, -s2, -s21125; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x01126; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)1127; GFX1250-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3]1128; GFX1250-GISEL-NEXT: global_store_b64 v4, v[0:1], s[0:1] scale_offset1129; GFX1250-GISEL-NEXT: s_endpgm1130 %id = tail call i32 @llvm.amdgcn.workitem.id.x()1131 %gep = getelementptr inbounds <2 x float>, ptr addrspace(1) %a, i32 %id1132 %load = load <2 x float>, ptr addrspace(1) %gep, align 81133 %fneg = fsub float -0.0, %x1134 %tmp1 = insertelement <2 x float> poison, float %x, i64 01135 %k = insertelement <2 x float> %tmp1, float %fneg, i64 11136 %add = fadd <2 x float> %load, %k1137 store <2 x float> %add, ptr addrspace(1) %gep, align 81138 ret void1139}1140 1141define amdgpu_kernel void @fadd_v2_v_fneg_lo2(ptr addrspace(1) %a, float %x, float %y) {1142; GFX900-LABEL: fadd_v2_v_fneg_lo2:1143; GFX900: ; %bb.0:1144; GFX900-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241145; GFX900-NEXT: v_lshlrev_b32_e32 v2, 3, v01146; GFX900-NEXT: s_waitcnt lgkmcnt(0)1147; GFX900-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]1148; GFX900-NEXT: s_waitcnt vmcnt(0)1149; GFX900-NEXT: v_add_f32_e32 v1, s3, v11150; GFX900-NEXT: v_subrev_f32_e32 v0, s2, v01151; GFX900-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1152; GFX900-NEXT: s_endpgm1153;1154; PACKED-SDAG-LABEL: fadd_v2_v_fneg_lo2:1155; PACKED-SDAG: ; %bb.0:1156; PACKED-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241157; PACKED-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v01158; PACKED-SDAG-NEXT: v_lshlrev_b32_e32 v2, 3, v01159; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)1160; PACKED-SDAG-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]1161; PACKED-SDAG-NEXT: s_waitcnt vmcnt(0)1162; PACKED-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], s[2:3] neg_lo:[0,1]1163; PACKED-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1164; PACKED-SDAG-NEXT: s_endpgm1165;1166; PACKED-GISEL-LABEL: fadd_v2_v_fneg_lo2:1167; PACKED-GISEL: ; %bb.0:1168; PACKED-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241169; PACKED-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v01170; PACKED-GISEL-NEXT: v_lshlrev_b32_e32 v4, 3, v01171; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)1172; PACKED-GISEL-NEXT: global_load_dwordx2 v[0:1], v4, s[0:1]1173; PACKED-GISEL-NEXT: v_max_f32_e64 v2, -s2, -s21174; PACKED-GISEL-NEXT: v_mov_b32_e32 v3, s31175; PACKED-GISEL-NEXT: s_waitcnt vmcnt(0)1176; PACKED-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3]1177; PACKED-GISEL-NEXT: global_store_dwordx2 v4, v[0:1], s[0:1]1178; PACKED-GISEL-NEXT: s_endpgm1179;1180; GFX1250-SDAG-LABEL: fadd_v2_v_fneg_lo2:1181; GFX1250-SDAG: ; %bb.0:1182; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11183; GFX1250-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x241184; GFX1250-SDAG-NEXT: v_and_b32_e32 v4, 0x3ff, v01185; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x01186; GFX1250-SDAG-NEXT: global_load_b64 v[0:1], v4, s[0:1] scale_offset1187; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[2:3]1188; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x01189; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)1190; GFX1250-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3] neg_lo:[0,1]1191; GFX1250-SDAG-NEXT: global_store_b64 v4, v[0:1], s[0:1] scale_offset1192; GFX1250-SDAG-NEXT: s_endpgm1193;1194; GFX1250-GISEL-LABEL: fadd_v2_v_fneg_lo2:1195; GFX1250-GISEL: ; %bb.0:1196; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11197; GFX1250-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x241198; GFX1250-GISEL-NEXT: v_and_b32_e32 v4, 0x3ff, v01199; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x01200; GFX1250-GISEL-NEXT: global_load_b64 v[0:1], v4, s[0:1] scale_offset1201; GFX1250-GISEL-NEXT: v_max_num_f32_e64 v2, -s2, -s21202; GFX1250-GISEL-NEXT: v_mov_b32_e32 v3, s31203; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x01204; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)1205; GFX1250-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3]1206; GFX1250-GISEL-NEXT: global_store_b64 v4, v[0:1], s[0:1] scale_offset1207; GFX1250-GISEL-NEXT: s_endpgm1208 %id = tail call i32 @llvm.amdgcn.workitem.id.x()1209 %gep = getelementptr inbounds <2 x float>, ptr addrspace(1) %a, i32 %id1210 %load = load <2 x float>, ptr addrspace(1) %gep, align 81211 %fneg = fsub float -0.0, %x1212 %tmp1 = insertelement <2 x float> poison, float %fneg, i64 01213 %k = insertelement <2 x float> %tmp1, float %y, i64 11214 %add = fadd <2 x float> %load, %k1215 store <2 x float> %add, ptr addrspace(1) %gep, align 81216 ret void1217}1218 1219define amdgpu_kernel void @fadd_v2_v_fneg_hi2(ptr addrspace(1) %a, float %x, float %y) {1220; GFX900-LABEL: fadd_v2_v_fneg_hi2:1221; GFX900: ; %bb.0:1222; GFX900-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241223; GFX900-NEXT: v_lshlrev_b32_e32 v2, 3, v01224; GFX900-NEXT: s_waitcnt lgkmcnt(0)1225; GFX900-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]1226; GFX900-NEXT: s_waitcnt vmcnt(0)1227; GFX900-NEXT: v_subrev_f32_e32 v1, s2, v11228; GFX900-NEXT: v_add_f32_e32 v0, s3, v01229; GFX900-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1230; GFX900-NEXT: s_endpgm1231;1232; PACKED-SDAG-LABEL: fadd_v2_v_fneg_hi2:1233; PACKED-SDAG: ; %bb.0:1234; PACKED-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241235; PACKED-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v01236; PACKED-SDAG-NEXT: v_lshlrev_b32_e32 v2, 3, v01237; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)1238; PACKED-SDAG-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]1239; PACKED-SDAG-NEXT: s_waitcnt vmcnt(0)1240; PACKED-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], s[2:3] op_sel:[0,1] op_sel_hi:[1,0] neg_hi:[0,1]1241; PACKED-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1242; PACKED-SDAG-NEXT: s_endpgm1243;1244; PACKED-GISEL-LABEL: fadd_v2_v_fneg_hi2:1245; PACKED-GISEL: ; %bb.0:1246; PACKED-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241247; PACKED-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v01248; PACKED-GISEL-NEXT: v_lshlrev_b32_e32 v4, 3, v01249; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)1250; PACKED-GISEL-NEXT: global_load_dwordx2 v[0:1], v4, s[0:1]1251; PACKED-GISEL-NEXT: v_max_f32_e64 v3, -s2, -s21252; PACKED-GISEL-NEXT: v_mov_b32_e32 v2, s31253; PACKED-GISEL-NEXT: s_waitcnt vmcnt(0)1254; PACKED-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3]1255; PACKED-GISEL-NEXT: global_store_dwordx2 v4, v[0:1], s[0:1]1256; PACKED-GISEL-NEXT: s_endpgm1257;1258; GFX1250-SDAG-LABEL: fadd_v2_v_fneg_hi2:1259; GFX1250-SDAG: ; %bb.0:1260; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11261; GFX1250-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x241262; GFX1250-SDAG-NEXT: v_and_b32_e32 v4, 0x3ff, v01263; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x01264; GFX1250-SDAG-NEXT: global_load_b64 v[0:1], v4, s[0:1] scale_offset1265; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[2:3]1266; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x01267; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)1268; GFX1250-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3] op_sel:[0,1] op_sel_hi:[1,0] neg_hi:[0,1]1269; GFX1250-SDAG-NEXT: global_store_b64 v4, v[0:1], s[0:1] scale_offset1270; GFX1250-SDAG-NEXT: s_endpgm1271;1272; GFX1250-GISEL-LABEL: fadd_v2_v_fneg_hi2:1273; GFX1250-GISEL: ; %bb.0:1274; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11275; GFX1250-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x241276; GFX1250-GISEL-NEXT: v_and_b32_e32 v4, 0x3ff, v01277; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x01278; GFX1250-GISEL-NEXT: global_load_b64 v[0:1], v4, s[0:1] scale_offset1279; GFX1250-GISEL-NEXT: v_max_num_f32_e64 v3, -s2, -s21280; GFX1250-GISEL-NEXT: v_mov_b32_e32 v2, s31281; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x01282; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)1283; GFX1250-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3]1284; GFX1250-GISEL-NEXT: global_store_b64 v4, v[0:1], s[0:1] scale_offset1285; GFX1250-GISEL-NEXT: s_endpgm1286 %id = tail call i32 @llvm.amdgcn.workitem.id.x()1287 %gep = getelementptr inbounds <2 x float>, ptr addrspace(1) %a, i32 %id1288 %load = load <2 x float>, ptr addrspace(1) %gep, align 81289 %fneg = fsub float -0.0, %x1290 %tmp1 = insertelement <2 x float> poison, float %y, i64 01291 %k = insertelement <2 x float> %tmp1, float %fneg, i64 11292 %add = fadd <2 x float> %load, %k1293 store <2 x float> %add, ptr addrspace(1) %gep, align 81294 ret void1295}1296 1297define amdgpu_kernel void @fmul_v2_vv(ptr addrspace(1) %a) {1298; GFX900-LABEL: fmul_v2_vv:1299; GFX900: ; %bb.0:1300; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241301; GFX900-NEXT: v_lshlrev_b32_e32 v2, 3, v01302; GFX900-NEXT: s_waitcnt lgkmcnt(0)1303; GFX900-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]1304; GFX900-NEXT: s_waitcnt vmcnt(0)1305; GFX900-NEXT: v_mul_f32_e32 v1, v1, v11306; GFX900-NEXT: v_mul_f32_e32 v0, v0, v01307; GFX900-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1308; GFX900-NEXT: s_endpgm1309;1310; PACKED-LABEL: fmul_v2_vv:1311; PACKED: ; %bb.0:1312; PACKED-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241313; PACKED-NEXT: v_and_b32_e32 v0, 0x3ff, v01314; PACKED-NEXT: v_lshlrev_b32_e32 v2, 3, v01315; PACKED-NEXT: s_waitcnt lgkmcnt(0)1316; PACKED-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]1317; PACKED-NEXT: s_waitcnt vmcnt(0)1318; PACKED-NEXT: v_pk_mul_f32 v[0:1], v[0:1], v[0:1]1319; PACKED-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1320; PACKED-NEXT: s_endpgm1321;1322; GFX1250-LABEL: fmul_v2_vv:1323; GFX1250: ; %bb.0:1324; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11325; GFX1250-NEXT: s_load_b64 s[0:1], s[4:5], 0x241326; GFX1250-NEXT: v_and_b32_e32 v2, 0x3ff, v01327; GFX1250-NEXT: s_wait_kmcnt 0x01328; GFX1250-NEXT: global_load_b64 v[0:1], v2, s[0:1] scale_offset1329; GFX1250-NEXT: s_wait_loadcnt 0x01330; GFX1250-NEXT: v_pk_mul_f32 v[0:1], v[0:1], v[0:1]1331; GFX1250-NEXT: global_store_b64 v2, v[0:1], s[0:1] scale_offset1332; GFX1250-NEXT: s_endpgm1333 %id = tail call i32 @llvm.amdgcn.workitem.id.x()1334 %gep = getelementptr inbounds <2 x float>, ptr addrspace(1) %a, i32 %id1335 %load = load <2 x float>, ptr addrspace(1) %gep, align 81336 %mul = fmul <2 x float> %load, %load1337 store <2 x float> %mul, ptr addrspace(1) %gep, align 81338 ret void1339}1340 1341define amdgpu_kernel void @fmul_v2_vs(ptr addrspace(1) %a, <2 x float> %x) {1342; GFX900-LABEL: fmul_v2_vs:1343; GFX900: ; %bb.0:1344; GFX900-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241345; GFX900-NEXT: v_lshlrev_b32_e32 v2, 3, v01346; GFX900-NEXT: s_waitcnt lgkmcnt(0)1347; GFX900-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]1348; GFX900-NEXT: s_waitcnt vmcnt(0)1349; GFX900-NEXT: v_mul_f32_e32 v1, s3, v11350; GFX900-NEXT: v_mul_f32_e32 v0, s2, v01351; GFX900-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1352; GFX900-NEXT: s_endpgm1353;1354; PACKED-LABEL: fmul_v2_vs:1355; PACKED: ; %bb.0:1356; PACKED-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241357; PACKED-NEXT: v_and_b32_e32 v0, 0x3ff, v01358; PACKED-NEXT: v_lshlrev_b32_e32 v2, 3, v01359; PACKED-NEXT: s_waitcnt lgkmcnt(0)1360; PACKED-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]1361; PACKED-NEXT: s_waitcnt vmcnt(0)1362; PACKED-NEXT: v_pk_mul_f32 v[0:1], v[0:1], s[2:3]1363; PACKED-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1364; PACKED-NEXT: s_endpgm1365;1366; GFX1250-LABEL: fmul_v2_vs:1367; GFX1250: ; %bb.0:1368; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11369; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x241370; GFX1250-NEXT: v_and_b32_e32 v4, 0x3ff, v01371; GFX1250-NEXT: s_wait_kmcnt 0x01372; GFX1250-NEXT: global_load_b64 v[0:1], v4, s[0:1] scale_offset1373; GFX1250-NEXT: v_mov_b64_e32 v[2:3], s[2:3]1374; GFX1250-NEXT: s_wait_loadcnt 0x01375; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)1376; GFX1250-NEXT: v_pk_mul_f32 v[0:1], v[0:1], v[2:3]1377; GFX1250-NEXT: global_store_b64 v4, v[0:1], s[0:1] scale_offset1378; GFX1250-NEXT: s_endpgm1379 %id = tail call i32 @llvm.amdgcn.workitem.id.x()1380 %gep = getelementptr inbounds <2 x float>, ptr addrspace(1) %a, i32 %id1381 %load = load <2 x float>, ptr addrspace(1) %gep, align 81382 %mul = fmul <2 x float> %load, %x1383 store <2 x float> %mul, ptr addrspace(1) %gep, align 81384 ret void1385}1386 1387define amdgpu_kernel void @fmul_v4_vs(ptr addrspace(1) %a, <4 x float> %x) {1388; GFX900-LABEL: fmul_v4_vs:1389; GFX900: ; %bb.0:1390; GFX900-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x241391; GFX900-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x341392; GFX900-NEXT: v_lshlrev_b32_e32 v4, 4, v01393; GFX900-NEXT: s_waitcnt lgkmcnt(0)1394; GFX900-NEXT: global_load_dwordx4 v[0:3], v4, s[6:7]1395; GFX900-NEXT: s_waitcnt vmcnt(0)1396; GFX900-NEXT: v_mul_f32_e32 v3, s3, v31397; GFX900-NEXT: v_mul_f32_e32 v2, s2, v21398; GFX900-NEXT: v_mul_f32_e32 v1, s1, v11399; GFX900-NEXT: v_mul_f32_e32 v0, s0, v01400; GFX900-NEXT: global_store_dwordx4 v4, v[0:3], s[6:7]1401; GFX900-NEXT: s_endpgm1402;1403; PACKED-SDAG-LABEL: fmul_v4_vs:1404; PACKED-SDAG: ; %bb.0:1405; PACKED-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x241406; PACKED-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x341407; PACKED-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v01408; PACKED-SDAG-NEXT: v_lshlrev_b32_e32 v4, 4, v01409; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)1410; PACKED-SDAG-NEXT: global_load_dwordx4 v[0:3], v4, s[6:7]1411; PACKED-SDAG-NEXT: s_waitcnt vmcnt(0)1412; PACKED-SDAG-NEXT: v_pk_mul_f32 v[2:3], v[2:3], s[2:3]1413; PACKED-SDAG-NEXT: v_pk_mul_f32 v[0:1], v[0:1], s[0:1]1414; PACKED-SDAG-NEXT: global_store_dwordx4 v4, v[0:3], s[6:7]1415; PACKED-SDAG-NEXT: s_endpgm1416;1417; PACKED-GISEL-LABEL: fmul_v4_vs:1418; PACKED-GISEL: ; %bb.0:1419; PACKED-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x241420; PACKED-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x341421; PACKED-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v01422; PACKED-GISEL-NEXT: v_lshlrev_b32_e32 v4, 4, v01423; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)1424; PACKED-GISEL-NEXT: global_load_dwordx4 v[0:3], v4, s[6:7]1425; PACKED-GISEL-NEXT: s_waitcnt vmcnt(0)1426; PACKED-GISEL-NEXT: v_pk_mul_f32 v[0:1], v[0:1], s[0:1]1427; PACKED-GISEL-NEXT: v_pk_mul_f32 v[2:3], v[2:3], s[2:3]1428; PACKED-GISEL-NEXT: global_store_dwordx4 v4, v[0:3], s[6:7]1429; PACKED-GISEL-NEXT: s_endpgm1430;1431; GFX1250-SDAG-LABEL: fmul_v4_vs:1432; GFX1250-SDAG: ; %bb.0:1433; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11434; GFX1250-SDAG-NEXT: s_clause 0x11435; GFX1250-SDAG-NEXT: s_load_b64 s[6:7], s[4:5], 0x241436; GFX1250-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x341437; GFX1250-SDAG-NEXT: v_and_b32_e32 v8, 0x3ff, v01438; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x01439; GFX1250-SDAG-NEXT: global_load_b128 v[0:3], v8, s[6:7] scale_offset1440; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[0:1]1441; GFX1250-SDAG-NEXT: v_dual_mov_b32 v4, s2 :: v_dual_mov_b32 v5, s31442; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x01443; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)1444; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[2:3], v[2:3], v[4:5]1445; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[0:1], v[0:1], v[6:7]1446; GFX1250-SDAG-NEXT: global_store_b128 v8, v[0:3], s[6:7] scale_offset1447; GFX1250-SDAG-NEXT: s_endpgm1448;1449; GFX1250-GISEL-LABEL: fmul_v4_vs:1450; GFX1250-GISEL: ; %bb.0:1451; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11452; GFX1250-GISEL-NEXT: s_clause 0x11453; GFX1250-GISEL-NEXT: s_load_b64 s[6:7], s[4:5], 0x241454; GFX1250-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x341455; GFX1250-GISEL-NEXT: v_and_b32_e32 v8, 0x3ff, v01456; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x01457; GFX1250-GISEL-NEXT: global_load_b128 v[0:3], v8, s[6:7] scale_offset1458; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[4:5], s[0:1]1459; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[6:7], s[2:3]1460; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x01461; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1462; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[0:1], v[0:1], v[4:5]1463; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[2:3], v[2:3], v[6:7]1464; GFX1250-GISEL-NEXT: global_store_b128 v8, v[0:3], s[6:7] scale_offset1465; GFX1250-GISEL-NEXT: s_endpgm1466 %id = tail call i32 @llvm.amdgcn.workitem.id.x()1467 %gep = getelementptr inbounds <4 x float>, ptr addrspace(1) %a, i32 %id1468 %load = load <4 x float>, ptr addrspace(1) %gep, align 161469 %mul = fmul <4 x float> %load, %x1470 store <4 x float> %mul, ptr addrspace(1) %gep, align 161471 ret void1472}1473 1474define amdgpu_kernel void @fmul_v32_vs(ptr addrspace(1) %a, <32 x float> %x) {1475; GFX900-LABEL: fmul_v32_vs:1476; GFX900: ; %bb.0:1477; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241478; GFX900-NEXT: v_lshlrev_b32_e32 v0, 7, v01479; GFX900-NEXT: s_load_dwordx16 s[36:51], s[4:5], 0xa41480; GFX900-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0xe41481; GFX900-NEXT: s_waitcnt lgkmcnt(0)1482; GFX900-NEXT: global_load_dwordx4 v[25:28], v0, s[0:1] offset:1121483; GFX900-NEXT: global_load_dwordx4 v[29:32], v0, s[0:1] offset:961484; GFX900-NEXT: global_load_dwordx4 v[1:4], v0, s[0:1] offset:161485; GFX900-NEXT: global_load_dwordx4 v[5:8], v0, s[0:1]1486; GFX900-NEXT: global_load_dwordx4 v[9:12], v0, s[0:1] offset:481487; GFX900-NEXT: global_load_dwordx4 v[13:16], v0, s[0:1] offset:321488; GFX900-NEXT: global_load_dwordx4 v[17:20], v0, s[0:1] offset:801489; GFX900-NEXT: global_load_dwordx4 v[21:24], v0, s[0:1] offset:641490; GFX900-NEXT: s_waitcnt vmcnt(5)1491; GFX900-NEXT: v_mul_f32_e32 v4, s43, v41492; GFX900-NEXT: v_mul_f32_e32 v3, s42, v31493; GFX900-NEXT: v_mul_f32_e32 v2, s41, v21494; GFX900-NEXT: v_mul_f32_e32 v1, s40, v11495; GFX900-NEXT: v_mul_f32_e32 v32, s19, v321496; GFX900-NEXT: v_mul_f32_e32 v31, s18, v311497; GFX900-NEXT: v_mul_f32_e32 v30, s17, v301498; GFX900-NEXT: v_mul_f32_e32 v29, s16, v291499; GFX900-NEXT: s_waitcnt vmcnt(4)1500; GFX900-NEXT: v_mul_f32_e32 v8, s39, v81501; GFX900-NEXT: v_mul_f32_e32 v7, s38, v71502; GFX900-NEXT: v_mul_f32_e32 v6, s37, v61503; GFX900-NEXT: v_mul_f32_e32 v5, s36, v51504; GFX900-NEXT: s_waitcnt vmcnt(3)1505; GFX900-NEXT: v_mul_f32_e32 v12, s51, v121506; GFX900-NEXT: v_mul_f32_e32 v11, s50, v111507; GFX900-NEXT: v_mul_f32_e32 v10, s49, v101508; GFX900-NEXT: v_mul_f32_e32 v9, s48, v91509; GFX900-NEXT: s_waitcnt vmcnt(2)1510; GFX900-NEXT: v_mul_f32_e32 v16, s47, v161511; GFX900-NEXT: v_mul_f32_e32 v15, s46, v151512; GFX900-NEXT: v_mul_f32_e32 v14, s45, v141513; GFX900-NEXT: v_mul_f32_e32 v13, s44, v131514; GFX900-NEXT: s_waitcnt vmcnt(1)1515; GFX900-NEXT: v_mul_f32_e32 v20, s15, v201516; GFX900-NEXT: v_mul_f32_e32 v19, s14, v191517; GFX900-NEXT: v_mul_f32_e32 v18, s13, v181518; GFX900-NEXT: v_mul_f32_e32 v17, s12, v171519; GFX900-NEXT: s_waitcnt vmcnt(0)1520; GFX900-NEXT: v_mul_f32_e32 v24, s11, v241521; GFX900-NEXT: v_mul_f32_e32 v23, s10, v231522; GFX900-NEXT: v_mul_f32_e32 v22, s9, v221523; GFX900-NEXT: v_mul_f32_e32 v21, s8, v211524; GFX900-NEXT: v_mul_f32_e32 v28, s23, v281525; GFX900-NEXT: v_mul_f32_e32 v27, s22, v271526; GFX900-NEXT: v_mul_f32_e32 v26, s21, v261527; GFX900-NEXT: v_mul_f32_e32 v25, s20, v251528; GFX900-NEXT: global_store_dwordx4 v0, v[29:32], s[0:1] offset:961529; GFX900-NEXT: global_store_dwordx4 v0, v[25:28], s[0:1] offset:1121530; GFX900-NEXT: global_store_dwordx4 v0, v[21:24], s[0:1] offset:641531; GFX900-NEXT: global_store_dwordx4 v0, v[17:20], s[0:1] offset:801532; GFX900-NEXT: global_store_dwordx4 v0, v[13:16], s[0:1] offset:321533; GFX900-NEXT: global_store_dwordx4 v0, v[9:12], s[0:1] offset:481534; GFX900-NEXT: global_store_dwordx4 v0, v[5:8], s[0:1]1535; GFX900-NEXT: global_store_dwordx4 v0, v[1:4], s[0:1] offset:161536; GFX900-NEXT: s_endpgm1537;1538; PACKED-SDAG-LABEL: fmul_v32_vs:1539; PACKED-SDAG: ; %bb.0:1540; PACKED-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241541; PACKED-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v01542; PACKED-SDAG-NEXT: v_lshlrev_b32_e32 v32, 7, v01543; PACKED-SDAG-NEXT: s_load_dwordx16 s[36:51], s[4:5], 0xa41544; PACKED-SDAG-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0xe41545; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)1546; PACKED-SDAG-NEXT: global_load_dwordx4 v[0:3], v32, s[0:1] offset:161547; PACKED-SDAG-NEXT: global_load_dwordx4 v[4:7], v32, s[0:1]1548; PACKED-SDAG-NEXT: global_load_dwordx4 v[8:11], v32, s[0:1] offset:481549; PACKED-SDAG-NEXT: global_load_dwordx4 v[16:19], v32, s[0:1] offset:321550; PACKED-SDAG-NEXT: global_load_dwordx4 v[20:23], v32, s[0:1] offset:801551; PACKED-SDAG-NEXT: global_load_dwordx4 v[12:15], v32, s[0:1] offset:641552; PACKED-SDAG-NEXT: global_load_dwordx4 v[24:27], v32, s[0:1] offset:1121553; PACKED-SDAG-NEXT: global_load_dwordx4 v[28:31], v32, s[0:1] offset:961554; PACKED-SDAG-NEXT: s_waitcnt vmcnt(7)1555; PACKED-SDAG-NEXT: v_pk_mul_f32 v[0:1], v[0:1], s[40:41]1556; PACKED-SDAG-NEXT: v_pk_mul_f32 v[2:3], v[2:3], s[42:43]1557; PACKED-SDAG-NEXT: s_waitcnt vmcnt(6)1558; PACKED-SDAG-NEXT: v_pk_mul_f32 v[6:7], v[6:7], s[38:39]1559; PACKED-SDAG-NEXT: s_waitcnt vmcnt(5)1560; PACKED-SDAG-NEXT: v_pk_mul_f32 v[8:9], v[8:9], s[48:49]1561; PACKED-SDAG-NEXT: v_pk_mul_f32 v[10:11], v[10:11], s[50:51]1562; PACKED-SDAG-NEXT: s_waitcnt vmcnt(4)1563; PACKED-SDAG-NEXT: v_pk_mul_f32 v[16:17], v[16:17], s[44:45]1564; PACKED-SDAG-NEXT: v_pk_mul_f32 v[18:19], v[18:19], s[46:47]1565; PACKED-SDAG-NEXT: s_waitcnt vmcnt(0)1566; PACKED-SDAG-NEXT: v_pk_mul_f32 v[28:29], v[28:29], s[16:17]1567; PACKED-SDAG-NEXT: v_pk_mul_f32 v[30:31], v[30:31], s[18:19]1568; PACKED-SDAG-NEXT: v_pk_mul_f32 v[20:21], v[20:21], s[12:13]1569; PACKED-SDAG-NEXT: v_pk_mul_f32 v[22:23], v[22:23], s[14:15]1570; PACKED-SDAG-NEXT: v_pk_mul_f32 v[14:15], v[14:15], s[10:11]1571; PACKED-SDAG-NEXT: v_pk_mul_f32 v[24:25], v[24:25], s[20:21]1572; PACKED-SDAG-NEXT: v_pk_mul_f32 v[26:27], v[26:27], s[22:23]1573; PACKED-SDAG-NEXT: v_pk_mul_f32 v[4:5], v[4:5], s[36:37]1574; PACKED-SDAG-NEXT: v_pk_mul_f32 v[12:13], v[12:13], s[8:9]1575; PACKED-SDAG-NEXT: global_store_dwordx4 v32, v[28:31], s[0:1] offset:961576; PACKED-SDAG-NEXT: global_store_dwordx4 v32, v[24:27], s[0:1] offset:1121577; PACKED-SDAG-NEXT: global_store_dwordx4 v32, v[12:15], s[0:1] offset:641578; PACKED-SDAG-NEXT: global_store_dwordx4 v32, v[20:23], s[0:1] offset:801579; PACKED-SDAG-NEXT: global_store_dwordx4 v32, v[16:19], s[0:1] offset:321580; PACKED-SDAG-NEXT: global_store_dwordx4 v32, v[8:11], s[0:1] offset:481581; PACKED-SDAG-NEXT: global_store_dwordx4 v32, v[4:7], s[0:1]1582; PACKED-SDAG-NEXT: global_store_dwordx4 v32, v[0:3], s[0:1] offset:161583; PACKED-SDAG-NEXT: s_endpgm1584;1585; PACKED-GISEL-LABEL: fmul_v32_vs:1586; PACKED-GISEL: ; %bb.0:1587; PACKED-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241588; PACKED-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v01589; PACKED-GISEL-NEXT: v_lshlrev_b32_e32 v32, 7, v01590; PACKED-GISEL-NEXT: s_load_dwordx16 s[36:51], s[4:5], 0xa41591; PACKED-GISEL-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0xe41592; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)1593; PACKED-GISEL-NEXT: global_load_dwordx4 v[0:3], v32, s[0:1]1594; PACKED-GISEL-NEXT: global_load_dwordx4 v[4:7], v32, s[0:1] offset:161595; PACKED-GISEL-NEXT: global_load_dwordx4 v[8:11], v32, s[0:1] offset:321596; PACKED-GISEL-NEXT: global_load_dwordx4 v[12:15], v32, s[0:1] offset:481597; PACKED-GISEL-NEXT: global_load_dwordx4 v[16:19], v32, s[0:1] offset:641598; PACKED-GISEL-NEXT: global_load_dwordx4 v[20:23], v32, s[0:1] offset:801599; PACKED-GISEL-NEXT: global_load_dwordx4 v[24:27], v32, s[0:1] offset:961600; PACKED-GISEL-NEXT: global_load_dwordx4 v[28:31], v32, s[0:1] offset:1121601; PACKED-GISEL-NEXT: s_waitcnt vmcnt(7)1602; PACKED-GISEL-NEXT: v_pk_mul_f32 v[0:1], v[0:1], s[36:37]1603; PACKED-GISEL-NEXT: v_pk_mul_f32 v[2:3], v[2:3], s[38:39]1604; PACKED-GISEL-NEXT: s_waitcnt vmcnt(6)1605; PACKED-GISEL-NEXT: v_pk_mul_f32 v[4:5], v[4:5], s[40:41]1606; PACKED-GISEL-NEXT: v_pk_mul_f32 v[6:7], v[6:7], s[42:43]1607; PACKED-GISEL-NEXT: s_waitcnt vmcnt(5)1608; PACKED-GISEL-NEXT: v_pk_mul_f32 v[8:9], v[8:9], s[44:45]1609; PACKED-GISEL-NEXT: v_pk_mul_f32 v[10:11], v[10:11], s[46:47]1610; PACKED-GISEL-NEXT: s_waitcnt vmcnt(4)1611; PACKED-GISEL-NEXT: v_pk_mul_f32 v[12:13], v[12:13], s[48:49]1612; PACKED-GISEL-NEXT: v_pk_mul_f32 v[14:15], v[14:15], s[50:51]1613; PACKED-GISEL-NEXT: s_waitcnt vmcnt(3)1614; PACKED-GISEL-NEXT: v_pk_mul_f32 v[16:17], v[16:17], s[8:9]1615; PACKED-GISEL-NEXT: v_pk_mul_f32 v[18:19], v[18:19], s[10:11]1616; PACKED-GISEL-NEXT: s_waitcnt vmcnt(2)1617; PACKED-GISEL-NEXT: v_pk_mul_f32 v[20:21], v[20:21], s[12:13]1618; PACKED-GISEL-NEXT: v_pk_mul_f32 v[22:23], v[22:23], s[14:15]1619; PACKED-GISEL-NEXT: s_waitcnt vmcnt(1)1620; PACKED-GISEL-NEXT: v_pk_mul_f32 v[24:25], v[24:25], s[16:17]1621; PACKED-GISEL-NEXT: v_pk_mul_f32 v[26:27], v[26:27], s[18:19]1622; PACKED-GISEL-NEXT: s_waitcnt vmcnt(0)1623; PACKED-GISEL-NEXT: v_pk_mul_f32 v[28:29], v[28:29], s[20:21]1624; PACKED-GISEL-NEXT: v_pk_mul_f32 v[30:31], v[30:31], s[22:23]1625; PACKED-GISEL-NEXT: global_store_dwordx4 v32, v[0:3], s[0:1]1626; PACKED-GISEL-NEXT: global_store_dwordx4 v32, v[4:7], s[0:1] offset:161627; PACKED-GISEL-NEXT: global_store_dwordx4 v32, v[8:11], s[0:1] offset:321628; PACKED-GISEL-NEXT: global_store_dwordx4 v32, v[12:15], s[0:1] offset:481629; PACKED-GISEL-NEXT: global_store_dwordx4 v32, v[16:19], s[0:1] offset:641630; PACKED-GISEL-NEXT: global_store_dwordx4 v32, v[20:23], s[0:1] offset:801631; PACKED-GISEL-NEXT: global_store_dwordx4 v32, v[24:27], s[0:1] offset:961632; PACKED-GISEL-NEXT: global_store_dwordx4 v32, v[28:31], s[0:1] offset:1121633; PACKED-GISEL-NEXT: s_endpgm1634;1635; GFX1250-SDAG-LABEL: fmul_v32_vs:1636; GFX1250-SDAG: ; %bb.0:1637; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11638; GFX1250-SDAG-NEXT: s_clause 0x21639; GFX1250-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x241640; GFX1250-SDAG-NEXT: s_load_b512 s[36:51], s[4:5], 0xa41641; GFX1250-SDAG-NEXT: s_load_b512 s[8:23], s[4:5], 0xe41642; GFX1250-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v01643; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x01644; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)1645; GFX1250-SDAG-NEXT: v_dual_lshlrev_b32 v56, 7, v0 :: v_dual_mov_b32 v32, s401646; GFX1250-SDAG-NEXT: s_clause 0x71647; GFX1250-SDAG-NEXT: global_load_b128 v[0:3], v56, s[0:1] offset:161648; GFX1250-SDAG-NEXT: global_load_b128 v[4:7], v56, s[0:1] offset:481649; GFX1250-SDAG-NEXT: global_load_b128 v[8:11], v56, s[0:1] offset:321650; GFX1250-SDAG-NEXT: global_load_b128 v[12:15], v56, s[0:1]1651; GFX1250-SDAG-NEXT: global_load_b128 v[16:19], v56, s[0:1] offset:801652; GFX1250-SDAG-NEXT: global_load_b128 v[20:23], v56, s[0:1] offset:961653; GFX1250-SDAG-NEXT: global_load_b128 v[24:27], v56, s[0:1] offset:641654; GFX1250-SDAG-NEXT: global_load_b128 v[28:31], v56, s[0:1] offset:1121655; GFX1250-SDAG-NEXT: v_dual_mov_b32 v33, s41 :: v_dual_mov_b32 v34, s421656; GFX1250-SDAG-NEXT: v_dual_mov_b32 v35, s43 :: v_dual_mov_b32 v36, s381657; GFX1250-SDAG-NEXT: v_dual_mov_b32 v39, s49 :: v_dual_mov_b32 v40, s501658; GFX1250-SDAG-NEXT: v_dual_mov_b32 v41, s51 :: v_dual_mov_b32 v42, s441659; GFX1250-SDAG-NEXT: v_dual_mov_b32 v37, s39 :: v_dual_mov_b32 v38, s481660; GFX1250-SDAG-NEXT: v_dual_mov_b32 v55, s23 :: v_dual_mov_b32 v51, s111661; GFX1250-SDAG-NEXT: v_dual_mov_b32 v52, s20 :: v_dual_mov_b32 v53, s211662; GFX1250-SDAG-NEXT: v_dual_mov_b32 v54, s22 :: v_dual_mov_b32 v49, s151663; GFX1250-SDAG-NEXT: v_dual_mov_b32 v50, s10 :: v_dual_mov_b32 v45, s471664; GFX1250-SDAG-NEXT: v_dual_mov_b32 v46, s12 :: v_dual_mov_b32 v47, s131665; GFX1250-SDAG-NEXT: v_dual_mov_b32 v48, s14 :: v_dual_mov_b32 v43, s451666; GFX1250-SDAG-NEXT: v_mov_b32_e32 v44, s461667; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x71668; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[0:1], v[0:1], v[32:33]1669; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[2:3], v[2:3], v[34:35]1670; GFX1250-SDAG-NEXT: v_dual_mov_b32 v32, s16 :: v_dual_mov_b32 v33, s171671; GFX1250-SDAG-NEXT: v_dual_mov_b32 v34, s18 :: v_dual_mov_b32 v35, s191672; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x61673; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[6:7], v[6:7], v[40:41]1674; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[40:41], s[8:9]1675; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[4:5], v[4:5], v[38:39]1676; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[38:39], s[36:37]1677; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x21678; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[20:21], v[20:21], v[32:33]1679; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[22:23], v[22:23], v[34:35]1680; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x01681; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[28:29], v[28:29], v[52:53]1682; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[30:31], v[30:31], v[54:55]1683; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[26:27], v[26:27], v[50:51]1684; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[24:25], v[24:25], v[40:41]1685; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[16:17], v[16:17], v[46:47]1686; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[18:19], v[18:19], v[48:49]1687; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[8:9], v[8:9], v[42:43]1688; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[10:11], v[10:11], v[44:45]1689; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[14:15], v[14:15], v[36:37]1690; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[12:13], v[12:13], v[38:39]1691; GFX1250-SDAG-NEXT: s_clause 0x71692; GFX1250-SDAG-NEXT: global_store_b128 v56, v[20:23], s[0:1] offset:961693; GFX1250-SDAG-NEXT: global_store_b128 v56, v[28:31], s[0:1] offset:1121694; GFX1250-SDAG-NEXT: global_store_b128 v56, v[24:27], s[0:1] offset:641695; GFX1250-SDAG-NEXT: global_store_b128 v56, v[16:19], s[0:1] offset:801696; GFX1250-SDAG-NEXT: global_store_b128 v56, v[8:11], s[0:1] offset:321697; GFX1250-SDAG-NEXT: global_store_b128 v56, v[4:7], s[0:1] offset:481698; GFX1250-SDAG-NEXT: global_store_b128 v56, v[12:15], s[0:1]1699; GFX1250-SDAG-NEXT: global_store_b128 v56, v[0:3], s[0:1] offset:161700; GFX1250-SDAG-NEXT: s_endpgm1701;1702; GFX1250-GISEL-LABEL: fmul_v32_vs:1703; GFX1250-GISEL: ; %bb.0:1704; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11705; GFX1250-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x241706; GFX1250-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v01707; GFX1250-GISEL-NEXT: s_clause 0x11708; GFX1250-GISEL-NEXT: s_load_b512 s[36:51], s[4:5], 0xa41709; GFX1250-GISEL-NEXT: s_load_b512 s[8:23], s[4:5], 0xe41710; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)1711; GFX1250-GISEL-NEXT: v_lshlrev_b32_e32 v56, 7, v01712; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x01713; GFX1250-GISEL-NEXT: s_clause 0x71714; GFX1250-GISEL-NEXT: global_load_b128 v[0:3], v56, s[0:1]1715; GFX1250-GISEL-NEXT: global_load_b128 v[4:7], v56, s[0:1] offset:161716; GFX1250-GISEL-NEXT: global_load_b128 v[8:11], v56, s[0:1] offset:321717; GFX1250-GISEL-NEXT: global_load_b128 v[12:15], v56, s[0:1] offset:481718; GFX1250-GISEL-NEXT: global_load_b128 v[16:19], v56, s[0:1] offset:641719; GFX1250-GISEL-NEXT: global_load_b128 v[20:23], v56, s[0:1] offset:801720; GFX1250-GISEL-NEXT: global_load_b128 v[24:27], v56, s[0:1] offset:961721; GFX1250-GISEL-NEXT: global_load_b128 v[28:31], v56, s[0:1] offset:1121722; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[32:33], s[36:37]1723; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[34:35], s[38:39]1724; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[36:37], s[40:41]1725; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[38:39], s[42:43]1726; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[40:41], s[44:45]1727; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[42:43], s[46:47]1728; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[44:45], s[48:49]1729; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[46:47], s[50:51]1730; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[48:49], s[8:9]1731; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[50:51], s[10:11]1732; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[52:53], s[12:13]1733; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[54:55], s[14:15]1734; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x71735; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[0:1], v[0:1], v[32:33]1736; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[2:3], v[2:3], v[34:35]1737; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[32:33], s[16:17]1738; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[34:35], s[18:19]1739; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x61740; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[4:5], v[4:5], v[36:37]1741; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[6:7], v[6:7], v[38:39]1742; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[36:37], s[20:21]1743; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[38:39], s[22:23]1744; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x51745; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[8:9], v[8:9], v[40:41]1746; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[10:11], v[10:11], v[42:43]1747; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x41748; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[12:13], v[12:13], v[44:45]1749; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[14:15], v[14:15], v[46:47]1750; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x31751; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[16:17], v[16:17], v[48:49]1752; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[18:19], v[18:19], v[50:51]1753; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x21754; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[20:21], v[20:21], v[52:53]1755; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[22:23], v[22:23], v[54:55]1756; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x11757; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[24:25], v[24:25], v[32:33]1758; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[26:27], v[26:27], v[34:35]1759; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x01760; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[28:29], v[28:29], v[36:37]1761; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[30:31], v[30:31], v[38:39]1762; GFX1250-GISEL-NEXT: s_clause 0x71763; GFX1250-GISEL-NEXT: global_store_b128 v56, v[0:3], s[0:1]1764; GFX1250-GISEL-NEXT: global_store_b128 v56, v[4:7], s[0:1] offset:161765; GFX1250-GISEL-NEXT: global_store_b128 v56, v[8:11], s[0:1] offset:321766; GFX1250-GISEL-NEXT: global_store_b128 v56, v[12:15], s[0:1] offset:481767; GFX1250-GISEL-NEXT: global_store_b128 v56, v[16:19], s[0:1] offset:641768; GFX1250-GISEL-NEXT: global_store_b128 v56, v[20:23], s[0:1] offset:801769; GFX1250-GISEL-NEXT: global_store_b128 v56, v[24:27], s[0:1] offset:961770; GFX1250-GISEL-NEXT: global_store_b128 v56, v[28:31], s[0:1] offset:1121771; GFX1250-GISEL-NEXT: s_endpgm1772 %id = tail call i32 @llvm.amdgcn.workitem.id.x()1773 %gep = getelementptr inbounds <32 x float>, ptr addrspace(1) %a, i32 %id1774 %load = load <32 x float>, ptr addrspace(1) %gep, align 1281775 %mul = fmul <32 x float> %load, %x1776 store <32 x float> %mul, ptr addrspace(1) %gep, align 1281777 ret void1778}1779 1780define amdgpu_kernel void @fmul_v2_v_imm(ptr addrspace(1) %a) {1781; GFX900-LABEL: fmul_v2_v_imm:1782; GFX900: ; %bb.0:1783; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241784; GFX900-NEXT: v_lshlrev_b32_e32 v2, 3, v01785; GFX900-NEXT: s_waitcnt lgkmcnt(0)1786; GFX900-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]1787; GFX900-NEXT: s_waitcnt vmcnt(0)1788; GFX900-NEXT: v_mul_f32_e32 v1, 0x42c80000, v11789; GFX900-NEXT: v_mul_f32_e32 v0, 0x42c80000, v01790; GFX900-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1791; GFX900-NEXT: s_endpgm1792;1793; PACKED-SDAG-LABEL: fmul_v2_v_imm:1794; PACKED-SDAG: ; %bb.0:1795; PACKED-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241796; PACKED-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v01797; PACKED-SDAG-NEXT: v_lshlrev_b32_e32 v2, 3, v01798; PACKED-SDAG-NEXT: s_mov_b32 s2, 0x42c800001799; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)1800; PACKED-SDAG-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]1801; PACKED-SDAG-NEXT: s_waitcnt vmcnt(0)1802; PACKED-SDAG-NEXT: v_pk_mul_f32 v[0:1], v[0:1], s[2:3] op_sel_hi:[1,0]1803; PACKED-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1804; PACKED-SDAG-NEXT: s_endpgm1805;1806; PACKED-GISEL-LABEL: fmul_v2_v_imm:1807; PACKED-GISEL: ; %bb.0:1808; PACKED-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241809; PACKED-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v01810; PACKED-GISEL-NEXT: v_lshlrev_b32_e32 v2, 3, v01811; PACKED-GISEL-NEXT: s_mov_b32 s2, 0x42c800001812; PACKED-GISEL-NEXT: s_mov_b32 s3, s21813; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)1814; PACKED-GISEL-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]1815; PACKED-GISEL-NEXT: s_waitcnt vmcnt(0)1816; PACKED-GISEL-NEXT: v_pk_mul_f32 v[0:1], v[0:1], s[2:3]1817; PACKED-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1818; PACKED-GISEL-NEXT: s_endpgm1819;1820; GFX1250-SDAG-LABEL: fmul_v2_v_imm:1821; GFX1250-SDAG: ; %bb.0:1822; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11823; GFX1250-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x241824; GFX1250-SDAG-NEXT: v_and_b32_e32 v2, 0x3ff, v01825; GFX1250-SDAG-NEXT: s_mov_b32 s2, 0x42c800001826; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x01827; GFX1250-SDAG-NEXT: global_load_b64 v[0:1], v2, s[0:1] scale_offset1828; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x01829; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[0:1], v[0:1], s[2:3] op_sel_hi:[1,0]1830; GFX1250-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1] scale_offset1831; GFX1250-SDAG-NEXT: s_endpgm1832;1833; GFX1250-GISEL-LABEL: fmul_v2_v_imm:1834; GFX1250-GISEL: ; %bb.0:1835; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11836; GFX1250-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x241837; GFX1250-GISEL-NEXT: v_and_b32_e32 v4, 0x3ff, v01838; GFX1250-GISEL-NEXT: s_mov_b32 s2, 0x42c800001839; GFX1250-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)1840; GFX1250-GISEL-NEXT: s_mov_b32 s3, s21841; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[2:3]1842; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x01843; GFX1250-GISEL-NEXT: global_load_b64 v[0:1], v4, s[0:1] scale_offset1844; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x01845; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[0:1], v[0:1], v[2:3]1846; GFX1250-GISEL-NEXT: global_store_b64 v4, v[0:1], s[0:1] scale_offset1847; GFX1250-GISEL-NEXT: s_endpgm1848 %id = tail call i32 @llvm.amdgcn.workitem.id.x()1849 %gep = getelementptr inbounds <2 x float>, ptr addrspace(1) %a, i32 %id1850 %load = load <2 x float>, ptr addrspace(1) %gep, align 81851 %mul = fmul <2 x float> %load, <float 100.0, float 100.0>1852 store <2 x float> %mul, ptr addrspace(1) %gep, align 81853 ret void1854}1855 1856define amdgpu_kernel void @fmul_v2_v_v_splat(ptr addrspace(1) %a) {1857; GFX900-LABEL: fmul_v2_v_v_splat:1858; GFX900: ; %bb.0:1859; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241860; GFX900-NEXT: v_lshlrev_b32_e32 v3, 3, v01861; GFX900-NEXT: s_waitcnt lgkmcnt(0)1862; GFX900-NEXT: global_load_dwordx2 v[1:2], v3, s[0:1]1863; GFX900-NEXT: s_waitcnt vmcnt(0)1864; GFX900-NEXT: v_mul_f32_e32 v2, v2, v01865; GFX900-NEXT: v_mul_f32_e32 v1, v1, v01866; GFX900-NEXT: global_store_dwordx2 v3, v[1:2], s[0:1]1867; GFX900-NEXT: s_endpgm1868;1869; PACKED-SDAG-LABEL: fmul_v2_v_v_splat:1870; PACKED-SDAG: ; %bb.0:1871; PACKED-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241872; PACKED-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v01873; PACKED-SDAG-NEXT: v_lshlrev_b32_e32 v4, 3, v01874; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)1875; PACKED-SDAG-NEXT: global_load_dwordx2 v[2:3], v4, s[0:1]1876; PACKED-SDAG-NEXT: s_waitcnt vmcnt(0)1877; PACKED-SDAG-NEXT: v_pk_mul_f32 v[0:1], v[2:3], v[0:1] op_sel_hi:[1,0]1878; PACKED-SDAG-NEXT: global_store_dwordx2 v4, v[0:1], s[0:1]1879; PACKED-SDAG-NEXT: s_endpgm1880;1881; PACKED-GISEL-LABEL: fmul_v2_v_v_splat:1882; PACKED-GISEL: ; %bb.0:1883; PACKED-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241884; PACKED-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v01885; PACKED-GISEL-NEXT: v_lshlrev_b32_e32 v4, 3, v01886; PACKED-GISEL-NEXT: v_mov_b32_e32 v1, v01887; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)1888; PACKED-GISEL-NEXT: global_load_dwordx2 v[2:3], v4, s[0:1]1889; PACKED-GISEL-NEXT: s_waitcnt vmcnt(0)1890; PACKED-GISEL-NEXT: v_pk_mul_f32 v[0:1], v[2:3], v[0:1]1891; PACKED-GISEL-NEXT: global_store_dwordx2 v4, v[0:1], s[0:1]1892; PACKED-GISEL-NEXT: s_endpgm1893;1894; GFX1250-SDAG-LABEL: fmul_v2_v_v_splat:1895; GFX1250-SDAG: ; %bb.0:1896; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11897; GFX1250-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x241898; GFX1250-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v01899; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x01900; GFX1250-SDAG-NEXT: global_load_b64 v[2:3], v0, s[0:1] scale_offset1901; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x01902; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[2:3], v[2:3], v[0:1] op_sel_hi:[1,0]1903; GFX1250-SDAG-NEXT: global_store_b64 v0, v[2:3], s[0:1] scale_offset1904; GFX1250-SDAG-NEXT: s_endpgm1905;1906; GFX1250-GISEL-LABEL: fmul_v2_v_v_splat:1907; GFX1250-GISEL: ; %bb.0:1908; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11909; GFX1250-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x241910; GFX1250-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v01911; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)1912; GFX1250-GISEL-NEXT: v_mov_b32_e32 v1, v01913; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x01914; GFX1250-GISEL-NEXT: global_load_b64 v[2:3], v0, s[0:1] scale_offset1915; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x01916; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[2:3], v[2:3], v[0:1]1917; GFX1250-GISEL-NEXT: global_store_b64 v0, v[2:3], s[0:1] scale_offset1918; GFX1250-GISEL-NEXT: s_endpgm1919 %id = tail call i32 @llvm.amdgcn.workitem.id.x()1920 %gep = getelementptr inbounds <2 x float>, ptr addrspace(1) %a, i32 %id1921 %load = load <2 x float>, ptr addrspace(1) %gep, align 81922 %fid = bitcast i32 %id to float1923 %tmp1 = insertelement <2 x float> poison, float %fid, i64 01924 %k = insertelement <2 x float> %tmp1, float %fid, i64 11925 %mul = fmul <2 x float> %load, %k1926 store <2 x float> %mul, ptr addrspace(1) %gep, align 81927 ret void1928}1929 1930define amdgpu_kernel void @fmul_v2_v_lit_splat(ptr addrspace(1) %a) {1931; GFX900-LABEL: fmul_v2_v_lit_splat:1932; GFX900: ; %bb.0:1933; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241934; GFX900-NEXT: v_lshlrev_b32_e32 v2, 3, v01935; GFX900-NEXT: s_waitcnt lgkmcnt(0)1936; GFX900-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]1937; GFX900-NEXT: s_waitcnt vmcnt(0)1938; GFX900-NEXT: v_mul_f32_e32 v1, 4.0, v11939; GFX900-NEXT: v_mul_f32_e32 v0, 4.0, v01940; GFX900-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1941; GFX900-NEXT: s_endpgm1942;1943; PACKED-SDAG-LABEL: fmul_v2_v_lit_splat:1944; PACKED-SDAG: ; %bb.0:1945; PACKED-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241946; PACKED-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v01947; PACKED-SDAG-NEXT: v_lshlrev_b32_e32 v2, 3, v01948; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)1949; PACKED-SDAG-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]1950; PACKED-SDAG-NEXT: s_waitcnt vmcnt(0)1951; PACKED-SDAG-NEXT: v_pk_mul_f32 v[0:1], v[0:1], 4.0 op_sel_hi:[1,0]1952; PACKED-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1953; PACKED-SDAG-NEXT: s_endpgm1954;1955; PACKED-GISEL-LABEL: fmul_v2_v_lit_splat:1956; PACKED-GISEL: ; %bb.0:1957; PACKED-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241958; PACKED-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v01959; PACKED-GISEL-NEXT: v_lshlrev_b32_e32 v2, 3, v01960; PACKED-GISEL-NEXT: s_mov_b32 s2, 4.01961; PACKED-GISEL-NEXT: s_mov_b32 s3, s21962; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)1963; PACKED-GISEL-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]1964; PACKED-GISEL-NEXT: s_waitcnt vmcnt(0)1965; PACKED-GISEL-NEXT: v_pk_mul_f32 v[0:1], v[0:1], s[2:3]1966; PACKED-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1967; PACKED-GISEL-NEXT: s_endpgm1968;1969; GFX1250-SDAG-LABEL: fmul_v2_v_lit_splat:1970; GFX1250-SDAG: ; %bb.0:1971; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11972; GFX1250-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x241973; GFX1250-SDAG-NEXT: v_and_b32_e32 v2, 0x3ff, v01974; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x01975; GFX1250-SDAG-NEXT: global_load_b64 v[0:1], v2, s[0:1] scale_offset1976; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x01977; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[0:1], v[0:1], 4.0 op_sel_hi:[1,0]1978; GFX1250-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1] scale_offset1979; GFX1250-SDAG-NEXT: s_endpgm1980;1981; GFX1250-GISEL-LABEL: fmul_v2_v_lit_splat:1982; GFX1250-GISEL: ; %bb.0:1983; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 11984; GFX1250-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x241985; GFX1250-GISEL-NEXT: v_and_b32_e32 v4, 0x3ff, v01986; GFX1250-GISEL-NEXT: s_mov_b32 s2, 4.01987; GFX1250-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)1988; GFX1250-GISEL-NEXT: s_mov_b32 s3, s21989; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[2:3]1990; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x01991; GFX1250-GISEL-NEXT: global_load_b64 v[0:1], v4, s[0:1] scale_offset1992; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x01993; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[0:1], v[0:1], v[2:3]1994; GFX1250-GISEL-NEXT: global_store_b64 v4, v[0:1], s[0:1] scale_offset1995; GFX1250-GISEL-NEXT: s_endpgm1996 %id = tail call i32 @llvm.amdgcn.workitem.id.x()1997 %gep = getelementptr inbounds <2 x float>, ptr addrspace(1) %a, i32 %id1998 %load = load <2 x float>, ptr addrspace(1) %gep, align 81999 %mul = fmul <2 x float> %load, <float 4.0, float 4.0>2000 store <2 x float> %mul, ptr addrspace(1) %gep, align 82001 ret void2002}2003 2004define amdgpu_kernel void @fmul_v2_v_unfoldable_lit(ptr addrspace(1) %a) {2005; GFX900-LABEL: fmul_v2_v_unfoldable_lit:2006; GFX900: ; %bb.0:2007; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242008; GFX900-NEXT: v_lshlrev_b32_e32 v2, 3, v02009; GFX900-NEXT: s_waitcnt lgkmcnt(0)2010; GFX900-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]2011; GFX900-NEXT: s_waitcnt vmcnt(0)2012; GFX900-NEXT: v_mul_f32_e32 v1, 0x40400000, v12013; GFX900-NEXT: v_mul_f32_e32 v0, 4.0, v02014; GFX900-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]2015; GFX900-NEXT: s_endpgm2016;2017; PACKED-LABEL: fmul_v2_v_unfoldable_lit:2018; PACKED: ; %bb.0:2019; PACKED-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242020; PACKED-NEXT: v_and_b32_e32 v0, 0x3ff, v02021; PACKED-NEXT: v_lshlrev_b32_e32 v2, 3, v02022; PACKED-NEXT: s_mov_b32 s2, 4.02023; PACKED-NEXT: s_mov_b32 s3, 0x404000002024; PACKED-NEXT: s_waitcnt lgkmcnt(0)2025; PACKED-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]2026; PACKED-NEXT: s_waitcnt vmcnt(0)2027; PACKED-NEXT: v_pk_mul_f32 v[0:1], v[0:1], s[2:3]2028; PACKED-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]2029; PACKED-NEXT: s_endpgm2030;2031; GFX1250-SDAG-LABEL: fmul_v2_v_unfoldable_lit:2032; GFX1250-SDAG: ; %bb.0:2033; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 12034; GFX1250-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x242035; GFX1250-SDAG-NEXT: v_and_b32_e32 v4, 0x3ff, v02036; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[2:3], 0x40400000408000002037; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x02038; GFX1250-SDAG-NEXT: global_load_b64 v[0:1], v4, s[0:1] scale_offset2039; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x02040; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[0:1], v[0:1], v[2:3]2041; GFX1250-SDAG-NEXT: global_store_b64 v4, v[0:1], s[0:1] scale_offset2042; GFX1250-SDAG-NEXT: s_endpgm2043;2044; GFX1250-GISEL-LABEL: fmul_v2_v_unfoldable_lit:2045; GFX1250-GISEL: ; %bb.0:2046; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 12047; GFX1250-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x242048; GFX1250-GISEL-NEXT: v_and_b32_e32 v4, 0x3ff, v02049; GFX1250-GISEL-NEXT: s_mov_b64 s[2:3], 0x40400000408000002050; GFX1250-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)2051; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[2:3]2052; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x02053; GFX1250-GISEL-NEXT: global_load_b64 v[0:1], v4, s[0:1] scale_offset2054; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x02055; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[0:1], v[0:1], v[2:3]2056; GFX1250-GISEL-NEXT: global_store_b64 v4, v[0:1], s[0:1] scale_offset2057; GFX1250-GISEL-NEXT: s_endpgm2058 %id = tail call i32 @llvm.amdgcn.workitem.id.x()2059 %gep = getelementptr inbounds <2 x float>, ptr addrspace(1) %a, i32 %id2060 %load = load <2 x float>, ptr addrspace(1) %gep, align 82061 %mul = fmul <2 x float> %load, <float 4.0, float 3.0>2062 store <2 x float> %mul, ptr addrspace(1) %gep, align 82063 ret void2064}2065 2066define amdgpu_kernel void @fmul_v2_v_fneg(ptr addrspace(1) %a, float %x) {2067; GFX900-LABEL: fmul_v2_v_fneg:2068; GFX900: ; %bb.0:2069; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242070; GFX900-NEXT: s_load_dword s2, s[4:5], 0x2c2071; GFX900-NEXT: v_lshlrev_b32_e32 v2, 3, v02072; GFX900-NEXT: s_waitcnt lgkmcnt(0)2073; GFX900-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]2074; GFX900-NEXT: s_waitcnt vmcnt(0)2075; GFX900-NEXT: v_mul_f32_e64 v1, v1, -s22076; GFX900-NEXT: v_mul_f32_e64 v0, v0, -s22077; GFX900-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]2078; GFX900-NEXT: s_endpgm2079;2080; PACKED-SDAG-LABEL: fmul_v2_v_fneg:2081; PACKED-SDAG: ; %bb.0:2082; PACKED-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242083; PACKED-SDAG-NEXT: s_load_dword s2, s[4:5], 0x2c2084; PACKED-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v02085; PACKED-SDAG-NEXT: v_lshlrev_b32_e32 v2, 3, v02086; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)2087; PACKED-SDAG-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]2088; PACKED-SDAG-NEXT: s_waitcnt vmcnt(0)2089; PACKED-SDAG-NEXT: v_pk_mul_f32 v[0:1], v[0:1], s[2:3] op_sel_hi:[1,0] neg_lo:[0,1] neg_hi:[0,1]2090; PACKED-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]2091; PACKED-SDAG-NEXT: s_endpgm2092;2093; PACKED-GISEL-LABEL: fmul_v2_v_fneg:2094; PACKED-GISEL: ; %bb.0:2095; PACKED-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242096; PACKED-GISEL-NEXT: s_load_dword s2, s[4:5], 0x2c2097; PACKED-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v02098; PACKED-GISEL-NEXT: v_lshlrev_b32_e32 v4, 3, v02099; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)2100; PACKED-GISEL-NEXT: global_load_dwordx2 v[0:1], v4, s[0:1]2101; PACKED-GISEL-NEXT: v_max_f32_e64 v2, -s2, -s22102; PACKED-GISEL-NEXT: v_mov_b32_e32 v3, v22103; PACKED-GISEL-NEXT: s_waitcnt vmcnt(0)2104; PACKED-GISEL-NEXT: v_pk_mul_f32 v[0:1], v[0:1], v[2:3]2105; PACKED-GISEL-NEXT: global_store_dwordx2 v4, v[0:1], s[0:1]2106; PACKED-GISEL-NEXT: s_endpgm2107;2108; GFX1250-SDAG-LABEL: fmul_v2_v_fneg:2109; GFX1250-SDAG: ; %bb.0:2110; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 12111; GFX1250-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x242112; GFX1250-SDAG-NEXT: v_and_b32_e32 v2, 0x3ff, v02113; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x02114; GFX1250-SDAG-NEXT: global_load_b64 v[0:1], v2, s[0:1] scale_offset2115; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x02116; GFX1250-SDAG-NEXT: v_pk_mul_f32 v[0:1], v[0:1], s[2:3] op_sel_hi:[1,0] neg_lo:[0,1] neg_hi:[0,1]2117; GFX1250-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1] scale_offset2118; GFX1250-SDAG-NEXT: s_endpgm2119;2120; GFX1250-GISEL-LABEL: fmul_v2_v_fneg:2121; GFX1250-GISEL: ; %bb.0:2122; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 12123; GFX1250-GISEL-NEXT: s_load_b96 s[0:2], s[4:5], 0x242124; GFX1250-GISEL-NEXT: v_and_b32_e32 v4, 0x3ff, v02125; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x02126; GFX1250-GISEL-NEXT: global_load_b64 v[0:1], v4, s[0:1] scale_offset2127; GFX1250-GISEL-NEXT: v_max_num_f32_e64 v2, -s2, -s22128; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)2129; GFX1250-GISEL-NEXT: v_mov_b32_e32 v3, v22130; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x02131; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[0:1], v[0:1], v[2:3]2132; GFX1250-GISEL-NEXT: global_store_b64 v4, v[0:1], s[0:1] scale_offset2133; GFX1250-GISEL-NEXT: s_endpgm2134 %id = tail call i32 @llvm.amdgcn.workitem.id.x()2135 %gep = getelementptr inbounds <2 x float>, ptr addrspace(1) %a, i32 %id2136 %load = load <2 x float>, ptr addrspace(1) %gep, align 82137 %fneg = fsub float -0.0, %x2138 %tmp1 = insertelement <2 x float> poison, float %fneg, i64 02139 %k = insertelement <2 x float> %tmp1, float %fneg, i64 12140 %mul = fmul <2 x float> %load, %k2141 store <2 x float> %mul, ptr addrspace(1) %gep, align 82142 ret void2143}2144 2145define amdgpu_kernel void @fma_v2_vv(ptr addrspace(1) %a) {2146; GFX900-LABEL: fma_v2_vv:2147; GFX900: ; %bb.0:2148; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242149; GFX900-NEXT: v_lshlrev_b32_e32 v2, 3, v02150; GFX900-NEXT: s_waitcnt lgkmcnt(0)2151; GFX900-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]2152; GFX900-NEXT: s_waitcnt vmcnt(0)2153; GFX900-NEXT: v_fma_f32 v1, v1, v1, v12154; GFX900-NEXT: v_fma_f32 v0, v0, v0, v02155; GFX900-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]2156; GFX900-NEXT: s_endpgm2157;2158; PACKED-LABEL: fma_v2_vv:2159; PACKED: ; %bb.0:2160; PACKED-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242161; PACKED-NEXT: v_and_b32_e32 v0, 0x3ff, v02162; PACKED-NEXT: v_lshlrev_b32_e32 v2, 3, v02163; PACKED-NEXT: s_waitcnt lgkmcnt(0)2164; PACKED-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]2165; PACKED-NEXT: s_waitcnt vmcnt(0)2166; PACKED-NEXT: v_pk_fma_f32 v[0:1], v[0:1], v[0:1], v[0:1]2167; PACKED-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]2168; PACKED-NEXT: s_endpgm2169;2170; GFX1250-LABEL: fma_v2_vv:2171; GFX1250: ; %bb.0:2172; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 12173; GFX1250-NEXT: s_load_b64 s[0:1], s[4:5], 0x242174; GFX1250-NEXT: v_and_b32_e32 v2, 0x3ff, v02175; GFX1250-NEXT: s_wait_kmcnt 0x02176; GFX1250-NEXT: global_load_b64 v[0:1], v2, s[0:1] scale_offset2177; GFX1250-NEXT: s_wait_loadcnt 0x02178; GFX1250-NEXT: v_pk_fma_f32 v[0:1], v[0:1], v[0:1], v[0:1]2179; GFX1250-NEXT: global_store_b64 v2, v[0:1], s[0:1] scale_offset2180; GFX1250-NEXT: s_endpgm2181 %id = tail call i32 @llvm.amdgcn.workitem.id.x()2182 %gep = getelementptr inbounds <2 x float>, ptr addrspace(1) %a, i32 %id2183 %load = load <2 x float>, ptr addrspace(1) %gep, align 82184 %fma = tail call <2 x float> @llvm.fma.v2f32(<2 x float> %load, <2 x float> %load, <2 x float> %load)2185 store <2 x float> %fma, ptr addrspace(1) %gep, align 82186 ret void2187}2188 2189define amdgpu_kernel void @fma_v2_vs(ptr addrspace(1) %a, <2 x float> %x) {2190; GFX900-LABEL: fma_v2_vs:2191; GFX900: ; %bb.0:2192; GFX900-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242193; GFX900-NEXT: v_lshlrev_b32_e32 v2, 3, v02194; GFX900-NEXT: s_waitcnt lgkmcnt(0)2195; GFX900-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]2196; GFX900-NEXT: s_waitcnt vmcnt(0)2197; GFX900-NEXT: v_fma_f32 v1, v1, s3, s32198; GFX900-NEXT: v_fma_f32 v0, v0, s2, s22199; GFX900-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]2200; GFX900-NEXT: s_endpgm2201;2202; PACKED-LABEL: fma_v2_vs:2203; PACKED: ; %bb.0:2204; PACKED-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242205; PACKED-NEXT: v_and_b32_e32 v0, 0x3ff, v02206; PACKED-NEXT: v_lshlrev_b32_e32 v2, 3, v02207; PACKED-NEXT: s_waitcnt lgkmcnt(0)2208; PACKED-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]2209; PACKED-NEXT: s_waitcnt vmcnt(0)2210; PACKED-NEXT: v_pk_fma_f32 v[0:1], v[0:1], s[2:3], s[2:3]2211; PACKED-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]2212; PACKED-NEXT: s_endpgm2213;2214; GFX1250-LABEL: fma_v2_vs:2215; GFX1250: ; %bb.0:2216; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 12217; GFX1250-NEXT: s_load_b128 s[0:3], s[4:5], 0x242218; GFX1250-NEXT: v_and_b32_e32 v4, 0x3ff, v02219; GFX1250-NEXT: s_wait_kmcnt 0x02220; GFX1250-NEXT: global_load_b64 v[0:1], v4, s[0:1] scale_offset2221; GFX1250-NEXT: v_mov_b64_e32 v[2:3], s[2:3]2222; GFX1250-NEXT: s_wait_loadcnt 0x02223; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)2224; GFX1250-NEXT: v_pk_fma_f32 v[0:1], v[0:1], v[2:3], v[2:3]2225; GFX1250-NEXT: global_store_b64 v4, v[0:1], s[0:1] scale_offset2226; GFX1250-NEXT: s_endpgm2227 %id = tail call i32 @llvm.amdgcn.workitem.id.x()2228 %gep = getelementptr inbounds <2 x float>, ptr addrspace(1) %a, i32 %id2229 %load = load <2 x float>, ptr addrspace(1) %gep, align 82230 %fma = tail call <2 x float> @llvm.fma.v2f32(<2 x float> %load, <2 x float> %x, <2 x float> %x)2231 store <2 x float> %fma, ptr addrspace(1) %gep, align 82232 ret void2233}2234 2235define amdgpu_kernel void @fma_v4_vs(ptr addrspace(1) %a, <4 x float> %x) {2236; GFX900-LABEL: fma_v4_vs:2237; GFX900: ; %bb.0:2238; GFX900-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x242239; GFX900-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x342240; GFX900-NEXT: v_lshlrev_b32_e32 v4, 4, v02241; GFX900-NEXT: s_waitcnt lgkmcnt(0)2242; GFX900-NEXT: global_load_dwordx4 v[0:3], v4, s[6:7]2243; GFX900-NEXT: s_waitcnt vmcnt(0)2244; GFX900-NEXT: v_fma_f32 v3, v3, s3, s32245; GFX900-NEXT: v_fma_f32 v2, v2, s2, s22246; GFX900-NEXT: v_fma_f32 v1, v1, s1, s12247; GFX900-NEXT: v_fma_f32 v0, v0, s0, s02248; GFX900-NEXT: global_store_dwordx4 v4, v[0:3], s[6:7]2249; GFX900-NEXT: s_endpgm2250;2251; PACKED-SDAG-LABEL: fma_v4_vs:2252; PACKED-SDAG: ; %bb.0:2253; PACKED-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x242254; PACKED-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x342255; PACKED-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v02256; PACKED-SDAG-NEXT: v_lshlrev_b32_e32 v4, 4, v02257; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)2258; PACKED-SDAG-NEXT: global_load_dwordx4 v[0:3], v4, s[6:7]2259; PACKED-SDAG-NEXT: s_waitcnt vmcnt(0)2260; PACKED-SDAG-NEXT: v_pk_fma_f32 v[2:3], v[2:3], s[2:3], s[2:3]2261; PACKED-SDAG-NEXT: v_pk_fma_f32 v[0:1], v[0:1], s[0:1], s[0:1]2262; PACKED-SDAG-NEXT: global_store_dwordx4 v4, v[0:3], s[6:7]2263; PACKED-SDAG-NEXT: s_endpgm2264;2265; PACKED-GISEL-LABEL: fma_v4_vs:2266; PACKED-GISEL: ; %bb.0:2267; PACKED-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x242268; PACKED-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x342269; PACKED-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v02270; PACKED-GISEL-NEXT: v_lshlrev_b32_e32 v4, 4, v02271; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)2272; PACKED-GISEL-NEXT: global_load_dwordx4 v[0:3], v4, s[6:7]2273; PACKED-GISEL-NEXT: s_waitcnt vmcnt(0)2274; PACKED-GISEL-NEXT: v_pk_fma_f32 v[0:1], v[0:1], s[0:1], s[0:1]2275; PACKED-GISEL-NEXT: v_pk_fma_f32 v[2:3], v[2:3], s[2:3], s[2:3]2276; PACKED-GISEL-NEXT: global_store_dwordx4 v4, v[0:3], s[6:7]2277; PACKED-GISEL-NEXT: s_endpgm2278;2279; GFX1250-SDAG-LABEL: fma_v4_vs:2280; GFX1250-SDAG: ; %bb.0:2281; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 12282; GFX1250-SDAG-NEXT: s_clause 0x12283; GFX1250-SDAG-NEXT: s_load_b64 s[6:7], s[4:5], 0x242284; GFX1250-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x342285; GFX1250-SDAG-NEXT: v_and_b32_e32 v8, 0x3ff, v02286; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x02287; GFX1250-SDAG-NEXT: global_load_b128 v[0:3], v8, s[6:7] scale_offset2288; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[2:3]2289; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[0:1]2290; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x02291; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2292; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[2:3], v[2:3], v[4:5], v[4:5]2293; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[0:1], v[0:1], v[6:7], v[6:7]2294; GFX1250-SDAG-NEXT: global_store_b128 v8, v[0:3], s[6:7] scale_offset2295; GFX1250-SDAG-NEXT: s_endpgm2296;2297; GFX1250-GISEL-LABEL: fma_v4_vs:2298; GFX1250-GISEL: ; %bb.0:2299; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 12300; GFX1250-GISEL-NEXT: s_clause 0x12301; GFX1250-GISEL-NEXT: s_load_b64 s[6:7], s[4:5], 0x242302; GFX1250-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x342303; GFX1250-GISEL-NEXT: v_and_b32_e32 v8, 0x3ff, v02304; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x02305; GFX1250-GISEL-NEXT: global_load_b128 v[0:3], v8, s[6:7] scale_offset2306; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[4:5], s[0:1]2307; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[6:7], s[2:3]2308; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x02309; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2310; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[0:1], v[0:1], v[4:5], v[4:5]2311; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[2:3], v[2:3], v[6:7], v[6:7]2312; GFX1250-GISEL-NEXT: global_store_b128 v8, v[0:3], s[6:7] scale_offset2313; GFX1250-GISEL-NEXT: s_endpgm2314 %id = tail call i32 @llvm.amdgcn.workitem.id.x()2315 %gep = getelementptr inbounds <4 x float>, ptr addrspace(1) %a, i32 %id2316 %load = load <4 x float>, ptr addrspace(1) %gep, align 162317 %fma = tail call <4 x float> @llvm.fma.v4f32(<4 x float> %load, <4 x float> %x, <4 x float> %x)2318 store <4 x float> %fma, ptr addrspace(1) %gep, align 162319 ret void2320}2321 2322define amdgpu_kernel void @fma_v32_vs(ptr addrspace(1) %a, <32 x float> %x) {2323; GFX900-LABEL: fma_v32_vs:2324; GFX900: ; %bb.0:2325; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242326; GFX900-NEXT: v_lshlrev_b32_e32 v0, 7, v02327; GFX900-NEXT: s_load_dwordx16 s[36:51], s[4:5], 0xa42328; GFX900-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0xe42329; GFX900-NEXT: s_waitcnt lgkmcnt(0)2330; GFX900-NEXT: global_load_dwordx4 v[25:28], v0, s[0:1] offset:1122331; GFX900-NEXT: global_load_dwordx4 v[29:32], v0, s[0:1] offset:962332; GFX900-NEXT: global_load_dwordx4 v[1:4], v0, s[0:1] offset:162333; GFX900-NEXT: global_load_dwordx4 v[5:8], v0, s[0:1]2334; GFX900-NEXT: global_load_dwordx4 v[9:12], v0, s[0:1] offset:482335; GFX900-NEXT: global_load_dwordx4 v[13:16], v0, s[0:1] offset:322336; GFX900-NEXT: global_load_dwordx4 v[17:20], v0, s[0:1] offset:802337; GFX900-NEXT: global_load_dwordx4 v[21:24], v0, s[0:1] offset:642338; GFX900-NEXT: s_waitcnt vmcnt(5)2339; GFX900-NEXT: v_fma_f32 v4, v4, s43, s432340; GFX900-NEXT: v_fma_f32 v3, v3, s42, s422341; GFX900-NEXT: v_fma_f32 v2, v2, s41, s412342; GFX900-NEXT: v_fma_f32 v1, v1, s40, s402343; GFX900-NEXT: v_fma_f32 v32, v32, s19, s192344; GFX900-NEXT: v_fma_f32 v31, v31, s18, s182345; GFX900-NEXT: v_fma_f32 v30, v30, s17, s172346; GFX900-NEXT: v_fma_f32 v29, v29, s16, s162347; GFX900-NEXT: s_waitcnt vmcnt(4)2348; GFX900-NEXT: v_fma_f32 v8, v8, s39, s392349; GFX900-NEXT: v_fma_f32 v7, v7, s38, s382350; GFX900-NEXT: v_fma_f32 v6, v6, s37, s372351; GFX900-NEXT: v_fma_f32 v5, v5, s36, s362352; GFX900-NEXT: s_waitcnt vmcnt(3)2353; GFX900-NEXT: v_fma_f32 v12, v12, s51, s512354; GFX900-NEXT: v_fma_f32 v11, v11, s50, s502355; GFX900-NEXT: v_fma_f32 v10, v10, s49, s492356; GFX900-NEXT: v_fma_f32 v9, v9, s48, s482357; GFX900-NEXT: s_waitcnt vmcnt(2)2358; GFX900-NEXT: v_fma_f32 v16, v16, s47, s472359; GFX900-NEXT: v_fma_f32 v15, v15, s46, s462360; GFX900-NEXT: v_fma_f32 v14, v14, s45, s452361; GFX900-NEXT: v_fma_f32 v13, v13, s44, s442362; GFX900-NEXT: s_waitcnt vmcnt(1)2363; GFX900-NEXT: v_fma_f32 v20, v20, s15, s152364; GFX900-NEXT: v_fma_f32 v19, v19, s14, s142365; GFX900-NEXT: v_fma_f32 v18, v18, s13, s132366; GFX900-NEXT: v_fma_f32 v17, v17, s12, s122367; GFX900-NEXT: s_waitcnt vmcnt(0)2368; GFX900-NEXT: v_fma_f32 v24, v24, s11, s112369; GFX900-NEXT: v_fma_f32 v23, v23, s10, s102370; GFX900-NEXT: v_fma_f32 v22, v22, s9, s92371; GFX900-NEXT: v_fma_f32 v21, v21, s8, s82372; GFX900-NEXT: v_fma_f32 v28, v28, s23, s232373; GFX900-NEXT: v_fma_f32 v27, v27, s22, s222374; GFX900-NEXT: v_fma_f32 v26, v26, s21, s212375; GFX900-NEXT: v_fma_f32 v25, v25, s20, s202376; GFX900-NEXT: global_store_dwordx4 v0, v[29:32], s[0:1] offset:962377; GFX900-NEXT: global_store_dwordx4 v0, v[25:28], s[0:1] offset:1122378; GFX900-NEXT: global_store_dwordx4 v0, v[21:24], s[0:1] offset:642379; GFX900-NEXT: global_store_dwordx4 v0, v[17:20], s[0:1] offset:802380; GFX900-NEXT: global_store_dwordx4 v0, v[13:16], s[0:1] offset:322381; GFX900-NEXT: global_store_dwordx4 v0, v[9:12], s[0:1] offset:482382; GFX900-NEXT: global_store_dwordx4 v0, v[5:8], s[0:1]2383; GFX900-NEXT: global_store_dwordx4 v0, v[1:4], s[0:1] offset:162384; GFX900-NEXT: s_endpgm2385;2386; PACKED-SDAG-LABEL: fma_v32_vs:2387; PACKED-SDAG: ; %bb.0:2388; PACKED-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242389; PACKED-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v02390; PACKED-SDAG-NEXT: v_lshlrev_b32_e32 v32, 7, v02391; PACKED-SDAG-NEXT: s_load_dwordx16 s[36:51], s[4:5], 0xa42392; PACKED-SDAG-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0xe42393; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)2394; PACKED-SDAG-NEXT: global_load_dwordx4 v[0:3], v32, s[0:1] offset:162395; PACKED-SDAG-NEXT: global_load_dwordx4 v[4:7], v32, s[0:1]2396; PACKED-SDAG-NEXT: global_load_dwordx4 v[8:11], v32, s[0:1] offset:482397; PACKED-SDAG-NEXT: global_load_dwordx4 v[16:19], v32, s[0:1] offset:322398; PACKED-SDAG-NEXT: global_load_dwordx4 v[20:23], v32, s[0:1] offset:802399; PACKED-SDAG-NEXT: global_load_dwordx4 v[12:15], v32, s[0:1] offset:642400; PACKED-SDAG-NEXT: global_load_dwordx4 v[24:27], v32, s[0:1] offset:1122401; PACKED-SDAG-NEXT: global_load_dwordx4 v[28:31], v32, s[0:1] offset:962402; PACKED-SDAG-NEXT: s_waitcnt vmcnt(7)2403; PACKED-SDAG-NEXT: v_pk_fma_f32 v[0:1], v[0:1], s[40:41], s[40:41]2404; PACKED-SDAG-NEXT: v_pk_fma_f32 v[2:3], v[2:3], s[42:43], s[42:43]2405; PACKED-SDAG-NEXT: s_waitcnt vmcnt(6)2406; PACKED-SDAG-NEXT: v_pk_fma_f32 v[6:7], v[6:7], s[38:39], s[38:39]2407; PACKED-SDAG-NEXT: s_waitcnt vmcnt(5)2408; PACKED-SDAG-NEXT: v_pk_fma_f32 v[8:9], v[8:9], s[48:49], s[48:49]2409; PACKED-SDAG-NEXT: v_pk_fma_f32 v[10:11], v[10:11], s[50:51], s[50:51]2410; PACKED-SDAG-NEXT: s_waitcnt vmcnt(4)2411; PACKED-SDAG-NEXT: v_pk_fma_f32 v[16:17], v[16:17], s[44:45], s[44:45]2412; PACKED-SDAG-NEXT: v_pk_fma_f32 v[18:19], v[18:19], s[46:47], s[46:47]2413; PACKED-SDAG-NEXT: s_waitcnt vmcnt(0)2414; PACKED-SDAG-NEXT: v_pk_fma_f32 v[28:29], v[28:29], s[16:17], s[16:17]2415; PACKED-SDAG-NEXT: v_pk_fma_f32 v[30:31], v[30:31], s[18:19], s[18:19]2416; PACKED-SDAG-NEXT: v_pk_fma_f32 v[20:21], v[20:21], s[12:13], s[12:13]2417; PACKED-SDAG-NEXT: v_pk_fma_f32 v[22:23], v[22:23], s[14:15], s[14:15]2418; PACKED-SDAG-NEXT: v_pk_fma_f32 v[14:15], v[14:15], s[10:11], s[10:11]2419; PACKED-SDAG-NEXT: v_pk_fma_f32 v[24:25], v[24:25], s[20:21], s[20:21]2420; PACKED-SDAG-NEXT: v_pk_fma_f32 v[26:27], v[26:27], s[22:23], s[22:23]2421; PACKED-SDAG-NEXT: v_pk_fma_f32 v[4:5], v[4:5], s[36:37], s[36:37]2422; PACKED-SDAG-NEXT: v_pk_fma_f32 v[12:13], v[12:13], s[8:9], s[8:9]2423; PACKED-SDAG-NEXT: global_store_dwordx4 v32, v[28:31], s[0:1] offset:962424; PACKED-SDAG-NEXT: global_store_dwordx4 v32, v[24:27], s[0:1] offset:1122425; PACKED-SDAG-NEXT: global_store_dwordx4 v32, v[12:15], s[0:1] offset:642426; PACKED-SDAG-NEXT: global_store_dwordx4 v32, v[20:23], s[0:1] offset:802427; PACKED-SDAG-NEXT: global_store_dwordx4 v32, v[16:19], s[0:1] offset:322428; PACKED-SDAG-NEXT: global_store_dwordx4 v32, v[8:11], s[0:1] offset:482429; PACKED-SDAG-NEXT: global_store_dwordx4 v32, v[4:7], s[0:1]2430; PACKED-SDAG-NEXT: global_store_dwordx4 v32, v[0:3], s[0:1] offset:162431; PACKED-SDAG-NEXT: s_endpgm2432;2433; PACKED-GISEL-LABEL: fma_v32_vs:2434; PACKED-GISEL: ; %bb.0:2435; PACKED-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242436; PACKED-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v02437; PACKED-GISEL-NEXT: v_lshlrev_b32_e32 v32, 7, v02438; PACKED-GISEL-NEXT: s_load_dwordx16 s[36:51], s[4:5], 0xa42439; PACKED-GISEL-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0xe42440; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)2441; PACKED-GISEL-NEXT: global_load_dwordx4 v[0:3], v32, s[0:1]2442; PACKED-GISEL-NEXT: global_load_dwordx4 v[4:7], v32, s[0:1] offset:162443; PACKED-GISEL-NEXT: global_load_dwordx4 v[8:11], v32, s[0:1] offset:322444; PACKED-GISEL-NEXT: global_load_dwordx4 v[12:15], v32, s[0:1] offset:482445; PACKED-GISEL-NEXT: global_load_dwordx4 v[16:19], v32, s[0:1] offset:642446; PACKED-GISEL-NEXT: global_load_dwordx4 v[20:23], v32, s[0:1] offset:802447; PACKED-GISEL-NEXT: global_load_dwordx4 v[24:27], v32, s[0:1] offset:962448; PACKED-GISEL-NEXT: global_load_dwordx4 v[28:31], v32, s[0:1] offset:1122449; PACKED-GISEL-NEXT: s_waitcnt vmcnt(7)2450; PACKED-GISEL-NEXT: v_pk_fma_f32 v[0:1], v[0:1], s[36:37], s[36:37]2451; PACKED-GISEL-NEXT: v_pk_fma_f32 v[2:3], v[2:3], s[38:39], s[38:39]2452; PACKED-GISEL-NEXT: s_waitcnt vmcnt(6)2453; PACKED-GISEL-NEXT: v_pk_fma_f32 v[4:5], v[4:5], s[40:41], s[40:41]2454; PACKED-GISEL-NEXT: v_pk_fma_f32 v[6:7], v[6:7], s[42:43], s[42:43]2455; PACKED-GISEL-NEXT: s_waitcnt vmcnt(5)2456; PACKED-GISEL-NEXT: v_pk_fma_f32 v[8:9], v[8:9], s[44:45], s[44:45]2457; PACKED-GISEL-NEXT: v_pk_fma_f32 v[10:11], v[10:11], s[46:47], s[46:47]2458; PACKED-GISEL-NEXT: s_waitcnt vmcnt(4)2459; PACKED-GISEL-NEXT: v_pk_fma_f32 v[12:13], v[12:13], s[48:49], s[48:49]2460; PACKED-GISEL-NEXT: v_pk_fma_f32 v[14:15], v[14:15], s[50:51], s[50:51]2461; PACKED-GISEL-NEXT: s_waitcnt vmcnt(3)2462; PACKED-GISEL-NEXT: v_pk_fma_f32 v[16:17], v[16:17], s[8:9], s[8:9]2463; PACKED-GISEL-NEXT: v_pk_fma_f32 v[18:19], v[18:19], s[10:11], s[10:11]2464; PACKED-GISEL-NEXT: s_waitcnt vmcnt(2)2465; PACKED-GISEL-NEXT: v_pk_fma_f32 v[20:21], v[20:21], s[12:13], s[12:13]2466; PACKED-GISEL-NEXT: v_pk_fma_f32 v[22:23], v[22:23], s[14:15], s[14:15]2467; PACKED-GISEL-NEXT: s_waitcnt vmcnt(1)2468; PACKED-GISEL-NEXT: v_pk_fma_f32 v[24:25], v[24:25], s[16:17], s[16:17]2469; PACKED-GISEL-NEXT: v_pk_fma_f32 v[26:27], v[26:27], s[18:19], s[18:19]2470; PACKED-GISEL-NEXT: s_waitcnt vmcnt(0)2471; PACKED-GISEL-NEXT: v_pk_fma_f32 v[28:29], v[28:29], s[20:21], s[20:21]2472; PACKED-GISEL-NEXT: v_pk_fma_f32 v[30:31], v[30:31], s[22:23], s[22:23]2473; PACKED-GISEL-NEXT: global_store_dwordx4 v32, v[0:3], s[0:1]2474; PACKED-GISEL-NEXT: global_store_dwordx4 v32, v[4:7], s[0:1] offset:162475; PACKED-GISEL-NEXT: global_store_dwordx4 v32, v[8:11], s[0:1] offset:322476; PACKED-GISEL-NEXT: global_store_dwordx4 v32, v[12:15], s[0:1] offset:482477; PACKED-GISEL-NEXT: global_store_dwordx4 v32, v[16:19], s[0:1] offset:642478; PACKED-GISEL-NEXT: global_store_dwordx4 v32, v[20:23], s[0:1] offset:802479; PACKED-GISEL-NEXT: global_store_dwordx4 v32, v[24:27], s[0:1] offset:962480; PACKED-GISEL-NEXT: global_store_dwordx4 v32, v[28:31], s[0:1] offset:1122481; PACKED-GISEL-NEXT: s_endpgm2482;2483; GFX1250-SDAG-LABEL: fma_v32_vs:2484; GFX1250-SDAG: ; %bb.0:2485; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 12486; GFX1250-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x242487; GFX1250-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v02488; GFX1250-SDAG-NEXT: s_clause 0x12489; GFX1250-SDAG-NEXT: s_load_b512 s[36:51], s[4:5], 0xa42490; GFX1250-SDAG-NEXT: s_load_b512 s[8:23], s[4:5], 0xe42491; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)2492; GFX1250-SDAG-NEXT: v_lshlrev_b32_e32 v56, 7, v02493; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x02494; GFX1250-SDAG-NEXT: s_clause 0x72495; GFX1250-SDAG-NEXT: global_load_b128 v[0:3], v56, s[0:1] offset:162496; GFX1250-SDAG-NEXT: global_load_b128 v[4:7], v56, s[0:1] offset:482497; GFX1250-SDAG-NEXT: global_load_b128 v[8:11], v56, s[0:1] offset:322498; GFX1250-SDAG-NEXT: global_load_b128 v[12:15], v56, s[0:1]2499; GFX1250-SDAG-NEXT: global_load_b128 v[16:19], v56, s[0:1] offset:802500; GFX1250-SDAG-NEXT: global_load_b128 v[20:23], v56, s[0:1] offset:962501; GFX1250-SDAG-NEXT: global_load_b128 v[24:27], v56, s[0:1] offset:642502; GFX1250-SDAG-NEXT: global_load_b128 v[28:31], v56, s[0:1] offset:1122503; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[32:33], s[40:41]2504; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[34:35], s[42:43]2505; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[40:41], s[50:51]2506; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[38:39], s[48:49]2507; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[52:53], s[20:21]2508; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[54:55], s[22:23]2509; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[50:51], s[10:11]2510; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[46:47], s[12:13]2511; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[48:49], s[14:15]2512; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[42:43], s[44:45]2513; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[44:45], s[46:47]2514; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[36:37], s[38:39]2515; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x72516; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[0:1], v[0:1], v[32:33], v[32:33]2517; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[2:3], v[2:3], v[34:35], v[34:35]2518; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[32:33], s[16:17]2519; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[34:35], s[18:19]2520; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x62521; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[6:7], v[6:7], v[40:41], v[40:41]2522; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[40:41], s[8:9]2523; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[4:5], v[4:5], v[38:39], v[38:39]2524; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[38:39], s[36:37]2525; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x02526; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[28:29], v[28:29], v[52:53], v[52:53]2527; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[20:21], v[20:21], v[32:33], v[32:33]2528; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[22:23], v[22:23], v[34:35], v[34:35]2529; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[30:31], v[30:31], v[54:55], v[54:55]2530; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[26:27], v[26:27], v[50:51], v[50:51]2531; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[24:25], v[24:25], v[40:41], v[40:41]2532; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[16:17], v[16:17], v[46:47], v[46:47]2533; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[18:19], v[18:19], v[48:49], v[48:49]2534; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[8:9], v[8:9], v[42:43], v[42:43]2535; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[10:11], v[10:11], v[44:45], v[44:45]2536; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[14:15], v[14:15], v[36:37], v[36:37]2537; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[12:13], v[12:13], v[38:39], v[38:39]2538; GFX1250-SDAG-NEXT: s_clause 0x72539; GFX1250-SDAG-NEXT: global_store_b128 v56, v[20:23], s[0:1] offset:962540; GFX1250-SDAG-NEXT: global_store_b128 v56, v[28:31], s[0:1] offset:1122541; GFX1250-SDAG-NEXT: global_store_b128 v56, v[24:27], s[0:1] offset:642542; GFX1250-SDAG-NEXT: global_store_b128 v56, v[16:19], s[0:1] offset:802543; GFX1250-SDAG-NEXT: global_store_b128 v56, v[8:11], s[0:1] offset:322544; GFX1250-SDAG-NEXT: global_store_b128 v56, v[4:7], s[0:1] offset:482545; GFX1250-SDAG-NEXT: global_store_b128 v56, v[12:15], s[0:1]2546; GFX1250-SDAG-NEXT: global_store_b128 v56, v[0:3], s[0:1] offset:162547; GFX1250-SDAG-NEXT: s_endpgm2548;2549; GFX1250-GISEL-LABEL: fma_v32_vs:2550; GFX1250-GISEL: ; %bb.0:2551; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 12552; GFX1250-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x242553; GFX1250-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v02554; GFX1250-GISEL-NEXT: s_clause 0x12555; GFX1250-GISEL-NEXT: s_load_b512 s[36:51], s[4:5], 0xa42556; GFX1250-GISEL-NEXT: s_load_b512 s[8:23], s[4:5], 0xe42557; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)2558; GFX1250-GISEL-NEXT: v_lshlrev_b32_e32 v56, 7, v02559; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x02560; GFX1250-GISEL-NEXT: s_clause 0x72561; GFX1250-GISEL-NEXT: global_load_b128 v[0:3], v56, s[0:1]2562; GFX1250-GISEL-NEXT: global_load_b128 v[4:7], v56, s[0:1] offset:162563; GFX1250-GISEL-NEXT: global_load_b128 v[8:11], v56, s[0:1] offset:322564; GFX1250-GISEL-NEXT: global_load_b128 v[12:15], v56, s[0:1] offset:482565; GFX1250-GISEL-NEXT: global_load_b128 v[16:19], v56, s[0:1] offset:642566; GFX1250-GISEL-NEXT: global_load_b128 v[20:23], v56, s[0:1] offset:802567; GFX1250-GISEL-NEXT: global_load_b128 v[24:27], v56, s[0:1] offset:962568; GFX1250-GISEL-NEXT: global_load_b128 v[28:31], v56, s[0:1] offset:1122569; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[32:33], s[36:37]2570; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[34:35], s[38:39]2571; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[36:37], s[40:41]2572; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[38:39], s[42:43]2573; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[40:41], s[44:45]2574; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[42:43], s[46:47]2575; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[44:45], s[48:49]2576; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[46:47], s[50:51]2577; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[48:49], s[8:9]2578; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[50:51], s[10:11]2579; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[52:53], s[12:13]2580; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[54:55], s[14:15]2581; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x72582; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[0:1], v[0:1], v[32:33], v[32:33]2583; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[2:3], v[2:3], v[34:35], v[34:35]2584; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[32:33], s[16:17]2585; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[34:35], s[18:19]2586; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x62587; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[4:5], v[4:5], v[36:37], v[36:37]2588; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[6:7], v[6:7], v[38:39], v[38:39]2589; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[36:37], s[20:21]2590; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[38:39], s[22:23]2591; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x52592; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[8:9], v[8:9], v[40:41], v[40:41]2593; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[10:11], v[10:11], v[42:43], v[42:43]2594; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x42595; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[12:13], v[12:13], v[44:45], v[44:45]2596; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[14:15], v[14:15], v[46:47], v[46:47]2597; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x32598; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[16:17], v[16:17], v[48:49], v[48:49]2599; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[18:19], v[18:19], v[50:51], v[50:51]2600; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x22601; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[20:21], v[20:21], v[52:53], v[52:53]2602; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[22:23], v[22:23], v[54:55], v[54:55]2603; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x12604; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[24:25], v[24:25], v[32:33], v[32:33]2605; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[26:27], v[26:27], v[34:35], v[34:35]2606; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x02607; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[28:29], v[28:29], v[36:37], v[36:37]2608; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[30:31], v[30:31], v[38:39], v[38:39]2609; GFX1250-GISEL-NEXT: s_clause 0x72610; GFX1250-GISEL-NEXT: global_store_b128 v56, v[0:3], s[0:1]2611; GFX1250-GISEL-NEXT: global_store_b128 v56, v[4:7], s[0:1] offset:162612; GFX1250-GISEL-NEXT: global_store_b128 v56, v[8:11], s[0:1] offset:322613; GFX1250-GISEL-NEXT: global_store_b128 v56, v[12:15], s[0:1] offset:482614; GFX1250-GISEL-NEXT: global_store_b128 v56, v[16:19], s[0:1] offset:642615; GFX1250-GISEL-NEXT: global_store_b128 v56, v[20:23], s[0:1] offset:802616; GFX1250-GISEL-NEXT: global_store_b128 v56, v[24:27], s[0:1] offset:962617; GFX1250-GISEL-NEXT: global_store_b128 v56, v[28:31], s[0:1] offset:1122618; GFX1250-GISEL-NEXT: s_endpgm2619 %id = tail call i32 @llvm.amdgcn.workitem.id.x()2620 %gep = getelementptr inbounds <32 x float>, ptr addrspace(1) %a, i32 %id2621 %load = load <32 x float>, ptr addrspace(1) %gep, align 1282622 %fma = tail call <32 x float> @llvm.fma.v32f32(<32 x float> %load, <32 x float> %x, <32 x float> %x)2623 store <32 x float> %fma, ptr addrspace(1) %gep, align 1282624 ret void2625}2626 2627define amdgpu_kernel void @fma_v2_v_imm(ptr addrspace(1) %a) {2628; GFX900-LABEL: fma_v2_v_imm:2629; GFX900: ; %bb.0:2630; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242631; GFX900-NEXT: v_lshlrev_b32_e32 v2, 3, v02632; GFX900-NEXT: s_mov_b32 s2, 0x42c800002633; GFX900-NEXT: v_mov_b32_e32 v3, 0x434800002634; GFX900-NEXT: s_waitcnt lgkmcnt(0)2635; GFX900-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]2636; GFX900-NEXT: s_waitcnt vmcnt(0)2637; GFX900-NEXT: v_fma_f32 v1, v1, s2, v32638; GFX900-NEXT: v_fma_f32 v0, v0, s2, v32639; GFX900-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]2640; GFX900-NEXT: s_endpgm2641;2642; PACKED-SDAG-LABEL: fma_v2_v_imm:2643; PACKED-SDAG: ; %bb.0:2644; PACKED-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242645; PACKED-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v02646; PACKED-SDAG-NEXT: v_lshlrev_b32_e32 v3, 3, v02647; PACKED-SDAG-NEXT: v_mov_b32_e32 v2, 0x434800002648; PACKED-SDAG-NEXT: s_mov_b32 s2, 0x42c800002649; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)2650; PACKED-SDAG-NEXT: global_load_dwordx2 v[0:1], v3, s[0:1]2651; PACKED-SDAG-NEXT: s_waitcnt vmcnt(0)2652; PACKED-SDAG-NEXT: v_pk_fma_f32 v[0:1], v[0:1], s[2:3], v[2:3] op_sel_hi:[1,0,0]2653; PACKED-SDAG-NEXT: global_store_dwordx2 v3, v[0:1], s[0:1]2654; PACKED-SDAG-NEXT: s_endpgm2655;2656; GFX90A-GISEL-LABEL: fma_v2_v_imm:2657; GFX90A-GISEL: ; %bb.0:2658; GFX90A-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242659; GFX90A-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v02660; GFX90A-GISEL-NEXT: v_lshlrev_b32_e32 v4, 3, v02661; GFX90A-GISEL-NEXT: s_mov_b32 s4, 0x434800002662; GFX90A-GISEL-NEXT: s_mov_b32 s2, 0x42c800002663; GFX90A-GISEL-NEXT: s_waitcnt lgkmcnt(0)2664; GFX90A-GISEL-NEXT: global_load_dwordx2 v[0:1], v4, s[0:1]2665; GFX90A-GISEL-NEXT: s_mov_b32 s5, s42666; GFX90A-GISEL-NEXT: s_mov_b32 s3, s22667; GFX90A-GISEL-NEXT: v_pk_mov_b32 v[2:3], s[4:5], s[4:5] op_sel:[0,1]2668; GFX90A-GISEL-NEXT: s_waitcnt vmcnt(0)2669; GFX90A-GISEL-NEXT: v_pk_fma_f32 v[0:1], v[0:1], s[2:3], v[2:3]2670; GFX90A-GISEL-NEXT: global_store_dwordx2 v4, v[0:1], s[0:1]2671; GFX90A-GISEL-NEXT: s_endpgm2672;2673; GFX942-GISEL-LABEL: fma_v2_v_imm:2674; GFX942-GISEL: ; %bb.0:2675; GFX942-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242676; GFX942-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v02677; GFX942-GISEL-NEXT: v_lshlrev_b32_e32 v4, 3, v02678; GFX942-GISEL-NEXT: s_mov_b32 s4, 0x434800002679; GFX942-GISEL-NEXT: s_mov_b32 s2, 0x42c800002680; GFX942-GISEL-NEXT: s_waitcnt lgkmcnt(0)2681; GFX942-GISEL-NEXT: global_load_dwordx2 v[0:1], v4, s[0:1]2682; GFX942-GISEL-NEXT: s_mov_b32 s5, s42683; GFX942-GISEL-NEXT: s_mov_b32 s3, s22684; GFX942-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[4:5]2685; GFX942-GISEL-NEXT: s_waitcnt vmcnt(0)2686; GFX942-GISEL-NEXT: v_pk_fma_f32 v[0:1], v[0:1], s[2:3], v[2:3]2687; GFX942-GISEL-NEXT: global_store_dwordx2 v4, v[0:1], s[0:1]2688; GFX942-GISEL-NEXT: s_endpgm2689;2690; GFX1250-SDAG-LABEL: fma_v2_v_imm:2691; GFX1250-SDAG: ; %bb.0:2692; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 12693; GFX1250-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x242694; GFX1250-SDAG-NEXT: v_and_b32_e32 v2, 0x3ff, v02695; GFX1250-SDAG-NEXT: s_mov_b32 s2, 0x434800002696; GFX1250-SDAG-NEXT: s_wait_xcnt 0x02697; GFX1250-SDAG-NEXT: s_mov_b32 s4, 0x42c800002698; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x02699; GFX1250-SDAG-NEXT: global_load_b64 v[0:1], v2, s[0:1] scale_offset2700; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x02701; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[0:1], v[0:1], s[4:5], s[2:3] op_sel_hi:[1,0,0]2702; GFX1250-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1] scale_offset2703; GFX1250-SDAG-NEXT: s_endpgm2704;2705; GFX1250-GISEL-LABEL: fma_v2_v_imm:2706; GFX1250-GISEL: ; %bb.0:2707; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 12708; GFX1250-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x242709; GFX1250-GISEL-NEXT: v_and_b32_e32 v6, 0x3ff, v02710; GFX1250-GISEL-NEXT: s_mov_b32 s2, 0x42c800002711; GFX1250-GISEL-NEXT: s_wait_xcnt 0x02712; GFX1250-GISEL-NEXT: s_mov_b32 s4, 0x434800002713; GFX1250-GISEL-NEXT: s_mov_b32 s3, s22714; GFX1250-GISEL-NEXT: s_mov_b32 s5, s42715; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[2:3]2716; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[4:5], s[4:5]2717; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x02718; GFX1250-GISEL-NEXT: global_load_b64 v[0:1], v6, s[0:1] scale_offset2719; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x02720; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[0:1], v[0:1], v[2:3], v[4:5]2721; GFX1250-GISEL-NEXT: global_store_b64 v6, v[0:1], s[0:1] scale_offset2722; GFX1250-GISEL-NEXT: s_endpgm2723 %id = tail call i32 @llvm.amdgcn.workitem.id.x()2724 %gep = getelementptr inbounds <2 x float>, ptr addrspace(1) %a, i32 %id2725 %load = load <2 x float>, ptr addrspace(1) %gep, align 82726 %fma = tail call <2 x float> @llvm.fma.v2f32(<2 x float> %load, <2 x float> <float 100.0, float 100.0>, <2 x float> <float 200.0, float 200.0>)2727 store <2 x float> %fma, ptr addrspace(1) %gep, align 82728 ret void2729}2730 2731define amdgpu_kernel void @fma_v2_v_v_splat(ptr addrspace(1) %a) {2732; GFX900-LABEL: fma_v2_v_v_splat:2733; GFX900: ; %bb.0:2734; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242735; GFX900-NEXT: v_lshlrev_b32_e32 v3, 3, v02736; GFX900-NEXT: s_waitcnt lgkmcnt(0)2737; GFX900-NEXT: global_load_dwordx2 v[1:2], v3, s[0:1]2738; GFX900-NEXT: s_waitcnt vmcnt(0)2739; GFX900-NEXT: v_fma_f32 v2, v2, v0, v02740; GFX900-NEXT: v_fma_f32 v1, v1, v0, v02741; GFX900-NEXT: global_store_dwordx2 v3, v[1:2], s[0:1]2742; GFX900-NEXT: s_endpgm2743;2744; PACKED-SDAG-LABEL: fma_v2_v_v_splat:2745; PACKED-SDAG: ; %bb.0:2746; PACKED-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242747; PACKED-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v02748; PACKED-SDAG-NEXT: v_lshlrev_b32_e32 v4, 3, v02749; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)2750; PACKED-SDAG-NEXT: global_load_dwordx2 v[2:3], v4, s[0:1]2751; PACKED-SDAG-NEXT: s_waitcnt vmcnt(0)2752; PACKED-SDAG-NEXT: v_pk_fma_f32 v[0:1], v[2:3], v[0:1], v[0:1] op_sel_hi:[1,0,0]2753; PACKED-SDAG-NEXT: global_store_dwordx2 v4, v[0:1], s[0:1]2754; PACKED-SDAG-NEXT: s_endpgm2755;2756; PACKED-GISEL-LABEL: fma_v2_v_v_splat:2757; PACKED-GISEL: ; %bb.0:2758; PACKED-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242759; PACKED-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v02760; PACKED-GISEL-NEXT: v_lshlrev_b32_e32 v4, 3, v02761; PACKED-GISEL-NEXT: v_mov_b32_e32 v1, v02762; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)2763; PACKED-GISEL-NEXT: global_load_dwordx2 v[2:3], v4, s[0:1]2764; PACKED-GISEL-NEXT: s_waitcnt vmcnt(0)2765; PACKED-GISEL-NEXT: v_pk_fma_f32 v[0:1], v[2:3], v[0:1], v[0:1]2766; PACKED-GISEL-NEXT: global_store_dwordx2 v4, v[0:1], s[0:1]2767; PACKED-GISEL-NEXT: s_endpgm2768;2769; GFX1250-SDAG-LABEL: fma_v2_v_v_splat:2770; GFX1250-SDAG: ; %bb.0:2771; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 12772; GFX1250-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x242773; GFX1250-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v02774; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x02775; GFX1250-SDAG-NEXT: global_load_b64 v[2:3], v0, s[0:1] scale_offset2776; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x02777; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[2:3], v[2:3], v[0:1], v[0:1] op_sel_hi:[1,0,0]2778; GFX1250-SDAG-NEXT: global_store_b64 v0, v[2:3], s[0:1] scale_offset2779; GFX1250-SDAG-NEXT: s_endpgm2780;2781; GFX1250-GISEL-LABEL: fma_v2_v_v_splat:2782; GFX1250-GISEL: ; %bb.0:2783; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 12784; GFX1250-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x242785; GFX1250-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v02786; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)2787; GFX1250-GISEL-NEXT: v_mov_b32_e32 v1, v02788; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x02789; GFX1250-GISEL-NEXT: global_load_b64 v[2:3], v0, s[0:1] scale_offset2790; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x02791; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[2:3], v[2:3], v[0:1], v[0:1]2792; GFX1250-GISEL-NEXT: global_store_b64 v0, v[2:3], s[0:1] scale_offset2793; GFX1250-GISEL-NEXT: s_endpgm2794 %id = tail call i32 @llvm.amdgcn.workitem.id.x()2795 %gep = getelementptr inbounds <2 x float>, ptr addrspace(1) %a, i32 %id2796 %load = load <2 x float>, ptr addrspace(1) %gep, align 82797 %fid = bitcast i32 %id to float2798 %tmp1 = insertelement <2 x float> poison, float %fid, i64 02799 %k = insertelement <2 x float> %tmp1, float %fid, i64 12800 %fma = tail call <2 x float> @llvm.fma.v2f32(<2 x float> %load, <2 x float> %k, <2 x float> %k)2801 store <2 x float> %fma, ptr addrspace(1) %gep, align 82802 ret void2803}2804 2805define amdgpu_kernel void @fma_v2_v_lit_splat(ptr addrspace(1) %a) {2806; GFX900-LABEL: fma_v2_v_lit_splat:2807; GFX900: ; %bb.0:2808; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242809; GFX900-NEXT: v_lshlrev_b32_e32 v2, 3, v02810; GFX900-NEXT: s_waitcnt lgkmcnt(0)2811; GFX900-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]2812; GFX900-NEXT: s_waitcnt vmcnt(0)2813; GFX900-NEXT: v_fma_f32 v1, v1, 4.0, 1.02814; GFX900-NEXT: v_fma_f32 v0, v0, 4.0, 1.02815; GFX900-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]2816; GFX900-NEXT: s_endpgm2817;2818; PACKED-SDAG-LABEL: fma_v2_v_lit_splat:2819; PACKED-SDAG: ; %bb.0:2820; PACKED-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242821; PACKED-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v02822; PACKED-SDAG-NEXT: v_lshlrev_b32_e32 v2, 3, v02823; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)2824; PACKED-SDAG-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]2825; PACKED-SDAG-NEXT: s_waitcnt vmcnt(0)2826; PACKED-SDAG-NEXT: v_pk_fma_f32 v[0:1], v[0:1], 4.0, 1.0 op_sel_hi:[1,0,0]2827; PACKED-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]2828; PACKED-SDAG-NEXT: s_endpgm2829;2830; GFX90A-GISEL-LABEL: fma_v2_v_lit_splat:2831; GFX90A-GISEL: ; %bb.0:2832; GFX90A-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242833; GFX90A-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v02834; GFX90A-GISEL-NEXT: v_lshlrev_b32_e32 v4, 3, v02835; GFX90A-GISEL-NEXT: s_mov_b32 s4, 1.02836; GFX90A-GISEL-NEXT: s_mov_b32 s2, 4.02837; GFX90A-GISEL-NEXT: s_waitcnt lgkmcnt(0)2838; GFX90A-GISEL-NEXT: global_load_dwordx2 v[0:1], v4, s[0:1]2839; GFX90A-GISEL-NEXT: s_mov_b32 s5, s42840; GFX90A-GISEL-NEXT: s_mov_b32 s3, s22841; GFX90A-GISEL-NEXT: v_pk_mov_b32 v[2:3], s[4:5], s[4:5] op_sel:[0,1]2842; GFX90A-GISEL-NEXT: s_waitcnt vmcnt(0)2843; GFX90A-GISEL-NEXT: v_pk_fma_f32 v[0:1], v[0:1], s[2:3], v[2:3]2844; GFX90A-GISEL-NEXT: global_store_dwordx2 v4, v[0:1], s[0:1]2845; GFX90A-GISEL-NEXT: s_endpgm2846;2847; GFX942-GISEL-LABEL: fma_v2_v_lit_splat:2848; GFX942-GISEL: ; %bb.0:2849; GFX942-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242850; GFX942-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v02851; GFX942-GISEL-NEXT: v_lshlrev_b32_e32 v4, 3, v02852; GFX942-GISEL-NEXT: s_mov_b32 s4, 1.02853; GFX942-GISEL-NEXT: s_mov_b32 s2, 4.02854; GFX942-GISEL-NEXT: s_waitcnt lgkmcnt(0)2855; GFX942-GISEL-NEXT: global_load_dwordx2 v[0:1], v4, s[0:1]2856; GFX942-GISEL-NEXT: s_mov_b32 s5, s42857; GFX942-GISEL-NEXT: s_mov_b32 s3, s22858; GFX942-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[4:5]2859; GFX942-GISEL-NEXT: s_waitcnt vmcnt(0)2860; GFX942-GISEL-NEXT: v_pk_fma_f32 v[0:1], v[0:1], s[2:3], v[2:3]2861; GFX942-GISEL-NEXT: global_store_dwordx2 v4, v[0:1], s[0:1]2862; GFX942-GISEL-NEXT: s_endpgm2863;2864; GFX1250-SDAG-LABEL: fma_v2_v_lit_splat:2865; GFX1250-SDAG: ; %bb.0:2866; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 12867; GFX1250-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x242868; GFX1250-SDAG-NEXT: v_and_b32_e32 v2, 0x3ff, v02869; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x02870; GFX1250-SDAG-NEXT: global_load_b64 v[0:1], v2, s[0:1] scale_offset2871; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x02872; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[0:1], v[0:1], 4.0, 1.0 op_sel_hi:[1,0,0]2873; GFX1250-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1] scale_offset2874; GFX1250-SDAG-NEXT: s_endpgm2875;2876; GFX1250-GISEL-LABEL: fma_v2_v_lit_splat:2877; GFX1250-GISEL: ; %bb.0:2878; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 12879; GFX1250-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x242880; GFX1250-GISEL-NEXT: v_and_b32_e32 v6, 0x3ff, v02881; GFX1250-GISEL-NEXT: s_mov_b32 s2, 4.02882; GFX1250-GISEL-NEXT: s_wait_xcnt 0x02883; GFX1250-GISEL-NEXT: s_mov_b32 s4, 1.02884; GFX1250-GISEL-NEXT: s_mov_b32 s3, s22885; GFX1250-GISEL-NEXT: s_mov_b32 s5, s42886; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[2:3]2887; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[4:5], s[4:5]2888; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x02889; GFX1250-GISEL-NEXT: global_load_b64 v[0:1], v6, s[0:1] scale_offset2890; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x02891; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[0:1], v[0:1], v[2:3], v[4:5]2892; GFX1250-GISEL-NEXT: global_store_b64 v6, v[0:1], s[0:1] scale_offset2893; GFX1250-GISEL-NEXT: s_endpgm2894 %id = tail call i32 @llvm.amdgcn.workitem.id.x()2895 %gep = getelementptr inbounds <2 x float>, ptr addrspace(1) %a, i32 %id2896 %load = load <2 x float>, ptr addrspace(1) %gep, align 82897 %fma = tail call <2 x float> @llvm.fma.v2f32(<2 x float> %load, <2 x float> <float 4.0, float 4.0>, <2 x float> <float 1.0, float 1.0>)2898 store <2 x float> %fma, ptr addrspace(1) %gep, align 82899 ret void2900}2901 2902define amdgpu_kernel void @fma_v2_v_unfoldable_lit(ptr addrspace(1) %a) {2903; GFX900-LABEL: fma_v2_v_unfoldable_lit:2904; GFX900: ; %bb.0:2905; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242906; GFX900-NEXT: v_lshlrev_b32_e32 v2, 3, v02907; GFX900-NEXT: s_mov_b32 s2, 0x404000002908; GFX900-NEXT: s_waitcnt lgkmcnt(0)2909; GFX900-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]2910; GFX900-NEXT: s_waitcnt vmcnt(0)2911; GFX900-NEXT: v_fma_f32 v1, v1, s2, 2.02912; GFX900-NEXT: v_fma_f32 v0, v0, 4.0, 1.02913; GFX900-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]2914; GFX900-NEXT: s_endpgm2915;2916; PACKED-SDAG-LABEL: fma_v2_v_unfoldable_lit:2917; PACKED-SDAG: ; %bb.0:2918; PACKED-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242919; PACKED-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v02920; PACKED-SDAG-NEXT: v_lshlrev_b32_e32 v4, 3, v02921; PACKED-SDAG-NEXT: s_mov_b32 s2, 4.02922; PACKED-SDAG-NEXT: v_mov_b32_e32 v2, 1.02923; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)2924; PACKED-SDAG-NEXT: global_load_dwordx2 v[0:1], v4, s[0:1]2925; PACKED-SDAG-NEXT: v_mov_b32_e32 v3, 2.02926; PACKED-SDAG-NEXT: s_mov_b32 s3, 0x404000002927; PACKED-SDAG-NEXT: s_waitcnt vmcnt(0)2928; PACKED-SDAG-NEXT: v_pk_fma_f32 v[0:1], v[0:1], s[2:3], v[2:3]2929; PACKED-SDAG-NEXT: global_store_dwordx2 v4, v[0:1], s[0:1]2930; PACKED-SDAG-NEXT: s_endpgm2931;2932; GFX90A-GISEL-LABEL: fma_v2_v_unfoldable_lit:2933; GFX90A-GISEL: ; %bb.0:2934; GFX90A-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242935; GFX90A-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v02936; GFX90A-GISEL-NEXT: v_lshlrev_b32_e32 v4, 3, v02937; GFX90A-GISEL-NEXT: s_mov_b32 s4, 1.02938; GFX90A-GISEL-NEXT: s_mov_b32 s2, 4.02939; GFX90A-GISEL-NEXT: s_waitcnt lgkmcnt(0)2940; GFX90A-GISEL-NEXT: global_load_dwordx2 v[0:1], v4, s[0:1]2941; GFX90A-GISEL-NEXT: s_mov_b32 s5, 2.02942; GFX90A-GISEL-NEXT: s_mov_b32 s3, 0x404000002943; GFX90A-GISEL-NEXT: v_pk_mov_b32 v[2:3], s[4:5], s[4:5] op_sel:[0,1]2944; GFX90A-GISEL-NEXT: s_waitcnt vmcnt(0)2945; GFX90A-GISEL-NEXT: v_pk_fma_f32 v[0:1], v[0:1], s[2:3], v[2:3]2946; GFX90A-GISEL-NEXT: global_store_dwordx2 v4, v[0:1], s[0:1]2947; GFX90A-GISEL-NEXT: s_endpgm2948;2949; GFX942-GISEL-LABEL: fma_v2_v_unfoldable_lit:2950; GFX942-GISEL: ; %bb.0:2951; GFX942-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242952; GFX942-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v02953; GFX942-GISEL-NEXT: v_lshlrev_b32_e32 v4, 3, v02954; GFX942-GISEL-NEXT: s_mov_b32 s4, 1.02955; GFX942-GISEL-NEXT: s_mov_b32 s2, 4.02956; GFX942-GISEL-NEXT: s_waitcnt lgkmcnt(0)2957; GFX942-GISEL-NEXT: global_load_dwordx2 v[0:1], v4, s[0:1]2958; GFX942-GISEL-NEXT: s_mov_b32 s5, 2.02959; GFX942-GISEL-NEXT: s_mov_b32 s3, 0x404000002960; GFX942-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[4:5]2961; GFX942-GISEL-NEXT: s_waitcnt vmcnt(0)2962; GFX942-GISEL-NEXT: v_pk_fma_f32 v[0:1], v[0:1], s[2:3], v[2:3]2963; GFX942-GISEL-NEXT: global_store_dwordx2 v4, v[0:1], s[0:1]2964; GFX942-GISEL-NEXT: s_endpgm2965;2966; GFX1250-SDAG-LABEL: fma_v2_v_unfoldable_lit:2967; GFX1250-SDAG: ; %bb.0:2968; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 12969; GFX1250-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x242970; GFX1250-SDAG-NEXT: v_and_b32_e32 v6, 0x3ff, v02971; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[2:3], 0x40400000408000002972; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[4:5], 0x400000003f8000002973; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x02974; GFX1250-SDAG-NEXT: global_load_b64 v[0:1], v6, s[0:1] scale_offset2975; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x02976; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[0:1], v[0:1], v[2:3], v[4:5]2977; GFX1250-SDAG-NEXT: global_store_b64 v6, v[0:1], s[0:1] scale_offset2978; GFX1250-SDAG-NEXT: s_endpgm2979;2980; GFX1250-GISEL-LABEL: fma_v2_v_unfoldable_lit:2981; GFX1250-GISEL: ; %bb.0:2982; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 12983; GFX1250-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x242984; GFX1250-GISEL-NEXT: v_and_b32_e32 v6, 0x3ff, v02985; GFX1250-GISEL-NEXT: s_mov_b64 s[2:3], 0x40400000408000002986; GFX1250-GISEL-NEXT: s_wait_xcnt 0x02987; GFX1250-GISEL-NEXT: s_mov_b64 s[4:5], 0x400000003f8000002988; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[2:3]2989; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[4:5], s[4:5]2990; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x02991; GFX1250-GISEL-NEXT: global_load_b64 v[0:1], v6, s[0:1] scale_offset2992; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x02993; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[0:1], v[0:1], v[2:3], v[4:5]2994; GFX1250-GISEL-NEXT: global_store_b64 v6, v[0:1], s[0:1] scale_offset2995; GFX1250-GISEL-NEXT: s_endpgm2996 %id = tail call i32 @llvm.amdgcn.workitem.id.x()2997 %gep = getelementptr inbounds <2 x float>, ptr addrspace(1) %a, i32 %id2998 %load = load <2 x float>, ptr addrspace(1) %gep, align 82999 %fma = tail call <2 x float> @llvm.fma.v2f32(<2 x float> %load, <2 x float> <float 4.0, float 3.0>, <2 x float> <float 1.0, float 2.0>)3000 store <2 x float> %fma, ptr addrspace(1) %gep, align 83001 ret void3002}3003 3004define amdgpu_kernel void @fma_v2_v_fneg(ptr addrspace(1) %a, float %x) {3005; GFX900-LABEL: fma_v2_v_fneg:3006; GFX900: ; %bb.0:3007; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x243008; GFX900-NEXT: s_load_dword s2, s[4:5], 0x2c3009; GFX900-NEXT: v_lshlrev_b32_e32 v2, 3, v03010; GFX900-NEXT: s_waitcnt lgkmcnt(0)3011; GFX900-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]3012; GFX900-NEXT: s_waitcnt vmcnt(0)3013; GFX900-NEXT: v_fma_f32 v1, v1, -s2, -s23014; GFX900-NEXT: v_fma_f32 v0, v0, -s2, -s23015; GFX900-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]3016; GFX900-NEXT: s_endpgm3017;3018; PACKED-SDAG-LABEL: fma_v2_v_fneg:3019; PACKED-SDAG: ; %bb.0:3020; PACKED-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x243021; PACKED-SDAG-NEXT: s_load_dword s2, s[4:5], 0x2c3022; PACKED-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v03023; PACKED-SDAG-NEXT: v_lshlrev_b32_e32 v2, 3, v03024; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)3025; PACKED-SDAG-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]3026; PACKED-SDAG-NEXT: s_waitcnt vmcnt(0)3027; PACKED-SDAG-NEXT: v_pk_fma_f32 v[0:1], v[0:1], s[2:3], s[2:3] op_sel_hi:[1,0,0] neg_lo:[0,1,1] neg_hi:[0,1,1]3028; PACKED-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]3029; PACKED-SDAG-NEXT: s_endpgm3030;3031; PACKED-GISEL-LABEL: fma_v2_v_fneg:3032; PACKED-GISEL: ; %bb.0:3033; PACKED-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x243034; PACKED-GISEL-NEXT: s_load_dword s2, s[4:5], 0x2c3035; PACKED-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v03036; PACKED-GISEL-NEXT: v_lshlrev_b32_e32 v4, 3, v03037; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)3038; PACKED-GISEL-NEXT: global_load_dwordx2 v[0:1], v4, s[0:1]3039; PACKED-GISEL-NEXT: v_max_f32_e64 v2, -s2, -s23040; PACKED-GISEL-NEXT: v_mov_b32_e32 v3, v23041; PACKED-GISEL-NEXT: s_waitcnt vmcnt(0)3042; PACKED-GISEL-NEXT: v_pk_fma_f32 v[0:1], v[0:1], v[2:3], v[2:3]3043; PACKED-GISEL-NEXT: global_store_dwordx2 v4, v[0:1], s[0:1]3044; PACKED-GISEL-NEXT: s_endpgm3045;3046; GFX1250-SDAG-LABEL: fma_v2_v_fneg:3047; GFX1250-SDAG: ; %bb.0:3048; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 13049; GFX1250-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x243050; GFX1250-SDAG-NEXT: v_and_b32_e32 v2, 0x3ff, v03051; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x03052; GFX1250-SDAG-NEXT: global_load_b64 v[0:1], v2, s[0:1] scale_offset3053; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x03054; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[0:1], v[0:1], s[2:3], s[2:3] op_sel_hi:[1,0,0] neg_lo:[0,1,1] neg_hi:[0,1,1]3055; GFX1250-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1] scale_offset3056; GFX1250-SDAG-NEXT: s_endpgm3057;3058; GFX1250-GISEL-LABEL: fma_v2_v_fneg:3059; GFX1250-GISEL: ; %bb.0:3060; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 13061; GFX1250-GISEL-NEXT: s_load_b96 s[0:2], s[4:5], 0x243062; GFX1250-GISEL-NEXT: v_and_b32_e32 v4, 0x3ff, v03063; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x03064; GFX1250-GISEL-NEXT: global_load_b64 v[0:1], v4, s[0:1] scale_offset3065; GFX1250-GISEL-NEXT: v_max_num_f32_e64 v2, -s2, -s23066; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)3067; GFX1250-GISEL-NEXT: v_mov_b32_e32 v3, v23068; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x03069; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[0:1], v[0:1], v[2:3], v[2:3]3070; GFX1250-GISEL-NEXT: global_store_b64 v4, v[0:1], s[0:1] scale_offset3071; GFX1250-GISEL-NEXT: s_endpgm3072 %id = tail call i32 @llvm.amdgcn.workitem.id.x()3073 %gep = getelementptr inbounds <2 x float>, ptr addrspace(1) %a, i32 %id3074 %load = load <2 x float>, ptr addrspace(1) %gep, align 83075 %fneg = fsub float -0.0, %x3076 %tmp1 = insertelement <2 x float> poison, float %fneg, i64 03077 %k = insertelement <2 x float> %tmp1, float %fneg, i64 13078 %fma = tail call <2 x float> @llvm.fma.v2f32(<2 x float> %load, <2 x float> %k, <2 x float> %k)3079 store <2 x float> %fma, ptr addrspace(1) %gep, align 83080 ret void3081}3082 3083define amdgpu_kernel void @add_vector_neg_bitcast_scalar_lo(ptr addrspace(1) %out, ptr addrspace(3) %lds, ptr addrspace(3) %arg2) {3084; GFX900-LABEL: add_vector_neg_bitcast_scalar_lo:3085; GFX900: ; %bb.0: ; %bb3086; GFX900-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x243087; GFX900-NEXT: v_mov_b32_e32 v3, 03088; GFX900-NEXT: s_waitcnt lgkmcnt(0)3089; GFX900-NEXT: v_mov_b32_e32 v0, s23090; GFX900-NEXT: v_mov_b32_e32 v2, s33091; GFX900-NEXT: ds_read2_b32 v[0:1], v0 offset1:13092; GFX900-NEXT: ds_read_b32 v2, v23093; GFX900-NEXT: s_waitcnt lgkmcnt(0)3094; GFX900-NEXT: v_sub_f32_e32 v1, v1, v23095; GFX900-NEXT: v_sub_f32_e32 v0, v0, v23096; GFX900-NEXT: global_store_dwordx2 v3, v[0:1], s[0:1]3097; GFX900-NEXT: s_endpgm3098;3099; PACKED-SDAG-LABEL: add_vector_neg_bitcast_scalar_lo:3100; PACKED-SDAG: ; %bb.0: ; %bb3101; PACKED-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x243102; PACKED-SDAG-NEXT: v_mov_b32_e32 v3, 03103; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)3104; PACKED-SDAG-NEXT: v_mov_b32_e32 v0, s23105; PACKED-SDAG-NEXT: v_mov_b32_e32 v2, s33106; PACKED-SDAG-NEXT: ds_read2_b32 v[0:1], v0 offset1:13107; PACKED-SDAG-NEXT: ds_read_b32 v2, v23108; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)3109; PACKED-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3] op_sel_hi:[1,0] neg_lo:[0,1] neg_hi:[0,1]3110; PACKED-SDAG-NEXT: global_store_dwordx2 v3, v[0:1], s[0:1]3111; PACKED-SDAG-NEXT: s_endpgm3112;3113; PACKED-GISEL-LABEL: add_vector_neg_bitcast_scalar_lo:3114; PACKED-GISEL: ; %bb.0: ; %bb3115; PACKED-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x243116; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)3117; PACKED-GISEL-NEXT: v_mov_b32_e32 v0, s23118; PACKED-GISEL-NEXT: v_mov_b32_e32 v2, s33119; PACKED-GISEL-NEXT: ds_read2_b32 v[0:1], v0 offset1:13120; PACKED-GISEL-NEXT: ds_read_b32 v2, v23121; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)3122; PACKED-GISEL-NEXT: v_max_f32_e64 v2, -v2, -v23123; PACKED-GISEL-NEXT: v_mov_b32_e32 v3, v23124; PACKED-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3]3125; PACKED-GISEL-NEXT: v_mov_b32_e32 v2, 03126; PACKED-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]3127; PACKED-GISEL-NEXT: s_endpgm3128;3129; GFX1250-SDAG-LABEL: add_vector_neg_bitcast_scalar_lo:3130; GFX1250-SDAG: ; %bb.0: ; %bb3131; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 13132; GFX1250-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x243133; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x03134; GFX1250-SDAG-NEXT: v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v0, s23135; GFX1250-SDAG-NEXT: v_mov_b32_e32 v2, s33136; GFX1250-SDAG-NEXT: ds_load_2addr_b32 v[0:1], v0 offset1:13137; GFX1250-SDAG-NEXT: ds_load_b32 v2, v23138; GFX1250-SDAG-NEXT: s_wait_dscnt 0x03139; GFX1250-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3] op_sel_hi:[1,0] neg_lo:[0,1] neg_hi:[0,1]3140; GFX1250-SDAG-NEXT: global_store_b64 v3, v[0:1], s[0:1]3141; GFX1250-SDAG-NEXT: s_endpgm3142;3143; GFX1250-GISEL-LABEL: add_vector_neg_bitcast_scalar_lo:3144; GFX1250-GISEL: ; %bb.0: ; %bb3145; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 13146; GFX1250-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x243147; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x03148; GFX1250-GISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v2, s33149; GFX1250-GISEL-NEXT: ds_load_2addr_b32 v[0:1], v0 offset1:13150; GFX1250-GISEL-NEXT: ds_load_b32 v2, v23151; GFX1250-GISEL-NEXT: s_wait_dscnt 0x03152; GFX1250-GISEL-NEXT: v_max_num_f32_e64 v2, -v2, -v23153; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3154; GFX1250-GISEL-NEXT: v_mov_b32_e32 v3, v23155; GFX1250-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3]3156; GFX1250-GISEL-NEXT: v_mov_b32_e32 v2, 03157; GFX1250-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]3158; GFX1250-GISEL-NEXT: s_endpgm3159bb:3160 %vec0 = load volatile <2 x float>, ptr addrspace(3) %lds, align 43161 %scalar0 = load volatile float, ptr addrspace(3) %arg2, align 43162 %neg.scalar0 = fsub float -0.0, %scalar03163 3164 %neg.scalar0.vec = insertelement <2 x float> poison, float %neg.scalar0, i32 03165 %neg.scalar0.broadcast = shufflevector <2 x float> %neg.scalar0.vec, <2 x float> poison, <2 x i32> zeroinitializer3166 3167 %result = fadd <2 x float> %vec0, %neg.scalar0.broadcast3168 store <2 x float> %result, ptr addrspace(1) %out, align 43169 ret void3170}3171 3172define amdgpu_kernel void @fma_vector_vector_neg_scalar_lo_scalar_hi(ptr addrspace(1) %out, ptr addrspace(3) %lds, ptr addrspace(3) %arg2) {3173; GFX900-LABEL: fma_vector_vector_neg_scalar_lo_scalar_hi:3174; GFX900: ; %bb.0: ; %bb3175; GFX900-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x243176; GFX900-NEXT: v_mov_b32_e32 v6, 03177; GFX900-NEXT: s_waitcnt lgkmcnt(0)3178; GFX900-NEXT: v_mov_b32_e32 v2, s23179; GFX900-NEXT: v_mov_b32_e32 v4, s33180; GFX900-NEXT: ds_read2_b32 v[0:1], v2 offset1:13181; GFX900-NEXT: ds_read2_b32 v[2:3], v2 offset0:2 offset1:33182; GFX900-NEXT: ds_read_b32 v5, v43183; GFX900-NEXT: ds_read_b32 v4, v4 offset:83184; GFX900-NEXT: s_waitcnt lgkmcnt(1)3185; GFX900-NEXT: v_fma_f32 v0, v0, v2, -v53186; GFX900-NEXT: s_waitcnt lgkmcnt(0)3187; GFX900-NEXT: v_fma_f32 v1, v1, v3, -v43188; GFX900-NEXT: global_store_dwordx2 v6, v[0:1], s[0:1]3189; GFX900-NEXT: s_endpgm3190;3191; PACKED-SDAG-LABEL: fma_vector_vector_neg_scalar_lo_scalar_hi:3192; PACKED-SDAG: ; %bb.0: ; %bb3193; PACKED-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x243194; PACKED-SDAG-NEXT: v_mov_b32_e32 v6, 03195; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)3196; PACKED-SDAG-NEXT: v_mov_b32_e32 v2, s23197; PACKED-SDAG-NEXT: v_mov_b32_e32 v5, s33198; PACKED-SDAG-NEXT: ds_read2_b32 v[0:1], v2 offset1:13199; PACKED-SDAG-NEXT: ds_read2_b32 v[2:3], v2 offset0:2 offset1:33200; PACKED-SDAG-NEXT: ds_read_b32 v4, v53201; PACKED-SDAG-NEXT: ds_read_b32 v5, v5 offset:83202; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)3203; PACKED-SDAG-NEXT: v_pk_fma_f32 v[0:1], v[0:1], v[2:3], v[4:5] neg_lo:[0,0,1] neg_hi:[0,0,1]3204; PACKED-SDAG-NEXT: global_store_dwordx2 v6, v[0:1], s[0:1]3205; PACKED-SDAG-NEXT: s_endpgm3206;3207; PACKED-GISEL-LABEL: fma_vector_vector_neg_scalar_lo_scalar_hi:3208; PACKED-GISEL: ; %bb.0: ; %bb3209; PACKED-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x243210; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)3211; PACKED-GISEL-NEXT: v_mov_b32_e32 v2, s23212; PACKED-GISEL-NEXT: v_mov_b32_e32 v5, s33213; PACKED-GISEL-NEXT: ds_read2_b32 v[0:1], v2 offset1:13214; PACKED-GISEL-NEXT: ds_read2_b32 v[2:3], v2 offset0:2 offset1:33215; PACKED-GISEL-NEXT: ds_read_b32 v4, v53216; PACKED-GISEL-NEXT: ds_read_b32 v5, v5 offset:83217; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)3218; PACKED-GISEL-NEXT: v_pk_mul_f32 v[4:5], 1.0, v[4:5] op_sel_hi:[0,1]3219; PACKED-GISEL-NEXT: v_pk_fma_f32 v[0:1], v[0:1], v[2:3], v[4:5] neg_lo:[0,0,1] neg_hi:[0,0,1]3220; PACKED-GISEL-NEXT: v_mov_b32_e32 v2, 03221; PACKED-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]3222; PACKED-GISEL-NEXT: s_endpgm3223;3224; GFX1250-SDAG-LABEL: fma_vector_vector_neg_scalar_lo_scalar_hi:3225; GFX1250-SDAG: ; %bb.0: ; %bb3226; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 13227; GFX1250-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x243228; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x03229; GFX1250-SDAG-NEXT: v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v2, s23230; GFX1250-SDAG-NEXT: v_mov_b32_e32 v5, s33231; GFX1250-SDAG-NEXT: ds_load_2addr_b32 v[0:1], v2 offset1:13232; GFX1250-SDAG-NEXT: ds_load_2addr_b32 v[2:3], v2 offset0:2 offset1:33233; GFX1250-SDAG-NEXT: ds_load_b32 v4, v53234; GFX1250-SDAG-NEXT: ds_load_b32 v5, v5 offset:83235; GFX1250-SDAG-NEXT: s_wait_dscnt 0x03236; GFX1250-SDAG-NEXT: v_pk_fma_f32 v[0:1], v[0:1], v[2:3], v[4:5] neg_lo:[0,0,1] neg_hi:[0,0,1]3237; GFX1250-SDAG-NEXT: global_store_b64 v6, v[0:1], s[0:1]3238; GFX1250-SDAG-NEXT: s_endpgm3239;3240; GFX1250-GISEL-LABEL: fma_vector_vector_neg_scalar_lo_scalar_hi:3241; GFX1250-GISEL: ; %bb.0: ; %bb3242; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 13243; GFX1250-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x243244; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x03245; GFX1250-GISEL-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v5, s33246; GFX1250-GISEL-NEXT: ds_load_2addr_b32 v[0:1], v2 offset1:13247; GFX1250-GISEL-NEXT: ds_load_2addr_b32 v[2:3], v2 offset0:2 offset1:33248; GFX1250-GISEL-NEXT: ds_load_b32 v4, v53249; GFX1250-GISEL-NEXT: ds_load_b32 v5, v5 offset:83250; GFX1250-GISEL-NEXT: s_wait_dscnt 0x03251; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[4:5], 1.0, v[4:5] op_sel_hi:[0,1]3252; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)3253; GFX1250-GISEL-NEXT: v_pk_fma_f32 v[0:1], v[0:1], v[2:3], v[4:5] neg_lo:[0,0,1] neg_hi:[0,0,1]3254; GFX1250-GISEL-NEXT: v_mov_b32_e32 v2, 03255; GFX1250-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]3256; GFX1250-GISEL-NEXT: s_endpgm3257bb:3258 %lds.gep1 = getelementptr inbounds <2 x float>, ptr addrspace(3) %lds, i32 13259 %arg2.gep = getelementptr inbounds float, ptr addrspace(3) %arg2, i32 23260 3261 %vec0 = load volatile <2 x float>, ptr addrspace(3) %lds, align 43262 %vec1 = load volatile <2 x float>, ptr addrspace(3) %lds.gep1, align 43263 3264 %scalar0 = load volatile float, ptr addrspace(3) %arg2, align 43265 %scalar1 = load volatile float, ptr addrspace(3) %arg2.gep, align 43266 3267 %vec.ins0 = insertelement <2 x float> poison, float %scalar0, i32 03268 %vec2 = insertelement <2 x float> %vec.ins0, float %scalar1, i32 13269 %neg.vec2 = fsub <2 x float> <float -0.0, float -0.0>, %vec23270 3271 %result = tail call <2 x float> @llvm.fma.v2f32(<2 x float> %vec0, <2 x float> %vec1, <2 x float> %neg.vec2)3272 store <2 x float> %result, ptr addrspace(1) %out, align 43273 ret void3274}3275 3276define amdgpu_kernel void @shuffle_add_f32(ptr addrspace(1) %out, ptr addrspace(3) %lds) #0 {3277; GFX900-LABEL: shuffle_add_f32:3278; GFX900: ; %bb.0: ; %bb3279; GFX900-NEXT: s_load_dword s0, s[4:5], 0x2c3280; GFX900-NEXT: v_mov_b32_e32 v4, 03281; GFX900-NEXT: s_waitcnt lgkmcnt(0)3282; GFX900-NEXT: v_mov_b32_e32 v2, s03283; GFX900-NEXT: ds_read_b64 v[0:1], v23284; GFX900-NEXT: ds_read_b64 v[2:3], v2 offset:83285; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x243286; GFX900-NEXT: s_waitcnt lgkmcnt(0)3287; GFX900-NEXT: v_add_f32_e32 v1, v1, v23288; GFX900-NEXT: v_add_f32_e32 v0, v0, v33289; GFX900-NEXT: global_store_dwordx2 v4, v[0:1], s[0:1]3290; GFX900-NEXT: s_endpgm3291;3292; PACKED-SDAG-LABEL: shuffle_add_f32:3293; PACKED-SDAG: ; %bb.0: ; %bb3294; PACKED-SDAG-NEXT: s_load_dword s0, s[4:5], 0x2c3295; PACKED-SDAG-NEXT: v_mov_b32_e32 v4, 03296; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)3297; PACKED-SDAG-NEXT: v_mov_b32_e32 v2, s03298; PACKED-SDAG-NEXT: ds_read_b64 v[0:1], v23299; PACKED-SDAG-NEXT: ds_read_b64 v[2:3], v2 offset:83300; PACKED-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x243301; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)3302; PACKED-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3] op_sel:[0,1] op_sel_hi:[1,0]3303; PACKED-SDAG-NEXT: global_store_dwordx2 v4, v[0:1], s[0:1]3304; PACKED-SDAG-NEXT: s_endpgm3305;3306; PACKED-GISEL-LABEL: shuffle_add_f32:3307; PACKED-GISEL: ; %bb.0: ; %bb3308; PACKED-GISEL-NEXT: s_load_dword s0, s[4:5], 0x2c3309; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)3310; PACKED-GISEL-NEXT: v_mov_b32_e32 v2, s03311; PACKED-GISEL-NEXT: ds_read_b64 v[0:1], v23312; PACKED-GISEL-NEXT: ds_read_b64 v[2:3], v2 offset:83313; PACKED-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x243314; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)3315; PACKED-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3] op_sel:[0,1] op_sel_hi:[1,0]3316; PACKED-GISEL-NEXT: v_mov_b32_e32 v2, 03317; PACKED-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]3318; PACKED-GISEL-NEXT: s_endpgm3319;3320; GFX1250-SDAG-LABEL: shuffle_add_f32:3321; GFX1250-SDAG: ; %bb.0: ; %bb3322; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 13323; GFX1250-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x243324; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x03325; GFX1250-SDAG-NEXT: v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v2, s23326; GFX1250-SDAG-NEXT: ds_load_b64 v[0:1], v23327; GFX1250-SDAG-NEXT: ds_load_b64 v[2:3], v2 offset:83328; GFX1250-SDAG-NEXT: s_wait_dscnt 0x03329; GFX1250-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3] op_sel:[0,1] op_sel_hi:[1,0]3330; GFX1250-SDAG-NEXT: global_store_b64 v4, v[0:1], s[0:1]3331; GFX1250-SDAG-NEXT: s_endpgm3332;3333; GFX1250-GISEL-LABEL: shuffle_add_f32:3334; GFX1250-GISEL: ; %bb.0: ; %bb3335; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 13336; GFX1250-GISEL-NEXT: s_load_b96 s[0:2], s[4:5], 0x243337; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x03338; GFX1250-GISEL-NEXT: v_mov_b32_e32 v2, s23339; GFX1250-GISEL-NEXT: ds_load_b64 v[0:1], v23340; GFX1250-GISEL-NEXT: ds_load_b64 v[2:3], v2 offset:83341; GFX1250-GISEL-NEXT: s_wait_dscnt 0x03342; GFX1250-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3] op_sel:[0,1] op_sel_hi:[1,0]3343; GFX1250-GISEL-NEXT: v_mov_b32_e32 v2, 03344; GFX1250-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]3345; GFX1250-GISEL-NEXT: s_endpgm3346bb:3347 %vec0 = load volatile <2 x float>, ptr addrspace(3) %lds, align 83348 %lds.gep1 = getelementptr inbounds <2 x float>, ptr addrspace(3) %lds, i32 13349 %vec1 = load volatile <2 x float>, ptr addrspace(3) %lds.gep1, align 83350 %vec1.swap = shufflevector <2 x float> %vec1, <2 x float> poison, <2 x i32> <i32 1, i32 0>3351 %result = fadd <2 x float> %vec0, %vec1.swap3352 store <2 x float> %result, ptr addrspace(1) %out, align 83353 ret void3354}3355 3356define amdgpu_kernel void @shuffle_neg_add_f32(ptr addrspace(1) %out, ptr addrspace(3) %lds) #0 {3357; GFX900-LABEL: shuffle_neg_add_f32:3358; GFX900: ; %bb.0: ; %bb3359; GFX900-NEXT: s_load_dword s0, s[4:5], 0x2c3360; GFX900-NEXT: v_mov_b32_e32 v4, 03361; GFX900-NEXT: s_waitcnt lgkmcnt(0)3362; GFX900-NEXT: v_mov_b32_e32 v2, s03363; GFX900-NEXT: ds_read_b64 v[0:1], v23364; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x243365; GFX900-NEXT: s_waitcnt lgkmcnt(0)3366; GFX900-NEXT: ds_read_b32 v3, v03367; GFX900-NEXT: s_waitcnt lgkmcnt(0)3368; GFX900-NEXT: ds_read_b64 v[2:3], v2 offset:83369; GFX900-NEXT: s_waitcnt lgkmcnt(0)3370; GFX900-NEXT: v_sub_f32_e32 v1, v1, v23371; GFX900-NEXT: v_sub_f32_e32 v0, v0, v33372; GFX900-NEXT: global_store_dwordx2 v4, v[0:1], s[0:1]3373; GFX900-NEXT: s_endpgm3374;3375; PACKED-SDAG-LABEL: shuffle_neg_add_f32:3376; PACKED-SDAG: ; %bb.0: ; %bb3377; PACKED-SDAG-NEXT: s_load_dword s0, s[4:5], 0x2c3378; PACKED-SDAG-NEXT: v_mov_b32_e32 v4, 03379; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)3380; PACKED-SDAG-NEXT: v_mov_b32_e32 v2, s03381; PACKED-SDAG-NEXT: ds_read_b64 v[0:1], v23382; PACKED-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x243383; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)3384; PACKED-SDAG-NEXT: ds_read_b32 v3, v03385; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)3386; PACKED-SDAG-NEXT: ds_read_b64 v[2:3], v2 offset:83387; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)3388; PACKED-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3] op_sel:[0,1] op_sel_hi:[1,0] neg_lo:[0,1] neg_hi:[0,1]3389; PACKED-SDAG-NEXT: global_store_dwordx2 v4, v[0:1], s[0:1]3390; PACKED-SDAG-NEXT: s_endpgm3391;3392; PACKED-GISEL-LABEL: shuffle_neg_add_f32:3393; PACKED-GISEL: ; %bb.0: ; %bb3394; PACKED-GISEL-NEXT: s_load_dword s0, s[4:5], 0x2c3395; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)3396; PACKED-GISEL-NEXT: v_mov_b32_e32 v2, s03397; PACKED-GISEL-NEXT: ds_read_b64 v[0:1], v23398; PACKED-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x243399; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)3400; PACKED-GISEL-NEXT: ds_read_b32 v3, v03401; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)3402; PACKED-GISEL-NEXT: ds_read_b64 v[2:3], v2 offset:83403; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)3404; PACKED-GISEL-NEXT: v_pk_mul_f32 v[2:3], 1.0, v[2:3] op_sel_hi:[0,1] neg_lo:[0,1] neg_hi:[0,1]3405; PACKED-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3] op_sel:[0,1] op_sel_hi:[1,0]3406; PACKED-GISEL-NEXT: v_mov_b32_e32 v2, 03407; PACKED-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]3408; PACKED-GISEL-NEXT: s_endpgm3409;3410; GFX1250-SDAG-LABEL: shuffle_neg_add_f32:3411; GFX1250-SDAG: ; %bb.0: ; %bb3412; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 13413; GFX1250-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x243414; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x03415; GFX1250-SDAG-NEXT: v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v2, s23416; GFX1250-SDAG-NEXT: ds_load_b64 v[0:1], v23417; GFX1250-SDAG-NEXT: s_wait_dscnt 0x03418; GFX1250-SDAG-NEXT: ds_load_b32 v3, v03419; GFX1250-SDAG-NEXT: s_wait_dscnt 0x03420; GFX1250-SDAG-NEXT: ds_load_b64 v[2:3], v2 offset:83421; GFX1250-SDAG-NEXT: s_wait_dscnt 0x03422; GFX1250-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3] op_sel:[0,1] op_sel_hi:[1,0] neg_lo:[0,1] neg_hi:[0,1]3423; GFX1250-SDAG-NEXT: global_store_b64 v4, v[0:1], s[0:1]3424; GFX1250-SDAG-NEXT: s_endpgm3425;3426; GFX1250-GISEL-LABEL: shuffle_neg_add_f32:3427; GFX1250-GISEL: ; %bb.0: ; %bb3428; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 13429; GFX1250-GISEL-NEXT: s_load_b96 s[0:2], s[4:5], 0x243430; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x03431; GFX1250-GISEL-NEXT: v_mov_b32_e32 v2, s23432; GFX1250-GISEL-NEXT: ds_load_b64 v[0:1], v23433; GFX1250-GISEL-NEXT: s_wait_dscnt 0x03434; GFX1250-GISEL-NEXT: ds_load_b32 v3, v03435; GFX1250-GISEL-NEXT: s_wait_dscnt 0x03436; GFX1250-GISEL-NEXT: ds_load_b64 v[2:3], v2 offset:83437; GFX1250-GISEL-NEXT: s_wait_dscnt 0x03438; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[2:3], 1.0, v[2:3] op_sel_hi:[0,1] neg_lo:[0,1] neg_hi:[0,1]3439; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)3440; GFX1250-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3] op_sel:[0,1] op_sel_hi:[1,0]3441; GFX1250-GISEL-NEXT: v_mov_b32_e32 v2, 03442; GFX1250-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]3443; GFX1250-GISEL-NEXT: s_endpgm3444bb:3445 %vec0 = load volatile <2 x float>, ptr addrspace(3) %lds, align 83446 %lds.gep1 = getelementptr inbounds <2 x float>, ptr addrspace(3) %lds, i32 13447 %f32 = load volatile float, ptr addrspace(3) poison, align 83448 %vec1 = load volatile <2 x float>, ptr addrspace(3) %lds.gep1, align 83449 %vec1.neg = fsub <2 x float> <float -0.0, float -0.0>, %vec13450 %vec1.neg.swap = shufflevector <2 x float> %vec1.neg, <2 x float> poison, <2 x i32> <i32 1, i32 0>3451 %result = fadd <2 x float> %vec0, %vec1.neg.swap3452 store <2 x float> %result, ptr addrspace(1) %out, align 83453 ret void3454}3455 3456define amdgpu_kernel void @fadd_fadd_fsub_0(<2 x float> %arg) {3457; GFX900-LABEL: fadd_fadd_fsub_0:3458; GFX900: ; %bb.0: ; %bb3459; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x243460; GFX900-NEXT: s_waitcnt lgkmcnt(0)3461; GFX900-NEXT: v_add_f32_e64 v0, s1, 03462; GFX900-NEXT: v_add_f32_e32 v1, 0, v03463; GFX900-NEXT: v_mov_b32_e32 v0, s03464; GFX900-NEXT: flat_store_dwordx2 v[0:1], v[0:1]3465; GFX900-NEXT: s_endpgm3466;3467; PACKED-SDAG-LABEL: fadd_fadd_fsub_0:3468; PACKED-SDAG: ; %bb.0: ; %bb3469; PACKED-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x243470; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)3471; PACKED-SDAG-NEXT: v_add_f32_e64 v0, s1, 03472; PACKED-SDAG-NEXT: v_add_f32_e32 v1, 0, v03473; PACKED-SDAG-NEXT: v_mov_b32_e32 v0, s03474; PACKED-SDAG-NEXT: flat_store_dwordx2 v[0:1], v[0:1]3475; PACKED-SDAG-NEXT: s_endpgm3476;3477; GFX90A-GISEL-LABEL: fadd_fadd_fsub_0:3478; GFX90A-GISEL: ; %bb.0: ; %bb3479; GFX90A-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x243480; GFX90A-GISEL-NEXT: s_waitcnt lgkmcnt(0)3481; GFX90A-GISEL-NEXT: v_pk_add_f32 v[0:1], s[0:1], 03482; GFX90A-GISEL-NEXT: v_mov_b32_e32 v0, v13483; GFX90A-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], 03484; GFX90A-GISEL-NEXT: v_mov_b32_e32 v2, s03485; GFX90A-GISEL-NEXT: v_mov_b32_e32 v3, v03486; GFX90A-GISEL-NEXT: flat_store_dwordx2 v[0:1], v[2:3]3487; GFX90A-GISEL-NEXT: s_endpgm3488;3489; GFX942-GISEL-LABEL: fadd_fadd_fsub_0:3490; GFX942-GISEL: ; %bb.0: ; %bb3491; GFX942-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x243492; GFX942-GISEL-NEXT: s_waitcnt lgkmcnt(0)3493; GFX942-GISEL-NEXT: v_pk_add_f32 v[0:1], s[0:1], 03494; GFX942-GISEL-NEXT: s_nop 03495; GFX942-GISEL-NEXT: v_mov_b32_e32 v0, v13496; GFX942-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], 03497; GFX942-GISEL-NEXT: v_mov_b32_e32 v2, s03498; GFX942-GISEL-NEXT: v_mov_b32_e32 v3, v03499; GFX942-GISEL-NEXT: flat_store_dwordx2 v[0:1], v[2:3]3500; GFX942-GISEL-NEXT: s_endpgm3501;3502; GFX1250-SDAG-LABEL: fadd_fadd_fsub_0:3503; GFX1250-SDAG: ; %bb.0: ; %bb3504; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 13505; GFX1250-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x243506; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x03507; GFX1250-SDAG-NEXT: s_add_f32 s1, s1, 03508; GFX1250-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_3) | instskip(NEXT) | instid1(SALU_CYCLE_3)3509; GFX1250-SDAG-NEXT: s_add_f32 s1, s1, 03510; GFX1250-SDAG-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s13511; GFX1250-SDAG-NEXT: flat_store_b64 v[0:1], v[0:1]3512; GFX1250-SDAG-NEXT: s_endpgm3513;3514; GFX1250-GISEL-LABEL: fadd_fadd_fsub_0:3515; GFX1250-GISEL: ; %bb.0: ; %bb3516; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 13517; GFX1250-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x243518; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x03519; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[0:1], s[0:1]3520; GFX1250-GISEL-NEXT: v_mov_b32_e32 v2, s03521; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)3522; GFX1250-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], 03523; GFX1250-GISEL-NEXT: v_mov_b32_e32 v0, v13524; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3525; GFX1250-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], 03526; GFX1250-GISEL-NEXT: v_mov_b32_e32 v3, v03527; GFX1250-GISEL-NEXT: flat_store_b64 v[0:1], v[2:3]3528; GFX1250-GISEL-NEXT: s_endpgm3529bb:3530 %i12 = fadd <2 x float> zeroinitializer, %arg3531 %shift8 = shufflevector <2 x float> %i12, <2 x float> poison, <2 x i32> <i32 1, i32 poison>3532 %i13 = fadd <2 x float> zeroinitializer, %shift83533 %i14 = shufflevector <2 x float> %arg, <2 x float> %i13, <2 x i32> <i32 0, i32 2>3534 %i15 = fsub <2 x float> %i14, zeroinitializer3535 store <2 x float> %i15, ptr poison3536 ret void3537}3538 3539define amdgpu_kernel void @fadd_fadd_fsub(<2 x float> %arg, <2 x float> %arg1, ptr addrspace(1) %ptr) {3540; GFX900-LABEL: fadd_fadd_fsub:3541; GFX900: ; %bb.0: ; %bb3542; GFX900-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x243543; GFX900-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x343544; GFX900-NEXT: v_mov_b32_e32 v2, 03545; GFX900-NEXT: s_waitcnt lgkmcnt(0)3546; GFX900-NEXT: v_mov_b32_e32 v0, s33547; GFX900-NEXT: v_add_f32_e32 v0, s1, v03548; GFX900-NEXT: v_mov_b32_e32 v1, s23549; GFX900-NEXT: v_add_f32_e32 v3, s2, v03550; GFX900-NEXT: v_sub_f32_e32 v0, s0, v13551; GFX900-NEXT: v_subrev_f32_e32 v1, s3, v33552; GFX900-NEXT: global_store_dwordx2 v2, v[0:1], s[6:7]3553; GFX900-NEXT: s_endpgm3554;3555; PACKED-SDAG-LABEL: fadd_fadd_fsub:3556; PACKED-SDAG: ; %bb.0: ; %bb3557; PACKED-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x243558; PACKED-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x343559; PACKED-SDAG-NEXT: v_mov_b32_e32 v4, 03560; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)3561; PACKED-SDAG-NEXT: v_mov_b32_e32 v0, s33562; PACKED-SDAG-NEXT: v_add_f32_e32 v0, s1, v03563; PACKED-SDAG-NEXT: v_pk_add_f32 v[0:1], s[2:3], v[0:1] op_sel_hi:[1,0]3564; PACKED-SDAG-NEXT: v_mov_b32_e32 v2, s03565; PACKED-SDAG-NEXT: v_mov_b32_e32 v3, v03566; PACKED-SDAG-NEXT: v_pk_add_f32 v[0:1], v[2:3], s[2:3] neg_lo:[0,1] neg_hi:[0,1]3567; PACKED-SDAG-NEXT: global_store_dwordx2 v4, v[0:1], s[6:7]3568; PACKED-SDAG-NEXT: s_endpgm3569;3570; GFX90A-GISEL-LABEL: fadd_fadd_fsub:3571; GFX90A-GISEL: ; %bb.0: ; %bb3572; GFX90A-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x243573; GFX90A-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x343574; GFX90A-GISEL-NEXT: s_waitcnt lgkmcnt(0)3575; GFX90A-GISEL-NEXT: v_pk_mov_b32 v[0:1], s[2:3], s[2:3] op_sel:[0,1]3576; GFX90A-GISEL-NEXT: v_mov_b32_e32 v2, s23577; GFX90A-GISEL-NEXT: v_pk_add_f32 v[0:1], s[0:1], v[0:1]3578; GFX90A-GISEL-NEXT: v_sub_f32_e32 v0, s0, v23579; GFX90A-GISEL-NEXT: v_mov_b32_e32 v2, v13580; GFX90A-GISEL-NEXT: v_pk_add_f32 v[2:3], s[2:3], v[2:3]3581; GFX90A-GISEL-NEXT: v_subrev_f32_e32 v1, s3, v23582; GFX90A-GISEL-NEXT: v_mov_b32_e32 v2, 03583; GFX90A-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[6:7]3584; GFX90A-GISEL-NEXT: s_endpgm3585;3586; GFX942-GISEL-LABEL: fadd_fadd_fsub:3587; GFX942-GISEL: ; %bb.0: ; %bb3588; GFX942-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x243589; GFX942-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x343590; GFX942-GISEL-NEXT: s_waitcnt lgkmcnt(0)3591; GFX942-GISEL-NEXT: v_mov_b64_e32 v[0:1], s[2:3]3592; GFX942-GISEL-NEXT: v_mov_b32_e32 v2, s23593; GFX942-GISEL-NEXT: v_pk_add_f32 v[0:1], s[0:1], v[0:1]3594; GFX942-GISEL-NEXT: s_nop 03595; GFX942-GISEL-NEXT: v_sub_f32_e32 v0, s0, v23596; GFX942-GISEL-NEXT: v_mov_b32_e32 v2, v13597; GFX942-GISEL-NEXT: v_pk_add_f32 v[2:3], s[2:3], v[2:3]3598; GFX942-GISEL-NEXT: s_nop 03599; GFX942-GISEL-NEXT: v_subrev_f32_e32 v1, s3, v23600; GFX942-GISEL-NEXT: v_mov_b32_e32 v2, 03601; GFX942-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[6:7]3602; GFX942-GISEL-NEXT: s_endpgm3603;3604; GFX1250-SDAG-LABEL: fadd_fadd_fsub:3605; GFX1250-SDAG: ; %bb.0: ; %bb3606; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 13607; GFX1250-SDAG-NEXT: s_clause 0x13608; GFX1250-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x243609; GFX1250-SDAG-NEXT: s_load_b64 s[6:7], s[4:5], 0x343610; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x03611; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[0:1], s[2:3]3612; GFX1250-SDAG-NEXT: s_add_f32 s2, s1, s33613; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_3)3614; GFX1250-SDAG-NEXT: v_pk_add_f32 v[2:3], v[0:1], s[2:3] op_sel_hi:[1,0]3615; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)3616; GFX1250-SDAG-NEXT: v_dual_mov_b32 v4, s0 :: v_dual_mov_b32 v5, v23617; GFX1250-SDAG-NEXT: v_mov_b32_e32 v2, 03618; GFX1250-SDAG-NEXT: v_pk_add_f32 v[0:1], v[4:5], v[0:1] neg_lo:[0,1] neg_hi:[0,1]3619; GFX1250-SDAG-NEXT: global_store_b64 v2, v[0:1], s[6:7]3620; GFX1250-SDAG-NEXT: s_endpgm3621;3622; GFX1250-GISEL-LABEL: fadd_fadd_fsub:3623; GFX1250-GISEL: ; %bb.0: ; %bb3624; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 13625; GFX1250-GISEL-NEXT: s_clause 0x13626; GFX1250-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x243627; GFX1250-GISEL-NEXT: s_load_b64 s[6:7], s[4:5], 0x343628; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x03629; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[0:1], s[0:1]3630; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[2:3]3631; GFX1250-GISEL-NEXT: s_sub_f32 s0, s0, s23632; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3633; GFX1250-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[2:3]3634; GFX1250-GISEL-NEXT: v_mov_b32_e32 v0, v13635; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3636; GFX1250-GISEL-NEXT: v_pk_add_f32 v[0:1], v[2:3], v[0:1]3637; GFX1250-GISEL-NEXT: v_dual_mov_b32 v2, s0 :: v_dual_subrev_f32 v3, s3, v03638; GFX1250-GISEL-NEXT: v_mov_b32_e32 v0, 03639; GFX1250-GISEL-NEXT: global_store_b64 v0, v[2:3], s[6:7]3640; GFX1250-GISEL-NEXT: s_endpgm3641bb:3642 %i12 = fadd <2 x float> %arg, %arg13643 %shift8 = shufflevector <2 x float> %i12, <2 x float> poison, <2 x i32> <i32 1, i32 poison>3644 %i13 = fadd <2 x float> %arg1, %shift83645 %i14 = shufflevector <2 x float> %arg, <2 x float> %i13, <2 x i32> <i32 0, i32 2>3646 %i15 = fsub <2 x float> %i14, %arg13647 store <2 x float> %i15, ptr addrspace(1) %ptr3648 ret void3649}3650 3651define amdgpu_kernel void @fadd_shuffle_v4(ptr addrspace(1) %arg) {3652; GFX900-LABEL: fadd_shuffle_v4:3653; GFX900: ; %bb.0: ; %bb3654; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x243655; GFX900-NEXT: v_lshlrev_b32_e32 v4, 4, v03656; GFX900-NEXT: s_waitcnt lgkmcnt(0)3657; GFX900-NEXT: global_load_dwordx4 v[0:3], v4, s[0:1]3658; GFX900-NEXT: s_waitcnt vmcnt(0)3659; GFX900-NEXT: v_add_f32_e32 v3, v3, v03660; GFX900-NEXT: v_add_f32_e32 v2, v2, v03661; GFX900-NEXT: v_add_f32_e32 v1, v1, v03662; GFX900-NEXT: v_add_f32_e32 v0, v0, v03663; GFX900-NEXT: global_store_dwordx4 v4, v[0:3], s[0:1]3664; GFX900-NEXT: s_endpgm3665;3666; PACKED-SDAG-LABEL: fadd_shuffle_v4:3667; PACKED-SDAG: ; %bb.0: ; %bb3668; PACKED-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x243669; PACKED-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v03670; PACKED-SDAG-NEXT: v_lshlrev_b32_e32 v4, 4, v03671; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)3672; PACKED-SDAG-NEXT: global_load_dwordx4 v[0:3], v4, s[0:1]3673; PACKED-SDAG-NEXT: s_waitcnt vmcnt(0)3674; PACKED-SDAG-NEXT: v_pk_add_f32 v[2:3], v[2:3], v[0:1] op_sel_hi:[1,0]3675; PACKED-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[0:1] op_sel_hi:[1,0]3676; PACKED-SDAG-NEXT: global_store_dwordx4 v4, v[0:3], s[0:1]3677; PACKED-SDAG-NEXT: s_endpgm3678;3679; PACKED-GISEL-LABEL: fadd_shuffle_v4:3680; PACKED-GISEL: ; %bb.0: ; %bb3681; PACKED-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x243682; PACKED-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v03683; PACKED-GISEL-NEXT: v_lshlrev_b32_e32 v6, 4, v03684; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)3685; PACKED-GISEL-NEXT: global_load_dwordx4 v[0:3], v6, s[0:1]3686; PACKED-GISEL-NEXT: s_waitcnt vmcnt(0)3687; PACKED-GISEL-NEXT: v_mov_b32_e32 v4, v03688; PACKED-GISEL-NEXT: v_mov_b32_e32 v5, v03689; PACKED-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[4:5]3690; PACKED-GISEL-NEXT: v_pk_add_f32 v[2:3], v[2:3], v[4:5]3691; PACKED-GISEL-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]3692; PACKED-GISEL-NEXT: s_endpgm3693;3694; GFX1250-SDAG-LABEL: fadd_shuffle_v4:3695; GFX1250-SDAG: ; %bb.0: ; %bb3696; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 13697; GFX1250-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x243698; GFX1250-SDAG-NEXT: v_and_b32_e32 v4, 0x3ff, v03699; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x03700; GFX1250-SDAG-NEXT: global_load_b128 v[0:3], v4, s[0:1] scale_offset3701; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x03702; GFX1250-SDAG-NEXT: v_pk_add_f32 v[2:3], v[2:3], v[0:1] op_sel_hi:[1,0]3703; GFX1250-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[0:1] op_sel_hi:[1,0]3704; GFX1250-SDAG-NEXT: global_store_b128 v4, v[0:3], s[0:1] scale_offset3705; GFX1250-SDAG-NEXT: s_endpgm3706;3707; GFX1250-GISEL-LABEL: fadd_shuffle_v4:3708; GFX1250-GISEL: ; %bb.0: ; %bb3709; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 13710; GFX1250-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x243711; GFX1250-GISEL-NEXT: v_and_b32_e32 v6, 0x3ff, v03712; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x03713; GFX1250-GISEL-NEXT: global_load_b128 v[0:3], v6, s[0:1] scale_offset3714; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x03715; GFX1250-GISEL-NEXT: v_dual_mov_b32 v4, v0 :: v_dual_mov_b32 v5, v03716; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)3717; GFX1250-GISEL-NEXT: v_pk_add_f32 v[0:1], v[0:1], v[4:5]3718; GFX1250-GISEL-NEXT: v_pk_add_f32 v[2:3], v[2:3], v[4:5]3719; GFX1250-GISEL-NEXT: global_store_b128 v6, v[0:3], s[0:1] scale_offset3720; GFX1250-GISEL-NEXT: s_endpgm3721bb:3722 %tid = call i32 @llvm.amdgcn.workitem.id.x()3723 %gep = getelementptr inbounds <4 x float>, ptr addrspace(1) %arg, i32 %tid3724 %in.1 = load <4 x float>, ptr addrspace(1) %gep3725 %shuf = shufflevector <4 x float> %in.1, <4 x float> poison, <4 x i32> zeroinitializer3726 %add.1 = fadd <4 x float> %in.1, %shuf3727 store <4 x float> %add.1, ptr addrspace(1) %gep3728 ret void3729}3730 3731define amdgpu_kernel void @fneg_v2f32_vec(ptr addrspace(1) %a) {3732; GFX900-LABEL: fneg_v2f32_vec:3733; GFX900: ; %bb.0:3734; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x243735; GFX900-NEXT: v_lshlrev_b32_e32 v2, 3, v03736; GFX900-NEXT: s_waitcnt lgkmcnt(0)3737; GFX900-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]3738; GFX900-NEXT: s_waitcnt vmcnt(0)3739; GFX900-NEXT: v_xor_b32_e32 v1, 0x80000000, v13740; GFX900-NEXT: v_xor_b32_e32 v0, 0x80000000, v03741; GFX900-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]3742; GFX900-NEXT: s_endpgm3743;3744; PACKED-SDAG-LABEL: fneg_v2f32_vec:3745; PACKED-SDAG: ; %bb.0:3746; PACKED-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x243747; PACKED-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v03748; PACKED-SDAG-NEXT: v_lshlrev_b32_e32 v2, 3, v03749; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)3750; PACKED-SDAG-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]3751; PACKED-SDAG-NEXT: s_waitcnt vmcnt(0)3752; PACKED-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], 0 neg_lo:[1,1] neg_hi:[1,1]3753; PACKED-SDAG-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]3754; PACKED-SDAG-NEXT: s_endpgm3755;3756; PACKED-GISEL-LABEL: fneg_v2f32_vec:3757; PACKED-GISEL: ; %bb.0:3758; PACKED-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x243759; PACKED-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v03760; PACKED-GISEL-NEXT: v_lshlrev_b32_e32 v2, 3, v03761; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)3762; PACKED-GISEL-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]3763; PACKED-GISEL-NEXT: s_waitcnt vmcnt(0)3764; PACKED-GISEL-NEXT: v_pk_mul_f32 v[0:1], 1.0, v[0:1] op_sel_hi:[0,1] neg_lo:[0,1] neg_hi:[0,1]3765; PACKED-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]3766; PACKED-GISEL-NEXT: s_endpgm3767;3768; GFX1250-SDAG-LABEL: fneg_v2f32_vec:3769; GFX1250-SDAG: ; %bb.0:3770; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 13771; GFX1250-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x243772; GFX1250-SDAG-NEXT: v_and_b32_e32 v2, 0x3ff, v03773; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x03774; GFX1250-SDAG-NEXT: global_load_b64 v[0:1], v2, s[0:1] scale_offset3775; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x03776; GFX1250-SDAG-NEXT: v_pk_add_f32 v[0:1], v[0:1], 0 neg_lo:[1,1] neg_hi:[1,1]3777; GFX1250-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1] scale_offset3778; GFX1250-SDAG-NEXT: s_endpgm3779;3780; GFX1250-GISEL-LABEL: fneg_v2f32_vec:3781; GFX1250-GISEL: ; %bb.0:3782; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 13783; GFX1250-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x243784; GFX1250-GISEL-NEXT: v_and_b32_e32 v2, 0x3ff, v03785; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x03786; GFX1250-GISEL-NEXT: global_load_b64 v[0:1], v2, s[0:1] scale_offset3787; GFX1250-GISEL-NEXT: s_wait_loadcnt 0x03788; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[0:1], 1.0, v[0:1] op_sel_hi:[0,1] neg_lo:[0,1] neg_hi:[0,1]3789; GFX1250-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1] scale_offset3790; GFX1250-GISEL-NEXT: s_endpgm3791 %id = tail call i32 @llvm.amdgcn.workitem.id.x()3792 %gep = getelementptr inbounds <2 x float>, ptr addrspace(1) %a, i32 %id3793 %load = load <2 x float>, ptr addrspace(1) %gep, align 83794 %fneg = fsub <2 x float> <float -0.0, float -0.0>, %load3795 store <2 x float> %fneg, ptr addrspace(1) %gep, align 83796 ret void3797}3798 3799define amdgpu_kernel void @fneg_v2f32_scalar(ptr addrspace(1) %a, <2 x float> %x) {3800; GFX900-LABEL: fneg_v2f32_scalar:3801; GFX900: ; %bb.0:3802; GFX900-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x243803; GFX900-NEXT: v_mov_b32_e32 v2, 03804; GFX900-NEXT: s_waitcnt lgkmcnt(0)3805; GFX900-NEXT: s_xor_b32 s3, s3, 0x800000003806; GFX900-NEXT: s_xor_b32 s2, s2, 0x800000003807; GFX900-NEXT: v_mov_b32_e32 v0, s23808; GFX900-NEXT: v_mov_b32_e32 v1, s33809; GFX900-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]3810; GFX900-NEXT: s_endpgm3811;3812; PACKED-SDAG-LABEL: fneg_v2f32_scalar:3813; PACKED-SDAG: ; %bb.0:3814; PACKED-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x243815; PACKED-SDAG-NEXT: v_mov_b32_e32 v0, 03816; PACKED-SDAG-NEXT: s_waitcnt lgkmcnt(0)3817; PACKED-SDAG-NEXT: s_xor_b32 s3, s3, 0x800000003818; PACKED-SDAG-NEXT: s_xor_b32 s2, s2, 0x800000003819; PACKED-SDAG-NEXT: v_mov_b32_e32 v2, s23820; PACKED-SDAG-NEXT: v_mov_b32_e32 v3, s33821; PACKED-SDAG-NEXT: global_store_dwordx2 v0, v[2:3], s[0:1]3822; PACKED-SDAG-NEXT: s_endpgm3823;3824; PACKED-GISEL-LABEL: fneg_v2f32_scalar:3825; PACKED-GISEL: ; %bb.0:3826; PACKED-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x243827; PACKED-GISEL-NEXT: v_mov_b32_e32 v2, 03828; PACKED-GISEL-NEXT: s_waitcnt lgkmcnt(0)3829; PACKED-GISEL-NEXT: v_pk_mul_f32 v[0:1], 1.0, s[2:3] op_sel_hi:[0,1] neg_lo:[0,1] neg_hi:[0,1]3830; PACKED-GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]3831; PACKED-GISEL-NEXT: s_endpgm3832;3833; GFX1250-SDAG-LABEL: fneg_v2f32_scalar:3834; GFX1250-SDAG: ; %bb.0:3835; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 13836; GFX1250-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x243837; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x03838; GFX1250-SDAG-NEXT: s_xor_b32 s2, s2, 0x800000003839; GFX1250-SDAG-NEXT: s_xor_b32 s3, s3, 0x800000003840; GFX1250-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v0, s23841; GFX1250-SDAG-NEXT: v_mov_b32_e32 v1, s33842; GFX1250-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]3843; GFX1250-SDAG-NEXT: s_endpgm3844;3845; GFX1250-GISEL-LABEL: fneg_v2f32_scalar:3846; GFX1250-GISEL: ; %bb.0:3847; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 13848; GFX1250-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x243849; GFX1250-GISEL-NEXT: v_mov_b32_e32 v2, 03850; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x03851; GFX1250-GISEL-NEXT: v_mov_b64_e32 v[0:1], s[2:3]3852; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)3853; GFX1250-GISEL-NEXT: v_pk_mul_f32 v[0:1], 1.0, v[0:1] op_sel_hi:[0,1] neg_lo:[0,1] neg_hi:[0,1]3854; GFX1250-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]3855; GFX1250-GISEL-NEXT: s_endpgm3856 %fneg = fsub <2 x float> <float -0.0, float -0.0>, %x3857 store <2 x float> %fneg, ptr addrspace(1) %a, align 83858 ret void3859}3860 3861declare i32 @llvm.amdgcn.workitem.id.x()3862declare <2 x float> @llvm.fma.v2f32(<2 x float>, <2 x float>, <2 x float>)3863declare <4 x float> @llvm.fma.v4f32(<4 x float>, <4 x float>, <4 x float>)3864declare <32 x float> @llvm.fma.v32f32(<32 x float>, <32 x float>, <32 x float>)3865;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:3866; GFX90A-SDAG: {{.*}}3867; GFX942-SDAG: {{.*}}3868