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1; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1200 < %s | FileCheck %s2 3; CHECK: .amdgpu_pal_metadata4; CHECK-NEXT: ---5; CHECK-NEXT: amdpal.pipelines:6; CHECK-NEXT: - .api: Vulkan7; CHECK-NEXT: .compute_registers:8; CHECK-NEXT: .dynamic_vgpr_en: true9; CHECK-NEXT: .tg_size_en: true10; CHECK-NEXT: .tgid_x_en: false11; CHECK-NEXT: .tgid_y_en: false12; CHECK-NEXT: .tgid_z_en: false13; CHECK-NEXT: .tidig_comp_cnt: 0x114; CHECK-NEXT: .hardware_stages:15; CHECK-NEXT: .cs:16; CHECK-NEXT: .checksum_value: 0x9444d7d017; CHECK-NEXT: .debug_mode: 018; CHECK-NEXT: .excp_en: 019; CHECK-NEXT: .float_mode: 0xc020; CHECK-NEXT: .forward_progress: true21; CHECK-NEXT: .image_op: false22; CHECK-NEXT: .lds_size: 0x20023; CHECK-NEXT: .mem_ordered: true24; CHECK-NEXT: .sgpr_limit: 0x6a25; CHECK-NEXT: .threadgroup_dimensions:26; CHECK-NEXT: - 0x127; CHECK-NEXT: - 0x40028; CHECK-NEXT: - 0x129; CHECK-NEXT: .trap_present: false30; CHECK-NEXT: .user_data_reg_map:31; CHECK-NEXT: - 0x1000000032; CHECK-NEXT: - 0xffffffff33; CHECK-NEXT: - 034; CHECK-NEXT: - 0xffffffff35; CHECK-NEXT: - 0xffffffff36; CHECK-NEXT: - 0xffffffff37; CHECK-NEXT: - 0xffffffff38; CHECK-NEXT: - 0xffffffff39; CHECK-NEXT: - 0xffffffff40; CHECK-NEXT: - 0xffffffff41; CHECK-NEXT: - 0xffffffff42; CHECK-NEXT: - 0xffffffff43; CHECK-NEXT: - 0xffffffff44; CHECK-NEXT: - 0xffffffff45; CHECK-NEXT: - 0xffffffff46; CHECK-NEXT: - 0xffffffff47; CHECK-NEXT: - 0xffffffff48; CHECK-NEXT: - 0xffffffff49; CHECK-NEXT: - 0xffffffff50; CHECK-NEXT: - 0xffffffff51; CHECK-NEXT: - 0xffffffff52; CHECK-NEXT: - 0xffffffff53; CHECK-NEXT: - 0xffffffff54; CHECK-NEXT: - 0xffffffff55; CHECK-NEXT: - 0xffffffff56; CHECK-NEXT: - 0xffffffff57; CHECK-NEXT: - 0xffffffff58; CHECK-NEXT: - 0xffffffff59; CHECK-NEXT: - 0xffffffff60; CHECK-NEXT: - 0xffffffff61; CHECK-NEXT: - 0xffffffff62; CHECK-NEXT: - 0xffffffff63; CHECK-NEXT: .user_sgprs: 0x364; CHECK-NEXT: .vgpr_limit: 0x10065; CHECK-NEXT: .wavefront_size: 0x4066; CHECK-NEXT: .wgp_mode: true67; CHECK: .registers: {}68; CHECK-NEXT: .shader_functions:69; CHECK-NEXT: dynamic_stack:70; CHECK-NEXT: .backend_stack_size: 0x1071; CHECK-NEXT: .lds_size: 072; CHECK-NEXT: .sgpr_count: 0x2273; CHECK-NEXT: .stack_frame_size_in_bytes: 0x1074; CHECK-NEXT: .vgpr_count: 0x275; CHECK-NEXT: dynamic_stack_loop:76; CHECK-NEXT: .backend_stack_size: 0x1077; CHECK-NEXT: .lds_size: 078; CHECK-NEXT: .sgpr_count: 0x2279; CHECK-NEXT: .stack_frame_size_in_bytes: 0x1080; CHECK-NEXT: .vgpr_count: 0x381; CHECK-NEXT: multiple_stack:82; CHECK-NEXT: .backend_stack_size: 0x2483; CHECK-NEXT: .lds_size: 084; CHECK-NEXT: .sgpr_count: 0x2185; CHECK-NEXT: .stack_frame_size_in_bytes: 0x2486; CHECK-NEXT: .vgpr_count: 0x387; CHECK-NEXT: no_stack:88; CHECK-NEXT: .backend_stack_size: 089; CHECK-NEXT: .lds_size: 090; CHECK-NEXT: .sgpr_count: 0x2091; CHECK-NEXT: .stack_frame_size_in_bytes: 092; CHECK-NEXT: .vgpr_count: 0x193; CHECK-NEXT: no_stack_call:94; CHECK-NEXT: .backend_stack_size: 0x1095; CHECK-NEXT: .lds_size: 096; CHECK-NEXT: .sgpr_count: 0x2297; CHECK-NEXT: .stack_frame_size_in_bytes: 0x1098; CHECK-NEXT: .vgpr_count: 0x399; CHECK-NEXT: no_stack_extern_call:100; CHECK-NEXT: .backend_stack_size: 0x10101; CHECK-NEXT: .lds_size: 0102; CHECK-NEXT: .sgpr_count: 0x24103; CHECK-NEXT: .stack_frame_size_in_bytes: 0x10104; CHECK-NEXT: .vgpr_count: 0x58105; CHECK-NEXT: no_stack_extern_call_many_args:106; CHECK-NEXT: .backend_stack_size: 0x90107; CHECK-NEXT: .lds_size: 0108; CHECK-NEXT: .sgpr_count: 0x24109; CHECK-NEXT: .stack_frame_size_in_bytes: 0x90110; CHECK-NEXT: .vgpr_count: 0x58111; CHECK-NEXT: no_stack_indirect_call:112; CHECK-NEXT: .backend_stack_size: 0x10113; CHECK-NEXT: .lds_size: 0114; CHECK-NEXT: .sgpr_count: 0x24115; CHECK-NEXT: .stack_frame_size_in_bytes: 0x10116; CHECK-NEXT: .vgpr_count: 0x58117; CHECK-NEXT: simple_lds:118; CHECK-NEXT: .backend_stack_size: 0119; CHECK-NEXT: .lds_size: 0x100120; CHECK-NEXT: .sgpr_count: 0x20121; CHECK-NEXT: .stack_frame_size_in_bytes: 0122; CHECK-NEXT: .vgpr_count: 0x1123; CHECK-NEXT: simple_lds_recurse:124; CHECK-NEXT: .backend_stack_size: 0x10125; CHECK-NEXT: .lds_size: 0x100126; CHECK-NEXT: .sgpr_count: 0x24127; CHECK-NEXT: .stack_frame_size_in_bytes: 0x10128; CHECK-NEXT: .vgpr_count: 0x29129; CHECK-NEXT: simple_stack:130; CHECK-NEXT: .backend_stack_size: 0x14131; CHECK-NEXT: .lds_size: 0132; CHECK-NEXT: .sgpr_count: 0x21133; CHECK-NEXT: .stack_frame_size_in_bytes: 0x14134; CHECK-NEXT: .vgpr_count: 0x2135; CHECK-NEXT: simple_stack_call:136; CHECK-NEXT: .backend_stack_size: 0x20137; CHECK-NEXT: .lds_size: 0138; CHECK-NEXT: .sgpr_count: 0x22139; CHECK-NEXT: .stack_frame_size_in_bytes: 0x20140; CHECK-NEXT: .vgpr_count: 0x4141; CHECK-NEXT: simple_stack_extern_call:142; CHECK-NEXT: .backend_stack_size: 0x20143; CHECK-NEXT: .lds_size: 0144; CHECK-NEXT: .sgpr_count: 0x24145; CHECK-NEXT: .stack_frame_size_in_bytes: 0x20146; CHECK-NEXT: .vgpr_count: 0x58147; CHECK-NEXT: simple_stack_indirect_call:148; CHECK-NEXT: .backend_stack_size: 0x20149; CHECK-NEXT: .lds_size: 0150; CHECK-NEXT: .sgpr_count: 0x24151; CHECK-NEXT: .stack_frame_size_in_bytes: 0x20152; CHECK-NEXT: .vgpr_count: 0x58153; CHECK-NEXT: simple_stack_recurse:154; CHECK-NEXT: .backend_stack_size: 0x20155; CHECK-NEXT: .lds_size: 0156; CHECK-NEXT: .sgpr_count: 0x24157; CHECK-NEXT: .stack_frame_size_in_bytes: 0x20158; CHECK-NEXT: .vgpr_count: 0x2a159; CHECK:amdpal.version:160; CHECK-NEXT: - 0x3161; CHECK-NEXT: - 0162; CHECK-NEXT:...163; CHECK-NEXT: .end_amdgpu_pal_metadata164 165declare amdgpu_gfx float @extern_func(float) #0166declare amdgpu_gfx float @extern_func_many_args(<64 x float>) #0167 168@funcptr = external hidden unnamed_addr addrspace(4) constant ptr, align 4169 170define amdgpu_gfx float @no_stack(float %arg0) #0 {171 %add = fadd float %arg0, 1.0172 ret float %add173}174 175define amdgpu_gfx float @simple_stack(float %arg0) #0 {176 %stack = alloca float, i32 4, align 4, addrspace(5)177 store volatile float 2.0, ptr addrspace(5) %stack178 %val = load volatile float, ptr addrspace(5) %stack179 %add = fadd float %arg0, %val180 ret float %add181}182 183define amdgpu_gfx float @multiple_stack(float %arg0) #0 {184 %stack = alloca float, i32 4, align 4, addrspace(5)185 store volatile float 2.0, ptr addrspace(5) %stack186 %val = load volatile float, ptr addrspace(5) %stack187 %add = fadd float %arg0, %val188 %stack2 = alloca float, i32 4, align 4, addrspace(5)189 store volatile float 2.0, ptr addrspace(5) %stack2190 %val2 = load volatile float, ptr addrspace(5) %stack2191 %add2 = fadd float %add, %val2192 ret float %add2193}194 195define amdgpu_gfx float @dynamic_stack(float %arg0) #0 {196bb0:197 %cmp = fcmp ogt float %arg0, 0.0198 br i1 %cmp, label %bb1, label %bb2199 200bb1:201 %stack = alloca float, i32 4, align 4, addrspace(5)202 store volatile float 2.0, ptr addrspace(5) %stack203 %val = load volatile float, ptr addrspace(5) %stack204 %add = fadd float %arg0, %val205 br label %bb2206 207bb2:208 %res = phi float [ 0.0, %bb0 ], [ %add, %bb1 ]209 ret float %res210}211 212define amdgpu_gfx float @dynamic_stack_loop(float %arg0) #0 {213bb0:214 br label %bb1215 216bb1:217 %ctr = phi i32 [ 0, %bb0 ], [ %newctr, %bb1 ]218 %stack = alloca float, i32 4, align 4, addrspace(5)219 store volatile float 2.0, ptr addrspace(5) %stack220 %val = load volatile float, ptr addrspace(5) %stack221 %add = fadd float %arg0, %val222 %cmp = icmp sgt i32 %ctr, 0223 %newctr = sub i32 %ctr, 1224 br i1 %cmp, label %bb1, label %bb2225 226bb2:227 ret float %add228}229 230define amdgpu_gfx float @no_stack_call(float %arg0) #0 {231 %res = call amdgpu_gfx float @simple_stack(float %arg0)232 ret float %res233}234 235define amdgpu_gfx float @simple_stack_call(float %arg0) #0 {236 %stack = alloca float, i32 4, align 4, addrspace(5)237 store volatile float 2.0, ptr addrspace(5) %stack238 %val = load volatile float, ptr addrspace(5) %stack239 %res = call amdgpu_gfx float @simple_stack(float %arg0)240 %add = fadd float %res, %val241 ret float %add242}243 244define amdgpu_gfx float @no_stack_extern_call(float %arg0) #0 {245 %res = call amdgpu_gfx float @extern_func(float %arg0)246 ret float %res247}248 249define amdgpu_gfx float @simple_stack_extern_call(float %arg0) #0 {250 %stack = alloca float, i32 4, align 4, addrspace(5)251 store volatile float 2.0, ptr addrspace(5) %stack252 %val = load volatile float, ptr addrspace(5) %stack253 %res = call amdgpu_gfx float @extern_func(float %arg0)254 %add = fadd float %res, %val255 ret float %add256}257 258define amdgpu_gfx float @no_stack_extern_call_many_args(<64 x float> %arg0) #0 {259 %res = call amdgpu_gfx float @extern_func_many_args(<64 x float> %arg0)260 ret float %res261}262 263define amdgpu_gfx float @no_stack_indirect_call(float %arg0) #0 {264 %fptr = load ptr, ptr addrspace(4) @funcptr265 call amdgpu_gfx void %fptr()266 ret float %arg0267}268 269define amdgpu_gfx float @simple_stack_indirect_call(float %arg0) #0 {270 %stack = alloca float, i32 4, align 4, addrspace(5)271 store volatile float 2.0, ptr addrspace(5) %stack272 %val = load volatile float, ptr addrspace(5) %stack273 %fptr = load ptr, ptr addrspace(4) @funcptr274 call amdgpu_gfx void %fptr()275 %add = fadd float %arg0, %val276 ret float %add277}278 279define amdgpu_gfx float @simple_stack_recurse(float %arg0) #0 {280 %stack = alloca float, i32 4, align 4, addrspace(5)281 store volatile float 2.0, ptr addrspace(5) %stack282 %val = load volatile float, ptr addrspace(5) %stack283 %res = call amdgpu_gfx float @simple_stack_recurse(float %arg0)284 %add = fadd float %res, %val285 ret float %add286}287 288@lds = internal addrspace(3) global [64 x float] poison289 290define amdgpu_gfx float @simple_lds(float %arg0) #0 {291 %val = load float, ptr addrspace(3) @lds292 ret float %val293}294 295define amdgpu_gfx float @simple_lds_recurse(float %arg0) #0 {296 %val = load float, ptr addrspace(3) @lds297 %res = call amdgpu_gfx float @simple_lds_recurse(float %val)298 ret float %res299}300 301attributes #0 = { nounwind "amdgpu-dynamic-vgpr-block-size"="16" }302 303!amdgpu.pal.metadata.msgpack = !{!0}304 305!0 = !{!"\82\B0amdpal.pipelines\91\8A\A4.api\A6Vulkan\B2.compute_registers\85\AB.tg_size_en\C3\AA.tgid_x_en\C2\AA.tgid_y_en\C2\AA.tgid_z_en\C2\AF.tidig_comp_cnt\01\B0.hardware_stages\81\A3.cs\8C\AF.checksum_value\CE\94D\D7\D0\AB.debug_mode\00\AB.float_mode\CC\C0\A9.image_op\C2\AC.mem_ordered\C3\AB.sgpr_limitj\B7.threadgroup_dimensions\93\01\CD\04\00\01\AD.trap_present\00\B2.user_data_reg_map\DC\00 \CE\10\00\00\00\CE\FF\FF\FF\FF\00\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\AB.user_sgprs\03\AB.vgpr_limit\CD\01\00\AF.wavefront_size@\B7.internal_pipeline_hash\92\CF\E7\10k\A6:\A6%\F7\CF\B2\1F\1A\D4{\DA\E1T\AA.registers\80\A8.shaders\81\A8.compute\82\B0.api_shader_hash\92\CF\E9Zn7}\1E\B9\E7\00\B1.hardware_mapping\91\A3.cs\B0.spill_threshold\CE\FF\FF\FF\FF\A5.type\A2Cs\B0.user_data_limit\01\AF.xgl_cache_info\82\B3.128_bit_cache_hash\92\CF\B4X\B8\11[\A4\88P\CF\A0;\B0\AF\FF\B4\BE\C0\AD.llpc_version\A461.1\AEamdpal.version\92\03\00"}306!1 = !{i32 7}307